1/*
  2 * Copyright 2015 Advanced Micro Devices, Inc.
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice shall be included in
 12 * all copies or substantial portions of the Software.
 13 *
 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 20 * OTHER DEALINGS IN THE SOFTWARE.
 21 *
 22 * Authors: AMD
 23 *
 24 */
 25
 26#ifndef __DC_HW_SEQUENCER_H__
 27#define __DC_HW_SEQUENCER_H__
 28#include "dc_types.h"
 29#include "clock_source.h"
 30#include "inc/hw/timing_generator.h"
 31#include "inc/hw/opp.h"
 32#include "inc/hw/link_encoder.h"
 33#include "core_status.h"
 34
 35enum vline_select {
 36	VLINE0,
 37	VLINE1
 38};
 39
 40struct pipe_ctx;
 41struct dc_state;
 42struct dc_stream_status;
 43struct dc_writeback_info;
 44struct dchub_init_data;
 45struct dc_static_screen_params;
 46struct resource_pool;
 47struct dc_phy_addr_space_config;
 48struct dc_virtual_addr_space_config;
 49struct dpp;
 50struct dce_hwseq;
 51
 52struct hw_sequencer_funcs {
 53	void (*hardware_release)(struct dc *dc);
 54	/* Embedded Display Related */
 55	void (*edp_power_control)(struct dc_link *link, bool enable);
 56	void (*edp_wait_for_hpd_ready)(struct dc_link *link, bool power_up);
 57	void (*edp_wait_for_T12)(struct dc_link *link);
 58
 59	/* Pipe Programming Related */
 60	void (*init_hw)(struct dc *dc);
 61	void (*power_down_on_boot)(struct dc *dc);
 62	void (*enable_accelerated_mode)(struct dc *dc,
 63			struct dc_state *context);
 64	enum dc_status (*apply_ctx_to_hw)(struct dc *dc,
 65			struct dc_state *context);
 66	void (*disable_plane)(struct dc *dc, struct pipe_ctx *pipe_ctx);
 67	void (*apply_ctx_for_surface)(struct dc *dc,
 68			const struct dc_stream_state *stream,
 69			int num_planes, struct dc_state *context);
 70	void (*program_front_end_for_ctx)(struct dc *dc,
 71			struct dc_state *context);
 72	void (*wait_for_pending_cleared)(struct dc *dc,
 73			struct dc_state *context);
 74	void (*post_unlock_program_front_end)(struct dc *dc,
 75			struct dc_state *context);
 76	void (*update_plane_addr)(const struct dc *dc,
 77			struct pipe_ctx *pipe_ctx);
 78	void (*update_dchub)(struct dce_hwseq *hws,
 79			struct dchub_init_data *dh_data);
 80	void (*wait_for_mpcc_disconnect)(struct dc *dc,
 81			struct resource_pool *res_pool,
 82			struct pipe_ctx *pipe_ctx);
 83	void (*edp_backlight_control)(
 84			struct dc_link *link,
 85			bool enable);
 86	void (*program_triplebuffer)(const struct dc *dc,
 87		struct pipe_ctx *pipe_ctx, bool enableTripleBuffer);
 88	void (*update_pending_status)(struct pipe_ctx *pipe_ctx);
 89	void (*power_down)(struct dc *dc);
 90
 91	/* Pipe Lock Related */
 92	void (*pipe_control_lock)(struct dc *dc,
 93			struct pipe_ctx *pipe, bool lock);
 94	void (*interdependent_update_lock)(struct dc *dc,
 95			struct dc_state *context, bool lock);
 96	void (*set_flip_control_gsl)(struct pipe_ctx *pipe_ctx,
 97			bool flip_immediate);
 98	void (*cursor_lock)(struct dc *dc, struct pipe_ctx *pipe, bool lock);
 99
100	/* Timing Related */
101	void (*get_position)(struct pipe_ctx **pipe_ctx, int num_pipes,
102			struct crtc_position *position);
103	int (*get_vupdate_offset_from_vsync)(struct pipe_ctx *pipe_ctx);
104	void (*calc_vupdate_position)(
105			struct dc *dc,
106			struct pipe_ctx *pipe_ctx,
107			uint32_t *start_line,
108			uint32_t *end_line);
109	void (*enable_per_frame_crtc_position_reset)(struct dc *dc,
110			int group_size, struct pipe_ctx *grouped_pipes[]);
111	void (*enable_timing_synchronization)(struct dc *dc,
112			int group_index, int group_size,
113			struct pipe_ctx *grouped_pipes[]);
114	void (*enable_vblanks_synchronization)(struct dc *dc,
115			int group_index, int group_size,
116			struct pipe_ctx *grouped_pipes[]);
117	void (*setup_periodic_interrupt)(struct dc *dc,
118			struct pipe_ctx *pipe_ctx,
119			enum vline_select vline);
120	void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes,
121			struct dc_crtc_timing_adjust adjust);
122	void (*set_static_screen_control)(struct pipe_ctx **pipe_ctx,
123			int num_pipes,
124			const struct dc_static_screen_params *events);
125#ifndef TRIM_FSFT
126	bool (*optimize_timing_for_fsft)(struct dc *dc,
127			struct dc_crtc_timing *timing,
128			unsigned int max_input_rate_in_khz);
129#endif
130
131	/* Stream Related */
132	void (*enable_stream)(struct pipe_ctx *pipe_ctx);
133	void (*disable_stream)(struct pipe_ctx *pipe_ctx);
134	void (*blank_stream)(struct pipe_ctx *pipe_ctx);
135	void (*unblank_stream)(struct pipe_ctx *pipe_ctx,
136			struct dc_link_settings *link_settings);
137
138	/* Bandwidth Related */
139	void (*prepare_bandwidth)(struct dc *dc, struct dc_state *context);
140	bool (*update_bandwidth)(struct dc *dc, struct dc_state *context);
141	void (*optimize_bandwidth)(struct dc *dc, struct dc_state *context);
142
143	/* Infopacket Related */
144	void (*set_avmute)(struct pipe_ctx *pipe_ctx, bool enable);
145	void (*send_immediate_sdp_message)(
146			struct pipe_ctx *pipe_ctx,
147			const uint8_t *custom_sdp_message,
148			unsigned int sdp_message_size);
149	void (*update_info_frame)(struct pipe_ctx *pipe_ctx);
150	void (*set_dmdata_attributes)(struct pipe_ctx *pipe);
151	void (*program_dmdata_engine)(struct pipe_ctx *pipe_ctx);
152	bool (*dmdata_status_done)(struct pipe_ctx *pipe_ctx);
153
154	/* Cursor Related */
155	void (*set_cursor_position)(struct pipe_ctx *pipe);
156	void (*set_cursor_attribute)(struct pipe_ctx *pipe);
157	void (*set_cursor_sdr_white_level)(struct pipe_ctx *pipe);
158
159	/* Colour Related */
160	void (*program_gamut_remap)(struct pipe_ctx *pipe_ctx);
161	void (*program_output_csc)(struct dc *dc, struct pipe_ctx *pipe_ctx,
162			enum dc_color_space colorspace,
163			uint16_t *matrix, int opp_id);
164
165	/* VM Related */
166	int (*init_sys_ctx)(struct dce_hwseq *hws,
167			struct dc *dc,
168			struct dc_phy_addr_space_config *pa_config);
169	void (*init_vm_ctx)(struct dce_hwseq *hws,
170			struct dc *dc,
171			struct dc_virtual_addr_space_config *va_config,
172			int vmid);
173
174	/* Writeback Related */
175	void (*update_writeback)(struct dc *dc,
176			struct dc_writeback_info *wb_info,
177			struct dc_state *context);
178	void (*enable_writeback)(struct dc *dc,
179			struct dc_writeback_info *wb_info,
180			struct dc_state *context);
181	void (*disable_writeback)(struct dc *dc,
182			unsigned int dwb_pipe_inst);
183
184	bool (*mmhubbub_warmup)(struct dc *dc,
185			unsigned int num_dwb,
186			struct dc_writeback_info *wb_info);
187
188	/* Clock Related */
189	enum dc_status (*set_clock)(struct dc *dc,
190			enum dc_clock_type clock_type,
191			uint32_t clk_khz, uint32_t stepping);
192	void (*get_clock)(struct dc *dc, enum dc_clock_type clock_type,
193			struct dc_clock_config *clock_cfg);
194	void (*optimize_pwr_state)(const struct dc *dc,
195			struct dc_state *context);
196	void (*exit_optimized_pwr_state)(const struct dc *dc,
197			struct dc_state *context);
198
199	/* Audio Related */
200	void (*enable_audio_stream)(struct pipe_ctx *pipe_ctx);
201	void (*disable_audio_stream)(struct pipe_ctx *pipe_ctx);
202
203	/* Stereo 3D Related */
204	void (*setup_stereo)(struct pipe_ctx *pipe_ctx, struct dc *dc);
205
206	/* HW State Logging Related */
207	void (*log_hw_state)(struct dc *dc, struct dc_log_buffer_ctx *log_ctx);
208	void (*get_hw_state)(struct dc *dc, char *pBuf,
209			unsigned int bufSize, unsigned int mask);
210	void (*clear_status_bits)(struct dc *dc, unsigned int mask);
211
212	bool (*set_backlight_level)(struct pipe_ctx *pipe_ctx,
213			uint32_t backlight_pwm_u16_16,
214			uint32_t frame_ramp);
215
216	void (*set_abm_immediate_disable)(struct pipe_ctx *pipe_ctx);
217
218	void (*set_pipe)(struct pipe_ctx *pipe_ctx);
219
220	void (*get_dcc_en_bits)(struct dc *dc, int *dcc_en_bits);
221
222	/* Idle Optimization Related */
223	bool (*apply_idle_power_optimizations)(struct dc *dc, bool enable);
224
225	bool (*does_plane_fit_in_mall)(struct dc *dc, struct dc_plane_state *plane,
226			struct dc_cursor_attributes *cursor_attr);
227
228	bool (*is_abm_supported)(struct dc *dc,
229			struct dc_state *context, struct dc_stream_state *stream);
230
231	void (*set_disp_pattern_generator)(const struct dc *dc,
232			struct pipe_ctx *pipe_ctx,
233			enum controller_dp_test_pattern test_pattern,
234			enum controller_dp_color_space color_space,
235			enum dc_color_depth color_depth,
236			const struct tg_color *solid_color,
237			int width, int height, int offset);
238
239	void (*z10_restore)(struct dc *dc);
240	void (*z10_save_init)(struct dc *dc);
241
242	void (*update_visual_confirm_color)(struct dc *dc,
243			struct pipe_ctx *pipe_ctx,
244			struct tg_color *color,
245			int mpcc_id);
246};
247
248void color_space_to_black_color(
249	const struct dc *dc,
250	enum dc_color_space colorspace,
251	struct tg_color *black_color);
252
253bool hwss_wait_for_blank_complete(
254		struct timing_generator *tg);
255
256const uint16_t *find_color_matrix(
257		enum dc_color_space color_space,
258		uint32_t *array_size);
259
260void get_surface_visual_confirm_color(
261		const struct pipe_ctx *pipe_ctx,
262		struct tg_color *color);
263
264void get_hdr_visual_confirm_color(
265		struct pipe_ctx *pipe_ctx,
266		struct tg_color *color);
267void get_mpctree_visual_confirm_color(
268		struct pipe_ctx *pipe_ctx,
269		struct tg_color *color);
270void get_surface_tile_visual_confirm_color(
271		struct pipe_ctx *pipe_ctx,
272		struct tg_color *color);
273#endif /* __DC_HW_SEQUENCER_H__ */