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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * ASIX AX88179/178A USB 3.0/2.0 to Gigabit Ethernet Devices
4 *
5 * Copyright (C) 2011-2013 ASIX
6 */
7
8#include <linux/module.h>
9#include <linux/etherdevice.h>
10#include <linux/mii.h>
11#include <linux/usb.h>
12#include <linux/crc32.h>
13#include <linux/usb/usbnet.h>
14#include <uapi/linux/mdio.h>
15#include <linux/mdio.h>
16
17#define AX88179_PHY_ID 0x03
18#define AX_EEPROM_LEN 0x100
19#define AX88179_EEPROM_MAGIC 0x17900b95
20#define AX_MCAST_FLTSIZE 8
21#define AX_MAX_MCAST 64
22#define AX_INT_PPLS_LINK ((u32)BIT(16))
23#define AX_RXHDR_L4_TYPE_MASK 0x1c
24#define AX_RXHDR_L4_TYPE_UDP 4
25#define AX_RXHDR_L4_TYPE_TCP 16
26#define AX_RXHDR_L3CSUM_ERR 2
27#define AX_RXHDR_L4CSUM_ERR 1
28#define AX_RXHDR_CRC_ERR ((u32)BIT(29))
29#define AX_RXHDR_DROP_ERR ((u32)BIT(31))
30#define AX_ACCESS_MAC 0x01
31#define AX_ACCESS_PHY 0x02
32#define AX_ACCESS_EEPROM 0x04
33#define AX_ACCESS_EFUS 0x05
34#define AX_RELOAD_EEPROM_EFUSE 0x06
35#define AX_PAUSE_WATERLVL_HIGH 0x54
36#define AX_PAUSE_WATERLVL_LOW 0x55
37
38#define PHYSICAL_LINK_STATUS 0x02
39 #define AX_USB_SS 0x04
40 #define AX_USB_HS 0x02
41
42#define GENERAL_STATUS 0x03
43/* Check AX88179 version. UA1:Bit2 = 0, UA2:Bit2 = 1 */
44 #define AX_SECLD 0x04
45
46#define AX_SROM_ADDR 0x07
47#define AX_SROM_CMD 0x0a
48 #define EEP_RD 0x04
49 #define EEP_BUSY 0x10
50
51#define AX_SROM_DATA_LOW 0x08
52#define AX_SROM_DATA_HIGH 0x09
53
54#define AX_RX_CTL 0x0b
55 #define AX_RX_CTL_DROPCRCERR 0x0100
56 #define AX_RX_CTL_IPE 0x0200
57 #define AX_RX_CTL_START 0x0080
58 #define AX_RX_CTL_AP 0x0020
59 #define AX_RX_CTL_AM 0x0010
60 #define AX_RX_CTL_AB 0x0008
61 #define AX_RX_CTL_AMALL 0x0002
62 #define AX_RX_CTL_PRO 0x0001
63 #define AX_RX_CTL_STOP 0x0000
64
65#define AX_NODE_ID 0x10
66#define AX_MULFLTARY 0x16
67
68#define AX_MEDIUM_STATUS_MODE 0x22
69 #define AX_MEDIUM_GIGAMODE 0x01
70 #define AX_MEDIUM_FULL_DUPLEX 0x02
71 #define AX_MEDIUM_EN_125MHZ 0x08
72 #define AX_MEDIUM_RXFLOW_CTRLEN 0x10
73 #define AX_MEDIUM_TXFLOW_CTRLEN 0x20
74 #define AX_MEDIUM_RECEIVE_EN 0x100
75 #define AX_MEDIUM_PS 0x200
76 #define AX_MEDIUM_JUMBO_EN 0x8040
77
78#define AX_MONITOR_MOD 0x24
79 #define AX_MONITOR_MODE_RWLC 0x02
80 #define AX_MONITOR_MODE_RWMP 0x04
81 #define AX_MONITOR_MODE_PMEPOL 0x20
82 #define AX_MONITOR_MODE_PMETYPE 0x40
83
84#define AX_GPIO_CTRL 0x25
85 #define AX_GPIO_CTRL_GPIO3EN 0x80
86 #define AX_GPIO_CTRL_GPIO2EN 0x40
87 #define AX_GPIO_CTRL_GPIO1EN 0x20
88
89#define AX_PHYPWR_RSTCTL 0x26
90 #define AX_PHYPWR_RSTCTL_BZ 0x0010
91 #define AX_PHYPWR_RSTCTL_IPRL 0x0020
92 #define AX_PHYPWR_RSTCTL_AT 0x1000
93
94#define AX_RX_BULKIN_QCTRL 0x2e
95#define AX_CLK_SELECT 0x33
96 #define AX_CLK_SELECT_BCS 0x01
97 #define AX_CLK_SELECT_ACS 0x02
98 #define AX_CLK_SELECT_ULR 0x08
99
100#define AX_RXCOE_CTL 0x34
101 #define AX_RXCOE_IP 0x01
102 #define AX_RXCOE_TCP 0x02
103 #define AX_RXCOE_UDP 0x04
104 #define AX_RXCOE_TCPV6 0x20
105 #define AX_RXCOE_UDPV6 0x40
106
107#define AX_TXCOE_CTL 0x35
108 #define AX_TXCOE_IP 0x01
109 #define AX_TXCOE_TCP 0x02
110 #define AX_TXCOE_UDP 0x04
111 #define AX_TXCOE_TCPV6 0x20
112 #define AX_TXCOE_UDPV6 0x40
113
114#define AX_LEDCTRL 0x73
115
116#define GMII_PHY_PHYSR 0x11
117 #define GMII_PHY_PHYSR_SMASK 0xc000
118 #define GMII_PHY_PHYSR_GIGA 0x8000
119 #define GMII_PHY_PHYSR_100 0x4000
120 #define GMII_PHY_PHYSR_FULL 0x2000
121 #define GMII_PHY_PHYSR_LINK 0x400
122
123#define GMII_LED_ACT 0x1a
124 #define GMII_LED_ACTIVE_MASK 0xff8f
125 #define GMII_LED0_ACTIVE BIT(4)
126 #define GMII_LED1_ACTIVE BIT(5)
127 #define GMII_LED2_ACTIVE BIT(6)
128
129#define GMII_LED_LINK 0x1c
130 #define GMII_LED_LINK_MASK 0xf888
131 #define GMII_LED0_LINK_10 BIT(0)
132 #define GMII_LED0_LINK_100 BIT(1)
133 #define GMII_LED0_LINK_1000 BIT(2)
134 #define GMII_LED1_LINK_10 BIT(4)
135 #define GMII_LED1_LINK_100 BIT(5)
136 #define GMII_LED1_LINK_1000 BIT(6)
137 #define GMII_LED2_LINK_10 BIT(8)
138 #define GMII_LED2_LINK_100 BIT(9)
139 #define GMII_LED2_LINK_1000 BIT(10)
140 #define LED0_ACTIVE BIT(0)
141 #define LED0_LINK_10 BIT(1)
142 #define LED0_LINK_100 BIT(2)
143 #define LED0_LINK_1000 BIT(3)
144 #define LED0_FD BIT(4)
145 #define LED0_USB3_MASK 0x001f
146 #define LED1_ACTIVE BIT(5)
147 #define LED1_LINK_10 BIT(6)
148 #define LED1_LINK_100 BIT(7)
149 #define LED1_LINK_1000 BIT(8)
150 #define LED1_FD BIT(9)
151 #define LED1_USB3_MASK 0x03e0
152 #define LED2_ACTIVE BIT(10)
153 #define LED2_LINK_1000 BIT(13)
154 #define LED2_LINK_100 BIT(12)
155 #define LED2_LINK_10 BIT(11)
156 #define LED2_FD BIT(14)
157 #define LED_VALID BIT(15)
158 #define LED2_USB3_MASK 0x7c00
159
160#define GMII_PHYPAGE 0x1e
161#define GMII_PHY_PAGE_SELECT 0x1f
162 #define GMII_PHY_PGSEL_EXT 0x0007
163 #define GMII_PHY_PGSEL_PAGE0 0x0000
164 #define GMII_PHY_PGSEL_PAGE3 0x0003
165 #define GMII_PHY_PGSEL_PAGE5 0x0005
166
167static int ax88179_reset(struct usbnet *dev);
168
169struct ax88179_data {
170 u8 eee_enabled;
171 u8 eee_active;
172 u16 rxctl;
173 u8 in_pm;
174 u32 wol_supported;
175 u32 wolopts;
176 u8 disconnecting;
177 u8 initialized;
178};
179
180struct ax88179_int_data {
181 __le32 intdata1;
182 __le32 intdata2;
183};
184
185static const struct {
186 unsigned char ctrl, timer_l, timer_h, size, ifg;
187} AX88179_BULKIN_SIZE[] = {
188 {7, 0x4f, 0, 0x12, 0xff},
189 {7, 0x20, 3, 0x16, 0xff},
190 {7, 0xae, 7, 0x18, 0xff},
191 {7, 0xcc, 0x4c, 0x18, 8},
192};
193
194static void ax88179_set_pm_mode(struct usbnet *dev, bool pm_mode)
195{
196 struct ax88179_data *ax179_data = dev->driver_priv;
197
198 ax179_data->in_pm = pm_mode;
199}
200
201static int ax88179_in_pm(struct usbnet *dev)
202{
203 struct ax88179_data *ax179_data = dev->driver_priv;
204
205 return ax179_data->in_pm;
206}
207
208static int __ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
209 u16 size, void *data)
210{
211 int ret;
212 int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
213 struct ax88179_data *ax179_data = dev->driver_priv;
214
215 BUG_ON(!dev);
216
217 if (!ax88179_in_pm(dev))
218 fn = usbnet_read_cmd;
219 else
220 fn = usbnet_read_cmd_nopm;
221
222 ret = fn(dev, cmd, USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
223 value, index, data, size);
224
225 if (unlikely((ret < 0) && !(ret == -ENODEV && ax179_data->disconnecting)))
226 netdev_warn(dev->net, "Failed to read reg index 0x%04x: %d\n",
227 index, ret);
228
229 return ret;
230}
231
232static int __ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
233 u16 size, const void *data)
234{
235 int ret;
236 int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
237 struct ax88179_data *ax179_data = dev->driver_priv;
238
239 BUG_ON(!dev);
240
241 if (!ax88179_in_pm(dev))
242 fn = usbnet_write_cmd;
243 else
244 fn = usbnet_write_cmd_nopm;
245
246 ret = fn(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
247 value, index, data, size);
248
249 if (unlikely((ret < 0) && !(ret == -ENODEV && ax179_data->disconnecting)))
250 netdev_warn(dev->net, "Failed to write reg index 0x%04x: %d\n",
251 index, ret);
252
253 return ret;
254}
255
256static void ax88179_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value,
257 u16 index, u16 size, void *data)
258{
259 u16 buf;
260
261 if (2 == size) {
262 buf = *((u16 *)data);
263 cpu_to_le16s(&buf);
264 usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
265 USB_RECIP_DEVICE, value, index, &buf,
266 size);
267 } else {
268 usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
269 USB_RECIP_DEVICE, value, index, data,
270 size);
271 }
272}
273
274static int ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
275 u16 size, void *data)
276{
277 int ret;
278
279 if (2 == size) {
280 u16 buf = 0;
281 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf);
282 le16_to_cpus(&buf);
283 *((u16 *)data) = buf;
284 } else if (4 == size) {
285 u32 buf = 0;
286 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf);
287 le32_to_cpus(&buf);
288 *((u32 *)data) = buf;
289 } else {
290 ret = __ax88179_read_cmd(dev, cmd, value, index, size, data);
291 }
292
293 return ret;
294}
295
296static int ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
297 u16 size, const void *data)
298{
299 int ret;
300
301 if (2 == size) {
302 u16 buf;
303 buf = *((u16 *)data);
304 cpu_to_le16s(&buf);
305 ret = __ax88179_write_cmd(dev, cmd, value, index,
306 size, &buf);
307 } else {
308 ret = __ax88179_write_cmd(dev, cmd, value, index,
309 size, data);
310 }
311
312 return ret;
313}
314
315static void ax88179_status(struct usbnet *dev, struct urb *urb)
316{
317 struct ax88179_int_data *event;
318 u32 link;
319
320 if (urb->actual_length < 8)
321 return;
322
323 event = urb->transfer_buffer;
324 le32_to_cpus((void *)&event->intdata1);
325
326 link = (((__force u32)event->intdata1) & AX_INT_PPLS_LINK) >> 16;
327
328 if (netif_carrier_ok(dev->net) != link) {
329 usbnet_link_change(dev, link, 1);
330 netdev_info(dev->net, "ax88179 - Link status is: %d\n", link);
331 }
332}
333
334static int ax88179_mdio_read(struct net_device *netdev, int phy_id, int loc)
335{
336 struct usbnet *dev = netdev_priv(netdev);
337 u16 res;
338
339 ax88179_read_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
340 return res;
341}
342
343static void ax88179_mdio_write(struct net_device *netdev, int phy_id, int loc,
344 int val)
345{
346 struct usbnet *dev = netdev_priv(netdev);
347 u16 res = (u16) val;
348
349 ax88179_write_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
350}
351
352static inline int ax88179_phy_mmd_indirect(struct usbnet *dev, u16 prtad,
353 u16 devad)
354{
355 u16 tmp16;
356 int ret;
357
358 tmp16 = devad;
359 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
360 MII_MMD_CTRL, 2, &tmp16);
361
362 tmp16 = prtad;
363 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
364 MII_MMD_DATA, 2, &tmp16);
365
366 tmp16 = devad | MII_MMD_CTRL_NOINCR;
367 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
368 MII_MMD_CTRL, 2, &tmp16);
369
370 return ret;
371}
372
373static int
374ax88179_phy_read_mmd_indirect(struct usbnet *dev, u16 prtad, u16 devad)
375{
376 int ret;
377 u16 tmp16;
378
379 ax88179_phy_mmd_indirect(dev, prtad, devad);
380
381 ret = ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
382 MII_MMD_DATA, 2, &tmp16);
383 if (ret < 0)
384 return ret;
385
386 return tmp16;
387}
388
389static int
390ax88179_phy_write_mmd_indirect(struct usbnet *dev, u16 prtad, u16 devad,
391 u16 data)
392{
393 int ret;
394
395 ax88179_phy_mmd_indirect(dev, prtad, devad);
396
397 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
398 MII_MMD_DATA, 2, &data);
399
400 if (ret < 0)
401 return ret;
402
403 return 0;
404}
405
406static int ax88179_suspend(struct usb_interface *intf, pm_message_t message)
407{
408 struct usbnet *dev = usb_get_intfdata(intf);
409 struct ax88179_data *priv = dev->driver_priv;
410 u16 tmp16;
411 u8 tmp8;
412
413 ax88179_set_pm_mode(dev, true);
414
415 usbnet_suspend(intf, message);
416
417 /* Enable WoL */
418 if (priv->wolopts) {
419 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
420 1, 1, &tmp8);
421 if (priv->wolopts & WAKE_PHY)
422 tmp8 |= AX_MONITOR_MODE_RWLC;
423 if (priv->wolopts & WAKE_MAGIC)
424 tmp8 |= AX_MONITOR_MODE_RWMP;
425
426 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
427 1, 1, &tmp8);
428 }
429
430 /* Disable RX path */
431 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
432 2, 2, &tmp16);
433 tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
434 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
435 2, 2, &tmp16);
436
437 /* Force bulk-in zero length */
438 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
439 2, 2, &tmp16);
440
441 tmp16 |= AX_PHYPWR_RSTCTL_BZ | AX_PHYPWR_RSTCTL_IPRL;
442 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
443 2, 2, &tmp16);
444
445 /* change clock */
446 tmp8 = 0;
447 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
448
449 /* Configure RX control register => stop operation */
450 tmp16 = AX_RX_CTL_STOP;
451 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
452
453 ax88179_set_pm_mode(dev, false);
454
455 return 0;
456}
457
458/* This function is used to enable the autodetach function. */
459/* This function is determined by offset 0x43 of EEPROM */
460static int ax88179_auto_detach(struct usbnet *dev)
461{
462 u16 tmp16;
463 u8 tmp8;
464
465 if (ax88179_read_cmd(dev, AX_ACCESS_EEPROM, 0x43, 1, 2, &tmp16) < 0)
466 return 0;
467
468 if ((tmp16 == 0xFFFF) || (!(tmp16 & 0x0100)))
469 return 0;
470
471 /* Enable Auto Detach bit */
472 tmp8 = 0;
473 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
474 tmp8 |= AX_CLK_SELECT_ULR;
475 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
476
477 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
478 tmp16 |= AX_PHYPWR_RSTCTL_AT;
479 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
480
481 return 0;
482}
483
484static int ax88179_resume(struct usb_interface *intf)
485{
486 struct usbnet *dev = usb_get_intfdata(intf);
487
488 ax88179_set_pm_mode(dev, true);
489
490 usbnet_link_change(dev, 0, 0);
491
492 ax88179_reset(dev);
493
494 ax88179_set_pm_mode(dev, false);
495
496 return usbnet_resume(intf);
497}
498
499static void ax88179_disconnect(struct usb_interface *intf)
500{
501 struct usbnet *dev = usb_get_intfdata(intf);
502 struct ax88179_data *ax179_data;
503
504 if (!dev)
505 return;
506
507 ax179_data = dev->driver_priv;
508 ax179_data->disconnecting = 1;
509
510 usbnet_disconnect(intf);
511}
512
513static void
514ax88179_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
515{
516 struct usbnet *dev = netdev_priv(net);
517 struct ax88179_data *priv = dev->driver_priv;
518
519 wolinfo->supported = priv->wol_supported;
520 wolinfo->wolopts = priv->wolopts;
521}
522
523static int
524ax88179_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
525{
526 struct usbnet *dev = netdev_priv(net);
527 struct ax88179_data *priv = dev->driver_priv;
528
529 if (wolinfo->wolopts & ~(priv->wol_supported))
530 return -EINVAL;
531
532 priv->wolopts = wolinfo->wolopts;
533
534 return 0;
535}
536
537static int ax88179_get_eeprom_len(struct net_device *net)
538{
539 return AX_EEPROM_LEN;
540}
541
542static int
543ax88179_get_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,
544 u8 *data)
545{
546 struct usbnet *dev = netdev_priv(net);
547 u16 *eeprom_buff;
548 int first_word, last_word;
549 int i, ret;
550
551 if (eeprom->len == 0)
552 return -EINVAL;
553
554 eeprom->magic = AX88179_EEPROM_MAGIC;
555
556 first_word = eeprom->offset >> 1;
557 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
558 eeprom_buff = kmalloc_array(last_word - first_word + 1, sizeof(u16),
559 GFP_KERNEL);
560 if (!eeprom_buff)
561 return -ENOMEM;
562
563 /* ax88179/178A returns 2 bytes from eeprom on read */
564 for (i = first_word; i <= last_word; i++) {
565 ret = __ax88179_read_cmd(dev, AX_ACCESS_EEPROM, i, 1, 2,
566 &eeprom_buff[i - first_word]);
567 if (ret < 0) {
568 kfree(eeprom_buff);
569 return -EIO;
570 }
571 }
572
573 memcpy(data, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
574 kfree(eeprom_buff);
575 return 0;
576}
577
578static int
579ax88179_set_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,
580 u8 *data)
581{
582 struct usbnet *dev = netdev_priv(net);
583 u16 *eeprom_buff;
584 int first_word;
585 int last_word;
586 int ret;
587 int i;
588
589 netdev_dbg(net, "write EEPROM len %d, offset %d, magic 0x%x\n",
590 eeprom->len, eeprom->offset, eeprom->magic);
591
592 if (eeprom->len == 0)
593 return -EINVAL;
594
595 if (eeprom->magic != AX88179_EEPROM_MAGIC)
596 return -EINVAL;
597
598 first_word = eeprom->offset >> 1;
599 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
600
601 eeprom_buff = kmalloc_array(last_word - first_word + 1, sizeof(u16),
602 GFP_KERNEL);
603 if (!eeprom_buff)
604 return -ENOMEM;
605
606 /* align data to 16 bit boundaries, read the missing data from
607 the EEPROM */
608 if (eeprom->offset & 1) {
609 ret = ax88179_read_cmd(dev, AX_ACCESS_EEPROM, first_word, 1, 2,
610 &eeprom_buff[0]);
611 if (ret < 0) {
612 netdev_err(net, "Failed to read EEPROM at offset 0x%02x.\n", first_word);
613 goto free;
614 }
615 }
616
617 if ((eeprom->offset + eeprom->len) & 1) {
618 ret = ax88179_read_cmd(dev, AX_ACCESS_EEPROM, last_word, 1, 2,
619 &eeprom_buff[last_word - first_word]);
620 if (ret < 0) {
621 netdev_err(net, "Failed to read EEPROM at offset 0x%02x.\n", last_word);
622 goto free;
623 }
624 }
625
626 memcpy((u8 *)eeprom_buff + (eeprom->offset & 1), data, eeprom->len);
627
628 for (i = first_word; i <= last_word; i++) {
629 netdev_dbg(net, "write to EEPROM at offset 0x%02x, data 0x%04x\n",
630 i, eeprom_buff[i - first_word]);
631 ret = ax88179_write_cmd(dev, AX_ACCESS_EEPROM, i, 1, 2,
632 &eeprom_buff[i - first_word]);
633 if (ret < 0) {
634 netdev_err(net, "Failed to write EEPROM at offset 0x%02x.\n", i);
635 goto free;
636 }
637 msleep(20);
638 }
639
640 /* reload EEPROM data */
641 ret = ax88179_write_cmd(dev, AX_RELOAD_EEPROM_EFUSE, 0x0000, 0, 0, NULL);
642 if (ret < 0) {
643 netdev_err(net, "Failed to reload EEPROM data\n");
644 goto free;
645 }
646
647 ret = 0;
648free:
649 kfree(eeprom_buff);
650 return ret;
651}
652
653static int ax88179_get_link_ksettings(struct net_device *net,
654 struct ethtool_link_ksettings *cmd)
655{
656 struct usbnet *dev = netdev_priv(net);
657
658 mii_ethtool_get_link_ksettings(&dev->mii, cmd);
659
660 return 0;
661}
662
663static int ax88179_set_link_ksettings(struct net_device *net,
664 const struct ethtool_link_ksettings *cmd)
665{
666 struct usbnet *dev = netdev_priv(net);
667 return mii_ethtool_set_link_ksettings(&dev->mii, cmd);
668}
669
670static int
671ax88179_ethtool_get_eee(struct usbnet *dev, struct ethtool_keee *data)
672{
673 int val;
674
675 /* Get Supported EEE */
676 val = ax88179_phy_read_mmd_indirect(dev, MDIO_PCS_EEE_ABLE,
677 MDIO_MMD_PCS);
678 if (val < 0)
679 return val;
680 mii_eee_cap1_mod_linkmode_t(data->supported, val);
681
682 /* Get advertisement EEE */
683 val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_ADV,
684 MDIO_MMD_AN);
685 if (val < 0)
686 return val;
687 mii_eee_cap1_mod_linkmode_t(data->advertised, val);
688
689 /* Get LP advertisement EEE */
690 val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_LPABLE,
691 MDIO_MMD_AN);
692 if (val < 0)
693 return val;
694 mii_eee_cap1_mod_linkmode_t(data->lp_advertised, val);
695
696 return 0;
697}
698
699static int
700ax88179_ethtool_set_eee(struct usbnet *dev, struct ethtool_keee *data)
701{
702 u16 tmp16 = linkmode_to_mii_eee_cap1_t(data->advertised);
703
704 return ax88179_phy_write_mmd_indirect(dev, MDIO_AN_EEE_ADV,
705 MDIO_MMD_AN, tmp16);
706}
707
708static int ax88179_chk_eee(struct usbnet *dev)
709{
710 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
711 struct ax88179_data *priv = dev->driver_priv;
712
713 mii_ethtool_gset(&dev->mii, &ecmd);
714
715 if (ecmd.duplex & DUPLEX_FULL) {
716 int eee_lp, eee_cap, eee_adv;
717 u32 lp, cap, adv, supported = 0;
718
719 eee_cap = ax88179_phy_read_mmd_indirect(dev,
720 MDIO_PCS_EEE_ABLE,
721 MDIO_MMD_PCS);
722 if (eee_cap < 0) {
723 priv->eee_active = 0;
724 return false;
725 }
726
727 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
728 if (!cap) {
729 priv->eee_active = 0;
730 return false;
731 }
732
733 eee_lp = ax88179_phy_read_mmd_indirect(dev,
734 MDIO_AN_EEE_LPABLE,
735 MDIO_MMD_AN);
736 if (eee_lp < 0) {
737 priv->eee_active = 0;
738 return false;
739 }
740
741 eee_adv = ax88179_phy_read_mmd_indirect(dev,
742 MDIO_AN_EEE_ADV,
743 MDIO_MMD_AN);
744
745 if (eee_adv < 0) {
746 priv->eee_active = 0;
747 return false;
748 }
749
750 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
751 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
752 supported = (ecmd.speed == SPEED_1000) ?
753 SUPPORTED_1000baseT_Full :
754 SUPPORTED_100baseT_Full;
755
756 if (!(lp & adv & supported)) {
757 priv->eee_active = 0;
758 return false;
759 }
760
761 priv->eee_active = 1;
762 return true;
763 }
764
765 priv->eee_active = 0;
766 return false;
767}
768
769static void ax88179_disable_eee(struct usbnet *dev)
770{
771 u16 tmp16;
772
773 tmp16 = GMII_PHY_PGSEL_PAGE3;
774 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
775 GMII_PHY_PAGE_SELECT, 2, &tmp16);
776
777 tmp16 = 0x3246;
778 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
779 MII_PHYADDR, 2, &tmp16);
780
781 tmp16 = GMII_PHY_PGSEL_PAGE0;
782 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
783 GMII_PHY_PAGE_SELECT, 2, &tmp16);
784}
785
786static void ax88179_enable_eee(struct usbnet *dev)
787{
788 u16 tmp16;
789
790 tmp16 = GMII_PHY_PGSEL_PAGE3;
791 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
792 GMII_PHY_PAGE_SELECT, 2, &tmp16);
793
794 tmp16 = 0x3247;
795 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
796 MII_PHYADDR, 2, &tmp16);
797
798 tmp16 = GMII_PHY_PGSEL_PAGE5;
799 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
800 GMII_PHY_PAGE_SELECT, 2, &tmp16);
801
802 tmp16 = 0x0680;
803 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
804 MII_BMSR, 2, &tmp16);
805
806 tmp16 = GMII_PHY_PGSEL_PAGE0;
807 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
808 GMII_PHY_PAGE_SELECT, 2, &tmp16);
809}
810
811static int ax88179_get_eee(struct net_device *net, struct ethtool_keee *edata)
812{
813 struct usbnet *dev = netdev_priv(net);
814 struct ax88179_data *priv = dev->driver_priv;
815
816 edata->eee_enabled = priv->eee_enabled;
817 edata->eee_active = priv->eee_active;
818
819 return ax88179_ethtool_get_eee(dev, edata);
820}
821
822static int ax88179_set_eee(struct net_device *net, struct ethtool_keee *edata)
823{
824 struct usbnet *dev = netdev_priv(net);
825 struct ax88179_data *priv = dev->driver_priv;
826 int ret;
827
828 priv->eee_enabled = edata->eee_enabled;
829 if (!priv->eee_enabled) {
830 ax88179_disable_eee(dev);
831 } else {
832 priv->eee_enabled = ax88179_chk_eee(dev);
833 if (!priv->eee_enabled)
834 return -EOPNOTSUPP;
835
836 ax88179_enable_eee(dev);
837 }
838
839 ret = ax88179_ethtool_set_eee(dev, edata);
840 if (ret)
841 return ret;
842
843 mii_nway_restart(&dev->mii);
844
845 usbnet_link_change(dev, 0, 0);
846
847 return ret;
848}
849
850static int ax88179_ioctl(struct net_device *net, struct ifreq *rq, int cmd)
851{
852 struct usbnet *dev = netdev_priv(net);
853 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
854}
855
856static const struct ethtool_ops ax88179_ethtool_ops = {
857 .get_link = ethtool_op_get_link,
858 .get_msglevel = usbnet_get_msglevel,
859 .set_msglevel = usbnet_set_msglevel,
860 .get_wol = ax88179_get_wol,
861 .set_wol = ax88179_set_wol,
862 .get_eeprom_len = ax88179_get_eeprom_len,
863 .get_eeprom = ax88179_get_eeprom,
864 .set_eeprom = ax88179_set_eeprom,
865 .get_eee = ax88179_get_eee,
866 .set_eee = ax88179_set_eee,
867 .nway_reset = usbnet_nway_reset,
868 .get_link_ksettings = ax88179_get_link_ksettings,
869 .set_link_ksettings = ax88179_set_link_ksettings,
870 .get_ts_info = ethtool_op_get_ts_info,
871};
872
873static void ax88179_set_multicast(struct net_device *net)
874{
875 struct usbnet *dev = netdev_priv(net);
876 struct ax88179_data *data = dev->driver_priv;
877 u8 *m_filter = ((u8 *)dev->data);
878
879 data->rxctl = (AX_RX_CTL_START | AX_RX_CTL_AB | AX_RX_CTL_IPE);
880
881 if (net->flags & IFF_PROMISC) {
882 data->rxctl |= AX_RX_CTL_PRO;
883 } else if (net->flags & IFF_ALLMULTI ||
884 netdev_mc_count(net) > AX_MAX_MCAST) {
885 data->rxctl |= AX_RX_CTL_AMALL;
886 } else if (netdev_mc_empty(net)) {
887 /* just broadcast and directed */
888 } else {
889 /* We use dev->data for our 8 byte filter buffer
890 * to avoid allocating memory that is tricky to free later
891 */
892 u32 crc_bits;
893 struct netdev_hw_addr *ha;
894
895 memset(m_filter, 0, AX_MCAST_FLTSIZE);
896
897 netdev_for_each_mc_addr(ha, net) {
898 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
899 *(m_filter + (crc_bits >> 3)) |= (1 << (crc_bits & 7));
900 }
901
902 ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_MULFLTARY,
903 AX_MCAST_FLTSIZE, AX_MCAST_FLTSIZE,
904 m_filter);
905
906 data->rxctl |= AX_RX_CTL_AM;
907 }
908
909 ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_RX_CTL,
910 2, 2, &data->rxctl);
911}
912
913static int
914ax88179_set_features(struct net_device *net, netdev_features_t features)
915{
916 u8 tmp;
917 struct usbnet *dev = netdev_priv(net);
918 netdev_features_t changed = net->features ^ features;
919
920 if (changed & NETIF_F_IP_CSUM) {
921 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
922 tmp ^= AX_TXCOE_TCP | AX_TXCOE_UDP;
923 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
924 }
925
926 if (changed & NETIF_F_IPV6_CSUM) {
927 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
928 tmp ^= AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
929 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
930 }
931
932 if (changed & NETIF_F_RXCSUM) {
933 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
934 tmp ^= AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
935 AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
936 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
937 }
938
939 return 0;
940}
941
942static int ax88179_change_mtu(struct net_device *net, int new_mtu)
943{
944 struct usbnet *dev = netdev_priv(net);
945 u16 tmp16;
946
947 net->mtu = new_mtu;
948 dev->hard_mtu = net->mtu + net->hard_header_len;
949
950 if (net->mtu > 1500) {
951 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
952 2, 2, &tmp16);
953 tmp16 |= AX_MEDIUM_JUMBO_EN;
954 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
955 2, 2, &tmp16);
956 } else {
957 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
958 2, 2, &tmp16);
959 tmp16 &= ~AX_MEDIUM_JUMBO_EN;
960 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
961 2, 2, &tmp16);
962 }
963
964 /* max qlen depend on hard_mtu and rx_urb_size */
965 usbnet_update_max_qlen(dev);
966
967 return 0;
968}
969
970static int ax88179_set_mac_addr(struct net_device *net, void *p)
971{
972 struct usbnet *dev = netdev_priv(net);
973 struct sockaddr *addr = p;
974 int ret;
975
976 if (netif_running(net))
977 return -EBUSY;
978 if (!is_valid_ether_addr(addr->sa_data))
979 return -EADDRNOTAVAIL;
980
981 eth_hw_addr_set(net, addr->sa_data);
982
983 /* Set the MAC address */
984 ret = ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
985 ETH_ALEN, net->dev_addr);
986 if (ret < 0)
987 return ret;
988
989 return 0;
990}
991
992static const struct net_device_ops ax88179_netdev_ops = {
993 .ndo_open = usbnet_open,
994 .ndo_stop = usbnet_stop,
995 .ndo_start_xmit = usbnet_start_xmit,
996 .ndo_tx_timeout = usbnet_tx_timeout,
997 .ndo_get_stats64 = dev_get_tstats64,
998 .ndo_change_mtu = ax88179_change_mtu,
999 .ndo_set_mac_address = ax88179_set_mac_addr,
1000 .ndo_validate_addr = eth_validate_addr,
1001 .ndo_eth_ioctl = ax88179_ioctl,
1002 .ndo_set_rx_mode = ax88179_set_multicast,
1003 .ndo_set_features = ax88179_set_features,
1004};
1005
1006static int ax88179_check_eeprom(struct usbnet *dev)
1007{
1008 u8 i, buf, eeprom[20];
1009 u16 csum, delay = HZ / 10;
1010 unsigned long jtimeout;
1011
1012 /* Read EEPROM content */
1013 for (i = 0; i < 6; i++) {
1014 buf = i;
1015 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
1016 1, 1, &buf) < 0)
1017 return -EINVAL;
1018
1019 buf = EEP_RD;
1020 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1021 1, 1, &buf) < 0)
1022 return -EINVAL;
1023
1024 jtimeout = jiffies + delay;
1025 do {
1026 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1027 1, 1, &buf);
1028
1029 if (time_after(jiffies, jtimeout))
1030 return -EINVAL;
1031
1032 } while (buf & EEP_BUSY);
1033
1034 __ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
1035 2, 2, &eeprom[i * 2]);
1036
1037 if ((i == 0) && (eeprom[0] == 0xFF))
1038 return -EINVAL;
1039 }
1040
1041 csum = eeprom[6] + eeprom[7] + eeprom[8] + eeprom[9];
1042 csum = (csum >> 8) + (csum & 0xff);
1043 if ((csum + eeprom[10]) != 0xff)
1044 return -EINVAL;
1045
1046 return 0;
1047}
1048
1049static int ax88179_check_efuse(struct usbnet *dev, u16 *ledmode)
1050{
1051 u8 i;
1052 u8 efuse[64];
1053 u16 csum = 0;
1054
1055 if (ax88179_read_cmd(dev, AX_ACCESS_EFUS, 0, 64, 64, efuse) < 0)
1056 return -EINVAL;
1057
1058 if (*efuse == 0xFF)
1059 return -EINVAL;
1060
1061 for (i = 0; i < 64; i++)
1062 csum = csum + efuse[i];
1063
1064 while (csum > 255)
1065 csum = (csum & 0x00FF) + ((csum >> 8) & 0x00FF);
1066
1067 if (csum != 0xFF)
1068 return -EINVAL;
1069
1070 *ledmode = (efuse[51] << 8) | efuse[52];
1071
1072 return 0;
1073}
1074
1075static int ax88179_convert_old_led(struct usbnet *dev, u16 *ledvalue)
1076{
1077 u16 led;
1078
1079 /* Loaded the old eFuse LED Mode */
1080 if (ax88179_read_cmd(dev, AX_ACCESS_EEPROM, 0x3C, 1, 2, &led) < 0)
1081 return -EINVAL;
1082
1083 led >>= 8;
1084 switch (led) {
1085 case 0xFF:
1086 led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
1087 LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
1088 LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
1089 break;
1090 case 0xFE:
1091 led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 | LED_VALID;
1092 break;
1093 case 0xFD:
1094 led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 |
1095 LED2_LINK_10 | LED_VALID;
1096 break;
1097 case 0xFC:
1098 led = LED0_ACTIVE | LED1_ACTIVE | LED1_LINK_1000 | LED2_ACTIVE |
1099 LED2_LINK_100 | LED2_LINK_10 | LED_VALID;
1100 break;
1101 default:
1102 led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
1103 LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
1104 LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
1105 break;
1106 }
1107
1108 *ledvalue = led;
1109
1110 return 0;
1111}
1112
1113static int ax88179_led_setting(struct usbnet *dev)
1114{
1115 u8 ledfd, value = 0;
1116 u16 tmp, ledact, ledlink, ledvalue = 0, delay = HZ / 10;
1117 unsigned long jtimeout;
1118
1119 /* Check AX88179 version. UA1 or UA2*/
1120 ax88179_read_cmd(dev, AX_ACCESS_MAC, GENERAL_STATUS, 1, 1, &value);
1121
1122 if (!(value & AX_SECLD)) { /* UA1 */
1123 value = AX_GPIO_CTRL_GPIO3EN | AX_GPIO_CTRL_GPIO2EN |
1124 AX_GPIO_CTRL_GPIO1EN;
1125 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_GPIO_CTRL,
1126 1, 1, &value) < 0)
1127 return -EINVAL;
1128 }
1129
1130 /* Check EEPROM */
1131 if (!ax88179_check_eeprom(dev)) {
1132 value = 0x42;
1133 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
1134 1, 1, &value) < 0)
1135 return -EINVAL;
1136
1137 value = EEP_RD;
1138 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1139 1, 1, &value) < 0)
1140 return -EINVAL;
1141
1142 jtimeout = jiffies + delay;
1143 do {
1144 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1145 1, 1, &value);
1146
1147 if (time_after(jiffies, jtimeout))
1148 return -EINVAL;
1149
1150 } while (value & EEP_BUSY);
1151
1152 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_HIGH,
1153 1, 1, &value);
1154 ledvalue = (value << 8);
1155
1156 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
1157 1, 1, &value);
1158 ledvalue |= value;
1159
1160 /* load internal ROM for defaule setting */
1161 if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
1162 ax88179_convert_old_led(dev, &ledvalue);
1163
1164 } else if (!ax88179_check_efuse(dev, &ledvalue)) {
1165 if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
1166 ax88179_convert_old_led(dev, &ledvalue);
1167 } else {
1168 ax88179_convert_old_led(dev, &ledvalue);
1169 }
1170
1171 tmp = GMII_PHY_PGSEL_EXT;
1172 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1173 GMII_PHY_PAGE_SELECT, 2, &tmp);
1174
1175 tmp = 0x2c;
1176 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1177 GMII_PHYPAGE, 2, &tmp);
1178
1179 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1180 GMII_LED_ACT, 2, &ledact);
1181
1182 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1183 GMII_LED_LINK, 2, &ledlink);
1184
1185 ledact &= GMII_LED_ACTIVE_MASK;
1186 ledlink &= GMII_LED_LINK_MASK;
1187
1188 if (ledvalue & LED0_ACTIVE)
1189 ledact |= GMII_LED0_ACTIVE;
1190
1191 if (ledvalue & LED1_ACTIVE)
1192 ledact |= GMII_LED1_ACTIVE;
1193
1194 if (ledvalue & LED2_ACTIVE)
1195 ledact |= GMII_LED2_ACTIVE;
1196
1197 if (ledvalue & LED0_LINK_10)
1198 ledlink |= GMII_LED0_LINK_10;
1199
1200 if (ledvalue & LED1_LINK_10)
1201 ledlink |= GMII_LED1_LINK_10;
1202
1203 if (ledvalue & LED2_LINK_10)
1204 ledlink |= GMII_LED2_LINK_10;
1205
1206 if (ledvalue & LED0_LINK_100)
1207 ledlink |= GMII_LED0_LINK_100;
1208
1209 if (ledvalue & LED1_LINK_100)
1210 ledlink |= GMII_LED1_LINK_100;
1211
1212 if (ledvalue & LED2_LINK_100)
1213 ledlink |= GMII_LED2_LINK_100;
1214
1215 if (ledvalue & LED0_LINK_1000)
1216 ledlink |= GMII_LED0_LINK_1000;
1217
1218 if (ledvalue & LED1_LINK_1000)
1219 ledlink |= GMII_LED1_LINK_1000;
1220
1221 if (ledvalue & LED2_LINK_1000)
1222 ledlink |= GMII_LED2_LINK_1000;
1223
1224 tmp = ledact;
1225 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1226 GMII_LED_ACT, 2, &tmp);
1227
1228 tmp = ledlink;
1229 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1230 GMII_LED_LINK, 2, &tmp);
1231
1232 tmp = GMII_PHY_PGSEL_PAGE0;
1233 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1234 GMII_PHY_PAGE_SELECT, 2, &tmp);
1235
1236 /* LED full duplex setting */
1237 ledfd = 0;
1238 if (ledvalue & LED0_FD)
1239 ledfd |= 0x01;
1240 else if ((ledvalue & LED0_USB3_MASK) == 0)
1241 ledfd |= 0x02;
1242
1243 if (ledvalue & LED1_FD)
1244 ledfd |= 0x04;
1245 else if ((ledvalue & LED1_USB3_MASK) == 0)
1246 ledfd |= 0x08;
1247
1248 if (ledvalue & LED2_FD)
1249 ledfd |= 0x10;
1250 else if ((ledvalue & LED2_USB3_MASK) == 0)
1251 ledfd |= 0x20;
1252
1253 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_LEDCTRL, 1, 1, &ledfd);
1254
1255 return 0;
1256}
1257
1258static void ax88179_get_mac_addr(struct usbnet *dev)
1259{
1260 u8 mac[ETH_ALEN];
1261
1262 memset(mac, 0, sizeof(mac));
1263
1264 /* Maybe the boot loader passed the MAC address via device tree */
1265 if (!eth_platform_get_mac_address(&dev->udev->dev, mac)) {
1266 netif_dbg(dev, ifup, dev->net,
1267 "MAC address read from device tree");
1268 } else {
1269 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
1270 ETH_ALEN, mac);
1271 netif_dbg(dev, ifup, dev->net,
1272 "MAC address read from ASIX chip");
1273 }
1274
1275 if (is_valid_ether_addr(mac)) {
1276 eth_hw_addr_set(dev->net, mac);
1277 if (!is_local_ether_addr(mac))
1278 dev->net->addr_assign_type = NET_ADDR_PERM;
1279 } else {
1280 netdev_info(dev->net, "invalid MAC address, using random\n");
1281 eth_hw_addr_random(dev->net);
1282 }
1283
1284 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN, ETH_ALEN,
1285 dev->net->dev_addr);
1286}
1287
1288static int ax88179_bind(struct usbnet *dev, struct usb_interface *intf)
1289{
1290 struct ax88179_data *ax179_data;
1291
1292 usbnet_get_endpoints(dev, intf);
1293
1294 ax179_data = kzalloc(sizeof(*ax179_data), GFP_KERNEL);
1295 if (!ax179_data)
1296 return -ENOMEM;
1297
1298 dev->driver_priv = ax179_data;
1299
1300 dev->net->netdev_ops = &ax88179_netdev_ops;
1301 dev->net->ethtool_ops = &ax88179_ethtool_ops;
1302 dev->net->needed_headroom = 8;
1303 dev->net->max_mtu = 4088;
1304
1305 /* Initialize MII structure */
1306 dev->mii.dev = dev->net;
1307 dev->mii.mdio_read = ax88179_mdio_read;
1308 dev->mii.mdio_write = ax88179_mdio_write;
1309 dev->mii.phy_id_mask = 0xff;
1310 dev->mii.reg_num_mask = 0xff;
1311 dev->mii.phy_id = 0x03;
1312 dev->mii.supports_gmii = 1;
1313
1314 dev->net->features |= NETIF_F_SG | NETIF_F_IP_CSUM |
1315 NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM | NETIF_F_TSO;
1316
1317 dev->net->hw_features |= dev->net->features;
1318
1319 netif_set_tso_max_size(dev->net, 16384);
1320
1321 ax88179_reset(dev);
1322
1323 return 0;
1324}
1325
1326static void ax88179_unbind(struct usbnet *dev, struct usb_interface *intf)
1327{
1328 struct ax88179_data *ax179_data = dev->driver_priv;
1329 u16 tmp16;
1330
1331 /* Configure RX control register => stop operation */
1332 tmp16 = AX_RX_CTL_STOP;
1333 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
1334
1335 tmp16 = 0;
1336 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp16);
1337
1338 /* Power down ethernet PHY */
1339 tmp16 = 0;
1340 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
1341
1342 kfree(ax179_data);
1343}
1344
1345static void
1346ax88179_rx_checksum(struct sk_buff *skb, u32 *pkt_hdr)
1347{
1348 skb->ip_summed = CHECKSUM_NONE;
1349
1350 /* checksum error bit is set */
1351 if ((*pkt_hdr & AX_RXHDR_L3CSUM_ERR) ||
1352 (*pkt_hdr & AX_RXHDR_L4CSUM_ERR))
1353 return;
1354
1355 /* It must be a TCP or UDP packet with a valid checksum */
1356 if (((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_TCP) ||
1357 ((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_UDP))
1358 skb->ip_summed = CHECKSUM_UNNECESSARY;
1359}
1360
1361static int ax88179_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1362{
1363 struct sk_buff *ax_skb;
1364 int pkt_cnt;
1365 u32 rx_hdr;
1366 u16 hdr_off;
1367 u32 *pkt_hdr;
1368
1369 /* At the end of the SKB, there's a header telling us how many packets
1370 * are bundled into this buffer and where we can find an array of
1371 * per-packet metadata (which contains elements encoded into u16).
1372 */
1373
1374 /* SKB contents for current firmware:
1375 * <packet 1> <padding>
1376 * ...
1377 * <packet N> <padding>
1378 * <per-packet metadata entry 1> <dummy header>
1379 * ...
1380 * <per-packet metadata entry N> <dummy header>
1381 * <padding2> <rx_hdr>
1382 *
1383 * where:
1384 * <packet N> contains pkt_len bytes:
1385 * 2 bytes of IP alignment pseudo header
1386 * packet received
1387 * <per-packet metadata entry N> contains 4 bytes:
1388 * pkt_len and fields AX_RXHDR_*
1389 * <padding> 0-7 bytes to terminate at
1390 * 8 bytes boundary (64-bit).
1391 * <padding2> 4 bytes to make rx_hdr terminate at
1392 * 8 bytes boundary (64-bit)
1393 * <dummy-header> contains 4 bytes:
1394 * pkt_len=0 and AX_RXHDR_DROP_ERR
1395 * <rx-hdr> contains 4 bytes:
1396 * pkt_cnt and hdr_off (offset of
1397 * <per-packet metadata entry 1>)
1398 *
1399 * pkt_cnt is number of entrys in the per-packet metadata.
1400 * In current firmware there is 2 entrys per packet.
1401 * The first points to the packet and the
1402 * second is a dummy header.
1403 * This was done probably to align fields in 64-bit and
1404 * maintain compatibility with old firmware.
1405 * This code assumes that <dummy header> and <padding2> are
1406 * optional.
1407 */
1408
1409 if (skb->len < 4)
1410 return 0;
1411 skb_trim(skb, skb->len - 4);
1412 rx_hdr = get_unaligned_le32(skb_tail_pointer(skb));
1413 pkt_cnt = (u16)rx_hdr;
1414 hdr_off = (u16)(rx_hdr >> 16);
1415
1416 if (pkt_cnt == 0)
1417 return 0;
1418
1419 /* Make sure that the bounds of the metadata array are inside the SKB
1420 * (and in front of the counter at the end).
1421 */
1422 if (pkt_cnt * 4 + hdr_off > skb->len)
1423 return 0;
1424 pkt_hdr = (u32 *)(skb->data + hdr_off);
1425
1426 /* Packets must not overlap the metadata array */
1427 skb_trim(skb, hdr_off);
1428
1429 for (; pkt_cnt > 0; pkt_cnt--, pkt_hdr++) {
1430 u16 pkt_len_plus_padd;
1431 u16 pkt_len;
1432
1433 le32_to_cpus(pkt_hdr);
1434 pkt_len = (*pkt_hdr >> 16) & 0x1fff;
1435 pkt_len_plus_padd = (pkt_len + 7) & 0xfff8;
1436
1437 /* Skip dummy header used for alignment
1438 */
1439 if (pkt_len == 0)
1440 continue;
1441
1442 if (pkt_len_plus_padd > skb->len)
1443 return 0;
1444
1445 /* Check CRC or runt packet */
1446 if ((*pkt_hdr & (AX_RXHDR_CRC_ERR | AX_RXHDR_DROP_ERR)) ||
1447 pkt_len < 2 + ETH_HLEN) {
1448 dev->net->stats.rx_errors++;
1449 skb_pull(skb, pkt_len_plus_padd);
1450 continue;
1451 }
1452
1453 /* last packet */
1454 if (pkt_len_plus_padd == skb->len) {
1455 skb_trim(skb, pkt_len);
1456
1457 /* Skip IP alignment pseudo header */
1458 skb_pull(skb, 2);
1459
1460 ax88179_rx_checksum(skb, pkt_hdr);
1461 return 1;
1462 }
1463
1464 ax_skb = netdev_alloc_skb_ip_align(dev->net, pkt_len);
1465 if (!ax_skb)
1466 return 0;
1467 skb_put(ax_skb, pkt_len);
1468 memcpy(ax_skb->data, skb->data + 2, pkt_len);
1469
1470 ax88179_rx_checksum(ax_skb, pkt_hdr);
1471 usbnet_skb_return(dev, ax_skb);
1472
1473 skb_pull(skb, pkt_len_plus_padd);
1474 }
1475
1476 return 0;
1477}
1478
1479static struct sk_buff *
1480ax88179_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags)
1481{
1482 u32 tx_hdr1, tx_hdr2;
1483 int frame_size = dev->maxpacket;
1484 int headroom;
1485 void *ptr;
1486
1487 tx_hdr1 = skb->len;
1488 tx_hdr2 = skb_shinfo(skb)->gso_size; /* Set TSO mss */
1489 if (((skb->len + 8) % frame_size) == 0)
1490 tx_hdr2 |= 0x80008000; /* Enable padding */
1491
1492 headroom = skb_headroom(skb) - 8;
1493
1494 if ((dev->net->features & NETIF_F_SG) && skb_linearize(skb))
1495 return NULL;
1496
1497 if ((skb_header_cloned(skb) || headroom < 0) &&
1498 pskb_expand_head(skb, headroom < 0 ? 8 : 0, 0, GFP_ATOMIC)) {
1499 dev_kfree_skb_any(skb);
1500 return NULL;
1501 }
1502
1503 ptr = skb_push(skb, 8);
1504 put_unaligned_le32(tx_hdr1, ptr);
1505 put_unaligned_le32(tx_hdr2, ptr + 4);
1506
1507 usbnet_set_skb_tx_stats(skb, (skb_shinfo(skb)->gso_segs ?: 1), 0);
1508
1509 return skb;
1510}
1511
1512static int ax88179_link_reset(struct usbnet *dev)
1513{
1514 struct ax88179_data *ax179_data = dev->driver_priv;
1515 u8 tmp[5], link_sts;
1516 u16 mode, tmp16, delay = HZ / 10;
1517 u32 tmp32 = 0x40000000;
1518 unsigned long jtimeout;
1519
1520 jtimeout = jiffies + delay;
1521 while (tmp32 & 0x40000000) {
1522 mode = 0;
1523 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &mode);
1524 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2,
1525 &ax179_data->rxctl);
1526
1527 /*link up, check the usb device control TX FIFO full or empty*/
1528 ax88179_read_cmd(dev, 0x81, 0x8c, 0, 4, &tmp32);
1529
1530 if (time_after(jiffies, jtimeout))
1531 return 0;
1532 }
1533
1534 mode = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1535 AX_MEDIUM_RXFLOW_CTRLEN;
1536
1537 ax88179_read_cmd(dev, AX_ACCESS_MAC, PHYSICAL_LINK_STATUS,
1538 1, 1, &link_sts);
1539
1540 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1541 GMII_PHY_PHYSR, 2, &tmp16);
1542
1543 if (!(tmp16 & GMII_PHY_PHYSR_LINK)) {
1544 return 0;
1545 } else if (GMII_PHY_PHYSR_GIGA == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
1546 mode |= AX_MEDIUM_GIGAMODE | AX_MEDIUM_EN_125MHZ;
1547 if (dev->net->mtu > 1500)
1548 mode |= AX_MEDIUM_JUMBO_EN;
1549
1550 if (link_sts & AX_USB_SS)
1551 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1552 else if (link_sts & AX_USB_HS)
1553 memcpy(tmp, &AX88179_BULKIN_SIZE[1], 5);
1554 else
1555 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1556 } else if (GMII_PHY_PHYSR_100 == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
1557 mode |= AX_MEDIUM_PS;
1558
1559 if (link_sts & (AX_USB_SS | AX_USB_HS))
1560 memcpy(tmp, &AX88179_BULKIN_SIZE[2], 5);
1561 else
1562 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1563 } else {
1564 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1565 }
1566
1567 /* RX bulk configuration */
1568 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1569
1570 dev->rx_urb_size = (1024 * (tmp[3] + 2));
1571
1572 if (tmp16 & GMII_PHY_PHYSR_FULL)
1573 mode |= AX_MEDIUM_FULL_DUPLEX;
1574 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1575 2, 2, &mode);
1576
1577 ax179_data->eee_enabled = ax88179_chk_eee(dev);
1578
1579 netif_carrier_on(dev->net);
1580
1581 return 0;
1582}
1583
1584static int ax88179_reset(struct usbnet *dev)
1585{
1586 u8 buf[5];
1587 u16 *tmp16;
1588 u8 *tmp;
1589 struct ax88179_data *ax179_data = dev->driver_priv;
1590 struct ethtool_keee eee_data;
1591
1592 tmp16 = (u16 *)buf;
1593 tmp = (u8 *)buf;
1594
1595 /* Power up ethernet PHY */
1596 *tmp16 = 0;
1597 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1598
1599 *tmp16 = AX_PHYPWR_RSTCTL_IPRL;
1600 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1601 msleep(500);
1602
1603 *tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
1604 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
1605 msleep(200);
1606
1607 /* Ethernet PHY Auto Detach*/
1608 ax88179_auto_detach(dev);
1609
1610 /* Read MAC address from DTB or asix chip */
1611 ax88179_get_mac_addr(dev);
1612 memcpy(dev->net->perm_addr, dev->net->dev_addr, ETH_ALEN);
1613
1614 /* RX bulk configuration */
1615 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1616 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1617
1618 dev->rx_urb_size = 1024 * 20;
1619
1620 *tmp = 0x34;
1621 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
1622
1623 *tmp = 0x52;
1624 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH,
1625 1, 1, tmp);
1626
1627 /* Enable checksum offload */
1628 *tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
1629 AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
1630 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);
1631
1632 *tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |
1633 AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
1634 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);
1635
1636 /* Configure RX control register => start operation */
1637 *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
1638 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
1639 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
1640
1641 *tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |
1642 AX_MONITOR_MODE_RWMP;
1643 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);
1644
1645 /* Configure default medium type => giga */
1646 *tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1647 AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX |
1648 AX_MEDIUM_GIGAMODE;
1649 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1650 2, 2, tmp16);
1651
1652 /* Check if WoL is supported */
1653 ax179_data->wol_supported = 0;
1654 if (ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
1655 1, 1, &tmp) > 0)
1656 ax179_data->wol_supported = WAKE_MAGIC | WAKE_PHY;
1657
1658 ax88179_led_setting(dev);
1659
1660 ax179_data->eee_enabled = 0;
1661 ax179_data->eee_active = 0;
1662
1663 ax88179_disable_eee(dev);
1664
1665 ax88179_ethtool_get_eee(dev, &eee_data);
1666 linkmode_zero(eee_data.advertised);
1667 ax88179_ethtool_set_eee(dev, &eee_data);
1668
1669 /* Restart autoneg */
1670 mii_nway_restart(&dev->mii);
1671
1672 usbnet_link_change(dev, 0, 0);
1673
1674 return 0;
1675}
1676
1677static int ax88179_net_reset(struct usbnet *dev)
1678{
1679 struct ax88179_data *ax179_data = dev->driver_priv;
1680
1681 if (ax179_data->initialized)
1682 ax88179_reset(dev);
1683 else
1684 ax179_data->initialized = 1;
1685
1686 return 0;
1687}
1688
1689static int ax88179_stop(struct usbnet *dev)
1690{
1691 u16 tmp16;
1692
1693 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1694 2, 2, &tmp16);
1695 tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
1696 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1697 2, 2, &tmp16);
1698
1699 return 0;
1700}
1701
1702static const struct driver_info ax88179_info = {
1703 .description = "ASIX AX88179 USB 3.0 Gigabit Ethernet",
1704 .bind = ax88179_bind,
1705 .unbind = ax88179_unbind,
1706 .status = ax88179_status,
1707 .link_reset = ax88179_link_reset,
1708 .reset = ax88179_net_reset,
1709 .stop = ax88179_stop,
1710 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1711 .rx_fixup = ax88179_rx_fixup,
1712 .tx_fixup = ax88179_tx_fixup,
1713};
1714
1715static const struct driver_info ax88178a_info = {
1716 .description = "ASIX AX88178A USB 2.0 Gigabit Ethernet",
1717 .bind = ax88179_bind,
1718 .unbind = ax88179_unbind,
1719 .status = ax88179_status,
1720 .link_reset = ax88179_link_reset,
1721 .reset = ax88179_net_reset,
1722 .stop = ax88179_stop,
1723 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1724 .rx_fixup = ax88179_rx_fixup,
1725 .tx_fixup = ax88179_tx_fixup,
1726};
1727
1728static const struct driver_info cypress_GX3_info = {
1729 .description = "Cypress GX3 SuperSpeed to Gigabit Ethernet Controller",
1730 .bind = ax88179_bind,
1731 .unbind = ax88179_unbind,
1732 .status = ax88179_status,
1733 .link_reset = ax88179_link_reset,
1734 .reset = ax88179_net_reset,
1735 .stop = ax88179_stop,
1736 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1737 .rx_fixup = ax88179_rx_fixup,
1738 .tx_fixup = ax88179_tx_fixup,
1739};
1740
1741static const struct driver_info dlink_dub1312_info = {
1742 .description = "D-Link DUB-1312 USB 3.0 to Gigabit Ethernet Adapter",
1743 .bind = ax88179_bind,
1744 .unbind = ax88179_unbind,
1745 .status = ax88179_status,
1746 .link_reset = ax88179_link_reset,
1747 .reset = ax88179_net_reset,
1748 .stop = ax88179_stop,
1749 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1750 .rx_fixup = ax88179_rx_fixup,
1751 .tx_fixup = ax88179_tx_fixup,
1752};
1753
1754static const struct driver_info sitecom_info = {
1755 .description = "Sitecom USB 3.0 to Gigabit Adapter",
1756 .bind = ax88179_bind,
1757 .unbind = ax88179_unbind,
1758 .status = ax88179_status,
1759 .link_reset = ax88179_link_reset,
1760 .reset = ax88179_net_reset,
1761 .stop = ax88179_stop,
1762 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1763 .rx_fixup = ax88179_rx_fixup,
1764 .tx_fixup = ax88179_tx_fixup,
1765};
1766
1767static const struct driver_info samsung_info = {
1768 .description = "Samsung USB Ethernet Adapter",
1769 .bind = ax88179_bind,
1770 .unbind = ax88179_unbind,
1771 .status = ax88179_status,
1772 .link_reset = ax88179_link_reset,
1773 .reset = ax88179_net_reset,
1774 .stop = ax88179_stop,
1775 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1776 .rx_fixup = ax88179_rx_fixup,
1777 .tx_fixup = ax88179_tx_fixup,
1778};
1779
1780static const struct driver_info lenovo_info = {
1781 .description = "Lenovo OneLinkDock Gigabit LAN",
1782 .bind = ax88179_bind,
1783 .unbind = ax88179_unbind,
1784 .status = ax88179_status,
1785 .link_reset = ax88179_link_reset,
1786 .reset = ax88179_net_reset,
1787 .stop = ax88179_stop,
1788 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1789 .rx_fixup = ax88179_rx_fixup,
1790 .tx_fixup = ax88179_tx_fixup,
1791};
1792
1793static const struct driver_info belkin_info = {
1794 .description = "Belkin USB Ethernet Adapter",
1795 .bind = ax88179_bind,
1796 .unbind = ax88179_unbind,
1797 .status = ax88179_status,
1798 .link_reset = ax88179_link_reset,
1799 .reset = ax88179_net_reset,
1800 .stop = ax88179_stop,
1801 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1802 .rx_fixup = ax88179_rx_fixup,
1803 .tx_fixup = ax88179_tx_fixup,
1804};
1805
1806static const struct driver_info toshiba_info = {
1807 .description = "Toshiba USB Ethernet Adapter",
1808 .bind = ax88179_bind,
1809 .unbind = ax88179_unbind,
1810 .status = ax88179_status,
1811 .link_reset = ax88179_link_reset,
1812 .reset = ax88179_net_reset,
1813 .stop = ax88179_stop,
1814 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1815 .rx_fixup = ax88179_rx_fixup,
1816 .tx_fixup = ax88179_tx_fixup,
1817};
1818
1819static const struct driver_info mct_info = {
1820 .description = "MCT USB 3.0 Gigabit Ethernet Adapter",
1821 .bind = ax88179_bind,
1822 .unbind = ax88179_unbind,
1823 .status = ax88179_status,
1824 .link_reset = ax88179_link_reset,
1825 .reset = ax88179_net_reset,
1826 .stop = ax88179_stop,
1827 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1828 .rx_fixup = ax88179_rx_fixup,
1829 .tx_fixup = ax88179_tx_fixup,
1830};
1831
1832static const struct driver_info at_umc2000_info = {
1833 .description = "AT-UMC2000 USB 3.0/USB 3.1 Gen 1 to Gigabit Ethernet Adapter",
1834 .bind = ax88179_bind,
1835 .unbind = ax88179_unbind,
1836 .status = ax88179_status,
1837 .link_reset = ax88179_link_reset,
1838 .reset = ax88179_net_reset,
1839 .stop = ax88179_stop,
1840 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1841 .rx_fixup = ax88179_rx_fixup,
1842 .tx_fixup = ax88179_tx_fixup,
1843};
1844
1845static const struct driver_info at_umc200_info = {
1846 .description = "AT-UMC200 USB 3.0/USB 3.1 Gen 1 to Fast Ethernet Adapter",
1847 .bind = ax88179_bind,
1848 .unbind = ax88179_unbind,
1849 .status = ax88179_status,
1850 .link_reset = ax88179_link_reset,
1851 .reset = ax88179_net_reset,
1852 .stop = ax88179_stop,
1853 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1854 .rx_fixup = ax88179_rx_fixup,
1855 .tx_fixup = ax88179_tx_fixup,
1856};
1857
1858static const struct driver_info at_umc2000sp_info = {
1859 .description = "AT-UMC2000/SP USB 3.0/USB 3.1 Gen 1 to Gigabit Ethernet Adapter",
1860 .bind = ax88179_bind,
1861 .unbind = ax88179_unbind,
1862 .status = ax88179_status,
1863 .link_reset = ax88179_link_reset,
1864 .reset = ax88179_net_reset,
1865 .stop = ax88179_stop,
1866 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1867 .rx_fixup = ax88179_rx_fixup,
1868 .tx_fixup = ax88179_tx_fixup,
1869};
1870
1871static const struct usb_device_id products[] = {
1872{
1873 /* ASIX AX88179 10/100/1000 */
1874 USB_DEVICE_AND_INTERFACE_INFO(0x0b95, 0x1790, 0xff, 0xff, 0),
1875 .driver_info = (unsigned long)&ax88179_info,
1876}, {
1877 /* ASIX AX88178A 10/100/1000 */
1878 USB_DEVICE_AND_INTERFACE_INFO(0x0b95, 0x178a, 0xff, 0xff, 0),
1879 .driver_info = (unsigned long)&ax88178a_info,
1880}, {
1881 /* Cypress GX3 SuperSpeed to Gigabit Ethernet Bridge Controller */
1882 USB_DEVICE_AND_INTERFACE_INFO(0x04b4, 0x3610, 0xff, 0xff, 0),
1883 .driver_info = (unsigned long)&cypress_GX3_info,
1884}, {
1885 /* D-Link DUB-1312 USB 3.0 to Gigabit Ethernet Adapter */
1886 USB_DEVICE_AND_INTERFACE_INFO(0x2001, 0x4a00, 0xff, 0xff, 0),
1887 .driver_info = (unsigned long)&dlink_dub1312_info,
1888}, {
1889 /* Sitecom USB 3.0 to Gigabit Adapter */
1890 USB_DEVICE_AND_INTERFACE_INFO(0x0df6, 0x0072, 0xff, 0xff, 0),
1891 .driver_info = (unsigned long)&sitecom_info,
1892}, {
1893 /* Samsung USB Ethernet Adapter */
1894 USB_DEVICE_AND_INTERFACE_INFO(0x04e8, 0xa100, 0xff, 0xff, 0),
1895 .driver_info = (unsigned long)&samsung_info,
1896}, {
1897 /* Lenovo OneLinkDock Gigabit LAN */
1898 USB_DEVICE_AND_INTERFACE_INFO(0x17ef, 0x304b, 0xff, 0xff, 0),
1899 .driver_info = (unsigned long)&lenovo_info,
1900}, {
1901 /* Belkin B2B128 USB 3.0 Hub + Gigabit Ethernet Adapter */
1902 USB_DEVICE_AND_INTERFACE_INFO(0x050d, 0x0128, 0xff, 0xff, 0),
1903 .driver_info = (unsigned long)&belkin_info,
1904}, {
1905 /* Toshiba USB 3.0 GBit Ethernet Adapter */
1906 USB_DEVICE_AND_INTERFACE_INFO(0x0930, 0x0a13, 0xff, 0xff, 0),
1907 .driver_info = (unsigned long)&toshiba_info,
1908}, {
1909 /* Magic Control Technology U3-A9003 USB 3.0 Gigabit Ethernet Adapter */
1910 USB_DEVICE_AND_INTERFACE_INFO(0x0711, 0x0179, 0xff, 0xff, 0),
1911 .driver_info = (unsigned long)&mct_info,
1912}, {
1913 /* Allied Telesis AT-UMC2000 USB 3.0/USB 3.1 Gen 1 to Gigabit Ethernet Adapter */
1914 USB_DEVICE_AND_INTERFACE_INFO(0x07c9, 0x000e, 0xff, 0xff, 0),
1915 .driver_info = (unsigned long)&at_umc2000_info,
1916}, {
1917 /* Allied Telesis AT-UMC200 USB 3.0/USB 3.1 Gen 1 to Fast Ethernet Adapter */
1918 USB_DEVICE_AND_INTERFACE_INFO(0x07c9, 0x000f, 0xff, 0xff, 0),
1919 .driver_info = (unsigned long)&at_umc200_info,
1920}, {
1921 /* Allied Telesis AT-UMC2000/SP USB 3.0/USB 3.1 Gen 1 to Gigabit Ethernet Adapter */
1922 USB_DEVICE_AND_INTERFACE_INFO(0x07c9, 0x0010, 0xff, 0xff, 0),
1923 .driver_info = (unsigned long)&at_umc2000sp_info,
1924},
1925 { },
1926};
1927MODULE_DEVICE_TABLE(usb, products);
1928
1929static struct usb_driver ax88179_178a_driver = {
1930 .name = "ax88179_178a",
1931 .id_table = products,
1932 .probe = usbnet_probe,
1933 .suspend = ax88179_suspend,
1934 .resume = ax88179_resume,
1935 .reset_resume = ax88179_resume,
1936 .disconnect = ax88179_disconnect,
1937 .supports_autosuspend = 1,
1938 .disable_hub_initiated_lpm = 1,
1939};
1940
1941module_usb_driver(ax88179_178a_driver);
1942
1943MODULE_DESCRIPTION("ASIX AX88179/178A based USB 3.0/2.0 Gigabit Ethernet Devices");
1944MODULE_LICENSE("GPL");
1/*
2 * ASIX AX88179/178A USB 3.0/2.0 to Gigabit Ethernet Devices
3 *
4 * Copyright (C) 2011-2013 ASIX
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <linux/module.h>
21#include <linux/etherdevice.h>
22#include <linux/mii.h>
23#include <linux/usb.h>
24#include <linux/crc32.h>
25#include <linux/usb/usbnet.h>
26#include <uapi/linux/mdio.h>
27#include <linux/mdio.h>
28
29#define AX88179_PHY_ID 0x03
30#define AX_EEPROM_LEN 0x100
31#define AX88179_EEPROM_MAGIC 0x17900b95
32#define AX_MCAST_FLTSIZE 8
33#define AX_MAX_MCAST 64
34#define AX_INT_PPLS_LINK ((u32)BIT(16))
35#define AX_RXHDR_L4_TYPE_MASK 0x1c
36#define AX_RXHDR_L4_TYPE_UDP 4
37#define AX_RXHDR_L4_TYPE_TCP 16
38#define AX_RXHDR_L3CSUM_ERR 2
39#define AX_RXHDR_L4CSUM_ERR 1
40#define AX_RXHDR_CRC_ERR ((u32)BIT(29))
41#define AX_RXHDR_DROP_ERR ((u32)BIT(31))
42#define AX_ACCESS_MAC 0x01
43#define AX_ACCESS_PHY 0x02
44#define AX_ACCESS_EEPROM 0x04
45#define AX_ACCESS_EFUS 0x05
46#define AX_PAUSE_WATERLVL_HIGH 0x54
47#define AX_PAUSE_WATERLVL_LOW 0x55
48
49#define PHYSICAL_LINK_STATUS 0x02
50 #define AX_USB_SS 0x04
51 #define AX_USB_HS 0x02
52
53#define GENERAL_STATUS 0x03
54/* Check AX88179 version. UA1:Bit2 = 0, UA2:Bit2 = 1 */
55 #define AX_SECLD 0x04
56
57#define AX_SROM_ADDR 0x07
58#define AX_SROM_CMD 0x0a
59 #define EEP_RD 0x04
60 #define EEP_BUSY 0x10
61
62#define AX_SROM_DATA_LOW 0x08
63#define AX_SROM_DATA_HIGH 0x09
64
65#define AX_RX_CTL 0x0b
66 #define AX_RX_CTL_DROPCRCERR 0x0100
67 #define AX_RX_CTL_IPE 0x0200
68 #define AX_RX_CTL_START 0x0080
69 #define AX_RX_CTL_AP 0x0020
70 #define AX_RX_CTL_AM 0x0010
71 #define AX_RX_CTL_AB 0x0008
72 #define AX_RX_CTL_AMALL 0x0002
73 #define AX_RX_CTL_PRO 0x0001
74 #define AX_RX_CTL_STOP 0x0000
75
76#define AX_NODE_ID 0x10
77#define AX_MULFLTARY 0x16
78
79#define AX_MEDIUM_STATUS_MODE 0x22
80 #define AX_MEDIUM_GIGAMODE 0x01
81 #define AX_MEDIUM_FULL_DUPLEX 0x02
82 #define AX_MEDIUM_EN_125MHZ 0x08
83 #define AX_MEDIUM_RXFLOW_CTRLEN 0x10
84 #define AX_MEDIUM_TXFLOW_CTRLEN 0x20
85 #define AX_MEDIUM_RECEIVE_EN 0x100
86 #define AX_MEDIUM_PS 0x200
87 #define AX_MEDIUM_JUMBO_EN 0x8040
88
89#define AX_MONITOR_MOD 0x24
90 #define AX_MONITOR_MODE_RWLC 0x02
91 #define AX_MONITOR_MODE_RWMP 0x04
92 #define AX_MONITOR_MODE_PMEPOL 0x20
93 #define AX_MONITOR_MODE_PMETYPE 0x40
94
95#define AX_GPIO_CTRL 0x25
96 #define AX_GPIO_CTRL_GPIO3EN 0x80
97 #define AX_GPIO_CTRL_GPIO2EN 0x40
98 #define AX_GPIO_CTRL_GPIO1EN 0x20
99
100#define AX_PHYPWR_RSTCTL 0x26
101 #define AX_PHYPWR_RSTCTL_BZ 0x0010
102 #define AX_PHYPWR_RSTCTL_IPRL 0x0020
103 #define AX_PHYPWR_RSTCTL_AT 0x1000
104
105#define AX_RX_BULKIN_QCTRL 0x2e
106#define AX_CLK_SELECT 0x33
107 #define AX_CLK_SELECT_BCS 0x01
108 #define AX_CLK_SELECT_ACS 0x02
109 #define AX_CLK_SELECT_ULR 0x08
110
111#define AX_RXCOE_CTL 0x34
112 #define AX_RXCOE_IP 0x01
113 #define AX_RXCOE_TCP 0x02
114 #define AX_RXCOE_UDP 0x04
115 #define AX_RXCOE_TCPV6 0x20
116 #define AX_RXCOE_UDPV6 0x40
117
118#define AX_TXCOE_CTL 0x35
119 #define AX_TXCOE_IP 0x01
120 #define AX_TXCOE_TCP 0x02
121 #define AX_TXCOE_UDP 0x04
122 #define AX_TXCOE_TCPV6 0x20
123 #define AX_TXCOE_UDPV6 0x40
124
125#define AX_LEDCTRL 0x73
126
127#define GMII_PHY_PHYSR 0x11
128 #define GMII_PHY_PHYSR_SMASK 0xc000
129 #define GMII_PHY_PHYSR_GIGA 0x8000
130 #define GMII_PHY_PHYSR_100 0x4000
131 #define GMII_PHY_PHYSR_FULL 0x2000
132 #define GMII_PHY_PHYSR_LINK 0x400
133
134#define GMII_LED_ACT 0x1a
135 #define GMII_LED_ACTIVE_MASK 0xff8f
136 #define GMII_LED0_ACTIVE BIT(4)
137 #define GMII_LED1_ACTIVE BIT(5)
138 #define GMII_LED2_ACTIVE BIT(6)
139
140#define GMII_LED_LINK 0x1c
141 #define GMII_LED_LINK_MASK 0xf888
142 #define GMII_LED0_LINK_10 BIT(0)
143 #define GMII_LED0_LINK_100 BIT(1)
144 #define GMII_LED0_LINK_1000 BIT(2)
145 #define GMII_LED1_LINK_10 BIT(4)
146 #define GMII_LED1_LINK_100 BIT(5)
147 #define GMII_LED1_LINK_1000 BIT(6)
148 #define GMII_LED2_LINK_10 BIT(8)
149 #define GMII_LED2_LINK_100 BIT(9)
150 #define GMII_LED2_LINK_1000 BIT(10)
151 #define LED0_ACTIVE BIT(0)
152 #define LED0_LINK_10 BIT(1)
153 #define LED0_LINK_100 BIT(2)
154 #define LED0_LINK_1000 BIT(3)
155 #define LED0_FD BIT(4)
156 #define LED0_USB3_MASK 0x001f
157 #define LED1_ACTIVE BIT(5)
158 #define LED1_LINK_10 BIT(6)
159 #define LED1_LINK_100 BIT(7)
160 #define LED1_LINK_1000 BIT(8)
161 #define LED1_FD BIT(9)
162 #define LED1_USB3_MASK 0x03e0
163 #define LED2_ACTIVE BIT(10)
164 #define LED2_LINK_1000 BIT(13)
165 #define LED2_LINK_100 BIT(12)
166 #define LED2_LINK_10 BIT(11)
167 #define LED2_FD BIT(14)
168 #define LED_VALID BIT(15)
169 #define LED2_USB3_MASK 0x7c00
170
171#define GMII_PHYPAGE 0x1e
172#define GMII_PHY_PAGE_SELECT 0x1f
173 #define GMII_PHY_PGSEL_EXT 0x0007
174 #define GMII_PHY_PGSEL_PAGE0 0x0000
175 #define GMII_PHY_PGSEL_PAGE3 0x0003
176 #define GMII_PHY_PGSEL_PAGE5 0x0005
177
178struct ax88179_data {
179 u8 eee_enabled;
180 u8 eee_active;
181 u16 rxctl;
182 u16 reserved;
183};
184
185struct ax88179_int_data {
186 __le32 intdata1;
187 __le32 intdata2;
188};
189
190static const struct {
191 unsigned char ctrl, timer_l, timer_h, size, ifg;
192} AX88179_BULKIN_SIZE[] = {
193 {7, 0x4f, 0, 0x12, 0xff},
194 {7, 0x20, 3, 0x16, 0xff},
195 {7, 0xae, 7, 0x18, 0xff},
196 {7, 0xcc, 0x4c, 0x18, 8},
197};
198
199static int __ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
200 u16 size, void *data, int in_pm)
201{
202 int ret;
203 int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
204
205 BUG_ON(!dev);
206
207 if (!in_pm)
208 fn = usbnet_read_cmd;
209 else
210 fn = usbnet_read_cmd_nopm;
211
212 ret = fn(dev, cmd, USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
213 value, index, data, size);
214
215 if (unlikely(ret < 0))
216 netdev_warn(dev->net, "Failed to read reg index 0x%04x: %d\n",
217 index, ret);
218
219 return ret;
220}
221
222static int __ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
223 u16 size, void *data, int in_pm)
224{
225 int ret;
226 int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
227
228 BUG_ON(!dev);
229
230 if (!in_pm)
231 fn = usbnet_write_cmd;
232 else
233 fn = usbnet_write_cmd_nopm;
234
235 ret = fn(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
236 value, index, data, size);
237
238 if (unlikely(ret < 0))
239 netdev_warn(dev->net, "Failed to write reg index 0x%04x: %d\n",
240 index, ret);
241
242 return ret;
243}
244
245static void ax88179_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value,
246 u16 index, u16 size, void *data)
247{
248 u16 buf;
249
250 if (2 == size) {
251 buf = *((u16 *)data);
252 cpu_to_le16s(&buf);
253 usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
254 USB_RECIP_DEVICE, value, index, &buf,
255 size);
256 } else {
257 usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
258 USB_RECIP_DEVICE, value, index, data,
259 size);
260 }
261}
262
263static int ax88179_read_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,
264 u16 index, u16 size, void *data)
265{
266 int ret;
267
268 if (2 == size) {
269 u16 buf;
270 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 1);
271 le16_to_cpus(&buf);
272 *((u16 *)data) = buf;
273 } else if (4 == size) {
274 u32 buf;
275 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 1);
276 le32_to_cpus(&buf);
277 *((u32 *)data) = buf;
278 } else {
279 ret = __ax88179_read_cmd(dev, cmd, value, index, size, data, 1);
280 }
281
282 return ret;
283}
284
285static int ax88179_write_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,
286 u16 index, u16 size, void *data)
287{
288 int ret;
289
290 if (2 == size) {
291 u16 buf;
292 buf = *((u16 *)data);
293 cpu_to_le16s(&buf);
294 ret = __ax88179_write_cmd(dev, cmd, value, index,
295 size, &buf, 1);
296 } else {
297 ret = __ax88179_write_cmd(dev, cmd, value, index,
298 size, data, 1);
299 }
300
301 return ret;
302}
303
304static int ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
305 u16 size, void *data)
306{
307 int ret;
308
309 if (2 == size) {
310 u16 buf;
311 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 0);
312 le16_to_cpus(&buf);
313 *((u16 *)data) = buf;
314 } else if (4 == size) {
315 u32 buf;
316 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf, 0);
317 le32_to_cpus(&buf);
318 *((u32 *)data) = buf;
319 } else {
320 ret = __ax88179_read_cmd(dev, cmd, value, index, size, data, 0);
321 }
322
323 return ret;
324}
325
326static int ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
327 u16 size, void *data)
328{
329 int ret;
330
331 if (2 == size) {
332 u16 buf;
333 buf = *((u16 *)data);
334 cpu_to_le16s(&buf);
335 ret = __ax88179_write_cmd(dev, cmd, value, index,
336 size, &buf, 0);
337 } else {
338 ret = __ax88179_write_cmd(dev, cmd, value, index,
339 size, data, 0);
340 }
341
342 return ret;
343}
344
345static void ax88179_status(struct usbnet *dev, struct urb *urb)
346{
347 struct ax88179_int_data *event;
348 u32 link;
349
350 if (urb->actual_length < 8)
351 return;
352
353 event = urb->transfer_buffer;
354 le32_to_cpus((void *)&event->intdata1);
355
356 link = (((__force u32)event->intdata1) & AX_INT_PPLS_LINK) >> 16;
357
358 if (netif_carrier_ok(dev->net) != link) {
359 usbnet_link_change(dev, link, 1);
360 netdev_info(dev->net, "ax88179 - Link status is: %d\n", link);
361 }
362}
363
364static int ax88179_mdio_read(struct net_device *netdev, int phy_id, int loc)
365{
366 struct usbnet *dev = netdev_priv(netdev);
367 u16 res;
368
369 ax88179_read_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
370 return res;
371}
372
373static void ax88179_mdio_write(struct net_device *netdev, int phy_id, int loc,
374 int val)
375{
376 struct usbnet *dev = netdev_priv(netdev);
377 u16 res = (u16) val;
378
379 ax88179_write_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
380}
381
382static inline int ax88179_phy_mmd_indirect(struct usbnet *dev, u16 prtad,
383 u16 devad)
384{
385 u16 tmp16;
386 int ret;
387
388 tmp16 = devad;
389 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
390 MII_MMD_CTRL, 2, &tmp16);
391
392 tmp16 = prtad;
393 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
394 MII_MMD_DATA, 2, &tmp16);
395
396 tmp16 = devad | MII_MMD_CTRL_NOINCR;
397 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
398 MII_MMD_CTRL, 2, &tmp16);
399
400 return ret;
401}
402
403static int
404ax88179_phy_read_mmd_indirect(struct usbnet *dev, u16 prtad, u16 devad)
405{
406 int ret;
407 u16 tmp16;
408
409 ax88179_phy_mmd_indirect(dev, prtad, devad);
410
411 ret = ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
412 MII_MMD_DATA, 2, &tmp16);
413 if (ret < 0)
414 return ret;
415
416 return tmp16;
417}
418
419static int
420ax88179_phy_write_mmd_indirect(struct usbnet *dev, u16 prtad, u16 devad,
421 u16 data)
422{
423 int ret;
424
425 ax88179_phy_mmd_indirect(dev, prtad, devad);
426
427 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
428 MII_MMD_DATA, 2, &data);
429
430 if (ret < 0)
431 return ret;
432
433 return 0;
434}
435
436static int ax88179_suspend(struct usb_interface *intf, pm_message_t message)
437{
438 struct usbnet *dev = usb_get_intfdata(intf);
439 u16 tmp16;
440 u8 tmp8;
441
442 usbnet_suspend(intf, message);
443
444 /* Disable RX path */
445 ax88179_read_cmd_nopm(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
446 2, 2, &tmp16);
447 tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
448 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
449 2, 2, &tmp16);
450
451 /* Force bulk-in zero length */
452 ax88179_read_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
453 2, 2, &tmp16);
454
455 tmp16 |= AX_PHYPWR_RSTCTL_BZ | AX_PHYPWR_RSTCTL_IPRL;
456 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
457 2, 2, &tmp16);
458
459 /* change clock */
460 tmp8 = 0;
461 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
462
463 /* Configure RX control register => stop operation */
464 tmp16 = AX_RX_CTL_STOP;
465 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
466
467 return 0;
468}
469
470/* This function is used to enable the autodetach function. */
471/* This function is determined by offset 0x43 of EEPROM */
472static int ax88179_auto_detach(struct usbnet *dev, int in_pm)
473{
474 u16 tmp16;
475 u8 tmp8;
476 int (*fnr)(struct usbnet *, u8, u16, u16, u16, void *);
477 int (*fnw)(struct usbnet *, u8, u16, u16, u16, void *);
478
479 if (!in_pm) {
480 fnr = ax88179_read_cmd;
481 fnw = ax88179_write_cmd;
482 } else {
483 fnr = ax88179_read_cmd_nopm;
484 fnw = ax88179_write_cmd_nopm;
485 }
486
487 if (fnr(dev, AX_ACCESS_EEPROM, 0x43, 1, 2, &tmp16) < 0)
488 return 0;
489
490 if ((tmp16 == 0xFFFF) || (!(tmp16 & 0x0100)))
491 return 0;
492
493 /* Enable Auto Detach bit */
494 tmp8 = 0;
495 fnr(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
496 tmp8 |= AX_CLK_SELECT_ULR;
497 fnw(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
498
499 fnr(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
500 tmp16 |= AX_PHYPWR_RSTCTL_AT;
501 fnw(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
502
503 return 0;
504}
505
506static int ax88179_resume(struct usb_interface *intf)
507{
508 struct usbnet *dev = usb_get_intfdata(intf);
509 u16 tmp16;
510 u8 tmp8;
511
512 usbnet_link_change(dev, 0, 0);
513
514 /* Power up ethernet PHY */
515 tmp16 = 0;
516 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
517 2, 2, &tmp16);
518 udelay(1000);
519
520 tmp16 = AX_PHYPWR_RSTCTL_IPRL;
521 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
522 2, 2, &tmp16);
523 msleep(200);
524
525 /* Ethernet PHY Auto Detach*/
526 ax88179_auto_detach(dev, 1);
527
528 /* Enable clock */
529 ax88179_read_cmd_nopm(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
530 tmp8 |= AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
531 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
532 msleep(100);
533
534 /* Configure RX control register => start operation */
535 tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
536 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
537 ax88179_write_cmd_nopm(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
538
539 return usbnet_resume(intf);
540}
541
542static void
543ax88179_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
544{
545 struct usbnet *dev = netdev_priv(net);
546 u8 opt;
547
548 if (ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
549 1, 1, &opt) < 0) {
550 wolinfo->supported = 0;
551 wolinfo->wolopts = 0;
552 return;
553 }
554
555 wolinfo->supported = WAKE_PHY | WAKE_MAGIC;
556 wolinfo->wolopts = 0;
557 if (opt & AX_MONITOR_MODE_RWLC)
558 wolinfo->wolopts |= WAKE_PHY;
559 if (opt & AX_MONITOR_MODE_RWMP)
560 wolinfo->wolopts |= WAKE_MAGIC;
561}
562
563static int
564ax88179_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
565{
566 struct usbnet *dev = netdev_priv(net);
567 u8 opt = 0;
568
569 if (wolinfo->wolopts & WAKE_PHY)
570 opt |= AX_MONITOR_MODE_RWLC;
571 if (wolinfo->wolopts & WAKE_MAGIC)
572 opt |= AX_MONITOR_MODE_RWMP;
573
574 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
575 1, 1, &opt) < 0)
576 return -EINVAL;
577
578 return 0;
579}
580
581static int ax88179_get_eeprom_len(struct net_device *net)
582{
583 return AX_EEPROM_LEN;
584}
585
586static int
587ax88179_get_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,
588 u8 *data)
589{
590 struct usbnet *dev = netdev_priv(net);
591 u16 *eeprom_buff;
592 int first_word, last_word;
593 int i, ret;
594
595 if (eeprom->len == 0)
596 return -EINVAL;
597
598 eeprom->magic = AX88179_EEPROM_MAGIC;
599
600 first_word = eeprom->offset >> 1;
601 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
602 eeprom_buff = kmalloc(sizeof(u16) * (last_word - first_word + 1),
603 GFP_KERNEL);
604 if (!eeprom_buff)
605 return -ENOMEM;
606
607 /* ax88179/178A returns 2 bytes from eeprom on read */
608 for (i = first_word; i <= last_word; i++) {
609 ret = __ax88179_read_cmd(dev, AX_ACCESS_EEPROM, i, 1, 2,
610 &eeprom_buff[i - first_word],
611 0);
612 if (ret < 0) {
613 kfree(eeprom_buff);
614 return -EIO;
615 }
616 }
617
618 memcpy(data, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
619 kfree(eeprom_buff);
620 return 0;
621}
622
623static int ax88179_get_settings(struct net_device *net, struct ethtool_cmd *cmd)
624{
625 struct usbnet *dev = netdev_priv(net);
626 return mii_ethtool_gset(&dev->mii, cmd);
627}
628
629static int ax88179_set_settings(struct net_device *net, struct ethtool_cmd *cmd)
630{
631 struct usbnet *dev = netdev_priv(net);
632 return mii_ethtool_sset(&dev->mii, cmd);
633}
634
635static int
636ax88179_ethtool_get_eee(struct usbnet *dev, struct ethtool_eee *data)
637{
638 int val;
639
640 /* Get Supported EEE */
641 val = ax88179_phy_read_mmd_indirect(dev, MDIO_PCS_EEE_ABLE,
642 MDIO_MMD_PCS);
643 if (val < 0)
644 return val;
645 data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
646
647 /* Get advertisement EEE */
648 val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_ADV,
649 MDIO_MMD_AN);
650 if (val < 0)
651 return val;
652 data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
653
654 /* Get LP advertisement EEE */
655 val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_LPABLE,
656 MDIO_MMD_AN);
657 if (val < 0)
658 return val;
659 data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
660
661 return 0;
662}
663
664static int
665ax88179_ethtool_set_eee(struct usbnet *dev, struct ethtool_eee *data)
666{
667 u16 tmp16 = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
668
669 return ax88179_phy_write_mmd_indirect(dev, MDIO_AN_EEE_ADV,
670 MDIO_MMD_AN, tmp16);
671}
672
673static int ax88179_chk_eee(struct usbnet *dev)
674{
675 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
676 struct ax88179_data *priv = (struct ax88179_data *)dev->data;
677
678 mii_ethtool_gset(&dev->mii, &ecmd);
679
680 if (ecmd.duplex & DUPLEX_FULL) {
681 int eee_lp, eee_cap, eee_adv;
682 u32 lp, cap, adv, supported = 0;
683
684 eee_cap = ax88179_phy_read_mmd_indirect(dev,
685 MDIO_PCS_EEE_ABLE,
686 MDIO_MMD_PCS);
687 if (eee_cap < 0) {
688 priv->eee_active = 0;
689 return false;
690 }
691
692 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
693 if (!cap) {
694 priv->eee_active = 0;
695 return false;
696 }
697
698 eee_lp = ax88179_phy_read_mmd_indirect(dev,
699 MDIO_AN_EEE_LPABLE,
700 MDIO_MMD_AN);
701 if (eee_lp < 0) {
702 priv->eee_active = 0;
703 return false;
704 }
705
706 eee_adv = ax88179_phy_read_mmd_indirect(dev,
707 MDIO_AN_EEE_ADV,
708 MDIO_MMD_AN);
709
710 if (eee_adv < 0) {
711 priv->eee_active = 0;
712 return false;
713 }
714
715 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
716 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
717 supported = (ecmd.speed == SPEED_1000) ?
718 SUPPORTED_1000baseT_Full :
719 SUPPORTED_100baseT_Full;
720
721 if (!(lp & adv & supported)) {
722 priv->eee_active = 0;
723 return false;
724 }
725
726 priv->eee_active = 1;
727 return true;
728 }
729
730 priv->eee_active = 0;
731 return false;
732}
733
734static void ax88179_disable_eee(struct usbnet *dev)
735{
736 u16 tmp16;
737
738 tmp16 = GMII_PHY_PGSEL_PAGE3;
739 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
740 GMII_PHY_PAGE_SELECT, 2, &tmp16);
741
742 tmp16 = 0x3246;
743 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
744 MII_PHYADDR, 2, &tmp16);
745
746 tmp16 = GMII_PHY_PGSEL_PAGE0;
747 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
748 GMII_PHY_PAGE_SELECT, 2, &tmp16);
749}
750
751static void ax88179_enable_eee(struct usbnet *dev)
752{
753 u16 tmp16;
754
755 tmp16 = GMII_PHY_PGSEL_PAGE3;
756 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
757 GMII_PHY_PAGE_SELECT, 2, &tmp16);
758
759 tmp16 = 0x3247;
760 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
761 MII_PHYADDR, 2, &tmp16);
762
763 tmp16 = GMII_PHY_PGSEL_PAGE5;
764 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
765 GMII_PHY_PAGE_SELECT, 2, &tmp16);
766
767 tmp16 = 0x0680;
768 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
769 MII_BMSR, 2, &tmp16);
770
771 tmp16 = GMII_PHY_PGSEL_PAGE0;
772 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
773 GMII_PHY_PAGE_SELECT, 2, &tmp16);
774}
775
776static int ax88179_get_eee(struct net_device *net, struct ethtool_eee *edata)
777{
778 struct usbnet *dev = netdev_priv(net);
779 struct ax88179_data *priv = (struct ax88179_data *)dev->data;
780
781 edata->eee_enabled = priv->eee_enabled;
782 edata->eee_active = priv->eee_active;
783
784 return ax88179_ethtool_get_eee(dev, edata);
785}
786
787static int ax88179_set_eee(struct net_device *net, struct ethtool_eee *edata)
788{
789 struct usbnet *dev = netdev_priv(net);
790 struct ax88179_data *priv = (struct ax88179_data *)dev->data;
791 int ret = -EOPNOTSUPP;
792
793 priv->eee_enabled = edata->eee_enabled;
794 if (!priv->eee_enabled) {
795 ax88179_disable_eee(dev);
796 } else {
797 priv->eee_enabled = ax88179_chk_eee(dev);
798 if (!priv->eee_enabled)
799 return -EOPNOTSUPP;
800
801 ax88179_enable_eee(dev);
802 }
803
804 ret = ax88179_ethtool_set_eee(dev, edata);
805 if (ret)
806 return ret;
807
808 mii_nway_restart(&dev->mii);
809
810 usbnet_link_change(dev, 0, 0);
811
812 return ret;
813}
814
815static int ax88179_ioctl(struct net_device *net, struct ifreq *rq, int cmd)
816{
817 struct usbnet *dev = netdev_priv(net);
818 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
819}
820
821static const struct ethtool_ops ax88179_ethtool_ops = {
822 .get_link = ethtool_op_get_link,
823 .get_msglevel = usbnet_get_msglevel,
824 .set_msglevel = usbnet_set_msglevel,
825 .get_wol = ax88179_get_wol,
826 .set_wol = ax88179_set_wol,
827 .get_eeprom_len = ax88179_get_eeprom_len,
828 .get_eeprom = ax88179_get_eeprom,
829 .get_settings = ax88179_get_settings,
830 .set_settings = ax88179_set_settings,
831 .get_eee = ax88179_get_eee,
832 .set_eee = ax88179_set_eee,
833 .nway_reset = usbnet_nway_reset,
834};
835
836static void ax88179_set_multicast(struct net_device *net)
837{
838 struct usbnet *dev = netdev_priv(net);
839 struct ax88179_data *data = (struct ax88179_data *)dev->data;
840 u8 *m_filter = ((u8 *)dev->data) + 12;
841
842 data->rxctl = (AX_RX_CTL_START | AX_RX_CTL_AB | AX_RX_CTL_IPE);
843
844 if (net->flags & IFF_PROMISC) {
845 data->rxctl |= AX_RX_CTL_PRO;
846 } else if (net->flags & IFF_ALLMULTI ||
847 netdev_mc_count(net) > AX_MAX_MCAST) {
848 data->rxctl |= AX_RX_CTL_AMALL;
849 } else if (netdev_mc_empty(net)) {
850 /* just broadcast and directed */
851 } else {
852 /* We use the 20 byte dev->data for our 8 byte filter buffer
853 * to avoid allocating memory that is tricky to free later
854 */
855 u32 crc_bits;
856 struct netdev_hw_addr *ha;
857
858 memset(m_filter, 0, AX_MCAST_FLTSIZE);
859
860 netdev_for_each_mc_addr(ha, net) {
861 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
862 *(m_filter + (crc_bits >> 3)) |= (1 << (crc_bits & 7));
863 }
864
865 ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_MULFLTARY,
866 AX_MCAST_FLTSIZE, AX_MCAST_FLTSIZE,
867 m_filter);
868
869 data->rxctl |= AX_RX_CTL_AM;
870 }
871
872 ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_RX_CTL,
873 2, 2, &data->rxctl);
874}
875
876static int
877ax88179_set_features(struct net_device *net, netdev_features_t features)
878{
879 u8 tmp;
880 struct usbnet *dev = netdev_priv(net);
881 netdev_features_t changed = net->features ^ features;
882
883 if (changed & NETIF_F_IP_CSUM) {
884 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
885 tmp ^= AX_TXCOE_TCP | AX_TXCOE_UDP;
886 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
887 }
888
889 if (changed & NETIF_F_IPV6_CSUM) {
890 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
891 tmp ^= AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
892 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
893 }
894
895 if (changed & NETIF_F_RXCSUM) {
896 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
897 tmp ^= AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
898 AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
899 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
900 }
901
902 return 0;
903}
904
905static int ax88179_change_mtu(struct net_device *net, int new_mtu)
906{
907 struct usbnet *dev = netdev_priv(net);
908 u16 tmp16;
909
910 if (new_mtu <= 0 || new_mtu > 4088)
911 return -EINVAL;
912
913 net->mtu = new_mtu;
914 dev->hard_mtu = net->mtu + net->hard_header_len;
915
916 if (net->mtu > 1500) {
917 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
918 2, 2, &tmp16);
919 tmp16 |= AX_MEDIUM_JUMBO_EN;
920 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
921 2, 2, &tmp16);
922 } else {
923 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
924 2, 2, &tmp16);
925 tmp16 &= ~AX_MEDIUM_JUMBO_EN;
926 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
927 2, 2, &tmp16);
928 }
929
930 /* max qlen depend on hard_mtu and rx_urb_size */
931 usbnet_update_max_qlen(dev);
932
933 return 0;
934}
935
936static int ax88179_set_mac_addr(struct net_device *net, void *p)
937{
938 struct usbnet *dev = netdev_priv(net);
939 struct sockaddr *addr = p;
940 int ret;
941
942 if (netif_running(net))
943 return -EBUSY;
944 if (!is_valid_ether_addr(addr->sa_data))
945 return -EADDRNOTAVAIL;
946
947 memcpy(net->dev_addr, addr->sa_data, ETH_ALEN);
948
949 /* Set the MAC address */
950 ret = ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
951 ETH_ALEN, net->dev_addr);
952 if (ret < 0)
953 return ret;
954
955 return 0;
956}
957
958static const struct net_device_ops ax88179_netdev_ops = {
959 .ndo_open = usbnet_open,
960 .ndo_stop = usbnet_stop,
961 .ndo_start_xmit = usbnet_start_xmit,
962 .ndo_tx_timeout = usbnet_tx_timeout,
963 .ndo_change_mtu = ax88179_change_mtu,
964 .ndo_set_mac_address = ax88179_set_mac_addr,
965 .ndo_validate_addr = eth_validate_addr,
966 .ndo_do_ioctl = ax88179_ioctl,
967 .ndo_set_rx_mode = ax88179_set_multicast,
968 .ndo_set_features = ax88179_set_features,
969};
970
971static int ax88179_check_eeprom(struct usbnet *dev)
972{
973 u8 i, buf, eeprom[20];
974 u16 csum, delay = HZ / 10;
975 unsigned long jtimeout;
976
977 /* Read EEPROM content */
978 for (i = 0; i < 6; i++) {
979 buf = i;
980 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
981 1, 1, &buf) < 0)
982 return -EINVAL;
983
984 buf = EEP_RD;
985 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
986 1, 1, &buf) < 0)
987 return -EINVAL;
988
989 jtimeout = jiffies + delay;
990 do {
991 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
992 1, 1, &buf);
993
994 if (time_after(jiffies, jtimeout))
995 return -EINVAL;
996
997 } while (buf & EEP_BUSY);
998
999 __ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
1000 2, 2, &eeprom[i * 2], 0);
1001
1002 if ((i == 0) && (eeprom[0] == 0xFF))
1003 return -EINVAL;
1004 }
1005
1006 csum = eeprom[6] + eeprom[7] + eeprom[8] + eeprom[9];
1007 csum = (csum >> 8) + (csum & 0xff);
1008 if ((csum + eeprom[10]) != 0xff)
1009 return -EINVAL;
1010
1011 return 0;
1012}
1013
1014static int ax88179_check_efuse(struct usbnet *dev, u16 *ledmode)
1015{
1016 u8 i;
1017 u8 efuse[64];
1018 u16 csum = 0;
1019
1020 if (ax88179_read_cmd(dev, AX_ACCESS_EFUS, 0, 64, 64, efuse) < 0)
1021 return -EINVAL;
1022
1023 if (*efuse == 0xFF)
1024 return -EINVAL;
1025
1026 for (i = 0; i < 64; i++)
1027 csum = csum + efuse[i];
1028
1029 while (csum > 255)
1030 csum = (csum & 0x00FF) + ((csum >> 8) & 0x00FF);
1031
1032 if (csum != 0xFF)
1033 return -EINVAL;
1034
1035 *ledmode = (efuse[51] << 8) | efuse[52];
1036
1037 return 0;
1038}
1039
1040static int ax88179_convert_old_led(struct usbnet *dev, u16 *ledvalue)
1041{
1042 u16 led;
1043
1044 /* Loaded the old eFuse LED Mode */
1045 if (ax88179_read_cmd(dev, AX_ACCESS_EEPROM, 0x3C, 1, 2, &led) < 0)
1046 return -EINVAL;
1047
1048 led >>= 8;
1049 switch (led) {
1050 case 0xFF:
1051 led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
1052 LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
1053 LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
1054 break;
1055 case 0xFE:
1056 led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 | LED_VALID;
1057 break;
1058 case 0xFD:
1059 led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 |
1060 LED2_LINK_10 | LED_VALID;
1061 break;
1062 case 0xFC:
1063 led = LED0_ACTIVE | LED1_ACTIVE | LED1_LINK_1000 | LED2_ACTIVE |
1064 LED2_LINK_100 | LED2_LINK_10 | LED_VALID;
1065 break;
1066 default:
1067 led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
1068 LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
1069 LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
1070 break;
1071 }
1072
1073 *ledvalue = led;
1074
1075 return 0;
1076}
1077
1078static int ax88179_led_setting(struct usbnet *dev)
1079{
1080 u8 ledfd, value = 0;
1081 u16 tmp, ledact, ledlink, ledvalue = 0, delay = HZ / 10;
1082 unsigned long jtimeout;
1083
1084 /* Check AX88179 version. UA1 or UA2*/
1085 ax88179_read_cmd(dev, AX_ACCESS_MAC, GENERAL_STATUS, 1, 1, &value);
1086
1087 if (!(value & AX_SECLD)) { /* UA1 */
1088 value = AX_GPIO_CTRL_GPIO3EN | AX_GPIO_CTRL_GPIO2EN |
1089 AX_GPIO_CTRL_GPIO1EN;
1090 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_GPIO_CTRL,
1091 1, 1, &value) < 0)
1092 return -EINVAL;
1093 }
1094
1095 /* Check EEPROM */
1096 if (!ax88179_check_eeprom(dev)) {
1097 value = 0x42;
1098 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
1099 1, 1, &value) < 0)
1100 return -EINVAL;
1101
1102 value = EEP_RD;
1103 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1104 1, 1, &value) < 0)
1105 return -EINVAL;
1106
1107 jtimeout = jiffies + delay;
1108 do {
1109 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1110 1, 1, &value);
1111
1112 if (time_after(jiffies, jtimeout))
1113 return -EINVAL;
1114
1115 } while (value & EEP_BUSY);
1116
1117 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_HIGH,
1118 1, 1, &value);
1119 ledvalue = (value << 8);
1120
1121 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
1122 1, 1, &value);
1123 ledvalue |= value;
1124
1125 /* load internal ROM for defaule setting */
1126 if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
1127 ax88179_convert_old_led(dev, &ledvalue);
1128
1129 } else if (!ax88179_check_efuse(dev, &ledvalue)) {
1130 if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
1131 ax88179_convert_old_led(dev, &ledvalue);
1132 } else {
1133 ax88179_convert_old_led(dev, &ledvalue);
1134 }
1135
1136 tmp = GMII_PHY_PGSEL_EXT;
1137 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1138 GMII_PHY_PAGE_SELECT, 2, &tmp);
1139
1140 tmp = 0x2c;
1141 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1142 GMII_PHYPAGE, 2, &tmp);
1143
1144 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1145 GMII_LED_ACT, 2, &ledact);
1146
1147 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1148 GMII_LED_LINK, 2, &ledlink);
1149
1150 ledact &= GMII_LED_ACTIVE_MASK;
1151 ledlink &= GMII_LED_LINK_MASK;
1152
1153 if (ledvalue & LED0_ACTIVE)
1154 ledact |= GMII_LED0_ACTIVE;
1155
1156 if (ledvalue & LED1_ACTIVE)
1157 ledact |= GMII_LED1_ACTIVE;
1158
1159 if (ledvalue & LED2_ACTIVE)
1160 ledact |= GMII_LED2_ACTIVE;
1161
1162 if (ledvalue & LED0_LINK_10)
1163 ledlink |= GMII_LED0_LINK_10;
1164
1165 if (ledvalue & LED1_LINK_10)
1166 ledlink |= GMII_LED1_LINK_10;
1167
1168 if (ledvalue & LED2_LINK_10)
1169 ledlink |= GMII_LED2_LINK_10;
1170
1171 if (ledvalue & LED0_LINK_100)
1172 ledlink |= GMII_LED0_LINK_100;
1173
1174 if (ledvalue & LED1_LINK_100)
1175 ledlink |= GMII_LED1_LINK_100;
1176
1177 if (ledvalue & LED2_LINK_100)
1178 ledlink |= GMII_LED2_LINK_100;
1179
1180 if (ledvalue & LED0_LINK_1000)
1181 ledlink |= GMII_LED0_LINK_1000;
1182
1183 if (ledvalue & LED1_LINK_1000)
1184 ledlink |= GMII_LED1_LINK_1000;
1185
1186 if (ledvalue & LED2_LINK_1000)
1187 ledlink |= GMII_LED2_LINK_1000;
1188
1189 tmp = ledact;
1190 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1191 GMII_LED_ACT, 2, &tmp);
1192
1193 tmp = ledlink;
1194 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1195 GMII_LED_LINK, 2, &tmp);
1196
1197 tmp = GMII_PHY_PGSEL_PAGE0;
1198 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1199 GMII_PHY_PAGE_SELECT, 2, &tmp);
1200
1201 /* LED full duplex setting */
1202 ledfd = 0;
1203 if (ledvalue & LED0_FD)
1204 ledfd |= 0x01;
1205 else if ((ledvalue & LED0_USB3_MASK) == 0)
1206 ledfd |= 0x02;
1207
1208 if (ledvalue & LED1_FD)
1209 ledfd |= 0x04;
1210 else if ((ledvalue & LED1_USB3_MASK) == 0)
1211 ledfd |= 0x08;
1212
1213 if (ledvalue & LED2_FD)
1214 ledfd |= 0x10;
1215 else if ((ledvalue & LED2_USB3_MASK) == 0)
1216 ledfd |= 0x20;
1217
1218 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_LEDCTRL, 1, 1, &ledfd);
1219
1220 return 0;
1221}
1222
1223static int ax88179_bind(struct usbnet *dev, struct usb_interface *intf)
1224{
1225 u8 buf[5];
1226 u16 *tmp16;
1227 u8 *tmp;
1228 struct ax88179_data *ax179_data = (struct ax88179_data *)dev->data;
1229 struct ethtool_eee eee_data;
1230
1231 usbnet_get_endpoints(dev, intf);
1232
1233 tmp16 = (u16 *)buf;
1234 tmp = (u8 *)buf;
1235
1236 memset(ax179_data, 0, sizeof(*ax179_data));
1237
1238 /* Power up ethernet PHY */
1239 *tmp16 = 0;
1240 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1241 *tmp16 = AX_PHYPWR_RSTCTL_IPRL;
1242 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1243 msleep(200);
1244
1245 *tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
1246 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
1247 msleep(100);
1248
1249 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
1250 ETH_ALEN, dev->net->dev_addr);
1251 memcpy(dev->net->perm_addr, dev->net->dev_addr, ETH_ALEN);
1252
1253 /* RX bulk configuration */
1254 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1255 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1256
1257 dev->rx_urb_size = 1024 * 20;
1258
1259 *tmp = 0x34;
1260 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
1261
1262 *tmp = 0x52;
1263 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH,
1264 1, 1, tmp);
1265
1266 dev->net->netdev_ops = &ax88179_netdev_ops;
1267 dev->net->ethtool_ops = &ax88179_ethtool_ops;
1268 dev->net->needed_headroom = 8;
1269
1270 /* Initialize MII structure */
1271 dev->mii.dev = dev->net;
1272 dev->mii.mdio_read = ax88179_mdio_read;
1273 dev->mii.mdio_write = ax88179_mdio_write;
1274 dev->mii.phy_id_mask = 0xff;
1275 dev->mii.reg_num_mask = 0xff;
1276 dev->mii.phy_id = 0x03;
1277 dev->mii.supports_gmii = 1;
1278
1279 dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1280 NETIF_F_RXCSUM;
1281
1282 dev->net->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1283 NETIF_F_RXCSUM;
1284
1285 /* Enable checksum offload */
1286 *tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
1287 AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
1288 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);
1289
1290 *tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |
1291 AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
1292 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);
1293
1294 /* Configure RX control register => start operation */
1295 *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
1296 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
1297 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
1298
1299 *tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |
1300 AX_MONITOR_MODE_RWMP;
1301 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);
1302
1303 /* Configure default medium type => giga */
1304 *tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1305 AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX |
1306 AX_MEDIUM_GIGAMODE;
1307 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1308 2, 2, tmp16);
1309
1310 ax88179_led_setting(dev);
1311
1312 ax179_data->eee_enabled = 0;
1313 ax179_data->eee_active = 0;
1314
1315 ax88179_disable_eee(dev);
1316
1317 ax88179_ethtool_get_eee(dev, &eee_data);
1318 eee_data.advertised = 0;
1319 ax88179_ethtool_set_eee(dev, &eee_data);
1320
1321 /* Restart autoneg */
1322 mii_nway_restart(&dev->mii);
1323
1324 usbnet_link_change(dev, 0, 0);
1325
1326 return 0;
1327}
1328
1329static void ax88179_unbind(struct usbnet *dev, struct usb_interface *intf)
1330{
1331 u16 tmp16;
1332
1333 /* Configure RX control register => stop operation */
1334 tmp16 = AX_RX_CTL_STOP;
1335 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
1336
1337 tmp16 = 0;
1338 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp16);
1339
1340 /* Power down ethernet PHY */
1341 tmp16 = 0;
1342 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
1343}
1344
1345static void
1346ax88179_rx_checksum(struct sk_buff *skb, u32 *pkt_hdr)
1347{
1348 skb->ip_summed = CHECKSUM_NONE;
1349
1350 /* checksum error bit is set */
1351 if ((*pkt_hdr & AX_RXHDR_L3CSUM_ERR) ||
1352 (*pkt_hdr & AX_RXHDR_L4CSUM_ERR))
1353 return;
1354
1355 /* It must be a TCP or UDP packet with a valid checksum */
1356 if (((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_TCP) ||
1357 ((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_UDP))
1358 skb->ip_summed = CHECKSUM_UNNECESSARY;
1359}
1360
1361static int ax88179_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1362{
1363 struct sk_buff *ax_skb;
1364 int pkt_cnt;
1365 u32 rx_hdr;
1366 u16 hdr_off;
1367 u32 *pkt_hdr;
1368
1369 /* This check is no longer done by usbnet */
1370 if (skb->len < dev->net->hard_header_len)
1371 return 0;
1372
1373 skb_trim(skb, skb->len - 4);
1374 memcpy(&rx_hdr, skb_tail_pointer(skb), 4);
1375 le32_to_cpus(&rx_hdr);
1376
1377 pkt_cnt = (u16)rx_hdr;
1378 hdr_off = (u16)(rx_hdr >> 16);
1379 pkt_hdr = (u32 *)(skb->data + hdr_off);
1380
1381 while (pkt_cnt--) {
1382 u16 pkt_len;
1383
1384 le32_to_cpus(pkt_hdr);
1385 pkt_len = (*pkt_hdr >> 16) & 0x1fff;
1386
1387 /* Check CRC or runt packet */
1388 if ((*pkt_hdr & AX_RXHDR_CRC_ERR) ||
1389 (*pkt_hdr & AX_RXHDR_DROP_ERR)) {
1390 skb_pull(skb, (pkt_len + 7) & 0xFFF8);
1391 pkt_hdr++;
1392 continue;
1393 }
1394
1395 if (pkt_cnt == 0) {
1396 /* Skip IP alignment psudo header */
1397 skb_pull(skb, 2);
1398 skb->len = pkt_len;
1399 skb_set_tail_pointer(skb, pkt_len);
1400 skb->truesize = pkt_len + sizeof(struct sk_buff);
1401 ax88179_rx_checksum(skb, pkt_hdr);
1402 return 1;
1403 }
1404
1405 ax_skb = skb_clone(skb, GFP_ATOMIC);
1406 if (ax_skb) {
1407 ax_skb->len = pkt_len;
1408 ax_skb->data = skb->data + 2;
1409 skb_set_tail_pointer(ax_skb, pkt_len);
1410 ax_skb->truesize = pkt_len + sizeof(struct sk_buff);
1411 ax88179_rx_checksum(ax_skb, pkt_hdr);
1412 usbnet_skb_return(dev, ax_skb);
1413 } else {
1414 return 0;
1415 }
1416
1417 skb_pull(skb, (pkt_len + 7) & 0xFFF8);
1418 pkt_hdr++;
1419 }
1420 return 1;
1421}
1422
1423static struct sk_buff *
1424ax88179_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags)
1425{
1426 u32 tx_hdr1, tx_hdr2;
1427 int frame_size = dev->maxpacket;
1428 int mss = skb_shinfo(skb)->gso_size;
1429 int headroom;
1430
1431 tx_hdr1 = skb->len;
1432 tx_hdr2 = mss;
1433 if (((skb->len + 8) % frame_size) == 0)
1434 tx_hdr2 |= 0x80008000; /* Enable padding */
1435
1436 headroom = skb_headroom(skb) - 8;
1437
1438 if ((skb_header_cloned(skb) || headroom < 0) &&
1439 pskb_expand_head(skb, headroom < 0 ? 8 : 0, 0, GFP_ATOMIC)) {
1440 dev_kfree_skb_any(skb);
1441 return NULL;
1442 }
1443
1444 skb_push(skb, 4);
1445 cpu_to_le32s(&tx_hdr2);
1446 skb_copy_to_linear_data(skb, &tx_hdr2, 4);
1447
1448 skb_push(skb, 4);
1449 cpu_to_le32s(&tx_hdr1);
1450 skb_copy_to_linear_data(skb, &tx_hdr1, 4);
1451
1452 return skb;
1453}
1454
1455static int ax88179_link_reset(struct usbnet *dev)
1456{
1457 struct ax88179_data *ax179_data = (struct ax88179_data *)dev->data;
1458 u8 tmp[5], link_sts;
1459 u16 mode, tmp16, delay = HZ / 10;
1460 u32 tmp32 = 0x40000000;
1461 unsigned long jtimeout;
1462
1463 jtimeout = jiffies + delay;
1464 while (tmp32 & 0x40000000) {
1465 mode = 0;
1466 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &mode);
1467 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2,
1468 &ax179_data->rxctl);
1469
1470 /*link up, check the usb device control TX FIFO full or empty*/
1471 ax88179_read_cmd(dev, 0x81, 0x8c, 0, 4, &tmp32);
1472
1473 if (time_after(jiffies, jtimeout))
1474 return 0;
1475 }
1476
1477 mode = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1478 AX_MEDIUM_RXFLOW_CTRLEN;
1479
1480 ax88179_read_cmd(dev, AX_ACCESS_MAC, PHYSICAL_LINK_STATUS,
1481 1, 1, &link_sts);
1482
1483 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1484 GMII_PHY_PHYSR, 2, &tmp16);
1485
1486 if (!(tmp16 & GMII_PHY_PHYSR_LINK)) {
1487 return 0;
1488 } else if (GMII_PHY_PHYSR_GIGA == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
1489 mode |= AX_MEDIUM_GIGAMODE | AX_MEDIUM_EN_125MHZ;
1490 if (dev->net->mtu > 1500)
1491 mode |= AX_MEDIUM_JUMBO_EN;
1492
1493 if (link_sts & AX_USB_SS)
1494 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1495 else if (link_sts & AX_USB_HS)
1496 memcpy(tmp, &AX88179_BULKIN_SIZE[1], 5);
1497 else
1498 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1499 } else if (GMII_PHY_PHYSR_100 == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
1500 mode |= AX_MEDIUM_PS;
1501
1502 if (link_sts & (AX_USB_SS | AX_USB_HS))
1503 memcpy(tmp, &AX88179_BULKIN_SIZE[2], 5);
1504 else
1505 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1506 } else {
1507 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1508 }
1509
1510 /* RX bulk configuration */
1511 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1512
1513 dev->rx_urb_size = (1024 * (tmp[3] + 2));
1514
1515 if (tmp16 & GMII_PHY_PHYSR_FULL)
1516 mode |= AX_MEDIUM_FULL_DUPLEX;
1517 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1518 2, 2, &mode);
1519
1520 ax179_data->eee_enabled = ax88179_chk_eee(dev);
1521
1522 netif_carrier_on(dev->net);
1523
1524 return 0;
1525}
1526
1527static int ax88179_reset(struct usbnet *dev)
1528{
1529 u8 buf[5];
1530 u16 *tmp16;
1531 u8 *tmp;
1532 struct ax88179_data *ax179_data = (struct ax88179_data *)dev->data;
1533 struct ethtool_eee eee_data;
1534
1535 tmp16 = (u16 *)buf;
1536 tmp = (u8 *)buf;
1537
1538 /* Power up ethernet PHY */
1539 *tmp16 = 0;
1540 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1541
1542 *tmp16 = AX_PHYPWR_RSTCTL_IPRL;
1543 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1544 msleep(200);
1545
1546 *tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
1547 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
1548 msleep(100);
1549
1550 /* Ethernet PHY Auto Detach*/
1551 ax88179_auto_detach(dev, 0);
1552
1553 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN, ETH_ALEN,
1554 dev->net->dev_addr);
1555 memcpy(dev->net->perm_addr, dev->net->dev_addr, ETH_ALEN);
1556
1557 /* RX bulk configuration */
1558 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1559 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1560
1561 dev->rx_urb_size = 1024 * 20;
1562
1563 *tmp = 0x34;
1564 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
1565
1566 *tmp = 0x52;
1567 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH,
1568 1, 1, tmp);
1569
1570 dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1571 NETIF_F_RXCSUM;
1572
1573 dev->net->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1574 NETIF_F_RXCSUM;
1575
1576 /* Enable checksum offload */
1577 *tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
1578 AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
1579 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);
1580
1581 *tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |
1582 AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
1583 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);
1584
1585 /* Configure RX control register => start operation */
1586 *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
1587 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
1588 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
1589
1590 *tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |
1591 AX_MONITOR_MODE_RWMP;
1592 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);
1593
1594 /* Configure default medium type => giga */
1595 *tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1596 AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX |
1597 AX_MEDIUM_GIGAMODE;
1598 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1599 2, 2, tmp16);
1600
1601 ax88179_led_setting(dev);
1602
1603 ax179_data->eee_enabled = 0;
1604 ax179_data->eee_active = 0;
1605
1606 ax88179_disable_eee(dev);
1607
1608 ax88179_ethtool_get_eee(dev, &eee_data);
1609 eee_data.advertised = 0;
1610 ax88179_ethtool_set_eee(dev, &eee_data);
1611
1612 /* Restart autoneg */
1613 mii_nway_restart(&dev->mii);
1614
1615 usbnet_link_change(dev, 0, 0);
1616
1617 return 0;
1618}
1619
1620static int ax88179_stop(struct usbnet *dev)
1621{
1622 u16 tmp16;
1623
1624 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1625 2, 2, &tmp16);
1626 tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
1627 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1628 2, 2, &tmp16);
1629
1630 return 0;
1631}
1632
1633static const struct driver_info ax88179_info = {
1634 .description = "ASIX AX88179 USB 3.0 Gigabit Ethernet",
1635 .bind = ax88179_bind,
1636 .unbind = ax88179_unbind,
1637 .status = ax88179_status,
1638 .link_reset = ax88179_link_reset,
1639 .reset = ax88179_reset,
1640 .stop = ax88179_stop,
1641 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1642 .rx_fixup = ax88179_rx_fixup,
1643 .tx_fixup = ax88179_tx_fixup,
1644};
1645
1646static const struct driver_info ax88178a_info = {
1647 .description = "ASIX AX88178A USB 2.0 Gigabit Ethernet",
1648 .bind = ax88179_bind,
1649 .unbind = ax88179_unbind,
1650 .status = ax88179_status,
1651 .link_reset = ax88179_link_reset,
1652 .reset = ax88179_reset,
1653 .stop = ax88179_stop,
1654 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1655 .rx_fixup = ax88179_rx_fixup,
1656 .tx_fixup = ax88179_tx_fixup,
1657};
1658
1659static const struct driver_info dlink_dub1312_info = {
1660 .description = "D-Link DUB-1312 USB 3.0 to Gigabit Ethernet Adapter",
1661 .bind = ax88179_bind,
1662 .unbind = ax88179_unbind,
1663 .status = ax88179_status,
1664 .link_reset = ax88179_link_reset,
1665 .reset = ax88179_reset,
1666 .stop = ax88179_stop,
1667 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1668 .rx_fixup = ax88179_rx_fixup,
1669 .tx_fixup = ax88179_tx_fixup,
1670};
1671
1672static const struct driver_info sitecom_info = {
1673 .description = "Sitecom USB 3.0 to Gigabit Adapter",
1674 .bind = ax88179_bind,
1675 .unbind = ax88179_unbind,
1676 .status = ax88179_status,
1677 .link_reset = ax88179_link_reset,
1678 .reset = ax88179_reset,
1679 .stop = ax88179_stop,
1680 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1681 .rx_fixup = ax88179_rx_fixup,
1682 .tx_fixup = ax88179_tx_fixup,
1683};
1684
1685static const struct driver_info samsung_info = {
1686 .description = "Samsung USB Ethernet Adapter",
1687 .bind = ax88179_bind,
1688 .unbind = ax88179_unbind,
1689 .status = ax88179_status,
1690 .link_reset = ax88179_link_reset,
1691 .reset = ax88179_reset,
1692 .stop = ax88179_stop,
1693 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1694 .rx_fixup = ax88179_rx_fixup,
1695 .tx_fixup = ax88179_tx_fixup,
1696};
1697
1698static const struct driver_info lenovo_info = {
1699 .description = "Lenovo OneLinkDock Gigabit LAN",
1700 .bind = ax88179_bind,
1701 .unbind = ax88179_unbind,
1702 .status = ax88179_status,
1703 .link_reset = ax88179_link_reset,
1704 .reset = ax88179_reset,
1705 .stop = ax88179_stop,
1706 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1707 .rx_fixup = ax88179_rx_fixup,
1708 .tx_fixup = ax88179_tx_fixup,
1709};
1710
1711static const struct usb_device_id products[] = {
1712{
1713 /* ASIX AX88179 10/100/1000 */
1714 USB_DEVICE(0x0b95, 0x1790),
1715 .driver_info = (unsigned long)&ax88179_info,
1716}, {
1717 /* ASIX AX88178A 10/100/1000 */
1718 USB_DEVICE(0x0b95, 0x178a),
1719 .driver_info = (unsigned long)&ax88178a_info,
1720}, {
1721 /* D-Link DUB-1312 USB 3.0 to Gigabit Ethernet Adapter */
1722 USB_DEVICE(0x2001, 0x4a00),
1723 .driver_info = (unsigned long)&dlink_dub1312_info,
1724}, {
1725 /* Sitecom USB 3.0 to Gigabit Adapter */
1726 USB_DEVICE(0x0df6, 0x0072),
1727 .driver_info = (unsigned long)&sitecom_info,
1728}, {
1729 /* Samsung USB Ethernet Adapter */
1730 USB_DEVICE(0x04e8, 0xa100),
1731 .driver_info = (unsigned long)&samsung_info,
1732}, {
1733 /* Lenovo OneLinkDock Gigabit LAN */
1734 USB_DEVICE(0x17ef, 0x304b),
1735 .driver_info = (unsigned long)&lenovo_info,
1736},
1737 { },
1738};
1739MODULE_DEVICE_TABLE(usb, products);
1740
1741static struct usb_driver ax88179_178a_driver = {
1742 .name = "ax88179_178a",
1743 .id_table = products,
1744 .probe = usbnet_probe,
1745 .suspend = ax88179_suspend,
1746 .resume = ax88179_resume,
1747 .reset_resume = ax88179_resume,
1748 .disconnect = usbnet_disconnect,
1749 .supports_autosuspend = 1,
1750 .disable_hub_initiated_lpm = 1,
1751};
1752
1753module_usb_driver(ax88179_178a_driver);
1754
1755MODULE_DESCRIPTION("ASIX AX88179/178A based USB 3.0/2.0 Gigabit Ethernet Devices");
1756MODULE_LICENSE("GPL");