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1// SPDX-License-Identifier: GPL-1.0+
2/*
3 * OHCI HCD (Host Controller Driver) for USB.
4 *
5 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
6 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
7 *
8 * [ Initialisation is based on Linus' ]
9 * [ uhci code and gregs ohci fragments ]
10 * [ (C) Copyright 1999 Linus Torvalds ]
11 * [ (C) Copyright 1999 Gregory P. Smith]
12 *
13 * PCI Bus Glue
14 *
15 * This file is licenced under the GPL.
16 */
17
18#include <linux/io.h>
19#include <linux/kernel.h>
20#include <linux/module.h>
21#include <linux/pci.h>
22#include <linux/usb.h>
23#include <linux/usb/hcd.h>
24
25#include "ohci.h"
26#include "pci-quirks.h"
27
28#define DRIVER_DESC "OHCI PCI platform driver"
29
30static const char hcd_name[] = "ohci-pci";
31
32
33/*-------------------------------------------------------------------------*/
34
35static int broken_suspend(struct usb_hcd *hcd)
36{
37 device_init_wakeup(&hcd->self.root_hub->dev, 0);
38 return 0;
39}
40
41/* AMD 756, for most chips (early revs), corrupts register
42 * values on read ... so enable the vendor workaround.
43 */
44static int ohci_quirk_amd756(struct usb_hcd *hcd)
45{
46 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
47
48 ohci->flags = OHCI_QUIRK_AMD756;
49 ohci_dbg (ohci, "AMD756 erratum 4 workaround\n");
50
51 /* also erratum 10 (suspend/resume issues) */
52 return broken_suspend(hcd);
53}
54
55/* Apple's OHCI driver has a lot of bizarre workarounds
56 * for this chip. Evidently control and bulk lists
57 * can get confused. (B&W G3 models, and ...)
58 */
59static int ohci_quirk_opti(struct usb_hcd *hcd)
60{
61 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
62
63 ohci_dbg (ohci, "WARNING: OPTi workarounds unavailable\n");
64
65 return 0;
66}
67
68/* Check for NSC87560. We have to look at the bridge (fn1) to
69 * identify the USB (fn2). This quirk might apply to more or
70 * even all NSC stuff.
71 */
72static int ohci_quirk_ns(struct usb_hcd *hcd)
73{
74 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
75 struct pci_dev *b;
76
77 b = pci_get_slot (pdev->bus, PCI_DEVFN (PCI_SLOT (pdev->devfn), 1));
78 if (b && b->device == PCI_DEVICE_ID_NS_87560_LIO
79 && b->vendor == PCI_VENDOR_ID_NS) {
80 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
81
82 ohci->flags |= OHCI_QUIRK_SUPERIO;
83 ohci_dbg (ohci, "Using NSC SuperIO setup\n");
84 }
85 pci_dev_put(b);
86
87 return 0;
88}
89
90/* Check for Compaq's ZFMicro chipset, which needs short
91 * delays before control or bulk queues get re-activated
92 * in finish_unlinks()
93 */
94static int ohci_quirk_zfmicro(struct usb_hcd *hcd)
95{
96 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
97
98 ohci->flags |= OHCI_QUIRK_ZFMICRO;
99 ohci_dbg(ohci, "enabled Compaq ZFMicro chipset quirks\n");
100
101 return 0;
102}
103
104/* Check for Toshiba SCC OHCI which has big endian registers
105 * and little endian in memory data structures
106 */
107static int ohci_quirk_toshiba_scc(struct usb_hcd *hcd)
108{
109 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
110
111 /* That chip is only present in the southbridge of some
112 * cell based platforms which are supposed to select
113 * CONFIG_USB_OHCI_BIG_ENDIAN_MMIO. We verify here if
114 * that was the case though.
115 */
116#ifdef CONFIG_USB_OHCI_BIG_ENDIAN_MMIO
117 ohci->flags |= OHCI_QUIRK_BE_MMIO;
118 ohci_dbg (ohci, "enabled big endian Toshiba quirk\n");
119 return 0;
120#else
121 ohci_err (ohci, "unsupported big endian Toshiba quirk\n");
122 return -ENXIO;
123#endif
124}
125
126/* Check for NEC chip and apply quirk for allegedly lost interrupts.
127 */
128
129static void ohci_quirk_nec_worker(struct work_struct *work)
130{
131 struct ohci_hcd *ohci = container_of(work, struct ohci_hcd, nec_work);
132 int status;
133
134 status = ohci_restart(ohci);
135 if (status != 0)
136 ohci_err(ohci, "Restarting NEC controller failed in %s, %d\n",
137 "ohci_restart", status);
138}
139
140static int ohci_quirk_nec(struct usb_hcd *hcd)
141{
142 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
143
144 ohci->flags |= OHCI_QUIRK_NEC;
145 INIT_WORK(&ohci->nec_work, ohci_quirk_nec_worker);
146 ohci_dbg (ohci, "enabled NEC chipset lost interrupt quirk\n");
147
148 return 0;
149}
150
151static int ohci_quirk_amd700(struct usb_hcd *hcd)
152{
153 struct ohci_hcd *ohci = hcd_to_ohci(hcd);
154
155 if (usb_amd_quirk_pll_check())
156 ohci->flags |= OHCI_QUIRK_AMD_PLL;
157
158 /* SB800 needs pre-fetch fix */
159 if (usb_amd_prefetch_quirk()) {
160 ohci->flags |= OHCI_QUIRK_AMD_PREFETCH;
161 ohci_dbg(ohci, "enabled AMD prefetch quirk\n");
162 }
163
164 ohci->flags |= OHCI_QUIRK_GLOBAL_SUSPEND;
165 return 0;
166}
167
168static int ohci_quirk_qemu(struct usb_hcd *hcd)
169{
170 struct ohci_hcd *ohci = hcd_to_ohci(hcd);
171
172 ohci->flags |= OHCI_QUIRK_QEMU;
173 ohci_dbg(ohci, "enabled qemu quirk\n");
174 return 0;
175}
176
177/* List of quirks for OHCI */
178static const struct pci_device_id ohci_pci_quirks[] = {
179 {
180 PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x740c),
181 .driver_data = (unsigned long)ohci_quirk_amd756,
182 },
183 {
184 PCI_DEVICE(PCI_VENDOR_ID_OPTI, 0xc861),
185 .driver_data = (unsigned long)ohci_quirk_opti,
186 },
187 {
188 PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_ANY_ID),
189 .driver_data = (unsigned long)ohci_quirk_ns,
190 },
191 {
192 PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xa0f8),
193 .driver_data = (unsigned long)ohci_quirk_zfmicro,
194 },
195 {
196 PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, 0x01b6),
197 .driver_data = (unsigned long)ohci_quirk_toshiba_scc,
198 },
199 {
200 PCI_DEVICE(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB),
201 .driver_data = (unsigned long)ohci_quirk_nec,
202 },
203 {
204 /* Toshiba portege 4000 */
205 .vendor = PCI_VENDOR_ID_AL,
206 .device = 0x5237,
207 .subvendor = PCI_VENDOR_ID_TOSHIBA,
208 .subdevice = 0x0004,
209 .driver_data = (unsigned long) broken_suspend,
210 },
211 {
212 PCI_DEVICE(PCI_VENDOR_ID_ITE, 0x8152),
213 .driver_data = (unsigned long) broken_suspend,
214 },
215 {
216 PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4397),
217 .driver_data = (unsigned long)ohci_quirk_amd700,
218 },
219 {
220 PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4398),
221 .driver_data = (unsigned long)ohci_quirk_amd700,
222 },
223 {
224 PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4399),
225 .driver_data = (unsigned long)ohci_quirk_amd700,
226 },
227 {
228 .vendor = PCI_VENDOR_ID_APPLE,
229 .device = 0x003f,
230 .subvendor = PCI_SUBVENDOR_ID_REDHAT_QUMRANET,
231 .subdevice = PCI_SUBDEVICE_ID_QEMU,
232 .driver_data = (unsigned long)ohci_quirk_qemu,
233 },
234
235 {},
236};
237
238static int ohci_pci_reset (struct usb_hcd *hcd)
239{
240 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
241 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
242 int ret = 0;
243
244 if (hcd->self.controller) {
245 const struct pci_device_id *quirk_id;
246
247 quirk_id = pci_match_id(ohci_pci_quirks, pdev);
248 if (quirk_id != NULL) {
249 int (*quirk)(struct usb_hcd *ohci);
250 quirk = (void *)quirk_id->driver_data;
251 ret = quirk(hcd);
252 }
253 }
254
255 if (ret == 0)
256 ret = ohci_setup(hcd);
257 /*
258 * After ohci setup RWC may not be set for add-in PCI cards.
259 * This transfers PCI PM wakeup capabilities.
260 */
261 if (device_can_wakeup(&pdev->dev))
262 ohci->hc_control |= OHCI_CTRL_RWC;
263 return ret;
264}
265
266static struct hc_driver __read_mostly ohci_pci_hc_driver;
267
268static const struct ohci_driver_overrides pci_overrides __initconst = {
269 .product_desc = "OHCI PCI host controller",
270 .reset = ohci_pci_reset,
271};
272
273static const struct pci_device_id pci_ids[] = { {
274 /* handle any USB OHCI controller */
275 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_OHCI, ~0),
276 }, {
277 /* The device in the ConneXT I/O hub has no class reg */
278 PCI_VDEVICE(STMICRO, PCI_DEVICE_ID_STMICRO_USB_OHCI),
279 }, { /* end: all zeroes */ }
280};
281MODULE_DEVICE_TABLE (pci, pci_ids);
282
283static int ohci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
284{
285 return usb_hcd_pci_probe(dev, &ohci_pci_hc_driver);
286}
287
288/* pci driver glue; this is a "new style" PCI driver module */
289static struct pci_driver ohci_pci_driver = {
290 .name = hcd_name,
291 .id_table = pci_ids,
292
293 .probe = ohci_pci_probe,
294 .remove = usb_hcd_pci_remove,
295 .shutdown = usb_hcd_pci_shutdown,
296
297#ifdef CONFIG_PM
298 .driver = {
299 .pm = &usb_hcd_pci_pm_ops
300 },
301#endif
302};
303
304#ifdef CONFIG_PM
305static int ohci_pci_resume(struct usb_hcd *hcd, pm_message_t msg)
306{
307 return ohci_resume(hcd, msg.event == PM_EVENT_RESTORE);
308}
309#endif
310static int __init ohci_pci_init(void)
311{
312 if (usb_disabled())
313 return -ENODEV;
314
315 ohci_init_driver(&ohci_pci_hc_driver, &pci_overrides);
316
317#ifdef CONFIG_PM
318 /* Entries for the PCI suspend/resume callbacks are special */
319 ohci_pci_hc_driver.pci_suspend = ohci_suspend;
320 ohci_pci_hc_driver.pci_resume = ohci_pci_resume;
321#endif
322
323 return pci_register_driver(&ohci_pci_driver);
324}
325module_init(ohci_pci_init);
326
327static void __exit ohci_pci_cleanup(void)
328{
329 pci_unregister_driver(&ohci_pci_driver);
330}
331module_exit(ohci_pci_cleanup);
332
333MODULE_DESCRIPTION(DRIVER_DESC);
334MODULE_LICENSE("GPL");
335MODULE_SOFTDEP("pre: ehci_pci");
1// SPDX-License-Identifier: GPL-1.0+
2/*
3 * OHCI HCD (Host Controller Driver) for USB.
4 *
5 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
6 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
7 *
8 * [ Initialisation is based on Linus' ]
9 * [ uhci code and gregs ohci fragments ]
10 * [ (C) Copyright 1999 Linus Torvalds ]
11 * [ (C) Copyright 1999 Gregory P. Smith]
12 *
13 * PCI Bus Glue
14 *
15 * This file is licenced under the GPL.
16 */
17
18#include <linux/io.h>
19#include <linux/kernel.h>
20#include <linux/module.h>
21#include <linux/pci.h>
22#include <linux/usb.h>
23#include <linux/usb/hcd.h>
24
25#include "ohci.h"
26#include "pci-quirks.h"
27
28#define DRIVER_DESC "OHCI PCI platform driver"
29
30static const char hcd_name[] = "ohci-pci";
31
32
33/*-------------------------------------------------------------------------*/
34
35static int broken_suspend(struct usb_hcd *hcd)
36{
37 device_init_wakeup(&hcd->self.root_hub->dev, 0);
38 return 0;
39}
40
41/* AMD 756, for most chips (early revs), corrupts register
42 * values on read ... so enable the vendor workaround.
43 */
44static int ohci_quirk_amd756(struct usb_hcd *hcd)
45{
46 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
47
48 ohci->flags = OHCI_QUIRK_AMD756;
49 ohci_dbg (ohci, "AMD756 erratum 4 workaround\n");
50
51 /* also erratum 10 (suspend/resume issues) */
52 return broken_suspend(hcd);
53}
54
55/* Apple's OHCI driver has a lot of bizarre workarounds
56 * for this chip. Evidently control and bulk lists
57 * can get confused. (B&W G3 models, and ...)
58 */
59static int ohci_quirk_opti(struct usb_hcd *hcd)
60{
61 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
62
63 ohci_dbg (ohci, "WARNING: OPTi workarounds unavailable\n");
64
65 return 0;
66}
67
68/* Check for NSC87560. We have to look at the bridge (fn1) to
69 * identify the USB (fn2). This quirk might apply to more or
70 * even all NSC stuff.
71 */
72static int ohci_quirk_ns(struct usb_hcd *hcd)
73{
74 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
75 struct pci_dev *b;
76
77 b = pci_get_slot (pdev->bus, PCI_DEVFN (PCI_SLOT (pdev->devfn), 1));
78 if (b && b->device == PCI_DEVICE_ID_NS_87560_LIO
79 && b->vendor == PCI_VENDOR_ID_NS) {
80 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
81
82 ohci->flags |= OHCI_QUIRK_SUPERIO;
83 ohci_dbg (ohci, "Using NSC SuperIO setup\n");
84 }
85 pci_dev_put(b);
86
87 return 0;
88}
89
90/* Check for Compaq's ZFMicro chipset, which needs short
91 * delays before control or bulk queues get re-activated
92 * in finish_unlinks()
93 */
94static int ohci_quirk_zfmicro(struct usb_hcd *hcd)
95{
96 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
97
98 ohci->flags |= OHCI_QUIRK_ZFMICRO;
99 ohci_dbg(ohci, "enabled Compaq ZFMicro chipset quirks\n");
100
101 return 0;
102}
103
104/* Check for Toshiba SCC OHCI which has big endian registers
105 * and little endian in memory data structures
106 */
107static int ohci_quirk_toshiba_scc(struct usb_hcd *hcd)
108{
109 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
110
111 /* That chip is only present in the southbridge of some
112 * cell based platforms which are supposed to select
113 * CONFIG_USB_OHCI_BIG_ENDIAN_MMIO. We verify here if
114 * that was the case though.
115 */
116#ifdef CONFIG_USB_OHCI_BIG_ENDIAN_MMIO
117 ohci->flags |= OHCI_QUIRK_BE_MMIO;
118 ohci_dbg (ohci, "enabled big endian Toshiba quirk\n");
119 return 0;
120#else
121 ohci_err (ohci, "unsupported big endian Toshiba quirk\n");
122 return -ENXIO;
123#endif
124}
125
126/* Check for NEC chip and apply quirk for allegedly lost interrupts.
127 */
128
129static void ohci_quirk_nec_worker(struct work_struct *work)
130{
131 struct ohci_hcd *ohci = container_of(work, struct ohci_hcd, nec_work);
132 int status;
133
134 status = ohci_restart(ohci);
135 if (status != 0)
136 ohci_err(ohci, "Restarting NEC controller failed in %s, %d\n",
137 "ohci_restart", status);
138}
139
140static int ohci_quirk_nec(struct usb_hcd *hcd)
141{
142 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
143
144 ohci->flags |= OHCI_QUIRK_NEC;
145 INIT_WORK(&ohci->nec_work, ohci_quirk_nec_worker);
146 ohci_dbg (ohci, "enabled NEC chipset lost interrupt quirk\n");
147
148 return 0;
149}
150
151static int ohci_quirk_amd700(struct usb_hcd *hcd)
152{
153 struct ohci_hcd *ohci = hcd_to_ohci(hcd);
154
155 if (usb_amd_quirk_pll_check())
156 ohci->flags |= OHCI_QUIRK_AMD_PLL;
157
158 /* SB800 needs pre-fetch fix */
159 if (usb_amd_prefetch_quirk()) {
160 ohci->flags |= OHCI_QUIRK_AMD_PREFETCH;
161 ohci_dbg(ohci, "enabled AMD prefetch quirk\n");
162 }
163
164 ohci->flags |= OHCI_QUIRK_GLOBAL_SUSPEND;
165 return 0;
166}
167
168static int ohci_quirk_qemu(struct usb_hcd *hcd)
169{
170 struct ohci_hcd *ohci = hcd_to_ohci(hcd);
171
172 ohci->flags |= OHCI_QUIRK_QEMU;
173 ohci_dbg(ohci, "enabled qemu quirk\n");
174 return 0;
175}
176
177/* List of quirks for OHCI */
178static const struct pci_device_id ohci_pci_quirks[] = {
179 {
180 PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x740c),
181 .driver_data = (unsigned long)ohci_quirk_amd756,
182 },
183 {
184 PCI_DEVICE(PCI_VENDOR_ID_OPTI, 0xc861),
185 .driver_data = (unsigned long)ohci_quirk_opti,
186 },
187 {
188 PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_ANY_ID),
189 .driver_data = (unsigned long)ohci_quirk_ns,
190 },
191 {
192 PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xa0f8),
193 .driver_data = (unsigned long)ohci_quirk_zfmicro,
194 },
195 {
196 PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, 0x01b6),
197 .driver_data = (unsigned long)ohci_quirk_toshiba_scc,
198 },
199 {
200 PCI_DEVICE(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB),
201 .driver_data = (unsigned long)ohci_quirk_nec,
202 },
203 {
204 /* Toshiba portege 4000 */
205 .vendor = PCI_VENDOR_ID_AL,
206 .device = 0x5237,
207 .subvendor = PCI_VENDOR_ID_TOSHIBA,
208 .subdevice = 0x0004,
209 .driver_data = (unsigned long) broken_suspend,
210 },
211 {
212 PCI_DEVICE(PCI_VENDOR_ID_ITE, 0x8152),
213 .driver_data = (unsigned long) broken_suspend,
214 },
215 {
216 PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4397),
217 .driver_data = (unsigned long)ohci_quirk_amd700,
218 },
219 {
220 PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4398),
221 .driver_data = (unsigned long)ohci_quirk_amd700,
222 },
223 {
224 PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4399),
225 .driver_data = (unsigned long)ohci_quirk_amd700,
226 },
227 {
228 .vendor = PCI_VENDOR_ID_APPLE,
229 .device = 0x003f,
230 .subvendor = PCI_SUBVENDOR_ID_REDHAT_QUMRANET,
231 .subdevice = PCI_SUBDEVICE_ID_QEMU,
232 .driver_data = (unsigned long)ohci_quirk_qemu,
233 },
234
235 {},
236};
237
238static int ohci_pci_reset (struct usb_hcd *hcd)
239{
240 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
241 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
242 int ret = 0;
243
244 if (hcd->self.controller) {
245 const struct pci_device_id *quirk_id;
246
247 quirk_id = pci_match_id(ohci_pci_quirks, pdev);
248 if (quirk_id != NULL) {
249 int (*quirk)(struct usb_hcd *ohci);
250 quirk = (void *)quirk_id->driver_data;
251 ret = quirk(hcd);
252 }
253 }
254
255 if (ret == 0)
256 ret = ohci_setup(hcd);
257 /*
258 * After ohci setup RWC may not be set for add-in PCI cards.
259 * This transfers PCI PM wakeup capabilities.
260 */
261 if (device_can_wakeup(&pdev->dev))
262 ohci->hc_control |= OHCI_CTRL_RWC;
263 return ret;
264}
265
266static struct hc_driver __read_mostly ohci_pci_hc_driver;
267
268static const struct ohci_driver_overrides pci_overrides __initconst = {
269 .product_desc = "OHCI PCI host controller",
270 .reset = ohci_pci_reset,
271};
272
273static const struct pci_device_id pci_ids[] = { {
274 /* handle any USB OHCI controller */
275 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_OHCI, ~0),
276 }, {
277 /* The device in the ConneXT I/O hub has no class reg */
278 PCI_VDEVICE(STMICRO, PCI_DEVICE_ID_STMICRO_USB_OHCI),
279 }, { /* end: all zeroes */ }
280};
281MODULE_DEVICE_TABLE (pci, pci_ids);
282
283static int ohci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
284{
285 return usb_hcd_pci_probe(dev, &ohci_pci_hc_driver);
286}
287
288/* pci driver glue; this is a "new style" PCI driver module */
289static struct pci_driver ohci_pci_driver = {
290 .name = hcd_name,
291 .id_table = pci_ids,
292
293 .probe = ohci_pci_probe,
294 .remove = usb_hcd_pci_remove,
295 .shutdown = usb_hcd_pci_shutdown,
296
297#ifdef CONFIG_PM
298 .driver = {
299 .pm = &usb_hcd_pci_pm_ops
300 },
301#endif
302};
303
304static int __init ohci_pci_init(void)
305{
306 if (usb_disabled())
307 return -ENODEV;
308
309 ohci_init_driver(&ohci_pci_hc_driver, &pci_overrides);
310
311#ifdef CONFIG_PM
312 /* Entries for the PCI suspend/resume callbacks are special */
313 ohci_pci_hc_driver.pci_suspend = ohci_suspend;
314 ohci_pci_hc_driver.pci_resume = ohci_resume;
315#endif
316
317 return pci_register_driver(&ohci_pci_driver);
318}
319module_init(ohci_pci_init);
320
321static void __exit ohci_pci_cleanup(void)
322{
323 pci_unregister_driver(&ohci_pci_driver);
324}
325module_exit(ohci_pci_cleanup);
326
327MODULE_DESCRIPTION(DRIVER_DESC);
328MODULE_LICENSE("GPL");
329MODULE_SOFTDEP("pre: ehci_pci");