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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
4 */
5
6#ifndef _ASM_ARC_ATOMIC_H
7#define _ASM_ARC_ATOMIC_H
8
9#ifndef __ASSEMBLY__
10
11#include <linux/types.h>
12#include <linux/compiler.h>
13#include <asm/cmpxchg.h>
14#include <asm/barrier.h>
15#include <asm/smp.h>
16
17#define arch_atomic_read(v) READ_ONCE((v)->counter)
18
19#ifdef CONFIG_ARC_HAS_LLSC
20#include <asm/atomic-llsc.h>
21#else
22#include <asm/atomic-spinlock.h>
23#endif
24
25/*
26 * 64-bit atomics
27 */
28#ifdef CONFIG_GENERIC_ATOMIC64
29#include <asm-generic/atomic64.h>
30#else
31#include <asm/atomic64-arcv2.h>
32#endif
33
34#endif /* !__ASSEMBLY__ */
35
36#endif
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
4 */
5
6#ifndef _ASM_ARC_ATOMIC_H
7#define _ASM_ARC_ATOMIC_H
8
9#ifndef __ASSEMBLY__
10
11#include <linux/types.h>
12#include <linux/compiler.h>
13#include <asm/cmpxchg.h>
14#include <asm/barrier.h>
15#include <asm/smp.h>
16
17#define arch_atomic_read(v) READ_ONCE((v)->counter)
18
19#ifdef CONFIG_ARC_HAS_LLSC
20#include <asm/atomic-llsc.h>
21#else
22#include <asm/atomic-spinlock.h>
23#endif
24
25#define arch_atomic_cmpxchg(v, o, n) \
26({ \
27 arch_cmpxchg(&((v)->counter), (o), (n)); \
28})
29
30#ifdef arch_cmpxchg_relaxed
31#define arch_atomic_cmpxchg_relaxed(v, o, n) \
32({ \
33 arch_cmpxchg_relaxed(&((v)->counter), (o), (n)); \
34})
35#endif
36
37#define arch_atomic_xchg(v, n) \
38({ \
39 arch_xchg(&((v)->counter), (n)); \
40})
41
42#ifdef arch_xchg_relaxed
43#define arch_atomic_xchg_relaxed(v, n) \
44({ \
45 arch_xchg_relaxed(&((v)->counter), (n)); \
46})
47#endif
48
49/*
50 * 64-bit atomics
51 */
52#ifdef CONFIG_GENERIC_ATOMIC64
53#include <asm-generic/atomic64.h>
54#else
55#include <asm/atomic64-arcv2.h>
56#endif
57
58#endif /* !__ASSEMBLY__ */
59
60#endif