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1// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2/*
3 * Copyright (C) 2012-2014, 2018-2019, 2021-2023 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
6 */
7#include <linux/firmware.h>
8#include <linux/rtnetlink.h>
9#include "iwl-trans.h"
10#include "iwl-csr.h"
11#include "mvm.h"
12#include "iwl-eeprom-parse.h"
13#include "iwl-eeprom-read.h"
14#include "iwl-nvm-parse.h"
15#include "iwl-prph.h"
16#include "fw/acpi.h"
17
18/* Default NVM size to read */
19#define IWL_NVM_DEFAULT_CHUNK_SIZE (2 * 1024)
20
21#define NVM_WRITE_OPCODE 1
22#define NVM_READ_OPCODE 0
23
24/* load nvm chunk response */
25enum {
26 READ_NVM_CHUNK_SUCCEED = 0,
27 READ_NVM_CHUNK_NOT_VALID_ADDRESS = 1
28};
29
30/*
31 * prepare the NVM host command w/ the pointers to the nvm buffer
32 * and send it to fw
33 */
34static int iwl_nvm_write_chunk(struct iwl_mvm *mvm, u16 section,
35 u16 offset, u16 length, const u8 *data)
36{
37 struct iwl_nvm_access_cmd nvm_access_cmd = {
38 .offset = cpu_to_le16(offset),
39 .length = cpu_to_le16(length),
40 .type = cpu_to_le16(section),
41 .op_code = NVM_WRITE_OPCODE,
42 };
43 struct iwl_host_cmd cmd = {
44 .id = NVM_ACCESS_CMD,
45 .len = { sizeof(struct iwl_nvm_access_cmd), length },
46 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
47 .data = { &nvm_access_cmd, data },
48 /* data may come from vmalloc, so use _DUP */
49 .dataflags = { 0, IWL_HCMD_DFL_DUP },
50 };
51 struct iwl_rx_packet *pkt;
52 struct iwl_nvm_access_resp *nvm_resp;
53 int ret;
54
55 ret = iwl_mvm_send_cmd(mvm, &cmd);
56 if (ret)
57 return ret;
58
59 pkt = cmd.resp_pkt;
60 /* Extract & check NVM write response */
61 nvm_resp = (void *)pkt->data;
62 if (le16_to_cpu(nvm_resp->status) != READ_NVM_CHUNK_SUCCEED) {
63 IWL_ERR(mvm,
64 "NVM access write command failed for section %u (status = 0x%x)\n",
65 section, le16_to_cpu(nvm_resp->status));
66 ret = -EIO;
67 }
68
69 iwl_free_resp(&cmd);
70 return ret;
71}
72
73static int iwl_nvm_read_chunk(struct iwl_mvm *mvm, u16 section,
74 u16 offset, u16 length, u8 *data)
75{
76 struct iwl_nvm_access_cmd nvm_access_cmd = {
77 .offset = cpu_to_le16(offset),
78 .length = cpu_to_le16(length),
79 .type = cpu_to_le16(section),
80 .op_code = NVM_READ_OPCODE,
81 };
82 struct iwl_nvm_access_resp *nvm_resp;
83 struct iwl_rx_packet *pkt;
84 struct iwl_host_cmd cmd = {
85 .id = NVM_ACCESS_CMD,
86 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
87 .data = { &nvm_access_cmd, },
88 };
89 int ret, bytes_read, offset_read;
90 u8 *resp_data;
91
92 cmd.len[0] = sizeof(struct iwl_nvm_access_cmd);
93
94 ret = iwl_mvm_send_cmd(mvm, &cmd);
95 if (ret)
96 return ret;
97
98 pkt = cmd.resp_pkt;
99
100 /* Extract NVM response */
101 nvm_resp = (void *)pkt->data;
102 ret = le16_to_cpu(nvm_resp->status);
103 bytes_read = le16_to_cpu(nvm_resp->length);
104 offset_read = le16_to_cpu(nvm_resp->offset);
105 resp_data = nvm_resp->data;
106 if (ret) {
107 if ((offset != 0) &&
108 (ret == READ_NVM_CHUNK_NOT_VALID_ADDRESS)) {
109 /*
110 * meaning of NOT_VALID_ADDRESS:
111 * driver try to read chunk from address that is
112 * multiple of 2K and got an error since addr is empty.
113 * meaning of (offset != 0): driver already
114 * read valid data from another chunk so this case
115 * is not an error.
116 */
117 IWL_DEBUG_EEPROM(mvm->trans->dev,
118 "NVM access command failed on offset 0x%x since that section size is multiple 2K\n",
119 offset);
120 ret = 0;
121 } else {
122 IWL_DEBUG_EEPROM(mvm->trans->dev,
123 "NVM access command failed with status %d (device: %s)\n",
124 ret, mvm->trans->name);
125 ret = -ENODATA;
126 }
127 goto exit;
128 }
129
130 if (offset_read != offset) {
131 IWL_ERR(mvm, "NVM ACCESS response with invalid offset %d\n",
132 offset_read);
133 ret = -EINVAL;
134 goto exit;
135 }
136
137 /* Write data to NVM */
138 memcpy(data + offset, resp_data, bytes_read);
139 ret = bytes_read;
140
141exit:
142 iwl_free_resp(&cmd);
143 return ret;
144}
145
146static int iwl_nvm_write_section(struct iwl_mvm *mvm, u16 section,
147 const u8 *data, u16 length)
148{
149 int offset = 0;
150
151 /* copy data in chunks of 2k (and remainder if any) */
152
153 while (offset < length) {
154 int chunk_size, ret;
155
156 chunk_size = min(IWL_NVM_DEFAULT_CHUNK_SIZE,
157 length - offset);
158
159 ret = iwl_nvm_write_chunk(mvm, section, offset,
160 chunk_size, data + offset);
161 if (ret < 0)
162 return ret;
163
164 offset += chunk_size;
165 }
166
167 return 0;
168}
169
170/*
171 * Reads an NVM section completely.
172 * NICs prior to 7000 family doesn't have a real NVM, but just read
173 * section 0 which is the EEPROM. Because the EEPROM reading is unlimited
174 * by uCode, we need to manually check in this case that we don't
175 * overflow and try to read more than the EEPROM size.
176 * For 7000 family NICs, we supply the maximal size we can read, and
177 * the uCode fills the response with as much data as we can,
178 * without overflowing, so no check is needed.
179 */
180static int iwl_nvm_read_section(struct iwl_mvm *mvm, u16 section,
181 u8 *data, u32 size_read)
182{
183 u16 length, offset = 0;
184 int ret;
185
186 /* Set nvm section read length */
187 length = IWL_NVM_DEFAULT_CHUNK_SIZE;
188
189 ret = length;
190
191 /* Read the NVM until exhausted (reading less than requested) */
192 while (ret == length) {
193 /* Check no memory assumptions fail and cause an overflow */
194 if ((size_read + offset + length) >
195 mvm->trans->trans_cfg->base_params->eeprom_size) {
196 IWL_ERR(mvm, "EEPROM size is too small for NVM\n");
197 return -ENOBUFS;
198 }
199
200 ret = iwl_nvm_read_chunk(mvm, section, offset, length, data);
201 if (ret < 0) {
202 IWL_DEBUG_EEPROM(mvm->trans->dev,
203 "Cannot read NVM from section %d offset %d, length %d\n",
204 section, offset, length);
205 return ret;
206 }
207 offset += ret;
208 }
209
210 iwl_nvm_fixups(mvm->trans->hw_id, section, data, offset);
211
212 IWL_DEBUG_EEPROM(mvm->trans->dev,
213 "NVM section %d read completed\n", section);
214 return offset;
215}
216
217static struct iwl_nvm_data *
218iwl_parse_nvm_sections(struct iwl_mvm *mvm)
219{
220 struct iwl_nvm_section *sections = mvm->nvm_sections;
221 const __be16 *hw;
222 const __le16 *sw, *calib, *regulatory, *mac_override, *phy_sku;
223 u8 tx_ant = mvm->fw->valid_tx_ant;
224 u8 rx_ant = mvm->fw->valid_rx_ant;
225 int regulatory_type;
226
227 /* Checking for required sections */
228 if (mvm->trans->cfg->nvm_type == IWL_NVM) {
229 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
230 !mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data) {
231 IWL_ERR(mvm, "Can't parse empty OTP/NVM sections\n");
232 return NULL;
233 }
234 } else {
235 if (mvm->trans->cfg->nvm_type == IWL_NVM_SDP)
236 regulatory_type = NVM_SECTION_TYPE_REGULATORY_SDP;
237 else
238 regulatory_type = NVM_SECTION_TYPE_REGULATORY;
239
240 /* SW and REGULATORY sections are mandatory */
241 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
242 !mvm->nvm_sections[regulatory_type].data) {
243 IWL_ERR(mvm,
244 "Can't parse empty family 8000 OTP/NVM sections\n");
245 return NULL;
246 }
247 /* MAC_OVERRIDE or at least HW section must exist */
248 if (!mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data &&
249 !mvm->nvm_sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data) {
250 IWL_ERR(mvm,
251 "Can't parse mac_address, empty sections\n");
252 return NULL;
253 }
254
255 /* PHY_SKU section is mandatory in B0 */
256 if (mvm->trans->cfg->nvm_type == IWL_NVM_EXT &&
257 !mvm->nvm_sections[NVM_SECTION_TYPE_PHY_SKU].data) {
258 IWL_ERR(mvm,
259 "Can't parse phy_sku in B0, empty sections\n");
260 return NULL;
261 }
262 }
263
264 hw = (const __be16 *)sections[mvm->cfg->nvm_hw_section_num].data;
265 sw = (const __le16 *)sections[NVM_SECTION_TYPE_SW].data;
266 calib = (const __le16 *)sections[NVM_SECTION_TYPE_CALIBRATION].data;
267 mac_override =
268 (const __le16 *)sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data;
269 phy_sku = (const __le16 *)sections[NVM_SECTION_TYPE_PHY_SKU].data;
270
271 regulatory = mvm->trans->cfg->nvm_type == IWL_NVM_SDP ?
272 (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY_SDP].data :
273 (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY].data;
274
275 if (mvm->set_tx_ant)
276 tx_ant &= mvm->set_tx_ant;
277
278 if (mvm->set_rx_ant)
279 rx_ant &= mvm->set_rx_ant;
280
281 return iwl_parse_nvm_data(mvm->trans, mvm->cfg, mvm->fw, hw, sw, calib,
282 regulatory, mac_override, phy_sku,
283 tx_ant, rx_ant);
284}
285
286/* Loads the NVM data stored in mvm->nvm_sections into the NIC */
287int iwl_mvm_load_nvm_to_nic(struct iwl_mvm *mvm)
288{
289 int i, ret = 0;
290 struct iwl_nvm_section *sections = mvm->nvm_sections;
291
292 IWL_DEBUG_EEPROM(mvm->trans->dev, "'Write to NVM\n");
293
294 for (i = 0; i < ARRAY_SIZE(mvm->nvm_sections); i++) {
295 if (!mvm->nvm_sections[i].data || !mvm->nvm_sections[i].length)
296 continue;
297 ret = iwl_nvm_write_section(mvm, i, sections[i].data,
298 sections[i].length);
299 if (ret < 0) {
300 IWL_ERR(mvm, "iwl_mvm_send_cmd failed: %d\n", ret);
301 break;
302 }
303 }
304 return ret;
305}
306
307int iwl_nvm_init(struct iwl_mvm *mvm)
308{
309 int ret, section;
310 u32 size_read = 0;
311 u8 *nvm_buffer, *temp;
312 const char *nvm_file_C = mvm->cfg->default_nvm_file_C_step;
313
314 if (WARN_ON_ONCE(mvm->cfg->nvm_hw_section_num >= NVM_MAX_NUM_SECTIONS))
315 return -EINVAL;
316
317 /* load NVM values from nic */
318 /* Read From FW NVM */
319 IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from NVM\n");
320
321 nvm_buffer = kmalloc(mvm->trans->trans_cfg->base_params->eeprom_size,
322 GFP_KERNEL);
323 if (!nvm_buffer)
324 return -ENOMEM;
325 for (section = 0; section < NVM_MAX_NUM_SECTIONS; section++) {
326 /* we override the constness for initial read */
327 ret = iwl_nvm_read_section(mvm, section, nvm_buffer,
328 size_read);
329 if (ret == -ENODATA) {
330 ret = 0;
331 continue;
332 }
333 if (ret < 0)
334 break;
335 size_read += ret;
336 temp = kmemdup(nvm_buffer, ret, GFP_KERNEL);
337 if (!temp) {
338 ret = -ENOMEM;
339 break;
340 }
341
342 iwl_nvm_fixups(mvm->trans->hw_id, section, temp, ret);
343
344 mvm->nvm_sections[section].data = temp;
345 mvm->nvm_sections[section].length = ret;
346
347#ifdef CONFIG_IWLWIFI_DEBUGFS
348 switch (section) {
349 case NVM_SECTION_TYPE_SW:
350 mvm->nvm_sw_blob.data = temp;
351 mvm->nvm_sw_blob.size = ret;
352 break;
353 case NVM_SECTION_TYPE_CALIBRATION:
354 mvm->nvm_calib_blob.data = temp;
355 mvm->nvm_calib_blob.size = ret;
356 break;
357 case NVM_SECTION_TYPE_PRODUCTION:
358 mvm->nvm_prod_blob.data = temp;
359 mvm->nvm_prod_blob.size = ret;
360 break;
361 case NVM_SECTION_TYPE_PHY_SKU:
362 mvm->nvm_phy_sku_blob.data = temp;
363 mvm->nvm_phy_sku_blob.size = ret;
364 break;
365 case NVM_SECTION_TYPE_REGULATORY_SDP:
366 case NVM_SECTION_TYPE_REGULATORY:
367 mvm->nvm_reg_blob.data = temp;
368 mvm->nvm_reg_blob.size = ret;
369 break;
370 default:
371 if (section == mvm->cfg->nvm_hw_section_num) {
372 mvm->nvm_hw_blob.data = temp;
373 mvm->nvm_hw_blob.size = ret;
374 break;
375 }
376 }
377#endif
378 }
379 if (!size_read)
380 IWL_ERR(mvm, "OTP is blank\n");
381 kfree(nvm_buffer);
382
383 /* Only if PNVM selected in the mod param - load external NVM */
384 if (mvm->nvm_file_name) {
385 /* read External NVM file from the mod param */
386 ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
387 mvm->nvm_sections);
388 if (ret) {
389 mvm->nvm_file_name = nvm_file_C;
390
391 if ((ret == -EFAULT || ret == -ENOENT) &&
392 mvm->nvm_file_name) {
393 /* in case nvm file was failed try again */
394 ret = iwl_read_external_nvm(mvm->trans,
395 mvm->nvm_file_name,
396 mvm->nvm_sections);
397 if (ret)
398 return ret;
399 } else {
400 return ret;
401 }
402 }
403 }
404
405 /* parse the relevant nvm sections */
406 mvm->nvm_data = iwl_parse_nvm_sections(mvm);
407 if (!mvm->nvm_data)
408 return -ENODATA;
409 IWL_DEBUG_EEPROM(mvm->trans->dev, "nvm version = %x\n",
410 mvm->nvm_data->nvm_version);
411
412 return ret < 0 ? ret : 0;
413}
414
415struct iwl_mcc_update_resp_v8 *
416iwl_mvm_update_mcc(struct iwl_mvm *mvm, const char *alpha2,
417 enum iwl_mcc_source src_id)
418{
419 struct iwl_mcc_update_cmd mcc_update_cmd = {
420 .mcc = cpu_to_le16(alpha2[0] << 8 | alpha2[1]),
421 .source_id = (u8)src_id,
422 };
423 struct iwl_mcc_update_resp_v8 *resp_cp;
424 struct iwl_rx_packet *pkt;
425 struct iwl_host_cmd cmd = {
426 .id = MCC_UPDATE_CMD,
427 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
428 .data = { &mcc_update_cmd },
429 };
430
431 int ret, resp_ver;
432 u32 status;
433 int resp_len, n_channels;
434 u16 mcc;
435
436 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
437 return ERR_PTR(-EOPNOTSUPP);
438
439 cmd.len[0] = sizeof(struct iwl_mcc_update_cmd);
440
441 IWL_DEBUG_LAR(mvm, "send MCC update to FW with '%c%c' src = %d\n",
442 alpha2[0], alpha2[1], src_id);
443
444 ret = iwl_mvm_send_cmd(mvm, &cmd);
445 if (ret)
446 return ERR_PTR(ret);
447
448 pkt = cmd.resp_pkt;
449
450 resp_ver = iwl_fw_lookup_notif_ver(mvm->fw, IWL_ALWAYS_LONG_GROUP,
451 MCC_UPDATE_CMD, 0);
452
453 /* Extract MCC response */
454 if (resp_ver >= 8) {
455 struct iwl_mcc_update_resp_v8 *mcc_resp_v8 = (void *)pkt->data;
456
457 n_channels = __le32_to_cpu(mcc_resp_v8->n_channels);
458 if (iwl_rx_packet_payload_len(pkt) !=
459 struct_size(mcc_resp_v8, channels, n_channels)) {
460 resp_cp = ERR_PTR(-EINVAL);
461 goto exit;
462 }
463 resp_len = struct_size(resp_cp, channels, n_channels);
464 resp_cp = kzalloc(resp_len, GFP_KERNEL);
465 if (!resp_cp) {
466 resp_cp = ERR_PTR(-ENOMEM);
467 goto exit;
468 }
469 resp_cp->status = mcc_resp_v8->status;
470 resp_cp->mcc = mcc_resp_v8->mcc;
471 resp_cp->cap = mcc_resp_v8->cap;
472 resp_cp->source_id = mcc_resp_v8->source_id;
473 resp_cp->time = mcc_resp_v8->time;
474 resp_cp->geo_info = mcc_resp_v8->geo_info;
475 resp_cp->n_channels = mcc_resp_v8->n_channels;
476 memcpy(resp_cp->channels, mcc_resp_v8->channels,
477 n_channels * sizeof(__le32));
478 } else if (fw_has_capa(&mvm->fw->ucode_capa,
479 IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT)) {
480 struct iwl_mcc_update_resp_v4 *mcc_resp_v4 = (void *)pkt->data;
481
482 n_channels = __le32_to_cpu(mcc_resp_v4->n_channels);
483 if (iwl_rx_packet_payload_len(pkt) !=
484 struct_size(mcc_resp_v4, channels, n_channels)) {
485 resp_cp = ERR_PTR(-EINVAL);
486 goto exit;
487 }
488 resp_len = struct_size(resp_cp, channels, n_channels);
489 resp_cp = kzalloc(resp_len, GFP_KERNEL);
490 if (!resp_cp) {
491 resp_cp = ERR_PTR(-ENOMEM);
492 goto exit;
493 }
494
495 resp_cp->status = mcc_resp_v4->status;
496 resp_cp->mcc = mcc_resp_v4->mcc;
497 resp_cp->cap = cpu_to_le32(le16_to_cpu(mcc_resp_v4->cap));
498 resp_cp->source_id = mcc_resp_v4->source_id;
499 resp_cp->time = mcc_resp_v4->time;
500 resp_cp->geo_info = mcc_resp_v4->geo_info;
501 resp_cp->n_channels = mcc_resp_v4->n_channels;
502 memcpy(resp_cp->channels, mcc_resp_v4->channels,
503 n_channels * sizeof(__le32));
504 } else {
505 struct iwl_mcc_update_resp_v3 *mcc_resp_v3 = (void *)pkt->data;
506
507 n_channels = __le32_to_cpu(mcc_resp_v3->n_channels);
508 if (iwl_rx_packet_payload_len(pkt) !=
509 struct_size(mcc_resp_v3, channels, n_channels)) {
510 resp_cp = ERR_PTR(-EINVAL);
511 goto exit;
512 }
513 resp_len = struct_size(resp_cp, channels, n_channels);
514 resp_cp = kzalloc(resp_len, GFP_KERNEL);
515 if (!resp_cp) {
516 resp_cp = ERR_PTR(-ENOMEM);
517 goto exit;
518 }
519
520 resp_cp->status = mcc_resp_v3->status;
521 resp_cp->mcc = mcc_resp_v3->mcc;
522 resp_cp->cap = cpu_to_le32(mcc_resp_v3->cap);
523 resp_cp->source_id = mcc_resp_v3->source_id;
524 resp_cp->time = mcc_resp_v3->time;
525 resp_cp->geo_info = mcc_resp_v3->geo_info;
526 resp_cp->n_channels = mcc_resp_v3->n_channels;
527 memcpy(resp_cp->channels, mcc_resp_v3->channels,
528 n_channels * sizeof(__le32));
529 }
530
531 status = le32_to_cpu(resp_cp->status);
532
533 mcc = le16_to_cpu(resp_cp->mcc);
534
535 /* W/A for a FW/NVM issue - returns 0x00 for the world domain */
536 if (mcc == 0) {
537 mcc = 0x3030; /* "00" - world */
538 resp_cp->mcc = cpu_to_le16(mcc);
539 }
540
541 IWL_DEBUG_LAR(mvm,
542 "MCC response status: 0x%x. new MCC: 0x%x ('%c%c') n_chans: %d\n",
543 status, mcc, mcc >> 8, mcc & 0xff, n_channels);
544
545exit:
546 iwl_free_resp(&cmd);
547 return resp_cp;
548}
549
550int iwl_mvm_init_mcc(struct iwl_mvm *mvm)
551{
552 bool tlv_lar;
553 bool nvm_lar;
554 int retval;
555 struct ieee80211_regdomain *regd;
556 char mcc[3];
557
558 if (mvm->cfg->nvm_type == IWL_NVM_EXT) {
559 tlv_lar = fw_has_capa(&mvm->fw->ucode_capa,
560 IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
561 nvm_lar = mvm->nvm_data->lar_enabled;
562 if (tlv_lar != nvm_lar)
563 IWL_INFO(mvm,
564 "Conflict between TLV & NVM regarding enabling LAR (TLV = %s NVM =%s)\n",
565 tlv_lar ? "enabled" : "disabled",
566 nvm_lar ? "enabled" : "disabled");
567 }
568
569 if (!iwl_mvm_is_lar_supported(mvm))
570 return 0;
571
572 /*
573 * try to replay the last set MCC to FW. If it doesn't exist,
574 * queue an update to cfg80211 to retrieve the default alpha2 from FW.
575 */
576 retval = iwl_mvm_init_fw_regd(mvm, true);
577 if (retval != -ENOENT)
578 return retval;
579
580 /*
581 * Driver regulatory hint for initial update, this also informs the
582 * firmware we support wifi location updates.
583 * Disallow scans that might crash the FW while the LAR regdomain
584 * is not set.
585 */
586 mvm->lar_regdom_set = false;
587
588 regd = iwl_mvm_get_current_regdomain(mvm, NULL);
589 if (IS_ERR_OR_NULL(regd))
590 return -EIO;
591
592 if (iwl_mvm_is_wifi_mcc_supported(mvm) &&
593 !iwl_acpi_get_mcc(mvm->dev, mcc)) {
594 kfree(regd);
595 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc,
596 MCC_SOURCE_BIOS, NULL);
597 if (IS_ERR_OR_NULL(regd))
598 return -EIO;
599 }
600
601 retval = regulatory_set_wiphy_regd_sync(mvm->hw->wiphy, regd);
602 kfree(regd);
603 return retval;
604}
605
606void iwl_mvm_rx_chub_update_mcc(struct iwl_mvm *mvm,
607 struct iwl_rx_cmd_buffer *rxb)
608{
609 struct iwl_rx_packet *pkt = rxb_addr(rxb);
610 struct iwl_mcc_chub_notif *notif = (void *)pkt->data;
611 enum iwl_mcc_source src;
612 char mcc[3];
613 struct ieee80211_regdomain *regd;
614 int wgds_tbl_idx;
615
616 lockdep_assert_held(&mvm->mutex);
617
618 if (iwl_mvm_is_vif_assoc(mvm) && notif->source_id == MCC_SOURCE_WIFI) {
619 IWL_DEBUG_LAR(mvm, "Ignore mcc update while associated\n");
620 return;
621 }
622
623 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
624 return;
625
626 mcc[0] = le16_to_cpu(notif->mcc) >> 8;
627 mcc[1] = le16_to_cpu(notif->mcc) & 0xff;
628 mcc[2] = '\0';
629 src = notif->source_id;
630
631 IWL_DEBUG_LAR(mvm,
632 "RX: received chub update mcc cmd (mcc '%s' src %d)\n",
633 mcc, src);
634 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc, src, NULL);
635 if (IS_ERR_OR_NULL(regd))
636 return;
637
638 wgds_tbl_idx = iwl_mvm_get_sar_geo_profile(mvm);
639 if (wgds_tbl_idx < 1)
640 IWL_DEBUG_INFO(mvm,
641 "SAR WGDS is disabled or error received (%d)\n",
642 wgds_tbl_idx);
643 else
644 IWL_DEBUG_INFO(mvm, "SAR WGDS: geo profile %d is configured\n",
645 wgds_tbl_idx);
646
647 regulatory_set_wiphy_regd(mvm->hw->wiphy, regd);
648 kfree(regd);
649}
1// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2/*
3 * Copyright (C) 2012-2014, 2018-2019, 2021-2024 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
6 */
7#include <linux/firmware.h>
8#include <linux/rtnetlink.h>
9#include "iwl-trans.h"
10#include "iwl-csr.h"
11#include "mvm.h"
12#include "iwl-nvm-utils.h"
13#include "iwl-nvm-parse.h"
14#include "iwl-prph.h"
15#include "fw/acpi.h"
16
17/* Default NVM size to read */
18#define IWL_NVM_DEFAULT_CHUNK_SIZE (2 * 1024)
19
20#define NVM_WRITE_OPCODE 1
21#define NVM_READ_OPCODE 0
22
23/* load nvm chunk response */
24enum {
25 READ_NVM_CHUNK_SUCCEED = 0,
26 READ_NVM_CHUNK_NOT_VALID_ADDRESS = 1
27};
28
29/*
30 * prepare the NVM host command w/ the pointers to the nvm buffer
31 * and send it to fw
32 */
33static int iwl_nvm_write_chunk(struct iwl_mvm *mvm, u16 section,
34 u16 offset, u16 length, const u8 *data)
35{
36 struct iwl_nvm_access_cmd nvm_access_cmd = {
37 .offset = cpu_to_le16(offset),
38 .length = cpu_to_le16(length),
39 .type = cpu_to_le16(section),
40 .op_code = NVM_WRITE_OPCODE,
41 };
42 struct iwl_host_cmd cmd = {
43 .id = NVM_ACCESS_CMD,
44 .len = { sizeof(struct iwl_nvm_access_cmd), length },
45 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
46 .data = { &nvm_access_cmd, data },
47 /* data may come from vmalloc, so use _DUP */
48 .dataflags = { 0, IWL_HCMD_DFL_DUP },
49 };
50 struct iwl_rx_packet *pkt;
51 struct iwl_nvm_access_resp *nvm_resp;
52 int ret;
53
54 ret = iwl_mvm_send_cmd(mvm, &cmd);
55 if (ret)
56 return ret;
57
58 pkt = cmd.resp_pkt;
59 /* Extract & check NVM write response */
60 nvm_resp = (void *)pkt->data;
61 if (le16_to_cpu(nvm_resp->status) != READ_NVM_CHUNK_SUCCEED) {
62 IWL_ERR(mvm,
63 "NVM access write command failed for section %u (status = 0x%x)\n",
64 section, le16_to_cpu(nvm_resp->status));
65 ret = -EIO;
66 }
67
68 iwl_free_resp(&cmd);
69 return ret;
70}
71
72static int iwl_nvm_read_chunk(struct iwl_mvm *mvm, u16 section,
73 u16 offset, u16 length, u8 *data)
74{
75 struct iwl_nvm_access_cmd nvm_access_cmd = {
76 .offset = cpu_to_le16(offset),
77 .length = cpu_to_le16(length),
78 .type = cpu_to_le16(section),
79 .op_code = NVM_READ_OPCODE,
80 };
81 struct iwl_nvm_access_resp *nvm_resp;
82 struct iwl_rx_packet *pkt;
83 struct iwl_host_cmd cmd = {
84 .id = NVM_ACCESS_CMD,
85 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
86 .data = { &nvm_access_cmd, },
87 };
88 int ret, bytes_read, offset_read;
89 u8 *resp_data;
90
91 cmd.len[0] = sizeof(struct iwl_nvm_access_cmd);
92
93 ret = iwl_mvm_send_cmd(mvm, &cmd);
94 if (ret)
95 return ret;
96
97 pkt = cmd.resp_pkt;
98
99 /* Extract NVM response */
100 nvm_resp = (void *)pkt->data;
101 ret = le16_to_cpu(nvm_resp->status);
102 bytes_read = le16_to_cpu(nvm_resp->length);
103 offset_read = le16_to_cpu(nvm_resp->offset);
104 resp_data = nvm_resp->data;
105 if (ret) {
106 if ((offset != 0) &&
107 (ret == READ_NVM_CHUNK_NOT_VALID_ADDRESS)) {
108 /*
109 * meaning of NOT_VALID_ADDRESS:
110 * driver try to read chunk from address that is
111 * multiple of 2K and got an error since addr is empty.
112 * meaning of (offset != 0): driver already
113 * read valid data from another chunk so this case
114 * is not an error.
115 */
116 IWL_DEBUG_EEPROM(mvm->trans->dev,
117 "NVM access command failed on offset 0x%x since that section size is multiple 2K\n",
118 offset);
119 ret = 0;
120 } else {
121 IWL_DEBUG_EEPROM(mvm->trans->dev,
122 "NVM access command failed with status %d (device: %s)\n",
123 ret, mvm->trans->name);
124 ret = -ENODATA;
125 }
126 goto exit;
127 }
128
129 if (offset_read != offset) {
130 IWL_ERR(mvm, "NVM ACCESS response with invalid offset %d\n",
131 offset_read);
132 ret = -EINVAL;
133 goto exit;
134 }
135
136 /* Write data to NVM */
137 memcpy(data + offset, resp_data, bytes_read);
138 ret = bytes_read;
139
140exit:
141 iwl_free_resp(&cmd);
142 return ret;
143}
144
145static int iwl_nvm_write_section(struct iwl_mvm *mvm, u16 section,
146 const u8 *data, u16 length)
147{
148 int offset = 0;
149
150 /* copy data in chunks of 2k (and remainder if any) */
151
152 while (offset < length) {
153 int chunk_size, ret;
154
155 chunk_size = min(IWL_NVM_DEFAULT_CHUNK_SIZE,
156 length - offset);
157
158 ret = iwl_nvm_write_chunk(mvm, section, offset,
159 chunk_size, data + offset);
160 if (ret < 0)
161 return ret;
162
163 offset += chunk_size;
164 }
165
166 return 0;
167}
168
169/*
170 * Reads an NVM section completely.
171 * NICs prior to 7000 family doesn't have a real NVM, but just read
172 * section 0 which is the EEPROM. Because the EEPROM reading is unlimited
173 * by uCode, we need to manually check in this case that we don't
174 * overflow and try to read more than the EEPROM size.
175 * For 7000 family NICs, we supply the maximal size we can read, and
176 * the uCode fills the response with as much data as we can,
177 * without overflowing, so no check is needed.
178 */
179static int iwl_nvm_read_section(struct iwl_mvm *mvm, u16 section,
180 u8 *data, u32 size_read)
181{
182 u16 length, offset = 0;
183 int ret;
184
185 /* Set nvm section read length */
186 length = IWL_NVM_DEFAULT_CHUNK_SIZE;
187
188 ret = length;
189
190 /* Read the NVM until exhausted (reading less than requested) */
191 while (ret == length) {
192 /* Check no memory assumptions fail and cause an overflow */
193 if ((size_read + offset + length) >
194 mvm->trans->trans_cfg->base_params->eeprom_size) {
195 IWL_ERR(mvm, "EEPROM size is too small for NVM\n");
196 return -ENOBUFS;
197 }
198
199 ret = iwl_nvm_read_chunk(mvm, section, offset, length, data);
200 if (ret < 0) {
201 IWL_DEBUG_EEPROM(mvm->trans->dev,
202 "Cannot read NVM from section %d offset %d, length %d\n",
203 section, offset, length);
204 return ret;
205 }
206 offset += ret;
207 }
208
209 iwl_nvm_fixups(mvm->trans->hw_id, section, data, offset);
210
211 IWL_DEBUG_EEPROM(mvm->trans->dev,
212 "NVM section %d read completed\n", section);
213 return offset;
214}
215
216static struct iwl_nvm_data *
217iwl_parse_nvm_sections(struct iwl_mvm *mvm)
218{
219 struct iwl_nvm_section *sections = mvm->nvm_sections;
220 const __be16 *hw;
221 const __le16 *sw, *calib, *regulatory, *mac_override, *phy_sku;
222 u8 tx_ant = mvm->fw->valid_tx_ant;
223 u8 rx_ant = mvm->fw->valid_rx_ant;
224 int regulatory_type;
225
226 /* Checking for required sections */
227 if (mvm->trans->cfg->nvm_type == IWL_NVM) {
228 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
229 !mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data) {
230 IWL_ERR(mvm, "Can't parse empty OTP/NVM sections\n");
231 return NULL;
232 }
233 } else {
234 if (mvm->trans->cfg->nvm_type == IWL_NVM_SDP)
235 regulatory_type = NVM_SECTION_TYPE_REGULATORY_SDP;
236 else
237 regulatory_type = NVM_SECTION_TYPE_REGULATORY;
238
239 /* SW and REGULATORY sections are mandatory */
240 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
241 !mvm->nvm_sections[regulatory_type].data) {
242 IWL_ERR(mvm,
243 "Can't parse empty family 8000 OTP/NVM sections\n");
244 return NULL;
245 }
246 /* MAC_OVERRIDE or at least HW section must exist */
247 if (!mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data &&
248 !mvm->nvm_sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data) {
249 IWL_ERR(mvm,
250 "Can't parse mac_address, empty sections\n");
251 return NULL;
252 }
253
254 /* PHY_SKU section is mandatory in B0 */
255 if (mvm->trans->cfg->nvm_type == IWL_NVM_EXT &&
256 !mvm->nvm_sections[NVM_SECTION_TYPE_PHY_SKU].data) {
257 IWL_ERR(mvm,
258 "Can't parse phy_sku in B0, empty sections\n");
259 return NULL;
260 }
261 }
262
263 hw = (const __be16 *)sections[mvm->cfg->nvm_hw_section_num].data;
264 sw = (const __le16 *)sections[NVM_SECTION_TYPE_SW].data;
265 calib = (const __le16 *)sections[NVM_SECTION_TYPE_CALIBRATION].data;
266 mac_override =
267 (const __le16 *)sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data;
268 phy_sku = (const __le16 *)sections[NVM_SECTION_TYPE_PHY_SKU].data;
269
270 regulatory = mvm->trans->cfg->nvm_type == IWL_NVM_SDP ?
271 (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY_SDP].data :
272 (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY].data;
273
274 if (mvm->set_tx_ant)
275 tx_ant &= mvm->set_tx_ant;
276
277 if (mvm->set_rx_ant)
278 rx_ant &= mvm->set_rx_ant;
279
280 return iwl_parse_nvm_data(mvm->trans, mvm->cfg, mvm->fw, hw, sw, calib,
281 regulatory, mac_override, phy_sku,
282 tx_ant, rx_ant);
283}
284
285/* Loads the NVM data stored in mvm->nvm_sections into the NIC */
286int iwl_mvm_load_nvm_to_nic(struct iwl_mvm *mvm)
287{
288 int i, ret = 0;
289 struct iwl_nvm_section *sections = mvm->nvm_sections;
290
291 IWL_DEBUG_EEPROM(mvm->trans->dev, "'Write to NVM\n");
292
293 for (i = 0; i < ARRAY_SIZE(mvm->nvm_sections); i++) {
294 if (!mvm->nvm_sections[i].data || !mvm->nvm_sections[i].length)
295 continue;
296 ret = iwl_nvm_write_section(mvm, i, sections[i].data,
297 sections[i].length);
298 if (ret < 0) {
299 IWL_ERR(mvm, "iwl_mvm_send_cmd failed: %d\n", ret);
300 break;
301 }
302 }
303 return ret;
304}
305
306int iwl_nvm_init(struct iwl_mvm *mvm)
307{
308 int ret, section;
309 u32 size_read = 0;
310 u8 *nvm_buffer, *temp;
311 const char *nvm_file_C = mvm->cfg->default_nvm_file_C_step;
312
313 if (WARN_ON_ONCE(mvm->cfg->nvm_hw_section_num >= NVM_MAX_NUM_SECTIONS))
314 return -EINVAL;
315
316 /* load NVM values from nic */
317 /* Read From FW NVM */
318 IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from NVM\n");
319
320 nvm_buffer = kmalloc(mvm->trans->trans_cfg->base_params->eeprom_size,
321 GFP_KERNEL);
322 if (!nvm_buffer)
323 return -ENOMEM;
324 for (section = 0; section < NVM_MAX_NUM_SECTIONS; section++) {
325 /* we override the constness for initial read */
326 ret = iwl_nvm_read_section(mvm, section, nvm_buffer,
327 size_read);
328 if (ret == -ENODATA) {
329 ret = 0;
330 continue;
331 }
332 if (ret < 0)
333 break;
334 size_read += ret;
335 temp = kmemdup(nvm_buffer, ret, GFP_KERNEL);
336 if (!temp) {
337 ret = -ENOMEM;
338 break;
339 }
340
341 iwl_nvm_fixups(mvm->trans->hw_id, section, temp, ret);
342
343 mvm->nvm_sections[section].data = temp;
344 mvm->nvm_sections[section].length = ret;
345
346#ifdef CONFIG_IWLWIFI_DEBUGFS
347 switch (section) {
348 case NVM_SECTION_TYPE_SW:
349 mvm->nvm_sw_blob.data = temp;
350 mvm->nvm_sw_blob.size = ret;
351 break;
352 case NVM_SECTION_TYPE_CALIBRATION:
353 mvm->nvm_calib_blob.data = temp;
354 mvm->nvm_calib_blob.size = ret;
355 break;
356 case NVM_SECTION_TYPE_PRODUCTION:
357 mvm->nvm_prod_blob.data = temp;
358 mvm->nvm_prod_blob.size = ret;
359 break;
360 case NVM_SECTION_TYPE_PHY_SKU:
361 mvm->nvm_phy_sku_blob.data = temp;
362 mvm->nvm_phy_sku_blob.size = ret;
363 break;
364 case NVM_SECTION_TYPE_REGULATORY_SDP:
365 case NVM_SECTION_TYPE_REGULATORY:
366 mvm->nvm_reg_blob.data = temp;
367 mvm->nvm_reg_blob.size = ret;
368 break;
369 default:
370 if (section == mvm->cfg->nvm_hw_section_num) {
371 mvm->nvm_hw_blob.data = temp;
372 mvm->nvm_hw_blob.size = ret;
373 break;
374 }
375 }
376#endif
377 }
378 if (!size_read)
379 IWL_ERR(mvm, "OTP is blank\n");
380 kfree(nvm_buffer);
381
382 /* Only if PNVM selected in the mod param - load external NVM */
383 if (mvm->nvm_file_name) {
384 /* read External NVM file from the mod param */
385 ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
386 mvm->nvm_sections);
387 if (ret) {
388 mvm->nvm_file_name = nvm_file_C;
389
390 if ((ret == -EFAULT || ret == -ENOENT) &&
391 mvm->nvm_file_name) {
392 /* in case nvm file was failed try again */
393 ret = iwl_read_external_nvm(mvm->trans,
394 mvm->nvm_file_name,
395 mvm->nvm_sections);
396 if (ret)
397 return ret;
398 } else {
399 return ret;
400 }
401 }
402 }
403
404 /* parse the relevant nvm sections */
405 mvm->nvm_data = iwl_parse_nvm_sections(mvm);
406 if (!mvm->nvm_data)
407 return -ENODATA;
408 IWL_DEBUG_EEPROM(mvm->trans->dev, "nvm version = %x\n",
409 mvm->nvm_data->nvm_version);
410
411 return ret < 0 ? ret : 0;
412}
413
414struct iwl_mcc_update_resp_v8 *
415iwl_mvm_update_mcc(struct iwl_mvm *mvm, const char *alpha2,
416 enum iwl_mcc_source src_id)
417{
418 struct iwl_mcc_update_cmd mcc_update_cmd = {
419 .mcc = cpu_to_le16(alpha2[0] << 8 | alpha2[1]),
420 .source_id = (u8)src_id,
421 };
422 struct iwl_mcc_update_resp_v8 *resp_cp;
423 struct iwl_rx_packet *pkt;
424 struct iwl_host_cmd cmd = {
425 .id = MCC_UPDATE_CMD,
426 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
427 .data = { &mcc_update_cmd },
428 };
429
430 int ret, resp_ver;
431 u32 status;
432 int resp_len, n_channels;
433 u16 mcc;
434
435 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
436 return ERR_PTR(-EOPNOTSUPP);
437
438 cmd.len[0] = sizeof(struct iwl_mcc_update_cmd);
439
440 IWL_DEBUG_LAR(mvm, "send MCC update to FW with '%c%c' src = %d\n",
441 alpha2[0], alpha2[1], src_id);
442
443 ret = iwl_mvm_send_cmd(mvm, &cmd);
444 if (ret)
445 return ERR_PTR(ret);
446
447 pkt = cmd.resp_pkt;
448
449 resp_ver = iwl_fw_lookup_notif_ver(mvm->fw, IWL_ALWAYS_LONG_GROUP,
450 MCC_UPDATE_CMD, 0);
451
452 /* Extract MCC response */
453 if (resp_ver >= 8) {
454 struct iwl_mcc_update_resp_v8 *mcc_resp_v8 = (void *)pkt->data;
455
456 n_channels = __le32_to_cpu(mcc_resp_v8->n_channels);
457 if (iwl_rx_packet_payload_len(pkt) !=
458 struct_size(mcc_resp_v8, channels, n_channels)) {
459 resp_cp = ERR_PTR(-EINVAL);
460 goto exit;
461 }
462 resp_len = struct_size(resp_cp, channels, n_channels);
463 resp_cp = kzalloc(resp_len, GFP_KERNEL);
464 if (!resp_cp) {
465 resp_cp = ERR_PTR(-ENOMEM);
466 goto exit;
467 }
468 resp_cp->status = mcc_resp_v8->status;
469 resp_cp->mcc = mcc_resp_v8->mcc;
470 resp_cp->cap = mcc_resp_v8->cap;
471 resp_cp->source_id = mcc_resp_v8->source_id;
472 resp_cp->time = mcc_resp_v8->time;
473 resp_cp->geo_info = mcc_resp_v8->geo_info;
474 resp_cp->n_channels = mcc_resp_v8->n_channels;
475 memcpy(resp_cp->channels, mcc_resp_v8->channels,
476 n_channels * sizeof(__le32));
477 } else if (fw_has_capa(&mvm->fw->ucode_capa,
478 IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT)) {
479 struct iwl_mcc_update_resp_v4 *mcc_resp_v4 = (void *)pkt->data;
480
481 n_channels = __le32_to_cpu(mcc_resp_v4->n_channels);
482 if (iwl_rx_packet_payload_len(pkt) !=
483 struct_size(mcc_resp_v4, channels, n_channels)) {
484 resp_cp = ERR_PTR(-EINVAL);
485 goto exit;
486 }
487 resp_len = struct_size(resp_cp, channels, n_channels);
488 resp_cp = kzalloc(resp_len, GFP_KERNEL);
489 if (!resp_cp) {
490 resp_cp = ERR_PTR(-ENOMEM);
491 goto exit;
492 }
493
494 resp_cp->status = mcc_resp_v4->status;
495 resp_cp->mcc = mcc_resp_v4->mcc;
496 resp_cp->cap = cpu_to_le32(le16_to_cpu(mcc_resp_v4->cap));
497 resp_cp->source_id = mcc_resp_v4->source_id;
498 resp_cp->time = mcc_resp_v4->time;
499 resp_cp->geo_info = mcc_resp_v4->geo_info;
500 resp_cp->n_channels = mcc_resp_v4->n_channels;
501 memcpy(resp_cp->channels, mcc_resp_v4->channels,
502 n_channels * sizeof(__le32));
503 } else {
504 struct iwl_mcc_update_resp_v3 *mcc_resp_v3 = (void *)pkt->data;
505
506 n_channels = __le32_to_cpu(mcc_resp_v3->n_channels);
507 if (iwl_rx_packet_payload_len(pkt) !=
508 struct_size(mcc_resp_v3, channels, n_channels)) {
509 resp_cp = ERR_PTR(-EINVAL);
510 goto exit;
511 }
512 resp_len = struct_size(resp_cp, channels, n_channels);
513 resp_cp = kzalloc(resp_len, GFP_KERNEL);
514 if (!resp_cp) {
515 resp_cp = ERR_PTR(-ENOMEM);
516 goto exit;
517 }
518
519 resp_cp->status = mcc_resp_v3->status;
520 resp_cp->mcc = mcc_resp_v3->mcc;
521 resp_cp->cap = cpu_to_le32(mcc_resp_v3->cap);
522 resp_cp->source_id = mcc_resp_v3->source_id;
523 resp_cp->time = mcc_resp_v3->time;
524 resp_cp->geo_info = mcc_resp_v3->geo_info;
525 resp_cp->n_channels = mcc_resp_v3->n_channels;
526 memcpy(resp_cp->channels, mcc_resp_v3->channels,
527 n_channels * sizeof(__le32));
528 }
529
530 status = le32_to_cpu(resp_cp->status);
531
532 mcc = le16_to_cpu(resp_cp->mcc);
533
534 /* W/A for a FW/NVM issue - returns 0x00 for the world domain */
535 if (mcc == 0) {
536 mcc = 0x3030; /* "00" - world */
537 resp_cp->mcc = cpu_to_le16(mcc);
538 }
539
540 IWL_DEBUG_LAR(mvm,
541 "MCC response status: 0x%x. new MCC: 0x%x ('%c%c') n_chans: %d\n",
542 status, mcc, mcc >> 8, mcc & 0xff, n_channels);
543
544exit:
545 iwl_free_resp(&cmd);
546 return resp_cp;
547}
548
549int iwl_mvm_init_mcc(struct iwl_mvm *mvm)
550{
551 bool tlv_lar;
552 bool nvm_lar;
553 int retval;
554 struct ieee80211_regdomain *regd;
555 char mcc[3];
556
557 if (mvm->cfg->nvm_type == IWL_NVM_EXT) {
558 tlv_lar = fw_has_capa(&mvm->fw->ucode_capa,
559 IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
560 nvm_lar = mvm->nvm_data->lar_enabled;
561 if (tlv_lar != nvm_lar)
562 IWL_INFO(mvm,
563 "Conflict between TLV & NVM regarding enabling LAR (TLV = %s NVM =%s)\n",
564 tlv_lar ? "enabled" : "disabled",
565 nvm_lar ? "enabled" : "disabled");
566 }
567
568 if (!iwl_mvm_is_lar_supported(mvm))
569 return 0;
570
571 /*
572 * try to replay the last set MCC to FW. If it doesn't exist,
573 * queue an update to cfg80211 to retrieve the default alpha2 from FW.
574 */
575 retval = iwl_mvm_init_fw_regd(mvm, true);
576 if (retval != -ENOENT)
577 return retval;
578
579 /*
580 * Driver regulatory hint for initial update, this also informs the
581 * firmware we support wifi location updates.
582 * Disallow scans that might crash the FW while the LAR regdomain
583 * is not set.
584 */
585 mvm->lar_regdom_set = false;
586
587 regd = iwl_mvm_get_current_regdomain(mvm, NULL);
588 if (IS_ERR_OR_NULL(regd))
589 return -EIO;
590
591 if (iwl_mvm_is_wifi_mcc_supported(mvm) &&
592 !iwl_bios_get_mcc(&mvm->fwrt, mcc)) {
593 kfree(regd);
594 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc,
595 MCC_SOURCE_BIOS, NULL);
596 if (IS_ERR_OR_NULL(regd))
597 return -EIO;
598 }
599
600 retval = regulatory_set_wiphy_regd_sync(mvm->hw->wiphy, regd);
601 kfree(regd);
602 return retval;
603}
604
605void iwl_mvm_rx_chub_update_mcc(struct iwl_mvm *mvm,
606 struct iwl_rx_cmd_buffer *rxb)
607{
608 struct iwl_rx_packet *pkt = rxb_addr(rxb);
609 struct iwl_mcc_chub_notif *notif = (void *)pkt->data;
610 enum iwl_mcc_source src;
611 char mcc[3];
612 struct ieee80211_regdomain *regd;
613 int wgds_tbl_idx;
614 bool changed = false;
615
616 lockdep_assert_held(&mvm->mutex);
617
618 if (iwl_mvm_is_vif_assoc(mvm) && notif->source_id == MCC_SOURCE_WIFI) {
619 IWL_DEBUG_LAR(mvm, "Ignore mcc update while associated\n");
620 return;
621 }
622
623 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
624 return;
625
626 mcc[0] = le16_to_cpu(notif->mcc) >> 8;
627 mcc[1] = le16_to_cpu(notif->mcc) & 0xff;
628 mcc[2] = '\0';
629 src = notif->source_id;
630
631 IWL_DEBUG_LAR(mvm,
632 "RX: received chub update mcc cmd (mcc '%s' src %d)\n",
633 mcc, src);
634 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc, src, &changed);
635 if (IS_ERR_OR_NULL(regd))
636 return;
637
638 if (!changed) {
639 IWL_DEBUG_LAR(mvm, "RX: No change in the regulatory data\n");
640 goto out;
641 }
642
643 wgds_tbl_idx = iwl_mvm_get_sar_geo_profile(mvm);
644 if (wgds_tbl_idx < 1)
645 IWL_DEBUG_INFO(mvm,
646 "SAR WGDS is disabled or error received (%d)\n",
647 wgds_tbl_idx);
648 else
649 IWL_DEBUG_INFO(mvm, "SAR WGDS: geo profile %d is configured\n",
650 wgds_tbl_idx);
651
652 regulatory_set_wiphy_regd(mvm->hw->wiphy, regd);
653
654out:
655 kfree(regd);
656}