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1// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2/*
3 * Copyright (C) 2012-2014, 2018-2019, 2021-2023 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
6 */
7#include <linux/firmware.h>
8#include <linux/rtnetlink.h>
9#include "iwl-trans.h"
10#include "iwl-csr.h"
11#include "mvm.h"
12#include "iwl-eeprom-parse.h"
13#include "iwl-eeprom-read.h"
14#include "iwl-nvm-parse.h"
15#include "iwl-prph.h"
16#include "fw/acpi.h"
17
18/* Default NVM size to read */
19#define IWL_NVM_DEFAULT_CHUNK_SIZE (2 * 1024)
20
21#define NVM_WRITE_OPCODE 1
22#define NVM_READ_OPCODE 0
23
24/* load nvm chunk response */
25enum {
26 READ_NVM_CHUNK_SUCCEED = 0,
27 READ_NVM_CHUNK_NOT_VALID_ADDRESS = 1
28};
29
30/*
31 * prepare the NVM host command w/ the pointers to the nvm buffer
32 * and send it to fw
33 */
34static int iwl_nvm_write_chunk(struct iwl_mvm *mvm, u16 section,
35 u16 offset, u16 length, const u8 *data)
36{
37 struct iwl_nvm_access_cmd nvm_access_cmd = {
38 .offset = cpu_to_le16(offset),
39 .length = cpu_to_le16(length),
40 .type = cpu_to_le16(section),
41 .op_code = NVM_WRITE_OPCODE,
42 };
43 struct iwl_host_cmd cmd = {
44 .id = NVM_ACCESS_CMD,
45 .len = { sizeof(struct iwl_nvm_access_cmd), length },
46 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
47 .data = { &nvm_access_cmd, data },
48 /* data may come from vmalloc, so use _DUP */
49 .dataflags = { 0, IWL_HCMD_DFL_DUP },
50 };
51 struct iwl_rx_packet *pkt;
52 struct iwl_nvm_access_resp *nvm_resp;
53 int ret;
54
55 ret = iwl_mvm_send_cmd(mvm, &cmd);
56 if (ret)
57 return ret;
58
59 pkt = cmd.resp_pkt;
60 /* Extract & check NVM write response */
61 nvm_resp = (void *)pkt->data;
62 if (le16_to_cpu(nvm_resp->status) != READ_NVM_CHUNK_SUCCEED) {
63 IWL_ERR(mvm,
64 "NVM access write command failed for section %u (status = 0x%x)\n",
65 section, le16_to_cpu(nvm_resp->status));
66 ret = -EIO;
67 }
68
69 iwl_free_resp(&cmd);
70 return ret;
71}
72
73static int iwl_nvm_read_chunk(struct iwl_mvm *mvm, u16 section,
74 u16 offset, u16 length, u8 *data)
75{
76 struct iwl_nvm_access_cmd nvm_access_cmd = {
77 .offset = cpu_to_le16(offset),
78 .length = cpu_to_le16(length),
79 .type = cpu_to_le16(section),
80 .op_code = NVM_READ_OPCODE,
81 };
82 struct iwl_nvm_access_resp *nvm_resp;
83 struct iwl_rx_packet *pkt;
84 struct iwl_host_cmd cmd = {
85 .id = NVM_ACCESS_CMD,
86 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
87 .data = { &nvm_access_cmd, },
88 };
89 int ret, bytes_read, offset_read;
90 u8 *resp_data;
91
92 cmd.len[0] = sizeof(struct iwl_nvm_access_cmd);
93
94 ret = iwl_mvm_send_cmd(mvm, &cmd);
95 if (ret)
96 return ret;
97
98 pkt = cmd.resp_pkt;
99
100 /* Extract NVM response */
101 nvm_resp = (void *)pkt->data;
102 ret = le16_to_cpu(nvm_resp->status);
103 bytes_read = le16_to_cpu(nvm_resp->length);
104 offset_read = le16_to_cpu(nvm_resp->offset);
105 resp_data = nvm_resp->data;
106 if (ret) {
107 if ((offset != 0) &&
108 (ret == READ_NVM_CHUNK_NOT_VALID_ADDRESS)) {
109 /*
110 * meaning of NOT_VALID_ADDRESS:
111 * driver try to read chunk from address that is
112 * multiple of 2K and got an error since addr is empty.
113 * meaning of (offset != 0): driver already
114 * read valid data from another chunk so this case
115 * is not an error.
116 */
117 IWL_DEBUG_EEPROM(mvm->trans->dev,
118 "NVM access command failed on offset 0x%x since that section size is multiple 2K\n",
119 offset);
120 ret = 0;
121 } else {
122 IWL_DEBUG_EEPROM(mvm->trans->dev,
123 "NVM access command failed with status %d (device: %s)\n",
124 ret, mvm->trans->name);
125 ret = -ENODATA;
126 }
127 goto exit;
128 }
129
130 if (offset_read != offset) {
131 IWL_ERR(mvm, "NVM ACCESS response with invalid offset %d\n",
132 offset_read);
133 ret = -EINVAL;
134 goto exit;
135 }
136
137 /* Write data to NVM */
138 memcpy(data + offset, resp_data, bytes_read);
139 ret = bytes_read;
140
141exit:
142 iwl_free_resp(&cmd);
143 return ret;
144}
145
146static int iwl_nvm_write_section(struct iwl_mvm *mvm, u16 section,
147 const u8 *data, u16 length)
148{
149 int offset = 0;
150
151 /* copy data in chunks of 2k (and remainder if any) */
152
153 while (offset < length) {
154 int chunk_size, ret;
155
156 chunk_size = min(IWL_NVM_DEFAULT_CHUNK_SIZE,
157 length - offset);
158
159 ret = iwl_nvm_write_chunk(mvm, section, offset,
160 chunk_size, data + offset);
161 if (ret < 0)
162 return ret;
163
164 offset += chunk_size;
165 }
166
167 return 0;
168}
169
170/*
171 * Reads an NVM section completely.
172 * NICs prior to 7000 family doesn't have a real NVM, but just read
173 * section 0 which is the EEPROM. Because the EEPROM reading is unlimited
174 * by uCode, we need to manually check in this case that we don't
175 * overflow and try to read more than the EEPROM size.
176 * For 7000 family NICs, we supply the maximal size we can read, and
177 * the uCode fills the response with as much data as we can,
178 * without overflowing, so no check is needed.
179 */
180static int iwl_nvm_read_section(struct iwl_mvm *mvm, u16 section,
181 u8 *data, u32 size_read)
182{
183 u16 length, offset = 0;
184 int ret;
185
186 /* Set nvm section read length */
187 length = IWL_NVM_DEFAULT_CHUNK_SIZE;
188
189 ret = length;
190
191 /* Read the NVM until exhausted (reading less than requested) */
192 while (ret == length) {
193 /* Check no memory assumptions fail and cause an overflow */
194 if ((size_read + offset + length) >
195 mvm->trans->trans_cfg->base_params->eeprom_size) {
196 IWL_ERR(mvm, "EEPROM size is too small for NVM\n");
197 return -ENOBUFS;
198 }
199
200 ret = iwl_nvm_read_chunk(mvm, section, offset, length, data);
201 if (ret < 0) {
202 IWL_DEBUG_EEPROM(mvm->trans->dev,
203 "Cannot read NVM from section %d offset %d, length %d\n",
204 section, offset, length);
205 return ret;
206 }
207 offset += ret;
208 }
209
210 iwl_nvm_fixups(mvm->trans->hw_id, section, data, offset);
211
212 IWL_DEBUG_EEPROM(mvm->trans->dev,
213 "NVM section %d read completed\n", section);
214 return offset;
215}
216
217static struct iwl_nvm_data *
218iwl_parse_nvm_sections(struct iwl_mvm *mvm)
219{
220 struct iwl_nvm_section *sections = mvm->nvm_sections;
221 const __be16 *hw;
222 const __le16 *sw, *calib, *regulatory, *mac_override, *phy_sku;
223 u8 tx_ant = mvm->fw->valid_tx_ant;
224 u8 rx_ant = mvm->fw->valid_rx_ant;
225 int regulatory_type;
226
227 /* Checking for required sections */
228 if (mvm->trans->cfg->nvm_type == IWL_NVM) {
229 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
230 !mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data) {
231 IWL_ERR(mvm, "Can't parse empty OTP/NVM sections\n");
232 return NULL;
233 }
234 } else {
235 if (mvm->trans->cfg->nvm_type == IWL_NVM_SDP)
236 regulatory_type = NVM_SECTION_TYPE_REGULATORY_SDP;
237 else
238 regulatory_type = NVM_SECTION_TYPE_REGULATORY;
239
240 /* SW and REGULATORY sections are mandatory */
241 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
242 !mvm->nvm_sections[regulatory_type].data) {
243 IWL_ERR(mvm,
244 "Can't parse empty family 8000 OTP/NVM sections\n");
245 return NULL;
246 }
247 /* MAC_OVERRIDE or at least HW section must exist */
248 if (!mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data &&
249 !mvm->nvm_sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data) {
250 IWL_ERR(mvm,
251 "Can't parse mac_address, empty sections\n");
252 return NULL;
253 }
254
255 /* PHY_SKU section is mandatory in B0 */
256 if (mvm->trans->cfg->nvm_type == IWL_NVM_EXT &&
257 !mvm->nvm_sections[NVM_SECTION_TYPE_PHY_SKU].data) {
258 IWL_ERR(mvm,
259 "Can't parse phy_sku in B0, empty sections\n");
260 return NULL;
261 }
262 }
263
264 hw = (const __be16 *)sections[mvm->cfg->nvm_hw_section_num].data;
265 sw = (const __le16 *)sections[NVM_SECTION_TYPE_SW].data;
266 calib = (const __le16 *)sections[NVM_SECTION_TYPE_CALIBRATION].data;
267 mac_override =
268 (const __le16 *)sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data;
269 phy_sku = (const __le16 *)sections[NVM_SECTION_TYPE_PHY_SKU].data;
270
271 regulatory = mvm->trans->cfg->nvm_type == IWL_NVM_SDP ?
272 (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY_SDP].data :
273 (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY].data;
274
275 if (mvm->set_tx_ant)
276 tx_ant &= mvm->set_tx_ant;
277
278 if (mvm->set_rx_ant)
279 rx_ant &= mvm->set_rx_ant;
280
281 return iwl_parse_nvm_data(mvm->trans, mvm->cfg, mvm->fw, hw, sw, calib,
282 regulatory, mac_override, phy_sku,
283 tx_ant, rx_ant);
284}
285
286/* Loads the NVM data stored in mvm->nvm_sections into the NIC */
287int iwl_mvm_load_nvm_to_nic(struct iwl_mvm *mvm)
288{
289 int i, ret = 0;
290 struct iwl_nvm_section *sections = mvm->nvm_sections;
291
292 IWL_DEBUG_EEPROM(mvm->trans->dev, "'Write to NVM\n");
293
294 for (i = 0; i < ARRAY_SIZE(mvm->nvm_sections); i++) {
295 if (!mvm->nvm_sections[i].data || !mvm->nvm_sections[i].length)
296 continue;
297 ret = iwl_nvm_write_section(mvm, i, sections[i].data,
298 sections[i].length);
299 if (ret < 0) {
300 IWL_ERR(mvm, "iwl_mvm_send_cmd failed: %d\n", ret);
301 break;
302 }
303 }
304 return ret;
305}
306
307int iwl_nvm_init(struct iwl_mvm *mvm)
308{
309 int ret, section;
310 u32 size_read = 0;
311 u8 *nvm_buffer, *temp;
312 const char *nvm_file_C = mvm->cfg->default_nvm_file_C_step;
313
314 if (WARN_ON_ONCE(mvm->cfg->nvm_hw_section_num >= NVM_MAX_NUM_SECTIONS))
315 return -EINVAL;
316
317 /* load NVM values from nic */
318 /* Read From FW NVM */
319 IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from NVM\n");
320
321 nvm_buffer = kmalloc(mvm->trans->trans_cfg->base_params->eeprom_size,
322 GFP_KERNEL);
323 if (!nvm_buffer)
324 return -ENOMEM;
325 for (section = 0; section < NVM_MAX_NUM_SECTIONS; section++) {
326 /* we override the constness for initial read */
327 ret = iwl_nvm_read_section(mvm, section, nvm_buffer,
328 size_read);
329 if (ret == -ENODATA) {
330 ret = 0;
331 continue;
332 }
333 if (ret < 0)
334 break;
335 size_read += ret;
336 temp = kmemdup(nvm_buffer, ret, GFP_KERNEL);
337 if (!temp) {
338 ret = -ENOMEM;
339 break;
340 }
341
342 iwl_nvm_fixups(mvm->trans->hw_id, section, temp, ret);
343
344 mvm->nvm_sections[section].data = temp;
345 mvm->nvm_sections[section].length = ret;
346
347#ifdef CONFIG_IWLWIFI_DEBUGFS
348 switch (section) {
349 case NVM_SECTION_TYPE_SW:
350 mvm->nvm_sw_blob.data = temp;
351 mvm->nvm_sw_blob.size = ret;
352 break;
353 case NVM_SECTION_TYPE_CALIBRATION:
354 mvm->nvm_calib_blob.data = temp;
355 mvm->nvm_calib_blob.size = ret;
356 break;
357 case NVM_SECTION_TYPE_PRODUCTION:
358 mvm->nvm_prod_blob.data = temp;
359 mvm->nvm_prod_blob.size = ret;
360 break;
361 case NVM_SECTION_TYPE_PHY_SKU:
362 mvm->nvm_phy_sku_blob.data = temp;
363 mvm->nvm_phy_sku_blob.size = ret;
364 break;
365 case NVM_SECTION_TYPE_REGULATORY_SDP:
366 case NVM_SECTION_TYPE_REGULATORY:
367 mvm->nvm_reg_blob.data = temp;
368 mvm->nvm_reg_blob.size = ret;
369 break;
370 default:
371 if (section == mvm->cfg->nvm_hw_section_num) {
372 mvm->nvm_hw_blob.data = temp;
373 mvm->nvm_hw_blob.size = ret;
374 break;
375 }
376 }
377#endif
378 }
379 if (!size_read)
380 IWL_ERR(mvm, "OTP is blank\n");
381 kfree(nvm_buffer);
382
383 /* Only if PNVM selected in the mod param - load external NVM */
384 if (mvm->nvm_file_name) {
385 /* read External NVM file from the mod param */
386 ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
387 mvm->nvm_sections);
388 if (ret) {
389 mvm->nvm_file_name = nvm_file_C;
390
391 if ((ret == -EFAULT || ret == -ENOENT) &&
392 mvm->nvm_file_name) {
393 /* in case nvm file was failed try again */
394 ret = iwl_read_external_nvm(mvm->trans,
395 mvm->nvm_file_name,
396 mvm->nvm_sections);
397 if (ret)
398 return ret;
399 } else {
400 return ret;
401 }
402 }
403 }
404
405 /* parse the relevant nvm sections */
406 mvm->nvm_data = iwl_parse_nvm_sections(mvm);
407 if (!mvm->nvm_data)
408 return -ENODATA;
409 IWL_DEBUG_EEPROM(mvm->trans->dev, "nvm version = %x\n",
410 mvm->nvm_data->nvm_version);
411
412 return ret < 0 ? ret : 0;
413}
414
415struct iwl_mcc_update_resp_v8 *
416iwl_mvm_update_mcc(struct iwl_mvm *mvm, const char *alpha2,
417 enum iwl_mcc_source src_id)
418{
419 struct iwl_mcc_update_cmd mcc_update_cmd = {
420 .mcc = cpu_to_le16(alpha2[0] << 8 | alpha2[1]),
421 .source_id = (u8)src_id,
422 };
423 struct iwl_mcc_update_resp_v8 *resp_cp;
424 struct iwl_rx_packet *pkt;
425 struct iwl_host_cmd cmd = {
426 .id = MCC_UPDATE_CMD,
427 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
428 .data = { &mcc_update_cmd },
429 };
430
431 int ret, resp_ver;
432 u32 status;
433 int resp_len, n_channels;
434 u16 mcc;
435
436 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
437 return ERR_PTR(-EOPNOTSUPP);
438
439 cmd.len[0] = sizeof(struct iwl_mcc_update_cmd);
440
441 IWL_DEBUG_LAR(mvm, "send MCC update to FW with '%c%c' src = %d\n",
442 alpha2[0], alpha2[1], src_id);
443
444 ret = iwl_mvm_send_cmd(mvm, &cmd);
445 if (ret)
446 return ERR_PTR(ret);
447
448 pkt = cmd.resp_pkt;
449
450 resp_ver = iwl_fw_lookup_notif_ver(mvm->fw, IWL_ALWAYS_LONG_GROUP,
451 MCC_UPDATE_CMD, 0);
452
453 /* Extract MCC response */
454 if (resp_ver >= 8) {
455 struct iwl_mcc_update_resp_v8 *mcc_resp_v8 = (void *)pkt->data;
456
457 n_channels = __le32_to_cpu(mcc_resp_v8->n_channels);
458 if (iwl_rx_packet_payload_len(pkt) !=
459 struct_size(mcc_resp_v8, channels, n_channels)) {
460 resp_cp = ERR_PTR(-EINVAL);
461 goto exit;
462 }
463 resp_len = struct_size(resp_cp, channels, n_channels);
464 resp_cp = kzalloc(resp_len, GFP_KERNEL);
465 if (!resp_cp) {
466 resp_cp = ERR_PTR(-ENOMEM);
467 goto exit;
468 }
469 resp_cp->status = mcc_resp_v8->status;
470 resp_cp->mcc = mcc_resp_v8->mcc;
471 resp_cp->cap = mcc_resp_v8->cap;
472 resp_cp->source_id = mcc_resp_v8->source_id;
473 resp_cp->time = mcc_resp_v8->time;
474 resp_cp->geo_info = mcc_resp_v8->geo_info;
475 resp_cp->n_channels = mcc_resp_v8->n_channels;
476 memcpy(resp_cp->channels, mcc_resp_v8->channels,
477 n_channels * sizeof(__le32));
478 } else if (fw_has_capa(&mvm->fw->ucode_capa,
479 IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT)) {
480 struct iwl_mcc_update_resp_v4 *mcc_resp_v4 = (void *)pkt->data;
481
482 n_channels = __le32_to_cpu(mcc_resp_v4->n_channels);
483 if (iwl_rx_packet_payload_len(pkt) !=
484 struct_size(mcc_resp_v4, channels, n_channels)) {
485 resp_cp = ERR_PTR(-EINVAL);
486 goto exit;
487 }
488 resp_len = struct_size(resp_cp, channels, n_channels);
489 resp_cp = kzalloc(resp_len, GFP_KERNEL);
490 if (!resp_cp) {
491 resp_cp = ERR_PTR(-ENOMEM);
492 goto exit;
493 }
494
495 resp_cp->status = mcc_resp_v4->status;
496 resp_cp->mcc = mcc_resp_v4->mcc;
497 resp_cp->cap = cpu_to_le32(le16_to_cpu(mcc_resp_v4->cap));
498 resp_cp->source_id = mcc_resp_v4->source_id;
499 resp_cp->time = mcc_resp_v4->time;
500 resp_cp->geo_info = mcc_resp_v4->geo_info;
501 resp_cp->n_channels = mcc_resp_v4->n_channels;
502 memcpy(resp_cp->channels, mcc_resp_v4->channels,
503 n_channels * sizeof(__le32));
504 } else {
505 struct iwl_mcc_update_resp_v3 *mcc_resp_v3 = (void *)pkt->data;
506
507 n_channels = __le32_to_cpu(mcc_resp_v3->n_channels);
508 if (iwl_rx_packet_payload_len(pkt) !=
509 struct_size(mcc_resp_v3, channels, n_channels)) {
510 resp_cp = ERR_PTR(-EINVAL);
511 goto exit;
512 }
513 resp_len = struct_size(resp_cp, channels, n_channels);
514 resp_cp = kzalloc(resp_len, GFP_KERNEL);
515 if (!resp_cp) {
516 resp_cp = ERR_PTR(-ENOMEM);
517 goto exit;
518 }
519
520 resp_cp->status = mcc_resp_v3->status;
521 resp_cp->mcc = mcc_resp_v3->mcc;
522 resp_cp->cap = cpu_to_le32(mcc_resp_v3->cap);
523 resp_cp->source_id = mcc_resp_v3->source_id;
524 resp_cp->time = mcc_resp_v3->time;
525 resp_cp->geo_info = mcc_resp_v3->geo_info;
526 resp_cp->n_channels = mcc_resp_v3->n_channels;
527 memcpy(resp_cp->channels, mcc_resp_v3->channels,
528 n_channels * sizeof(__le32));
529 }
530
531 status = le32_to_cpu(resp_cp->status);
532
533 mcc = le16_to_cpu(resp_cp->mcc);
534
535 /* W/A for a FW/NVM issue - returns 0x00 for the world domain */
536 if (mcc == 0) {
537 mcc = 0x3030; /* "00" - world */
538 resp_cp->mcc = cpu_to_le16(mcc);
539 }
540
541 IWL_DEBUG_LAR(mvm,
542 "MCC response status: 0x%x. new MCC: 0x%x ('%c%c') n_chans: %d\n",
543 status, mcc, mcc >> 8, mcc & 0xff, n_channels);
544
545exit:
546 iwl_free_resp(&cmd);
547 return resp_cp;
548}
549
550int iwl_mvm_init_mcc(struct iwl_mvm *mvm)
551{
552 bool tlv_lar;
553 bool nvm_lar;
554 int retval;
555 struct ieee80211_regdomain *regd;
556 char mcc[3];
557
558 if (mvm->cfg->nvm_type == IWL_NVM_EXT) {
559 tlv_lar = fw_has_capa(&mvm->fw->ucode_capa,
560 IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
561 nvm_lar = mvm->nvm_data->lar_enabled;
562 if (tlv_lar != nvm_lar)
563 IWL_INFO(mvm,
564 "Conflict between TLV & NVM regarding enabling LAR (TLV = %s NVM =%s)\n",
565 tlv_lar ? "enabled" : "disabled",
566 nvm_lar ? "enabled" : "disabled");
567 }
568
569 if (!iwl_mvm_is_lar_supported(mvm))
570 return 0;
571
572 /*
573 * try to replay the last set MCC to FW. If it doesn't exist,
574 * queue an update to cfg80211 to retrieve the default alpha2 from FW.
575 */
576 retval = iwl_mvm_init_fw_regd(mvm, true);
577 if (retval != -ENOENT)
578 return retval;
579
580 /*
581 * Driver regulatory hint for initial update, this also informs the
582 * firmware we support wifi location updates.
583 * Disallow scans that might crash the FW while the LAR regdomain
584 * is not set.
585 */
586 mvm->lar_regdom_set = false;
587
588 regd = iwl_mvm_get_current_regdomain(mvm, NULL);
589 if (IS_ERR_OR_NULL(regd))
590 return -EIO;
591
592 if (iwl_mvm_is_wifi_mcc_supported(mvm) &&
593 !iwl_acpi_get_mcc(mvm->dev, mcc)) {
594 kfree(regd);
595 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc,
596 MCC_SOURCE_BIOS, NULL);
597 if (IS_ERR_OR_NULL(regd))
598 return -EIO;
599 }
600
601 retval = regulatory_set_wiphy_regd_sync(mvm->hw->wiphy, regd);
602 kfree(regd);
603 return retval;
604}
605
606void iwl_mvm_rx_chub_update_mcc(struct iwl_mvm *mvm,
607 struct iwl_rx_cmd_buffer *rxb)
608{
609 struct iwl_rx_packet *pkt = rxb_addr(rxb);
610 struct iwl_mcc_chub_notif *notif = (void *)pkt->data;
611 enum iwl_mcc_source src;
612 char mcc[3];
613 struct ieee80211_regdomain *regd;
614 int wgds_tbl_idx;
615
616 lockdep_assert_held(&mvm->mutex);
617
618 if (iwl_mvm_is_vif_assoc(mvm) && notif->source_id == MCC_SOURCE_WIFI) {
619 IWL_DEBUG_LAR(mvm, "Ignore mcc update while associated\n");
620 return;
621 }
622
623 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
624 return;
625
626 mcc[0] = le16_to_cpu(notif->mcc) >> 8;
627 mcc[1] = le16_to_cpu(notif->mcc) & 0xff;
628 mcc[2] = '\0';
629 src = notif->source_id;
630
631 IWL_DEBUG_LAR(mvm,
632 "RX: received chub update mcc cmd (mcc '%s' src %d)\n",
633 mcc, src);
634 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc, src, NULL);
635 if (IS_ERR_OR_NULL(regd))
636 return;
637
638 wgds_tbl_idx = iwl_mvm_get_sar_geo_profile(mvm);
639 if (wgds_tbl_idx < 1)
640 IWL_DEBUG_INFO(mvm,
641 "SAR WGDS is disabled or error received (%d)\n",
642 wgds_tbl_idx);
643 else
644 IWL_DEBUG_INFO(mvm, "SAR WGDS: geo profile %d is configured\n",
645 wgds_tbl_idx);
646
647 regulatory_set_wiphy_regd(mvm->hw->wiphy, regd);
648 kfree(regd);
649}
1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
11 * Copyright(c) 2018 Intel Corporation
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of version 2 of the GNU General Public License as
15 * published by the Free Software Foundation.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * The full GNU General Public License is included in this distribution
23 * in the file called COPYING.
24 *
25 * Contact Information:
26 * Intel Linux Wireless <linuxwifi@intel.com>
27 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *
29 * BSD LICENSE
30 *
31 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
32 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
33 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
34 * Copyright(c) 2018 Intel Corporation
35 * All rights reserved.
36 *
37 * Redistribution and use in source and binary forms, with or without
38 * modification, are permitted provided that the following conditions
39 * are met:
40 *
41 * * Redistributions of source code must retain the above copyright
42 * notice, this list of conditions and the following disclaimer.
43 * * Redistributions in binary form must reproduce the above copyright
44 * notice, this list of conditions and the following disclaimer in
45 * the documentation and/or other materials provided with the
46 * distribution.
47 * * Neither the name Intel Corporation nor the names of its
48 * contributors may be used to endorse or promote products derived
49 * from this software without specific prior written permission.
50 *
51 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
52 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
53 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
54 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
55 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
56 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
57 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
58 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
59 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
60 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
61 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62 *
63 *****************************************************************************/
64#include <linux/firmware.h>
65#include <linux/rtnetlink.h>
66#include "iwl-trans.h"
67#include "iwl-csr.h"
68#include "mvm.h"
69#include "iwl-eeprom-parse.h"
70#include "iwl-eeprom-read.h"
71#include "iwl-nvm-parse.h"
72#include "iwl-prph.h"
73#include "fw/acpi.h"
74
75/* Default NVM size to read */
76#define IWL_NVM_DEFAULT_CHUNK_SIZE (2 * 1024)
77
78#define NVM_WRITE_OPCODE 1
79#define NVM_READ_OPCODE 0
80
81/* load nvm chunk response */
82enum {
83 READ_NVM_CHUNK_SUCCEED = 0,
84 READ_NVM_CHUNK_NOT_VALID_ADDRESS = 1
85};
86
87/*
88 * prepare the NVM host command w/ the pointers to the nvm buffer
89 * and send it to fw
90 */
91static int iwl_nvm_write_chunk(struct iwl_mvm *mvm, u16 section,
92 u16 offset, u16 length, const u8 *data)
93{
94 struct iwl_nvm_access_cmd nvm_access_cmd = {
95 .offset = cpu_to_le16(offset),
96 .length = cpu_to_le16(length),
97 .type = cpu_to_le16(section),
98 .op_code = NVM_WRITE_OPCODE,
99 };
100 struct iwl_host_cmd cmd = {
101 .id = NVM_ACCESS_CMD,
102 .len = { sizeof(struct iwl_nvm_access_cmd), length },
103 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
104 .data = { &nvm_access_cmd, data },
105 /* data may come from vmalloc, so use _DUP */
106 .dataflags = { 0, IWL_HCMD_DFL_DUP },
107 };
108 struct iwl_rx_packet *pkt;
109 struct iwl_nvm_access_resp *nvm_resp;
110 int ret;
111
112 ret = iwl_mvm_send_cmd(mvm, &cmd);
113 if (ret)
114 return ret;
115
116 pkt = cmd.resp_pkt;
117 /* Extract & check NVM write response */
118 nvm_resp = (void *)pkt->data;
119 if (le16_to_cpu(nvm_resp->status) != READ_NVM_CHUNK_SUCCEED) {
120 IWL_ERR(mvm,
121 "NVM access write command failed for section %u (status = 0x%x)\n",
122 section, le16_to_cpu(nvm_resp->status));
123 ret = -EIO;
124 }
125
126 iwl_free_resp(&cmd);
127 return ret;
128}
129
130static int iwl_nvm_read_chunk(struct iwl_mvm *mvm, u16 section,
131 u16 offset, u16 length, u8 *data)
132{
133 struct iwl_nvm_access_cmd nvm_access_cmd = {
134 .offset = cpu_to_le16(offset),
135 .length = cpu_to_le16(length),
136 .type = cpu_to_le16(section),
137 .op_code = NVM_READ_OPCODE,
138 };
139 struct iwl_nvm_access_resp *nvm_resp;
140 struct iwl_rx_packet *pkt;
141 struct iwl_host_cmd cmd = {
142 .id = NVM_ACCESS_CMD,
143 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
144 .data = { &nvm_access_cmd, },
145 };
146 int ret, bytes_read, offset_read;
147 u8 *resp_data;
148
149 cmd.len[0] = sizeof(struct iwl_nvm_access_cmd);
150
151 ret = iwl_mvm_send_cmd(mvm, &cmd);
152 if (ret)
153 return ret;
154
155 pkt = cmd.resp_pkt;
156
157 /* Extract NVM response */
158 nvm_resp = (void *)pkt->data;
159 ret = le16_to_cpu(nvm_resp->status);
160 bytes_read = le16_to_cpu(nvm_resp->length);
161 offset_read = le16_to_cpu(nvm_resp->offset);
162 resp_data = nvm_resp->data;
163 if (ret) {
164 if ((offset != 0) &&
165 (ret == READ_NVM_CHUNK_NOT_VALID_ADDRESS)) {
166 /*
167 * meaning of NOT_VALID_ADDRESS:
168 * driver try to read chunk from address that is
169 * multiple of 2K and got an error since addr is empty.
170 * meaning of (offset != 0): driver already
171 * read valid data from another chunk so this case
172 * is not an error.
173 */
174 IWL_DEBUG_EEPROM(mvm->trans->dev,
175 "NVM access command failed on offset 0x%x since that section size is multiple 2K\n",
176 offset);
177 ret = 0;
178 } else {
179 IWL_DEBUG_EEPROM(mvm->trans->dev,
180 "NVM access command failed with status %d (device: %s)\n",
181 ret, mvm->trans->name);
182 ret = -ENODATA;
183 }
184 goto exit;
185 }
186
187 if (offset_read != offset) {
188 IWL_ERR(mvm, "NVM ACCESS response with invalid offset %d\n",
189 offset_read);
190 ret = -EINVAL;
191 goto exit;
192 }
193
194 /* Write data to NVM */
195 memcpy(data + offset, resp_data, bytes_read);
196 ret = bytes_read;
197
198exit:
199 iwl_free_resp(&cmd);
200 return ret;
201}
202
203static int iwl_nvm_write_section(struct iwl_mvm *mvm, u16 section,
204 const u8 *data, u16 length)
205{
206 int offset = 0;
207
208 /* copy data in chunks of 2k (and remainder if any) */
209
210 while (offset < length) {
211 int chunk_size, ret;
212
213 chunk_size = min(IWL_NVM_DEFAULT_CHUNK_SIZE,
214 length - offset);
215
216 ret = iwl_nvm_write_chunk(mvm, section, offset,
217 chunk_size, data + offset);
218 if (ret < 0)
219 return ret;
220
221 offset += chunk_size;
222 }
223
224 return 0;
225}
226
227/*
228 * Reads an NVM section completely.
229 * NICs prior to 7000 family doesn't have a real NVM, but just read
230 * section 0 which is the EEPROM. Because the EEPROM reading is unlimited
231 * by uCode, we need to manually check in this case that we don't
232 * overflow and try to read more than the EEPROM size.
233 * For 7000 family NICs, we supply the maximal size we can read, and
234 * the uCode fills the response with as much data as we can,
235 * without overflowing, so no check is needed.
236 */
237static int iwl_nvm_read_section(struct iwl_mvm *mvm, u16 section,
238 u8 *data, u32 size_read)
239{
240 u16 length, offset = 0;
241 int ret;
242
243 /* Set nvm section read length */
244 length = IWL_NVM_DEFAULT_CHUNK_SIZE;
245
246 ret = length;
247
248 /* Read the NVM until exhausted (reading less than requested) */
249 while (ret == length) {
250 /* Check no memory assumptions fail and cause an overflow */
251 if ((size_read + offset + length) >
252 mvm->trans->trans_cfg->base_params->eeprom_size) {
253 IWL_ERR(mvm, "EEPROM size is too small for NVM\n");
254 return -ENOBUFS;
255 }
256
257 ret = iwl_nvm_read_chunk(mvm, section, offset, length, data);
258 if (ret < 0) {
259 IWL_DEBUG_EEPROM(mvm->trans->dev,
260 "Cannot read NVM from section %d offset %d, length %d\n",
261 section, offset, length);
262 return ret;
263 }
264 offset += ret;
265 }
266
267 iwl_nvm_fixups(mvm->trans->hw_id, section, data, offset);
268
269 IWL_DEBUG_EEPROM(mvm->trans->dev,
270 "NVM section %d read completed\n", section);
271 return offset;
272}
273
274static struct iwl_nvm_data *
275iwl_parse_nvm_sections(struct iwl_mvm *mvm)
276{
277 struct iwl_nvm_section *sections = mvm->nvm_sections;
278 const __be16 *hw;
279 const __le16 *sw, *calib, *regulatory, *mac_override, *phy_sku;
280 int regulatory_type;
281
282 /* Checking for required sections */
283 if (mvm->trans->cfg->nvm_type == IWL_NVM) {
284 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
285 !mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data) {
286 IWL_ERR(mvm, "Can't parse empty OTP/NVM sections\n");
287 return NULL;
288 }
289 } else {
290 if (mvm->trans->cfg->nvm_type == IWL_NVM_SDP)
291 regulatory_type = NVM_SECTION_TYPE_REGULATORY_SDP;
292 else
293 regulatory_type = NVM_SECTION_TYPE_REGULATORY;
294
295 /* SW and REGULATORY sections are mandatory */
296 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
297 !mvm->nvm_sections[regulatory_type].data) {
298 IWL_ERR(mvm,
299 "Can't parse empty family 8000 OTP/NVM sections\n");
300 return NULL;
301 }
302 /* MAC_OVERRIDE or at least HW section must exist */
303 if (!mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data &&
304 !mvm->nvm_sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data) {
305 IWL_ERR(mvm,
306 "Can't parse mac_address, empty sections\n");
307 return NULL;
308 }
309
310 /* PHY_SKU section is mandatory in B0 */
311 if (mvm->trans->cfg->nvm_type == IWL_NVM_EXT &&
312 !mvm->nvm_sections[NVM_SECTION_TYPE_PHY_SKU].data) {
313 IWL_ERR(mvm,
314 "Can't parse phy_sku in B0, empty sections\n");
315 return NULL;
316 }
317 }
318
319 hw = (const __be16 *)sections[mvm->cfg->nvm_hw_section_num].data;
320 sw = (const __le16 *)sections[NVM_SECTION_TYPE_SW].data;
321 calib = (const __le16 *)sections[NVM_SECTION_TYPE_CALIBRATION].data;
322 mac_override =
323 (const __le16 *)sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data;
324 phy_sku = (const __le16 *)sections[NVM_SECTION_TYPE_PHY_SKU].data;
325
326 regulatory = mvm->trans->cfg->nvm_type == IWL_NVM_SDP ?
327 (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY_SDP].data :
328 (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY].data;
329
330 return iwl_parse_nvm_data(mvm->trans, mvm->cfg, mvm->fw, hw, sw, calib,
331 regulatory, mac_override, phy_sku,
332 mvm->fw->valid_tx_ant, mvm->fw->valid_rx_ant);
333}
334
335/* Loads the NVM data stored in mvm->nvm_sections into the NIC */
336int iwl_mvm_load_nvm_to_nic(struct iwl_mvm *mvm)
337{
338 int i, ret = 0;
339 struct iwl_nvm_section *sections = mvm->nvm_sections;
340
341 IWL_DEBUG_EEPROM(mvm->trans->dev, "'Write to NVM\n");
342
343 for (i = 0; i < ARRAY_SIZE(mvm->nvm_sections); i++) {
344 if (!mvm->nvm_sections[i].data || !mvm->nvm_sections[i].length)
345 continue;
346 ret = iwl_nvm_write_section(mvm, i, sections[i].data,
347 sections[i].length);
348 if (ret < 0) {
349 IWL_ERR(mvm, "iwl_mvm_send_cmd failed: %d\n", ret);
350 break;
351 }
352 }
353 return ret;
354}
355
356int iwl_nvm_init(struct iwl_mvm *mvm)
357{
358 int ret, section;
359 u32 size_read = 0;
360 u8 *nvm_buffer, *temp;
361 const char *nvm_file_C = mvm->cfg->default_nvm_file_C_step;
362
363 if (WARN_ON_ONCE(mvm->cfg->nvm_hw_section_num >= NVM_MAX_NUM_SECTIONS))
364 return -EINVAL;
365
366 /* load NVM values from nic */
367 /* Read From FW NVM */
368 IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from NVM\n");
369
370 nvm_buffer = kmalloc(mvm->trans->trans_cfg->base_params->eeprom_size,
371 GFP_KERNEL);
372 if (!nvm_buffer)
373 return -ENOMEM;
374 for (section = 0; section < NVM_MAX_NUM_SECTIONS; section++) {
375 /* we override the constness for initial read */
376 ret = iwl_nvm_read_section(mvm, section, nvm_buffer,
377 size_read);
378 if (ret == -ENODATA) {
379 ret = 0;
380 continue;
381 }
382 if (ret < 0)
383 break;
384 size_read += ret;
385 temp = kmemdup(nvm_buffer, ret, GFP_KERNEL);
386 if (!temp) {
387 ret = -ENOMEM;
388 break;
389 }
390
391 iwl_nvm_fixups(mvm->trans->hw_id, section, temp, ret);
392
393 mvm->nvm_sections[section].data = temp;
394 mvm->nvm_sections[section].length = ret;
395
396#ifdef CONFIG_IWLWIFI_DEBUGFS
397 switch (section) {
398 case NVM_SECTION_TYPE_SW:
399 mvm->nvm_sw_blob.data = temp;
400 mvm->nvm_sw_blob.size = ret;
401 break;
402 case NVM_SECTION_TYPE_CALIBRATION:
403 mvm->nvm_calib_blob.data = temp;
404 mvm->nvm_calib_blob.size = ret;
405 break;
406 case NVM_SECTION_TYPE_PRODUCTION:
407 mvm->nvm_prod_blob.data = temp;
408 mvm->nvm_prod_blob.size = ret;
409 break;
410 case NVM_SECTION_TYPE_PHY_SKU:
411 mvm->nvm_phy_sku_blob.data = temp;
412 mvm->nvm_phy_sku_blob.size = ret;
413 break;
414 case NVM_SECTION_TYPE_REGULATORY_SDP:
415 case NVM_SECTION_TYPE_REGULATORY:
416 mvm->nvm_reg_blob.data = temp;
417 mvm->nvm_reg_blob.size = ret;
418 break;
419 default:
420 if (section == mvm->cfg->nvm_hw_section_num) {
421 mvm->nvm_hw_blob.data = temp;
422 mvm->nvm_hw_blob.size = ret;
423 break;
424 }
425 }
426#endif
427 }
428 if (!size_read)
429 IWL_ERR(mvm, "OTP is blank\n");
430 kfree(nvm_buffer);
431
432 /* Only if PNVM selected in the mod param - load external NVM */
433 if (mvm->nvm_file_name) {
434 /* read External NVM file from the mod param */
435 ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
436 mvm->nvm_sections);
437 if (ret) {
438 mvm->nvm_file_name = nvm_file_C;
439
440 if ((ret == -EFAULT || ret == -ENOENT) &&
441 mvm->nvm_file_name) {
442 /* in case nvm file was failed try again */
443 ret = iwl_read_external_nvm(mvm->trans,
444 mvm->nvm_file_name,
445 mvm->nvm_sections);
446 if (ret)
447 return ret;
448 } else {
449 return ret;
450 }
451 }
452 }
453
454 /* parse the relevant nvm sections */
455 mvm->nvm_data = iwl_parse_nvm_sections(mvm);
456 if (!mvm->nvm_data)
457 return -ENODATA;
458 IWL_DEBUG_EEPROM(mvm->trans->dev, "nvm version = %x\n",
459 mvm->nvm_data->nvm_version);
460
461 return ret < 0 ? ret : 0;
462}
463
464struct iwl_mcc_update_resp *
465iwl_mvm_update_mcc(struct iwl_mvm *mvm, const char *alpha2,
466 enum iwl_mcc_source src_id)
467{
468 struct iwl_mcc_update_cmd mcc_update_cmd = {
469 .mcc = cpu_to_le16(alpha2[0] << 8 | alpha2[1]),
470 .source_id = (u8)src_id,
471 };
472 struct iwl_mcc_update_resp *resp_cp;
473 struct iwl_rx_packet *pkt;
474 struct iwl_host_cmd cmd = {
475 .id = MCC_UPDATE_CMD,
476 .flags = CMD_WANT_SKB,
477 .data = { &mcc_update_cmd },
478 };
479
480 int ret;
481 u32 status;
482 int resp_len, n_channels;
483 u16 mcc;
484
485 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
486 return ERR_PTR(-EOPNOTSUPP);
487
488 cmd.len[0] = sizeof(struct iwl_mcc_update_cmd);
489
490 IWL_DEBUG_LAR(mvm, "send MCC update to FW with '%c%c' src = %d\n",
491 alpha2[0], alpha2[1], src_id);
492
493 ret = iwl_mvm_send_cmd(mvm, &cmd);
494 if (ret)
495 return ERR_PTR(ret);
496
497 pkt = cmd.resp_pkt;
498
499 /* Extract MCC response */
500 if (fw_has_capa(&mvm->fw->ucode_capa,
501 IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT)) {
502 struct iwl_mcc_update_resp *mcc_resp = (void *)pkt->data;
503
504 n_channels = __le32_to_cpu(mcc_resp->n_channels);
505 resp_len = sizeof(struct iwl_mcc_update_resp) +
506 n_channels * sizeof(__le32);
507 resp_cp = kmemdup(mcc_resp, resp_len, GFP_KERNEL);
508 if (!resp_cp) {
509 resp_cp = ERR_PTR(-ENOMEM);
510 goto exit;
511 }
512 } else {
513 struct iwl_mcc_update_resp_v3 *mcc_resp_v3 = (void *)pkt->data;
514
515 n_channels = __le32_to_cpu(mcc_resp_v3->n_channels);
516 resp_len = sizeof(struct iwl_mcc_update_resp) +
517 n_channels * sizeof(__le32);
518 resp_cp = kzalloc(resp_len, GFP_KERNEL);
519 if (!resp_cp) {
520 resp_cp = ERR_PTR(-ENOMEM);
521 goto exit;
522 }
523
524 resp_cp->status = mcc_resp_v3->status;
525 resp_cp->mcc = mcc_resp_v3->mcc;
526 resp_cp->cap = cpu_to_le16(mcc_resp_v3->cap);
527 resp_cp->source_id = mcc_resp_v3->source_id;
528 resp_cp->time = mcc_resp_v3->time;
529 resp_cp->geo_info = mcc_resp_v3->geo_info;
530 resp_cp->n_channels = mcc_resp_v3->n_channels;
531 memcpy(resp_cp->channels, mcc_resp_v3->channels,
532 n_channels * sizeof(__le32));
533 }
534
535 status = le32_to_cpu(resp_cp->status);
536
537 mcc = le16_to_cpu(resp_cp->mcc);
538
539 /* W/A for a FW/NVM issue - returns 0x00 for the world domain */
540 if (mcc == 0) {
541 mcc = 0x3030; /* "00" - world */
542 resp_cp->mcc = cpu_to_le16(mcc);
543 }
544
545 IWL_DEBUG_LAR(mvm,
546 "MCC response status: 0x%x. new MCC: 0x%x ('%c%c') n_chans: %d\n",
547 status, mcc, mcc >> 8, mcc & 0xff, n_channels);
548
549exit:
550 iwl_free_resp(&cmd);
551 return resp_cp;
552}
553
554int iwl_mvm_init_mcc(struct iwl_mvm *mvm)
555{
556 bool tlv_lar;
557 bool nvm_lar;
558 int retval;
559 struct ieee80211_regdomain *regd;
560 char mcc[3];
561
562 if (mvm->cfg->nvm_type == IWL_NVM_EXT) {
563 tlv_lar = fw_has_capa(&mvm->fw->ucode_capa,
564 IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
565 nvm_lar = mvm->nvm_data->lar_enabled;
566 if (tlv_lar != nvm_lar)
567 IWL_INFO(mvm,
568 "Conflict between TLV & NVM regarding enabling LAR (TLV = %s NVM =%s)\n",
569 tlv_lar ? "enabled" : "disabled",
570 nvm_lar ? "enabled" : "disabled");
571 }
572
573 if (!iwl_mvm_is_lar_supported(mvm))
574 return 0;
575
576 /*
577 * try to replay the last set MCC to FW. If it doesn't exist,
578 * queue an update to cfg80211 to retrieve the default alpha2 from FW.
579 */
580 retval = iwl_mvm_init_fw_regd(mvm);
581 if (retval != -ENOENT)
582 return retval;
583
584 /*
585 * Driver regulatory hint for initial update, this also informs the
586 * firmware we support wifi location updates.
587 * Disallow scans that might crash the FW while the LAR regdomain
588 * is not set.
589 */
590 mvm->lar_regdom_set = false;
591
592 regd = iwl_mvm_get_current_regdomain(mvm, NULL);
593 if (IS_ERR_OR_NULL(regd))
594 return -EIO;
595
596 if (iwl_mvm_is_wifi_mcc_supported(mvm) &&
597 !iwl_acpi_get_mcc(mvm->dev, mcc)) {
598 kfree(regd);
599 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc,
600 MCC_SOURCE_BIOS, NULL);
601 if (IS_ERR_OR_NULL(regd))
602 return -EIO;
603 }
604
605 retval = regulatory_set_wiphy_regd_sync_rtnl(mvm->hw->wiphy, regd);
606 kfree(regd);
607 return retval;
608}
609
610void iwl_mvm_rx_chub_update_mcc(struct iwl_mvm *mvm,
611 struct iwl_rx_cmd_buffer *rxb)
612{
613 struct iwl_rx_packet *pkt = rxb_addr(rxb);
614 struct iwl_mcc_chub_notif *notif = (void *)pkt->data;
615 enum iwl_mcc_source src;
616 char mcc[3];
617 struct ieee80211_regdomain *regd;
618 int wgds_tbl_idx;
619
620 lockdep_assert_held(&mvm->mutex);
621
622 if (iwl_mvm_is_vif_assoc(mvm) && notif->source_id == MCC_SOURCE_WIFI) {
623 IWL_DEBUG_LAR(mvm, "Ignore mcc update while associated\n");
624 return;
625 }
626
627 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
628 return;
629
630 mcc[0] = le16_to_cpu(notif->mcc) >> 8;
631 mcc[1] = le16_to_cpu(notif->mcc) & 0xff;
632 mcc[2] = '\0';
633 src = notif->source_id;
634
635 IWL_DEBUG_LAR(mvm,
636 "RX: received chub update mcc cmd (mcc '%s' src %d)\n",
637 mcc, src);
638 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc, src, NULL);
639 if (IS_ERR_OR_NULL(regd))
640 return;
641
642 wgds_tbl_idx = iwl_mvm_get_sar_geo_profile(mvm);
643 if (wgds_tbl_idx < 0)
644 IWL_DEBUG_INFO(mvm, "SAR WGDS is disabled (%d)\n",
645 wgds_tbl_idx);
646 else
647 IWL_DEBUG_INFO(mvm, "SAR WGDS: geo profile %d is configured\n",
648 wgds_tbl_idx);
649
650 regulatory_set_wiphy_regd(mvm->hw->wiphy, regd);
651 kfree(regd);
652}