1/*
  2 * MTD SPI driver for ST M25Pxx (and similar) serial flash chips
  3 *
  4 * Author: Mike Lavender, mike@steroidmicros.com
  5 *
  6 * Copyright (c) 2005, Intec Automation Inc.
  7 *
  8 * Some parts are based on lart.c by Abraham Van Der Merwe
  9 *
 10 * Cleaned up and generalized based on mtd_dataflash.c
 11 *
 12 * This code is free software; you can redistribute it and/or modify
 13 * it under the terms of the GNU General Public License version 2 as
 14 * published by the Free Software Foundation.
 15 *
 16 */
 17
 18#include <linux/err.h>
 19#include <linux/errno.h>
 20#include <linux/module.h>
 21#include <linux/device.h>
 22
 23#include <linux/mtd/mtd.h>
 24#include <linux/mtd/partitions.h>
 25
 26#include <linux/spi/spi.h>
 27#include <linux/spi/flash.h>
 28#include <linux/mtd/spi-nor.h>
 29
 30#define	MAX_CMD_SIZE		6
 31struct m25p {
 32	struct spi_device	*spi;
 33	struct spi_nor		spi_nor;
 34	u8			command[MAX_CMD_SIZE];
 35};
 36
 37static int m25p80_read_reg(struct spi_nor *nor, u8 code, u8 *val, int len)
 38{
 39	struct m25p *flash = nor->priv;
 40	struct spi_device *spi = flash->spi;
 41	int ret;
 42
 43	ret = spi_write_then_read(spi, &code, 1, val, len);
 44	if (ret < 0)
 45		dev_err(&spi->dev, "error %d reading %x\n", ret, code);
 46
 47	return ret;
 48}
 49
 50static void m25p_addr2cmd(struct spi_nor *nor, unsigned int addr, u8 *cmd)
 51{
 52	/* opcode is in cmd[0] */
 53	cmd[1] = addr >> (nor->addr_width * 8 -  8);
 54	cmd[2] = addr >> (nor->addr_width * 8 - 16);
 55	cmd[3] = addr >> (nor->addr_width * 8 - 24);
 56	cmd[4] = addr >> (nor->addr_width * 8 - 32);
 57}
 58
 59static int m25p_cmdsz(struct spi_nor *nor)
 60{
 61	return 1 + nor->addr_width;
 62}
 63
 64static int m25p80_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len)
 65{
 66	struct m25p *flash = nor->priv;
 67	struct spi_device *spi = flash->spi;
 68
 69	flash->command[0] = opcode;
 70	if (buf)
 71		memcpy(&flash->command[1], buf, len);
 72
 73	return spi_write(spi, flash->command, len + 1);
 74}
 75
 76static void m25p80_write(struct spi_nor *nor, loff_t to, size_t len,
 77			size_t *retlen, const u_char *buf)
 78{
 79	struct m25p *flash = nor->priv;
 80	struct spi_device *spi = flash->spi;
 81	struct spi_transfer t[2] = {};
 82	struct spi_message m;
 83	int cmd_sz = m25p_cmdsz(nor);
 84
 85	spi_message_init(&m);
 86
 87	if (nor->program_opcode == SPINOR_OP_AAI_WP && nor->sst_write_second)
 88		cmd_sz = 1;
 89
 90	flash->command[0] = nor->program_opcode;
 91	m25p_addr2cmd(nor, to, flash->command);
 92
 93	t[0].tx_buf = flash->command;
 94	t[0].len = cmd_sz;
 95	spi_message_add_tail(&t[0], &m);
 96
 97	t[1].tx_buf = buf;
 98	t[1].len = len;
 99	spi_message_add_tail(&t[1], &m);
100
101	spi_sync(spi, &m);
102
103	*retlen += m.actual_length - cmd_sz;
104}
105
106static inline unsigned int m25p80_rx_nbits(struct spi_nor *nor)
107{
108	switch (nor->flash_read) {
109	case SPI_NOR_DUAL:
110		return 2;
111	case SPI_NOR_QUAD:
112		return 4;
113	default:
114		return 0;
115	}
116}
117
118/*
119 * Read an address range from the nor chip.  The address range
120 * may be any size provided it is within the physical boundaries.
121 */
122static int m25p80_read(struct spi_nor *nor, loff_t from, size_t len,
123			size_t *retlen, u_char *buf)
124{
125	struct m25p *flash = nor->priv;
126	struct spi_device *spi = flash->spi;
127	struct spi_transfer t[2];
128	struct spi_message m;
129	unsigned int dummy = nor->read_dummy;
130
131	/* convert the dummy cycles to the number of bytes */
132	dummy /= 8;
133
134	spi_message_init(&m);
135	memset(t, 0, (sizeof t));
136
137	flash->command[0] = nor->read_opcode;
138	m25p_addr2cmd(nor, from, flash->command);
139
140	t[0].tx_buf = flash->command;
141	t[0].len = m25p_cmdsz(nor) + dummy;
142	spi_message_add_tail(&t[0], &m);
143
144	t[1].rx_buf = buf;
145	t[1].rx_nbits = m25p80_rx_nbits(nor);
146	t[1].len = len;
147	spi_message_add_tail(&t[1], &m);
148
149	spi_sync(spi, &m);
150
151	*retlen = m.actual_length - m25p_cmdsz(nor) - dummy;
152	return 0;
153}
154
155/*
156 * board specific setup should have ensured the SPI clock used here
157 * matches what the READ command supports, at least until this driver
158 * understands FAST_READ (for clocks over 25 MHz).
159 */
160static int m25p_probe(struct spi_device *spi)
161{
162	struct flash_platform_data	*data;
163	struct m25p *flash;
164	struct spi_nor *nor;
165	enum read_mode mode = SPI_NOR_NORMAL;
166	char *flash_name;
167	int ret;
168
169	data = dev_get_platdata(&spi->dev);
170
171	flash = devm_kzalloc(&spi->dev, sizeof(*flash), GFP_KERNEL);
172	if (!flash)
173		return -ENOMEM;
174
175	nor = &flash->spi_nor;
176
177	/* install the hooks */
178	nor->read = m25p80_read;
179	nor->write = m25p80_write;
180	nor->write_reg = m25p80_write_reg;
181	nor->read_reg = m25p80_read_reg;
182
183	nor->dev = &spi->dev;
184	spi_nor_set_flash_node(nor, spi->dev.of_node);
185	nor->priv = flash;
186
187	spi_set_drvdata(spi, flash);
188	flash->spi = spi;
189
190	if (spi->mode & SPI_RX_QUAD)
191		mode = SPI_NOR_QUAD;
192	else if (spi->mode & SPI_RX_DUAL)
193		mode = SPI_NOR_DUAL;
194
195	if (data && data->name)
196		nor->mtd.name = data->name;
197
198	/* For some (historical?) reason many platforms provide two different
199	 * names in flash_platform_data: "name" and "type". Quite often name is
200	 * set to "m25p80" and then "type" provides a real chip name.
201	 * If that's the case, respect "type" and ignore a "name".
202	 */
203	if (data && data->type)
204		flash_name = data->type;
205	else if (!strcmp(spi->modalias, "spi-nor"))
206		flash_name = NULL; /* auto-detect */
207	else
208		flash_name = spi->modalias;
209
210	ret = spi_nor_scan(nor, flash_name, mode);
211	if (ret)
212		return ret;
213
214	return mtd_device_register(&nor->mtd, data ? data->parts : NULL,
215				   data ? data->nr_parts : 0);
216}
217
218
219static int m25p_remove(struct spi_device *spi)
220{
221	struct m25p	*flash = spi_get_drvdata(spi);
222
223	/* Clean up MTD stuff. */
224	return mtd_device_unregister(&flash->spi_nor.mtd);
225}
226
227/*
228 * Do NOT add to this array without reading the following:
229 *
230 * Historically, many flash devices are bound to this driver by their name. But
231 * since most of these flash are compatible to some extent, and their
232 * differences can often be differentiated by the JEDEC read-ID command, we
233 * encourage new users to add support to the spi-nor library, and simply bind
234 * against a generic string here (e.g., "jedec,spi-nor").
235 *
236 * Many flash names are kept here in this list (as well as in spi-nor.c) to
237 * keep them available as module aliases for existing platforms.
238 */
239static const struct spi_device_id m25p_ids[] = {
240	/*
241	 * Allow non-DT platform devices to bind to the "spi-nor" modalias, and
242	 * hack around the fact that the SPI core does not provide uevent
243	 * matching for .of_match_table
244	 */
245	{"spi-nor"},
246
247	/*
248	 * Entries not used in DTs that should be safe to drop after replacing
249	 * them with "spi-nor" in platform data.
250	 */
251	{"s25sl064a"},	{"w25x16"},	{"m25p10"},	{"m25px64"},
252
253	/*
254	 * Entries that were used in DTs without "jedec,spi-nor" fallback and
255	 * should be kept for backward compatibility.
256	 */
257	{"at25df321a"},	{"at25df641"},	{"at26df081a"},
258	{"mr25h256"},
259	{"mx25l4005a"},	{"mx25l1606e"},	{"mx25l6405d"},	{"mx25l12805d"},
260	{"mx25l25635e"},{"mx66l51235l"},
261	{"n25q064"},	{"n25q128a11"},	{"n25q128a13"},	{"n25q512a"},
262	{"s25fl256s1"},	{"s25fl512s"},	{"s25sl12801"},	{"s25fl008k"},
263	{"s25fl064k"},
264	{"sst25vf040b"},{"sst25vf016b"},{"sst25vf032b"},{"sst25wf040"},
265	{"m25p40"},	{"m25p80"},	{"m25p16"},	{"m25p32"},
266	{"m25p64"},	{"m25p128"},
267	{"w25x80"},	{"w25x32"},	{"w25q32"},	{"w25q32dw"},
268	{"w25q80bl"},	{"w25q128"},	{"w25q256"},
269
270	/* Flashes that can't be detected using JEDEC */
271	{"m25p05-nonjedec"},	{"m25p10-nonjedec"},	{"m25p20-nonjedec"},
272	{"m25p40-nonjedec"},	{"m25p80-nonjedec"},	{"m25p16-nonjedec"},
273	{"m25p32-nonjedec"},	{"m25p64-nonjedec"},	{"m25p128-nonjedec"},
274
275	{ },
276};
277MODULE_DEVICE_TABLE(spi, m25p_ids);
278
279static const struct of_device_id m25p_of_table[] = {
280	/*
281	 * Generic compatibility for SPI NOR that can be identified by the
282	 * JEDEC READ ID opcode (0x9F). Use this, if possible.
283	 */
284	{ .compatible = "jedec,spi-nor" },
285	{}
286};
287MODULE_DEVICE_TABLE(of, m25p_of_table);
288
289static struct spi_driver m25p80_driver = {
290	.driver = {
291		.name	= "m25p80",
292		.of_match_table = m25p_of_table,
293	},
294	.id_table	= m25p_ids,
295	.probe	= m25p_probe,
296	.remove	= m25p_remove,
297
298	/* REVISIT: many of these chips have deep power-down modes, which
299	 * should clearly be entered on suspend() to minimize power use.
300	 * And also when they're otherwise idle...
301	 */
302};
303
304module_spi_driver(m25p80_driver);
305
306MODULE_LICENSE("GPL");
307MODULE_AUTHOR("Mike Lavender");
308MODULE_DESCRIPTION("MTD SPI driver for ST M25Pxx flash chips");