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1// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2/*
3 * Copyright (C) 2012-2014, 2018-2019, 2021-2023 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
6 */
7#include <linux/firmware.h>
8#include <linux/rtnetlink.h>
9#include "iwl-trans.h"
10#include "iwl-csr.h"
11#include "mvm.h"
12#include "iwl-eeprom-parse.h"
13#include "iwl-eeprom-read.h"
14#include "iwl-nvm-parse.h"
15#include "iwl-prph.h"
16#include "fw/acpi.h"
17
18/* Default NVM size to read */
19#define IWL_NVM_DEFAULT_CHUNK_SIZE (2 * 1024)
20
21#define NVM_WRITE_OPCODE 1
22#define NVM_READ_OPCODE 0
23
24/* load nvm chunk response */
25enum {
26 READ_NVM_CHUNK_SUCCEED = 0,
27 READ_NVM_CHUNK_NOT_VALID_ADDRESS = 1
28};
29
30/*
31 * prepare the NVM host command w/ the pointers to the nvm buffer
32 * and send it to fw
33 */
34static int iwl_nvm_write_chunk(struct iwl_mvm *mvm, u16 section,
35 u16 offset, u16 length, const u8 *data)
36{
37 struct iwl_nvm_access_cmd nvm_access_cmd = {
38 .offset = cpu_to_le16(offset),
39 .length = cpu_to_le16(length),
40 .type = cpu_to_le16(section),
41 .op_code = NVM_WRITE_OPCODE,
42 };
43 struct iwl_host_cmd cmd = {
44 .id = NVM_ACCESS_CMD,
45 .len = { sizeof(struct iwl_nvm_access_cmd), length },
46 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
47 .data = { &nvm_access_cmd, data },
48 /* data may come from vmalloc, so use _DUP */
49 .dataflags = { 0, IWL_HCMD_DFL_DUP },
50 };
51 struct iwl_rx_packet *pkt;
52 struct iwl_nvm_access_resp *nvm_resp;
53 int ret;
54
55 ret = iwl_mvm_send_cmd(mvm, &cmd);
56 if (ret)
57 return ret;
58
59 pkt = cmd.resp_pkt;
60 /* Extract & check NVM write response */
61 nvm_resp = (void *)pkt->data;
62 if (le16_to_cpu(nvm_resp->status) != READ_NVM_CHUNK_SUCCEED) {
63 IWL_ERR(mvm,
64 "NVM access write command failed for section %u (status = 0x%x)\n",
65 section, le16_to_cpu(nvm_resp->status));
66 ret = -EIO;
67 }
68
69 iwl_free_resp(&cmd);
70 return ret;
71}
72
73static int iwl_nvm_read_chunk(struct iwl_mvm *mvm, u16 section,
74 u16 offset, u16 length, u8 *data)
75{
76 struct iwl_nvm_access_cmd nvm_access_cmd = {
77 .offset = cpu_to_le16(offset),
78 .length = cpu_to_le16(length),
79 .type = cpu_to_le16(section),
80 .op_code = NVM_READ_OPCODE,
81 };
82 struct iwl_nvm_access_resp *nvm_resp;
83 struct iwl_rx_packet *pkt;
84 struct iwl_host_cmd cmd = {
85 .id = NVM_ACCESS_CMD,
86 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
87 .data = { &nvm_access_cmd, },
88 };
89 int ret, bytes_read, offset_read;
90 u8 *resp_data;
91
92 cmd.len[0] = sizeof(struct iwl_nvm_access_cmd);
93
94 ret = iwl_mvm_send_cmd(mvm, &cmd);
95 if (ret)
96 return ret;
97
98 pkt = cmd.resp_pkt;
99
100 /* Extract NVM response */
101 nvm_resp = (void *)pkt->data;
102 ret = le16_to_cpu(nvm_resp->status);
103 bytes_read = le16_to_cpu(nvm_resp->length);
104 offset_read = le16_to_cpu(nvm_resp->offset);
105 resp_data = nvm_resp->data;
106 if (ret) {
107 if ((offset != 0) &&
108 (ret == READ_NVM_CHUNK_NOT_VALID_ADDRESS)) {
109 /*
110 * meaning of NOT_VALID_ADDRESS:
111 * driver try to read chunk from address that is
112 * multiple of 2K and got an error since addr is empty.
113 * meaning of (offset != 0): driver already
114 * read valid data from another chunk so this case
115 * is not an error.
116 */
117 IWL_DEBUG_EEPROM(mvm->trans->dev,
118 "NVM access command failed on offset 0x%x since that section size is multiple 2K\n",
119 offset);
120 ret = 0;
121 } else {
122 IWL_DEBUG_EEPROM(mvm->trans->dev,
123 "NVM access command failed with status %d (device: %s)\n",
124 ret, mvm->trans->name);
125 ret = -ENODATA;
126 }
127 goto exit;
128 }
129
130 if (offset_read != offset) {
131 IWL_ERR(mvm, "NVM ACCESS response with invalid offset %d\n",
132 offset_read);
133 ret = -EINVAL;
134 goto exit;
135 }
136
137 /* Write data to NVM */
138 memcpy(data + offset, resp_data, bytes_read);
139 ret = bytes_read;
140
141exit:
142 iwl_free_resp(&cmd);
143 return ret;
144}
145
146static int iwl_nvm_write_section(struct iwl_mvm *mvm, u16 section,
147 const u8 *data, u16 length)
148{
149 int offset = 0;
150
151 /* copy data in chunks of 2k (and remainder if any) */
152
153 while (offset < length) {
154 int chunk_size, ret;
155
156 chunk_size = min(IWL_NVM_DEFAULT_CHUNK_SIZE,
157 length - offset);
158
159 ret = iwl_nvm_write_chunk(mvm, section, offset,
160 chunk_size, data + offset);
161 if (ret < 0)
162 return ret;
163
164 offset += chunk_size;
165 }
166
167 return 0;
168}
169
170/*
171 * Reads an NVM section completely.
172 * NICs prior to 7000 family doesn't have a real NVM, but just read
173 * section 0 which is the EEPROM. Because the EEPROM reading is unlimited
174 * by uCode, we need to manually check in this case that we don't
175 * overflow and try to read more than the EEPROM size.
176 * For 7000 family NICs, we supply the maximal size we can read, and
177 * the uCode fills the response with as much data as we can,
178 * without overflowing, so no check is needed.
179 */
180static int iwl_nvm_read_section(struct iwl_mvm *mvm, u16 section,
181 u8 *data, u32 size_read)
182{
183 u16 length, offset = 0;
184 int ret;
185
186 /* Set nvm section read length */
187 length = IWL_NVM_DEFAULT_CHUNK_SIZE;
188
189 ret = length;
190
191 /* Read the NVM until exhausted (reading less than requested) */
192 while (ret == length) {
193 /* Check no memory assumptions fail and cause an overflow */
194 if ((size_read + offset + length) >
195 mvm->trans->trans_cfg->base_params->eeprom_size) {
196 IWL_ERR(mvm, "EEPROM size is too small for NVM\n");
197 return -ENOBUFS;
198 }
199
200 ret = iwl_nvm_read_chunk(mvm, section, offset, length, data);
201 if (ret < 0) {
202 IWL_DEBUG_EEPROM(mvm->trans->dev,
203 "Cannot read NVM from section %d offset %d, length %d\n",
204 section, offset, length);
205 return ret;
206 }
207 offset += ret;
208 }
209
210 iwl_nvm_fixups(mvm->trans->hw_id, section, data, offset);
211
212 IWL_DEBUG_EEPROM(mvm->trans->dev,
213 "NVM section %d read completed\n", section);
214 return offset;
215}
216
217static struct iwl_nvm_data *
218iwl_parse_nvm_sections(struct iwl_mvm *mvm)
219{
220 struct iwl_nvm_section *sections = mvm->nvm_sections;
221 const __be16 *hw;
222 const __le16 *sw, *calib, *regulatory, *mac_override, *phy_sku;
223 u8 tx_ant = mvm->fw->valid_tx_ant;
224 u8 rx_ant = mvm->fw->valid_rx_ant;
225 int regulatory_type;
226
227 /* Checking for required sections */
228 if (mvm->trans->cfg->nvm_type == IWL_NVM) {
229 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
230 !mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data) {
231 IWL_ERR(mvm, "Can't parse empty OTP/NVM sections\n");
232 return NULL;
233 }
234 } else {
235 if (mvm->trans->cfg->nvm_type == IWL_NVM_SDP)
236 regulatory_type = NVM_SECTION_TYPE_REGULATORY_SDP;
237 else
238 regulatory_type = NVM_SECTION_TYPE_REGULATORY;
239
240 /* SW and REGULATORY sections are mandatory */
241 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
242 !mvm->nvm_sections[regulatory_type].data) {
243 IWL_ERR(mvm,
244 "Can't parse empty family 8000 OTP/NVM sections\n");
245 return NULL;
246 }
247 /* MAC_OVERRIDE or at least HW section must exist */
248 if (!mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data &&
249 !mvm->nvm_sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data) {
250 IWL_ERR(mvm,
251 "Can't parse mac_address, empty sections\n");
252 return NULL;
253 }
254
255 /* PHY_SKU section is mandatory in B0 */
256 if (mvm->trans->cfg->nvm_type == IWL_NVM_EXT &&
257 !mvm->nvm_sections[NVM_SECTION_TYPE_PHY_SKU].data) {
258 IWL_ERR(mvm,
259 "Can't parse phy_sku in B0, empty sections\n");
260 return NULL;
261 }
262 }
263
264 hw = (const __be16 *)sections[mvm->cfg->nvm_hw_section_num].data;
265 sw = (const __le16 *)sections[NVM_SECTION_TYPE_SW].data;
266 calib = (const __le16 *)sections[NVM_SECTION_TYPE_CALIBRATION].data;
267 mac_override =
268 (const __le16 *)sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data;
269 phy_sku = (const __le16 *)sections[NVM_SECTION_TYPE_PHY_SKU].data;
270
271 regulatory = mvm->trans->cfg->nvm_type == IWL_NVM_SDP ?
272 (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY_SDP].data :
273 (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY].data;
274
275 if (mvm->set_tx_ant)
276 tx_ant &= mvm->set_tx_ant;
277
278 if (mvm->set_rx_ant)
279 rx_ant &= mvm->set_rx_ant;
280
281 return iwl_parse_nvm_data(mvm->trans, mvm->cfg, mvm->fw, hw, sw, calib,
282 regulatory, mac_override, phy_sku,
283 tx_ant, rx_ant);
284}
285
286/* Loads the NVM data stored in mvm->nvm_sections into the NIC */
287int iwl_mvm_load_nvm_to_nic(struct iwl_mvm *mvm)
288{
289 int i, ret = 0;
290 struct iwl_nvm_section *sections = mvm->nvm_sections;
291
292 IWL_DEBUG_EEPROM(mvm->trans->dev, "'Write to NVM\n");
293
294 for (i = 0; i < ARRAY_SIZE(mvm->nvm_sections); i++) {
295 if (!mvm->nvm_sections[i].data || !mvm->nvm_sections[i].length)
296 continue;
297 ret = iwl_nvm_write_section(mvm, i, sections[i].data,
298 sections[i].length);
299 if (ret < 0) {
300 IWL_ERR(mvm, "iwl_mvm_send_cmd failed: %d\n", ret);
301 break;
302 }
303 }
304 return ret;
305}
306
307int iwl_nvm_init(struct iwl_mvm *mvm)
308{
309 int ret, section;
310 u32 size_read = 0;
311 u8 *nvm_buffer, *temp;
312 const char *nvm_file_C = mvm->cfg->default_nvm_file_C_step;
313
314 if (WARN_ON_ONCE(mvm->cfg->nvm_hw_section_num >= NVM_MAX_NUM_SECTIONS))
315 return -EINVAL;
316
317 /* load NVM values from nic */
318 /* Read From FW NVM */
319 IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from NVM\n");
320
321 nvm_buffer = kmalloc(mvm->trans->trans_cfg->base_params->eeprom_size,
322 GFP_KERNEL);
323 if (!nvm_buffer)
324 return -ENOMEM;
325 for (section = 0; section < NVM_MAX_NUM_SECTIONS; section++) {
326 /* we override the constness for initial read */
327 ret = iwl_nvm_read_section(mvm, section, nvm_buffer,
328 size_read);
329 if (ret == -ENODATA) {
330 ret = 0;
331 continue;
332 }
333 if (ret < 0)
334 break;
335 size_read += ret;
336 temp = kmemdup(nvm_buffer, ret, GFP_KERNEL);
337 if (!temp) {
338 ret = -ENOMEM;
339 break;
340 }
341
342 iwl_nvm_fixups(mvm->trans->hw_id, section, temp, ret);
343
344 mvm->nvm_sections[section].data = temp;
345 mvm->nvm_sections[section].length = ret;
346
347#ifdef CONFIG_IWLWIFI_DEBUGFS
348 switch (section) {
349 case NVM_SECTION_TYPE_SW:
350 mvm->nvm_sw_blob.data = temp;
351 mvm->nvm_sw_blob.size = ret;
352 break;
353 case NVM_SECTION_TYPE_CALIBRATION:
354 mvm->nvm_calib_blob.data = temp;
355 mvm->nvm_calib_blob.size = ret;
356 break;
357 case NVM_SECTION_TYPE_PRODUCTION:
358 mvm->nvm_prod_blob.data = temp;
359 mvm->nvm_prod_blob.size = ret;
360 break;
361 case NVM_SECTION_TYPE_PHY_SKU:
362 mvm->nvm_phy_sku_blob.data = temp;
363 mvm->nvm_phy_sku_blob.size = ret;
364 break;
365 case NVM_SECTION_TYPE_REGULATORY_SDP:
366 case NVM_SECTION_TYPE_REGULATORY:
367 mvm->nvm_reg_blob.data = temp;
368 mvm->nvm_reg_blob.size = ret;
369 break;
370 default:
371 if (section == mvm->cfg->nvm_hw_section_num) {
372 mvm->nvm_hw_blob.data = temp;
373 mvm->nvm_hw_blob.size = ret;
374 break;
375 }
376 }
377#endif
378 }
379 if (!size_read)
380 IWL_ERR(mvm, "OTP is blank\n");
381 kfree(nvm_buffer);
382
383 /* Only if PNVM selected in the mod param - load external NVM */
384 if (mvm->nvm_file_name) {
385 /* read External NVM file from the mod param */
386 ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
387 mvm->nvm_sections);
388 if (ret) {
389 mvm->nvm_file_name = nvm_file_C;
390
391 if ((ret == -EFAULT || ret == -ENOENT) &&
392 mvm->nvm_file_name) {
393 /* in case nvm file was failed try again */
394 ret = iwl_read_external_nvm(mvm->trans,
395 mvm->nvm_file_name,
396 mvm->nvm_sections);
397 if (ret)
398 return ret;
399 } else {
400 return ret;
401 }
402 }
403 }
404
405 /* parse the relevant nvm sections */
406 mvm->nvm_data = iwl_parse_nvm_sections(mvm);
407 if (!mvm->nvm_data)
408 return -ENODATA;
409 IWL_DEBUG_EEPROM(mvm->trans->dev, "nvm version = %x\n",
410 mvm->nvm_data->nvm_version);
411
412 return ret < 0 ? ret : 0;
413}
414
415struct iwl_mcc_update_resp_v8 *
416iwl_mvm_update_mcc(struct iwl_mvm *mvm, const char *alpha2,
417 enum iwl_mcc_source src_id)
418{
419 struct iwl_mcc_update_cmd mcc_update_cmd = {
420 .mcc = cpu_to_le16(alpha2[0] << 8 | alpha2[1]),
421 .source_id = (u8)src_id,
422 };
423 struct iwl_mcc_update_resp_v8 *resp_cp;
424 struct iwl_rx_packet *pkt;
425 struct iwl_host_cmd cmd = {
426 .id = MCC_UPDATE_CMD,
427 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
428 .data = { &mcc_update_cmd },
429 };
430
431 int ret, resp_ver;
432 u32 status;
433 int resp_len, n_channels;
434 u16 mcc;
435
436 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
437 return ERR_PTR(-EOPNOTSUPP);
438
439 cmd.len[0] = sizeof(struct iwl_mcc_update_cmd);
440
441 IWL_DEBUG_LAR(mvm, "send MCC update to FW with '%c%c' src = %d\n",
442 alpha2[0], alpha2[1], src_id);
443
444 ret = iwl_mvm_send_cmd(mvm, &cmd);
445 if (ret)
446 return ERR_PTR(ret);
447
448 pkt = cmd.resp_pkt;
449
450 resp_ver = iwl_fw_lookup_notif_ver(mvm->fw, IWL_ALWAYS_LONG_GROUP,
451 MCC_UPDATE_CMD, 0);
452
453 /* Extract MCC response */
454 if (resp_ver >= 8) {
455 struct iwl_mcc_update_resp_v8 *mcc_resp_v8 = (void *)pkt->data;
456
457 n_channels = __le32_to_cpu(mcc_resp_v8->n_channels);
458 if (iwl_rx_packet_payload_len(pkt) !=
459 struct_size(mcc_resp_v8, channels, n_channels)) {
460 resp_cp = ERR_PTR(-EINVAL);
461 goto exit;
462 }
463 resp_len = struct_size(resp_cp, channels, n_channels);
464 resp_cp = kzalloc(resp_len, GFP_KERNEL);
465 if (!resp_cp) {
466 resp_cp = ERR_PTR(-ENOMEM);
467 goto exit;
468 }
469 resp_cp->status = mcc_resp_v8->status;
470 resp_cp->mcc = mcc_resp_v8->mcc;
471 resp_cp->cap = mcc_resp_v8->cap;
472 resp_cp->source_id = mcc_resp_v8->source_id;
473 resp_cp->time = mcc_resp_v8->time;
474 resp_cp->geo_info = mcc_resp_v8->geo_info;
475 resp_cp->n_channels = mcc_resp_v8->n_channels;
476 memcpy(resp_cp->channels, mcc_resp_v8->channels,
477 n_channels * sizeof(__le32));
478 } else if (fw_has_capa(&mvm->fw->ucode_capa,
479 IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT)) {
480 struct iwl_mcc_update_resp_v4 *mcc_resp_v4 = (void *)pkt->data;
481
482 n_channels = __le32_to_cpu(mcc_resp_v4->n_channels);
483 if (iwl_rx_packet_payload_len(pkt) !=
484 struct_size(mcc_resp_v4, channels, n_channels)) {
485 resp_cp = ERR_PTR(-EINVAL);
486 goto exit;
487 }
488 resp_len = struct_size(resp_cp, channels, n_channels);
489 resp_cp = kzalloc(resp_len, GFP_KERNEL);
490 if (!resp_cp) {
491 resp_cp = ERR_PTR(-ENOMEM);
492 goto exit;
493 }
494
495 resp_cp->status = mcc_resp_v4->status;
496 resp_cp->mcc = mcc_resp_v4->mcc;
497 resp_cp->cap = cpu_to_le32(le16_to_cpu(mcc_resp_v4->cap));
498 resp_cp->source_id = mcc_resp_v4->source_id;
499 resp_cp->time = mcc_resp_v4->time;
500 resp_cp->geo_info = mcc_resp_v4->geo_info;
501 resp_cp->n_channels = mcc_resp_v4->n_channels;
502 memcpy(resp_cp->channels, mcc_resp_v4->channels,
503 n_channels * sizeof(__le32));
504 } else {
505 struct iwl_mcc_update_resp_v3 *mcc_resp_v3 = (void *)pkt->data;
506
507 n_channels = __le32_to_cpu(mcc_resp_v3->n_channels);
508 if (iwl_rx_packet_payload_len(pkt) !=
509 struct_size(mcc_resp_v3, channels, n_channels)) {
510 resp_cp = ERR_PTR(-EINVAL);
511 goto exit;
512 }
513 resp_len = struct_size(resp_cp, channels, n_channels);
514 resp_cp = kzalloc(resp_len, GFP_KERNEL);
515 if (!resp_cp) {
516 resp_cp = ERR_PTR(-ENOMEM);
517 goto exit;
518 }
519
520 resp_cp->status = mcc_resp_v3->status;
521 resp_cp->mcc = mcc_resp_v3->mcc;
522 resp_cp->cap = cpu_to_le32(mcc_resp_v3->cap);
523 resp_cp->source_id = mcc_resp_v3->source_id;
524 resp_cp->time = mcc_resp_v3->time;
525 resp_cp->geo_info = mcc_resp_v3->geo_info;
526 resp_cp->n_channels = mcc_resp_v3->n_channels;
527 memcpy(resp_cp->channels, mcc_resp_v3->channels,
528 n_channels * sizeof(__le32));
529 }
530
531 status = le32_to_cpu(resp_cp->status);
532
533 mcc = le16_to_cpu(resp_cp->mcc);
534
535 /* W/A for a FW/NVM issue - returns 0x00 for the world domain */
536 if (mcc == 0) {
537 mcc = 0x3030; /* "00" - world */
538 resp_cp->mcc = cpu_to_le16(mcc);
539 }
540
541 IWL_DEBUG_LAR(mvm,
542 "MCC response status: 0x%x. new MCC: 0x%x ('%c%c') n_chans: %d\n",
543 status, mcc, mcc >> 8, mcc & 0xff, n_channels);
544
545exit:
546 iwl_free_resp(&cmd);
547 return resp_cp;
548}
549
550int iwl_mvm_init_mcc(struct iwl_mvm *mvm)
551{
552 bool tlv_lar;
553 bool nvm_lar;
554 int retval;
555 struct ieee80211_regdomain *regd;
556 char mcc[3];
557
558 if (mvm->cfg->nvm_type == IWL_NVM_EXT) {
559 tlv_lar = fw_has_capa(&mvm->fw->ucode_capa,
560 IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
561 nvm_lar = mvm->nvm_data->lar_enabled;
562 if (tlv_lar != nvm_lar)
563 IWL_INFO(mvm,
564 "Conflict between TLV & NVM regarding enabling LAR (TLV = %s NVM =%s)\n",
565 tlv_lar ? "enabled" : "disabled",
566 nvm_lar ? "enabled" : "disabled");
567 }
568
569 if (!iwl_mvm_is_lar_supported(mvm))
570 return 0;
571
572 /*
573 * try to replay the last set MCC to FW. If it doesn't exist,
574 * queue an update to cfg80211 to retrieve the default alpha2 from FW.
575 */
576 retval = iwl_mvm_init_fw_regd(mvm, true);
577 if (retval != -ENOENT)
578 return retval;
579
580 /*
581 * Driver regulatory hint for initial update, this also informs the
582 * firmware we support wifi location updates.
583 * Disallow scans that might crash the FW while the LAR regdomain
584 * is not set.
585 */
586 mvm->lar_regdom_set = false;
587
588 regd = iwl_mvm_get_current_regdomain(mvm, NULL);
589 if (IS_ERR_OR_NULL(regd))
590 return -EIO;
591
592 if (iwl_mvm_is_wifi_mcc_supported(mvm) &&
593 !iwl_acpi_get_mcc(mvm->dev, mcc)) {
594 kfree(regd);
595 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc,
596 MCC_SOURCE_BIOS, NULL);
597 if (IS_ERR_OR_NULL(regd))
598 return -EIO;
599 }
600
601 retval = regulatory_set_wiphy_regd_sync(mvm->hw->wiphy, regd);
602 kfree(regd);
603 return retval;
604}
605
606void iwl_mvm_rx_chub_update_mcc(struct iwl_mvm *mvm,
607 struct iwl_rx_cmd_buffer *rxb)
608{
609 struct iwl_rx_packet *pkt = rxb_addr(rxb);
610 struct iwl_mcc_chub_notif *notif = (void *)pkt->data;
611 enum iwl_mcc_source src;
612 char mcc[3];
613 struct ieee80211_regdomain *regd;
614 int wgds_tbl_idx;
615
616 lockdep_assert_held(&mvm->mutex);
617
618 if (iwl_mvm_is_vif_assoc(mvm) && notif->source_id == MCC_SOURCE_WIFI) {
619 IWL_DEBUG_LAR(mvm, "Ignore mcc update while associated\n");
620 return;
621 }
622
623 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
624 return;
625
626 mcc[0] = le16_to_cpu(notif->mcc) >> 8;
627 mcc[1] = le16_to_cpu(notif->mcc) & 0xff;
628 mcc[2] = '\0';
629 src = notif->source_id;
630
631 IWL_DEBUG_LAR(mvm,
632 "RX: received chub update mcc cmd (mcc '%s' src %d)\n",
633 mcc, src);
634 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc, src, NULL);
635 if (IS_ERR_OR_NULL(regd))
636 return;
637
638 wgds_tbl_idx = iwl_mvm_get_sar_geo_profile(mvm);
639 if (wgds_tbl_idx < 1)
640 IWL_DEBUG_INFO(mvm,
641 "SAR WGDS is disabled or error received (%d)\n",
642 wgds_tbl_idx);
643 else
644 IWL_DEBUG_INFO(mvm, "SAR WGDS: geo profile %d is configured\n",
645 wgds_tbl_idx);
646
647 regulatory_set_wiphy_regd(mvm->hw->wiphy, regd);
648 kfree(regd);
649}
1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10 * Copyright(c) 2016 Intel Deutschland GmbH
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of version 2 of the GNU General Public License as
14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
24 * USA
25 *
26 * The full GNU General Public License is included in this distribution
27 * in the file called COPYING.
28 *
29 * Contact Information:
30 * Intel Linux Wireless <linuxwifi@intel.com>
31 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
32 *
33 * BSD LICENSE
34 *
35 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
36 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
37 * Copyright(c) 2016 Intel Deutschland GmbH
38 * All rights reserved.
39 *
40 * Redistribution and use in source and binary forms, with or without
41 * modification, are permitted provided that the following conditions
42 * are met:
43 *
44 * * Redistributions of source code must retain the above copyright
45 * notice, this list of conditions and the following disclaimer.
46 * * Redistributions in binary form must reproduce the above copyright
47 * notice, this list of conditions and the following disclaimer in
48 * the documentation and/or other materials provided with the
49 * distribution.
50 * * Neither the name Intel Corporation nor the names of its
51 * contributors may be used to endorse or promote products derived
52 * from this software without specific prior written permission.
53 *
54 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
55 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
56 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
57 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
58 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
59 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
60 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
61 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
62 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
63 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
64 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
65 *
66 *****************************************************************************/
67#include <linux/firmware.h>
68#include <linux/rtnetlink.h>
69#include "iwl-trans.h"
70#include "iwl-csr.h"
71#include "mvm.h"
72#include "iwl-eeprom-parse.h"
73#include "iwl-eeprom-read.h"
74#include "iwl-nvm-parse.h"
75#include "iwl-prph.h"
76
77/* Default NVM size to read */
78#define IWL_NVM_DEFAULT_CHUNK_SIZE (2*1024)
79#define IWL_MAX_NVM_SECTION_SIZE 0x1b58
80#define IWL_MAX_NVM_8000_SECTION_SIZE 0x1ffc
81
82#define NVM_WRITE_OPCODE 1
83#define NVM_READ_OPCODE 0
84
85/* load nvm chunk response */
86enum {
87 READ_NVM_CHUNK_SUCCEED = 0,
88 READ_NVM_CHUNK_NOT_VALID_ADDRESS = 1
89};
90
91/*
92 * prepare the NVM host command w/ the pointers to the nvm buffer
93 * and send it to fw
94 */
95static int iwl_nvm_write_chunk(struct iwl_mvm *mvm, u16 section,
96 u16 offset, u16 length, const u8 *data)
97{
98 struct iwl_nvm_access_cmd nvm_access_cmd = {
99 .offset = cpu_to_le16(offset),
100 .length = cpu_to_le16(length),
101 .type = cpu_to_le16(section),
102 .op_code = NVM_WRITE_OPCODE,
103 };
104 struct iwl_host_cmd cmd = {
105 .id = NVM_ACCESS_CMD,
106 .len = { sizeof(struct iwl_nvm_access_cmd), length },
107 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
108 .data = { &nvm_access_cmd, data },
109 /* data may come from vmalloc, so use _DUP */
110 .dataflags = { 0, IWL_HCMD_DFL_DUP },
111 };
112 struct iwl_rx_packet *pkt;
113 struct iwl_nvm_access_resp *nvm_resp;
114 int ret;
115
116 ret = iwl_mvm_send_cmd(mvm, &cmd);
117 if (ret)
118 return ret;
119
120 pkt = cmd.resp_pkt;
121 if (!pkt) {
122 IWL_ERR(mvm, "Error in NVM_ACCESS response\n");
123 return -EINVAL;
124 }
125 /* Extract & check NVM write response */
126 nvm_resp = (void *)pkt->data;
127 if (le16_to_cpu(nvm_resp->status) != READ_NVM_CHUNK_SUCCEED) {
128 IWL_ERR(mvm,
129 "NVM access write command failed for section %u (status = 0x%x)\n",
130 section, le16_to_cpu(nvm_resp->status));
131 ret = -EIO;
132 }
133
134 iwl_free_resp(&cmd);
135 return ret;
136}
137
138static int iwl_nvm_read_chunk(struct iwl_mvm *mvm, u16 section,
139 u16 offset, u16 length, u8 *data)
140{
141 struct iwl_nvm_access_cmd nvm_access_cmd = {
142 .offset = cpu_to_le16(offset),
143 .length = cpu_to_le16(length),
144 .type = cpu_to_le16(section),
145 .op_code = NVM_READ_OPCODE,
146 };
147 struct iwl_nvm_access_resp *nvm_resp;
148 struct iwl_rx_packet *pkt;
149 struct iwl_host_cmd cmd = {
150 .id = NVM_ACCESS_CMD,
151 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
152 .data = { &nvm_access_cmd, },
153 };
154 int ret, bytes_read, offset_read;
155 u8 *resp_data;
156
157 cmd.len[0] = sizeof(struct iwl_nvm_access_cmd);
158
159 ret = iwl_mvm_send_cmd(mvm, &cmd);
160 if (ret)
161 return ret;
162
163 pkt = cmd.resp_pkt;
164
165 /* Extract NVM response */
166 nvm_resp = (void *)pkt->data;
167 ret = le16_to_cpu(nvm_resp->status);
168 bytes_read = le16_to_cpu(nvm_resp->length);
169 offset_read = le16_to_cpu(nvm_resp->offset);
170 resp_data = nvm_resp->data;
171 if (ret) {
172 if ((offset != 0) &&
173 (ret == READ_NVM_CHUNK_NOT_VALID_ADDRESS)) {
174 /*
175 * meaning of NOT_VALID_ADDRESS:
176 * driver try to read chunk from address that is
177 * multiple of 2K and got an error since addr is empty.
178 * meaning of (offset != 0): driver already
179 * read valid data from another chunk so this case
180 * is not an error.
181 */
182 IWL_DEBUG_EEPROM(mvm->trans->dev,
183 "NVM access command failed on offset 0x%x since that section size is multiple 2K\n",
184 offset);
185 ret = 0;
186 } else {
187 IWL_DEBUG_EEPROM(mvm->trans->dev,
188 "NVM access command failed with status %d (device: %s)\n",
189 ret, mvm->cfg->name);
190 ret = -EIO;
191 }
192 goto exit;
193 }
194
195 if (offset_read != offset) {
196 IWL_ERR(mvm, "NVM ACCESS response with invalid offset %d\n",
197 offset_read);
198 ret = -EINVAL;
199 goto exit;
200 }
201
202 /* Write data to NVM */
203 memcpy(data + offset, resp_data, bytes_read);
204 ret = bytes_read;
205
206exit:
207 iwl_free_resp(&cmd);
208 return ret;
209}
210
211static int iwl_nvm_write_section(struct iwl_mvm *mvm, u16 section,
212 const u8 *data, u16 length)
213{
214 int offset = 0;
215
216 /* copy data in chunks of 2k (and remainder if any) */
217
218 while (offset < length) {
219 int chunk_size, ret;
220
221 chunk_size = min(IWL_NVM_DEFAULT_CHUNK_SIZE,
222 length - offset);
223
224 ret = iwl_nvm_write_chunk(mvm, section, offset,
225 chunk_size, data + offset);
226 if (ret < 0)
227 return ret;
228
229 offset += chunk_size;
230 }
231
232 return 0;
233}
234
235static void iwl_mvm_nvm_fixups(struct iwl_mvm *mvm, unsigned int section,
236 u8 *data, unsigned int len)
237{
238#define IWL_4165_DEVICE_ID 0x5501
239#define NVM_SKU_CAP_MIMO_DISABLE BIT(5)
240
241 if (section == NVM_SECTION_TYPE_PHY_SKU &&
242 mvm->trans->hw_id == IWL_4165_DEVICE_ID && data && len >= 5 &&
243 (data[4] & NVM_SKU_CAP_MIMO_DISABLE))
244 /* OTP 0x52 bug work around: it's a 1x1 device */
245 data[3] = ANT_B | (ANT_B << 4);
246}
247
248/*
249 * Reads an NVM section completely.
250 * NICs prior to 7000 family doesn't have a real NVM, but just read
251 * section 0 which is the EEPROM. Because the EEPROM reading is unlimited
252 * by uCode, we need to manually check in this case that we don't
253 * overflow and try to read more than the EEPROM size.
254 * For 7000 family NICs, we supply the maximal size we can read, and
255 * the uCode fills the response with as much data as we can,
256 * without overflowing, so no check is needed.
257 */
258static int iwl_nvm_read_section(struct iwl_mvm *mvm, u16 section,
259 u8 *data, u32 size_read)
260{
261 u16 length, offset = 0;
262 int ret;
263
264 /* Set nvm section read length */
265 length = IWL_NVM_DEFAULT_CHUNK_SIZE;
266
267 ret = length;
268
269 /* Read the NVM until exhausted (reading less than requested) */
270 while (ret == length) {
271 /* Check no memory assumptions fail and cause an overflow */
272 if ((size_read + offset + length) >
273 mvm->cfg->base_params->eeprom_size) {
274 IWL_ERR(mvm, "EEPROM size is too small for NVM\n");
275 return -ENOBUFS;
276 }
277
278 ret = iwl_nvm_read_chunk(mvm, section, offset, length, data);
279 if (ret < 0) {
280 IWL_DEBUG_EEPROM(mvm->trans->dev,
281 "Cannot read NVM from section %d offset %d, length %d\n",
282 section, offset, length);
283 return ret;
284 }
285 offset += ret;
286 }
287
288 iwl_mvm_nvm_fixups(mvm, section, data, offset);
289
290 IWL_DEBUG_EEPROM(mvm->trans->dev,
291 "NVM section %d read completed\n", section);
292 return offset;
293}
294
295static struct iwl_nvm_data *
296iwl_parse_nvm_sections(struct iwl_mvm *mvm)
297{
298 struct iwl_nvm_section *sections = mvm->nvm_sections;
299 const __le16 *hw, *sw, *calib, *regulatory, *mac_override, *phy_sku;
300 bool lar_enabled;
301
302 /* Checking for required sections */
303 if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000) {
304 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
305 !mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data) {
306 IWL_ERR(mvm, "Can't parse empty OTP/NVM sections\n");
307 return NULL;
308 }
309 } else {
310 /* SW and REGULATORY sections are mandatory */
311 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
312 !mvm->nvm_sections[NVM_SECTION_TYPE_REGULATORY].data) {
313 IWL_ERR(mvm,
314 "Can't parse empty family 8000 OTP/NVM sections\n");
315 return NULL;
316 }
317 /* MAC_OVERRIDE or at least HW section must exist */
318 if (!mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data &&
319 !mvm->nvm_sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data) {
320 IWL_ERR(mvm,
321 "Can't parse mac_address, empty sections\n");
322 return NULL;
323 }
324
325 /* PHY_SKU section is mandatory in B0 */
326 if (!mvm->nvm_sections[NVM_SECTION_TYPE_PHY_SKU].data) {
327 IWL_ERR(mvm,
328 "Can't parse phy_sku in B0, empty sections\n");
329 return NULL;
330 }
331 }
332
333 if (WARN_ON(!mvm->cfg))
334 return NULL;
335
336 hw = (const __le16 *)sections[mvm->cfg->nvm_hw_section_num].data;
337 sw = (const __le16 *)sections[NVM_SECTION_TYPE_SW].data;
338 calib = (const __le16 *)sections[NVM_SECTION_TYPE_CALIBRATION].data;
339 regulatory = (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY].data;
340 mac_override =
341 (const __le16 *)sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data;
342 phy_sku = (const __le16 *)sections[NVM_SECTION_TYPE_PHY_SKU].data;
343
344 lar_enabled = !iwlwifi_mod_params.lar_disable &&
345 fw_has_capa(&mvm->fw->ucode_capa,
346 IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
347
348 return iwl_parse_nvm_data(mvm->trans, mvm->cfg, hw, sw, calib,
349 regulatory, mac_override, phy_sku,
350 mvm->fw->valid_tx_ant, mvm->fw->valid_rx_ant,
351 lar_enabled);
352}
353
354#define MAX_NVM_FILE_LEN 16384
355
356/*
357 * Reads external NVM from a file into mvm->nvm_sections
358 *
359 * HOW TO CREATE THE NVM FILE FORMAT:
360 * ------------------------------
361 * 1. create hex file, format:
362 * 3800 -> header
363 * 0000 -> header
364 * 5a40 -> data
365 *
366 * rev - 6 bit (word1)
367 * len - 10 bit (word1)
368 * id - 4 bit (word2)
369 * rsv - 12 bit (word2)
370 *
371 * 2. flip 8bits with 8 bits per line to get the right NVM file format
372 *
373 * 3. create binary file from the hex file
374 *
375 * 4. save as "iNVM_xxx.bin" under /lib/firmware
376 */
377static int iwl_mvm_read_external_nvm(struct iwl_mvm *mvm)
378{
379 int ret, section_size;
380 u16 section_id;
381 const struct firmware *fw_entry;
382 const struct {
383 __le16 word1;
384 __le16 word2;
385 u8 data[];
386 } *file_sec;
387 const u8 *eof;
388 u8 *temp;
389 int max_section_size;
390 const __le32 *dword_buff;
391
392#define NVM_WORD1_LEN(x) (8 * (x & 0x03FF))
393#define NVM_WORD2_ID(x) (x >> 12)
394#define NVM_WORD2_LEN_FAMILY_8000(x) (2 * ((x & 0xFF) << 8 | x >> 8))
395#define NVM_WORD1_ID_FAMILY_8000(x) (x >> 4)
396#define NVM_HEADER_0 (0x2A504C54)
397#define NVM_HEADER_1 (0x4E564D2A)
398#define NVM_HEADER_SIZE (4 * sizeof(u32))
399
400 IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from external NVM\n");
401
402 /* Maximal size depends on HW family and step */
403 if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000)
404 max_section_size = IWL_MAX_NVM_SECTION_SIZE;
405 else
406 max_section_size = IWL_MAX_NVM_8000_SECTION_SIZE;
407
408 /*
409 * Obtain NVM image via request_firmware. Since we already used
410 * request_firmware_nowait() for the firmware binary load and only
411 * get here after that we assume the NVM request can be satisfied
412 * synchronously.
413 */
414 ret = request_firmware(&fw_entry, mvm->nvm_file_name,
415 mvm->trans->dev);
416 if (ret) {
417 IWL_ERR(mvm, "ERROR: %s isn't available %d\n",
418 mvm->nvm_file_name, ret);
419 return ret;
420 }
421
422 IWL_INFO(mvm, "Loaded NVM file %s (%zu bytes)\n",
423 mvm->nvm_file_name, fw_entry->size);
424
425 if (fw_entry->size > MAX_NVM_FILE_LEN) {
426 IWL_ERR(mvm, "NVM file too large\n");
427 ret = -EINVAL;
428 goto out;
429 }
430
431 eof = fw_entry->data + fw_entry->size;
432 dword_buff = (__le32 *)fw_entry->data;
433
434 /* some NVM file will contain a header.
435 * The header is identified by 2 dwords header as follow:
436 * dword[0] = 0x2A504C54
437 * dword[1] = 0x4E564D2A
438 *
439 * This header must be skipped when providing the NVM data to the FW.
440 */
441 if (fw_entry->size > NVM_HEADER_SIZE &&
442 dword_buff[0] == cpu_to_le32(NVM_HEADER_0) &&
443 dword_buff[1] == cpu_to_le32(NVM_HEADER_1)) {
444 file_sec = (void *)(fw_entry->data + NVM_HEADER_SIZE);
445 IWL_INFO(mvm, "NVM Version %08X\n", le32_to_cpu(dword_buff[2]));
446 IWL_INFO(mvm, "NVM Manufacturing date %08X\n",
447 le32_to_cpu(dword_buff[3]));
448
449 /* nvm file validation, dword_buff[2] holds the file version */
450 if ((CSR_HW_REV_STEP(mvm->trans->hw_rev) == SILICON_C_STEP &&
451 le32_to_cpu(dword_buff[2]) < 0xE4A) ||
452 (CSR_HW_REV_STEP(mvm->trans->hw_rev) == SILICON_B_STEP &&
453 le32_to_cpu(dword_buff[2]) >= 0xE4A)) {
454 ret = -EFAULT;
455 goto out;
456 }
457 } else {
458 file_sec = (void *)fw_entry->data;
459 }
460
461 while (true) {
462 if (file_sec->data > eof) {
463 IWL_ERR(mvm,
464 "ERROR - NVM file too short for section header\n");
465 ret = -EINVAL;
466 break;
467 }
468
469 /* check for EOF marker */
470 if (!file_sec->word1 && !file_sec->word2) {
471 ret = 0;
472 break;
473 }
474
475 if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000) {
476 section_size =
477 2 * NVM_WORD1_LEN(le16_to_cpu(file_sec->word1));
478 section_id = NVM_WORD2_ID(le16_to_cpu(file_sec->word2));
479 } else {
480 section_size = 2 * NVM_WORD2_LEN_FAMILY_8000(
481 le16_to_cpu(file_sec->word2));
482 section_id = NVM_WORD1_ID_FAMILY_8000(
483 le16_to_cpu(file_sec->word1));
484 }
485
486 if (section_size > max_section_size) {
487 IWL_ERR(mvm, "ERROR - section too large (%d)\n",
488 section_size);
489 ret = -EINVAL;
490 break;
491 }
492
493 if (!section_size) {
494 IWL_ERR(mvm, "ERROR - section empty\n");
495 ret = -EINVAL;
496 break;
497 }
498
499 if (file_sec->data + section_size > eof) {
500 IWL_ERR(mvm,
501 "ERROR - NVM file too short for section (%d bytes)\n",
502 section_size);
503 ret = -EINVAL;
504 break;
505 }
506
507 if (WARN(section_id >= NVM_MAX_NUM_SECTIONS,
508 "Invalid NVM section ID %d\n", section_id)) {
509 ret = -EINVAL;
510 break;
511 }
512
513 temp = kmemdup(file_sec->data, section_size, GFP_KERNEL);
514 if (!temp) {
515 ret = -ENOMEM;
516 break;
517 }
518
519 iwl_mvm_nvm_fixups(mvm, section_id, temp, section_size);
520
521 kfree(mvm->nvm_sections[section_id].data);
522 mvm->nvm_sections[section_id].data = temp;
523 mvm->nvm_sections[section_id].length = section_size;
524
525 /* advance to the next section */
526 file_sec = (void *)(file_sec->data + section_size);
527 }
528out:
529 release_firmware(fw_entry);
530 return ret;
531}
532
533/* Loads the NVM data stored in mvm->nvm_sections into the NIC */
534int iwl_mvm_load_nvm_to_nic(struct iwl_mvm *mvm)
535{
536 int i, ret = 0;
537 struct iwl_nvm_section *sections = mvm->nvm_sections;
538
539 IWL_DEBUG_EEPROM(mvm->trans->dev, "'Write to NVM\n");
540
541 for (i = 0; i < ARRAY_SIZE(mvm->nvm_sections); i++) {
542 if (!mvm->nvm_sections[i].data || !mvm->nvm_sections[i].length)
543 continue;
544 ret = iwl_nvm_write_section(mvm, i, sections[i].data,
545 sections[i].length);
546 if (ret < 0) {
547 IWL_ERR(mvm, "iwl_mvm_send_cmd failed: %d\n", ret);
548 break;
549 }
550 }
551 return ret;
552}
553
554int iwl_nvm_init(struct iwl_mvm *mvm, bool read_nvm_from_nic)
555{
556 int ret, section;
557 u32 size_read = 0;
558 u8 *nvm_buffer, *temp;
559 const char *nvm_file_B = mvm->cfg->default_nvm_file_B_step;
560 const char *nvm_file_C = mvm->cfg->default_nvm_file_C_step;
561
562 if (WARN_ON_ONCE(mvm->cfg->nvm_hw_section_num >= NVM_MAX_NUM_SECTIONS))
563 return -EINVAL;
564
565 /* load NVM values from nic */
566 if (read_nvm_from_nic) {
567 /* Read From FW NVM */
568 IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from NVM\n");
569
570 nvm_buffer = kmalloc(mvm->cfg->base_params->eeprom_size,
571 GFP_KERNEL);
572 if (!nvm_buffer)
573 return -ENOMEM;
574 for (section = 0; section < NVM_MAX_NUM_SECTIONS; section++) {
575 /* we override the constness for initial read */
576 ret = iwl_nvm_read_section(mvm, section, nvm_buffer,
577 size_read);
578 if (ret < 0)
579 continue;
580 size_read += ret;
581 temp = kmemdup(nvm_buffer, ret, GFP_KERNEL);
582 if (!temp) {
583 ret = -ENOMEM;
584 break;
585 }
586
587 iwl_mvm_nvm_fixups(mvm, section, temp, ret);
588
589 mvm->nvm_sections[section].data = temp;
590 mvm->nvm_sections[section].length = ret;
591
592#ifdef CONFIG_IWLWIFI_DEBUGFS
593 switch (section) {
594 case NVM_SECTION_TYPE_SW:
595 mvm->nvm_sw_blob.data = temp;
596 mvm->nvm_sw_blob.size = ret;
597 break;
598 case NVM_SECTION_TYPE_CALIBRATION:
599 mvm->nvm_calib_blob.data = temp;
600 mvm->nvm_calib_blob.size = ret;
601 break;
602 case NVM_SECTION_TYPE_PRODUCTION:
603 mvm->nvm_prod_blob.data = temp;
604 mvm->nvm_prod_blob.size = ret;
605 break;
606 case NVM_SECTION_TYPE_PHY_SKU:
607 mvm->nvm_phy_sku_blob.data = temp;
608 mvm->nvm_phy_sku_blob.size = ret;
609 break;
610 default:
611 if (section == mvm->cfg->nvm_hw_section_num) {
612 mvm->nvm_hw_blob.data = temp;
613 mvm->nvm_hw_blob.size = ret;
614 break;
615 }
616 }
617#endif
618 }
619 if (!size_read)
620 IWL_ERR(mvm, "OTP is blank\n");
621 kfree(nvm_buffer);
622 }
623
624 /* Only if PNVM selected in the mod param - load external NVM */
625 if (mvm->nvm_file_name) {
626 /* read External NVM file from the mod param */
627 ret = iwl_mvm_read_external_nvm(mvm);
628 if (ret) {
629 /* choose the nvm_file name according to the
630 * HW step
631 */
632 if (CSR_HW_REV_STEP(mvm->trans->hw_rev) ==
633 SILICON_B_STEP)
634 mvm->nvm_file_name = nvm_file_B;
635 else
636 mvm->nvm_file_name = nvm_file_C;
637
638 if ((ret == -EFAULT || ret == -ENOENT) &&
639 mvm->nvm_file_name) {
640 /* in case nvm file was failed try again */
641 ret = iwl_mvm_read_external_nvm(mvm);
642 if (ret)
643 return ret;
644 } else {
645 return ret;
646 }
647 }
648 }
649
650 /* parse the relevant nvm sections */
651 mvm->nvm_data = iwl_parse_nvm_sections(mvm);
652 if (!mvm->nvm_data)
653 return -ENODATA;
654 IWL_DEBUG_EEPROM(mvm->trans->dev, "nvm version = %x\n",
655 mvm->nvm_data->nvm_version);
656
657 return 0;
658}
659
660struct iwl_mcc_update_resp *
661iwl_mvm_update_mcc(struct iwl_mvm *mvm, const char *alpha2,
662 enum iwl_mcc_source src_id)
663{
664 struct iwl_mcc_update_cmd mcc_update_cmd = {
665 .mcc = cpu_to_le16(alpha2[0] << 8 | alpha2[1]),
666 .source_id = (u8)src_id,
667 };
668 struct iwl_mcc_update_resp *resp_cp;
669 struct iwl_rx_packet *pkt;
670 struct iwl_host_cmd cmd = {
671 .id = MCC_UPDATE_CMD,
672 .flags = CMD_WANT_SKB,
673 .data = { &mcc_update_cmd },
674 };
675
676 int ret;
677 u32 status;
678 int resp_len, n_channels;
679 u16 mcc;
680 bool resp_v2 = fw_has_capa(&mvm->fw->ucode_capa,
681 IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V2);
682
683 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
684 return ERR_PTR(-EOPNOTSUPP);
685
686 cmd.len[0] = sizeof(struct iwl_mcc_update_cmd);
687 if (!resp_v2)
688 cmd.len[0] = sizeof(struct iwl_mcc_update_cmd_v1);
689
690 IWL_DEBUG_LAR(mvm, "send MCC update to FW with '%c%c' src = %d\n",
691 alpha2[0], alpha2[1], src_id);
692
693 ret = iwl_mvm_send_cmd(mvm, &cmd);
694 if (ret)
695 return ERR_PTR(ret);
696
697 pkt = cmd.resp_pkt;
698
699 /* Extract MCC response */
700 if (resp_v2) {
701 struct iwl_mcc_update_resp *mcc_resp = (void *)pkt->data;
702
703 n_channels = __le32_to_cpu(mcc_resp->n_channels);
704 resp_len = sizeof(struct iwl_mcc_update_resp) +
705 n_channels * sizeof(__le32);
706 resp_cp = kmemdup(mcc_resp, resp_len, GFP_KERNEL);
707 } else {
708 struct iwl_mcc_update_resp_v1 *mcc_resp_v1 = (void *)pkt->data;
709
710 n_channels = __le32_to_cpu(mcc_resp_v1->n_channels);
711 resp_len = sizeof(struct iwl_mcc_update_resp) +
712 n_channels * sizeof(__le32);
713 resp_cp = kzalloc(resp_len, GFP_KERNEL);
714
715 if (resp_cp) {
716 resp_cp->status = mcc_resp_v1->status;
717 resp_cp->mcc = mcc_resp_v1->mcc;
718 resp_cp->cap = mcc_resp_v1->cap;
719 resp_cp->source_id = mcc_resp_v1->source_id;
720 resp_cp->n_channels = mcc_resp_v1->n_channels;
721 memcpy(resp_cp->channels, mcc_resp_v1->channels,
722 n_channels * sizeof(__le32));
723 }
724 }
725
726 if (!resp_cp) {
727 ret = -ENOMEM;
728 goto exit;
729 }
730
731 status = le32_to_cpu(resp_cp->status);
732
733 mcc = le16_to_cpu(resp_cp->mcc);
734
735 /* W/A for a FW/NVM issue - returns 0x00 for the world domain */
736 if (mcc == 0) {
737 mcc = 0x3030; /* "00" - world */
738 resp_cp->mcc = cpu_to_le16(mcc);
739 }
740
741 IWL_DEBUG_LAR(mvm,
742 "MCC response status: 0x%x. new MCC: 0x%x ('%c%c') change: %d n_chans: %d\n",
743 status, mcc, mcc >> 8, mcc & 0xff,
744 !!(status == MCC_RESP_NEW_CHAN_PROFILE), n_channels);
745
746exit:
747 iwl_free_resp(&cmd);
748 if (ret)
749 return ERR_PTR(ret);
750 return resp_cp;
751}
752
753int iwl_mvm_init_mcc(struct iwl_mvm *mvm)
754{
755 bool tlv_lar;
756 bool nvm_lar;
757 int retval;
758 struct ieee80211_regdomain *regd;
759 char mcc[3];
760
761 if (mvm->cfg->device_family == IWL_DEVICE_FAMILY_8000) {
762 tlv_lar = fw_has_capa(&mvm->fw->ucode_capa,
763 IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
764 nvm_lar = mvm->nvm_data->lar_enabled;
765 if (tlv_lar != nvm_lar)
766 IWL_INFO(mvm,
767 "Conflict between TLV & NVM regarding enabling LAR (TLV = %s NVM =%s)\n",
768 tlv_lar ? "enabled" : "disabled",
769 nvm_lar ? "enabled" : "disabled");
770 }
771
772 if (!iwl_mvm_is_lar_supported(mvm))
773 return 0;
774
775 /*
776 * try to replay the last set MCC to FW. If it doesn't exist,
777 * queue an update to cfg80211 to retrieve the default alpha2 from FW.
778 */
779 retval = iwl_mvm_init_fw_regd(mvm);
780 if (retval != -ENOENT)
781 return retval;
782
783 /*
784 * Driver regulatory hint for initial update, this also informs the
785 * firmware we support wifi location updates.
786 * Disallow scans that might crash the FW while the LAR regdomain
787 * is not set.
788 */
789 mvm->lar_regdom_set = false;
790
791 regd = iwl_mvm_get_current_regdomain(mvm, NULL);
792 if (IS_ERR_OR_NULL(regd))
793 return -EIO;
794
795 if (iwl_mvm_is_wifi_mcc_supported(mvm) &&
796 !iwl_get_bios_mcc(mvm->dev, mcc)) {
797 kfree(regd);
798 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc,
799 MCC_SOURCE_BIOS, NULL);
800 if (IS_ERR_OR_NULL(regd))
801 return -EIO;
802 }
803
804 retval = regulatory_set_wiphy_regd_sync_rtnl(mvm->hw->wiphy, regd);
805 kfree(regd);
806 return retval;
807}
808
809void iwl_mvm_rx_chub_update_mcc(struct iwl_mvm *mvm,
810 struct iwl_rx_cmd_buffer *rxb)
811{
812 struct iwl_rx_packet *pkt = rxb_addr(rxb);
813 struct iwl_mcc_chub_notif *notif = (void *)pkt->data;
814 enum iwl_mcc_source src;
815 char mcc[3];
816 struct ieee80211_regdomain *regd;
817
818 lockdep_assert_held(&mvm->mutex);
819
820 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
821 return;
822
823 mcc[0] = notif->mcc >> 8;
824 mcc[1] = notif->mcc & 0xff;
825 mcc[2] = '\0';
826 src = notif->source_id;
827
828 IWL_DEBUG_LAR(mvm,
829 "RX: received chub update mcc cmd (mcc '%s' src %d)\n",
830 mcc, src);
831 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc, src, NULL);
832 if (IS_ERR_OR_NULL(regd))
833 return;
834
835 regulatory_set_wiphy_regd(mvm->hw->wiphy, regd);
836 kfree(regd);
837}