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1// SPDX-License-Identifier: GPL-2.0-or-later
2/***************************************************************************
3 *
4 * Copyright (C) 2004-2008 SMSC
5 * Copyright (C) 2005-2008 ARM
6 *
7 ***************************************************************************
8 * Rewritten, heavily based on smsc911x simple driver by SMSC.
9 * Partly uses io macros from smc91x.c by Nicolas Pitre
10 *
11 * Supported devices:
12 * LAN9115, LAN9116, LAN9117, LAN9118
13 * LAN9215, LAN9216, LAN9217, LAN9218
14 * LAN9210, LAN9211
15 * LAN9220, LAN9221
16 * LAN89218,LAN9250
17 */
18
19#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20
21#include <linux/crc32.h>
22#include <linux/clk.h>
23#include <linux/delay.h>
24#include <linux/errno.h>
25#include <linux/etherdevice.h>
26#include <linux/ethtool.h>
27#include <linux/init.h>
28#include <linux/interrupt.h>
29#include <linux/ioport.h>
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/netdevice.h>
33#include <linux/platform_device.h>
34#include <linux/regulator/consumer.h>
35#include <linux/sched.h>
36#include <linux/timer.h>
37#include <linux/bug.h>
38#include <linux/bitops.h>
39#include <linux/irq.h>
40#include <linux/io.h>
41#include <linux/swab.h>
42#include <linux/phy.h>
43#include <linux/smsc911x.h>
44#include <linux/device.h>
45#include <linux/of.h>
46#include <linux/of_gpio.h>
47#include <linux/of_net.h>
48#include <linux/acpi.h>
49#include <linux/pm_runtime.h>
50#include <linux/property.h>
51#include <linux/gpio/consumer.h>
52
53#include "smsc911x.h"
54
55#define SMSC_CHIPNAME "smsc911x"
56#define SMSC_MDIONAME "smsc911x-mdio"
57#define SMSC_DRV_VERSION "2008-10-21"
58
59MODULE_LICENSE("GPL");
60MODULE_VERSION(SMSC_DRV_VERSION);
61MODULE_ALIAS("platform:smsc911x");
62
63#if USE_DEBUG > 0
64static int debug = 16;
65#else
66static int debug = 3;
67#endif
68
69module_param(debug, int, 0);
70MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
71
72struct smsc911x_data;
73
74struct smsc911x_ops {
75 u32 (*reg_read)(struct smsc911x_data *pdata, u32 reg);
76 void (*reg_write)(struct smsc911x_data *pdata, u32 reg, u32 val);
77 void (*rx_readfifo)(struct smsc911x_data *pdata,
78 unsigned int *buf, unsigned int wordcount);
79 void (*tx_writefifo)(struct smsc911x_data *pdata,
80 unsigned int *buf, unsigned int wordcount);
81};
82
83#define SMSC911X_NUM_SUPPLIES 2
84
85struct smsc911x_data {
86 void __iomem *ioaddr;
87
88 unsigned int idrev;
89
90 /* used to decide which workarounds apply */
91 unsigned int generation;
92
93 /* device configuration (copied from platform_data during probe) */
94 struct smsc911x_platform_config config;
95
96 /* This needs to be acquired before calling any of below:
97 * smsc911x_mac_read(), smsc911x_mac_write()
98 */
99 spinlock_t mac_lock;
100
101 /* spinlock to ensure register accesses are serialised */
102 spinlock_t dev_lock;
103
104 struct mii_bus *mii_bus;
105 unsigned int using_extphy;
106 int last_duplex;
107 int last_carrier;
108
109 u32 msg_enable;
110 unsigned int gpio_setting;
111 unsigned int gpio_orig_setting;
112 struct net_device *dev;
113 struct napi_struct napi;
114
115 unsigned int software_irq_signal;
116
117#ifdef USE_PHY_WORK_AROUND
118#define MIN_PACKET_SIZE (64)
119 char loopback_tx_pkt[MIN_PACKET_SIZE];
120 char loopback_rx_pkt[MIN_PACKET_SIZE];
121 unsigned int resetcount;
122#endif
123
124 /* Members for Multicast filter workaround */
125 unsigned int multicast_update_pending;
126 unsigned int set_bits_mask;
127 unsigned int clear_bits_mask;
128 unsigned int hashhi;
129 unsigned int hashlo;
130
131 /* register access functions */
132 const struct smsc911x_ops *ops;
133
134 /* regulators */
135 struct regulator_bulk_data supplies[SMSC911X_NUM_SUPPLIES];
136
137 /* Reset GPIO */
138 struct gpio_desc *reset_gpiod;
139
140 /* clock */
141 struct clk *clk;
142};
143
144/* Easy access to information */
145#define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift))
146
147static inline u32 __smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
148{
149 if (pdata->config.flags & SMSC911X_USE_32BIT)
150 return readl(pdata->ioaddr + reg);
151
152 if (pdata->config.flags & SMSC911X_USE_16BIT)
153 return ((readw(pdata->ioaddr + reg) & 0xFFFF) |
154 ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16));
155
156 BUG();
157 return 0;
158}
159
160static inline u32
161__smsc911x_reg_read_shift(struct smsc911x_data *pdata, u32 reg)
162{
163 if (pdata->config.flags & SMSC911X_USE_32BIT)
164 return readl(pdata->ioaddr + __smsc_shift(pdata, reg));
165
166 if (pdata->config.flags & SMSC911X_USE_16BIT)
167 return (readw(pdata->ioaddr +
168 __smsc_shift(pdata, reg)) & 0xFFFF) |
169 ((readw(pdata->ioaddr +
170 __smsc_shift(pdata, reg + 2)) & 0xFFFF) << 16);
171
172 BUG();
173 return 0;
174}
175
176static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
177{
178 u32 data;
179 unsigned long flags;
180
181 spin_lock_irqsave(&pdata->dev_lock, flags);
182 data = pdata->ops->reg_read(pdata, reg);
183 spin_unlock_irqrestore(&pdata->dev_lock, flags);
184
185 return data;
186}
187
188static inline void __smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
189 u32 val)
190{
191 if (pdata->config.flags & SMSC911X_USE_32BIT) {
192 writel(val, pdata->ioaddr + reg);
193 return;
194 }
195
196 if (pdata->config.flags & SMSC911X_USE_16BIT) {
197 writew(val & 0xFFFF, pdata->ioaddr + reg);
198 writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2);
199 return;
200 }
201
202 BUG();
203}
204
205static inline void
206__smsc911x_reg_write_shift(struct smsc911x_data *pdata, u32 reg, u32 val)
207{
208 if (pdata->config.flags & SMSC911X_USE_32BIT) {
209 writel(val, pdata->ioaddr + __smsc_shift(pdata, reg));
210 return;
211 }
212
213 if (pdata->config.flags & SMSC911X_USE_16BIT) {
214 writew(val & 0xFFFF,
215 pdata->ioaddr + __smsc_shift(pdata, reg));
216 writew((val >> 16) & 0xFFFF,
217 pdata->ioaddr + __smsc_shift(pdata, reg + 2));
218 return;
219 }
220
221 BUG();
222}
223
224static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
225 u32 val)
226{
227 unsigned long flags;
228
229 spin_lock_irqsave(&pdata->dev_lock, flags);
230 pdata->ops->reg_write(pdata, reg, val);
231 spin_unlock_irqrestore(&pdata->dev_lock, flags);
232}
233
234/* Writes a packet to the TX_DATA_FIFO */
235static inline void
236smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf,
237 unsigned int wordcount)
238{
239 unsigned long flags;
240
241 spin_lock_irqsave(&pdata->dev_lock, flags);
242
243 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
244 while (wordcount--)
245 __smsc911x_reg_write(pdata, TX_DATA_FIFO,
246 swab32(*buf++));
247 goto out;
248 }
249
250 if (pdata->config.flags & SMSC911X_USE_32BIT) {
251 iowrite32_rep(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount);
252 goto out;
253 }
254
255 if (pdata->config.flags & SMSC911X_USE_16BIT) {
256 while (wordcount--)
257 __smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++);
258 goto out;
259 }
260
261 BUG();
262out:
263 spin_unlock_irqrestore(&pdata->dev_lock, flags);
264}
265
266/* Writes a packet to the TX_DATA_FIFO - shifted version */
267static inline void
268smsc911x_tx_writefifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
269 unsigned int wordcount)
270{
271 unsigned long flags;
272
273 spin_lock_irqsave(&pdata->dev_lock, flags);
274
275 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
276 while (wordcount--)
277 __smsc911x_reg_write_shift(pdata, TX_DATA_FIFO,
278 swab32(*buf++));
279 goto out;
280 }
281
282 if (pdata->config.flags & SMSC911X_USE_32BIT) {
283 iowrite32_rep(pdata->ioaddr + __smsc_shift(pdata,
284 TX_DATA_FIFO), buf, wordcount);
285 goto out;
286 }
287
288 if (pdata->config.flags & SMSC911X_USE_16BIT) {
289 while (wordcount--)
290 __smsc911x_reg_write_shift(pdata,
291 TX_DATA_FIFO, *buf++);
292 goto out;
293 }
294
295 BUG();
296out:
297 spin_unlock_irqrestore(&pdata->dev_lock, flags);
298}
299
300/* Reads a packet out of the RX_DATA_FIFO */
301static inline void
302smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf,
303 unsigned int wordcount)
304{
305 unsigned long flags;
306
307 spin_lock_irqsave(&pdata->dev_lock, flags);
308
309 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
310 while (wordcount--)
311 *buf++ = swab32(__smsc911x_reg_read(pdata,
312 RX_DATA_FIFO));
313 goto out;
314 }
315
316 if (pdata->config.flags & SMSC911X_USE_32BIT) {
317 ioread32_rep(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount);
318 goto out;
319 }
320
321 if (pdata->config.flags & SMSC911X_USE_16BIT) {
322 while (wordcount--)
323 *buf++ = __smsc911x_reg_read(pdata, RX_DATA_FIFO);
324 goto out;
325 }
326
327 BUG();
328out:
329 spin_unlock_irqrestore(&pdata->dev_lock, flags);
330}
331
332/* Reads a packet out of the RX_DATA_FIFO - shifted version */
333static inline void
334smsc911x_rx_readfifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
335 unsigned int wordcount)
336{
337 unsigned long flags;
338
339 spin_lock_irqsave(&pdata->dev_lock, flags);
340
341 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
342 while (wordcount--)
343 *buf++ = swab32(__smsc911x_reg_read_shift(pdata,
344 RX_DATA_FIFO));
345 goto out;
346 }
347
348 if (pdata->config.flags & SMSC911X_USE_32BIT) {
349 ioread32_rep(pdata->ioaddr + __smsc_shift(pdata,
350 RX_DATA_FIFO), buf, wordcount);
351 goto out;
352 }
353
354 if (pdata->config.flags & SMSC911X_USE_16BIT) {
355 while (wordcount--)
356 *buf++ = __smsc911x_reg_read_shift(pdata,
357 RX_DATA_FIFO);
358 goto out;
359 }
360
361 BUG();
362out:
363 spin_unlock_irqrestore(&pdata->dev_lock, flags);
364}
365
366/*
367 * enable regulator and clock resources.
368 */
369static int smsc911x_enable_resources(struct platform_device *pdev)
370{
371 struct net_device *ndev = platform_get_drvdata(pdev);
372 struct smsc911x_data *pdata = netdev_priv(ndev);
373 int ret = 0;
374
375 ret = regulator_bulk_enable(ARRAY_SIZE(pdata->supplies),
376 pdata->supplies);
377 if (ret)
378 netdev_err(ndev, "failed to enable regulators %d\n",
379 ret);
380
381 if (!IS_ERR(pdata->clk)) {
382 ret = clk_prepare_enable(pdata->clk);
383 if (ret < 0)
384 netdev_err(ndev, "failed to enable clock %d\n", ret);
385 }
386
387 return ret;
388}
389
390/*
391 * disable resources, currently just regulators.
392 */
393static int smsc911x_disable_resources(struct platform_device *pdev)
394{
395 struct net_device *ndev = platform_get_drvdata(pdev);
396 struct smsc911x_data *pdata = netdev_priv(ndev);
397 int ret = 0;
398
399 ret = regulator_bulk_disable(ARRAY_SIZE(pdata->supplies),
400 pdata->supplies);
401
402 if (!IS_ERR(pdata->clk))
403 clk_disable_unprepare(pdata->clk);
404
405 return ret;
406}
407
408/*
409 * Request resources, currently just regulators.
410 *
411 * The SMSC911x has two power pins: vddvario and vdd33a, in designs where
412 * these are not always-on we need to request regulators to be turned on
413 * before we can try to access the device registers.
414 */
415static int smsc911x_request_resources(struct platform_device *pdev)
416{
417 struct net_device *ndev = platform_get_drvdata(pdev);
418 struct smsc911x_data *pdata = netdev_priv(ndev);
419 int ret = 0;
420
421 /* Request regulators */
422 pdata->supplies[0].supply = "vdd33a";
423 pdata->supplies[1].supply = "vddvario";
424 ret = regulator_bulk_get(&pdev->dev,
425 ARRAY_SIZE(pdata->supplies),
426 pdata->supplies);
427 if (ret) {
428 /*
429 * Retry on deferrals, else just report the error
430 * and try to continue.
431 */
432 if (ret == -EPROBE_DEFER)
433 return ret;
434 netdev_err(ndev, "couldn't get regulators %d\n",
435 ret);
436 }
437
438 /* Request optional RESET GPIO */
439 pdata->reset_gpiod = devm_gpiod_get_optional(&pdev->dev,
440 "reset",
441 GPIOD_OUT_LOW);
442
443 /* Request clock */
444 pdata->clk = clk_get(&pdev->dev, NULL);
445 if (IS_ERR(pdata->clk))
446 dev_dbg(&pdev->dev, "couldn't get clock %li\n",
447 PTR_ERR(pdata->clk));
448
449 return ret;
450}
451
452/*
453 * Free resources, currently just regulators.
454 *
455 */
456static void smsc911x_free_resources(struct platform_device *pdev)
457{
458 struct net_device *ndev = platform_get_drvdata(pdev);
459 struct smsc911x_data *pdata = netdev_priv(ndev);
460
461 /* Free regulators */
462 regulator_bulk_free(ARRAY_SIZE(pdata->supplies),
463 pdata->supplies);
464
465 /* Free clock */
466 if (!IS_ERR(pdata->clk)) {
467 clk_put(pdata->clk);
468 pdata->clk = NULL;
469 }
470}
471
472/* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
473 * and smsc911x_mac_write, so assumes mac_lock is held */
474static int smsc911x_mac_complete(struct smsc911x_data *pdata)
475{
476 int i;
477 u32 val;
478
479 SMSC_ASSERT_MAC_LOCK(pdata);
480
481 for (i = 0; i < 40; i++) {
482 val = smsc911x_reg_read(pdata, MAC_CSR_CMD);
483 if (!(val & MAC_CSR_CMD_CSR_BUSY_))
484 return 0;
485 }
486 SMSC_WARN(pdata, hw, "Timed out waiting for MAC not BUSY. "
487 "MAC_CSR_CMD: 0x%08X", val);
488 return -EIO;
489}
490
491/* Fetches a MAC register value. Assumes mac_lock is acquired */
492static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset)
493{
494 unsigned int temp;
495
496 SMSC_ASSERT_MAC_LOCK(pdata);
497
498 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
499 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
500 SMSC_WARN(pdata, hw, "MAC busy at entry");
501 return 0xFFFFFFFF;
502 }
503
504 /* Send the MAC cmd */
505 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
506 MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_));
507
508 /* Workaround for hardware read-after-write restriction */
509 temp = smsc911x_reg_read(pdata, BYTE_TEST);
510
511 /* Wait for the read to complete */
512 if (likely(smsc911x_mac_complete(pdata) == 0))
513 return smsc911x_reg_read(pdata, MAC_CSR_DATA);
514
515 SMSC_WARN(pdata, hw, "MAC busy after read");
516 return 0xFFFFFFFF;
517}
518
519/* Set a mac register, mac_lock must be acquired before calling */
520static void smsc911x_mac_write(struct smsc911x_data *pdata,
521 unsigned int offset, u32 val)
522{
523 unsigned int temp;
524
525 SMSC_ASSERT_MAC_LOCK(pdata);
526
527 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
528 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
529 SMSC_WARN(pdata, hw,
530 "smsc911x_mac_write failed, MAC busy at entry");
531 return;
532 }
533
534 /* Send data to write */
535 smsc911x_reg_write(pdata, MAC_CSR_DATA, val);
536
537 /* Write the actual data */
538 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
539 MAC_CSR_CMD_CSR_BUSY_));
540
541 /* Workaround for hardware read-after-write restriction */
542 temp = smsc911x_reg_read(pdata, BYTE_TEST);
543
544 /* Wait for the write to complete */
545 if (likely(smsc911x_mac_complete(pdata) == 0))
546 return;
547
548 SMSC_WARN(pdata, hw, "smsc911x_mac_write failed, MAC busy after write");
549}
550
551/* Get a phy register */
552static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx)
553{
554 struct smsc911x_data *pdata = bus->priv;
555 unsigned long flags;
556 unsigned int addr;
557 int i, reg;
558
559 pm_runtime_get_sync(bus->parent);
560 spin_lock_irqsave(&pdata->mac_lock, flags);
561
562 /* Confirm MII not busy */
563 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
564 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_read???");
565 reg = -EIO;
566 goto out;
567 }
568
569 /* Set the address, index & direction (read from PHY) */
570 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6);
571 smsc911x_mac_write(pdata, MII_ACC, addr);
572
573 /* Wait for read to complete w/ timeout */
574 for (i = 0; i < 100; i++)
575 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
576 reg = smsc911x_mac_read(pdata, MII_DATA);
577 goto out;
578 }
579
580 SMSC_WARN(pdata, hw, "Timed out waiting for MII read to finish");
581 reg = -EIO;
582
583out:
584 spin_unlock_irqrestore(&pdata->mac_lock, flags);
585 pm_runtime_put(bus->parent);
586 return reg;
587}
588
589/* Set a phy register */
590static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx,
591 u16 val)
592{
593 struct smsc911x_data *pdata = bus->priv;
594 unsigned long flags;
595 unsigned int addr;
596 int i, reg;
597
598 pm_runtime_get_sync(bus->parent);
599 spin_lock_irqsave(&pdata->mac_lock, flags);
600
601 /* Confirm MII not busy */
602 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
603 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_write???");
604 reg = -EIO;
605 goto out;
606 }
607
608 /* Put the data to write in the MAC */
609 smsc911x_mac_write(pdata, MII_DATA, val);
610
611 /* Set the address, index & direction (write to PHY) */
612 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
613 MII_ACC_MII_WRITE_;
614 smsc911x_mac_write(pdata, MII_ACC, addr);
615
616 /* Wait for write to complete w/ timeout */
617 for (i = 0; i < 100; i++)
618 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
619 reg = 0;
620 goto out;
621 }
622
623 SMSC_WARN(pdata, hw, "Timed out waiting for MII write to finish");
624 reg = -EIO;
625
626out:
627 spin_unlock_irqrestore(&pdata->mac_lock, flags);
628 pm_runtime_put(bus->parent);
629 return reg;
630}
631
632/* Switch to external phy. Assumes tx and rx are stopped. */
633static void smsc911x_phy_enable_external(struct smsc911x_data *pdata)
634{
635 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
636
637 /* Disable phy clocks to the MAC */
638 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
639 hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
640 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
641 udelay(10); /* Enough time for clocks to stop */
642
643 /* Switch to external phy */
644 hwcfg |= HW_CFG_EXT_PHY_EN_;
645 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
646
647 /* Enable phy clocks to the MAC */
648 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
649 hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
650 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
651 udelay(10); /* Enough time for clocks to restart */
652
653 hwcfg |= HW_CFG_SMI_SEL_;
654 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
655}
656
657/* Autodetects and enables external phy if present on supported chips.
658 * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY
659 * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */
660static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata)
661{
662 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
663
664 if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) {
665 SMSC_TRACE(pdata, hw, "Forcing internal PHY");
666 pdata->using_extphy = 0;
667 } else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) {
668 SMSC_TRACE(pdata, hw, "Forcing external PHY");
669 smsc911x_phy_enable_external(pdata);
670 pdata->using_extphy = 1;
671 } else if (hwcfg & HW_CFG_EXT_PHY_DET_) {
672 SMSC_TRACE(pdata, hw,
673 "HW_CFG EXT_PHY_DET set, using external PHY");
674 smsc911x_phy_enable_external(pdata);
675 pdata->using_extphy = 1;
676 } else {
677 SMSC_TRACE(pdata, hw,
678 "HW_CFG EXT_PHY_DET clear, using internal PHY");
679 pdata->using_extphy = 0;
680 }
681}
682
683/* Fetches a tx status out of the status fifo */
684static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata)
685{
686 unsigned int result =
687 smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_;
688
689 if (result != 0)
690 result = smsc911x_reg_read(pdata, TX_STATUS_FIFO);
691
692 return result;
693}
694
695/* Fetches the next rx status */
696static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata)
697{
698 unsigned int result =
699 smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_;
700
701 if (result != 0)
702 result = smsc911x_reg_read(pdata, RX_STATUS_FIFO);
703
704 return result;
705}
706
707#ifdef USE_PHY_WORK_AROUND
708static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata)
709{
710 unsigned int tries;
711 u32 wrsz;
712 u32 rdsz;
713 ulong bufp;
714
715 for (tries = 0; tries < 10; tries++) {
716 unsigned int txcmd_a;
717 unsigned int txcmd_b;
718 unsigned int status;
719 unsigned int pktlength;
720 unsigned int i;
721
722 /* Zero-out rx packet memory */
723 memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE);
724
725 /* Write tx packet to 118 */
726 txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16;
727 txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
728 txcmd_a |= MIN_PACKET_SIZE;
729
730 txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE;
731
732 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a);
733 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b);
734
735 bufp = (ulong)pdata->loopback_tx_pkt & (~0x3);
736 wrsz = MIN_PACKET_SIZE + 3;
737 wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3);
738 wrsz >>= 2;
739
740 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
741
742 /* Wait till transmit is done */
743 i = 60;
744 do {
745 udelay(5);
746 status = smsc911x_tx_get_txstatus(pdata);
747 } while ((i--) && (!status));
748
749 if (!status) {
750 SMSC_WARN(pdata, hw,
751 "Failed to transmit during loopback test");
752 continue;
753 }
754 if (status & TX_STS_ES_) {
755 SMSC_WARN(pdata, hw,
756 "Transmit encountered errors during loopback test");
757 continue;
758 }
759
760 /* Wait till receive is done */
761 i = 60;
762 do {
763 udelay(5);
764 status = smsc911x_rx_get_rxstatus(pdata);
765 } while ((i--) && (!status));
766
767 if (!status) {
768 SMSC_WARN(pdata, hw,
769 "Failed to receive during loopback test");
770 continue;
771 }
772 if (status & RX_STS_ES_) {
773 SMSC_WARN(pdata, hw,
774 "Receive encountered errors during loopback test");
775 continue;
776 }
777
778 pktlength = ((status & 0x3FFF0000UL) >> 16);
779 bufp = (ulong)pdata->loopback_rx_pkt;
780 rdsz = pktlength + 3;
781 rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3);
782 rdsz >>= 2;
783
784 pdata->ops->rx_readfifo(pdata, (unsigned int *)bufp, rdsz);
785
786 if (pktlength != (MIN_PACKET_SIZE + 4)) {
787 SMSC_WARN(pdata, hw, "Unexpected packet size "
788 "during loop back test, size=%d, will retry",
789 pktlength);
790 } else {
791 unsigned int j;
792 int mismatch = 0;
793 for (j = 0; j < MIN_PACKET_SIZE; j++) {
794 if (pdata->loopback_tx_pkt[j]
795 != pdata->loopback_rx_pkt[j]) {
796 mismatch = 1;
797 break;
798 }
799 }
800 if (!mismatch) {
801 SMSC_TRACE(pdata, hw, "Successfully verified "
802 "loopback packet");
803 return 0;
804 } else {
805 SMSC_WARN(pdata, hw, "Data mismatch "
806 "during loop back test, will retry");
807 }
808 }
809 }
810
811 return -EIO;
812}
813
814static int smsc911x_phy_reset(struct smsc911x_data *pdata)
815{
816 unsigned int temp;
817 unsigned int i = 100000;
818
819 temp = smsc911x_reg_read(pdata, PMT_CTRL);
820 smsc911x_reg_write(pdata, PMT_CTRL, temp | PMT_CTRL_PHY_RST_);
821 do {
822 msleep(1);
823 temp = smsc911x_reg_read(pdata, PMT_CTRL);
824 } while ((i--) && (temp & PMT_CTRL_PHY_RST_));
825
826 if (unlikely(temp & PMT_CTRL_PHY_RST_)) {
827 SMSC_WARN(pdata, hw, "PHY reset failed to complete");
828 return -EIO;
829 }
830 /* Extra delay required because the phy may not be completed with
831 * its reset when BMCR_RESET is cleared. Specs say 256 uS is
832 * enough delay but using 1ms here to be safe */
833 msleep(1);
834
835 return 0;
836}
837
838static int smsc911x_phy_loopbacktest(struct net_device *dev)
839{
840 struct smsc911x_data *pdata = netdev_priv(dev);
841 struct phy_device *phy_dev = dev->phydev;
842 int result = -EIO;
843 unsigned int i, val;
844 unsigned long flags;
845
846 /* Initialise tx packet using broadcast destination address */
847 eth_broadcast_addr(pdata->loopback_tx_pkt);
848
849 /* Use incrementing source address */
850 for (i = 6; i < 12; i++)
851 pdata->loopback_tx_pkt[i] = (char)i;
852
853 /* Set length type field */
854 pdata->loopback_tx_pkt[12] = 0x00;
855 pdata->loopback_tx_pkt[13] = 0x00;
856
857 for (i = 14; i < MIN_PACKET_SIZE; i++)
858 pdata->loopback_tx_pkt[i] = (char)i;
859
860 val = smsc911x_reg_read(pdata, HW_CFG);
861 val &= HW_CFG_TX_FIF_SZ_;
862 val |= HW_CFG_SF_;
863 smsc911x_reg_write(pdata, HW_CFG, val);
864
865 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
866 smsc911x_reg_write(pdata, RX_CFG,
867 (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8);
868
869 for (i = 0; i < 10; i++) {
870 /* Set PHY to 10/FD, no ANEG, and loopback mode */
871 smsc911x_mii_write(phy_dev->mdio.bus, phy_dev->mdio.addr,
872 MII_BMCR, BMCR_LOOPBACK | BMCR_FULLDPLX);
873
874 /* Enable MAC tx/rx, FD */
875 spin_lock_irqsave(&pdata->mac_lock, flags);
876 smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_
877 | MAC_CR_TXEN_ | MAC_CR_RXEN_);
878 spin_unlock_irqrestore(&pdata->mac_lock, flags);
879
880 if (smsc911x_phy_check_loopbackpkt(pdata) == 0) {
881 result = 0;
882 break;
883 }
884 pdata->resetcount++;
885
886 /* Disable MAC rx */
887 spin_lock_irqsave(&pdata->mac_lock, flags);
888 smsc911x_mac_write(pdata, MAC_CR, 0);
889 spin_unlock_irqrestore(&pdata->mac_lock, flags);
890
891 smsc911x_phy_reset(pdata);
892 }
893
894 /* Disable MAC */
895 spin_lock_irqsave(&pdata->mac_lock, flags);
896 smsc911x_mac_write(pdata, MAC_CR, 0);
897 spin_unlock_irqrestore(&pdata->mac_lock, flags);
898
899 /* Cancel PHY loopback mode */
900 smsc911x_mii_write(phy_dev->mdio.bus, phy_dev->mdio.addr, MII_BMCR, 0);
901
902 smsc911x_reg_write(pdata, TX_CFG, 0);
903 smsc911x_reg_write(pdata, RX_CFG, 0);
904
905 return result;
906}
907#endif /* USE_PHY_WORK_AROUND */
908
909static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata)
910{
911 struct net_device *ndev = pdata->dev;
912 struct phy_device *phy_dev = ndev->phydev;
913 u32 afc = smsc911x_reg_read(pdata, AFC_CFG);
914 u32 flow;
915 unsigned long flags;
916
917 if (phy_dev->duplex == DUPLEX_FULL) {
918 u16 lcladv = phy_read(phy_dev, MII_ADVERTISE);
919 u16 rmtadv = phy_read(phy_dev, MII_LPA);
920 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
921
922 if (cap & FLOW_CTRL_RX)
923 flow = 0xFFFF0002;
924 else
925 flow = 0;
926
927 if (cap & FLOW_CTRL_TX)
928 afc |= 0xF;
929 else
930 afc &= ~0xF;
931
932 SMSC_TRACE(pdata, hw, "rx pause %s, tx pause %s",
933 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
934 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
935 } else {
936 SMSC_TRACE(pdata, hw, "half duplex");
937 flow = 0;
938 afc |= 0xF;
939 }
940
941 spin_lock_irqsave(&pdata->mac_lock, flags);
942 smsc911x_mac_write(pdata, FLOW, flow);
943 spin_unlock_irqrestore(&pdata->mac_lock, flags);
944
945 smsc911x_reg_write(pdata, AFC_CFG, afc);
946}
947
948/* Update link mode if anything has changed. Called periodically when the
949 * PHY is in polling mode, even if nothing has changed. */
950static void smsc911x_phy_adjust_link(struct net_device *dev)
951{
952 struct smsc911x_data *pdata = netdev_priv(dev);
953 struct phy_device *phy_dev = dev->phydev;
954 unsigned long flags;
955 int carrier;
956
957 if (phy_dev->duplex != pdata->last_duplex) {
958 unsigned int mac_cr;
959 SMSC_TRACE(pdata, hw, "duplex state has changed");
960
961 spin_lock_irqsave(&pdata->mac_lock, flags);
962 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
963 if (phy_dev->duplex) {
964 SMSC_TRACE(pdata, hw,
965 "configuring for full duplex mode");
966 mac_cr |= MAC_CR_FDPX_;
967 } else {
968 SMSC_TRACE(pdata, hw,
969 "configuring for half duplex mode");
970 mac_cr &= ~MAC_CR_FDPX_;
971 }
972 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
973 spin_unlock_irqrestore(&pdata->mac_lock, flags);
974
975 smsc911x_phy_update_flowcontrol(pdata);
976 pdata->last_duplex = phy_dev->duplex;
977 }
978
979 carrier = netif_carrier_ok(dev);
980 if (carrier != pdata->last_carrier) {
981 SMSC_TRACE(pdata, hw, "carrier state has changed");
982 if (carrier) {
983 SMSC_TRACE(pdata, hw, "configuring for carrier OK");
984 if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) &&
985 (!pdata->using_extphy)) {
986 /* Restore original GPIO configuration */
987 pdata->gpio_setting = pdata->gpio_orig_setting;
988 smsc911x_reg_write(pdata, GPIO_CFG,
989 pdata->gpio_setting);
990 }
991 } else {
992 SMSC_TRACE(pdata, hw, "configuring for no carrier");
993 /* Check global setting that LED1
994 * usage is 10/100 indicator */
995 pdata->gpio_setting = smsc911x_reg_read(pdata,
996 GPIO_CFG);
997 if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_) &&
998 (!pdata->using_extphy)) {
999 /* Force 10/100 LED off, after saving
1000 * original GPIO configuration */
1001 pdata->gpio_orig_setting = pdata->gpio_setting;
1002
1003 pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_;
1004 pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_
1005 | GPIO_CFG_GPIODIR0_
1006 | GPIO_CFG_GPIOD0_);
1007 smsc911x_reg_write(pdata, GPIO_CFG,
1008 pdata->gpio_setting);
1009 }
1010 }
1011 pdata->last_carrier = carrier;
1012 }
1013}
1014
1015static int smsc911x_mii_probe(struct net_device *dev)
1016{
1017 struct smsc911x_data *pdata = netdev_priv(dev);
1018 struct phy_device *phydev;
1019 int ret;
1020
1021 /* find the first phy */
1022 phydev = phy_find_first(pdata->mii_bus);
1023 if (!phydev) {
1024 netdev_err(dev, "no PHY found\n");
1025 return -ENODEV;
1026 }
1027
1028 SMSC_TRACE(pdata, probe, "PHY: addr %d, phy_id 0x%08X",
1029 phydev->mdio.addr, phydev->phy_id);
1030
1031 ret = phy_connect_direct(dev, phydev, &smsc911x_phy_adjust_link,
1032 pdata->config.phy_interface);
1033
1034 if (ret) {
1035 netdev_err(dev, "Could not attach to PHY\n");
1036 return ret;
1037 }
1038
1039 phy_attached_info(phydev);
1040
1041 phy_set_max_speed(phydev, SPEED_100);
1042
1043 /* mask with MAC supported features */
1044 phy_support_asym_pause(phydev);
1045
1046 pdata->last_duplex = -1;
1047 pdata->last_carrier = -1;
1048
1049#ifdef USE_PHY_WORK_AROUND
1050 if (smsc911x_phy_loopbacktest(dev) < 0) {
1051 SMSC_WARN(pdata, hw, "Failed Loop Back Test");
1052 phy_disconnect(phydev);
1053 return -ENODEV;
1054 }
1055 SMSC_TRACE(pdata, hw, "Passed Loop Back Test");
1056#endif /* USE_PHY_WORK_AROUND */
1057
1058 SMSC_TRACE(pdata, hw, "phy initialised successfully");
1059 return 0;
1060}
1061
1062static int smsc911x_mii_init(struct platform_device *pdev,
1063 struct net_device *dev)
1064{
1065 struct smsc911x_data *pdata = netdev_priv(dev);
1066 struct phy_device *phydev;
1067 int err = -ENXIO;
1068
1069 pdata->mii_bus = mdiobus_alloc();
1070 if (!pdata->mii_bus) {
1071 err = -ENOMEM;
1072 goto err_out_1;
1073 }
1074
1075 pdata->mii_bus->name = SMSC_MDIONAME;
1076 snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
1077 pdev->name, pdev->id);
1078 pdata->mii_bus->priv = pdata;
1079 pdata->mii_bus->read = smsc911x_mii_read;
1080 pdata->mii_bus->write = smsc911x_mii_write;
1081
1082 pdata->mii_bus->parent = &pdev->dev;
1083
1084 switch (pdata->idrev & 0xFFFF0000) {
1085 case 0x01170000:
1086 case 0x01150000:
1087 case 0x117A0000:
1088 case 0x115A0000:
1089 /* External PHY supported, try to autodetect */
1090 smsc911x_phy_initialise_external(pdata);
1091 break;
1092 default:
1093 SMSC_TRACE(pdata, hw, "External PHY is not supported, "
1094 "using internal PHY");
1095 pdata->using_extphy = 0;
1096 break;
1097 }
1098
1099 if (!pdata->using_extphy) {
1100 /* Mask all PHYs except ID 1 (internal) */
1101 pdata->mii_bus->phy_mask = ~(1 << 1);
1102 }
1103
1104 if (mdiobus_register(pdata->mii_bus)) {
1105 SMSC_WARN(pdata, probe, "Error registering mii bus");
1106 goto err_out_free_bus_2;
1107 }
1108
1109 phydev = phy_find_first(pdata->mii_bus);
1110 if (phydev)
1111 phydev->mac_managed_pm = true;
1112
1113 return 0;
1114
1115err_out_free_bus_2:
1116 mdiobus_free(pdata->mii_bus);
1117err_out_1:
1118 return err;
1119}
1120
1121/* Gets the number of tx statuses in the fifo */
1122static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata)
1123{
1124 return (smsc911x_reg_read(pdata, TX_FIFO_INF)
1125 & TX_FIFO_INF_TSUSED_) >> 16;
1126}
1127
1128/* Reads tx statuses and increments counters where necessary */
1129static void smsc911x_tx_update_txcounters(struct net_device *dev)
1130{
1131 struct smsc911x_data *pdata = netdev_priv(dev);
1132 unsigned int tx_stat;
1133
1134 while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) {
1135 if (unlikely(tx_stat & 0x80000000)) {
1136 /* In this driver the packet tag is used as the packet
1137 * length. Since a packet length can never reach the
1138 * size of 0x8000, this bit is reserved. It is worth
1139 * noting that the "reserved bit" in the warning above
1140 * does not reference a hardware defined reserved bit
1141 * but rather a driver defined one.
1142 */
1143 SMSC_WARN(pdata, hw, "Packet tag reserved bit is high");
1144 } else {
1145 if (unlikely(tx_stat & TX_STS_ES_)) {
1146 dev->stats.tx_errors++;
1147 } else {
1148 dev->stats.tx_packets++;
1149 dev->stats.tx_bytes += (tx_stat >> 16);
1150 }
1151 if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) {
1152 dev->stats.collisions += 16;
1153 dev->stats.tx_aborted_errors += 1;
1154 } else {
1155 dev->stats.collisions +=
1156 ((tx_stat >> 3) & 0xF);
1157 }
1158 if (unlikely(tx_stat & TX_STS_LOST_CARRIER_))
1159 dev->stats.tx_carrier_errors += 1;
1160 if (unlikely(tx_stat & TX_STS_LATE_COL_)) {
1161 dev->stats.collisions++;
1162 dev->stats.tx_aborted_errors++;
1163 }
1164 }
1165 }
1166}
1167
1168/* Increments the Rx error counters */
1169static void
1170smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat)
1171{
1172 int crc_err = 0;
1173
1174 if (unlikely(rxstat & RX_STS_ES_)) {
1175 dev->stats.rx_errors++;
1176 if (unlikely(rxstat & RX_STS_CRC_ERR_)) {
1177 dev->stats.rx_crc_errors++;
1178 crc_err = 1;
1179 }
1180 }
1181 if (likely(!crc_err)) {
1182 if (unlikely((rxstat & RX_STS_FRAME_TYPE_) &&
1183 (rxstat & RX_STS_LENGTH_ERR_)))
1184 dev->stats.rx_length_errors++;
1185 if (rxstat & RX_STS_MCAST_)
1186 dev->stats.multicast++;
1187 }
1188}
1189
1190/* Quickly dumps bad packets */
1191static void
1192smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktwords)
1193{
1194 if (likely(pktwords >= 4)) {
1195 unsigned int timeout = 500;
1196 unsigned int val;
1197 smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_);
1198 do {
1199 udelay(1);
1200 val = smsc911x_reg_read(pdata, RX_DP_CTRL);
1201 } while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout);
1202
1203 if (unlikely(timeout == 0))
1204 SMSC_WARN(pdata, hw, "Timed out waiting for "
1205 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val);
1206 } else {
1207 while (pktwords--)
1208 smsc911x_reg_read(pdata, RX_DATA_FIFO);
1209 }
1210}
1211
1212/* NAPI poll function */
1213static int smsc911x_poll(struct napi_struct *napi, int budget)
1214{
1215 struct smsc911x_data *pdata =
1216 container_of(napi, struct smsc911x_data, napi);
1217 struct net_device *dev = pdata->dev;
1218 int npackets = 0;
1219
1220 while (npackets < budget) {
1221 unsigned int pktlength;
1222 unsigned int pktwords;
1223 struct sk_buff *skb;
1224 unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata);
1225
1226 if (!rxstat) {
1227 unsigned int temp;
1228 /* We processed all packets available. Tell NAPI it can
1229 * stop polling then re-enable rx interrupts */
1230 smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_);
1231 napi_complete(napi);
1232 temp = smsc911x_reg_read(pdata, INT_EN);
1233 temp |= INT_EN_RSFL_EN_;
1234 smsc911x_reg_write(pdata, INT_EN, temp);
1235 break;
1236 }
1237
1238 /* Count packet for NAPI scheduling, even if it has an error.
1239 * Error packets still require cycles to discard */
1240 npackets++;
1241
1242 pktlength = ((rxstat & 0x3FFF0000) >> 16);
1243 pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2;
1244 smsc911x_rx_counterrors(dev, rxstat);
1245
1246 if (unlikely(rxstat & RX_STS_ES_)) {
1247 SMSC_WARN(pdata, rx_err,
1248 "Discarding packet with error bit set");
1249 /* Packet has an error, discard it and continue with
1250 * the next */
1251 smsc911x_rx_fastforward(pdata, pktwords);
1252 dev->stats.rx_dropped++;
1253 continue;
1254 }
1255
1256 skb = netdev_alloc_skb(dev, pktwords << 2);
1257 if (unlikely(!skb)) {
1258 SMSC_WARN(pdata, rx_err,
1259 "Unable to allocate skb for rx packet");
1260 /* Drop the packet and stop this polling iteration */
1261 smsc911x_rx_fastforward(pdata, pktwords);
1262 dev->stats.rx_dropped++;
1263 break;
1264 }
1265
1266 pdata->ops->rx_readfifo(pdata,
1267 (unsigned int *)skb->data, pktwords);
1268
1269 /* Align IP on 16B boundary */
1270 skb_reserve(skb, NET_IP_ALIGN);
1271 skb_put(skb, pktlength - 4);
1272 skb->protocol = eth_type_trans(skb, dev);
1273 skb_checksum_none_assert(skb);
1274 netif_receive_skb(skb);
1275
1276 /* Update counters */
1277 dev->stats.rx_packets++;
1278 dev->stats.rx_bytes += (pktlength - 4);
1279 }
1280
1281 /* Return total received packets */
1282 return npackets;
1283}
1284
1285/* Returns hash bit number for given MAC address
1286 * Example:
1287 * 01 00 5E 00 00 01 -> returns bit number 31 */
1288static unsigned int smsc911x_hash(char addr[ETH_ALEN])
1289{
1290 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
1291}
1292
1293static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata)
1294{
1295 /* Performs the multicast & mac_cr update. This is called when
1296 * safe on the current hardware, and with the mac_lock held */
1297 unsigned int mac_cr;
1298
1299 SMSC_ASSERT_MAC_LOCK(pdata);
1300
1301 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1302 mac_cr |= pdata->set_bits_mask;
1303 mac_cr &= ~(pdata->clear_bits_mask);
1304 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1305 smsc911x_mac_write(pdata, HASHH, pdata->hashhi);
1306 smsc911x_mac_write(pdata, HASHL, pdata->hashlo);
1307 SMSC_TRACE(pdata, hw, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1308 mac_cr, pdata->hashhi, pdata->hashlo);
1309}
1310
1311static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata)
1312{
1313 unsigned int mac_cr;
1314
1315 /* This function is only called for older LAN911x devices
1316 * (revA or revB), where MAC_CR, HASHH and HASHL should not
1317 * be modified during Rx - newer devices immediately update the
1318 * registers.
1319 *
1320 * This is called from interrupt context */
1321
1322 spin_lock(&pdata->mac_lock);
1323
1324 /* Check Rx has stopped */
1325 if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_)
1326 SMSC_WARN(pdata, drv, "Rx not stopped");
1327
1328 /* Perform the update - safe to do now Rx has stopped */
1329 smsc911x_rx_multicast_update(pdata);
1330
1331 /* Re-enable Rx */
1332 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1333 mac_cr |= MAC_CR_RXEN_;
1334 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1335
1336 pdata->multicast_update_pending = 0;
1337
1338 spin_unlock(&pdata->mac_lock);
1339}
1340
1341static int smsc911x_phy_general_power_up(struct smsc911x_data *pdata)
1342{
1343 struct net_device *ndev = pdata->dev;
1344 struct phy_device *phy_dev = ndev->phydev;
1345 int rc = 0;
1346
1347 if (!phy_dev)
1348 return rc;
1349
1350 /* If the internal PHY is in General Power-Down mode, all, except the
1351 * management interface, is powered-down and stays in that condition as
1352 * long as Phy register bit 0.11 is HIGH.
1353 *
1354 * In that case, clear the bit 0.11, so the PHY powers up and we can
1355 * access to the phy registers.
1356 */
1357 rc = phy_read(phy_dev, MII_BMCR);
1358 if (rc < 0) {
1359 SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1360 return rc;
1361 }
1362
1363 /* If the PHY general power-down bit is not set is not necessary to
1364 * disable the general power down-mode.
1365 */
1366 if (rc & BMCR_PDOWN) {
1367 rc = phy_write(phy_dev, MII_BMCR, rc & ~BMCR_PDOWN);
1368 if (rc < 0) {
1369 SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1370 return rc;
1371 }
1372
1373 usleep_range(1000, 1500);
1374 }
1375
1376 return 0;
1377}
1378
1379static int smsc911x_phy_disable_energy_detect(struct smsc911x_data *pdata)
1380{
1381 struct net_device *ndev = pdata->dev;
1382 struct phy_device *phy_dev = ndev->phydev;
1383 int rc = 0;
1384
1385 if (!phy_dev)
1386 return rc;
1387
1388 rc = phy_read(phy_dev, MII_LAN83C185_CTRL_STATUS);
1389
1390 if (rc < 0) {
1391 SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1392 return rc;
1393 }
1394
1395 /* Only disable if energy detect mode is already enabled */
1396 if (rc & MII_LAN83C185_EDPWRDOWN) {
1397 /* Disable energy detect mode for this SMSC Transceivers */
1398 rc = phy_write(phy_dev, MII_LAN83C185_CTRL_STATUS,
1399 rc & (~MII_LAN83C185_EDPWRDOWN));
1400
1401 if (rc < 0) {
1402 SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1403 return rc;
1404 }
1405 /* Allow PHY to wakeup */
1406 mdelay(2);
1407 }
1408
1409 return 0;
1410}
1411
1412static int smsc911x_phy_enable_energy_detect(struct smsc911x_data *pdata)
1413{
1414 struct net_device *ndev = pdata->dev;
1415 struct phy_device *phy_dev = ndev->phydev;
1416 int rc = 0;
1417
1418 if (!phy_dev)
1419 return rc;
1420
1421 rc = phy_read(phy_dev, MII_LAN83C185_CTRL_STATUS);
1422
1423 if (rc < 0) {
1424 SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1425 return rc;
1426 }
1427
1428 /* Only enable if energy detect mode is already disabled */
1429 if (!(rc & MII_LAN83C185_EDPWRDOWN)) {
1430 /* Enable energy detect mode for this SMSC Transceivers */
1431 rc = phy_write(phy_dev, MII_LAN83C185_CTRL_STATUS,
1432 rc | MII_LAN83C185_EDPWRDOWN);
1433
1434 if (rc < 0) {
1435 SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1436 return rc;
1437 }
1438 }
1439 return 0;
1440}
1441
1442static int smsc911x_soft_reset(struct smsc911x_data *pdata)
1443{
1444 unsigned int timeout;
1445 unsigned int temp;
1446 int ret;
1447 unsigned int reset_offset = HW_CFG;
1448 unsigned int reset_mask = HW_CFG_SRST_;
1449
1450 /*
1451 * Make sure to power-up the PHY chip before doing a reset, otherwise
1452 * the reset fails.
1453 */
1454 ret = smsc911x_phy_general_power_up(pdata);
1455 if (ret) {
1456 SMSC_WARN(pdata, drv, "Failed to power-up the PHY chip");
1457 return ret;
1458 }
1459
1460 /*
1461 * LAN9210/LAN9211/LAN9220/LAN9221 chips have an internal PHY that
1462 * are initialized in a Energy Detect Power-Down mode that prevents
1463 * the MAC chip to be software reseted. So we have to wakeup the PHY
1464 * before.
1465 */
1466 if (pdata->generation == 4) {
1467 ret = smsc911x_phy_disable_energy_detect(pdata);
1468
1469 if (ret) {
1470 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
1471 return ret;
1472 }
1473 }
1474
1475 if ((pdata->idrev & 0xFFFF0000) == LAN9250) {
1476 /* special reset for LAN9250 */
1477 reset_offset = RESET_CTL;
1478 reset_mask = RESET_CTL_DIGITAL_RST_;
1479 }
1480
1481 /* Reset the LAN911x */
1482 smsc911x_reg_write(pdata, reset_offset, reset_mask);
1483
1484 /* verify reset bit is cleared */
1485 timeout = 10;
1486 do {
1487 udelay(10);
1488 temp = smsc911x_reg_read(pdata, reset_offset);
1489 } while ((--timeout) && (temp & reset_mask));
1490
1491 if (unlikely(temp & reset_mask)) {
1492 SMSC_WARN(pdata, drv, "Failed to complete reset");
1493 return -EIO;
1494 }
1495
1496 if (pdata->generation == 4) {
1497 ret = smsc911x_phy_enable_energy_detect(pdata);
1498
1499 if (ret) {
1500 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
1501 return ret;
1502 }
1503 }
1504
1505 return 0;
1506}
1507
1508/* Sets the device MAC address to dev_addr, called with mac_lock held */
1509static void
1510smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, const u8 dev_addr[6])
1511{
1512 u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4];
1513 u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
1514 (dev_addr[1] << 8) | dev_addr[0];
1515
1516 SMSC_ASSERT_MAC_LOCK(pdata);
1517
1518 smsc911x_mac_write(pdata, ADDRH, mac_high16);
1519 smsc911x_mac_write(pdata, ADDRL, mac_low32);
1520}
1521
1522static void smsc911x_disable_irq_chip(struct net_device *dev)
1523{
1524 struct smsc911x_data *pdata = netdev_priv(dev);
1525
1526 smsc911x_reg_write(pdata, INT_EN, 0);
1527 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
1528}
1529
1530static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id)
1531{
1532 struct net_device *dev = dev_id;
1533 struct smsc911x_data *pdata = netdev_priv(dev);
1534 u32 intsts = smsc911x_reg_read(pdata, INT_STS);
1535 u32 inten = smsc911x_reg_read(pdata, INT_EN);
1536 int serviced = IRQ_NONE;
1537 u32 temp;
1538
1539 if (unlikely(intsts & inten & INT_STS_SW_INT_)) {
1540 temp = smsc911x_reg_read(pdata, INT_EN);
1541 temp &= (~INT_EN_SW_INT_EN_);
1542 smsc911x_reg_write(pdata, INT_EN, temp);
1543 smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_);
1544 pdata->software_irq_signal = 1;
1545 smp_wmb();
1546 serviced = IRQ_HANDLED;
1547 }
1548
1549 if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) {
1550 /* Called when there is a multicast update scheduled and
1551 * it is now safe to complete the update */
1552 SMSC_TRACE(pdata, intr, "RX Stop interrupt");
1553 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_);
1554 if (pdata->multicast_update_pending)
1555 smsc911x_rx_multicast_update_workaround(pdata);
1556 serviced = IRQ_HANDLED;
1557 }
1558
1559 if (intsts & inten & INT_STS_TDFA_) {
1560 temp = smsc911x_reg_read(pdata, FIFO_INT);
1561 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1562 smsc911x_reg_write(pdata, FIFO_INT, temp);
1563 smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_);
1564 netif_wake_queue(dev);
1565 serviced = IRQ_HANDLED;
1566 }
1567
1568 if (unlikely(intsts & inten & INT_STS_RXE_)) {
1569 SMSC_TRACE(pdata, intr, "RX Error interrupt");
1570 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_);
1571 serviced = IRQ_HANDLED;
1572 }
1573
1574 if (likely(intsts & inten & INT_STS_RSFL_)) {
1575 if (likely(napi_schedule_prep(&pdata->napi))) {
1576 /* Disable Rx interrupts */
1577 temp = smsc911x_reg_read(pdata, INT_EN);
1578 temp &= (~INT_EN_RSFL_EN_);
1579 smsc911x_reg_write(pdata, INT_EN, temp);
1580 /* Schedule a NAPI poll */
1581 __napi_schedule(&pdata->napi);
1582 } else {
1583 SMSC_WARN(pdata, rx_err, "napi_schedule_prep failed");
1584 }
1585 serviced = IRQ_HANDLED;
1586 }
1587
1588 return serviced;
1589}
1590
1591static int smsc911x_open(struct net_device *dev)
1592{
1593 struct smsc911x_data *pdata = netdev_priv(dev);
1594 unsigned int timeout;
1595 unsigned int temp;
1596 unsigned int intcfg;
1597 int retval;
1598 int irq_flags;
1599
1600 pm_runtime_get_sync(dev->dev.parent);
1601
1602 /* find and start the given phy */
1603 if (!dev->phydev) {
1604 retval = smsc911x_mii_probe(dev);
1605 if (retval < 0) {
1606 SMSC_WARN(pdata, probe, "Error starting phy");
1607 goto out;
1608 }
1609 }
1610
1611 /* Reset the LAN911x */
1612 retval = smsc911x_soft_reset(pdata);
1613 if (retval) {
1614 SMSC_WARN(pdata, hw, "soft reset failed");
1615 goto mii_free_out;
1616 }
1617
1618 smsc911x_reg_write(pdata, HW_CFG, 0x00050000);
1619 smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740);
1620
1621 /* Increase the legal frame size of VLAN tagged frames to 1522 bytes */
1622 spin_lock_irq(&pdata->mac_lock);
1623 smsc911x_mac_write(pdata, VLAN1, ETH_P_8021Q);
1624 spin_unlock_irq(&pdata->mac_lock);
1625
1626 /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1627 timeout = 50;
1628 while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) &&
1629 --timeout) {
1630 udelay(10);
1631 }
1632
1633 if (unlikely(timeout == 0))
1634 SMSC_WARN(pdata, ifup,
1635 "Timed out waiting for EEPROM busy bit to clear");
1636
1637 smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
1638
1639 /* The soft reset above cleared the device's MAC address,
1640 * restore it from local copy (set in probe) */
1641 spin_lock_irq(&pdata->mac_lock);
1642 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1643 spin_unlock_irq(&pdata->mac_lock);
1644
1645 /* Initialise irqs, but leave all sources disabled */
1646 smsc911x_disable_irq_chip(dev);
1647
1648 /* Set interrupt deassertion to 100uS */
1649 intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
1650
1651 if (pdata->config.irq_polarity) {
1652 SMSC_TRACE(pdata, ifup, "irq polarity: active high");
1653 intcfg |= INT_CFG_IRQ_POL_;
1654 } else {
1655 SMSC_TRACE(pdata, ifup, "irq polarity: active low");
1656 }
1657
1658 if (pdata->config.irq_type) {
1659 SMSC_TRACE(pdata, ifup, "irq type: push-pull");
1660 intcfg |= INT_CFG_IRQ_TYPE_;
1661 } else {
1662 SMSC_TRACE(pdata, ifup, "irq type: open drain");
1663 }
1664
1665 smsc911x_reg_write(pdata, INT_CFG, intcfg);
1666
1667 SMSC_TRACE(pdata, ifup, "Testing irq handler using IRQ %d", dev->irq);
1668 pdata->software_irq_signal = 0;
1669 smp_wmb();
1670
1671 irq_flags = irq_get_trigger_type(dev->irq);
1672 retval = request_irq(dev->irq, smsc911x_irqhandler,
1673 irq_flags | IRQF_SHARED, dev->name, dev);
1674 if (retval) {
1675 SMSC_WARN(pdata, probe,
1676 "Unable to claim requested irq: %d", dev->irq);
1677 goto mii_free_out;
1678 }
1679
1680 temp = smsc911x_reg_read(pdata, INT_EN);
1681 temp |= INT_EN_SW_INT_EN_;
1682 smsc911x_reg_write(pdata, INT_EN, temp);
1683
1684 timeout = 1000;
1685 while (timeout--) {
1686 if (pdata->software_irq_signal)
1687 break;
1688 msleep(1);
1689 }
1690
1691 if (!pdata->software_irq_signal) {
1692 netdev_warn(dev, "ISR failed signaling test (IRQ %d)\n",
1693 dev->irq);
1694 retval = -ENODEV;
1695 goto irq_stop_out;
1696 }
1697 SMSC_TRACE(pdata, ifup, "IRQ handler passed test using IRQ %d",
1698 dev->irq);
1699
1700 netdev_info(dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1701 (unsigned long)pdata->ioaddr, dev->irq);
1702
1703 /* Reset the last known duplex and carrier */
1704 pdata->last_duplex = -1;
1705 pdata->last_carrier = -1;
1706
1707 /* Bring the PHY up */
1708 phy_start(dev->phydev);
1709
1710 temp = smsc911x_reg_read(pdata, HW_CFG);
1711 /* Preserve TX FIFO size and external PHY configuration */
1712 temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF);
1713 temp |= HW_CFG_SF_;
1714 smsc911x_reg_write(pdata, HW_CFG, temp);
1715
1716 temp = smsc911x_reg_read(pdata, FIFO_INT);
1717 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1718 temp &= ~(FIFO_INT_RX_STS_LEVEL_);
1719 smsc911x_reg_write(pdata, FIFO_INT, temp);
1720
1721 /* set RX Data offset to 2 bytes for alignment */
1722 smsc911x_reg_write(pdata, RX_CFG, (NET_IP_ALIGN << 8));
1723
1724 /* enable NAPI polling before enabling RX interrupts */
1725 napi_enable(&pdata->napi);
1726
1727 temp = smsc911x_reg_read(pdata, INT_EN);
1728 temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_);
1729 smsc911x_reg_write(pdata, INT_EN, temp);
1730
1731 spin_lock_irq(&pdata->mac_lock);
1732 temp = smsc911x_mac_read(pdata, MAC_CR);
1733 temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
1734 smsc911x_mac_write(pdata, MAC_CR, temp);
1735 spin_unlock_irq(&pdata->mac_lock);
1736
1737 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
1738
1739 netif_start_queue(dev);
1740 return 0;
1741
1742irq_stop_out:
1743 free_irq(dev->irq, dev);
1744mii_free_out:
1745 phy_disconnect(dev->phydev);
1746out:
1747 pm_runtime_put(dev->dev.parent);
1748 return retval;
1749}
1750
1751/* Entry point for stopping the interface */
1752static int smsc911x_stop(struct net_device *dev)
1753{
1754 struct smsc911x_data *pdata = netdev_priv(dev);
1755 unsigned int temp;
1756
1757 /* Disable all device interrupts */
1758 temp = smsc911x_reg_read(pdata, INT_CFG);
1759 temp &= ~INT_CFG_IRQ_EN_;
1760 smsc911x_reg_write(pdata, INT_CFG, temp);
1761
1762 /* Stop Tx and Rx polling */
1763 netif_stop_queue(dev);
1764 napi_disable(&pdata->napi);
1765
1766 /* At this point all Rx and Tx activity is stopped */
1767 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1768 smsc911x_tx_update_txcounters(dev);
1769
1770 free_irq(dev->irq, dev);
1771
1772 /* Bring the PHY down */
1773 if (dev->phydev) {
1774 phy_stop(dev->phydev);
1775 phy_disconnect(dev->phydev);
1776 }
1777 netif_carrier_off(dev);
1778 pm_runtime_put(dev->dev.parent);
1779
1780 SMSC_TRACE(pdata, ifdown, "Interface stopped");
1781 return 0;
1782}
1783
1784/* Entry point for transmitting a packet */
1785static netdev_tx_t
1786smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1787{
1788 struct smsc911x_data *pdata = netdev_priv(dev);
1789 unsigned int freespace;
1790 unsigned int tx_cmd_a;
1791 unsigned int tx_cmd_b;
1792 unsigned int temp;
1793 u32 wrsz;
1794 ulong bufp;
1795
1796 freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_;
1797
1798 if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD))
1799 SMSC_WARN(pdata, tx_err,
1800 "Tx data fifo low, space available: %d", freespace);
1801
1802 /* Word alignment adjustment */
1803 tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16;
1804 tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
1805 tx_cmd_a |= (unsigned int)skb->len;
1806
1807 tx_cmd_b = ((unsigned int)skb->len) << 16;
1808 tx_cmd_b |= (unsigned int)skb->len;
1809
1810 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a);
1811 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b);
1812
1813 bufp = (ulong)skb->data & (~0x3);
1814 wrsz = (u32)skb->len + 3;
1815 wrsz += (u32)((ulong)skb->data & 0x3);
1816 wrsz >>= 2;
1817
1818 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
1819 freespace -= (skb->len + 32);
1820 skb_tx_timestamp(skb);
1821 dev_consume_skb_any(skb);
1822
1823 if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30))
1824 smsc911x_tx_update_txcounters(dev);
1825
1826 if (freespace < TX_FIFO_LOW_THRESHOLD) {
1827 netif_stop_queue(dev);
1828 temp = smsc911x_reg_read(pdata, FIFO_INT);
1829 temp &= 0x00FFFFFF;
1830 temp |= 0x32000000;
1831 smsc911x_reg_write(pdata, FIFO_INT, temp);
1832 }
1833
1834 return NETDEV_TX_OK;
1835}
1836
1837/* Entry point for getting status counters */
1838static struct net_device_stats *smsc911x_get_stats(struct net_device *dev)
1839{
1840 struct smsc911x_data *pdata = netdev_priv(dev);
1841 smsc911x_tx_update_txcounters(dev);
1842 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1843 return &dev->stats;
1844}
1845
1846/* Entry point for setting addressing modes */
1847static void smsc911x_set_multicast_list(struct net_device *dev)
1848{
1849 struct smsc911x_data *pdata = netdev_priv(dev);
1850 unsigned long flags;
1851
1852 if (dev->flags & IFF_PROMISC) {
1853 /* Enabling promiscuous mode */
1854 pdata->set_bits_mask = MAC_CR_PRMS_;
1855 pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1856 pdata->hashhi = 0;
1857 pdata->hashlo = 0;
1858 } else if (dev->flags & IFF_ALLMULTI) {
1859 /* Enabling all multicast mode */
1860 pdata->set_bits_mask = MAC_CR_MCPAS_;
1861 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_);
1862 pdata->hashhi = 0;
1863 pdata->hashlo = 0;
1864 } else if (!netdev_mc_empty(dev)) {
1865 /* Enabling specific multicast addresses */
1866 unsigned int hash_high = 0;
1867 unsigned int hash_low = 0;
1868 struct netdev_hw_addr *ha;
1869
1870 pdata->set_bits_mask = MAC_CR_HPFILT_;
1871 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1872
1873 netdev_for_each_mc_addr(ha, dev) {
1874 unsigned int bitnum = smsc911x_hash(ha->addr);
1875 unsigned int mask = 0x01 << (bitnum & 0x1F);
1876
1877 if (bitnum & 0x20)
1878 hash_high |= mask;
1879 else
1880 hash_low |= mask;
1881 }
1882
1883 pdata->hashhi = hash_high;
1884 pdata->hashlo = hash_low;
1885 } else {
1886 /* Enabling local MAC address only */
1887 pdata->set_bits_mask = 0;
1888 pdata->clear_bits_mask =
1889 (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1890 pdata->hashhi = 0;
1891 pdata->hashlo = 0;
1892 }
1893
1894 spin_lock_irqsave(&pdata->mac_lock, flags);
1895
1896 if (pdata->generation <= 1) {
1897 /* Older hardware revision - cannot change these flags while
1898 * receiving data */
1899 if (!pdata->multicast_update_pending) {
1900 unsigned int temp;
1901 SMSC_TRACE(pdata, hw, "scheduling mcast update");
1902 pdata->multicast_update_pending = 1;
1903
1904 /* Request the hardware to stop, then perform the
1905 * update when we get an RX_STOP interrupt */
1906 temp = smsc911x_mac_read(pdata, MAC_CR);
1907 temp &= ~(MAC_CR_RXEN_);
1908 smsc911x_mac_write(pdata, MAC_CR, temp);
1909 } else {
1910 /* There is another update pending, this should now
1911 * use the newer values */
1912 }
1913 } else {
1914 /* Newer hardware revision - can write immediately */
1915 smsc911x_rx_multicast_update(pdata);
1916 }
1917
1918 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1919}
1920
1921#ifdef CONFIG_NET_POLL_CONTROLLER
1922static void smsc911x_poll_controller(struct net_device *dev)
1923{
1924 disable_irq(dev->irq);
1925 smsc911x_irqhandler(0, dev);
1926 enable_irq(dev->irq);
1927}
1928#endif /* CONFIG_NET_POLL_CONTROLLER */
1929
1930static int smsc911x_set_mac_address(struct net_device *dev, void *p)
1931{
1932 struct smsc911x_data *pdata = netdev_priv(dev);
1933 struct sockaddr *addr = p;
1934
1935 /* On older hardware revisions we cannot change the mac address
1936 * registers while receiving data. Newer devices can safely change
1937 * this at any time. */
1938 if (pdata->generation <= 1 && netif_running(dev))
1939 return -EBUSY;
1940
1941 if (!is_valid_ether_addr(addr->sa_data))
1942 return -EADDRNOTAVAIL;
1943
1944 eth_hw_addr_set(dev, addr->sa_data);
1945
1946 spin_lock_irq(&pdata->mac_lock);
1947 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1948 spin_unlock_irq(&pdata->mac_lock);
1949
1950 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
1951
1952 return 0;
1953}
1954
1955static void smsc911x_ethtool_getdrvinfo(struct net_device *dev,
1956 struct ethtool_drvinfo *info)
1957{
1958 strscpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver));
1959 strscpy(info->version, SMSC_DRV_VERSION, sizeof(info->version));
1960 strscpy(info->bus_info, dev_name(dev->dev.parent),
1961 sizeof(info->bus_info));
1962}
1963
1964static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev)
1965{
1966 struct smsc911x_data *pdata = netdev_priv(dev);
1967 return pdata->msg_enable;
1968}
1969
1970static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1971{
1972 struct smsc911x_data *pdata = netdev_priv(dev);
1973 pdata->msg_enable = level;
1974}
1975
1976static int smsc911x_ethtool_getregslen(struct net_device *dev)
1977{
1978 return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) *
1979 sizeof(u32);
1980}
1981
1982static void
1983smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs,
1984 void *buf)
1985{
1986 struct smsc911x_data *pdata = netdev_priv(dev);
1987 struct phy_device *phy_dev = dev->phydev;
1988 unsigned long flags;
1989 unsigned int i;
1990 unsigned int j = 0;
1991 u32 *data = buf;
1992
1993 regs->version = pdata->idrev;
1994 for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32)))
1995 data[j++] = smsc911x_reg_read(pdata, i);
1996
1997 for (i = MAC_CR; i <= WUCSR; i++) {
1998 spin_lock_irqsave(&pdata->mac_lock, flags);
1999 data[j++] = smsc911x_mac_read(pdata, i);
2000 spin_unlock_irqrestore(&pdata->mac_lock, flags);
2001 }
2002
2003 for (i = 0; i <= 31; i++)
2004 data[j++] = smsc911x_mii_read(phy_dev->mdio.bus,
2005 phy_dev->mdio.addr, i);
2006}
2007
2008static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata)
2009{
2010 unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG);
2011 temp &= ~GPIO_CFG_EEPR_EN_;
2012 smsc911x_reg_write(pdata, GPIO_CFG, temp);
2013 msleep(1);
2014}
2015
2016static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op)
2017{
2018 int timeout = 100;
2019 u32 e2cmd;
2020
2021 SMSC_TRACE(pdata, drv, "op 0x%08x", op);
2022 if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
2023 SMSC_WARN(pdata, drv, "Busy at start");
2024 return -EBUSY;
2025 }
2026
2027 e2cmd = op | E2P_CMD_EPC_BUSY_;
2028 smsc911x_reg_write(pdata, E2P_CMD, e2cmd);
2029
2030 do {
2031 msleep(1);
2032 e2cmd = smsc911x_reg_read(pdata, E2P_CMD);
2033 } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout));
2034
2035 if (!timeout) {
2036 SMSC_TRACE(pdata, drv, "TIMED OUT");
2037 return -EAGAIN;
2038 }
2039
2040 if (e2cmd & E2P_CMD_EPC_TIMEOUT_) {
2041 SMSC_TRACE(pdata, drv, "Error occurred during eeprom operation");
2042 return -EINVAL;
2043 }
2044
2045 return 0;
2046}
2047
2048static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata,
2049 u8 address, u8 *data)
2050{
2051 u32 op = E2P_CMD_EPC_CMD_READ_ | address;
2052 int ret;
2053
2054 SMSC_TRACE(pdata, drv, "address 0x%x", address);
2055 ret = smsc911x_eeprom_send_cmd(pdata, op);
2056
2057 if (!ret)
2058 data[address] = smsc911x_reg_read(pdata, E2P_DATA);
2059
2060 return ret;
2061}
2062
2063static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata,
2064 u8 address, u8 data)
2065{
2066 u32 op = E2P_CMD_EPC_CMD_ERASE_ | address;
2067 int ret;
2068
2069 SMSC_TRACE(pdata, drv, "address 0x%x, data 0x%x", address, data);
2070 ret = smsc911x_eeprom_send_cmd(pdata, op);
2071
2072 if (!ret) {
2073 op = E2P_CMD_EPC_CMD_WRITE_ | address;
2074 smsc911x_reg_write(pdata, E2P_DATA, (u32)data);
2075
2076 /* Workaround for hardware read-after-write restriction */
2077 smsc911x_reg_read(pdata, BYTE_TEST);
2078
2079 ret = smsc911x_eeprom_send_cmd(pdata, op);
2080 }
2081
2082 return ret;
2083}
2084
2085static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev)
2086{
2087 return SMSC911X_EEPROM_SIZE;
2088}
2089
2090static int smsc911x_ethtool_get_eeprom(struct net_device *dev,
2091 struct ethtool_eeprom *eeprom, u8 *data)
2092{
2093 struct smsc911x_data *pdata = netdev_priv(dev);
2094 u8 eeprom_data[SMSC911X_EEPROM_SIZE];
2095 int len;
2096 int i;
2097
2098 smsc911x_eeprom_enable_access(pdata);
2099
2100 len = min(eeprom->len, SMSC911X_EEPROM_SIZE);
2101 for (i = 0; i < len; i++) {
2102 int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data);
2103 if (ret < 0) {
2104 eeprom->len = 0;
2105 return ret;
2106 }
2107 }
2108
2109 memcpy(data, &eeprom_data[eeprom->offset], len);
2110 eeprom->len = len;
2111 return 0;
2112}
2113
2114static int smsc911x_ethtool_set_eeprom(struct net_device *dev,
2115 struct ethtool_eeprom *eeprom, u8 *data)
2116{
2117 int ret;
2118 struct smsc911x_data *pdata = netdev_priv(dev);
2119
2120 smsc911x_eeprom_enable_access(pdata);
2121 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_);
2122 ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data);
2123 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_);
2124
2125 /* Single byte write, according to man page */
2126 eeprom->len = 1;
2127
2128 return ret;
2129}
2130
2131static const struct ethtool_ops smsc911x_ethtool_ops = {
2132 .get_link = ethtool_op_get_link,
2133 .get_drvinfo = smsc911x_ethtool_getdrvinfo,
2134 .nway_reset = phy_ethtool_nway_reset,
2135 .get_msglevel = smsc911x_ethtool_getmsglevel,
2136 .set_msglevel = smsc911x_ethtool_setmsglevel,
2137 .get_regs_len = smsc911x_ethtool_getregslen,
2138 .get_regs = smsc911x_ethtool_getregs,
2139 .get_eeprom_len = smsc911x_ethtool_get_eeprom_len,
2140 .get_eeprom = smsc911x_ethtool_get_eeprom,
2141 .set_eeprom = smsc911x_ethtool_set_eeprom,
2142 .get_ts_info = ethtool_op_get_ts_info,
2143 .get_link_ksettings = phy_ethtool_get_link_ksettings,
2144 .set_link_ksettings = phy_ethtool_set_link_ksettings,
2145};
2146
2147static const struct net_device_ops smsc911x_netdev_ops = {
2148 .ndo_open = smsc911x_open,
2149 .ndo_stop = smsc911x_stop,
2150 .ndo_start_xmit = smsc911x_hard_start_xmit,
2151 .ndo_get_stats = smsc911x_get_stats,
2152 .ndo_set_rx_mode = smsc911x_set_multicast_list,
2153 .ndo_eth_ioctl = phy_do_ioctl_running,
2154 .ndo_validate_addr = eth_validate_addr,
2155 .ndo_set_mac_address = smsc911x_set_mac_address,
2156#ifdef CONFIG_NET_POLL_CONTROLLER
2157 .ndo_poll_controller = smsc911x_poll_controller,
2158#endif
2159};
2160
2161/* copies the current mac address from hardware to dev->dev_addr */
2162static void smsc911x_read_mac_address(struct net_device *dev)
2163{
2164 struct smsc911x_data *pdata = netdev_priv(dev);
2165 u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH);
2166 u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL);
2167 u8 addr[ETH_ALEN];
2168
2169 addr[0] = (u8)(mac_low32);
2170 addr[1] = (u8)(mac_low32 >> 8);
2171 addr[2] = (u8)(mac_low32 >> 16);
2172 addr[3] = (u8)(mac_low32 >> 24);
2173 addr[4] = (u8)(mac_high16);
2174 addr[5] = (u8)(mac_high16 >> 8);
2175 eth_hw_addr_set(dev, addr);
2176}
2177
2178/* Initializing private device structures, only called from probe */
2179static int smsc911x_init(struct net_device *dev)
2180{
2181 struct smsc911x_data *pdata = netdev_priv(dev);
2182 unsigned int byte_test, mask;
2183 unsigned int to = 100;
2184
2185 SMSC_TRACE(pdata, probe, "Driver Parameters:");
2186 SMSC_TRACE(pdata, probe, "LAN base: 0x%08lX",
2187 (unsigned long)pdata->ioaddr);
2188 SMSC_TRACE(pdata, probe, "IRQ: %d", dev->irq);
2189 SMSC_TRACE(pdata, probe, "PHY will be autodetected.");
2190
2191 spin_lock_init(&pdata->dev_lock);
2192 spin_lock_init(&pdata->mac_lock);
2193
2194 if (pdata->ioaddr == NULL) {
2195 SMSC_WARN(pdata, probe, "pdata->ioaddr: 0x00000000");
2196 return -ENODEV;
2197 }
2198
2199 /*
2200 * poll the READY bit in PMT_CTRL. Any other access to the device is
2201 * forbidden while this bit isn't set. Try for 100ms
2202 *
2203 * Note that this test is done before the WORD_SWAP register is
2204 * programmed. So in some configurations the READY bit is at 16 before
2205 * WORD_SWAP is written to. This issue is worked around by waiting
2206 * until either bit 0 or bit 16 gets set in PMT_CTRL.
2207 *
2208 * SMSC has confirmed that checking bit 16 (marked as reserved in
2209 * the datasheet) is fine since these bits "will either never be set
2210 * or can only go high after READY does (so also indicate the device
2211 * is ready)".
2212 */
2213
2214 mask = PMT_CTRL_READY_ | swahw32(PMT_CTRL_READY_);
2215 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & mask) && --to)
2216 udelay(1000);
2217
2218 if (to == 0) {
2219 netdev_err(dev, "Device not READY in 100ms aborting\n");
2220 return -ENODEV;
2221 }
2222
2223 /* Check byte ordering */
2224 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2225 SMSC_TRACE(pdata, probe, "BYTE_TEST: 0x%08X", byte_test);
2226 if (byte_test == 0x43218765) {
2227 SMSC_TRACE(pdata, probe, "BYTE_TEST looks swapped, "
2228 "applying WORD_SWAP");
2229 smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff);
2230
2231 /* 1 dummy read of BYTE_TEST is needed after a write to
2232 * WORD_SWAP before its contents are valid */
2233 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2234
2235 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2236 }
2237
2238 if (byte_test != 0x87654321) {
2239 SMSC_WARN(pdata, drv, "BYTE_TEST: 0x%08X", byte_test);
2240 if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) {
2241 SMSC_WARN(pdata, probe,
2242 "top 16 bits equal to bottom 16 bits");
2243 SMSC_TRACE(pdata, probe,
2244 "This may mean the chip is set "
2245 "for 32 bit while the bus is reading 16 bit");
2246 }
2247 return -ENODEV;
2248 }
2249
2250 /* Default generation to zero (all workarounds apply) */
2251 pdata->generation = 0;
2252
2253 pdata->idrev = smsc911x_reg_read(pdata, ID_REV);
2254 switch (pdata->idrev & 0xFFFF0000) {
2255 case LAN9118:
2256 case LAN9117:
2257 case LAN9116:
2258 case LAN9115:
2259 case LAN89218:
2260 /* LAN911[5678] family */
2261 pdata->generation = pdata->idrev & 0x0000FFFF;
2262 break;
2263
2264 case LAN9218:
2265 case LAN9217:
2266 case LAN9216:
2267 case LAN9215:
2268 /* LAN921[5678] family */
2269 pdata->generation = 3;
2270 break;
2271
2272 case LAN9210:
2273 case LAN9211:
2274 case LAN9220:
2275 case LAN9221:
2276 case LAN9250:
2277 /* LAN9210/LAN9211/LAN9220/LAN9221/LAN9250 */
2278 pdata->generation = 4;
2279 break;
2280
2281 default:
2282 SMSC_WARN(pdata, probe, "LAN911x not identified, idrev: 0x%08X",
2283 pdata->idrev);
2284 return -ENODEV;
2285 }
2286
2287 SMSC_TRACE(pdata, probe,
2288 "LAN911x identified, idrev: 0x%08X, generation: %d",
2289 pdata->idrev, pdata->generation);
2290
2291 if (pdata->generation == 0)
2292 SMSC_WARN(pdata, probe,
2293 "This driver is not intended for this chip revision");
2294
2295 /* workaround for platforms without an eeprom, where the mac address
2296 * is stored elsewhere and set by the bootloader. This saves the
2297 * mac address before resetting the device */
2298 if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS) {
2299 spin_lock_irq(&pdata->mac_lock);
2300 smsc911x_read_mac_address(dev);
2301 spin_unlock_irq(&pdata->mac_lock);
2302 }
2303
2304 /* Reset the LAN911x */
2305 if (smsc911x_phy_reset(pdata) || smsc911x_soft_reset(pdata))
2306 return -ENODEV;
2307
2308 dev->flags |= IFF_MULTICAST;
2309 netif_napi_add_weight(dev, &pdata->napi, smsc911x_poll,
2310 SMSC_NAPI_WEIGHT);
2311 dev->netdev_ops = &smsc911x_netdev_ops;
2312 dev->ethtool_ops = &smsc911x_ethtool_ops;
2313
2314 return 0;
2315}
2316
2317static void smsc911x_drv_remove(struct platform_device *pdev)
2318{
2319 struct net_device *dev;
2320 struct smsc911x_data *pdata;
2321 struct resource *res;
2322
2323 dev = platform_get_drvdata(pdev);
2324 BUG_ON(!dev);
2325 pdata = netdev_priv(dev);
2326 BUG_ON(!pdata);
2327 BUG_ON(!pdata->ioaddr);
2328
2329 SMSC_TRACE(pdata, ifdown, "Stopping driver");
2330
2331 unregister_netdev(dev);
2332
2333 mdiobus_unregister(pdata->mii_bus);
2334 mdiobus_free(pdata->mii_bus);
2335
2336 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2337 "smsc911x-memory");
2338 if (!res)
2339 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2340
2341 release_mem_region(res->start, resource_size(res));
2342
2343 iounmap(pdata->ioaddr);
2344
2345 (void)smsc911x_disable_resources(pdev);
2346 smsc911x_free_resources(pdev);
2347
2348 free_netdev(dev);
2349
2350 pm_runtime_disable(&pdev->dev);
2351}
2352
2353/* standard register acces */
2354static const struct smsc911x_ops standard_smsc911x_ops = {
2355 .reg_read = __smsc911x_reg_read,
2356 .reg_write = __smsc911x_reg_write,
2357 .rx_readfifo = smsc911x_rx_readfifo,
2358 .tx_writefifo = smsc911x_tx_writefifo,
2359};
2360
2361/* shifted register access */
2362static const struct smsc911x_ops shifted_smsc911x_ops = {
2363 .reg_read = __smsc911x_reg_read_shift,
2364 .reg_write = __smsc911x_reg_write_shift,
2365 .rx_readfifo = smsc911x_rx_readfifo_shift,
2366 .tx_writefifo = smsc911x_tx_writefifo_shift,
2367};
2368
2369static int smsc911x_probe_config(struct smsc911x_platform_config *config,
2370 struct device *dev)
2371{
2372 int phy_interface;
2373 u32 width = 0;
2374 int err;
2375
2376 phy_interface = device_get_phy_mode(dev);
2377 if (phy_interface < 0)
2378 phy_interface = PHY_INTERFACE_MODE_NA;
2379 config->phy_interface = phy_interface;
2380
2381 device_get_mac_address(dev, config->mac);
2382
2383 err = device_property_read_u32(dev, "reg-io-width", &width);
2384 if (err == -ENXIO)
2385 return err;
2386 if (!err && width == 4)
2387 config->flags |= SMSC911X_USE_32BIT;
2388 else
2389 config->flags |= SMSC911X_USE_16BIT;
2390
2391 device_property_read_u32(dev, "reg-shift", &config->shift);
2392
2393 if (device_property_present(dev, "smsc,irq-active-high"))
2394 config->irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH;
2395
2396 if (device_property_present(dev, "smsc,irq-push-pull"))
2397 config->irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL;
2398
2399 if (device_property_present(dev, "smsc,force-internal-phy"))
2400 config->flags |= SMSC911X_FORCE_INTERNAL_PHY;
2401
2402 if (device_property_present(dev, "smsc,force-external-phy"))
2403 config->flags |= SMSC911X_FORCE_EXTERNAL_PHY;
2404
2405 if (device_property_present(dev, "smsc,save-mac-address"))
2406 config->flags |= SMSC911X_SAVE_MAC_ADDRESS;
2407
2408 return 0;
2409}
2410
2411static int smsc911x_drv_probe(struct platform_device *pdev)
2412{
2413 struct net_device *dev;
2414 struct smsc911x_data *pdata;
2415 struct smsc911x_platform_config *config = dev_get_platdata(&pdev->dev);
2416 struct resource *res;
2417 int res_size, irq;
2418 int retval;
2419
2420 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2421 "smsc911x-memory");
2422 if (!res)
2423 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2424 if (!res) {
2425 pr_warn("Could not allocate resource\n");
2426 retval = -ENODEV;
2427 goto out_0;
2428 }
2429 res_size = resource_size(res);
2430
2431 irq = platform_get_irq(pdev, 0);
2432 if (irq == -EPROBE_DEFER) {
2433 retval = -EPROBE_DEFER;
2434 goto out_0;
2435 } else if (irq < 0) {
2436 pr_warn("Could not allocate irq resource\n");
2437 retval = -ENODEV;
2438 goto out_0;
2439 }
2440
2441 if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) {
2442 retval = -EBUSY;
2443 goto out_0;
2444 }
2445
2446 dev = alloc_etherdev(sizeof(struct smsc911x_data));
2447 if (!dev) {
2448 retval = -ENOMEM;
2449 goto out_release_io_1;
2450 }
2451
2452 SET_NETDEV_DEV(dev, &pdev->dev);
2453
2454 pdata = netdev_priv(dev);
2455 dev->irq = irq;
2456 pdata->ioaddr = ioremap(res->start, res_size);
2457 if (!pdata->ioaddr) {
2458 retval = -ENOMEM;
2459 goto out_ioremap_fail;
2460 }
2461
2462 pdata->dev = dev;
2463 pdata->msg_enable = ((1 << debug) - 1);
2464
2465 platform_set_drvdata(pdev, dev);
2466
2467 retval = smsc911x_request_resources(pdev);
2468 if (retval)
2469 goto out_request_resources_fail;
2470
2471 retval = smsc911x_enable_resources(pdev);
2472 if (retval)
2473 goto out_enable_resources_fail;
2474
2475 if (pdata->ioaddr == NULL) {
2476 SMSC_WARN(pdata, probe, "Error smsc911x base address invalid");
2477 retval = -ENOMEM;
2478 goto out_disable_resources;
2479 }
2480
2481 retval = smsc911x_probe_config(&pdata->config, &pdev->dev);
2482 if (retval && config) {
2483 /* copy config parameters across to pdata */
2484 memcpy(&pdata->config, config, sizeof(pdata->config));
2485 retval = 0;
2486 }
2487
2488 if (retval) {
2489 SMSC_WARN(pdata, probe, "Error smsc911x config not found");
2490 goto out_disable_resources;
2491 }
2492
2493 /* assume standard, non-shifted, access to HW registers */
2494 pdata->ops = &standard_smsc911x_ops;
2495 /* apply the right access if shifting is needed */
2496 if (pdata->config.shift)
2497 pdata->ops = &shifted_smsc911x_ops;
2498
2499 pm_runtime_enable(&pdev->dev);
2500 pm_runtime_get_sync(&pdev->dev);
2501
2502 retval = smsc911x_init(dev);
2503 if (retval < 0)
2504 goto out_init_fail;
2505
2506 netif_carrier_off(dev);
2507
2508 retval = smsc911x_mii_init(pdev, dev);
2509 if (retval) {
2510 SMSC_WARN(pdata, probe, "Error %i initialising mii", retval);
2511 goto out_init_fail;
2512 }
2513
2514 retval = register_netdev(dev);
2515 if (retval) {
2516 SMSC_WARN(pdata, probe, "Error %i registering device", retval);
2517 goto out_init_fail;
2518 } else {
2519 SMSC_TRACE(pdata, probe,
2520 "Network interface: \"%s\"", dev->name);
2521 }
2522
2523 spin_lock_irq(&pdata->mac_lock);
2524
2525 /* Check if mac address has been specified when bringing interface up */
2526 if (is_valid_ether_addr(dev->dev_addr)) {
2527 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2528 SMSC_TRACE(pdata, probe,
2529 "MAC Address is specified by configuration");
2530 } else if (is_valid_ether_addr(pdata->config.mac)) {
2531 eth_hw_addr_set(dev, pdata->config.mac);
2532 SMSC_TRACE(pdata, probe,
2533 "MAC Address specified by platform data");
2534 } else {
2535 /* Try reading mac address from device. if EEPROM is present
2536 * it will already have been set */
2537 smsc_get_mac(dev);
2538
2539 if (is_valid_ether_addr(dev->dev_addr)) {
2540 /* eeprom values are valid so use them */
2541 SMSC_TRACE(pdata, probe,
2542 "Mac Address is read from LAN911x EEPROM");
2543 } else {
2544 /* eeprom values are invalid, generate random MAC */
2545 eth_hw_addr_random(dev);
2546 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2547 SMSC_TRACE(pdata, probe,
2548 "MAC Address is set to eth_random_addr");
2549 }
2550 }
2551
2552 spin_unlock_irq(&pdata->mac_lock);
2553 pm_runtime_put(&pdev->dev);
2554
2555 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
2556
2557 return 0;
2558
2559out_init_fail:
2560 pm_runtime_put(&pdev->dev);
2561 pm_runtime_disable(&pdev->dev);
2562out_disable_resources:
2563 (void)smsc911x_disable_resources(pdev);
2564out_enable_resources_fail:
2565 smsc911x_free_resources(pdev);
2566out_request_resources_fail:
2567 iounmap(pdata->ioaddr);
2568out_ioremap_fail:
2569 free_netdev(dev);
2570out_release_io_1:
2571 release_mem_region(res->start, resource_size(res));
2572out_0:
2573 return retval;
2574}
2575
2576#ifdef CONFIG_PM
2577/* This implementation assumes the devices remains powered on its VDDVARIO
2578 * pins during suspend. */
2579
2580/* TODO: implement freeze/thaw callbacks for hibernation.*/
2581
2582static int smsc911x_suspend(struct device *dev)
2583{
2584 struct net_device *ndev = dev_get_drvdata(dev);
2585 struct smsc911x_data *pdata = netdev_priv(ndev);
2586
2587 if (netif_running(ndev)) {
2588 netif_stop_queue(ndev);
2589 netif_device_detach(ndev);
2590 if (!device_may_wakeup(dev))
2591 phy_stop(ndev->phydev);
2592 }
2593
2594 /* enable wake on LAN, energy detection and the external PME
2595 * signal. */
2596 smsc911x_reg_write(pdata, PMT_CTRL,
2597 PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ |
2598 PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_);
2599
2600 pm_runtime_disable(dev);
2601 pm_runtime_set_suspended(dev);
2602
2603 return 0;
2604}
2605
2606static int smsc911x_resume(struct device *dev)
2607{
2608 struct net_device *ndev = dev_get_drvdata(dev);
2609 struct smsc911x_data *pdata = netdev_priv(ndev);
2610 unsigned int to = 100;
2611
2612 pm_runtime_enable(dev);
2613 pm_runtime_resume(dev);
2614
2615 /* Note 3.11 from the datasheet:
2616 * "When the LAN9220 is in a power saving state, a write of any
2617 * data to the BYTE_TEST register will wake-up the device."
2618 */
2619 smsc911x_reg_write(pdata, BYTE_TEST, 0);
2620
2621 /* poll the READY bit in PMT_CTRL. Any other access to the device is
2622 * forbidden while this bit isn't set. Try for 100ms and return -EIO
2623 * if it failed. */
2624 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to)
2625 udelay(1000);
2626
2627 if (to == 0)
2628 return -EIO;
2629
2630 if (netif_running(ndev)) {
2631 netif_device_attach(ndev);
2632 netif_start_queue(ndev);
2633 if (!device_may_wakeup(dev))
2634 phy_start(ndev->phydev);
2635 }
2636
2637 return 0;
2638}
2639
2640static const struct dev_pm_ops smsc911x_pm_ops = {
2641 .suspend = smsc911x_suspend,
2642 .resume = smsc911x_resume,
2643};
2644
2645#define SMSC911X_PM_OPS (&smsc911x_pm_ops)
2646
2647#else
2648#define SMSC911X_PM_OPS NULL
2649#endif
2650
2651#ifdef CONFIG_OF
2652static const struct of_device_id smsc911x_dt_ids[] = {
2653 { .compatible = "smsc,lan9115", },
2654 { /* sentinel */ }
2655};
2656MODULE_DEVICE_TABLE(of, smsc911x_dt_ids);
2657#endif
2658
2659#ifdef CONFIG_ACPI
2660static const struct acpi_device_id smsc911x_acpi_match[] = {
2661 { "ARMH9118", 0 },
2662 { }
2663};
2664MODULE_DEVICE_TABLE(acpi, smsc911x_acpi_match);
2665#endif
2666
2667static struct platform_driver smsc911x_driver = {
2668 .probe = smsc911x_drv_probe,
2669 .remove_new = smsc911x_drv_remove,
2670 .driver = {
2671 .name = SMSC_CHIPNAME,
2672 .pm = SMSC911X_PM_OPS,
2673 .of_match_table = of_match_ptr(smsc911x_dt_ids),
2674 .acpi_match_table = ACPI_PTR(smsc911x_acpi_match),
2675 },
2676};
2677
2678/* Entry point for loading the module */
2679static int __init smsc911x_init_module(void)
2680{
2681 SMSC_INITIALIZE();
2682 return platform_driver_register(&smsc911x_driver);
2683}
2684
2685/* entry point for unloading the module */
2686static void __exit smsc911x_cleanup_module(void)
2687{
2688 platform_driver_unregister(&smsc911x_driver);
2689}
2690
2691module_init(smsc911x_init_module);
2692module_exit(smsc911x_cleanup_module);
1/***************************************************************************
2 *
3 * Copyright (C) 2004-2008 SMSC
4 * Copyright (C) 2005-2008 ARM
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 *
20 ***************************************************************************
21 * Rewritten, heavily based on smsc911x simple driver by SMSC.
22 * Partly uses io macros from smc91x.c by Nicolas Pitre
23 *
24 * Supported devices:
25 * LAN9115, LAN9116, LAN9117, LAN9118
26 * LAN9215, LAN9216, LAN9217, LAN9218
27 * LAN9210, LAN9211
28 * LAN9220, LAN9221
29 * LAN89218
30 *
31 */
32
33#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
34
35#include <linux/crc32.h>
36#include <linux/delay.h>
37#include <linux/errno.h>
38#include <linux/etherdevice.h>
39#include <linux/ethtool.h>
40#include <linux/init.h>
41#include <linux/interrupt.h>
42#include <linux/ioport.h>
43#include <linux/kernel.h>
44#include <linux/module.h>
45#include <linux/netdevice.h>
46#include <linux/platform_device.h>
47#include <linux/regulator/consumer.h>
48#include <linux/sched.h>
49#include <linux/timer.h>
50#include <linux/bug.h>
51#include <linux/bitops.h>
52#include <linux/irq.h>
53#include <linux/io.h>
54#include <linux/swab.h>
55#include <linux/phy.h>
56#include <linux/smsc911x.h>
57#include <linux/device.h>
58#include <linux/of.h>
59#include <linux/of_device.h>
60#include <linux/of_gpio.h>
61#include <linux/of_net.h>
62#include "smsc911x.h"
63
64#define SMSC_CHIPNAME "smsc911x"
65#define SMSC_MDIONAME "smsc911x-mdio"
66#define SMSC_DRV_VERSION "2008-10-21"
67
68MODULE_LICENSE("GPL");
69MODULE_VERSION(SMSC_DRV_VERSION);
70MODULE_ALIAS("platform:smsc911x");
71
72#if USE_DEBUG > 0
73static int debug = 16;
74#else
75static int debug = 3;
76#endif
77
78module_param(debug, int, 0);
79MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
80
81struct smsc911x_data;
82
83struct smsc911x_ops {
84 u32 (*reg_read)(struct smsc911x_data *pdata, u32 reg);
85 void (*reg_write)(struct smsc911x_data *pdata, u32 reg, u32 val);
86 void (*rx_readfifo)(struct smsc911x_data *pdata,
87 unsigned int *buf, unsigned int wordcount);
88 void (*tx_writefifo)(struct smsc911x_data *pdata,
89 unsigned int *buf, unsigned int wordcount);
90};
91
92#define SMSC911X_NUM_SUPPLIES 2
93
94struct smsc911x_data {
95 void __iomem *ioaddr;
96
97 unsigned int idrev;
98
99 /* used to decide which workarounds apply */
100 unsigned int generation;
101
102 /* device configuration (copied from platform_data during probe) */
103 struct smsc911x_platform_config config;
104
105 /* This needs to be acquired before calling any of below:
106 * smsc911x_mac_read(), smsc911x_mac_write()
107 */
108 spinlock_t mac_lock;
109
110 /* spinlock to ensure register accesses are serialised */
111 spinlock_t dev_lock;
112
113 struct phy_device *phy_dev;
114 struct mii_bus *mii_bus;
115 int phy_irq[PHY_MAX_ADDR];
116 unsigned int using_extphy;
117 int last_duplex;
118 int last_carrier;
119
120 u32 msg_enable;
121 unsigned int gpio_setting;
122 unsigned int gpio_orig_setting;
123 struct net_device *dev;
124 struct napi_struct napi;
125
126 unsigned int software_irq_signal;
127
128#ifdef USE_PHY_WORK_AROUND
129#define MIN_PACKET_SIZE (64)
130 char loopback_tx_pkt[MIN_PACKET_SIZE];
131 char loopback_rx_pkt[MIN_PACKET_SIZE];
132 unsigned int resetcount;
133#endif
134
135 /* Members for Multicast filter workaround */
136 unsigned int multicast_update_pending;
137 unsigned int set_bits_mask;
138 unsigned int clear_bits_mask;
139 unsigned int hashhi;
140 unsigned int hashlo;
141
142 /* register access functions */
143 const struct smsc911x_ops *ops;
144
145 /* regulators */
146 struct regulator_bulk_data supplies[SMSC911X_NUM_SUPPLIES];
147};
148
149/* Easy access to information */
150#define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift))
151
152static inline u32 __smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
153{
154 if (pdata->config.flags & SMSC911X_USE_32BIT)
155 return readl(pdata->ioaddr + reg);
156
157 if (pdata->config.flags & SMSC911X_USE_16BIT)
158 return ((readw(pdata->ioaddr + reg) & 0xFFFF) |
159 ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16));
160
161 BUG();
162 return 0;
163}
164
165static inline u32
166__smsc911x_reg_read_shift(struct smsc911x_data *pdata, u32 reg)
167{
168 if (pdata->config.flags & SMSC911X_USE_32BIT)
169 return readl(pdata->ioaddr + __smsc_shift(pdata, reg));
170
171 if (pdata->config.flags & SMSC911X_USE_16BIT)
172 return (readw(pdata->ioaddr +
173 __smsc_shift(pdata, reg)) & 0xFFFF) |
174 ((readw(pdata->ioaddr +
175 __smsc_shift(pdata, reg + 2)) & 0xFFFF) << 16);
176
177 BUG();
178 return 0;
179}
180
181static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
182{
183 u32 data;
184 unsigned long flags;
185
186 spin_lock_irqsave(&pdata->dev_lock, flags);
187 data = pdata->ops->reg_read(pdata, reg);
188 spin_unlock_irqrestore(&pdata->dev_lock, flags);
189
190 return data;
191}
192
193static inline void __smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
194 u32 val)
195{
196 if (pdata->config.flags & SMSC911X_USE_32BIT) {
197 writel(val, pdata->ioaddr + reg);
198 return;
199 }
200
201 if (pdata->config.flags & SMSC911X_USE_16BIT) {
202 writew(val & 0xFFFF, pdata->ioaddr + reg);
203 writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2);
204 return;
205 }
206
207 BUG();
208}
209
210static inline void
211__smsc911x_reg_write_shift(struct smsc911x_data *pdata, u32 reg, u32 val)
212{
213 if (pdata->config.flags & SMSC911X_USE_32BIT) {
214 writel(val, pdata->ioaddr + __smsc_shift(pdata, reg));
215 return;
216 }
217
218 if (pdata->config.flags & SMSC911X_USE_16BIT) {
219 writew(val & 0xFFFF,
220 pdata->ioaddr + __smsc_shift(pdata, reg));
221 writew((val >> 16) & 0xFFFF,
222 pdata->ioaddr + __smsc_shift(pdata, reg + 2));
223 return;
224 }
225
226 BUG();
227}
228
229static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
230 u32 val)
231{
232 unsigned long flags;
233
234 spin_lock_irqsave(&pdata->dev_lock, flags);
235 pdata->ops->reg_write(pdata, reg, val);
236 spin_unlock_irqrestore(&pdata->dev_lock, flags);
237}
238
239/* Writes a packet to the TX_DATA_FIFO */
240static inline void
241smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf,
242 unsigned int wordcount)
243{
244 unsigned long flags;
245
246 spin_lock_irqsave(&pdata->dev_lock, flags);
247
248 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
249 while (wordcount--)
250 __smsc911x_reg_write(pdata, TX_DATA_FIFO,
251 swab32(*buf++));
252 goto out;
253 }
254
255 if (pdata->config.flags & SMSC911X_USE_32BIT) {
256 writesl(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount);
257 goto out;
258 }
259
260 if (pdata->config.flags & SMSC911X_USE_16BIT) {
261 while (wordcount--)
262 __smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++);
263 goto out;
264 }
265
266 BUG();
267out:
268 spin_unlock_irqrestore(&pdata->dev_lock, flags);
269}
270
271/* Writes a packet to the TX_DATA_FIFO - shifted version */
272static inline void
273smsc911x_tx_writefifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
274 unsigned int wordcount)
275{
276 unsigned long flags;
277
278 spin_lock_irqsave(&pdata->dev_lock, flags);
279
280 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
281 while (wordcount--)
282 __smsc911x_reg_write_shift(pdata, TX_DATA_FIFO,
283 swab32(*buf++));
284 goto out;
285 }
286
287 if (pdata->config.flags & SMSC911X_USE_32BIT) {
288 writesl(pdata->ioaddr + __smsc_shift(pdata,
289 TX_DATA_FIFO), buf, wordcount);
290 goto out;
291 }
292
293 if (pdata->config.flags & SMSC911X_USE_16BIT) {
294 while (wordcount--)
295 __smsc911x_reg_write_shift(pdata,
296 TX_DATA_FIFO, *buf++);
297 goto out;
298 }
299
300 BUG();
301out:
302 spin_unlock_irqrestore(&pdata->dev_lock, flags);
303}
304
305/* Reads a packet out of the RX_DATA_FIFO */
306static inline void
307smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf,
308 unsigned int wordcount)
309{
310 unsigned long flags;
311
312 spin_lock_irqsave(&pdata->dev_lock, flags);
313
314 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
315 while (wordcount--)
316 *buf++ = swab32(__smsc911x_reg_read(pdata,
317 RX_DATA_FIFO));
318 goto out;
319 }
320
321 if (pdata->config.flags & SMSC911X_USE_32BIT) {
322 readsl(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount);
323 goto out;
324 }
325
326 if (pdata->config.flags & SMSC911X_USE_16BIT) {
327 while (wordcount--)
328 *buf++ = __smsc911x_reg_read(pdata, RX_DATA_FIFO);
329 goto out;
330 }
331
332 BUG();
333out:
334 spin_unlock_irqrestore(&pdata->dev_lock, flags);
335}
336
337/* Reads a packet out of the RX_DATA_FIFO - shifted version */
338static inline void
339smsc911x_rx_readfifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
340 unsigned int wordcount)
341{
342 unsigned long flags;
343
344 spin_lock_irqsave(&pdata->dev_lock, flags);
345
346 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
347 while (wordcount--)
348 *buf++ = swab32(__smsc911x_reg_read_shift(pdata,
349 RX_DATA_FIFO));
350 goto out;
351 }
352
353 if (pdata->config.flags & SMSC911X_USE_32BIT) {
354 readsl(pdata->ioaddr + __smsc_shift(pdata,
355 RX_DATA_FIFO), buf, wordcount);
356 goto out;
357 }
358
359 if (pdata->config.flags & SMSC911X_USE_16BIT) {
360 while (wordcount--)
361 *buf++ = __smsc911x_reg_read_shift(pdata,
362 RX_DATA_FIFO);
363 goto out;
364 }
365
366 BUG();
367out:
368 spin_unlock_irqrestore(&pdata->dev_lock, flags);
369}
370
371/*
372 * enable resources, currently just regulators.
373 */
374static int smsc911x_enable_resources(struct platform_device *pdev)
375{
376 struct net_device *ndev = platform_get_drvdata(pdev);
377 struct smsc911x_data *pdata = netdev_priv(ndev);
378 int ret = 0;
379
380 ret = regulator_bulk_enable(ARRAY_SIZE(pdata->supplies),
381 pdata->supplies);
382 if (ret)
383 netdev_err(ndev, "failed to enable regulators %d\n",
384 ret);
385 return ret;
386}
387
388/*
389 * disable resources, currently just regulators.
390 */
391static int smsc911x_disable_resources(struct platform_device *pdev)
392{
393 struct net_device *ndev = platform_get_drvdata(pdev);
394 struct smsc911x_data *pdata = netdev_priv(ndev);
395 int ret = 0;
396
397 ret = regulator_bulk_disable(ARRAY_SIZE(pdata->supplies),
398 pdata->supplies);
399 return ret;
400}
401
402/*
403 * Request resources, currently just regulators.
404 *
405 * The SMSC911x has two power pins: vddvario and vdd33a, in designs where
406 * these are not always-on we need to request regulators to be turned on
407 * before we can try to access the device registers.
408 */
409static int smsc911x_request_resources(struct platform_device *pdev)
410{
411 struct net_device *ndev = platform_get_drvdata(pdev);
412 struct smsc911x_data *pdata = netdev_priv(ndev);
413 int ret = 0;
414
415 /* Request regulators */
416 pdata->supplies[0].supply = "vdd33a";
417 pdata->supplies[1].supply = "vddvario";
418 ret = regulator_bulk_get(&pdev->dev,
419 ARRAY_SIZE(pdata->supplies),
420 pdata->supplies);
421 if (ret)
422 netdev_err(ndev, "couldn't get regulators %d\n",
423 ret);
424 return ret;
425}
426
427/*
428 * Free resources, currently just regulators.
429 *
430 */
431static void smsc911x_free_resources(struct platform_device *pdev)
432{
433 struct net_device *ndev = platform_get_drvdata(pdev);
434 struct smsc911x_data *pdata = netdev_priv(ndev);
435
436 /* Free regulators */
437 regulator_bulk_free(ARRAY_SIZE(pdata->supplies),
438 pdata->supplies);
439}
440
441/* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
442 * and smsc911x_mac_write, so assumes mac_lock is held */
443static int smsc911x_mac_complete(struct smsc911x_data *pdata)
444{
445 int i;
446 u32 val;
447
448 SMSC_ASSERT_MAC_LOCK(pdata);
449
450 for (i = 0; i < 40; i++) {
451 val = smsc911x_reg_read(pdata, MAC_CSR_CMD);
452 if (!(val & MAC_CSR_CMD_CSR_BUSY_))
453 return 0;
454 }
455 SMSC_WARN(pdata, hw, "Timed out waiting for MAC not BUSY. "
456 "MAC_CSR_CMD: 0x%08X", val);
457 return -EIO;
458}
459
460/* Fetches a MAC register value. Assumes mac_lock is acquired */
461static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset)
462{
463 unsigned int temp;
464
465 SMSC_ASSERT_MAC_LOCK(pdata);
466
467 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
468 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
469 SMSC_WARN(pdata, hw, "MAC busy at entry");
470 return 0xFFFFFFFF;
471 }
472
473 /* Send the MAC cmd */
474 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
475 MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_));
476
477 /* Workaround for hardware read-after-write restriction */
478 temp = smsc911x_reg_read(pdata, BYTE_TEST);
479
480 /* Wait for the read to complete */
481 if (likely(smsc911x_mac_complete(pdata) == 0))
482 return smsc911x_reg_read(pdata, MAC_CSR_DATA);
483
484 SMSC_WARN(pdata, hw, "MAC busy after read");
485 return 0xFFFFFFFF;
486}
487
488/* Set a mac register, mac_lock must be acquired before calling */
489static void smsc911x_mac_write(struct smsc911x_data *pdata,
490 unsigned int offset, u32 val)
491{
492 unsigned int temp;
493
494 SMSC_ASSERT_MAC_LOCK(pdata);
495
496 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
497 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
498 SMSC_WARN(pdata, hw,
499 "smsc911x_mac_write failed, MAC busy at entry");
500 return;
501 }
502
503 /* Send data to write */
504 smsc911x_reg_write(pdata, MAC_CSR_DATA, val);
505
506 /* Write the actual data */
507 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
508 MAC_CSR_CMD_CSR_BUSY_));
509
510 /* Workaround for hardware read-after-write restriction */
511 temp = smsc911x_reg_read(pdata, BYTE_TEST);
512
513 /* Wait for the write to complete */
514 if (likely(smsc911x_mac_complete(pdata) == 0))
515 return;
516
517 SMSC_WARN(pdata, hw, "smsc911x_mac_write failed, MAC busy after write");
518}
519
520/* Get a phy register */
521static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx)
522{
523 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
524 unsigned long flags;
525 unsigned int addr;
526 int i, reg;
527
528 spin_lock_irqsave(&pdata->mac_lock, flags);
529
530 /* Confirm MII not busy */
531 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
532 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_read???");
533 reg = -EIO;
534 goto out;
535 }
536
537 /* Set the address, index & direction (read from PHY) */
538 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6);
539 smsc911x_mac_write(pdata, MII_ACC, addr);
540
541 /* Wait for read to complete w/ timeout */
542 for (i = 0; i < 100; i++)
543 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
544 reg = smsc911x_mac_read(pdata, MII_DATA);
545 goto out;
546 }
547
548 SMSC_WARN(pdata, hw, "Timed out waiting for MII read to finish");
549 reg = -EIO;
550
551out:
552 spin_unlock_irqrestore(&pdata->mac_lock, flags);
553 return reg;
554}
555
556/* Set a phy register */
557static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx,
558 u16 val)
559{
560 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
561 unsigned long flags;
562 unsigned int addr;
563 int i, reg;
564
565 spin_lock_irqsave(&pdata->mac_lock, flags);
566
567 /* Confirm MII not busy */
568 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
569 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_write???");
570 reg = -EIO;
571 goto out;
572 }
573
574 /* Put the data to write in the MAC */
575 smsc911x_mac_write(pdata, MII_DATA, val);
576
577 /* Set the address, index & direction (write to PHY) */
578 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
579 MII_ACC_MII_WRITE_;
580 smsc911x_mac_write(pdata, MII_ACC, addr);
581
582 /* Wait for write to complete w/ timeout */
583 for (i = 0; i < 100; i++)
584 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
585 reg = 0;
586 goto out;
587 }
588
589 SMSC_WARN(pdata, hw, "Timed out waiting for MII write to finish");
590 reg = -EIO;
591
592out:
593 spin_unlock_irqrestore(&pdata->mac_lock, flags);
594 return reg;
595}
596
597/* Switch to external phy. Assumes tx and rx are stopped. */
598static void smsc911x_phy_enable_external(struct smsc911x_data *pdata)
599{
600 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
601
602 /* Disable phy clocks to the MAC */
603 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
604 hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
605 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
606 udelay(10); /* Enough time for clocks to stop */
607
608 /* Switch to external phy */
609 hwcfg |= HW_CFG_EXT_PHY_EN_;
610 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
611
612 /* Enable phy clocks to the MAC */
613 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
614 hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
615 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
616 udelay(10); /* Enough time for clocks to restart */
617
618 hwcfg |= HW_CFG_SMI_SEL_;
619 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
620}
621
622/* Autodetects and enables external phy if present on supported chips.
623 * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY
624 * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */
625static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata)
626{
627 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
628
629 if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) {
630 SMSC_TRACE(pdata, hw, "Forcing internal PHY");
631 pdata->using_extphy = 0;
632 } else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) {
633 SMSC_TRACE(pdata, hw, "Forcing external PHY");
634 smsc911x_phy_enable_external(pdata);
635 pdata->using_extphy = 1;
636 } else if (hwcfg & HW_CFG_EXT_PHY_DET_) {
637 SMSC_TRACE(pdata, hw,
638 "HW_CFG EXT_PHY_DET set, using external PHY");
639 smsc911x_phy_enable_external(pdata);
640 pdata->using_extphy = 1;
641 } else {
642 SMSC_TRACE(pdata, hw,
643 "HW_CFG EXT_PHY_DET clear, using internal PHY");
644 pdata->using_extphy = 0;
645 }
646}
647
648/* Fetches a tx status out of the status fifo */
649static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata)
650{
651 unsigned int result =
652 smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_;
653
654 if (result != 0)
655 result = smsc911x_reg_read(pdata, TX_STATUS_FIFO);
656
657 return result;
658}
659
660/* Fetches the next rx status */
661static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata)
662{
663 unsigned int result =
664 smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_;
665
666 if (result != 0)
667 result = smsc911x_reg_read(pdata, RX_STATUS_FIFO);
668
669 return result;
670}
671
672#ifdef USE_PHY_WORK_AROUND
673static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata)
674{
675 unsigned int tries;
676 u32 wrsz;
677 u32 rdsz;
678 ulong bufp;
679
680 for (tries = 0; tries < 10; tries++) {
681 unsigned int txcmd_a;
682 unsigned int txcmd_b;
683 unsigned int status;
684 unsigned int pktlength;
685 unsigned int i;
686
687 /* Zero-out rx packet memory */
688 memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE);
689
690 /* Write tx packet to 118 */
691 txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16;
692 txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
693 txcmd_a |= MIN_PACKET_SIZE;
694
695 txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE;
696
697 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a);
698 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b);
699
700 bufp = (ulong)pdata->loopback_tx_pkt & (~0x3);
701 wrsz = MIN_PACKET_SIZE + 3;
702 wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3);
703 wrsz >>= 2;
704
705 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
706
707 /* Wait till transmit is done */
708 i = 60;
709 do {
710 udelay(5);
711 status = smsc911x_tx_get_txstatus(pdata);
712 } while ((i--) && (!status));
713
714 if (!status) {
715 SMSC_WARN(pdata, hw,
716 "Failed to transmit during loopback test");
717 continue;
718 }
719 if (status & TX_STS_ES_) {
720 SMSC_WARN(pdata, hw,
721 "Transmit encountered errors during loopback test");
722 continue;
723 }
724
725 /* Wait till receive is done */
726 i = 60;
727 do {
728 udelay(5);
729 status = smsc911x_rx_get_rxstatus(pdata);
730 } while ((i--) && (!status));
731
732 if (!status) {
733 SMSC_WARN(pdata, hw,
734 "Failed to receive during loopback test");
735 continue;
736 }
737 if (status & RX_STS_ES_) {
738 SMSC_WARN(pdata, hw,
739 "Receive encountered errors during loopback test");
740 continue;
741 }
742
743 pktlength = ((status & 0x3FFF0000UL) >> 16);
744 bufp = (ulong)pdata->loopback_rx_pkt;
745 rdsz = pktlength + 3;
746 rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3);
747 rdsz >>= 2;
748
749 pdata->ops->rx_readfifo(pdata, (unsigned int *)bufp, rdsz);
750
751 if (pktlength != (MIN_PACKET_SIZE + 4)) {
752 SMSC_WARN(pdata, hw, "Unexpected packet size "
753 "during loop back test, size=%d, will retry",
754 pktlength);
755 } else {
756 unsigned int j;
757 int mismatch = 0;
758 for (j = 0; j < MIN_PACKET_SIZE; j++) {
759 if (pdata->loopback_tx_pkt[j]
760 != pdata->loopback_rx_pkt[j]) {
761 mismatch = 1;
762 break;
763 }
764 }
765 if (!mismatch) {
766 SMSC_TRACE(pdata, hw, "Successfully verified "
767 "loopback packet");
768 return 0;
769 } else {
770 SMSC_WARN(pdata, hw, "Data mismatch "
771 "during loop back test, will retry");
772 }
773 }
774 }
775
776 return -EIO;
777}
778
779static int smsc911x_phy_reset(struct smsc911x_data *pdata)
780{
781 struct phy_device *phy_dev = pdata->phy_dev;
782 unsigned int temp;
783 unsigned int i = 100000;
784
785 BUG_ON(!phy_dev);
786 BUG_ON(!phy_dev->bus);
787
788 SMSC_TRACE(pdata, hw, "Performing PHY BCR Reset");
789 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, BMCR_RESET);
790 do {
791 msleep(1);
792 temp = smsc911x_mii_read(phy_dev->bus, phy_dev->addr,
793 MII_BMCR);
794 } while ((i--) && (temp & BMCR_RESET));
795
796 if (temp & BMCR_RESET) {
797 SMSC_WARN(pdata, hw, "PHY reset failed to complete");
798 return -EIO;
799 }
800 /* Extra delay required because the phy may not be completed with
801 * its reset when BMCR_RESET is cleared. Specs say 256 uS is
802 * enough delay but using 1ms here to be safe */
803 msleep(1);
804
805 return 0;
806}
807
808static int smsc911x_phy_loopbacktest(struct net_device *dev)
809{
810 struct smsc911x_data *pdata = netdev_priv(dev);
811 struct phy_device *phy_dev = pdata->phy_dev;
812 int result = -EIO;
813 unsigned int i, val;
814 unsigned long flags;
815
816 /* Initialise tx packet using broadcast destination address */
817 memset(pdata->loopback_tx_pkt, 0xff, ETH_ALEN);
818
819 /* Use incrementing source address */
820 for (i = 6; i < 12; i++)
821 pdata->loopback_tx_pkt[i] = (char)i;
822
823 /* Set length type field */
824 pdata->loopback_tx_pkt[12] = 0x00;
825 pdata->loopback_tx_pkt[13] = 0x00;
826
827 for (i = 14; i < MIN_PACKET_SIZE; i++)
828 pdata->loopback_tx_pkt[i] = (char)i;
829
830 val = smsc911x_reg_read(pdata, HW_CFG);
831 val &= HW_CFG_TX_FIF_SZ_;
832 val |= HW_CFG_SF_;
833 smsc911x_reg_write(pdata, HW_CFG, val);
834
835 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
836 smsc911x_reg_write(pdata, RX_CFG,
837 (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8);
838
839 for (i = 0; i < 10; i++) {
840 /* Set PHY to 10/FD, no ANEG, and loopback mode */
841 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR,
842 BMCR_LOOPBACK | BMCR_FULLDPLX);
843
844 /* Enable MAC tx/rx, FD */
845 spin_lock_irqsave(&pdata->mac_lock, flags);
846 smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_
847 | MAC_CR_TXEN_ | MAC_CR_RXEN_);
848 spin_unlock_irqrestore(&pdata->mac_lock, flags);
849
850 if (smsc911x_phy_check_loopbackpkt(pdata) == 0) {
851 result = 0;
852 break;
853 }
854 pdata->resetcount++;
855
856 /* Disable MAC rx */
857 spin_lock_irqsave(&pdata->mac_lock, flags);
858 smsc911x_mac_write(pdata, MAC_CR, 0);
859 spin_unlock_irqrestore(&pdata->mac_lock, flags);
860
861 smsc911x_phy_reset(pdata);
862 }
863
864 /* Disable MAC */
865 spin_lock_irqsave(&pdata->mac_lock, flags);
866 smsc911x_mac_write(pdata, MAC_CR, 0);
867 spin_unlock_irqrestore(&pdata->mac_lock, flags);
868
869 /* Cancel PHY loopback mode */
870 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, 0);
871
872 smsc911x_reg_write(pdata, TX_CFG, 0);
873 smsc911x_reg_write(pdata, RX_CFG, 0);
874
875 return result;
876}
877#endif /* USE_PHY_WORK_AROUND */
878
879static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata)
880{
881 struct phy_device *phy_dev = pdata->phy_dev;
882 u32 afc = smsc911x_reg_read(pdata, AFC_CFG);
883 u32 flow;
884 unsigned long flags;
885
886 if (phy_dev->duplex == DUPLEX_FULL) {
887 u16 lcladv = phy_read(phy_dev, MII_ADVERTISE);
888 u16 rmtadv = phy_read(phy_dev, MII_LPA);
889 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
890
891 if (cap & FLOW_CTRL_RX)
892 flow = 0xFFFF0002;
893 else
894 flow = 0;
895
896 if (cap & FLOW_CTRL_TX)
897 afc |= 0xF;
898 else
899 afc &= ~0xF;
900
901 SMSC_TRACE(pdata, hw, "rx pause %s, tx pause %s",
902 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
903 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
904 } else {
905 SMSC_TRACE(pdata, hw, "half duplex");
906 flow = 0;
907 afc |= 0xF;
908 }
909
910 spin_lock_irqsave(&pdata->mac_lock, flags);
911 smsc911x_mac_write(pdata, FLOW, flow);
912 spin_unlock_irqrestore(&pdata->mac_lock, flags);
913
914 smsc911x_reg_write(pdata, AFC_CFG, afc);
915}
916
917/* Update link mode if anything has changed. Called periodically when the
918 * PHY is in polling mode, even if nothing has changed. */
919static void smsc911x_phy_adjust_link(struct net_device *dev)
920{
921 struct smsc911x_data *pdata = netdev_priv(dev);
922 struct phy_device *phy_dev = pdata->phy_dev;
923 unsigned long flags;
924 int carrier;
925
926 if (phy_dev->duplex != pdata->last_duplex) {
927 unsigned int mac_cr;
928 SMSC_TRACE(pdata, hw, "duplex state has changed");
929
930 spin_lock_irqsave(&pdata->mac_lock, flags);
931 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
932 if (phy_dev->duplex) {
933 SMSC_TRACE(pdata, hw,
934 "configuring for full duplex mode");
935 mac_cr |= MAC_CR_FDPX_;
936 } else {
937 SMSC_TRACE(pdata, hw,
938 "configuring for half duplex mode");
939 mac_cr &= ~MAC_CR_FDPX_;
940 }
941 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
942 spin_unlock_irqrestore(&pdata->mac_lock, flags);
943
944 smsc911x_phy_update_flowcontrol(pdata);
945 pdata->last_duplex = phy_dev->duplex;
946 }
947
948 carrier = netif_carrier_ok(dev);
949 if (carrier != pdata->last_carrier) {
950 SMSC_TRACE(pdata, hw, "carrier state has changed");
951 if (carrier) {
952 SMSC_TRACE(pdata, hw, "configuring for carrier OK");
953 if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) &&
954 (!pdata->using_extphy)) {
955 /* Restore original GPIO configuration */
956 pdata->gpio_setting = pdata->gpio_orig_setting;
957 smsc911x_reg_write(pdata, GPIO_CFG,
958 pdata->gpio_setting);
959 }
960 } else {
961 SMSC_TRACE(pdata, hw, "configuring for no carrier");
962 /* Check global setting that LED1
963 * usage is 10/100 indicator */
964 pdata->gpio_setting = smsc911x_reg_read(pdata,
965 GPIO_CFG);
966 if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_) &&
967 (!pdata->using_extphy)) {
968 /* Force 10/100 LED off, after saving
969 * original GPIO configuration */
970 pdata->gpio_orig_setting = pdata->gpio_setting;
971
972 pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_;
973 pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_
974 | GPIO_CFG_GPIODIR0_
975 | GPIO_CFG_GPIOD0_);
976 smsc911x_reg_write(pdata, GPIO_CFG,
977 pdata->gpio_setting);
978 }
979 }
980 pdata->last_carrier = carrier;
981 }
982}
983
984static int smsc911x_mii_probe(struct net_device *dev)
985{
986 struct smsc911x_data *pdata = netdev_priv(dev);
987 struct phy_device *phydev = NULL;
988 int ret;
989
990 /* find the first phy */
991 phydev = phy_find_first(pdata->mii_bus);
992 if (!phydev) {
993 netdev_err(dev, "no PHY found\n");
994 return -ENODEV;
995 }
996
997 SMSC_TRACE(pdata, probe, "PHY: addr %d, phy_id 0x%08X",
998 phydev->addr, phydev->phy_id);
999
1000 ret = phy_connect_direct(dev, phydev,
1001 &smsc911x_phy_adjust_link, 0,
1002 pdata->config.phy_interface);
1003
1004 if (ret) {
1005 netdev_err(dev, "Could not attach to PHY\n");
1006 return ret;
1007 }
1008
1009 netdev_info(dev,
1010 "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
1011 phydev->drv->name, dev_name(&phydev->dev), phydev->irq);
1012
1013 /* mask with MAC supported features */
1014 phydev->supported &= (PHY_BASIC_FEATURES | SUPPORTED_Pause |
1015 SUPPORTED_Asym_Pause);
1016 phydev->advertising = phydev->supported;
1017
1018 pdata->phy_dev = phydev;
1019 pdata->last_duplex = -1;
1020 pdata->last_carrier = -1;
1021
1022#ifdef USE_PHY_WORK_AROUND
1023 if (smsc911x_phy_loopbacktest(dev) < 0) {
1024 SMSC_WARN(pdata, hw, "Failed Loop Back Test");
1025 return -ENODEV;
1026 }
1027 SMSC_TRACE(pdata, hw, "Passed Loop Back Test");
1028#endif /* USE_PHY_WORK_AROUND */
1029
1030 SMSC_TRACE(pdata, hw, "phy initialised successfully");
1031 return 0;
1032}
1033
1034static int __devinit smsc911x_mii_init(struct platform_device *pdev,
1035 struct net_device *dev)
1036{
1037 struct smsc911x_data *pdata = netdev_priv(dev);
1038 int err = -ENXIO, i;
1039
1040 pdata->mii_bus = mdiobus_alloc();
1041 if (!pdata->mii_bus) {
1042 err = -ENOMEM;
1043 goto err_out_1;
1044 }
1045
1046 pdata->mii_bus->name = SMSC_MDIONAME;
1047 snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
1048 pdev->name, pdev->id);
1049 pdata->mii_bus->priv = pdata;
1050 pdata->mii_bus->read = smsc911x_mii_read;
1051 pdata->mii_bus->write = smsc911x_mii_write;
1052 pdata->mii_bus->irq = pdata->phy_irq;
1053 for (i = 0; i < PHY_MAX_ADDR; ++i)
1054 pdata->mii_bus->irq[i] = PHY_POLL;
1055
1056 pdata->mii_bus->parent = &pdev->dev;
1057
1058 switch (pdata->idrev & 0xFFFF0000) {
1059 case 0x01170000:
1060 case 0x01150000:
1061 case 0x117A0000:
1062 case 0x115A0000:
1063 /* External PHY supported, try to autodetect */
1064 smsc911x_phy_initialise_external(pdata);
1065 break;
1066 default:
1067 SMSC_TRACE(pdata, hw, "External PHY is not supported, "
1068 "using internal PHY");
1069 pdata->using_extphy = 0;
1070 break;
1071 }
1072
1073 if (!pdata->using_extphy) {
1074 /* Mask all PHYs except ID 1 (internal) */
1075 pdata->mii_bus->phy_mask = ~(1 << 1);
1076 }
1077
1078 if (mdiobus_register(pdata->mii_bus)) {
1079 SMSC_WARN(pdata, probe, "Error registering mii bus");
1080 goto err_out_free_bus_2;
1081 }
1082
1083 if (smsc911x_mii_probe(dev) < 0) {
1084 SMSC_WARN(pdata, probe, "Error registering mii bus");
1085 goto err_out_unregister_bus_3;
1086 }
1087
1088 return 0;
1089
1090err_out_unregister_bus_3:
1091 mdiobus_unregister(pdata->mii_bus);
1092err_out_free_bus_2:
1093 mdiobus_free(pdata->mii_bus);
1094err_out_1:
1095 return err;
1096}
1097
1098/* Gets the number of tx statuses in the fifo */
1099static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata)
1100{
1101 return (smsc911x_reg_read(pdata, TX_FIFO_INF)
1102 & TX_FIFO_INF_TSUSED_) >> 16;
1103}
1104
1105/* Reads tx statuses and increments counters where necessary */
1106static void smsc911x_tx_update_txcounters(struct net_device *dev)
1107{
1108 struct smsc911x_data *pdata = netdev_priv(dev);
1109 unsigned int tx_stat;
1110
1111 while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) {
1112 if (unlikely(tx_stat & 0x80000000)) {
1113 /* In this driver the packet tag is used as the packet
1114 * length. Since a packet length can never reach the
1115 * size of 0x8000, this bit is reserved. It is worth
1116 * noting that the "reserved bit" in the warning above
1117 * does not reference a hardware defined reserved bit
1118 * but rather a driver defined one.
1119 */
1120 SMSC_WARN(pdata, hw, "Packet tag reserved bit is high");
1121 } else {
1122 if (unlikely(tx_stat & TX_STS_ES_)) {
1123 dev->stats.tx_errors++;
1124 } else {
1125 dev->stats.tx_packets++;
1126 dev->stats.tx_bytes += (tx_stat >> 16);
1127 }
1128 if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) {
1129 dev->stats.collisions += 16;
1130 dev->stats.tx_aborted_errors += 1;
1131 } else {
1132 dev->stats.collisions +=
1133 ((tx_stat >> 3) & 0xF);
1134 }
1135 if (unlikely(tx_stat & TX_STS_LOST_CARRIER_))
1136 dev->stats.tx_carrier_errors += 1;
1137 if (unlikely(tx_stat & TX_STS_LATE_COL_)) {
1138 dev->stats.collisions++;
1139 dev->stats.tx_aborted_errors++;
1140 }
1141 }
1142 }
1143}
1144
1145/* Increments the Rx error counters */
1146static void
1147smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat)
1148{
1149 int crc_err = 0;
1150
1151 if (unlikely(rxstat & RX_STS_ES_)) {
1152 dev->stats.rx_errors++;
1153 if (unlikely(rxstat & RX_STS_CRC_ERR_)) {
1154 dev->stats.rx_crc_errors++;
1155 crc_err = 1;
1156 }
1157 }
1158 if (likely(!crc_err)) {
1159 if (unlikely((rxstat & RX_STS_FRAME_TYPE_) &&
1160 (rxstat & RX_STS_LENGTH_ERR_)))
1161 dev->stats.rx_length_errors++;
1162 if (rxstat & RX_STS_MCAST_)
1163 dev->stats.multicast++;
1164 }
1165}
1166
1167/* Quickly dumps bad packets */
1168static void
1169smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktwords)
1170{
1171 if (likely(pktwords >= 4)) {
1172 unsigned int timeout = 500;
1173 unsigned int val;
1174 smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_);
1175 do {
1176 udelay(1);
1177 val = smsc911x_reg_read(pdata, RX_DP_CTRL);
1178 } while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout);
1179
1180 if (unlikely(timeout == 0))
1181 SMSC_WARN(pdata, hw, "Timed out waiting for "
1182 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val);
1183 } else {
1184 unsigned int temp;
1185 while (pktwords--)
1186 temp = smsc911x_reg_read(pdata, RX_DATA_FIFO);
1187 }
1188}
1189
1190/* NAPI poll function */
1191static int smsc911x_poll(struct napi_struct *napi, int budget)
1192{
1193 struct smsc911x_data *pdata =
1194 container_of(napi, struct smsc911x_data, napi);
1195 struct net_device *dev = pdata->dev;
1196 int npackets = 0;
1197
1198 while (npackets < budget) {
1199 unsigned int pktlength;
1200 unsigned int pktwords;
1201 struct sk_buff *skb;
1202 unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata);
1203
1204 if (!rxstat) {
1205 unsigned int temp;
1206 /* We processed all packets available. Tell NAPI it can
1207 * stop polling then re-enable rx interrupts */
1208 smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_);
1209 napi_complete(napi);
1210 temp = smsc911x_reg_read(pdata, INT_EN);
1211 temp |= INT_EN_RSFL_EN_;
1212 smsc911x_reg_write(pdata, INT_EN, temp);
1213 break;
1214 }
1215
1216 /* Count packet for NAPI scheduling, even if it has an error.
1217 * Error packets still require cycles to discard */
1218 npackets++;
1219
1220 pktlength = ((rxstat & 0x3FFF0000) >> 16);
1221 pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2;
1222 smsc911x_rx_counterrors(dev, rxstat);
1223
1224 if (unlikely(rxstat & RX_STS_ES_)) {
1225 SMSC_WARN(pdata, rx_err,
1226 "Discarding packet with error bit set");
1227 /* Packet has an error, discard it and continue with
1228 * the next */
1229 smsc911x_rx_fastforward(pdata, pktwords);
1230 dev->stats.rx_dropped++;
1231 continue;
1232 }
1233
1234 skb = netdev_alloc_skb(dev, pktwords << 2);
1235 if (unlikely(!skb)) {
1236 SMSC_WARN(pdata, rx_err,
1237 "Unable to allocate skb for rx packet");
1238 /* Drop the packet and stop this polling iteration */
1239 smsc911x_rx_fastforward(pdata, pktwords);
1240 dev->stats.rx_dropped++;
1241 break;
1242 }
1243
1244 pdata->ops->rx_readfifo(pdata,
1245 (unsigned int *)skb->data, pktwords);
1246
1247 /* Align IP on 16B boundary */
1248 skb_reserve(skb, NET_IP_ALIGN);
1249 skb_put(skb, pktlength - 4);
1250 skb->protocol = eth_type_trans(skb, dev);
1251 skb_checksum_none_assert(skb);
1252 netif_receive_skb(skb);
1253
1254 /* Update counters */
1255 dev->stats.rx_packets++;
1256 dev->stats.rx_bytes += (pktlength - 4);
1257 }
1258
1259 /* Return total received packets */
1260 return npackets;
1261}
1262
1263/* Returns hash bit number for given MAC address
1264 * Example:
1265 * 01 00 5E 00 00 01 -> returns bit number 31 */
1266static unsigned int smsc911x_hash(char addr[ETH_ALEN])
1267{
1268 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
1269}
1270
1271static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata)
1272{
1273 /* Performs the multicast & mac_cr update. This is called when
1274 * safe on the current hardware, and with the mac_lock held */
1275 unsigned int mac_cr;
1276
1277 SMSC_ASSERT_MAC_LOCK(pdata);
1278
1279 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1280 mac_cr |= pdata->set_bits_mask;
1281 mac_cr &= ~(pdata->clear_bits_mask);
1282 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1283 smsc911x_mac_write(pdata, HASHH, pdata->hashhi);
1284 smsc911x_mac_write(pdata, HASHL, pdata->hashlo);
1285 SMSC_TRACE(pdata, hw, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1286 mac_cr, pdata->hashhi, pdata->hashlo);
1287}
1288
1289static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata)
1290{
1291 unsigned int mac_cr;
1292
1293 /* This function is only called for older LAN911x devices
1294 * (revA or revB), where MAC_CR, HASHH and HASHL should not
1295 * be modified during Rx - newer devices immediately update the
1296 * registers.
1297 *
1298 * This is called from interrupt context */
1299
1300 spin_lock(&pdata->mac_lock);
1301
1302 /* Check Rx has stopped */
1303 if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_)
1304 SMSC_WARN(pdata, drv, "Rx not stopped");
1305
1306 /* Perform the update - safe to do now Rx has stopped */
1307 smsc911x_rx_multicast_update(pdata);
1308
1309 /* Re-enable Rx */
1310 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1311 mac_cr |= MAC_CR_RXEN_;
1312 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1313
1314 pdata->multicast_update_pending = 0;
1315
1316 spin_unlock(&pdata->mac_lock);
1317}
1318
1319static int smsc911x_phy_disable_energy_detect(struct smsc911x_data *pdata)
1320{
1321 int rc = 0;
1322
1323 if (!pdata->phy_dev)
1324 return rc;
1325
1326 rc = phy_read(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS);
1327
1328 if (rc < 0) {
1329 SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1330 return rc;
1331 }
1332
1333 /*
1334 * If energy is detected the PHY is already awake so is not necessary
1335 * to disable the energy detect power-down mode.
1336 */
1337 if ((rc & MII_LAN83C185_EDPWRDOWN) &&
1338 !(rc & MII_LAN83C185_ENERGYON)) {
1339 /* Disable energy detect mode for this SMSC Transceivers */
1340 rc = phy_write(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS,
1341 rc & (~MII_LAN83C185_EDPWRDOWN));
1342
1343 if (rc < 0) {
1344 SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1345 return rc;
1346 }
1347
1348 mdelay(1);
1349 }
1350
1351 return 0;
1352}
1353
1354static int smsc911x_phy_enable_energy_detect(struct smsc911x_data *pdata)
1355{
1356 int rc = 0;
1357
1358 if (!pdata->phy_dev)
1359 return rc;
1360
1361 rc = phy_read(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS);
1362
1363 if (rc < 0) {
1364 SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1365 return rc;
1366 }
1367
1368 /* Only enable if energy detect mode is already disabled */
1369 if (!(rc & MII_LAN83C185_EDPWRDOWN)) {
1370 mdelay(100);
1371 /* Enable energy detect mode for this SMSC Transceivers */
1372 rc = phy_write(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS,
1373 rc | MII_LAN83C185_EDPWRDOWN);
1374
1375 if (rc < 0) {
1376 SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1377 return rc;
1378 }
1379
1380 mdelay(1);
1381 }
1382 return 0;
1383}
1384
1385static int smsc911x_soft_reset(struct smsc911x_data *pdata)
1386{
1387 unsigned int timeout;
1388 unsigned int temp;
1389 int ret;
1390
1391 /*
1392 * LAN9210/LAN9211/LAN9220/LAN9221 chips have an internal PHY that
1393 * are initialized in a Energy Detect Power-Down mode that prevents
1394 * the MAC chip to be software reseted. So we have to wakeup the PHY
1395 * before.
1396 */
1397 if (pdata->generation == 4) {
1398 ret = smsc911x_phy_disable_energy_detect(pdata);
1399
1400 if (ret) {
1401 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
1402 return ret;
1403 }
1404 }
1405
1406 /* Reset the LAN911x */
1407 smsc911x_reg_write(pdata, HW_CFG, HW_CFG_SRST_);
1408 timeout = 10;
1409 do {
1410 udelay(10);
1411 temp = smsc911x_reg_read(pdata, HW_CFG);
1412 } while ((--timeout) && (temp & HW_CFG_SRST_));
1413
1414 if (unlikely(temp & HW_CFG_SRST_)) {
1415 SMSC_WARN(pdata, drv, "Failed to complete reset");
1416 return -EIO;
1417 }
1418
1419 if (pdata->generation == 4) {
1420 ret = smsc911x_phy_enable_energy_detect(pdata);
1421
1422 if (ret) {
1423 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
1424 return ret;
1425 }
1426 }
1427
1428 return 0;
1429}
1430
1431/* Sets the device MAC address to dev_addr, called with mac_lock held */
1432static void
1433smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, u8 dev_addr[6])
1434{
1435 u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4];
1436 u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
1437 (dev_addr[1] << 8) | dev_addr[0];
1438
1439 SMSC_ASSERT_MAC_LOCK(pdata);
1440
1441 smsc911x_mac_write(pdata, ADDRH, mac_high16);
1442 smsc911x_mac_write(pdata, ADDRL, mac_low32);
1443}
1444
1445static int smsc911x_open(struct net_device *dev)
1446{
1447 struct smsc911x_data *pdata = netdev_priv(dev);
1448 unsigned int timeout;
1449 unsigned int temp;
1450 unsigned int intcfg;
1451
1452 /* if the phy is not yet registered, retry later*/
1453 if (!pdata->phy_dev) {
1454 SMSC_WARN(pdata, hw, "phy_dev is NULL");
1455 return -EAGAIN;
1456 }
1457
1458 if (!is_valid_ether_addr(dev->dev_addr)) {
1459 SMSC_WARN(pdata, hw, "dev_addr is not a valid MAC address");
1460 return -EADDRNOTAVAIL;
1461 }
1462
1463 /* Reset the LAN911x */
1464 if (smsc911x_soft_reset(pdata)) {
1465 SMSC_WARN(pdata, hw, "soft reset failed");
1466 return -EIO;
1467 }
1468
1469 smsc911x_reg_write(pdata, HW_CFG, 0x00050000);
1470 smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740);
1471
1472 /* Increase the legal frame size of VLAN tagged frames to 1522 bytes */
1473 spin_lock_irq(&pdata->mac_lock);
1474 smsc911x_mac_write(pdata, VLAN1, ETH_P_8021Q);
1475 spin_unlock_irq(&pdata->mac_lock);
1476
1477 /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1478 timeout = 50;
1479 while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) &&
1480 --timeout) {
1481 udelay(10);
1482 }
1483
1484 if (unlikely(timeout == 0))
1485 SMSC_WARN(pdata, ifup,
1486 "Timed out waiting for EEPROM busy bit to clear");
1487
1488 smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
1489
1490 /* The soft reset above cleared the device's MAC address,
1491 * restore it from local copy (set in probe) */
1492 spin_lock_irq(&pdata->mac_lock);
1493 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1494 spin_unlock_irq(&pdata->mac_lock);
1495
1496 /* Initialise irqs, but leave all sources disabled */
1497 smsc911x_reg_write(pdata, INT_EN, 0);
1498 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
1499
1500 /* Set interrupt deassertion to 100uS */
1501 intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
1502
1503 if (pdata->config.irq_polarity) {
1504 SMSC_TRACE(pdata, ifup, "irq polarity: active high");
1505 intcfg |= INT_CFG_IRQ_POL_;
1506 } else {
1507 SMSC_TRACE(pdata, ifup, "irq polarity: active low");
1508 }
1509
1510 if (pdata->config.irq_type) {
1511 SMSC_TRACE(pdata, ifup, "irq type: push-pull");
1512 intcfg |= INT_CFG_IRQ_TYPE_;
1513 } else {
1514 SMSC_TRACE(pdata, ifup, "irq type: open drain");
1515 }
1516
1517 smsc911x_reg_write(pdata, INT_CFG, intcfg);
1518
1519 SMSC_TRACE(pdata, ifup, "Testing irq handler using IRQ %d", dev->irq);
1520 pdata->software_irq_signal = 0;
1521 smp_wmb();
1522
1523 temp = smsc911x_reg_read(pdata, INT_EN);
1524 temp |= INT_EN_SW_INT_EN_;
1525 smsc911x_reg_write(pdata, INT_EN, temp);
1526
1527 timeout = 1000;
1528 while (timeout--) {
1529 if (pdata->software_irq_signal)
1530 break;
1531 msleep(1);
1532 }
1533
1534 if (!pdata->software_irq_signal) {
1535 netdev_warn(dev, "ISR failed signaling test (IRQ %d)\n",
1536 dev->irq);
1537 return -ENODEV;
1538 }
1539 SMSC_TRACE(pdata, ifup, "IRQ handler passed test using IRQ %d",
1540 dev->irq);
1541
1542 netdev_info(dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1543 (unsigned long)pdata->ioaddr, dev->irq);
1544
1545 /* Reset the last known duplex and carrier */
1546 pdata->last_duplex = -1;
1547 pdata->last_carrier = -1;
1548
1549 /* Bring the PHY up */
1550 phy_start(pdata->phy_dev);
1551
1552 temp = smsc911x_reg_read(pdata, HW_CFG);
1553 /* Preserve TX FIFO size and external PHY configuration */
1554 temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF);
1555 temp |= HW_CFG_SF_;
1556 smsc911x_reg_write(pdata, HW_CFG, temp);
1557
1558 temp = smsc911x_reg_read(pdata, FIFO_INT);
1559 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1560 temp &= ~(FIFO_INT_RX_STS_LEVEL_);
1561 smsc911x_reg_write(pdata, FIFO_INT, temp);
1562
1563 /* set RX Data offset to 2 bytes for alignment */
1564 smsc911x_reg_write(pdata, RX_CFG, (NET_IP_ALIGN << 8));
1565
1566 /* enable NAPI polling before enabling RX interrupts */
1567 napi_enable(&pdata->napi);
1568
1569 temp = smsc911x_reg_read(pdata, INT_EN);
1570 temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_);
1571 smsc911x_reg_write(pdata, INT_EN, temp);
1572
1573 spin_lock_irq(&pdata->mac_lock);
1574 temp = smsc911x_mac_read(pdata, MAC_CR);
1575 temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
1576 smsc911x_mac_write(pdata, MAC_CR, temp);
1577 spin_unlock_irq(&pdata->mac_lock);
1578
1579 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
1580
1581 netif_start_queue(dev);
1582 return 0;
1583}
1584
1585/* Entry point for stopping the interface */
1586static int smsc911x_stop(struct net_device *dev)
1587{
1588 struct smsc911x_data *pdata = netdev_priv(dev);
1589 unsigned int temp;
1590
1591 /* Disable all device interrupts */
1592 temp = smsc911x_reg_read(pdata, INT_CFG);
1593 temp &= ~INT_CFG_IRQ_EN_;
1594 smsc911x_reg_write(pdata, INT_CFG, temp);
1595
1596 /* Stop Tx and Rx polling */
1597 netif_stop_queue(dev);
1598 napi_disable(&pdata->napi);
1599
1600 /* At this point all Rx and Tx activity is stopped */
1601 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1602 smsc911x_tx_update_txcounters(dev);
1603
1604 /* Bring the PHY down */
1605 if (pdata->phy_dev)
1606 phy_stop(pdata->phy_dev);
1607
1608 SMSC_TRACE(pdata, ifdown, "Interface stopped");
1609 return 0;
1610}
1611
1612/* Entry point for transmitting a packet */
1613static int smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1614{
1615 struct smsc911x_data *pdata = netdev_priv(dev);
1616 unsigned int freespace;
1617 unsigned int tx_cmd_a;
1618 unsigned int tx_cmd_b;
1619 unsigned int temp;
1620 u32 wrsz;
1621 ulong bufp;
1622
1623 freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_;
1624
1625 if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD))
1626 SMSC_WARN(pdata, tx_err,
1627 "Tx data fifo low, space available: %d", freespace);
1628
1629 /* Word alignment adjustment */
1630 tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16;
1631 tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
1632 tx_cmd_a |= (unsigned int)skb->len;
1633
1634 tx_cmd_b = ((unsigned int)skb->len) << 16;
1635 tx_cmd_b |= (unsigned int)skb->len;
1636
1637 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a);
1638 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b);
1639
1640 bufp = (ulong)skb->data & (~0x3);
1641 wrsz = (u32)skb->len + 3;
1642 wrsz += (u32)((ulong)skb->data & 0x3);
1643 wrsz >>= 2;
1644
1645 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
1646 freespace -= (skb->len + 32);
1647 skb_tx_timestamp(skb);
1648 dev_kfree_skb(skb);
1649
1650 if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30))
1651 smsc911x_tx_update_txcounters(dev);
1652
1653 if (freespace < TX_FIFO_LOW_THRESHOLD) {
1654 netif_stop_queue(dev);
1655 temp = smsc911x_reg_read(pdata, FIFO_INT);
1656 temp &= 0x00FFFFFF;
1657 temp |= 0x32000000;
1658 smsc911x_reg_write(pdata, FIFO_INT, temp);
1659 }
1660
1661 return NETDEV_TX_OK;
1662}
1663
1664/* Entry point for getting status counters */
1665static struct net_device_stats *smsc911x_get_stats(struct net_device *dev)
1666{
1667 struct smsc911x_data *pdata = netdev_priv(dev);
1668 smsc911x_tx_update_txcounters(dev);
1669 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1670 return &dev->stats;
1671}
1672
1673/* Entry point for setting addressing modes */
1674static void smsc911x_set_multicast_list(struct net_device *dev)
1675{
1676 struct smsc911x_data *pdata = netdev_priv(dev);
1677 unsigned long flags;
1678
1679 if (dev->flags & IFF_PROMISC) {
1680 /* Enabling promiscuous mode */
1681 pdata->set_bits_mask = MAC_CR_PRMS_;
1682 pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1683 pdata->hashhi = 0;
1684 pdata->hashlo = 0;
1685 } else if (dev->flags & IFF_ALLMULTI) {
1686 /* Enabling all multicast mode */
1687 pdata->set_bits_mask = MAC_CR_MCPAS_;
1688 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_);
1689 pdata->hashhi = 0;
1690 pdata->hashlo = 0;
1691 } else if (!netdev_mc_empty(dev)) {
1692 /* Enabling specific multicast addresses */
1693 unsigned int hash_high = 0;
1694 unsigned int hash_low = 0;
1695 struct netdev_hw_addr *ha;
1696
1697 pdata->set_bits_mask = MAC_CR_HPFILT_;
1698 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1699
1700 netdev_for_each_mc_addr(ha, dev) {
1701 unsigned int bitnum = smsc911x_hash(ha->addr);
1702 unsigned int mask = 0x01 << (bitnum & 0x1F);
1703
1704 if (bitnum & 0x20)
1705 hash_high |= mask;
1706 else
1707 hash_low |= mask;
1708 }
1709
1710 pdata->hashhi = hash_high;
1711 pdata->hashlo = hash_low;
1712 } else {
1713 /* Enabling local MAC address only */
1714 pdata->set_bits_mask = 0;
1715 pdata->clear_bits_mask =
1716 (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1717 pdata->hashhi = 0;
1718 pdata->hashlo = 0;
1719 }
1720
1721 spin_lock_irqsave(&pdata->mac_lock, flags);
1722
1723 if (pdata->generation <= 1) {
1724 /* Older hardware revision - cannot change these flags while
1725 * receiving data */
1726 if (!pdata->multicast_update_pending) {
1727 unsigned int temp;
1728 SMSC_TRACE(pdata, hw, "scheduling mcast update");
1729 pdata->multicast_update_pending = 1;
1730
1731 /* Request the hardware to stop, then perform the
1732 * update when we get an RX_STOP interrupt */
1733 temp = smsc911x_mac_read(pdata, MAC_CR);
1734 temp &= ~(MAC_CR_RXEN_);
1735 smsc911x_mac_write(pdata, MAC_CR, temp);
1736 } else {
1737 /* There is another update pending, this should now
1738 * use the newer values */
1739 }
1740 } else {
1741 /* Newer hardware revision - can write immediately */
1742 smsc911x_rx_multicast_update(pdata);
1743 }
1744
1745 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1746}
1747
1748static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id)
1749{
1750 struct net_device *dev = dev_id;
1751 struct smsc911x_data *pdata = netdev_priv(dev);
1752 u32 intsts = smsc911x_reg_read(pdata, INT_STS);
1753 u32 inten = smsc911x_reg_read(pdata, INT_EN);
1754 int serviced = IRQ_NONE;
1755 u32 temp;
1756
1757 if (unlikely(intsts & inten & INT_STS_SW_INT_)) {
1758 temp = smsc911x_reg_read(pdata, INT_EN);
1759 temp &= (~INT_EN_SW_INT_EN_);
1760 smsc911x_reg_write(pdata, INT_EN, temp);
1761 smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_);
1762 pdata->software_irq_signal = 1;
1763 smp_wmb();
1764 serviced = IRQ_HANDLED;
1765 }
1766
1767 if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) {
1768 /* Called when there is a multicast update scheduled and
1769 * it is now safe to complete the update */
1770 SMSC_TRACE(pdata, intr, "RX Stop interrupt");
1771 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_);
1772 if (pdata->multicast_update_pending)
1773 smsc911x_rx_multicast_update_workaround(pdata);
1774 serviced = IRQ_HANDLED;
1775 }
1776
1777 if (intsts & inten & INT_STS_TDFA_) {
1778 temp = smsc911x_reg_read(pdata, FIFO_INT);
1779 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1780 smsc911x_reg_write(pdata, FIFO_INT, temp);
1781 smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_);
1782 netif_wake_queue(dev);
1783 serviced = IRQ_HANDLED;
1784 }
1785
1786 if (unlikely(intsts & inten & INT_STS_RXE_)) {
1787 SMSC_TRACE(pdata, intr, "RX Error interrupt");
1788 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_);
1789 serviced = IRQ_HANDLED;
1790 }
1791
1792 if (likely(intsts & inten & INT_STS_RSFL_)) {
1793 if (likely(napi_schedule_prep(&pdata->napi))) {
1794 /* Disable Rx interrupts */
1795 temp = smsc911x_reg_read(pdata, INT_EN);
1796 temp &= (~INT_EN_RSFL_EN_);
1797 smsc911x_reg_write(pdata, INT_EN, temp);
1798 /* Schedule a NAPI poll */
1799 __napi_schedule(&pdata->napi);
1800 } else {
1801 SMSC_WARN(pdata, rx_err, "napi_schedule_prep failed");
1802 }
1803 serviced = IRQ_HANDLED;
1804 }
1805
1806 return serviced;
1807}
1808
1809#ifdef CONFIG_NET_POLL_CONTROLLER
1810static void smsc911x_poll_controller(struct net_device *dev)
1811{
1812 disable_irq(dev->irq);
1813 smsc911x_irqhandler(0, dev);
1814 enable_irq(dev->irq);
1815}
1816#endif /* CONFIG_NET_POLL_CONTROLLER */
1817
1818static int smsc911x_set_mac_address(struct net_device *dev, void *p)
1819{
1820 struct smsc911x_data *pdata = netdev_priv(dev);
1821 struct sockaddr *addr = p;
1822
1823 /* On older hardware revisions we cannot change the mac address
1824 * registers while receiving data. Newer devices can safely change
1825 * this at any time. */
1826 if (pdata->generation <= 1 && netif_running(dev))
1827 return -EBUSY;
1828
1829 if (!is_valid_ether_addr(addr->sa_data))
1830 return -EADDRNOTAVAIL;
1831
1832 dev->addr_assign_type &= ~NET_ADDR_RANDOM;
1833 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
1834
1835 spin_lock_irq(&pdata->mac_lock);
1836 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1837 spin_unlock_irq(&pdata->mac_lock);
1838
1839 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
1840
1841 return 0;
1842}
1843
1844/* Standard ioctls for mii-tool */
1845static int smsc911x_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1846{
1847 struct smsc911x_data *pdata = netdev_priv(dev);
1848
1849 if (!netif_running(dev) || !pdata->phy_dev)
1850 return -EINVAL;
1851
1852 return phy_mii_ioctl(pdata->phy_dev, ifr, cmd);
1853}
1854
1855static int
1856smsc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1857{
1858 struct smsc911x_data *pdata = netdev_priv(dev);
1859
1860 cmd->maxtxpkt = 1;
1861 cmd->maxrxpkt = 1;
1862 return phy_ethtool_gset(pdata->phy_dev, cmd);
1863}
1864
1865static int
1866smsc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1867{
1868 struct smsc911x_data *pdata = netdev_priv(dev);
1869
1870 return phy_ethtool_sset(pdata->phy_dev, cmd);
1871}
1872
1873static void smsc911x_ethtool_getdrvinfo(struct net_device *dev,
1874 struct ethtool_drvinfo *info)
1875{
1876 strlcpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver));
1877 strlcpy(info->version, SMSC_DRV_VERSION, sizeof(info->version));
1878 strlcpy(info->bus_info, dev_name(dev->dev.parent),
1879 sizeof(info->bus_info));
1880}
1881
1882static int smsc911x_ethtool_nwayreset(struct net_device *dev)
1883{
1884 struct smsc911x_data *pdata = netdev_priv(dev);
1885
1886 return phy_start_aneg(pdata->phy_dev);
1887}
1888
1889static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev)
1890{
1891 struct smsc911x_data *pdata = netdev_priv(dev);
1892 return pdata->msg_enable;
1893}
1894
1895static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1896{
1897 struct smsc911x_data *pdata = netdev_priv(dev);
1898 pdata->msg_enable = level;
1899}
1900
1901static int smsc911x_ethtool_getregslen(struct net_device *dev)
1902{
1903 return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) *
1904 sizeof(u32);
1905}
1906
1907static void
1908smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs,
1909 void *buf)
1910{
1911 struct smsc911x_data *pdata = netdev_priv(dev);
1912 struct phy_device *phy_dev = pdata->phy_dev;
1913 unsigned long flags;
1914 unsigned int i;
1915 unsigned int j = 0;
1916 u32 *data = buf;
1917
1918 regs->version = pdata->idrev;
1919 for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32)))
1920 data[j++] = smsc911x_reg_read(pdata, i);
1921
1922 for (i = MAC_CR; i <= WUCSR; i++) {
1923 spin_lock_irqsave(&pdata->mac_lock, flags);
1924 data[j++] = smsc911x_mac_read(pdata, i);
1925 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1926 }
1927
1928 for (i = 0; i <= 31; i++)
1929 data[j++] = smsc911x_mii_read(phy_dev->bus, phy_dev->addr, i);
1930}
1931
1932static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata)
1933{
1934 unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG);
1935 temp &= ~GPIO_CFG_EEPR_EN_;
1936 smsc911x_reg_write(pdata, GPIO_CFG, temp);
1937 msleep(1);
1938}
1939
1940static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op)
1941{
1942 int timeout = 100;
1943 u32 e2cmd;
1944
1945 SMSC_TRACE(pdata, drv, "op 0x%08x", op);
1946 if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
1947 SMSC_WARN(pdata, drv, "Busy at start");
1948 return -EBUSY;
1949 }
1950
1951 e2cmd = op | E2P_CMD_EPC_BUSY_;
1952 smsc911x_reg_write(pdata, E2P_CMD, e2cmd);
1953
1954 do {
1955 msleep(1);
1956 e2cmd = smsc911x_reg_read(pdata, E2P_CMD);
1957 } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout));
1958
1959 if (!timeout) {
1960 SMSC_TRACE(pdata, drv, "TIMED OUT");
1961 return -EAGAIN;
1962 }
1963
1964 if (e2cmd & E2P_CMD_EPC_TIMEOUT_) {
1965 SMSC_TRACE(pdata, drv, "Error occurred during eeprom operation");
1966 return -EINVAL;
1967 }
1968
1969 return 0;
1970}
1971
1972static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata,
1973 u8 address, u8 *data)
1974{
1975 u32 op = E2P_CMD_EPC_CMD_READ_ | address;
1976 int ret;
1977
1978 SMSC_TRACE(pdata, drv, "address 0x%x", address);
1979 ret = smsc911x_eeprom_send_cmd(pdata, op);
1980
1981 if (!ret)
1982 data[address] = smsc911x_reg_read(pdata, E2P_DATA);
1983
1984 return ret;
1985}
1986
1987static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata,
1988 u8 address, u8 data)
1989{
1990 u32 op = E2P_CMD_EPC_CMD_ERASE_ | address;
1991 u32 temp;
1992 int ret;
1993
1994 SMSC_TRACE(pdata, drv, "address 0x%x, data 0x%x", address, data);
1995 ret = smsc911x_eeprom_send_cmd(pdata, op);
1996
1997 if (!ret) {
1998 op = E2P_CMD_EPC_CMD_WRITE_ | address;
1999 smsc911x_reg_write(pdata, E2P_DATA, (u32)data);
2000
2001 /* Workaround for hardware read-after-write restriction */
2002 temp = smsc911x_reg_read(pdata, BYTE_TEST);
2003
2004 ret = smsc911x_eeprom_send_cmd(pdata, op);
2005 }
2006
2007 return ret;
2008}
2009
2010static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev)
2011{
2012 return SMSC911X_EEPROM_SIZE;
2013}
2014
2015static int smsc911x_ethtool_get_eeprom(struct net_device *dev,
2016 struct ethtool_eeprom *eeprom, u8 *data)
2017{
2018 struct smsc911x_data *pdata = netdev_priv(dev);
2019 u8 eeprom_data[SMSC911X_EEPROM_SIZE];
2020 int len;
2021 int i;
2022
2023 smsc911x_eeprom_enable_access(pdata);
2024
2025 len = min(eeprom->len, SMSC911X_EEPROM_SIZE);
2026 for (i = 0; i < len; i++) {
2027 int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data);
2028 if (ret < 0) {
2029 eeprom->len = 0;
2030 return ret;
2031 }
2032 }
2033
2034 memcpy(data, &eeprom_data[eeprom->offset], len);
2035 eeprom->len = len;
2036 return 0;
2037}
2038
2039static int smsc911x_ethtool_set_eeprom(struct net_device *dev,
2040 struct ethtool_eeprom *eeprom, u8 *data)
2041{
2042 int ret;
2043 struct smsc911x_data *pdata = netdev_priv(dev);
2044
2045 smsc911x_eeprom_enable_access(pdata);
2046 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_);
2047 ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data);
2048 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_);
2049
2050 /* Single byte write, according to man page */
2051 eeprom->len = 1;
2052
2053 return ret;
2054}
2055
2056static const struct ethtool_ops smsc911x_ethtool_ops = {
2057 .get_settings = smsc911x_ethtool_getsettings,
2058 .set_settings = smsc911x_ethtool_setsettings,
2059 .get_link = ethtool_op_get_link,
2060 .get_drvinfo = smsc911x_ethtool_getdrvinfo,
2061 .nway_reset = smsc911x_ethtool_nwayreset,
2062 .get_msglevel = smsc911x_ethtool_getmsglevel,
2063 .set_msglevel = smsc911x_ethtool_setmsglevel,
2064 .get_regs_len = smsc911x_ethtool_getregslen,
2065 .get_regs = smsc911x_ethtool_getregs,
2066 .get_eeprom_len = smsc911x_ethtool_get_eeprom_len,
2067 .get_eeprom = smsc911x_ethtool_get_eeprom,
2068 .set_eeprom = smsc911x_ethtool_set_eeprom,
2069 .get_ts_info = ethtool_op_get_ts_info,
2070};
2071
2072static const struct net_device_ops smsc911x_netdev_ops = {
2073 .ndo_open = smsc911x_open,
2074 .ndo_stop = smsc911x_stop,
2075 .ndo_start_xmit = smsc911x_hard_start_xmit,
2076 .ndo_get_stats = smsc911x_get_stats,
2077 .ndo_set_rx_mode = smsc911x_set_multicast_list,
2078 .ndo_do_ioctl = smsc911x_do_ioctl,
2079 .ndo_change_mtu = eth_change_mtu,
2080 .ndo_validate_addr = eth_validate_addr,
2081 .ndo_set_mac_address = smsc911x_set_mac_address,
2082#ifdef CONFIG_NET_POLL_CONTROLLER
2083 .ndo_poll_controller = smsc911x_poll_controller,
2084#endif
2085};
2086
2087/* copies the current mac address from hardware to dev->dev_addr */
2088static void __devinit smsc911x_read_mac_address(struct net_device *dev)
2089{
2090 struct smsc911x_data *pdata = netdev_priv(dev);
2091 u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH);
2092 u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL);
2093
2094 dev->dev_addr[0] = (u8)(mac_low32);
2095 dev->dev_addr[1] = (u8)(mac_low32 >> 8);
2096 dev->dev_addr[2] = (u8)(mac_low32 >> 16);
2097 dev->dev_addr[3] = (u8)(mac_low32 >> 24);
2098 dev->dev_addr[4] = (u8)(mac_high16);
2099 dev->dev_addr[5] = (u8)(mac_high16 >> 8);
2100}
2101
2102/* Initializing private device structures, only called from probe */
2103static int __devinit smsc911x_init(struct net_device *dev)
2104{
2105 struct smsc911x_data *pdata = netdev_priv(dev);
2106 unsigned int byte_test;
2107 unsigned int to = 100;
2108
2109 SMSC_TRACE(pdata, probe, "Driver Parameters:");
2110 SMSC_TRACE(pdata, probe, "LAN base: 0x%08lX",
2111 (unsigned long)pdata->ioaddr);
2112 SMSC_TRACE(pdata, probe, "IRQ: %d", dev->irq);
2113 SMSC_TRACE(pdata, probe, "PHY will be autodetected.");
2114
2115 spin_lock_init(&pdata->dev_lock);
2116 spin_lock_init(&pdata->mac_lock);
2117
2118 if (pdata->ioaddr == 0) {
2119 SMSC_WARN(pdata, probe, "pdata->ioaddr: 0x00000000");
2120 return -ENODEV;
2121 }
2122
2123 /*
2124 * poll the READY bit in PMT_CTRL. Any other access to the device is
2125 * forbidden while this bit isn't set. Try for 100ms
2126 */
2127 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to)
2128 udelay(1000);
2129 if (to == 0) {
2130 pr_err("Device not READY in 100ms aborting\n");
2131 return -ENODEV;
2132 }
2133
2134 /* Check byte ordering */
2135 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2136 SMSC_TRACE(pdata, probe, "BYTE_TEST: 0x%08X", byte_test);
2137 if (byte_test == 0x43218765) {
2138 SMSC_TRACE(pdata, probe, "BYTE_TEST looks swapped, "
2139 "applying WORD_SWAP");
2140 smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff);
2141
2142 /* 1 dummy read of BYTE_TEST is needed after a write to
2143 * WORD_SWAP before its contents are valid */
2144 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2145
2146 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2147 }
2148
2149 if (byte_test != 0x87654321) {
2150 SMSC_WARN(pdata, drv, "BYTE_TEST: 0x%08X", byte_test);
2151 if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) {
2152 SMSC_WARN(pdata, probe,
2153 "top 16 bits equal to bottom 16 bits");
2154 SMSC_TRACE(pdata, probe,
2155 "This may mean the chip is set "
2156 "for 32 bit while the bus is reading 16 bit");
2157 }
2158 return -ENODEV;
2159 }
2160
2161 /* Default generation to zero (all workarounds apply) */
2162 pdata->generation = 0;
2163
2164 pdata->idrev = smsc911x_reg_read(pdata, ID_REV);
2165 switch (pdata->idrev & 0xFFFF0000) {
2166 case 0x01180000:
2167 case 0x01170000:
2168 case 0x01160000:
2169 case 0x01150000:
2170 case 0x218A0000:
2171 /* LAN911[5678] family */
2172 pdata->generation = pdata->idrev & 0x0000FFFF;
2173 break;
2174
2175 case 0x118A0000:
2176 case 0x117A0000:
2177 case 0x116A0000:
2178 case 0x115A0000:
2179 /* LAN921[5678] family */
2180 pdata->generation = 3;
2181 break;
2182
2183 case 0x92100000:
2184 case 0x92110000:
2185 case 0x92200000:
2186 case 0x92210000:
2187 /* LAN9210/LAN9211/LAN9220/LAN9221 */
2188 pdata->generation = 4;
2189 break;
2190
2191 default:
2192 SMSC_WARN(pdata, probe, "LAN911x not identified, idrev: 0x%08X",
2193 pdata->idrev);
2194 return -ENODEV;
2195 }
2196
2197 SMSC_TRACE(pdata, probe,
2198 "LAN911x identified, idrev: 0x%08X, generation: %d",
2199 pdata->idrev, pdata->generation);
2200
2201 if (pdata->generation == 0)
2202 SMSC_WARN(pdata, probe,
2203 "This driver is not intended for this chip revision");
2204
2205 /* workaround for platforms without an eeprom, where the mac address
2206 * is stored elsewhere and set by the bootloader. This saves the
2207 * mac address before resetting the device */
2208 if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS) {
2209 spin_lock_irq(&pdata->mac_lock);
2210 smsc911x_read_mac_address(dev);
2211 spin_unlock_irq(&pdata->mac_lock);
2212 }
2213
2214 /* Reset the LAN911x */
2215 if (smsc911x_soft_reset(pdata))
2216 return -ENODEV;
2217
2218 /* Disable all interrupt sources until we bring the device up */
2219 smsc911x_reg_write(pdata, INT_EN, 0);
2220
2221 ether_setup(dev);
2222 dev->flags |= IFF_MULTICAST;
2223 netif_napi_add(dev, &pdata->napi, smsc911x_poll, SMSC_NAPI_WEIGHT);
2224 dev->netdev_ops = &smsc911x_netdev_ops;
2225 dev->ethtool_ops = &smsc911x_ethtool_ops;
2226
2227 return 0;
2228}
2229
2230static int __devexit smsc911x_drv_remove(struct platform_device *pdev)
2231{
2232 struct net_device *dev;
2233 struct smsc911x_data *pdata;
2234 struct resource *res;
2235
2236 dev = platform_get_drvdata(pdev);
2237 BUG_ON(!dev);
2238 pdata = netdev_priv(dev);
2239 BUG_ON(!pdata);
2240 BUG_ON(!pdata->ioaddr);
2241 BUG_ON(!pdata->phy_dev);
2242
2243 SMSC_TRACE(pdata, ifdown, "Stopping driver");
2244
2245 phy_disconnect(pdata->phy_dev);
2246 pdata->phy_dev = NULL;
2247 mdiobus_unregister(pdata->mii_bus);
2248 mdiobus_free(pdata->mii_bus);
2249
2250 platform_set_drvdata(pdev, NULL);
2251 unregister_netdev(dev);
2252 free_irq(dev->irq, dev);
2253 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2254 "smsc911x-memory");
2255 if (!res)
2256 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2257
2258 release_mem_region(res->start, resource_size(res));
2259
2260 iounmap(pdata->ioaddr);
2261
2262 (void)smsc911x_disable_resources(pdev);
2263 smsc911x_free_resources(pdev);
2264
2265 free_netdev(dev);
2266
2267 return 0;
2268}
2269
2270/* standard register acces */
2271static const struct smsc911x_ops standard_smsc911x_ops = {
2272 .reg_read = __smsc911x_reg_read,
2273 .reg_write = __smsc911x_reg_write,
2274 .rx_readfifo = smsc911x_rx_readfifo,
2275 .tx_writefifo = smsc911x_tx_writefifo,
2276};
2277
2278/* shifted register access */
2279static const struct smsc911x_ops shifted_smsc911x_ops = {
2280 .reg_read = __smsc911x_reg_read_shift,
2281 .reg_write = __smsc911x_reg_write_shift,
2282 .rx_readfifo = smsc911x_rx_readfifo_shift,
2283 .tx_writefifo = smsc911x_tx_writefifo_shift,
2284};
2285
2286#ifdef CONFIG_OF
2287static int __devinit smsc911x_probe_config_dt(
2288 struct smsc911x_platform_config *config,
2289 struct device_node *np)
2290{
2291 const char *mac;
2292 u32 width = 0;
2293
2294 if (!np)
2295 return -ENODEV;
2296
2297 config->phy_interface = of_get_phy_mode(np);
2298
2299 mac = of_get_mac_address(np);
2300 if (mac)
2301 memcpy(config->mac, mac, ETH_ALEN);
2302
2303 of_property_read_u32(np, "reg-shift", &config->shift);
2304
2305 of_property_read_u32(np, "reg-io-width", &width);
2306 if (width == 4)
2307 config->flags |= SMSC911X_USE_32BIT;
2308 else
2309 config->flags |= SMSC911X_USE_16BIT;
2310
2311 if (of_get_property(np, "smsc,irq-active-high", NULL))
2312 config->irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH;
2313
2314 if (of_get_property(np, "smsc,irq-push-pull", NULL))
2315 config->irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL;
2316
2317 if (of_get_property(np, "smsc,force-internal-phy", NULL))
2318 config->flags |= SMSC911X_FORCE_INTERNAL_PHY;
2319
2320 if (of_get_property(np, "smsc,force-external-phy", NULL))
2321 config->flags |= SMSC911X_FORCE_EXTERNAL_PHY;
2322
2323 if (of_get_property(np, "smsc,save-mac-address", NULL))
2324 config->flags |= SMSC911X_SAVE_MAC_ADDRESS;
2325
2326 return 0;
2327}
2328#else
2329static inline int smsc911x_probe_config_dt(
2330 struct smsc911x_platform_config *config,
2331 struct device_node *np)
2332{
2333 return -ENODEV;
2334}
2335#endif /* CONFIG_OF */
2336
2337static int __devinit smsc911x_drv_probe(struct platform_device *pdev)
2338{
2339 struct device_node *np = pdev->dev.of_node;
2340 struct net_device *dev;
2341 struct smsc911x_data *pdata;
2342 struct smsc911x_platform_config *config = pdev->dev.platform_data;
2343 struct resource *res, *irq_res;
2344 unsigned int intcfg = 0;
2345 int res_size, irq_flags;
2346 int retval;
2347
2348 pr_info("Driver version %s\n", SMSC_DRV_VERSION);
2349
2350 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2351 "smsc911x-memory");
2352 if (!res)
2353 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2354 if (!res) {
2355 pr_warn("Could not allocate resource\n");
2356 retval = -ENODEV;
2357 goto out_0;
2358 }
2359 res_size = resource_size(res);
2360
2361 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
2362 if (!irq_res) {
2363 pr_warn("Could not allocate irq resource\n");
2364 retval = -ENODEV;
2365 goto out_0;
2366 }
2367
2368 if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) {
2369 retval = -EBUSY;
2370 goto out_0;
2371 }
2372
2373 dev = alloc_etherdev(sizeof(struct smsc911x_data));
2374 if (!dev) {
2375 retval = -ENOMEM;
2376 goto out_release_io_1;
2377 }
2378
2379 SET_NETDEV_DEV(dev, &pdev->dev);
2380
2381 pdata = netdev_priv(dev);
2382 dev->irq = irq_res->start;
2383 irq_flags = irq_res->flags & IRQF_TRIGGER_MASK;
2384 pdata->ioaddr = ioremap_nocache(res->start, res_size);
2385
2386 pdata->dev = dev;
2387 pdata->msg_enable = ((1 << debug) - 1);
2388
2389 platform_set_drvdata(pdev, dev);
2390
2391 retval = smsc911x_request_resources(pdev);
2392 if (retval)
2393 goto out_request_resources_fail;
2394
2395 retval = smsc911x_enable_resources(pdev);
2396 if (retval)
2397 goto out_enable_resources_fail;
2398
2399 if (pdata->ioaddr == NULL) {
2400 SMSC_WARN(pdata, probe, "Error smsc911x base address invalid");
2401 retval = -ENOMEM;
2402 goto out_disable_resources;
2403 }
2404
2405 retval = smsc911x_probe_config_dt(&pdata->config, np);
2406 if (retval && config) {
2407 /* copy config parameters across to pdata */
2408 memcpy(&pdata->config, config, sizeof(pdata->config));
2409 retval = 0;
2410 }
2411
2412 if (retval) {
2413 SMSC_WARN(pdata, probe, "Error smsc911x config not found");
2414 goto out_disable_resources;
2415 }
2416
2417 /* assume standard, non-shifted, access to HW registers */
2418 pdata->ops = &standard_smsc911x_ops;
2419 /* apply the right access if shifting is needed */
2420 if (pdata->config.shift)
2421 pdata->ops = &shifted_smsc911x_ops;
2422
2423 retval = smsc911x_init(dev);
2424 if (retval < 0)
2425 goto out_disable_resources;
2426
2427 /* configure irq polarity and type before connecting isr */
2428 if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH)
2429 intcfg |= INT_CFG_IRQ_POL_;
2430
2431 if (pdata->config.irq_type == SMSC911X_IRQ_TYPE_PUSH_PULL)
2432 intcfg |= INT_CFG_IRQ_TYPE_;
2433
2434 smsc911x_reg_write(pdata, INT_CFG, intcfg);
2435
2436 /* Ensure interrupts are globally disabled before connecting ISR */
2437 smsc911x_reg_write(pdata, INT_EN, 0);
2438 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
2439
2440 retval = request_irq(dev->irq, smsc911x_irqhandler,
2441 irq_flags | IRQF_SHARED, dev->name, dev);
2442 if (retval) {
2443 SMSC_WARN(pdata, probe,
2444 "Unable to claim requested irq: %d", dev->irq);
2445 goto out_disable_resources;
2446 }
2447
2448 retval = register_netdev(dev);
2449 if (retval) {
2450 SMSC_WARN(pdata, probe, "Error %i registering device", retval);
2451 goto out_free_irq;
2452 } else {
2453 SMSC_TRACE(pdata, probe,
2454 "Network interface: \"%s\"", dev->name);
2455 }
2456
2457 retval = smsc911x_mii_init(pdev, dev);
2458 if (retval) {
2459 SMSC_WARN(pdata, probe, "Error %i initialising mii", retval);
2460 goto out_unregister_netdev_5;
2461 }
2462
2463 spin_lock_irq(&pdata->mac_lock);
2464
2465 /* Check if mac address has been specified when bringing interface up */
2466 if (is_valid_ether_addr(dev->dev_addr)) {
2467 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2468 SMSC_TRACE(pdata, probe,
2469 "MAC Address is specified by configuration");
2470 } else if (is_valid_ether_addr(pdata->config.mac)) {
2471 memcpy(dev->dev_addr, pdata->config.mac, 6);
2472 SMSC_TRACE(pdata, probe,
2473 "MAC Address specified by platform data");
2474 } else {
2475 /* Try reading mac address from device. if EEPROM is present
2476 * it will already have been set */
2477 smsc_get_mac(dev);
2478
2479 if (is_valid_ether_addr(dev->dev_addr)) {
2480 /* eeprom values are valid so use them */
2481 SMSC_TRACE(pdata, probe,
2482 "Mac Address is read from LAN911x EEPROM");
2483 } else {
2484 /* eeprom values are invalid, generate random MAC */
2485 eth_hw_addr_random(dev);
2486 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2487 SMSC_TRACE(pdata, probe,
2488 "MAC Address is set to random_ether_addr");
2489 }
2490 }
2491
2492 spin_unlock_irq(&pdata->mac_lock);
2493
2494 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
2495
2496 return 0;
2497
2498out_unregister_netdev_5:
2499 unregister_netdev(dev);
2500out_free_irq:
2501 free_irq(dev->irq, dev);
2502out_disable_resources:
2503 (void)smsc911x_disable_resources(pdev);
2504out_enable_resources_fail:
2505 smsc911x_free_resources(pdev);
2506out_request_resources_fail:
2507 platform_set_drvdata(pdev, NULL);
2508 iounmap(pdata->ioaddr);
2509 free_netdev(dev);
2510out_release_io_1:
2511 release_mem_region(res->start, resource_size(res));
2512out_0:
2513 return retval;
2514}
2515
2516#ifdef CONFIG_PM
2517/* This implementation assumes the devices remains powered on its VDDVARIO
2518 * pins during suspend. */
2519
2520/* TODO: implement freeze/thaw callbacks for hibernation.*/
2521
2522static int smsc911x_suspend(struct device *dev)
2523{
2524 struct net_device *ndev = dev_get_drvdata(dev);
2525 struct smsc911x_data *pdata = netdev_priv(ndev);
2526
2527 /* enable wake on LAN, energy detection and the external PME
2528 * signal. */
2529 smsc911x_reg_write(pdata, PMT_CTRL,
2530 PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ |
2531 PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_);
2532
2533 return 0;
2534}
2535
2536static int smsc911x_resume(struct device *dev)
2537{
2538 struct net_device *ndev = dev_get_drvdata(dev);
2539 struct smsc911x_data *pdata = netdev_priv(ndev);
2540 unsigned int to = 100;
2541
2542 /* Note 3.11 from the datasheet:
2543 * "When the LAN9220 is in a power saving state, a write of any
2544 * data to the BYTE_TEST register will wake-up the device."
2545 */
2546 smsc911x_reg_write(pdata, BYTE_TEST, 0);
2547
2548 /* poll the READY bit in PMT_CTRL. Any other access to the device is
2549 * forbidden while this bit isn't set. Try for 100ms and return -EIO
2550 * if it failed. */
2551 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to)
2552 udelay(1000);
2553
2554 return (to == 0) ? -EIO : 0;
2555}
2556
2557static const struct dev_pm_ops smsc911x_pm_ops = {
2558 .suspend = smsc911x_suspend,
2559 .resume = smsc911x_resume,
2560};
2561
2562#define SMSC911X_PM_OPS (&smsc911x_pm_ops)
2563
2564#else
2565#define SMSC911X_PM_OPS NULL
2566#endif
2567
2568static const struct of_device_id smsc911x_dt_ids[] = {
2569 { .compatible = "smsc,lan9115", },
2570 { /* sentinel */ }
2571};
2572MODULE_DEVICE_TABLE(of, smsc911x_dt_ids);
2573
2574static struct platform_driver smsc911x_driver = {
2575 .probe = smsc911x_drv_probe,
2576 .remove = __devexit_p(smsc911x_drv_remove),
2577 .driver = {
2578 .name = SMSC_CHIPNAME,
2579 .owner = THIS_MODULE,
2580 .pm = SMSC911X_PM_OPS,
2581 .of_match_table = smsc911x_dt_ids,
2582 },
2583};
2584
2585/* Entry point for loading the module */
2586static int __init smsc911x_init_module(void)
2587{
2588 SMSC_INITIALIZE();
2589 return platform_driver_register(&smsc911x_driver);
2590}
2591
2592/* entry point for unloading the module */
2593static void __exit smsc911x_cleanup_module(void)
2594{
2595 platform_driver_unregister(&smsc911x_driver);
2596}
2597
2598module_init(smsc911x_init_module);
2599module_exit(smsc911x_cleanup_module);