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1// SPDX-License-Identifier: GPL-2.0-or-later
2/***************************************************************************
3 *
4 * Copyright (C) 2004-2008 SMSC
5 * Copyright (C) 2005-2008 ARM
6 *
7 ***************************************************************************
8 * Rewritten, heavily based on smsc911x simple driver by SMSC.
9 * Partly uses io macros from smc91x.c by Nicolas Pitre
10 *
11 * Supported devices:
12 * LAN9115, LAN9116, LAN9117, LAN9118
13 * LAN9215, LAN9216, LAN9217, LAN9218
14 * LAN9210, LAN9211
15 * LAN9220, LAN9221
16 * LAN89218,LAN9250
17 */
18
19#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20
21#include <linux/crc32.h>
22#include <linux/clk.h>
23#include <linux/delay.h>
24#include <linux/errno.h>
25#include <linux/etherdevice.h>
26#include <linux/ethtool.h>
27#include <linux/init.h>
28#include <linux/interrupt.h>
29#include <linux/ioport.h>
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/netdevice.h>
33#include <linux/platform_device.h>
34#include <linux/regulator/consumer.h>
35#include <linux/sched.h>
36#include <linux/timer.h>
37#include <linux/bug.h>
38#include <linux/bitops.h>
39#include <linux/irq.h>
40#include <linux/io.h>
41#include <linux/swab.h>
42#include <linux/phy.h>
43#include <linux/smsc911x.h>
44#include <linux/device.h>
45#include <linux/of.h>
46#include <linux/of_gpio.h>
47#include <linux/of_net.h>
48#include <linux/acpi.h>
49#include <linux/pm_runtime.h>
50#include <linux/property.h>
51#include <linux/gpio/consumer.h>
52
53#include "smsc911x.h"
54
55#define SMSC_CHIPNAME "smsc911x"
56#define SMSC_MDIONAME "smsc911x-mdio"
57#define SMSC_DRV_VERSION "2008-10-21"
58
59MODULE_LICENSE("GPL");
60MODULE_VERSION(SMSC_DRV_VERSION);
61MODULE_ALIAS("platform:smsc911x");
62
63#if USE_DEBUG > 0
64static int debug = 16;
65#else
66static int debug = 3;
67#endif
68
69module_param(debug, int, 0);
70MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
71
72struct smsc911x_data;
73
74struct smsc911x_ops {
75 u32 (*reg_read)(struct smsc911x_data *pdata, u32 reg);
76 void (*reg_write)(struct smsc911x_data *pdata, u32 reg, u32 val);
77 void (*rx_readfifo)(struct smsc911x_data *pdata,
78 unsigned int *buf, unsigned int wordcount);
79 void (*tx_writefifo)(struct smsc911x_data *pdata,
80 unsigned int *buf, unsigned int wordcount);
81};
82
83#define SMSC911X_NUM_SUPPLIES 2
84
85struct smsc911x_data {
86 void __iomem *ioaddr;
87
88 unsigned int idrev;
89
90 /* used to decide which workarounds apply */
91 unsigned int generation;
92
93 /* device configuration (copied from platform_data during probe) */
94 struct smsc911x_platform_config config;
95
96 /* This needs to be acquired before calling any of below:
97 * smsc911x_mac_read(), smsc911x_mac_write()
98 */
99 spinlock_t mac_lock;
100
101 /* spinlock to ensure register accesses are serialised */
102 spinlock_t dev_lock;
103
104 struct mii_bus *mii_bus;
105 unsigned int using_extphy;
106 int last_duplex;
107 int last_carrier;
108
109 u32 msg_enable;
110 unsigned int gpio_setting;
111 unsigned int gpio_orig_setting;
112 struct net_device *dev;
113 struct napi_struct napi;
114
115 unsigned int software_irq_signal;
116
117#ifdef USE_PHY_WORK_AROUND
118#define MIN_PACKET_SIZE (64)
119 char loopback_tx_pkt[MIN_PACKET_SIZE];
120 char loopback_rx_pkt[MIN_PACKET_SIZE];
121 unsigned int resetcount;
122#endif
123
124 /* Members for Multicast filter workaround */
125 unsigned int multicast_update_pending;
126 unsigned int set_bits_mask;
127 unsigned int clear_bits_mask;
128 unsigned int hashhi;
129 unsigned int hashlo;
130
131 /* register access functions */
132 const struct smsc911x_ops *ops;
133
134 /* regulators */
135 struct regulator_bulk_data supplies[SMSC911X_NUM_SUPPLIES];
136
137 /* Reset GPIO */
138 struct gpio_desc *reset_gpiod;
139
140 /* clock */
141 struct clk *clk;
142};
143
144/* Easy access to information */
145#define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift))
146
147static inline u32 __smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
148{
149 if (pdata->config.flags & SMSC911X_USE_32BIT)
150 return readl(pdata->ioaddr + reg);
151
152 if (pdata->config.flags & SMSC911X_USE_16BIT)
153 return ((readw(pdata->ioaddr + reg) & 0xFFFF) |
154 ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16));
155
156 BUG();
157 return 0;
158}
159
160static inline u32
161__smsc911x_reg_read_shift(struct smsc911x_data *pdata, u32 reg)
162{
163 if (pdata->config.flags & SMSC911X_USE_32BIT)
164 return readl(pdata->ioaddr + __smsc_shift(pdata, reg));
165
166 if (pdata->config.flags & SMSC911X_USE_16BIT)
167 return (readw(pdata->ioaddr +
168 __smsc_shift(pdata, reg)) & 0xFFFF) |
169 ((readw(pdata->ioaddr +
170 __smsc_shift(pdata, reg + 2)) & 0xFFFF) << 16);
171
172 BUG();
173 return 0;
174}
175
176static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
177{
178 u32 data;
179 unsigned long flags;
180
181 spin_lock_irqsave(&pdata->dev_lock, flags);
182 data = pdata->ops->reg_read(pdata, reg);
183 spin_unlock_irqrestore(&pdata->dev_lock, flags);
184
185 return data;
186}
187
188static inline void __smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
189 u32 val)
190{
191 if (pdata->config.flags & SMSC911X_USE_32BIT) {
192 writel(val, pdata->ioaddr + reg);
193 return;
194 }
195
196 if (pdata->config.flags & SMSC911X_USE_16BIT) {
197 writew(val & 0xFFFF, pdata->ioaddr + reg);
198 writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2);
199 return;
200 }
201
202 BUG();
203}
204
205static inline void
206__smsc911x_reg_write_shift(struct smsc911x_data *pdata, u32 reg, u32 val)
207{
208 if (pdata->config.flags & SMSC911X_USE_32BIT) {
209 writel(val, pdata->ioaddr + __smsc_shift(pdata, reg));
210 return;
211 }
212
213 if (pdata->config.flags & SMSC911X_USE_16BIT) {
214 writew(val & 0xFFFF,
215 pdata->ioaddr + __smsc_shift(pdata, reg));
216 writew((val >> 16) & 0xFFFF,
217 pdata->ioaddr + __smsc_shift(pdata, reg + 2));
218 return;
219 }
220
221 BUG();
222}
223
224static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
225 u32 val)
226{
227 unsigned long flags;
228
229 spin_lock_irqsave(&pdata->dev_lock, flags);
230 pdata->ops->reg_write(pdata, reg, val);
231 spin_unlock_irqrestore(&pdata->dev_lock, flags);
232}
233
234/* Writes a packet to the TX_DATA_FIFO */
235static inline void
236smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf,
237 unsigned int wordcount)
238{
239 unsigned long flags;
240
241 spin_lock_irqsave(&pdata->dev_lock, flags);
242
243 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
244 while (wordcount--)
245 __smsc911x_reg_write(pdata, TX_DATA_FIFO,
246 swab32(*buf++));
247 goto out;
248 }
249
250 if (pdata->config.flags & SMSC911X_USE_32BIT) {
251 iowrite32_rep(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount);
252 goto out;
253 }
254
255 if (pdata->config.flags & SMSC911X_USE_16BIT) {
256 while (wordcount--)
257 __smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++);
258 goto out;
259 }
260
261 BUG();
262out:
263 spin_unlock_irqrestore(&pdata->dev_lock, flags);
264}
265
266/* Writes a packet to the TX_DATA_FIFO - shifted version */
267static inline void
268smsc911x_tx_writefifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
269 unsigned int wordcount)
270{
271 unsigned long flags;
272
273 spin_lock_irqsave(&pdata->dev_lock, flags);
274
275 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
276 while (wordcount--)
277 __smsc911x_reg_write_shift(pdata, TX_DATA_FIFO,
278 swab32(*buf++));
279 goto out;
280 }
281
282 if (pdata->config.flags & SMSC911X_USE_32BIT) {
283 iowrite32_rep(pdata->ioaddr + __smsc_shift(pdata,
284 TX_DATA_FIFO), buf, wordcount);
285 goto out;
286 }
287
288 if (pdata->config.flags & SMSC911X_USE_16BIT) {
289 while (wordcount--)
290 __smsc911x_reg_write_shift(pdata,
291 TX_DATA_FIFO, *buf++);
292 goto out;
293 }
294
295 BUG();
296out:
297 spin_unlock_irqrestore(&pdata->dev_lock, flags);
298}
299
300/* Reads a packet out of the RX_DATA_FIFO */
301static inline void
302smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf,
303 unsigned int wordcount)
304{
305 unsigned long flags;
306
307 spin_lock_irqsave(&pdata->dev_lock, flags);
308
309 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
310 while (wordcount--)
311 *buf++ = swab32(__smsc911x_reg_read(pdata,
312 RX_DATA_FIFO));
313 goto out;
314 }
315
316 if (pdata->config.flags & SMSC911X_USE_32BIT) {
317 ioread32_rep(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount);
318 goto out;
319 }
320
321 if (pdata->config.flags & SMSC911X_USE_16BIT) {
322 while (wordcount--)
323 *buf++ = __smsc911x_reg_read(pdata, RX_DATA_FIFO);
324 goto out;
325 }
326
327 BUG();
328out:
329 spin_unlock_irqrestore(&pdata->dev_lock, flags);
330}
331
332/* Reads a packet out of the RX_DATA_FIFO - shifted version */
333static inline void
334smsc911x_rx_readfifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
335 unsigned int wordcount)
336{
337 unsigned long flags;
338
339 spin_lock_irqsave(&pdata->dev_lock, flags);
340
341 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
342 while (wordcount--)
343 *buf++ = swab32(__smsc911x_reg_read_shift(pdata,
344 RX_DATA_FIFO));
345 goto out;
346 }
347
348 if (pdata->config.flags & SMSC911X_USE_32BIT) {
349 ioread32_rep(pdata->ioaddr + __smsc_shift(pdata,
350 RX_DATA_FIFO), buf, wordcount);
351 goto out;
352 }
353
354 if (pdata->config.flags & SMSC911X_USE_16BIT) {
355 while (wordcount--)
356 *buf++ = __smsc911x_reg_read_shift(pdata,
357 RX_DATA_FIFO);
358 goto out;
359 }
360
361 BUG();
362out:
363 spin_unlock_irqrestore(&pdata->dev_lock, flags);
364}
365
366/*
367 * enable regulator and clock resources.
368 */
369static int smsc911x_enable_resources(struct platform_device *pdev)
370{
371 struct net_device *ndev = platform_get_drvdata(pdev);
372 struct smsc911x_data *pdata = netdev_priv(ndev);
373 int ret = 0;
374
375 ret = regulator_bulk_enable(ARRAY_SIZE(pdata->supplies),
376 pdata->supplies);
377 if (ret)
378 netdev_err(ndev, "failed to enable regulators %d\n",
379 ret);
380
381 if (!IS_ERR(pdata->clk)) {
382 ret = clk_prepare_enable(pdata->clk);
383 if (ret < 0)
384 netdev_err(ndev, "failed to enable clock %d\n", ret);
385 }
386
387 return ret;
388}
389
390/*
391 * disable resources, currently just regulators.
392 */
393static int smsc911x_disable_resources(struct platform_device *pdev)
394{
395 struct net_device *ndev = platform_get_drvdata(pdev);
396 struct smsc911x_data *pdata = netdev_priv(ndev);
397 int ret = 0;
398
399 ret = regulator_bulk_disable(ARRAY_SIZE(pdata->supplies),
400 pdata->supplies);
401
402 if (!IS_ERR(pdata->clk))
403 clk_disable_unprepare(pdata->clk);
404
405 return ret;
406}
407
408/*
409 * Request resources, currently just regulators.
410 *
411 * The SMSC911x has two power pins: vddvario and vdd33a, in designs where
412 * these are not always-on we need to request regulators to be turned on
413 * before we can try to access the device registers.
414 */
415static int smsc911x_request_resources(struct platform_device *pdev)
416{
417 struct net_device *ndev = platform_get_drvdata(pdev);
418 struct smsc911x_data *pdata = netdev_priv(ndev);
419 int ret = 0;
420
421 /* Request regulators */
422 pdata->supplies[0].supply = "vdd33a";
423 pdata->supplies[1].supply = "vddvario";
424 ret = regulator_bulk_get(&pdev->dev,
425 ARRAY_SIZE(pdata->supplies),
426 pdata->supplies);
427 if (ret) {
428 /*
429 * Retry on deferrals, else just report the error
430 * and try to continue.
431 */
432 if (ret == -EPROBE_DEFER)
433 return ret;
434 netdev_err(ndev, "couldn't get regulators %d\n",
435 ret);
436 }
437
438 /* Request optional RESET GPIO */
439 pdata->reset_gpiod = devm_gpiod_get_optional(&pdev->dev,
440 "reset",
441 GPIOD_OUT_LOW);
442
443 /* Request clock */
444 pdata->clk = clk_get(&pdev->dev, NULL);
445 if (IS_ERR(pdata->clk))
446 dev_dbg(&pdev->dev, "couldn't get clock %li\n",
447 PTR_ERR(pdata->clk));
448
449 return ret;
450}
451
452/*
453 * Free resources, currently just regulators.
454 *
455 */
456static void smsc911x_free_resources(struct platform_device *pdev)
457{
458 struct net_device *ndev = platform_get_drvdata(pdev);
459 struct smsc911x_data *pdata = netdev_priv(ndev);
460
461 /* Free regulators */
462 regulator_bulk_free(ARRAY_SIZE(pdata->supplies),
463 pdata->supplies);
464
465 /* Free clock */
466 if (!IS_ERR(pdata->clk)) {
467 clk_put(pdata->clk);
468 pdata->clk = NULL;
469 }
470}
471
472/* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
473 * and smsc911x_mac_write, so assumes mac_lock is held */
474static int smsc911x_mac_complete(struct smsc911x_data *pdata)
475{
476 int i;
477 u32 val;
478
479 SMSC_ASSERT_MAC_LOCK(pdata);
480
481 for (i = 0; i < 40; i++) {
482 val = smsc911x_reg_read(pdata, MAC_CSR_CMD);
483 if (!(val & MAC_CSR_CMD_CSR_BUSY_))
484 return 0;
485 }
486 SMSC_WARN(pdata, hw, "Timed out waiting for MAC not BUSY. "
487 "MAC_CSR_CMD: 0x%08X", val);
488 return -EIO;
489}
490
491/* Fetches a MAC register value. Assumes mac_lock is acquired */
492static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset)
493{
494 unsigned int temp;
495
496 SMSC_ASSERT_MAC_LOCK(pdata);
497
498 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
499 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
500 SMSC_WARN(pdata, hw, "MAC busy at entry");
501 return 0xFFFFFFFF;
502 }
503
504 /* Send the MAC cmd */
505 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
506 MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_));
507
508 /* Workaround for hardware read-after-write restriction */
509 temp = smsc911x_reg_read(pdata, BYTE_TEST);
510
511 /* Wait for the read to complete */
512 if (likely(smsc911x_mac_complete(pdata) == 0))
513 return smsc911x_reg_read(pdata, MAC_CSR_DATA);
514
515 SMSC_WARN(pdata, hw, "MAC busy after read");
516 return 0xFFFFFFFF;
517}
518
519/* Set a mac register, mac_lock must be acquired before calling */
520static void smsc911x_mac_write(struct smsc911x_data *pdata,
521 unsigned int offset, u32 val)
522{
523 unsigned int temp;
524
525 SMSC_ASSERT_MAC_LOCK(pdata);
526
527 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
528 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
529 SMSC_WARN(pdata, hw,
530 "smsc911x_mac_write failed, MAC busy at entry");
531 return;
532 }
533
534 /* Send data to write */
535 smsc911x_reg_write(pdata, MAC_CSR_DATA, val);
536
537 /* Write the actual data */
538 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
539 MAC_CSR_CMD_CSR_BUSY_));
540
541 /* Workaround for hardware read-after-write restriction */
542 temp = smsc911x_reg_read(pdata, BYTE_TEST);
543
544 /* Wait for the write to complete */
545 if (likely(smsc911x_mac_complete(pdata) == 0))
546 return;
547
548 SMSC_WARN(pdata, hw, "smsc911x_mac_write failed, MAC busy after write");
549}
550
551/* Get a phy register */
552static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx)
553{
554 struct smsc911x_data *pdata = bus->priv;
555 unsigned long flags;
556 unsigned int addr;
557 int i, reg;
558
559 pm_runtime_get_sync(bus->parent);
560 spin_lock_irqsave(&pdata->mac_lock, flags);
561
562 /* Confirm MII not busy */
563 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
564 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_read???");
565 reg = -EIO;
566 goto out;
567 }
568
569 /* Set the address, index & direction (read from PHY) */
570 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6);
571 smsc911x_mac_write(pdata, MII_ACC, addr);
572
573 /* Wait for read to complete w/ timeout */
574 for (i = 0; i < 100; i++)
575 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
576 reg = smsc911x_mac_read(pdata, MII_DATA);
577 goto out;
578 }
579
580 SMSC_WARN(pdata, hw, "Timed out waiting for MII read to finish");
581 reg = -EIO;
582
583out:
584 spin_unlock_irqrestore(&pdata->mac_lock, flags);
585 pm_runtime_put(bus->parent);
586 return reg;
587}
588
589/* Set a phy register */
590static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx,
591 u16 val)
592{
593 struct smsc911x_data *pdata = bus->priv;
594 unsigned long flags;
595 unsigned int addr;
596 int i, reg;
597
598 pm_runtime_get_sync(bus->parent);
599 spin_lock_irqsave(&pdata->mac_lock, flags);
600
601 /* Confirm MII not busy */
602 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
603 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_write???");
604 reg = -EIO;
605 goto out;
606 }
607
608 /* Put the data to write in the MAC */
609 smsc911x_mac_write(pdata, MII_DATA, val);
610
611 /* Set the address, index & direction (write to PHY) */
612 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
613 MII_ACC_MII_WRITE_;
614 smsc911x_mac_write(pdata, MII_ACC, addr);
615
616 /* Wait for write to complete w/ timeout */
617 for (i = 0; i < 100; i++)
618 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
619 reg = 0;
620 goto out;
621 }
622
623 SMSC_WARN(pdata, hw, "Timed out waiting for MII write to finish");
624 reg = -EIO;
625
626out:
627 spin_unlock_irqrestore(&pdata->mac_lock, flags);
628 pm_runtime_put(bus->parent);
629 return reg;
630}
631
632/* Switch to external phy. Assumes tx and rx are stopped. */
633static void smsc911x_phy_enable_external(struct smsc911x_data *pdata)
634{
635 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
636
637 /* Disable phy clocks to the MAC */
638 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
639 hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
640 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
641 udelay(10); /* Enough time for clocks to stop */
642
643 /* Switch to external phy */
644 hwcfg |= HW_CFG_EXT_PHY_EN_;
645 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
646
647 /* Enable phy clocks to the MAC */
648 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
649 hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
650 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
651 udelay(10); /* Enough time for clocks to restart */
652
653 hwcfg |= HW_CFG_SMI_SEL_;
654 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
655}
656
657/* Autodetects and enables external phy if present on supported chips.
658 * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY
659 * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */
660static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata)
661{
662 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
663
664 if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) {
665 SMSC_TRACE(pdata, hw, "Forcing internal PHY");
666 pdata->using_extphy = 0;
667 } else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) {
668 SMSC_TRACE(pdata, hw, "Forcing external PHY");
669 smsc911x_phy_enable_external(pdata);
670 pdata->using_extphy = 1;
671 } else if (hwcfg & HW_CFG_EXT_PHY_DET_) {
672 SMSC_TRACE(pdata, hw,
673 "HW_CFG EXT_PHY_DET set, using external PHY");
674 smsc911x_phy_enable_external(pdata);
675 pdata->using_extphy = 1;
676 } else {
677 SMSC_TRACE(pdata, hw,
678 "HW_CFG EXT_PHY_DET clear, using internal PHY");
679 pdata->using_extphy = 0;
680 }
681}
682
683/* Fetches a tx status out of the status fifo */
684static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata)
685{
686 unsigned int result =
687 smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_;
688
689 if (result != 0)
690 result = smsc911x_reg_read(pdata, TX_STATUS_FIFO);
691
692 return result;
693}
694
695/* Fetches the next rx status */
696static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata)
697{
698 unsigned int result =
699 smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_;
700
701 if (result != 0)
702 result = smsc911x_reg_read(pdata, RX_STATUS_FIFO);
703
704 return result;
705}
706
707#ifdef USE_PHY_WORK_AROUND
708static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata)
709{
710 unsigned int tries;
711 u32 wrsz;
712 u32 rdsz;
713 ulong bufp;
714
715 for (tries = 0; tries < 10; tries++) {
716 unsigned int txcmd_a;
717 unsigned int txcmd_b;
718 unsigned int status;
719 unsigned int pktlength;
720 unsigned int i;
721
722 /* Zero-out rx packet memory */
723 memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE);
724
725 /* Write tx packet to 118 */
726 txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16;
727 txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
728 txcmd_a |= MIN_PACKET_SIZE;
729
730 txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE;
731
732 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a);
733 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b);
734
735 bufp = (ulong)pdata->loopback_tx_pkt & (~0x3);
736 wrsz = MIN_PACKET_SIZE + 3;
737 wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3);
738 wrsz >>= 2;
739
740 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
741
742 /* Wait till transmit is done */
743 i = 60;
744 do {
745 udelay(5);
746 status = smsc911x_tx_get_txstatus(pdata);
747 } while ((i--) && (!status));
748
749 if (!status) {
750 SMSC_WARN(pdata, hw,
751 "Failed to transmit during loopback test");
752 continue;
753 }
754 if (status & TX_STS_ES_) {
755 SMSC_WARN(pdata, hw,
756 "Transmit encountered errors during loopback test");
757 continue;
758 }
759
760 /* Wait till receive is done */
761 i = 60;
762 do {
763 udelay(5);
764 status = smsc911x_rx_get_rxstatus(pdata);
765 } while ((i--) && (!status));
766
767 if (!status) {
768 SMSC_WARN(pdata, hw,
769 "Failed to receive during loopback test");
770 continue;
771 }
772 if (status & RX_STS_ES_) {
773 SMSC_WARN(pdata, hw,
774 "Receive encountered errors during loopback test");
775 continue;
776 }
777
778 pktlength = ((status & 0x3FFF0000UL) >> 16);
779 bufp = (ulong)pdata->loopback_rx_pkt;
780 rdsz = pktlength + 3;
781 rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3);
782 rdsz >>= 2;
783
784 pdata->ops->rx_readfifo(pdata, (unsigned int *)bufp, rdsz);
785
786 if (pktlength != (MIN_PACKET_SIZE + 4)) {
787 SMSC_WARN(pdata, hw, "Unexpected packet size "
788 "during loop back test, size=%d, will retry",
789 pktlength);
790 } else {
791 unsigned int j;
792 int mismatch = 0;
793 for (j = 0; j < MIN_PACKET_SIZE; j++) {
794 if (pdata->loopback_tx_pkt[j]
795 != pdata->loopback_rx_pkt[j]) {
796 mismatch = 1;
797 break;
798 }
799 }
800 if (!mismatch) {
801 SMSC_TRACE(pdata, hw, "Successfully verified "
802 "loopback packet");
803 return 0;
804 } else {
805 SMSC_WARN(pdata, hw, "Data mismatch "
806 "during loop back test, will retry");
807 }
808 }
809 }
810
811 return -EIO;
812}
813
814static int smsc911x_phy_reset(struct smsc911x_data *pdata)
815{
816 unsigned int temp;
817 unsigned int i = 100000;
818
819 temp = smsc911x_reg_read(pdata, PMT_CTRL);
820 smsc911x_reg_write(pdata, PMT_CTRL, temp | PMT_CTRL_PHY_RST_);
821 do {
822 msleep(1);
823 temp = smsc911x_reg_read(pdata, PMT_CTRL);
824 } while ((i--) && (temp & PMT_CTRL_PHY_RST_));
825
826 if (unlikely(temp & PMT_CTRL_PHY_RST_)) {
827 SMSC_WARN(pdata, hw, "PHY reset failed to complete");
828 return -EIO;
829 }
830 /* Extra delay required because the phy may not be completed with
831 * its reset when BMCR_RESET is cleared. Specs say 256 uS is
832 * enough delay but using 1ms here to be safe */
833 msleep(1);
834
835 return 0;
836}
837
838static int smsc911x_phy_loopbacktest(struct net_device *dev)
839{
840 struct smsc911x_data *pdata = netdev_priv(dev);
841 struct phy_device *phy_dev = dev->phydev;
842 int result = -EIO;
843 unsigned int i, val;
844 unsigned long flags;
845
846 /* Initialise tx packet using broadcast destination address */
847 eth_broadcast_addr(pdata->loopback_tx_pkt);
848
849 /* Use incrementing source address */
850 for (i = 6; i < 12; i++)
851 pdata->loopback_tx_pkt[i] = (char)i;
852
853 /* Set length type field */
854 pdata->loopback_tx_pkt[12] = 0x00;
855 pdata->loopback_tx_pkt[13] = 0x00;
856
857 for (i = 14; i < MIN_PACKET_SIZE; i++)
858 pdata->loopback_tx_pkt[i] = (char)i;
859
860 val = smsc911x_reg_read(pdata, HW_CFG);
861 val &= HW_CFG_TX_FIF_SZ_;
862 val |= HW_CFG_SF_;
863 smsc911x_reg_write(pdata, HW_CFG, val);
864
865 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
866 smsc911x_reg_write(pdata, RX_CFG,
867 (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8);
868
869 for (i = 0; i < 10; i++) {
870 /* Set PHY to 10/FD, no ANEG, and loopback mode */
871 smsc911x_mii_write(phy_dev->mdio.bus, phy_dev->mdio.addr,
872 MII_BMCR, BMCR_LOOPBACK | BMCR_FULLDPLX);
873
874 /* Enable MAC tx/rx, FD */
875 spin_lock_irqsave(&pdata->mac_lock, flags);
876 smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_
877 | MAC_CR_TXEN_ | MAC_CR_RXEN_);
878 spin_unlock_irqrestore(&pdata->mac_lock, flags);
879
880 if (smsc911x_phy_check_loopbackpkt(pdata) == 0) {
881 result = 0;
882 break;
883 }
884 pdata->resetcount++;
885
886 /* Disable MAC rx */
887 spin_lock_irqsave(&pdata->mac_lock, flags);
888 smsc911x_mac_write(pdata, MAC_CR, 0);
889 spin_unlock_irqrestore(&pdata->mac_lock, flags);
890
891 smsc911x_phy_reset(pdata);
892 }
893
894 /* Disable MAC */
895 spin_lock_irqsave(&pdata->mac_lock, flags);
896 smsc911x_mac_write(pdata, MAC_CR, 0);
897 spin_unlock_irqrestore(&pdata->mac_lock, flags);
898
899 /* Cancel PHY loopback mode */
900 smsc911x_mii_write(phy_dev->mdio.bus, phy_dev->mdio.addr, MII_BMCR, 0);
901
902 smsc911x_reg_write(pdata, TX_CFG, 0);
903 smsc911x_reg_write(pdata, RX_CFG, 0);
904
905 return result;
906}
907#endif /* USE_PHY_WORK_AROUND */
908
909static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata)
910{
911 struct net_device *ndev = pdata->dev;
912 struct phy_device *phy_dev = ndev->phydev;
913 u32 afc = smsc911x_reg_read(pdata, AFC_CFG);
914 u32 flow;
915 unsigned long flags;
916
917 if (phy_dev->duplex == DUPLEX_FULL) {
918 u16 lcladv = phy_read(phy_dev, MII_ADVERTISE);
919 u16 rmtadv = phy_read(phy_dev, MII_LPA);
920 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
921
922 if (cap & FLOW_CTRL_RX)
923 flow = 0xFFFF0002;
924 else
925 flow = 0;
926
927 if (cap & FLOW_CTRL_TX)
928 afc |= 0xF;
929 else
930 afc &= ~0xF;
931
932 SMSC_TRACE(pdata, hw, "rx pause %s, tx pause %s",
933 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
934 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
935 } else {
936 SMSC_TRACE(pdata, hw, "half duplex");
937 flow = 0;
938 afc |= 0xF;
939 }
940
941 spin_lock_irqsave(&pdata->mac_lock, flags);
942 smsc911x_mac_write(pdata, FLOW, flow);
943 spin_unlock_irqrestore(&pdata->mac_lock, flags);
944
945 smsc911x_reg_write(pdata, AFC_CFG, afc);
946}
947
948/* Update link mode if anything has changed. Called periodically when the
949 * PHY is in polling mode, even if nothing has changed. */
950static void smsc911x_phy_adjust_link(struct net_device *dev)
951{
952 struct smsc911x_data *pdata = netdev_priv(dev);
953 struct phy_device *phy_dev = dev->phydev;
954 unsigned long flags;
955 int carrier;
956
957 if (phy_dev->duplex != pdata->last_duplex) {
958 unsigned int mac_cr;
959 SMSC_TRACE(pdata, hw, "duplex state has changed");
960
961 spin_lock_irqsave(&pdata->mac_lock, flags);
962 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
963 if (phy_dev->duplex) {
964 SMSC_TRACE(pdata, hw,
965 "configuring for full duplex mode");
966 mac_cr |= MAC_CR_FDPX_;
967 } else {
968 SMSC_TRACE(pdata, hw,
969 "configuring for half duplex mode");
970 mac_cr &= ~MAC_CR_FDPX_;
971 }
972 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
973 spin_unlock_irqrestore(&pdata->mac_lock, flags);
974
975 smsc911x_phy_update_flowcontrol(pdata);
976 pdata->last_duplex = phy_dev->duplex;
977 }
978
979 carrier = netif_carrier_ok(dev);
980 if (carrier != pdata->last_carrier) {
981 SMSC_TRACE(pdata, hw, "carrier state has changed");
982 if (carrier) {
983 SMSC_TRACE(pdata, hw, "configuring for carrier OK");
984 if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) &&
985 (!pdata->using_extphy)) {
986 /* Restore original GPIO configuration */
987 pdata->gpio_setting = pdata->gpio_orig_setting;
988 smsc911x_reg_write(pdata, GPIO_CFG,
989 pdata->gpio_setting);
990 }
991 } else {
992 SMSC_TRACE(pdata, hw, "configuring for no carrier");
993 /* Check global setting that LED1
994 * usage is 10/100 indicator */
995 pdata->gpio_setting = smsc911x_reg_read(pdata,
996 GPIO_CFG);
997 if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_) &&
998 (!pdata->using_extphy)) {
999 /* Force 10/100 LED off, after saving
1000 * original GPIO configuration */
1001 pdata->gpio_orig_setting = pdata->gpio_setting;
1002
1003 pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_;
1004 pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_
1005 | GPIO_CFG_GPIODIR0_
1006 | GPIO_CFG_GPIOD0_);
1007 smsc911x_reg_write(pdata, GPIO_CFG,
1008 pdata->gpio_setting);
1009 }
1010 }
1011 pdata->last_carrier = carrier;
1012 }
1013}
1014
1015static int smsc911x_mii_probe(struct net_device *dev)
1016{
1017 struct smsc911x_data *pdata = netdev_priv(dev);
1018 struct phy_device *phydev;
1019 int ret;
1020
1021 /* find the first phy */
1022 phydev = phy_find_first(pdata->mii_bus);
1023 if (!phydev) {
1024 netdev_err(dev, "no PHY found\n");
1025 return -ENODEV;
1026 }
1027
1028 SMSC_TRACE(pdata, probe, "PHY: addr %d, phy_id 0x%08X",
1029 phydev->mdio.addr, phydev->phy_id);
1030
1031 ret = phy_connect_direct(dev, phydev, &smsc911x_phy_adjust_link,
1032 pdata->config.phy_interface);
1033
1034 if (ret) {
1035 netdev_err(dev, "Could not attach to PHY\n");
1036 return ret;
1037 }
1038
1039 phy_attached_info(phydev);
1040
1041 phy_set_max_speed(phydev, SPEED_100);
1042
1043 /* mask with MAC supported features */
1044 phy_support_asym_pause(phydev);
1045
1046 pdata->last_duplex = -1;
1047 pdata->last_carrier = -1;
1048
1049#ifdef USE_PHY_WORK_AROUND
1050 if (smsc911x_phy_loopbacktest(dev) < 0) {
1051 SMSC_WARN(pdata, hw, "Failed Loop Back Test");
1052 phy_disconnect(phydev);
1053 return -ENODEV;
1054 }
1055 SMSC_TRACE(pdata, hw, "Passed Loop Back Test");
1056#endif /* USE_PHY_WORK_AROUND */
1057
1058 SMSC_TRACE(pdata, hw, "phy initialised successfully");
1059 return 0;
1060}
1061
1062static int smsc911x_mii_init(struct platform_device *pdev,
1063 struct net_device *dev)
1064{
1065 struct smsc911x_data *pdata = netdev_priv(dev);
1066 struct phy_device *phydev;
1067 int err = -ENXIO;
1068
1069 pdata->mii_bus = mdiobus_alloc();
1070 if (!pdata->mii_bus) {
1071 err = -ENOMEM;
1072 goto err_out_1;
1073 }
1074
1075 pdata->mii_bus->name = SMSC_MDIONAME;
1076 snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
1077 pdev->name, pdev->id);
1078 pdata->mii_bus->priv = pdata;
1079 pdata->mii_bus->read = smsc911x_mii_read;
1080 pdata->mii_bus->write = smsc911x_mii_write;
1081
1082 pdata->mii_bus->parent = &pdev->dev;
1083
1084 switch (pdata->idrev & 0xFFFF0000) {
1085 case 0x01170000:
1086 case 0x01150000:
1087 case 0x117A0000:
1088 case 0x115A0000:
1089 /* External PHY supported, try to autodetect */
1090 smsc911x_phy_initialise_external(pdata);
1091 break;
1092 default:
1093 SMSC_TRACE(pdata, hw, "External PHY is not supported, "
1094 "using internal PHY");
1095 pdata->using_extphy = 0;
1096 break;
1097 }
1098
1099 if (!pdata->using_extphy) {
1100 /* Mask all PHYs except ID 1 (internal) */
1101 pdata->mii_bus->phy_mask = ~(1 << 1);
1102 }
1103
1104 if (mdiobus_register(pdata->mii_bus)) {
1105 SMSC_WARN(pdata, probe, "Error registering mii bus");
1106 goto err_out_free_bus_2;
1107 }
1108
1109 phydev = phy_find_first(pdata->mii_bus);
1110 if (phydev)
1111 phydev->mac_managed_pm = true;
1112
1113 return 0;
1114
1115err_out_free_bus_2:
1116 mdiobus_free(pdata->mii_bus);
1117err_out_1:
1118 return err;
1119}
1120
1121/* Gets the number of tx statuses in the fifo */
1122static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata)
1123{
1124 return (smsc911x_reg_read(pdata, TX_FIFO_INF)
1125 & TX_FIFO_INF_TSUSED_) >> 16;
1126}
1127
1128/* Reads tx statuses and increments counters where necessary */
1129static void smsc911x_tx_update_txcounters(struct net_device *dev)
1130{
1131 struct smsc911x_data *pdata = netdev_priv(dev);
1132 unsigned int tx_stat;
1133
1134 while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) {
1135 if (unlikely(tx_stat & 0x80000000)) {
1136 /* In this driver the packet tag is used as the packet
1137 * length. Since a packet length can never reach the
1138 * size of 0x8000, this bit is reserved. It is worth
1139 * noting that the "reserved bit" in the warning above
1140 * does not reference a hardware defined reserved bit
1141 * but rather a driver defined one.
1142 */
1143 SMSC_WARN(pdata, hw, "Packet tag reserved bit is high");
1144 } else {
1145 if (unlikely(tx_stat & TX_STS_ES_)) {
1146 dev->stats.tx_errors++;
1147 } else {
1148 dev->stats.tx_packets++;
1149 dev->stats.tx_bytes += (tx_stat >> 16);
1150 }
1151 if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) {
1152 dev->stats.collisions += 16;
1153 dev->stats.tx_aborted_errors += 1;
1154 } else {
1155 dev->stats.collisions +=
1156 ((tx_stat >> 3) & 0xF);
1157 }
1158 if (unlikely(tx_stat & TX_STS_LOST_CARRIER_))
1159 dev->stats.tx_carrier_errors += 1;
1160 if (unlikely(tx_stat & TX_STS_LATE_COL_)) {
1161 dev->stats.collisions++;
1162 dev->stats.tx_aborted_errors++;
1163 }
1164 }
1165 }
1166}
1167
1168/* Increments the Rx error counters */
1169static void
1170smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat)
1171{
1172 int crc_err = 0;
1173
1174 if (unlikely(rxstat & RX_STS_ES_)) {
1175 dev->stats.rx_errors++;
1176 if (unlikely(rxstat & RX_STS_CRC_ERR_)) {
1177 dev->stats.rx_crc_errors++;
1178 crc_err = 1;
1179 }
1180 }
1181 if (likely(!crc_err)) {
1182 if (unlikely((rxstat & RX_STS_FRAME_TYPE_) &&
1183 (rxstat & RX_STS_LENGTH_ERR_)))
1184 dev->stats.rx_length_errors++;
1185 if (rxstat & RX_STS_MCAST_)
1186 dev->stats.multicast++;
1187 }
1188}
1189
1190/* Quickly dumps bad packets */
1191static void
1192smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktwords)
1193{
1194 if (likely(pktwords >= 4)) {
1195 unsigned int timeout = 500;
1196 unsigned int val;
1197 smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_);
1198 do {
1199 udelay(1);
1200 val = smsc911x_reg_read(pdata, RX_DP_CTRL);
1201 } while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout);
1202
1203 if (unlikely(timeout == 0))
1204 SMSC_WARN(pdata, hw, "Timed out waiting for "
1205 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val);
1206 } else {
1207 while (pktwords--)
1208 smsc911x_reg_read(pdata, RX_DATA_FIFO);
1209 }
1210}
1211
1212/* NAPI poll function */
1213static int smsc911x_poll(struct napi_struct *napi, int budget)
1214{
1215 struct smsc911x_data *pdata =
1216 container_of(napi, struct smsc911x_data, napi);
1217 struct net_device *dev = pdata->dev;
1218 int npackets = 0;
1219
1220 while (npackets < budget) {
1221 unsigned int pktlength;
1222 unsigned int pktwords;
1223 struct sk_buff *skb;
1224 unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata);
1225
1226 if (!rxstat) {
1227 unsigned int temp;
1228 /* We processed all packets available. Tell NAPI it can
1229 * stop polling then re-enable rx interrupts */
1230 smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_);
1231 napi_complete(napi);
1232 temp = smsc911x_reg_read(pdata, INT_EN);
1233 temp |= INT_EN_RSFL_EN_;
1234 smsc911x_reg_write(pdata, INT_EN, temp);
1235 break;
1236 }
1237
1238 /* Count packet for NAPI scheduling, even if it has an error.
1239 * Error packets still require cycles to discard */
1240 npackets++;
1241
1242 pktlength = ((rxstat & 0x3FFF0000) >> 16);
1243 pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2;
1244 smsc911x_rx_counterrors(dev, rxstat);
1245
1246 if (unlikely(rxstat & RX_STS_ES_)) {
1247 SMSC_WARN(pdata, rx_err,
1248 "Discarding packet with error bit set");
1249 /* Packet has an error, discard it and continue with
1250 * the next */
1251 smsc911x_rx_fastforward(pdata, pktwords);
1252 dev->stats.rx_dropped++;
1253 continue;
1254 }
1255
1256 skb = netdev_alloc_skb(dev, pktwords << 2);
1257 if (unlikely(!skb)) {
1258 SMSC_WARN(pdata, rx_err,
1259 "Unable to allocate skb for rx packet");
1260 /* Drop the packet and stop this polling iteration */
1261 smsc911x_rx_fastforward(pdata, pktwords);
1262 dev->stats.rx_dropped++;
1263 break;
1264 }
1265
1266 pdata->ops->rx_readfifo(pdata,
1267 (unsigned int *)skb->data, pktwords);
1268
1269 /* Align IP on 16B boundary */
1270 skb_reserve(skb, NET_IP_ALIGN);
1271 skb_put(skb, pktlength - 4);
1272 skb->protocol = eth_type_trans(skb, dev);
1273 skb_checksum_none_assert(skb);
1274 netif_receive_skb(skb);
1275
1276 /* Update counters */
1277 dev->stats.rx_packets++;
1278 dev->stats.rx_bytes += (pktlength - 4);
1279 }
1280
1281 /* Return total received packets */
1282 return npackets;
1283}
1284
1285/* Returns hash bit number for given MAC address
1286 * Example:
1287 * 01 00 5E 00 00 01 -> returns bit number 31 */
1288static unsigned int smsc911x_hash(char addr[ETH_ALEN])
1289{
1290 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
1291}
1292
1293static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata)
1294{
1295 /* Performs the multicast & mac_cr update. This is called when
1296 * safe on the current hardware, and with the mac_lock held */
1297 unsigned int mac_cr;
1298
1299 SMSC_ASSERT_MAC_LOCK(pdata);
1300
1301 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1302 mac_cr |= pdata->set_bits_mask;
1303 mac_cr &= ~(pdata->clear_bits_mask);
1304 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1305 smsc911x_mac_write(pdata, HASHH, pdata->hashhi);
1306 smsc911x_mac_write(pdata, HASHL, pdata->hashlo);
1307 SMSC_TRACE(pdata, hw, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1308 mac_cr, pdata->hashhi, pdata->hashlo);
1309}
1310
1311static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata)
1312{
1313 unsigned int mac_cr;
1314
1315 /* This function is only called for older LAN911x devices
1316 * (revA or revB), where MAC_CR, HASHH and HASHL should not
1317 * be modified during Rx - newer devices immediately update the
1318 * registers.
1319 *
1320 * This is called from interrupt context */
1321
1322 spin_lock(&pdata->mac_lock);
1323
1324 /* Check Rx has stopped */
1325 if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_)
1326 SMSC_WARN(pdata, drv, "Rx not stopped");
1327
1328 /* Perform the update - safe to do now Rx has stopped */
1329 smsc911x_rx_multicast_update(pdata);
1330
1331 /* Re-enable Rx */
1332 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1333 mac_cr |= MAC_CR_RXEN_;
1334 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1335
1336 pdata->multicast_update_pending = 0;
1337
1338 spin_unlock(&pdata->mac_lock);
1339}
1340
1341static int smsc911x_phy_general_power_up(struct smsc911x_data *pdata)
1342{
1343 struct net_device *ndev = pdata->dev;
1344 struct phy_device *phy_dev = ndev->phydev;
1345 int rc = 0;
1346
1347 if (!phy_dev)
1348 return rc;
1349
1350 /* If the internal PHY is in General Power-Down mode, all, except the
1351 * management interface, is powered-down and stays in that condition as
1352 * long as Phy register bit 0.11 is HIGH.
1353 *
1354 * In that case, clear the bit 0.11, so the PHY powers up and we can
1355 * access to the phy registers.
1356 */
1357 rc = phy_read(phy_dev, MII_BMCR);
1358 if (rc < 0) {
1359 SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1360 return rc;
1361 }
1362
1363 /* If the PHY general power-down bit is not set is not necessary to
1364 * disable the general power down-mode.
1365 */
1366 if (rc & BMCR_PDOWN) {
1367 rc = phy_write(phy_dev, MII_BMCR, rc & ~BMCR_PDOWN);
1368 if (rc < 0) {
1369 SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1370 return rc;
1371 }
1372
1373 usleep_range(1000, 1500);
1374 }
1375
1376 return 0;
1377}
1378
1379static int smsc911x_phy_disable_energy_detect(struct smsc911x_data *pdata)
1380{
1381 struct net_device *ndev = pdata->dev;
1382 struct phy_device *phy_dev = ndev->phydev;
1383 int rc = 0;
1384
1385 if (!phy_dev)
1386 return rc;
1387
1388 rc = phy_read(phy_dev, MII_LAN83C185_CTRL_STATUS);
1389
1390 if (rc < 0) {
1391 SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1392 return rc;
1393 }
1394
1395 /* Only disable if energy detect mode is already enabled */
1396 if (rc & MII_LAN83C185_EDPWRDOWN) {
1397 /* Disable energy detect mode for this SMSC Transceivers */
1398 rc = phy_write(phy_dev, MII_LAN83C185_CTRL_STATUS,
1399 rc & (~MII_LAN83C185_EDPWRDOWN));
1400
1401 if (rc < 0) {
1402 SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1403 return rc;
1404 }
1405 /* Allow PHY to wakeup */
1406 mdelay(2);
1407 }
1408
1409 return 0;
1410}
1411
1412static int smsc911x_phy_enable_energy_detect(struct smsc911x_data *pdata)
1413{
1414 struct net_device *ndev = pdata->dev;
1415 struct phy_device *phy_dev = ndev->phydev;
1416 int rc = 0;
1417
1418 if (!phy_dev)
1419 return rc;
1420
1421 rc = phy_read(phy_dev, MII_LAN83C185_CTRL_STATUS);
1422
1423 if (rc < 0) {
1424 SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1425 return rc;
1426 }
1427
1428 /* Only enable if energy detect mode is already disabled */
1429 if (!(rc & MII_LAN83C185_EDPWRDOWN)) {
1430 /* Enable energy detect mode for this SMSC Transceivers */
1431 rc = phy_write(phy_dev, MII_LAN83C185_CTRL_STATUS,
1432 rc | MII_LAN83C185_EDPWRDOWN);
1433
1434 if (rc < 0) {
1435 SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1436 return rc;
1437 }
1438 }
1439 return 0;
1440}
1441
1442static int smsc911x_soft_reset(struct smsc911x_data *pdata)
1443{
1444 unsigned int timeout;
1445 unsigned int temp;
1446 int ret;
1447 unsigned int reset_offset = HW_CFG;
1448 unsigned int reset_mask = HW_CFG_SRST_;
1449
1450 /*
1451 * Make sure to power-up the PHY chip before doing a reset, otherwise
1452 * the reset fails.
1453 */
1454 ret = smsc911x_phy_general_power_up(pdata);
1455 if (ret) {
1456 SMSC_WARN(pdata, drv, "Failed to power-up the PHY chip");
1457 return ret;
1458 }
1459
1460 /*
1461 * LAN9210/LAN9211/LAN9220/LAN9221 chips have an internal PHY that
1462 * are initialized in a Energy Detect Power-Down mode that prevents
1463 * the MAC chip to be software reseted. So we have to wakeup the PHY
1464 * before.
1465 */
1466 if (pdata->generation == 4) {
1467 ret = smsc911x_phy_disable_energy_detect(pdata);
1468
1469 if (ret) {
1470 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
1471 return ret;
1472 }
1473 }
1474
1475 if ((pdata->idrev & 0xFFFF0000) == LAN9250) {
1476 /* special reset for LAN9250 */
1477 reset_offset = RESET_CTL;
1478 reset_mask = RESET_CTL_DIGITAL_RST_;
1479 }
1480
1481 /* Reset the LAN911x */
1482 smsc911x_reg_write(pdata, reset_offset, reset_mask);
1483
1484 /* verify reset bit is cleared */
1485 timeout = 10;
1486 do {
1487 udelay(10);
1488 temp = smsc911x_reg_read(pdata, reset_offset);
1489 } while ((--timeout) && (temp & reset_mask));
1490
1491 if (unlikely(temp & reset_mask)) {
1492 SMSC_WARN(pdata, drv, "Failed to complete reset");
1493 return -EIO;
1494 }
1495
1496 if (pdata->generation == 4) {
1497 ret = smsc911x_phy_enable_energy_detect(pdata);
1498
1499 if (ret) {
1500 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
1501 return ret;
1502 }
1503 }
1504
1505 return 0;
1506}
1507
1508/* Sets the device MAC address to dev_addr, called with mac_lock held */
1509static void
1510smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, const u8 dev_addr[6])
1511{
1512 u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4];
1513 u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
1514 (dev_addr[1] << 8) | dev_addr[0];
1515
1516 SMSC_ASSERT_MAC_LOCK(pdata);
1517
1518 smsc911x_mac_write(pdata, ADDRH, mac_high16);
1519 smsc911x_mac_write(pdata, ADDRL, mac_low32);
1520}
1521
1522static void smsc911x_disable_irq_chip(struct net_device *dev)
1523{
1524 struct smsc911x_data *pdata = netdev_priv(dev);
1525
1526 smsc911x_reg_write(pdata, INT_EN, 0);
1527 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
1528}
1529
1530static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id)
1531{
1532 struct net_device *dev = dev_id;
1533 struct smsc911x_data *pdata = netdev_priv(dev);
1534 u32 intsts = smsc911x_reg_read(pdata, INT_STS);
1535 u32 inten = smsc911x_reg_read(pdata, INT_EN);
1536 int serviced = IRQ_NONE;
1537 u32 temp;
1538
1539 if (unlikely(intsts & inten & INT_STS_SW_INT_)) {
1540 temp = smsc911x_reg_read(pdata, INT_EN);
1541 temp &= (~INT_EN_SW_INT_EN_);
1542 smsc911x_reg_write(pdata, INT_EN, temp);
1543 smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_);
1544 pdata->software_irq_signal = 1;
1545 smp_wmb();
1546 serviced = IRQ_HANDLED;
1547 }
1548
1549 if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) {
1550 /* Called when there is a multicast update scheduled and
1551 * it is now safe to complete the update */
1552 SMSC_TRACE(pdata, intr, "RX Stop interrupt");
1553 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_);
1554 if (pdata->multicast_update_pending)
1555 smsc911x_rx_multicast_update_workaround(pdata);
1556 serviced = IRQ_HANDLED;
1557 }
1558
1559 if (intsts & inten & INT_STS_TDFA_) {
1560 temp = smsc911x_reg_read(pdata, FIFO_INT);
1561 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1562 smsc911x_reg_write(pdata, FIFO_INT, temp);
1563 smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_);
1564 netif_wake_queue(dev);
1565 serviced = IRQ_HANDLED;
1566 }
1567
1568 if (unlikely(intsts & inten & INT_STS_RXE_)) {
1569 SMSC_TRACE(pdata, intr, "RX Error interrupt");
1570 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_);
1571 serviced = IRQ_HANDLED;
1572 }
1573
1574 if (likely(intsts & inten & INT_STS_RSFL_)) {
1575 if (likely(napi_schedule_prep(&pdata->napi))) {
1576 /* Disable Rx interrupts */
1577 temp = smsc911x_reg_read(pdata, INT_EN);
1578 temp &= (~INT_EN_RSFL_EN_);
1579 smsc911x_reg_write(pdata, INT_EN, temp);
1580 /* Schedule a NAPI poll */
1581 __napi_schedule(&pdata->napi);
1582 } else {
1583 SMSC_WARN(pdata, rx_err, "napi_schedule_prep failed");
1584 }
1585 serviced = IRQ_HANDLED;
1586 }
1587
1588 return serviced;
1589}
1590
1591static int smsc911x_open(struct net_device *dev)
1592{
1593 struct smsc911x_data *pdata = netdev_priv(dev);
1594 unsigned int timeout;
1595 unsigned int temp;
1596 unsigned int intcfg;
1597 int retval;
1598 int irq_flags;
1599
1600 pm_runtime_get_sync(dev->dev.parent);
1601
1602 /* find and start the given phy */
1603 if (!dev->phydev) {
1604 retval = smsc911x_mii_probe(dev);
1605 if (retval < 0) {
1606 SMSC_WARN(pdata, probe, "Error starting phy");
1607 goto out;
1608 }
1609 }
1610
1611 /* Reset the LAN911x */
1612 retval = smsc911x_soft_reset(pdata);
1613 if (retval) {
1614 SMSC_WARN(pdata, hw, "soft reset failed");
1615 goto mii_free_out;
1616 }
1617
1618 smsc911x_reg_write(pdata, HW_CFG, 0x00050000);
1619 smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740);
1620
1621 /* Increase the legal frame size of VLAN tagged frames to 1522 bytes */
1622 spin_lock_irq(&pdata->mac_lock);
1623 smsc911x_mac_write(pdata, VLAN1, ETH_P_8021Q);
1624 spin_unlock_irq(&pdata->mac_lock);
1625
1626 /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1627 timeout = 50;
1628 while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) &&
1629 --timeout) {
1630 udelay(10);
1631 }
1632
1633 if (unlikely(timeout == 0))
1634 SMSC_WARN(pdata, ifup,
1635 "Timed out waiting for EEPROM busy bit to clear");
1636
1637 smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
1638
1639 /* The soft reset above cleared the device's MAC address,
1640 * restore it from local copy (set in probe) */
1641 spin_lock_irq(&pdata->mac_lock);
1642 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1643 spin_unlock_irq(&pdata->mac_lock);
1644
1645 /* Initialise irqs, but leave all sources disabled */
1646 smsc911x_disable_irq_chip(dev);
1647
1648 /* Set interrupt deassertion to 100uS */
1649 intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
1650
1651 if (pdata->config.irq_polarity) {
1652 SMSC_TRACE(pdata, ifup, "irq polarity: active high");
1653 intcfg |= INT_CFG_IRQ_POL_;
1654 } else {
1655 SMSC_TRACE(pdata, ifup, "irq polarity: active low");
1656 }
1657
1658 if (pdata->config.irq_type) {
1659 SMSC_TRACE(pdata, ifup, "irq type: push-pull");
1660 intcfg |= INT_CFG_IRQ_TYPE_;
1661 } else {
1662 SMSC_TRACE(pdata, ifup, "irq type: open drain");
1663 }
1664
1665 smsc911x_reg_write(pdata, INT_CFG, intcfg);
1666
1667 SMSC_TRACE(pdata, ifup, "Testing irq handler using IRQ %d", dev->irq);
1668 pdata->software_irq_signal = 0;
1669 smp_wmb();
1670
1671 irq_flags = irq_get_trigger_type(dev->irq);
1672 retval = request_irq(dev->irq, smsc911x_irqhandler,
1673 irq_flags | IRQF_SHARED, dev->name, dev);
1674 if (retval) {
1675 SMSC_WARN(pdata, probe,
1676 "Unable to claim requested irq: %d", dev->irq);
1677 goto mii_free_out;
1678 }
1679
1680 temp = smsc911x_reg_read(pdata, INT_EN);
1681 temp |= INT_EN_SW_INT_EN_;
1682 smsc911x_reg_write(pdata, INT_EN, temp);
1683
1684 timeout = 1000;
1685 while (timeout--) {
1686 if (pdata->software_irq_signal)
1687 break;
1688 msleep(1);
1689 }
1690
1691 if (!pdata->software_irq_signal) {
1692 netdev_warn(dev, "ISR failed signaling test (IRQ %d)\n",
1693 dev->irq);
1694 retval = -ENODEV;
1695 goto irq_stop_out;
1696 }
1697 SMSC_TRACE(pdata, ifup, "IRQ handler passed test using IRQ %d",
1698 dev->irq);
1699
1700 netdev_info(dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1701 (unsigned long)pdata->ioaddr, dev->irq);
1702
1703 /* Reset the last known duplex and carrier */
1704 pdata->last_duplex = -1;
1705 pdata->last_carrier = -1;
1706
1707 /* Bring the PHY up */
1708 phy_start(dev->phydev);
1709
1710 temp = smsc911x_reg_read(pdata, HW_CFG);
1711 /* Preserve TX FIFO size and external PHY configuration */
1712 temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF);
1713 temp |= HW_CFG_SF_;
1714 smsc911x_reg_write(pdata, HW_CFG, temp);
1715
1716 temp = smsc911x_reg_read(pdata, FIFO_INT);
1717 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1718 temp &= ~(FIFO_INT_RX_STS_LEVEL_);
1719 smsc911x_reg_write(pdata, FIFO_INT, temp);
1720
1721 /* set RX Data offset to 2 bytes for alignment */
1722 smsc911x_reg_write(pdata, RX_CFG, (NET_IP_ALIGN << 8));
1723
1724 /* enable NAPI polling before enabling RX interrupts */
1725 napi_enable(&pdata->napi);
1726
1727 temp = smsc911x_reg_read(pdata, INT_EN);
1728 temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_);
1729 smsc911x_reg_write(pdata, INT_EN, temp);
1730
1731 spin_lock_irq(&pdata->mac_lock);
1732 temp = smsc911x_mac_read(pdata, MAC_CR);
1733 temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
1734 smsc911x_mac_write(pdata, MAC_CR, temp);
1735 spin_unlock_irq(&pdata->mac_lock);
1736
1737 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
1738
1739 netif_start_queue(dev);
1740 return 0;
1741
1742irq_stop_out:
1743 free_irq(dev->irq, dev);
1744mii_free_out:
1745 phy_disconnect(dev->phydev);
1746out:
1747 pm_runtime_put(dev->dev.parent);
1748 return retval;
1749}
1750
1751/* Entry point for stopping the interface */
1752static int smsc911x_stop(struct net_device *dev)
1753{
1754 struct smsc911x_data *pdata = netdev_priv(dev);
1755 unsigned int temp;
1756
1757 /* Disable all device interrupts */
1758 temp = smsc911x_reg_read(pdata, INT_CFG);
1759 temp &= ~INT_CFG_IRQ_EN_;
1760 smsc911x_reg_write(pdata, INT_CFG, temp);
1761
1762 /* Stop Tx and Rx polling */
1763 netif_stop_queue(dev);
1764 napi_disable(&pdata->napi);
1765
1766 /* At this point all Rx and Tx activity is stopped */
1767 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1768 smsc911x_tx_update_txcounters(dev);
1769
1770 free_irq(dev->irq, dev);
1771
1772 /* Bring the PHY down */
1773 if (dev->phydev) {
1774 phy_stop(dev->phydev);
1775 phy_disconnect(dev->phydev);
1776 }
1777 netif_carrier_off(dev);
1778 pm_runtime_put(dev->dev.parent);
1779
1780 SMSC_TRACE(pdata, ifdown, "Interface stopped");
1781 return 0;
1782}
1783
1784/* Entry point for transmitting a packet */
1785static netdev_tx_t
1786smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1787{
1788 struct smsc911x_data *pdata = netdev_priv(dev);
1789 unsigned int freespace;
1790 unsigned int tx_cmd_a;
1791 unsigned int tx_cmd_b;
1792 unsigned int temp;
1793 u32 wrsz;
1794 ulong bufp;
1795
1796 freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_;
1797
1798 if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD))
1799 SMSC_WARN(pdata, tx_err,
1800 "Tx data fifo low, space available: %d", freespace);
1801
1802 /* Word alignment adjustment */
1803 tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16;
1804 tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
1805 tx_cmd_a |= (unsigned int)skb->len;
1806
1807 tx_cmd_b = ((unsigned int)skb->len) << 16;
1808 tx_cmd_b |= (unsigned int)skb->len;
1809
1810 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a);
1811 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b);
1812
1813 bufp = (ulong)skb->data & (~0x3);
1814 wrsz = (u32)skb->len + 3;
1815 wrsz += (u32)((ulong)skb->data & 0x3);
1816 wrsz >>= 2;
1817
1818 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
1819 freespace -= (skb->len + 32);
1820 skb_tx_timestamp(skb);
1821 dev_consume_skb_any(skb);
1822
1823 if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30))
1824 smsc911x_tx_update_txcounters(dev);
1825
1826 if (freespace < TX_FIFO_LOW_THRESHOLD) {
1827 netif_stop_queue(dev);
1828 temp = smsc911x_reg_read(pdata, FIFO_INT);
1829 temp &= 0x00FFFFFF;
1830 temp |= 0x32000000;
1831 smsc911x_reg_write(pdata, FIFO_INT, temp);
1832 }
1833
1834 return NETDEV_TX_OK;
1835}
1836
1837/* Entry point for getting status counters */
1838static struct net_device_stats *smsc911x_get_stats(struct net_device *dev)
1839{
1840 struct smsc911x_data *pdata = netdev_priv(dev);
1841 smsc911x_tx_update_txcounters(dev);
1842 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1843 return &dev->stats;
1844}
1845
1846/* Entry point for setting addressing modes */
1847static void smsc911x_set_multicast_list(struct net_device *dev)
1848{
1849 struct smsc911x_data *pdata = netdev_priv(dev);
1850 unsigned long flags;
1851
1852 if (dev->flags & IFF_PROMISC) {
1853 /* Enabling promiscuous mode */
1854 pdata->set_bits_mask = MAC_CR_PRMS_;
1855 pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1856 pdata->hashhi = 0;
1857 pdata->hashlo = 0;
1858 } else if (dev->flags & IFF_ALLMULTI) {
1859 /* Enabling all multicast mode */
1860 pdata->set_bits_mask = MAC_CR_MCPAS_;
1861 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_);
1862 pdata->hashhi = 0;
1863 pdata->hashlo = 0;
1864 } else if (!netdev_mc_empty(dev)) {
1865 /* Enabling specific multicast addresses */
1866 unsigned int hash_high = 0;
1867 unsigned int hash_low = 0;
1868 struct netdev_hw_addr *ha;
1869
1870 pdata->set_bits_mask = MAC_CR_HPFILT_;
1871 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1872
1873 netdev_for_each_mc_addr(ha, dev) {
1874 unsigned int bitnum = smsc911x_hash(ha->addr);
1875 unsigned int mask = 0x01 << (bitnum & 0x1F);
1876
1877 if (bitnum & 0x20)
1878 hash_high |= mask;
1879 else
1880 hash_low |= mask;
1881 }
1882
1883 pdata->hashhi = hash_high;
1884 pdata->hashlo = hash_low;
1885 } else {
1886 /* Enabling local MAC address only */
1887 pdata->set_bits_mask = 0;
1888 pdata->clear_bits_mask =
1889 (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1890 pdata->hashhi = 0;
1891 pdata->hashlo = 0;
1892 }
1893
1894 spin_lock_irqsave(&pdata->mac_lock, flags);
1895
1896 if (pdata->generation <= 1) {
1897 /* Older hardware revision - cannot change these flags while
1898 * receiving data */
1899 if (!pdata->multicast_update_pending) {
1900 unsigned int temp;
1901 SMSC_TRACE(pdata, hw, "scheduling mcast update");
1902 pdata->multicast_update_pending = 1;
1903
1904 /* Request the hardware to stop, then perform the
1905 * update when we get an RX_STOP interrupt */
1906 temp = smsc911x_mac_read(pdata, MAC_CR);
1907 temp &= ~(MAC_CR_RXEN_);
1908 smsc911x_mac_write(pdata, MAC_CR, temp);
1909 } else {
1910 /* There is another update pending, this should now
1911 * use the newer values */
1912 }
1913 } else {
1914 /* Newer hardware revision - can write immediately */
1915 smsc911x_rx_multicast_update(pdata);
1916 }
1917
1918 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1919}
1920
1921#ifdef CONFIG_NET_POLL_CONTROLLER
1922static void smsc911x_poll_controller(struct net_device *dev)
1923{
1924 disable_irq(dev->irq);
1925 smsc911x_irqhandler(0, dev);
1926 enable_irq(dev->irq);
1927}
1928#endif /* CONFIG_NET_POLL_CONTROLLER */
1929
1930static int smsc911x_set_mac_address(struct net_device *dev, void *p)
1931{
1932 struct smsc911x_data *pdata = netdev_priv(dev);
1933 struct sockaddr *addr = p;
1934
1935 /* On older hardware revisions we cannot change the mac address
1936 * registers while receiving data. Newer devices can safely change
1937 * this at any time. */
1938 if (pdata->generation <= 1 && netif_running(dev))
1939 return -EBUSY;
1940
1941 if (!is_valid_ether_addr(addr->sa_data))
1942 return -EADDRNOTAVAIL;
1943
1944 eth_hw_addr_set(dev, addr->sa_data);
1945
1946 spin_lock_irq(&pdata->mac_lock);
1947 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1948 spin_unlock_irq(&pdata->mac_lock);
1949
1950 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
1951
1952 return 0;
1953}
1954
1955static void smsc911x_ethtool_getdrvinfo(struct net_device *dev,
1956 struct ethtool_drvinfo *info)
1957{
1958 strscpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver));
1959 strscpy(info->version, SMSC_DRV_VERSION, sizeof(info->version));
1960 strscpy(info->bus_info, dev_name(dev->dev.parent),
1961 sizeof(info->bus_info));
1962}
1963
1964static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev)
1965{
1966 struct smsc911x_data *pdata = netdev_priv(dev);
1967 return pdata->msg_enable;
1968}
1969
1970static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1971{
1972 struct smsc911x_data *pdata = netdev_priv(dev);
1973 pdata->msg_enable = level;
1974}
1975
1976static int smsc911x_ethtool_getregslen(struct net_device *dev)
1977{
1978 return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) *
1979 sizeof(u32);
1980}
1981
1982static void
1983smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs,
1984 void *buf)
1985{
1986 struct smsc911x_data *pdata = netdev_priv(dev);
1987 struct phy_device *phy_dev = dev->phydev;
1988 unsigned long flags;
1989 unsigned int i;
1990 unsigned int j = 0;
1991 u32 *data = buf;
1992
1993 regs->version = pdata->idrev;
1994 for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32)))
1995 data[j++] = smsc911x_reg_read(pdata, i);
1996
1997 for (i = MAC_CR; i <= WUCSR; i++) {
1998 spin_lock_irqsave(&pdata->mac_lock, flags);
1999 data[j++] = smsc911x_mac_read(pdata, i);
2000 spin_unlock_irqrestore(&pdata->mac_lock, flags);
2001 }
2002
2003 for (i = 0; i <= 31; i++)
2004 data[j++] = smsc911x_mii_read(phy_dev->mdio.bus,
2005 phy_dev->mdio.addr, i);
2006}
2007
2008static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata)
2009{
2010 unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG);
2011 temp &= ~GPIO_CFG_EEPR_EN_;
2012 smsc911x_reg_write(pdata, GPIO_CFG, temp);
2013 msleep(1);
2014}
2015
2016static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op)
2017{
2018 int timeout = 100;
2019 u32 e2cmd;
2020
2021 SMSC_TRACE(pdata, drv, "op 0x%08x", op);
2022 if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
2023 SMSC_WARN(pdata, drv, "Busy at start");
2024 return -EBUSY;
2025 }
2026
2027 e2cmd = op | E2P_CMD_EPC_BUSY_;
2028 smsc911x_reg_write(pdata, E2P_CMD, e2cmd);
2029
2030 do {
2031 msleep(1);
2032 e2cmd = smsc911x_reg_read(pdata, E2P_CMD);
2033 } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout));
2034
2035 if (!timeout) {
2036 SMSC_TRACE(pdata, drv, "TIMED OUT");
2037 return -EAGAIN;
2038 }
2039
2040 if (e2cmd & E2P_CMD_EPC_TIMEOUT_) {
2041 SMSC_TRACE(pdata, drv, "Error occurred during eeprom operation");
2042 return -EINVAL;
2043 }
2044
2045 return 0;
2046}
2047
2048static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata,
2049 u8 address, u8 *data)
2050{
2051 u32 op = E2P_CMD_EPC_CMD_READ_ | address;
2052 int ret;
2053
2054 SMSC_TRACE(pdata, drv, "address 0x%x", address);
2055 ret = smsc911x_eeprom_send_cmd(pdata, op);
2056
2057 if (!ret)
2058 data[address] = smsc911x_reg_read(pdata, E2P_DATA);
2059
2060 return ret;
2061}
2062
2063static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata,
2064 u8 address, u8 data)
2065{
2066 u32 op = E2P_CMD_EPC_CMD_ERASE_ | address;
2067 int ret;
2068
2069 SMSC_TRACE(pdata, drv, "address 0x%x, data 0x%x", address, data);
2070 ret = smsc911x_eeprom_send_cmd(pdata, op);
2071
2072 if (!ret) {
2073 op = E2P_CMD_EPC_CMD_WRITE_ | address;
2074 smsc911x_reg_write(pdata, E2P_DATA, (u32)data);
2075
2076 /* Workaround for hardware read-after-write restriction */
2077 smsc911x_reg_read(pdata, BYTE_TEST);
2078
2079 ret = smsc911x_eeprom_send_cmd(pdata, op);
2080 }
2081
2082 return ret;
2083}
2084
2085static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev)
2086{
2087 return SMSC911X_EEPROM_SIZE;
2088}
2089
2090static int smsc911x_ethtool_get_eeprom(struct net_device *dev,
2091 struct ethtool_eeprom *eeprom, u8 *data)
2092{
2093 struct smsc911x_data *pdata = netdev_priv(dev);
2094 u8 eeprom_data[SMSC911X_EEPROM_SIZE];
2095 int len;
2096 int i;
2097
2098 smsc911x_eeprom_enable_access(pdata);
2099
2100 len = min(eeprom->len, SMSC911X_EEPROM_SIZE);
2101 for (i = 0; i < len; i++) {
2102 int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data);
2103 if (ret < 0) {
2104 eeprom->len = 0;
2105 return ret;
2106 }
2107 }
2108
2109 memcpy(data, &eeprom_data[eeprom->offset], len);
2110 eeprom->len = len;
2111 return 0;
2112}
2113
2114static int smsc911x_ethtool_set_eeprom(struct net_device *dev,
2115 struct ethtool_eeprom *eeprom, u8 *data)
2116{
2117 int ret;
2118 struct smsc911x_data *pdata = netdev_priv(dev);
2119
2120 smsc911x_eeprom_enable_access(pdata);
2121 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_);
2122 ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data);
2123 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_);
2124
2125 /* Single byte write, according to man page */
2126 eeprom->len = 1;
2127
2128 return ret;
2129}
2130
2131static const struct ethtool_ops smsc911x_ethtool_ops = {
2132 .get_link = ethtool_op_get_link,
2133 .get_drvinfo = smsc911x_ethtool_getdrvinfo,
2134 .nway_reset = phy_ethtool_nway_reset,
2135 .get_msglevel = smsc911x_ethtool_getmsglevel,
2136 .set_msglevel = smsc911x_ethtool_setmsglevel,
2137 .get_regs_len = smsc911x_ethtool_getregslen,
2138 .get_regs = smsc911x_ethtool_getregs,
2139 .get_eeprom_len = smsc911x_ethtool_get_eeprom_len,
2140 .get_eeprom = smsc911x_ethtool_get_eeprom,
2141 .set_eeprom = smsc911x_ethtool_set_eeprom,
2142 .get_ts_info = ethtool_op_get_ts_info,
2143 .get_link_ksettings = phy_ethtool_get_link_ksettings,
2144 .set_link_ksettings = phy_ethtool_set_link_ksettings,
2145};
2146
2147static const struct net_device_ops smsc911x_netdev_ops = {
2148 .ndo_open = smsc911x_open,
2149 .ndo_stop = smsc911x_stop,
2150 .ndo_start_xmit = smsc911x_hard_start_xmit,
2151 .ndo_get_stats = smsc911x_get_stats,
2152 .ndo_set_rx_mode = smsc911x_set_multicast_list,
2153 .ndo_eth_ioctl = phy_do_ioctl_running,
2154 .ndo_validate_addr = eth_validate_addr,
2155 .ndo_set_mac_address = smsc911x_set_mac_address,
2156#ifdef CONFIG_NET_POLL_CONTROLLER
2157 .ndo_poll_controller = smsc911x_poll_controller,
2158#endif
2159};
2160
2161/* copies the current mac address from hardware to dev->dev_addr */
2162static void smsc911x_read_mac_address(struct net_device *dev)
2163{
2164 struct smsc911x_data *pdata = netdev_priv(dev);
2165 u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH);
2166 u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL);
2167 u8 addr[ETH_ALEN];
2168
2169 addr[0] = (u8)(mac_low32);
2170 addr[1] = (u8)(mac_low32 >> 8);
2171 addr[2] = (u8)(mac_low32 >> 16);
2172 addr[3] = (u8)(mac_low32 >> 24);
2173 addr[4] = (u8)(mac_high16);
2174 addr[5] = (u8)(mac_high16 >> 8);
2175 eth_hw_addr_set(dev, addr);
2176}
2177
2178/* Initializing private device structures, only called from probe */
2179static int smsc911x_init(struct net_device *dev)
2180{
2181 struct smsc911x_data *pdata = netdev_priv(dev);
2182 unsigned int byte_test, mask;
2183 unsigned int to = 100;
2184
2185 SMSC_TRACE(pdata, probe, "Driver Parameters:");
2186 SMSC_TRACE(pdata, probe, "LAN base: 0x%08lX",
2187 (unsigned long)pdata->ioaddr);
2188 SMSC_TRACE(pdata, probe, "IRQ: %d", dev->irq);
2189 SMSC_TRACE(pdata, probe, "PHY will be autodetected.");
2190
2191 spin_lock_init(&pdata->dev_lock);
2192 spin_lock_init(&pdata->mac_lock);
2193
2194 if (pdata->ioaddr == NULL) {
2195 SMSC_WARN(pdata, probe, "pdata->ioaddr: 0x00000000");
2196 return -ENODEV;
2197 }
2198
2199 /*
2200 * poll the READY bit in PMT_CTRL. Any other access to the device is
2201 * forbidden while this bit isn't set. Try for 100ms
2202 *
2203 * Note that this test is done before the WORD_SWAP register is
2204 * programmed. So in some configurations the READY bit is at 16 before
2205 * WORD_SWAP is written to. This issue is worked around by waiting
2206 * until either bit 0 or bit 16 gets set in PMT_CTRL.
2207 *
2208 * SMSC has confirmed that checking bit 16 (marked as reserved in
2209 * the datasheet) is fine since these bits "will either never be set
2210 * or can only go high after READY does (so also indicate the device
2211 * is ready)".
2212 */
2213
2214 mask = PMT_CTRL_READY_ | swahw32(PMT_CTRL_READY_);
2215 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & mask) && --to)
2216 udelay(1000);
2217
2218 if (to == 0) {
2219 netdev_err(dev, "Device not READY in 100ms aborting\n");
2220 return -ENODEV;
2221 }
2222
2223 /* Check byte ordering */
2224 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2225 SMSC_TRACE(pdata, probe, "BYTE_TEST: 0x%08X", byte_test);
2226 if (byte_test == 0x43218765) {
2227 SMSC_TRACE(pdata, probe, "BYTE_TEST looks swapped, "
2228 "applying WORD_SWAP");
2229 smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff);
2230
2231 /* 1 dummy read of BYTE_TEST is needed after a write to
2232 * WORD_SWAP before its contents are valid */
2233 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2234
2235 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2236 }
2237
2238 if (byte_test != 0x87654321) {
2239 SMSC_WARN(pdata, drv, "BYTE_TEST: 0x%08X", byte_test);
2240 if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) {
2241 SMSC_WARN(pdata, probe,
2242 "top 16 bits equal to bottom 16 bits");
2243 SMSC_TRACE(pdata, probe,
2244 "This may mean the chip is set "
2245 "for 32 bit while the bus is reading 16 bit");
2246 }
2247 return -ENODEV;
2248 }
2249
2250 /* Default generation to zero (all workarounds apply) */
2251 pdata->generation = 0;
2252
2253 pdata->idrev = smsc911x_reg_read(pdata, ID_REV);
2254 switch (pdata->idrev & 0xFFFF0000) {
2255 case LAN9118:
2256 case LAN9117:
2257 case LAN9116:
2258 case LAN9115:
2259 case LAN89218:
2260 /* LAN911[5678] family */
2261 pdata->generation = pdata->idrev & 0x0000FFFF;
2262 break;
2263
2264 case LAN9218:
2265 case LAN9217:
2266 case LAN9216:
2267 case LAN9215:
2268 /* LAN921[5678] family */
2269 pdata->generation = 3;
2270 break;
2271
2272 case LAN9210:
2273 case LAN9211:
2274 case LAN9220:
2275 case LAN9221:
2276 case LAN9250:
2277 /* LAN9210/LAN9211/LAN9220/LAN9221/LAN9250 */
2278 pdata->generation = 4;
2279 break;
2280
2281 default:
2282 SMSC_WARN(pdata, probe, "LAN911x not identified, idrev: 0x%08X",
2283 pdata->idrev);
2284 return -ENODEV;
2285 }
2286
2287 SMSC_TRACE(pdata, probe,
2288 "LAN911x identified, idrev: 0x%08X, generation: %d",
2289 pdata->idrev, pdata->generation);
2290
2291 if (pdata->generation == 0)
2292 SMSC_WARN(pdata, probe,
2293 "This driver is not intended for this chip revision");
2294
2295 /* workaround for platforms without an eeprom, where the mac address
2296 * is stored elsewhere and set by the bootloader. This saves the
2297 * mac address before resetting the device */
2298 if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS) {
2299 spin_lock_irq(&pdata->mac_lock);
2300 smsc911x_read_mac_address(dev);
2301 spin_unlock_irq(&pdata->mac_lock);
2302 }
2303
2304 /* Reset the LAN911x */
2305 if (smsc911x_phy_reset(pdata) || smsc911x_soft_reset(pdata))
2306 return -ENODEV;
2307
2308 dev->flags |= IFF_MULTICAST;
2309 netif_napi_add_weight(dev, &pdata->napi, smsc911x_poll,
2310 SMSC_NAPI_WEIGHT);
2311 dev->netdev_ops = &smsc911x_netdev_ops;
2312 dev->ethtool_ops = &smsc911x_ethtool_ops;
2313
2314 return 0;
2315}
2316
2317static void smsc911x_drv_remove(struct platform_device *pdev)
2318{
2319 struct net_device *dev;
2320 struct smsc911x_data *pdata;
2321 struct resource *res;
2322
2323 dev = platform_get_drvdata(pdev);
2324 BUG_ON(!dev);
2325 pdata = netdev_priv(dev);
2326 BUG_ON(!pdata);
2327 BUG_ON(!pdata->ioaddr);
2328
2329 SMSC_TRACE(pdata, ifdown, "Stopping driver");
2330
2331 unregister_netdev(dev);
2332
2333 mdiobus_unregister(pdata->mii_bus);
2334 mdiobus_free(pdata->mii_bus);
2335
2336 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2337 "smsc911x-memory");
2338 if (!res)
2339 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2340
2341 release_mem_region(res->start, resource_size(res));
2342
2343 iounmap(pdata->ioaddr);
2344
2345 (void)smsc911x_disable_resources(pdev);
2346 smsc911x_free_resources(pdev);
2347
2348 free_netdev(dev);
2349
2350 pm_runtime_disable(&pdev->dev);
2351}
2352
2353/* standard register acces */
2354static const struct smsc911x_ops standard_smsc911x_ops = {
2355 .reg_read = __smsc911x_reg_read,
2356 .reg_write = __smsc911x_reg_write,
2357 .rx_readfifo = smsc911x_rx_readfifo,
2358 .tx_writefifo = smsc911x_tx_writefifo,
2359};
2360
2361/* shifted register access */
2362static const struct smsc911x_ops shifted_smsc911x_ops = {
2363 .reg_read = __smsc911x_reg_read_shift,
2364 .reg_write = __smsc911x_reg_write_shift,
2365 .rx_readfifo = smsc911x_rx_readfifo_shift,
2366 .tx_writefifo = smsc911x_tx_writefifo_shift,
2367};
2368
2369static int smsc911x_probe_config(struct smsc911x_platform_config *config,
2370 struct device *dev)
2371{
2372 int phy_interface;
2373 u32 width = 0;
2374 int err;
2375
2376 phy_interface = device_get_phy_mode(dev);
2377 if (phy_interface < 0)
2378 phy_interface = PHY_INTERFACE_MODE_NA;
2379 config->phy_interface = phy_interface;
2380
2381 device_get_mac_address(dev, config->mac);
2382
2383 err = device_property_read_u32(dev, "reg-io-width", &width);
2384 if (err == -ENXIO)
2385 return err;
2386 if (!err && width == 4)
2387 config->flags |= SMSC911X_USE_32BIT;
2388 else
2389 config->flags |= SMSC911X_USE_16BIT;
2390
2391 device_property_read_u32(dev, "reg-shift", &config->shift);
2392
2393 if (device_property_present(dev, "smsc,irq-active-high"))
2394 config->irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH;
2395
2396 if (device_property_present(dev, "smsc,irq-push-pull"))
2397 config->irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL;
2398
2399 if (device_property_present(dev, "smsc,force-internal-phy"))
2400 config->flags |= SMSC911X_FORCE_INTERNAL_PHY;
2401
2402 if (device_property_present(dev, "smsc,force-external-phy"))
2403 config->flags |= SMSC911X_FORCE_EXTERNAL_PHY;
2404
2405 if (device_property_present(dev, "smsc,save-mac-address"))
2406 config->flags |= SMSC911X_SAVE_MAC_ADDRESS;
2407
2408 return 0;
2409}
2410
2411static int smsc911x_drv_probe(struct platform_device *pdev)
2412{
2413 struct net_device *dev;
2414 struct smsc911x_data *pdata;
2415 struct smsc911x_platform_config *config = dev_get_platdata(&pdev->dev);
2416 struct resource *res;
2417 int res_size, irq;
2418 int retval;
2419
2420 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2421 "smsc911x-memory");
2422 if (!res)
2423 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2424 if (!res) {
2425 pr_warn("Could not allocate resource\n");
2426 retval = -ENODEV;
2427 goto out_0;
2428 }
2429 res_size = resource_size(res);
2430
2431 irq = platform_get_irq(pdev, 0);
2432 if (irq == -EPROBE_DEFER) {
2433 retval = -EPROBE_DEFER;
2434 goto out_0;
2435 } else if (irq < 0) {
2436 pr_warn("Could not allocate irq resource\n");
2437 retval = -ENODEV;
2438 goto out_0;
2439 }
2440
2441 if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) {
2442 retval = -EBUSY;
2443 goto out_0;
2444 }
2445
2446 dev = alloc_etherdev(sizeof(struct smsc911x_data));
2447 if (!dev) {
2448 retval = -ENOMEM;
2449 goto out_release_io_1;
2450 }
2451
2452 SET_NETDEV_DEV(dev, &pdev->dev);
2453
2454 pdata = netdev_priv(dev);
2455 dev->irq = irq;
2456 pdata->ioaddr = ioremap(res->start, res_size);
2457 if (!pdata->ioaddr) {
2458 retval = -ENOMEM;
2459 goto out_ioremap_fail;
2460 }
2461
2462 pdata->dev = dev;
2463 pdata->msg_enable = ((1 << debug) - 1);
2464
2465 platform_set_drvdata(pdev, dev);
2466
2467 retval = smsc911x_request_resources(pdev);
2468 if (retval)
2469 goto out_request_resources_fail;
2470
2471 retval = smsc911x_enable_resources(pdev);
2472 if (retval)
2473 goto out_enable_resources_fail;
2474
2475 if (pdata->ioaddr == NULL) {
2476 SMSC_WARN(pdata, probe, "Error smsc911x base address invalid");
2477 retval = -ENOMEM;
2478 goto out_disable_resources;
2479 }
2480
2481 retval = smsc911x_probe_config(&pdata->config, &pdev->dev);
2482 if (retval && config) {
2483 /* copy config parameters across to pdata */
2484 memcpy(&pdata->config, config, sizeof(pdata->config));
2485 retval = 0;
2486 }
2487
2488 if (retval) {
2489 SMSC_WARN(pdata, probe, "Error smsc911x config not found");
2490 goto out_disable_resources;
2491 }
2492
2493 /* assume standard, non-shifted, access to HW registers */
2494 pdata->ops = &standard_smsc911x_ops;
2495 /* apply the right access if shifting is needed */
2496 if (pdata->config.shift)
2497 pdata->ops = &shifted_smsc911x_ops;
2498
2499 pm_runtime_enable(&pdev->dev);
2500 pm_runtime_get_sync(&pdev->dev);
2501
2502 retval = smsc911x_init(dev);
2503 if (retval < 0)
2504 goto out_init_fail;
2505
2506 netif_carrier_off(dev);
2507
2508 retval = smsc911x_mii_init(pdev, dev);
2509 if (retval) {
2510 SMSC_WARN(pdata, probe, "Error %i initialising mii", retval);
2511 goto out_init_fail;
2512 }
2513
2514 retval = register_netdev(dev);
2515 if (retval) {
2516 SMSC_WARN(pdata, probe, "Error %i registering device", retval);
2517 goto out_init_fail;
2518 } else {
2519 SMSC_TRACE(pdata, probe,
2520 "Network interface: \"%s\"", dev->name);
2521 }
2522
2523 spin_lock_irq(&pdata->mac_lock);
2524
2525 /* Check if mac address has been specified when bringing interface up */
2526 if (is_valid_ether_addr(dev->dev_addr)) {
2527 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2528 SMSC_TRACE(pdata, probe,
2529 "MAC Address is specified by configuration");
2530 } else if (is_valid_ether_addr(pdata->config.mac)) {
2531 eth_hw_addr_set(dev, pdata->config.mac);
2532 SMSC_TRACE(pdata, probe,
2533 "MAC Address specified by platform data");
2534 } else {
2535 /* Try reading mac address from device. if EEPROM is present
2536 * it will already have been set */
2537 smsc_get_mac(dev);
2538
2539 if (is_valid_ether_addr(dev->dev_addr)) {
2540 /* eeprom values are valid so use them */
2541 SMSC_TRACE(pdata, probe,
2542 "Mac Address is read from LAN911x EEPROM");
2543 } else {
2544 /* eeprom values are invalid, generate random MAC */
2545 eth_hw_addr_random(dev);
2546 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2547 SMSC_TRACE(pdata, probe,
2548 "MAC Address is set to eth_random_addr");
2549 }
2550 }
2551
2552 spin_unlock_irq(&pdata->mac_lock);
2553 pm_runtime_put(&pdev->dev);
2554
2555 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
2556
2557 return 0;
2558
2559out_init_fail:
2560 pm_runtime_put(&pdev->dev);
2561 pm_runtime_disable(&pdev->dev);
2562out_disable_resources:
2563 (void)smsc911x_disable_resources(pdev);
2564out_enable_resources_fail:
2565 smsc911x_free_resources(pdev);
2566out_request_resources_fail:
2567 iounmap(pdata->ioaddr);
2568out_ioremap_fail:
2569 free_netdev(dev);
2570out_release_io_1:
2571 release_mem_region(res->start, resource_size(res));
2572out_0:
2573 return retval;
2574}
2575
2576#ifdef CONFIG_PM
2577/* This implementation assumes the devices remains powered on its VDDVARIO
2578 * pins during suspend. */
2579
2580/* TODO: implement freeze/thaw callbacks for hibernation.*/
2581
2582static int smsc911x_suspend(struct device *dev)
2583{
2584 struct net_device *ndev = dev_get_drvdata(dev);
2585 struct smsc911x_data *pdata = netdev_priv(ndev);
2586
2587 if (netif_running(ndev)) {
2588 netif_stop_queue(ndev);
2589 netif_device_detach(ndev);
2590 if (!device_may_wakeup(dev))
2591 phy_stop(ndev->phydev);
2592 }
2593
2594 /* enable wake on LAN, energy detection and the external PME
2595 * signal. */
2596 smsc911x_reg_write(pdata, PMT_CTRL,
2597 PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ |
2598 PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_);
2599
2600 pm_runtime_disable(dev);
2601 pm_runtime_set_suspended(dev);
2602
2603 return 0;
2604}
2605
2606static int smsc911x_resume(struct device *dev)
2607{
2608 struct net_device *ndev = dev_get_drvdata(dev);
2609 struct smsc911x_data *pdata = netdev_priv(ndev);
2610 unsigned int to = 100;
2611
2612 pm_runtime_enable(dev);
2613 pm_runtime_resume(dev);
2614
2615 /* Note 3.11 from the datasheet:
2616 * "When the LAN9220 is in a power saving state, a write of any
2617 * data to the BYTE_TEST register will wake-up the device."
2618 */
2619 smsc911x_reg_write(pdata, BYTE_TEST, 0);
2620
2621 /* poll the READY bit in PMT_CTRL. Any other access to the device is
2622 * forbidden while this bit isn't set. Try for 100ms and return -EIO
2623 * if it failed. */
2624 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to)
2625 udelay(1000);
2626
2627 if (to == 0)
2628 return -EIO;
2629
2630 if (netif_running(ndev)) {
2631 netif_device_attach(ndev);
2632 netif_start_queue(ndev);
2633 if (!device_may_wakeup(dev))
2634 phy_start(ndev->phydev);
2635 }
2636
2637 return 0;
2638}
2639
2640static const struct dev_pm_ops smsc911x_pm_ops = {
2641 .suspend = smsc911x_suspend,
2642 .resume = smsc911x_resume,
2643};
2644
2645#define SMSC911X_PM_OPS (&smsc911x_pm_ops)
2646
2647#else
2648#define SMSC911X_PM_OPS NULL
2649#endif
2650
2651#ifdef CONFIG_OF
2652static const struct of_device_id smsc911x_dt_ids[] = {
2653 { .compatible = "smsc,lan9115", },
2654 { /* sentinel */ }
2655};
2656MODULE_DEVICE_TABLE(of, smsc911x_dt_ids);
2657#endif
2658
2659#ifdef CONFIG_ACPI
2660static const struct acpi_device_id smsc911x_acpi_match[] = {
2661 { "ARMH9118", 0 },
2662 { }
2663};
2664MODULE_DEVICE_TABLE(acpi, smsc911x_acpi_match);
2665#endif
2666
2667static struct platform_driver smsc911x_driver = {
2668 .probe = smsc911x_drv_probe,
2669 .remove_new = smsc911x_drv_remove,
2670 .driver = {
2671 .name = SMSC_CHIPNAME,
2672 .pm = SMSC911X_PM_OPS,
2673 .of_match_table = of_match_ptr(smsc911x_dt_ids),
2674 .acpi_match_table = ACPI_PTR(smsc911x_acpi_match),
2675 },
2676};
2677
2678/* Entry point for loading the module */
2679static int __init smsc911x_init_module(void)
2680{
2681 SMSC_INITIALIZE();
2682 return platform_driver_register(&smsc911x_driver);
2683}
2684
2685/* entry point for unloading the module */
2686static void __exit smsc911x_cleanup_module(void)
2687{
2688 platform_driver_unregister(&smsc911x_driver);
2689}
2690
2691module_init(smsc911x_init_module);
2692module_exit(smsc911x_cleanup_module);
1/***************************************************************************
2 *
3 * Copyright (C) 2004-2008 SMSC
4 * Copyright (C) 2005-2008 ARM
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
18 *
19 ***************************************************************************
20 * Rewritten, heavily based on smsc911x simple driver by SMSC.
21 * Partly uses io macros from smc91x.c by Nicolas Pitre
22 *
23 * Supported devices:
24 * LAN9115, LAN9116, LAN9117, LAN9118
25 * LAN9215, LAN9216, LAN9217, LAN9218
26 * LAN9210, LAN9211
27 * LAN9220, LAN9221
28 * LAN89218
29 *
30 */
31
32#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
33
34#include <linux/crc32.h>
35#include <linux/clk.h>
36#include <linux/delay.h>
37#include <linux/errno.h>
38#include <linux/etherdevice.h>
39#include <linux/ethtool.h>
40#include <linux/init.h>
41#include <linux/interrupt.h>
42#include <linux/ioport.h>
43#include <linux/kernel.h>
44#include <linux/module.h>
45#include <linux/netdevice.h>
46#include <linux/platform_device.h>
47#include <linux/regulator/consumer.h>
48#include <linux/sched.h>
49#include <linux/timer.h>
50#include <linux/bug.h>
51#include <linux/bitops.h>
52#include <linux/irq.h>
53#include <linux/io.h>
54#include <linux/swab.h>
55#include <linux/phy.h>
56#include <linux/smsc911x.h>
57#include <linux/device.h>
58#include <linux/of.h>
59#include <linux/of_device.h>
60#include <linux/of_gpio.h>
61#include <linux/of_net.h>
62#include <linux/acpi.h>
63#include <linux/pm_runtime.h>
64#include <linux/property.h>
65
66#include "smsc911x.h"
67
68#define SMSC_CHIPNAME "smsc911x"
69#define SMSC_MDIONAME "smsc911x-mdio"
70#define SMSC_DRV_VERSION "2008-10-21"
71
72MODULE_LICENSE("GPL");
73MODULE_VERSION(SMSC_DRV_VERSION);
74MODULE_ALIAS("platform:smsc911x");
75
76#if USE_DEBUG > 0
77static int debug = 16;
78#else
79static int debug = 3;
80#endif
81
82module_param(debug, int, 0);
83MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
84
85struct smsc911x_data;
86
87struct smsc911x_ops {
88 u32 (*reg_read)(struct smsc911x_data *pdata, u32 reg);
89 void (*reg_write)(struct smsc911x_data *pdata, u32 reg, u32 val);
90 void (*rx_readfifo)(struct smsc911x_data *pdata,
91 unsigned int *buf, unsigned int wordcount);
92 void (*tx_writefifo)(struct smsc911x_data *pdata,
93 unsigned int *buf, unsigned int wordcount);
94};
95
96#define SMSC911X_NUM_SUPPLIES 2
97
98struct smsc911x_data {
99 void __iomem *ioaddr;
100
101 unsigned int idrev;
102
103 /* used to decide which workarounds apply */
104 unsigned int generation;
105
106 /* device configuration (copied from platform_data during probe) */
107 struct smsc911x_platform_config config;
108
109 /* This needs to be acquired before calling any of below:
110 * smsc911x_mac_read(), smsc911x_mac_write()
111 */
112 spinlock_t mac_lock;
113
114 /* spinlock to ensure register accesses are serialised */
115 spinlock_t dev_lock;
116
117 struct phy_device *phy_dev;
118 struct mii_bus *mii_bus;
119 int phy_irq[PHY_MAX_ADDR];
120 unsigned int using_extphy;
121 int last_duplex;
122 int last_carrier;
123
124 u32 msg_enable;
125 unsigned int gpio_setting;
126 unsigned int gpio_orig_setting;
127 struct net_device *dev;
128 struct napi_struct napi;
129
130 unsigned int software_irq_signal;
131
132#ifdef USE_PHY_WORK_AROUND
133#define MIN_PACKET_SIZE (64)
134 char loopback_tx_pkt[MIN_PACKET_SIZE];
135 char loopback_rx_pkt[MIN_PACKET_SIZE];
136 unsigned int resetcount;
137#endif
138
139 /* Members for Multicast filter workaround */
140 unsigned int multicast_update_pending;
141 unsigned int set_bits_mask;
142 unsigned int clear_bits_mask;
143 unsigned int hashhi;
144 unsigned int hashlo;
145
146 /* register access functions */
147 const struct smsc911x_ops *ops;
148
149 /* regulators */
150 struct regulator_bulk_data supplies[SMSC911X_NUM_SUPPLIES];
151
152 /* clock */
153 struct clk *clk;
154};
155
156/* Easy access to information */
157#define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift))
158
159static inline u32 __smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
160{
161 if (pdata->config.flags & SMSC911X_USE_32BIT)
162 return readl(pdata->ioaddr + reg);
163
164 if (pdata->config.flags & SMSC911X_USE_16BIT)
165 return ((readw(pdata->ioaddr + reg) & 0xFFFF) |
166 ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16));
167
168 BUG();
169 return 0;
170}
171
172static inline u32
173__smsc911x_reg_read_shift(struct smsc911x_data *pdata, u32 reg)
174{
175 if (pdata->config.flags & SMSC911X_USE_32BIT)
176 return readl(pdata->ioaddr + __smsc_shift(pdata, reg));
177
178 if (pdata->config.flags & SMSC911X_USE_16BIT)
179 return (readw(pdata->ioaddr +
180 __smsc_shift(pdata, reg)) & 0xFFFF) |
181 ((readw(pdata->ioaddr +
182 __smsc_shift(pdata, reg + 2)) & 0xFFFF) << 16);
183
184 BUG();
185 return 0;
186}
187
188static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
189{
190 u32 data;
191 unsigned long flags;
192
193 spin_lock_irqsave(&pdata->dev_lock, flags);
194 data = pdata->ops->reg_read(pdata, reg);
195 spin_unlock_irqrestore(&pdata->dev_lock, flags);
196
197 return data;
198}
199
200static inline void __smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
201 u32 val)
202{
203 if (pdata->config.flags & SMSC911X_USE_32BIT) {
204 writel(val, pdata->ioaddr + reg);
205 return;
206 }
207
208 if (pdata->config.flags & SMSC911X_USE_16BIT) {
209 writew(val & 0xFFFF, pdata->ioaddr + reg);
210 writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2);
211 return;
212 }
213
214 BUG();
215}
216
217static inline void
218__smsc911x_reg_write_shift(struct smsc911x_data *pdata, u32 reg, u32 val)
219{
220 if (pdata->config.flags & SMSC911X_USE_32BIT) {
221 writel(val, pdata->ioaddr + __smsc_shift(pdata, reg));
222 return;
223 }
224
225 if (pdata->config.flags & SMSC911X_USE_16BIT) {
226 writew(val & 0xFFFF,
227 pdata->ioaddr + __smsc_shift(pdata, reg));
228 writew((val >> 16) & 0xFFFF,
229 pdata->ioaddr + __smsc_shift(pdata, reg + 2));
230 return;
231 }
232
233 BUG();
234}
235
236static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
237 u32 val)
238{
239 unsigned long flags;
240
241 spin_lock_irqsave(&pdata->dev_lock, flags);
242 pdata->ops->reg_write(pdata, reg, val);
243 spin_unlock_irqrestore(&pdata->dev_lock, flags);
244}
245
246/* Writes a packet to the TX_DATA_FIFO */
247static inline void
248smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf,
249 unsigned int wordcount)
250{
251 unsigned long flags;
252
253 spin_lock_irqsave(&pdata->dev_lock, flags);
254
255 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
256 while (wordcount--)
257 __smsc911x_reg_write(pdata, TX_DATA_FIFO,
258 swab32(*buf++));
259 goto out;
260 }
261
262 if (pdata->config.flags & SMSC911X_USE_32BIT) {
263 iowrite32_rep(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount);
264 goto out;
265 }
266
267 if (pdata->config.flags & SMSC911X_USE_16BIT) {
268 while (wordcount--)
269 __smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++);
270 goto out;
271 }
272
273 BUG();
274out:
275 spin_unlock_irqrestore(&pdata->dev_lock, flags);
276}
277
278/* Writes a packet to the TX_DATA_FIFO - shifted version */
279static inline void
280smsc911x_tx_writefifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
281 unsigned int wordcount)
282{
283 unsigned long flags;
284
285 spin_lock_irqsave(&pdata->dev_lock, flags);
286
287 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
288 while (wordcount--)
289 __smsc911x_reg_write_shift(pdata, TX_DATA_FIFO,
290 swab32(*buf++));
291 goto out;
292 }
293
294 if (pdata->config.flags & SMSC911X_USE_32BIT) {
295 iowrite32_rep(pdata->ioaddr + __smsc_shift(pdata,
296 TX_DATA_FIFO), buf, wordcount);
297 goto out;
298 }
299
300 if (pdata->config.flags & SMSC911X_USE_16BIT) {
301 while (wordcount--)
302 __smsc911x_reg_write_shift(pdata,
303 TX_DATA_FIFO, *buf++);
304 goto out;
305 }
306
307 BUG();
308out:
309 spin_unlock_irqrestore(&pdata->dev_lock, flags);
310}
311
312/* Reads a packet out of the RX_DATA_FIFO */
313static inline void
314smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf,
315 unsigned int wordcount)
316{
317 unsigned long flags;
318
319 spin_lock_irqsave(&pdata->dev_lock, flags);
320
321 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
322 while (wordcount--)
323 *buf++ = swab32(__smsc911x_reg_read(pdata,
324 RX_DATA_FIFO));
325 goto out;
326 }
327
328 if (pdata->config.flags & SMSC911X_USE_32BIT) {
329 ioread32_rep(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount);
330 goto out;
331 }
332
333 if (pdata->config.flags & SMSC911X_USE_16BIT) {
334 while (wordcount--)
335 *buf++ = __smsc911x_reg_read(pdata, RX_DATA_FIFO);
336 goto out;
337 }
338
339 BUG();
340out:
341 spin_unlock_irqrestore(&pdata->dev_lock, flags);
342}
343
344/* Reads a packet out of the RX_DATA_FIFO - shifted version */
345static inline void
346smsc911x_rx_readfifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
347 unsigned int wordcount)
348{
349 unsigned long flags;
350
351 spin_lock_irqsave(&pdata->dev_lock, flags);
352
353 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
354 while (wordcount--)
355 *buf++ = swab32(__smsc911x_reg_read_shift(pdata,
356 RX_DATA_FIFO));
357 goto out;
358 }
359
360 if (pdata->config.flags & SMSC911X_USE_32BIT) {
361 ioread32_rep(pdata->ioaddr + __smsc_shift(pdata,
362 RX_DATA_FIFO), buf, wordcount);
363 goto out;
364 }
365
366 if (pdata->config.flags & SMSC911X_USE_16BIT) {
367 while (wordcount--)
368 *buf++ = __smsc911x_reg_read_shift(pdata,
369 RX_DATA_FIFO);
370 goto out;
371 }
372
373 BUG();
374out:
375 spin_unlock_irqrestore(&pdata->dev_lock, flags);
376}
377
378/*
379 * enable regulator and clock resources.
380 */
381static int smsc911x_enable_resources(struct platform_device *pdev)
382{
383 struct net_device *ndev = platform_get_drvdata(pdev);
384 struct smsc911x_data *pdata = netdev_priv(ndev);
385 int ret = 0;
386
387 ret = regulator_bulk_enable(ARRAY_SIZE(pdata->supplies),
388 pdata->supplies);
389 if (ret)
390 netdev_err(ndev, "failed to enable regulators %d\n",
391 ret);
392
393 if (!IS_ERR(pdata->clk)) {
394 ret = clk_prepare_enable(pdata->clk);
395 if (ret < 0)
396 netdev_err(ndev, "failed to enable clock %d\n", ret);
397 }
398
399 return ret;
400}
401
402/*
403 * disable resources, currently just regulators.
404 */
405static int smsc911x_disable_resources(struct platform_device *pdev)
406{
407 struct net_device *ndev = platform_get_drvdata(pdev);
408 struct smsc911x_data *pdata = netdev_priv(ndev);
409 int ret = 0;
410
411 ret = regulator_bulk_disable(ARRAY_SIZE(pdata->supplies),
412 pdata->supplies);
413
414 if (!IS_ERR(pdata->clk))
415 clk_disable_unprepare(pdata->clk);
416
417 return ret;
418}
419
420/*
421 * Request resources, currently just regulators.
422 *
423 * The SMSC911x has two power pins: vddvario and vdd33a, in designs where
424 * these are not always-on we need to request regulators to be turned on
425 * before we can try to access the device registers.
426 */
427static int smsc911x_request_resources(struct platform_device *pdev)
428{
429 struct net_device *ndev = platform_get_drvdata(pdev);
430 struct smsc911x_data *pdata = netdev_priv(ndev);
431 int ret = 0;
432
433 /* Request regulators */
434 pdata->supplies[0].supply = "vdd33a";
435 pdata->supplies[1].supply = "vddvario";
436 ret = regulator_bulk_get(&pdev->dev,
437 ARRAY_SIZE(pdata->supplies),
438 pdata->supplies);
439 if (ret)
440 netdev_err(ndev, "couldn't get regulators %d\n",
441 ret);
442
443 /* Request clock */
444 pdata->clk = clk_get(&pdev->dev, NULL);
445 if (IS_ERR(pdata->clk))
446 dev_dbg(&pdev->dev, "couldn't get clock %li\n",
447 PTR_ERR(pdata->clk));
448
449 return ret;
450}
451
452/*
453 * Free resources, currently just regulators.
454 *
455 */
456static void smsc911x_free_resources(struct platform_device *pdev)
457{
458 struct net_device *ndev = platform_get_drvdata(pdev);
459 struct smsc911x_data *pdata = netdev_priv(ndev);
460
461 /* Free regulators */
462 regulator_bulk_free(ARRAY_SIZE(pdata->supplies),
463 pdata->supplies);
464
465 /* Free clock */
466 if (!IS_ERR(pdata->clk)) {
467 clk_put(pdata->clk);
468 pdata->clk = NULL;
469 }
470}
471
472/* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
473 * and smsc911x_mac_write, so assumes mac_lock is held */
474static int smsc911x_mac_complete(struct smsc911x_data *pdata)
475{
476 int i;
477 u32 val;
478
479 SMSC_ASSERT_MAC_LOCK(pdata);
480
481 for (i = 0; i < 40; i++) {
482 val = smsc911x_reg_read(pdata, MAC_CSR_CMD);
483 if (!(val & MAC_CSR_CMD_CSR_BUSY_))
484 return 0;
485 }
486 SMSC_WARN(pdata, hw, "Timed out waiting for MAC not BUSY. "
487 "MAC_CSR_CMD: 0x%08X", val);
488 return -EIO;
489}
490
491/* Fetches a MAC register value. Assumes mac_lock is acquired */
492static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset)
493{
494 unsigned int temp;
495
496 SMSC_ASSERT_MAC_LOCK(pdata);
497
498 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
499 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
500 SMSC_WARN(pdata, hw, "MAC busy at entry");
501 return 0xFFFFFFFF;
502 }
503
504 /* Send the MAC cmd */
505 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
506 MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_));
507
508 /* Workaround for hardware read-after-write restriction */
509 temp = smsc911x_reg_read(pdata, BYTE_TEST);
510
511 /* Wait for the read to complete */
512 if (likely(smsc911x_mac_complete(pdata) == 0))
513 return smsc911x_reg_read(pdata, MAC_CSR_DATA);
514
515 SMSC_WARN(pdata, hw, "MAC busy after read");
516 return 0xFFFFFFFF;
517}
518
519/* Set a mac register, mac_lock must be acquired before calling */
520static void smsc911x_mac_write(struct smsc911x_data *pdata,
521 unsigned int offset, u32 val)
522{
523 unsigned int temp;
524
525 SMSC_ASSERT_MAC_LOCK(pdata);
526
527 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
528 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
529 SMSC_WARN(pdata, hw,
530 "smsc911x_mac_write failed, MAC busy at entry");
531 return;
532 }
533
534 /* Send data to write */
535 smsc911x_reg_write(pdata, MAC_CSR_DATA, val);
536
537 /* Write the actual data */
538 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
539 MAC_CSR_CMD_CSR_BUSY_));
540
541 /* Workaround for hardware read-after-write restriction */
542 temp = smsc911x_reg_read(pdata, BYTE_TEST);
543
544 /* Wait for the write to complete */
545 if (likely(smsc911x_mac_complete(pdata) == 0))
546 return;
547
548 SMSC_WARN(pdata, hw, "smsc911x_mac_write failed, MAC busy after write");
549}
550
551/* Get a phy register */
552static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx)
553{
554 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
555 unsigned long flags;
556 unsigned int addr;
557 int i, reg;
558
559 spin_lock_irqsave(&pdata->mac_lock, flags);
560
561 /* Confirm MII not busy */
562 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
563 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_read???");
564 reg = -EIO;
565 goto out;
566 }
567
568 /* Set the address, index & direction (read from PHY) */
569 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6);
570 smsc911x_mac_write(pdata, MII_ACC, addr);
571
572 /* Wait for read to complete w/ timeout */
573 for (i = 0; i < 100; i++)
574 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
575 reg = smsc911x_mac_read(pdata, MII_DATA);
576 goto out;
577 }
578
579 SMSC_WARN(pdata, hw, "Timed out waiting for MII read to finish");
580 reg = -EIO;
581
582out:
583 spin_unlock_irqrestore(&pdata->mac_lock, flags);
584 return reg;
585}
586
587/* Set a phy register */
588static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx,
589 u16 val)
590{
591 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
592 unsigned long flags;
593 unsigned int addr;
594 int i, reg;
595
596 spin_lock_irqsave(&pdata->mac_lock, flags);
597
598 /* Confirm MII not busy */
599 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
600 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_write???");
601 reg = -EIO;
602 goto out;
603 }
604
605 /* Put the data to write in the MAC */
606 smsc911x_mac_write(pdata, MII_DATA, val);
607
608 /* Set the address, index & direction (write to PHY) */
609 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
610 MII_ACC_MII_WRITE_;
611 smsc911x_mac_write(pdata, MII_ACC, addr);
612
613 /* Wait for write to complete w/ timeout */
614 for (i = 0; i < 100; i++)
615 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
616 reg = 0;
617 goto out;
618 }
619
620 SMSC_WARN(pdata, hw, "Timed out waiting for MII write to finish");
621 reg = -EIO;
622
623out:
624 spin_unlock_irqrestore(&pdata->mac_lock, flags);
625 return reg;
626}
627
628/* Switch to external phy. Assumes tx and rx are stopped. */
629static void smsc911x_phy_enable_external(struct smsc911x_data *pdata)
630{
631 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
632
633 /* Disable phy clocks to the MAC */
634 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
635 hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
636 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
637 udelay(10); /* Enough time for clocks to stop */
638
639 /* Switch to external phy */
640 hwcfg |= HW_CFG_EXT_PHY_EN_;
641 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
642
643 /* Enable phy clocks to the MAC */
644 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
645 hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
646 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
647 udelay(10); /* Enough time for clocks to restart */
648
649 hwcfg |= HW_CFG_SMI_SEL_;
650 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
651}
652
653/* Autodetects and enables external phy if present on supported chips.
654 * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY
655 * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */
656static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata)
657{
658 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
659
660 if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) {
661 SMSC_TRACE(pdata, hw, "Forcing internal PHY");
662 pdata->using_extphy = 0;
663 } else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) {
664 SMSC_TRACE(pdata, hw, "Forcing external PHY");
665 smsc911x_phy_enable_external(pdata);
666 pdata->using_extphy = 1;
667 } else if (hwcfg & HW_CFG_EXT_PHY_DET_) {
668 SMSC_TRACE(pdata, hw,
669 "HW_CFG EXT_PHY_DET set, using external PHY");
670 smsc911x_phy_enable_external(pdata);
671 pdata->using_extphy = 1;
672 } else {
673 SMSC_TRACE(pdata, hw,
674 "HW_CFG EXT_PHY_DET clear, using internal PHY");
675 pdata->using_extphy = 0;
676 }
677}
678
679/* Fetches a tx status out of the status fifo */
680static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata)
681{
682 unsigned int result =
683 smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_;
684
685 if (result != 0)
686 result = smsc911x_reg_read(pdata, TX_STATUS_FIFO);
687
688 return result;
689}
690
691/* Fetches the next rx status */
692static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata)
693{
694 unsigned int result =
695 smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_;
696
697 if (result != 0)
698 result = smsc911x_reg_read(pdata, RX_STATUS_FIFO);
699
700 return result;
701}
702
703#ifdef USE_PHY_WORK_AROUND
704static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata)
705{
706 unsigned int tries;
707 u32 wrsz;
708 u32 rdsz;
709 ulong bufp;
710
711 for (tries = 0; tries < 10; tries++) {
712 unsigned int txcmd_a;
713 unsigned int txcmd_b;
714 unsigned int status;
715 unsigned int pktlength;
716 unsigned int i;
717
718 /* Zero-out rx packet memory */
719 memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE);
720
721 /* Write tx packet to 118 */
722 txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16;
723 txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
724 txcmd_a |= MIN_PACKET_SIZE;
725
726 txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE;
727
728 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a);
729 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b);
730
731 bufp = (ulong)pdata->loopback_tx_pkt & (~0x3);
732 wrsz = MIN_PACKET_SIZE + 3;
733 wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3);
734 wrsz >>= 2;
735
736 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
737
738 /* Wait till transmit is done */
739 i = 60;
740 do {
741 udelay(5);
742 status = smsc911x_tx_get_txstatus(pdata);
743 } while ((i--) && (!status));
744
745 if (!status) {
746 SMSC_WARN(pdata, hw,
747 "Failed to transmit during loopback test");
748 continue;
749 }
750 if (status & TX_STS_ES_) {
751 SMSC_WARN(pdata, hw,
752 "Transmit encountered errors during loopback test");
753 continue;
754 }
755
756 /* Wait till receive is done */
757 i = 60;
758 do {
759 udelay(5);
760 status = smsc911x_rx_get_rxstatus(pdata);
761 } while ((i--) && (!status));
762
763 if (!status) {
764 SMSC_WARN(pdata, hw,
765 "Failed to receive during loopback test");
766 continue;
767 }
768 if (status & RX_STS_ES_) {
769 SMSC_WARN(pdata, hw,
770 "Receive encountered errors during loopback test");
771 continue;
772 }
773
774 pktlength = ((status & 0x3FFF0000UL) >> 16);
775 bufp = (ulong)pdata->loopback_rx_pkt;
776 rdsz = pktlength + 3;
777 rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3);
778 rdsz >>= 2;
779
780 pdata->ops->rx_readfifo(pdata, (unsigned int *)bufp, rdsz);
781
782 if (pktlength != (MIN_PACKET_SIZE + 4)) {
783 SMSC_WARN(pdata, hw, "Unexpected packet size "
784 "during loop back test, size=%d, will retry",
785 pktlength);
786 } else {
787 unsigned int j;
788 int mismatch = 0;
789 for (j = 0; j < MIN_PACKET_SIZE; j++) {
790 if (pdata->loopback_tx_pkt[j]
791 != pdata->loopback_rx_pkt[j]) {
792 mismatch = 1;
793 break;
794 }
795 }
796 if (!mismatch) {
797 SMSC_TRACE(pdata, hw, "Successfully verified "
798 "loopback packet");
799 return 0;
800 } else {
801 SMSC_WARN(pdata, hw, "Data mismatch "
802 "during loop back test, will retry");
803 }
804 }
805 }
806
807 return -EIO;
808}
809
810static int smsc911x_phy_reset(struct smsc911x_data *pdata)
811{
812 unsigned int temp;
813 unsigned int i = 100000;
814
815 temp = smsc911x_reg_read(pdata, PMT_CTRL);
816 smsc911x_reg_write(pdata, PMT_CTRL, temp | PMT_CTRL_PHY_RST_);
817 do {
818 msleep(1);
819 temp = smsc911x_reg_read(pdata, PMT_CTRL);
820 } while ((i--) && (temp & PMT_CTRL_PHY_RST_));
821
822 if (unlikely(temp & PMT_CTRL_PHY_RST_)) {
823 SMSC_WARN(pdata, hw, "PHY reset failed to complete");
824 return -EIO;
825 }
826 /* Extra delay required because the phy may not be completed with
827 * its reset when BMCR_RESET is cleared. Specs say 256 uS is
828 * enough delay but using 1ms here to be safe */
829 msleep(1);
830
831 return 0;
832}
833
834static int smsc911x_phy_loopbacktest(struct net_device *dev)
835{
836 struct smsc911x_data *pdata = netdev_priv(dev);
837 struct phy_device *phy_dev = pdata->phy_dev;
838 int result = -EIO;
839 unsigned int i, val;
840 unsigned long flags;
841
842 /* Initialise tx packet using broadcast destination address */
843 eth_broadcast_addr(pdata->loopback_tx_pkt);
844
845 /* Use incrementing source address */
846 for (i = 6; i < 12; i++)
847 pdata->loopback_tx_pkt[i] = (char)i;
848
849 /* Set length type field */
850 pdata->loopback_tx_pkt[12] = 0x00;
851 pdata->loopback_tx_pkt[13] = 0x00;
852
853 for (i = 14; i < MIN_PACKET_SIZE; i++)
854 pdata->loopback_tx_pkt[i] = (char)i;
855
856 val = smsc911x_reg_read(pdata, HW_CFG);
857 val &= HW_CFG_TX_FIF_SZ_;
858 val |= HW_CFG_SF_;
859 smsc911x_reg_write(pdata, HW_CFG, val);
860
861 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
862 smsc911x_reg_write(pdata, RX_CFG,
863 (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8);
864
865 for (i = 0; i < 10; i++) {
866 /* Set PHY to 10/FD, no ANEG, and loopback mode */
867 smsc911x_mii_write(phy_dev->mdio.bus, phy_dev->mdio.addr,
868 MII_BMCR, BMCR_LOOPBACK | BMCR_FULLDPLX);
869
870 /* Enable MAC tx/rx, FD */
871 spin_lock_irqsave(&pdata->mac_lock, flags);
872 smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_
873 | MAC_CR_TXEN_ | MAC_CR_RXEN_);
874 spin_unlock_irqrestore(&pdata->mac_lock, flags);
875
876 if (smsc911x_phy_check_loopbackpkt(pdata) == 0) {
877 result = 0;
878 break;
879 }
880 pdata->resetcount++;
881
882 /* Disable MAC rx */
883 spin_lock_irqsave(&pdata->mac_lock, flags);
884 smsc911x_mac_write(pdata, MAC_CR, 0);
885 spin_unlock_irqrestore(&pdata->mac_lock, flags);
886
887 smsc911x_phy_reset(pdata);
888 }
889
890 /* Disable MAC */
891 spin_lock_irqsave(&pdata->mac_lock, flags);
892 smsc911x_mac_write(pdata, MAC_CR, 0);
893 spin_unlock_irqrestore(&pdata->mac_lock, flags);
894
895 /* Cancel PHY loopback mode */
896 smsc911x_mii_write(phy_dev->mdio.bus, phy_dev->mdio.addr, MII_BMCR, 0);
897
898 smsc911x_reg_write(pdata, TX_CFG, 0);
899 smsc911x_reg_write(pdata, RX_CFG, 0);
900
901 return result;
902}
903#endif /* USE_PHY_WORK_AROUND */
904
905static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata)
906{
907 struct phy_device *phy_dev = pdata->phy_dev;
908 u32 afc = smsc911x_reg_read(pdata, AFC_CFG);
909 u32 flow;
910 unsigned long flags;
911
912 if (phy_dev->duplex == DUPLEX_FULL) {
913 u16 lcladv = phy_read(phy_dev, MII_ADVERTISE);
914 u16 rmtadv = phy_read(phy_dev, MII_LPA);
915 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
916
917 if (cap & FLOW_CTRL_RX)
918 flow = 0xFFFF0002;
919 else
920 flow = 0;
921
922 if (cap & FLOW_CTRL_TX)
923 afc |= 0xF;
924 else
925 afc &= ~0xF;
926
927 SMSC_TRACE(pdata, hw, "rx pause %s, tx pause %s",
928 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
929 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
930 } else {
931 SMSC_TRACE(pdata, hw, "half duplex");
932 flow = 0;
933 afc |= 0xF;
934 }
935
936 spin_lock_irqsave(&pdata->mac_lock, flags);
937 smsc911x_mac_write(pdata, FLOW, flow);
938 spin_unlock_irqrestore(&pdata->mac_lock, flags);
939
940 smsc911x_reg_write(pdata, AFC_CFG, afc);
941}
942
943/* Update link mode if anything has changed. Called periodically when the
944 * PHY is in polling mode, even if nothing has changed. */
945static void smsc911x_phy_adjust_link(struct net_device *dev)
946{
947 struct smsc911x_data *pdata = netdev_priv(dev);
948 struct phy_device *phy_dev = pdata->phy_dev;
949 unsigned long flags;
950 int carrier;
951
952 if (phy_dev->duplex != pdata->last_duplex) {
953 unsigned int mac_cr;
954 SMSC_TRACE(pdata, hw, "duplex state has changed");
955
956 spin_lock_irqsave(&pdata->mac_lock, flags);
957 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
958 if (phy_dev->duplex) {
959 SMSC_TRACE(pdata, hw,
960 "configuring for full duplex mode");
961 mac_cr |= MAC_CR_FDPX_;
962 } else {
963 SMSC_TRACE(pdata, hw,
964 "configuring for half duplex mode");
965 mac_cr &= ~MAC_CR_FDPX_;
966 }
967 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
968 spin_unlock_irqrestore(&pdata->mac_lock, flags);
969
970 smsc911x_phy_update_flowcontrol(pdata);
971 pdata->last_duplex = phy_dev->duplex;
972 }
973
974 carrier = netif_carrier_ok(dev);
975 if (carrier != pdata->last_carrier) {
976 SMSC_TRACE(pdata, hw, "carrier state has changed");
977 if (carrier) {
978 SMSC_TRACE(pdata, hw, "configuring for carrier OK");
979 if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) &&
980 (!pdata->using_extphy)) {
981 /* Restore original GPIO configuration */
982 pdata->gpio_setting = pdata->gpio_orig_setting;
983 smsc911x_reg_write(pdata, GPIO_CFG,
984 pdata->gpio_setting);
985 }
986 } else {
987 SMSC_TRACE(pdata, hw, "configuring for no carrier");
988 /* Check global setting that LED1
989 * usage is 10/100 indicator */
990 pdata->gpio_setting = smsc911x_reg_read(pdata,
991 GPIO_CFG);
992 if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_) &&
993 (!pdata->using_extphy)) {
994 /* Force 10/100 LED off, after saving
995 * original GPIO configuration */
996 pdata->gpio_orig_setting = pdata->gpio_setting;
997
998 pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_;
999 pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_
1000 | GPIO_CFG_GPIODIR0_
1001 | GPIO_CFG_GPIOD0_);
1002 smsc911x_reg_write(pdata, GPIO_CFG,
1003 pdata->gpio_setting);
1004 }
1005 }
1006 pdata->last_carrier = carrier;
1007 }
1008}
1009
1010static int smsc911x_mii_probe(struct net_device *dev)
1011{
1012 struct smsc911x_data *pdata = netdev_priv(dev);
1013 struct phy_device *phydev = NULL;
1014 int ret;
1015
1016 /* find the first phy */
1017 phydev = phy_find_first(pdata->mii_bus);
1018 if (!phydev) {
1019 netdev_err(dev, "no PHY found\n");
1020 return -ENODEV;
1021 }
1022
1023 SMSC_TRACE(pdata, probe, "PHY: addr %d, phy_id 0x%08X",
1024 phydev->mdio.addr, phydev->phy_id);
1025
1026 ret = phy_connect_direct(dev, phydev, &smsc911x_phy_adjust_link,
1027 pdata->config.phy_interface);
1028
1029 if (ret) {
1030 netdev_err(dev, "Could not attach to PHY\n");
1031 return ret;
1032 }
1033
1034 phy_attached_info(phydev);
1035
1036 /* mask with MAC supported features */
1037 phydev->supported &= (PHY_BASIC_FEATURES | SUPPORTED_Pause |
1038 SUPPORTED_Asym_Pause);
1039 phydev->advertising = phydev->supported;
1040
1041 pdata->phy_dev = phydev;
1042 pdata->last_duplex = -1;
1043 pdata->last_carrier = -1;
1044
1045#ifdef USE_PHY_WORK_AROUND
1046 if (smsc911x_phy_loopbacktest(dev) < 0) {
1047 SMSC_WARN(pdata, hw, "Failed Loop Back Test");
1048 phy_disconnect(phydev);
1049 return -ENODEV;
1050 }
1051 SMSC_TRACE(pdata, hw, "Passed Loop Back Test");
1052#endif /* USE_PHY_WORK_AROUND */
1053
1054 SMSC_TRACE(pdata, hw, "phy initialised successfully");
1055 return 0;
1056}
1057
1058static int smsc911x_mii_init(struct platform_device *pdev,
1059 struct net_device *dev)
1060{
1061 struct smsc911x_data *pdata = netdev_priv(dev);
1062 int err = -ENXIO;
1063
1064 pdata->mii_bus = mdiobus_alloc();
1065 if (!pdata->mii_bus) {
1066 err = -ENOMEM;
1067 goto err_out_1;
1068 }
1069
1070 pdata->mii_bus->name = SMSC_MDIONAME;
1071 snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
1072 pdev->name, pdev->id);
1073 pdata->mii_bus->priv = pdata;
1074 pdata->mii_bus->read = smsc911x_mii_read;
1075 pdata->mii_bus->write = smsc911x_mii_write;
1076 memcpy(pdata->mii_bus->irq, pdata->phy_irq, sizeof(pdata->mii_bus));
1077
1078 pdata->mii_bus->parent = &pdev->dev;
1079
1080 switch (pdata->idrev & 0xFFFF0000) {
1081 case 0x01170000:
1082 case 0x01150000:
1083 case 0x117A0000:
1084 case 0x115A0000:
1085 /* External PHY supported, try to autodetect */
1086 smsc911x_phy_initialise_external(pdata);
1087 break;
1088 default:
1089 SMSC_TRACE(pdata, hw, "External PHY is not supported, "
1090 "using internal PHY");
1091 pdata->using_extphy = 0;
1092 break;
1093 }
1094
1095 if (!pdata->using_extphy) {
1096 /* Mask all PHYs except ID 1 (internal) */
1097 pdata->mii_bus->phy_mask = ~(1 << 1);
1098 }
1099
1100 if (mdiobus_register(pdata->mii_bus)) {
1101 SMSC_WARN(pdata, probe, "Error registering mii bus");
1102 goto err_out_free_bus_2;
1103 }
1104
1105 if (smsc911x_mii_probe(dev) < 0) {
1106 SMSC_WARN(pdata, probe, "Error registering mii bus");
1107 goto err_out_unregister_bus_3;
1108 }
1109
1110 return 0;
1111
1112err_out_unregister_bus_3:
1113 mdiobus_unregister(pdata->mii_bus);
1114err_out_free_bus_2:
1115 mdiobus_free(pdata->mii_bus);
1116err_out_1:
1117 return err;
1118}
1119
1120/* Gets the number of tx statuses in the fifo */
1121static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata)
1122{
1123 return (smsc911x_reg_read(pdata, TX_FIFO_INF)
1124 & TX_FIFO_INF_TSUSED_) >> 16;
1125}
1126
1127/* Reads tx statuses and increments counters where necessary */
1128static void smsc911x_tx_update_txcounters(struct net_device *dev)
1129{
1130 struct smsc911x_data *pdata = netdev_priv(dev);
1131 unsigned int tx_stat;
1132
1133 while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) {
1134 if (unlikely(tx_stat & 0x80000000)) {
1135 /* In this driver the packet tag is used as the packet
1136 * length. Since a packet length can never reach the
1137 * size of 0x8000, this bit is reserved. It is worth
1138 * noting that the "reserved bit" in the warning above
1139 * does not reference a hardware defined reserved bit
1140 * but rather a driver defined one.
1141 */
1142 SMSC_WARN(pdata, hw, "Packet tag reserved bit is high");
1143 } else {
1144 if (unlikely(tx_stat & TX_STS_ES_)) {
1145 dev->stats.tx_errors++;
1146 } else {
1147 dev->stats.tx_packets++;
1148 dev->stats.tx_bytes += (tx_stat >> 16);
1149 }
1150 if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) {
1151 dev->stats.collisions += 16;
1152 dev->stats.tx_aborted_errors += 1;
1153 } else {
1154 dev->stats.collisions +=
1155 ((tx_stat >> 3) & 0xF);
1156 }
1157 if (unlikely(tx_stat & TX_STS_LOST_CARRIER_))
1158 dev->stats.tx_carrier_errors += 1;
1159 if (unlikely(tx_stat & TX_STS_LATE_COL_)) {
1160 dev->stats.collisions++;
1161 dev->stats.tx_aborted_errors++;
1162 }
1163 }
1164 }
1165}
1166
1167/* Increments the Rx error counters */
1168static void
1169smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat)
1170{
1171 int crc_err = 0;
1172
1173 if (unlikely(rxstat & RX_STS_ES_)) {
1174 dev->stats.rx_errors++;
1175 if (unlikely(rxstat & RX_STS_CRC_ERR_)) {
1176 dev->stats.rx_crc_errors++;
1177 crc_err = 1;
1178 }
1179 }
1180 if (likely(!crc_err)) {
1181 if (unlikely((rxstat & RX_STS_FRAME_TYPE_) &&
1182 (rxstat & RX_STS_LENGTH_ERR_)))
1183 dev->stats.rx_length_errors++;
1184 if (rxstat & RX_STS_MCAST_)
1185 dev->stats.multicast++;
1186 }
1187}
1188
1189/* Quickly dumps bad packets */
1190static void
1191smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktwords)
1192{
1193 if (likely(pktwords >= 4)) {
1194 unsigned int timeout = 500;
1195 unsigned int val;
1196 smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_);
1197 do {
1198 udelay(1);
1199 val = smsc911x_reg_read(pdata, RX_DP_CTRL);
1200 } while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout);
1201
1202 if (unlikely(timeout == 0))
1203 SMSC_WARN(pdata, hw, "Timed out waiting for "
1204 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val);
1205 } else {
1206 unsigned int temp;
1207 while (pktwords--)
1208 temp = smsc911x_reg_read(pdata, RX_DATA_FIFO);
1209 }
1210}
1211
1212/* NAPI poll function */
1213static int smsc911x_poll(struct napi_struct *napi, int budget)
1214{
1215 struct smsc911x_data *pdata =
1216 container_of(napi, struct smsc911x_data, napi);
1217 struct net_device *dev = pdata->dev;
1218 int npackets = 0;
1219
1220 while (npackets < budget) {
1221 unsigned int pktlength;
1222 unsigned int pktwords;
1223 struct sk_buff *skb;
1224 unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata);
1225
1226 if (!rxstat) {
1227 unsigned int temp;
1228 /* We processed all packets available. Tell NAPI it can
1229 * stop polling then re-enable rx interrupts */
1230 smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_);
1231 napi_complete(napi);
1232 temp = smsc911x_reg_read(pdata, INT_EN);
1233 temp |= INT_EN_RSFL_EN_;
1234 smsc911x_reg_write(pdata, INT_EN, temp);
1235 break;
1236 }
1237
1238 /* Count packet for NAPI scheduling, even if it has an error.
1239 * Error packets still require cycles to discard */
1240 npackets++;
1241
1242 pktlength = ((rxstat & 0x3FFF0000) >> 16);
1243 pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2;
1244 smsc911x_rx_counterrors(dev, rxstat);
1245
1246 if (unlikely(rxstat & RX_STS_ES_)) {
1247 SMSC_WARN(pdata, rx_err,
1248 "Discarding packet with error bit set");
1249 /* Packet has an error, discard it and continue with
1250 * the next */
1251 smsc911x_rx_fastforward(pdata, pktwords);
1252 dev->stats.rx_dropped++;
1253 continue;
1254 }
1255
1256 skb = netdev_alloc_skb(dev, pktwords << 2);
1257 if (unlikely(!skb)) {
1258 SMSC_WARN(pdata, rx_err,
1259 "Unable to allocate skb for rx packet");
1260 /* Drop the packet and stop this polling iteration */
1261 smsc911x_rx_fastforward(pdata, pktwords);
1262 dev->stats.rx_dropped++;
1263 break;
1264 }
1265
1266 pdata->ops->rx_readfifo(pdata,
1267 (unsigned int *)skb->data, pktwords);
1268
1269 /* Align IP on 16B boundary */
1270 skb_reserve(skb, NET_IP_ALIGN);
1271 skb_put(skb, pktlength - 4);
1272 skb->protocol = eth_type_trans(skb, dev);
1273 skb_checksum_none_assert(skb);
1274 netif_receive_skb(skb);
1275
1276 /* Update counters */
1277 dev->stats.rx_packets++;
1278 dev->stats.rx_bytes += (pktlength - 4);
1279 }
1280
1281 /* Return total received packets */
1282 return npackets;
1283}
1284
1285/* Returns hash bit number for given MAC address
1286 * Example:
1287 * 01 00 5E 00 00 01 -> returns bit number 31 */
1288static unsigned int smsc911x_hash(char addr[ETH_ALEN])
1289{
1290 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
1291}
1292
1293static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata)
1294{
1295 /* Performs the multicast & mac_cr update. This is called when
1296 * safe on the current hardware, and with the mac_lock held */
1297 unsigned int mac_cr;
1298
1299 SMSC_ASSERT_MAC_LOCK(pdata);
1300
1301 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1302 mac_cr |= pdata->set_bits_mask;
1303 mac_cr &= ~(pdata->clear_bits_mask);
1304 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1305 smsc911x_mac_write(pdata, HASHH, pdata->hashhi);
1306 smsc911x_mac_write(pdata, HASHL, pdata->hashlo);
1307 SMSC_TRACE(pdata, hw, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1308 mac_cr, pdata->hashhi, pdata->hashlo);
1309}
1310
1311static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata)
1312{
1313 unsigned int mac_cr;
1314
1315 /* This function is only called for older LAN911x devices
1316 * (revA or revB), where MAC_CR, HASHH and HASHL should not
1317 * be modified during Rx - newer devices immediately update the
1318 * registers.
1319 *
1320 * This is called from interrupt context */
1321
1322 spin_lock(&pdata->mac_lock);
1323
1324 /* Check Rx has stopped */
1325 if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_)
1326 SMSC_WARN(pdata, drv, "Rx not stopped");
1327
1328 /* Perform the update - safe to do now Rx has stopped */
1329 smsc911x_rx_multicast_update(pdata);
1330
1331 /* Re-enable Rx */
1332 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1333 mac_cr |= MAC_CR_RXEN_;
1334 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1335
1336 pdata->multicast_update_pending = 0;
1337
1338 spin_unlock(&pdata->mac_lock);
1339}
1340
1341static int smsc911x_phy_general_power_up(struct smsc911x_data *pdata)
1342{
1343 int rc = 0;
1344
1345 if (!pdata->phy_dev)
1346 return rc;
1347
1348 /* If the internal PHY is in General Power-Down mode, all, except the
1349 * management interface, is powered-down and stays in that condition as
1350 * long as Phy register bit 0.11 is HIGH.
1351 *
1352 * In that case, clear the bit 0.11, so the PHY powers up and we can
1353 * access to the phy registers.
1354 */
1355 rc = phy_read(pdata->phy_dev, MII_BMCR);
1356 if (rc < 0) {
1357 SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1358 return rc;
1359 }
1360
1361 /* If the PHY general power-down bit is not set is not necessary to
1362 * disable the general power down-mode.
1363 */
1364 if (rc & BMCR_PDOWN) {
1365 rc = phy_write(pdata->phy_dev, MII_BMCR, rc & ~BMCR_PDOWN);
1366 if (rc < 0) {
1367 SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1368 return rc;
1369 }
1370
1371 usleep_range(1000, 1500);
1372 }
1373
1374 return 0;
1375}
1376
1377static int smsc911x_phy_disable_energy_detect(struct smsc911x_data *pdata)
1378{
1379 int rc = 0;
1380
1381 if (!pdata->phy_dev)
1382 return rc;
1383
1384 rc = phy_read(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS);
1385
1386 if (rc < 0) {
1387 SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1388 return rc;
1389 }
1390
1391 /* Only disable if energy detect mode is already enabled */
1392 if (rc & MII_LAN83C185_EDPWRDOWN) {
1393 /* Disable energy detect mode for this SMSC Transceivers */
1394 rc = phy_write(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS,
1395 rc & (~MII_LAN83C185_EDPWRDOWN));
1396
1397 if (rc < 0) {
1398 SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1399 return rc;
1400 }
1401 /* Allow PHY to wakeup */
1402 mdelay(2);
1403 }
1404
1405 return 0;
1406}
1407
1408static int smsc911x_phy_enable_energy_detect(struct smsc911x_data *pdata)
1409{
1410 int rc = 0;
1411
1412 if (!pdata->phy_dev)
1413 return rc;
1414
1415 rc = phy_read(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS);
1416
1417 if (rc < 0) {
1418 SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1419 return rc;
1420 }
1421
1422 /* Only enable if energy detect mode is already disabled */
1423 if (!(rc & MII_LAN83C185_EDPWRDOWN)) {
1424 /* Enable energy detect mode for this SMSC Transceivers */
1425 rc = phy_write(pdata->phy_dev, MII_LAN83C185_CTRL_STATUS,
1426 rc | MII_LAN83C185_EDPWRDOWN);
1427
1428 if (rc < 0) {
1429 SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1430 return rc;
1431 }
1432 }
1433 return 0;
1434}
1435
1436static int smsc911x_soft_reset(struct smsc911x_data *pdata)
1437{
1438 unsigned int timeout;
1439 unsigned int temp;
1440 int ret;
1441
1442 /*
1443 * Make sure to power-up the PHY chip before doing a reset, otherwise
1444 * the reset fails.
1445 */
1446 ret = smsc911x_phy_general_power_up(pdata);
1447 if (ret) {
1448 SMSC_WARN(pdata, drv, "Failed to power-up the PHY chip");
1449 return ret;
1450 }
1451
1452 /*
1453 * LAN9210/LAN9211/LAN9220/LAN9221 chips have an internal PHY that
1454 * are initialized in a Energy Detect Power-Down mode that prevents
1455 * the MAC chip to be software reseted. So we have to wakeup the PHY
1456 * before.
1457 */
1458 if (pdata->generation == 4) {
1459 ret = smsc911x_phy_disable_energy_detect(pdata);
1460
1461 if (ret) {
1462 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
1463 return ret;
1464 }
1465 }
1466
1467 /* Reset the LAN911x */
1468 smsc911x_reg_write(pdata, HW_CFG, HW_CFG_SRST_);
1469 timeout = 10;
1470 do {
1471 udelay(10);
1472 temp = smsc911x_reg_read(pdata, HW_CFG);
1473 } while ((--timeout) && (temp & HW_CFG_SRST_));
1474
1475 if (unlikely(temp & HW_CFG_SRST_)) {
1476 SMSC_WARN(pdata, drv, "Failed to complete reset");
1477 return -EIO;
1478 }
1479
1480 if (pdata->generation == 4) {
1481 ret = smsc911x_phy_enable_energy_detect(pdata);
1482
1483 if (ret) {
1484 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
1485 return ret;
1486 }
1487 }
1488
1489 return 0;
1490}
1491
1492/* Sets the device MAC address to dev_addr, called with mac_lock held */
1493static void
1494smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, u8 dev_addr[6])
1495{
1496 u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4];
1497 u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
1498 (dev_addr[1] << 8) | dev_addr[0];
1499
1500 SMSC_ASSERT_MAC_LOCK(pdata);
1501
1502 smsc911x_mac_write(pdata, ADDRH, mac_high16);
1503 smsc911x_mac_write(pdata, ADDRL, mac_low32);
1504}
1505
1506static void smsc911x_disable_irq_chip(struct net_device *dev)
1507{
1508 struct smsc911x_data *pdata = netdev_priv(dev);
1509
1510 smsc911x_reg_write(pdata, INT_EN, 0);
1511 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
1512}
1513
1514static int smsc911x_open(struct net_device *dev)
1515{
1516 struct smsc911x_data *pdata = netdev_priv(dev);
1517 unsigned int timeout;
1518 unsigned int temp;
1519 unsigned int intcfg;
1520
1521 /* if the phy is not yet registered, retry later*/
1522 if (!pdata->phy_dev) {
1523 SMSC_WARN(pdata, hw, "phy_dev is NULL");
1524 return -EAGAIN;
1525 }
1526
1527 /* Reset the LAN911x */
1528 if (smsc911x_soft_reset(pdata)) {
1529 SMSC_WARN(pdata, hw, "soft reset failed");
1530 return -EIO;
1531 }
1532
1533 smsc911x_reg_write(pdata, HW_CFG, 0x00050000);
1534 smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740);
1535
1536 /* Increase the legal frame size of VLAN tagged frames to 1522 bytes */
1537 spin_lock_irq(&pdata->mac_lock);
1538 smsc911x_mac_write(pdata, VLAN1, ETH_P_8021Q);
1539 spin_unlock_irq(&pdata->mac_lock);
1540
1541 /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1542 timeout = 50;
1543 while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) &&
1544 --timeout) {
1545 udelay(10);
1546 }
1547
1548 if (unlikely(timeout == 0))
1549 SMSC_WARN(pdata, ifup,
1550 "Timed out waiting for EEPROM busy bit to clear");
1551
1552 smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
1553
1554 /* The soft reset above cleared the device's MAC address,
1555 * restore it from local copy (set in probe) */
1556 spin_lock_irq(&pdata->mac_lock);
1557 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1558 spin_unlock_irq(&pdata->mac_lock);
1559
1560 /* Initialise irqs, but leave all sources disabled */
1561 smsc911x_disable_irq_chip(dev);
1562
1563 /* Set interrupt deassertion to 100uS */
1564 intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
1565
1566 if (pdata->config.irq_polarity) {
1567 SMSC_TRACE(pdata, ifup, "irq polarity: active high");
1568 intcfg |= INT_CFG_IRQ_POL_;
1569 } else {
1570 SMSC_TRACE(pdata, ifup, "irq polarity: active low");
1571 }
1572
1573 if (pdata->config.irq_type) {
1574 SMSC_TRACE(pdata, ifup, "irq type: push-pull");
1575 intcfg |= INT_CFG_IRQ_TYPE_;
1576 } else {
1577 SMSC_TRACE(pdata, ifup, "irq type: open drain");
1578 }
1579
1580 smsc911x_reg_write(pdata, INT_CFG, intcfg);
1581
1582 SMSC_TRACE(pdata, ifup, "Testing irq handler using IRQ %d", dev->irq);
1583 pdata->software_irq_signal = 0;
1584 smp_wmb();
1585
1586 temp = smsc911x_reg_read(pdata, INT_EN);
1587 temp |= INT_EN_SW_INT_EN_;
1588 smsc911x_reg_write(pdata, INT_EN, temp);
1589
1590 timeout = 1000;
1591 while (timeout--) {
1592 if (pdata->software_irq_signal)
1593 break;
1594 msleep(1);
1595 }
1596
1597 if (!pdata->software_irq_signal) {
1598 netdev_warn(dev, "ISR failed signaling test (IRQ %d)\n",
1599 dev->irq);
1600 return -ENODEV;
1601 }
1602 SMSC_TRACE(pdata, ifup, "IRQ handler passed test using IRQ %d",
1603 dev->irq);
1604
1605 netdev_info(dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1606 (unsigned long)pdata->ioaddr, dev->irq);
1607
1608 /* Reset the last known duplex and carrier */
1609 pdata->last_duplex = -1;
1610 pdata->last_carrier = -1;
1611
1612 /* Bring the PHY up */
1613 phy_start(pdata->phy_dev);
1614
1615 temp = smsc911x_reg_read(pdata, HW_CFG);
1616 /* Preserve TX FIFO size and external PHY configuration */
1617 temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF);
1618 temp |= HW_CFG_SF_;
1619 smsc911x_reg_write(pdata, HW_CFG, temp);
1620
1621 temp = smsc911x_reg_read(pdata, FIFO_INT);
1622 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1623 temp &= ~(FIFO_INT_RX_STS_LEVEL_);
1624 smsc911x_reg_write(pdata, FIFO_INT, temp);
1625
1626 /* set RX Data offset to 2 bytes for alignment */
1627 smsc911x_reg_write(pdata, RX_CFG, (NET_IP_ALIGN << 8));
1628
1629 /* enable NAPI polling before enabling RX interrupts */
1630 napi_enable(&pdata->napi);
1631
1632 temp = smsc911x_reg_read(pdata, INT_EN);
1633 temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_);
1634 smsc911x_reg_write(pdata, INT_EN, temp);
1635
1636 spin_lock_irq(&pdata->mac_lock);
1637 temp = smsc911x_mac_read(pdata, MAC_CR);
1638 temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
1639 smsc911x_mac_write(pdata, MAC_CR, temp);
1640 spin_unlock_irq(&pdata->mac_lock);
1641
1642 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
1643
1644 netif_start_queue(dev);
1645 return 0;
1646}
1647
1648/* Entry point for stopping the interface */
1649static int smsc911x_stop(struct net_device *dev)
1650{
1651 struct smsc911x_data *pdata = netdev_priv(dev);
1652 unsigned int temp;
1653
1654 /* Disable all device interrupts */
1655 temp = smsc911x_reg_read(pdata, INT_CFG);
1656 temp &= ~INT_CFG_IRQ_EN_;
1657 smsc911x_reg_write(pdata, INT_CFG, temp);
1658
1659 /* Stop Tx and Rx polling */
1660 netif_stop_queue(dev);
1661 napi_disable(&pdata->napi);
1662
1663 /* At this point all Rx and Tx activity is stopped */
1664 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1665 smsc911x_tx_update_txcounters(dev);
1666
1667 /* Bring the PHY down */
1668 if (pdata->phy_dev)
1669 phy_stop(pdata->phy_dev);
1670
1671 SMSC_TRACE(pdata, ifdown, "Interface stopped");
1672 return 0;
1673}
1674
1675/* Entry point for transmitting a packet */
1676static int smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1677{
1678 struct smsc911x_data *pdata = netdev_priv(dev);
1679 unsigned int freespace;
1680 unsigned int tx_cmd_a;
1681 unsigned int tx_cmd_b;
1682 unsigned int temp;
1683 u32 wrsz;
1684 ulong bufp;
1685
1686 freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_;
1687
1688 if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD))
1689 SMSC_WARN(pdata, tx_err,
1690 "Tx data fifo low, space available: %d", freespace);
1691
1692 /* Word alignment adjustment */
1693 tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16;
1694 tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
1695 tx_cmd_a |= (unsigned int)skb->len;
1696
1697 tx_cmd_b = ((unsigned int)skb->len) << 16;
1698 tx_cmd_b |= (unsigned int)skb->len;
1699
1700 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a);
1701 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b);
1702
1703 bufp = (ulong)skb->data & (~0x3);
1704 wrsz = (u32)skb->len + 3;
1705 wrsz += (u32)((ulong)skb->data & 0x3);
1706 wrsz >>= 2;
1707
1708 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
1709 freespace -= (skb->len + 32);
1710 skb_tx_timestamp(skb);
1711 dev_consume_skb_any(skb);
1712
1713 if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30))
1714 smsc911x_tx_update_txcounters(dev);
1715
1716 if (freespace < TX_FIFO_LOW_THRESHOLD) {
1717 netif_stop_queue(dev);
1718 temp = smsc911x_reg_read(pdata, FIFO_INT);
1719 temp &= 0x00FFFFFF;
1720 temp |= 0x32000000;
1721 smsc911x_reg_write(pdata, FIFO_INT, temp);
1722 }
1723
1724 return NETDEV_TX_OK;
1725}
1726
1727/* Entry point for getting status counters */
1728static struct net_device_stats *smsc911x_get_stats(struct net_device *dev)
1729{
1730 struct smsc911x_data *pdata = netdev_priv(dev);
1731 smsc911x_tx_update_txcounters(dev);
1732 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1733 return &dev->stats;
1734}
1735
1736/* Entry point for setting addressing modes */
1737static void smsc911x_set_multicast_list(struct net_device *dev)
1738{
1739 struct smsc911x_data *pdata = netdev_priv(dev);
1740 unsigned long flags;
1741
1742 if (dev->flags & IFF_PROMISC) {
1743 /* Enabling promiscuous mode */
1744 pdata->set_bits_mask = MAC_CR_PRMS_;
1745 pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1746 pdata->hashhi = 0;
1747 pdata->hashlo = 0;
1748 } else if (dev->flags & IFF_ALLMULTI) {
1749 /* Enabling all multicast mode */
1750 pdata->set_bits_mask = MAC_CR_MCPAS_;
1751 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_);
1752 pdata->hashhi = 0;
1753 pdata->hashlo = 0;
1754 } else if (!netdev_mc_empty(dev)) {
1755 /* Enabling specific multicast addresses */
1756 unsigned int hash_high = 0;
1757 unsigned int hash_low = 0;
1758 struct netdev_hw_addr *ha;
1759
1760 pdata->set_bits_mask = MAC_CR_HPFILT_;
1761 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1762
1763 netdev_for_each_mc_addr(ha, dev) {
1764 unsigned int bitnum = smsc911x_hash(ha->addr);
1765 unsigned int mask = 0x01 << (bitnum & 0x1F);
1766
1767 if (bitnum & 0x20)
1768 hash_high |= mask;
1769 else
1770 hash_low |= mask;
1771 }
1772
1773 pdata->hashhi = hash_high;
1774 pdata->hashlo = hash_low;
1775 } else {
1776 /* Enabling local MAC address only */
1777 pdata->set_bits_mask = 0;
1778 pdata->clear_bits_mask =
1779 (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1780 pdata->hashhi = 0;
1781 pdata->hashlo = 0;
1782 }
1783
1784 spin_lock_irqsave(&pdata->mac_lock, flags);
1785
1786 if (pdata->generation <= 1) {
1787 /* Older hardware revision - cannot change these flags while
1788 * receiving data */
1789 if (!pdata->multicast_update_pending) {
1790 unsigned int temp;
1791 SMSC_TRACE(pdata, hw, "scheduling mcast update");
1792 pdata->multicast_update_pending = 1;
1793
1794 /* Request the hardware to stop, then perform the
1795 * update when we get an RX_STOP interrupt */
1796 temp = smsc911x_mac_read(pdata, MAC_CR);
1797 temp &= ~(MAC_CR_RXEN_);
1798 smsc911x_mac_write(pdata, MAC_CR, temp);
1799 } else {
1800 /* There is another update pending, this should now
1801 * use the newer values */
1802 }
1803 } else {
1804 /* Newer hardware revision - can write immediately */
1805 smsc911x_rx_multicast_update(pdata);
1806 }
1807
1808 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1809}
1810
1811static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id)
1812{
1813 struct net_device *dev = dev_id;
1814 struct smsc911x_data *pdata = netdev_priv(dev);
1815 u32 intsts = smsc911x_reg_read(pdata, INT_STS);
1816 u32 inten = smsc911x_reg_read(pdata, INT_EN);
1817 int serviced = IRQ_NONE;
1818 u32 temp;
1819
1820 if (unlikely(intsts & inten & INT_STS_SW_INT_)) {
1821 temp = smsc911x_reg_read(pdata, INT_EN);
1822 temp &= (~INT_EN_SW_INT_EN_);
1823 smsc911x_reg_write(pdata, INT_EN, temp);
1824 smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_);
1825 pdata->software_irq_signal = 1;
1826 smp_wmb();
1827 serviced = IRQ_HANDLED;
1828 }
1829
1830 if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) {
1831 /* Called when there is a multicast update scheduled and
1832 * it is now safe to complete the update */
1833 SMSC_TRACE(pdata, intr, "RX Stop interrupt");
1834 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_);
1835 if (pdata->multicast_update_pending)
1836 smsc911x_rx_multicast_update_workaround(pdata);
1837 serviced = IRQ_HANDLED;
1838 }
1839
1840 if (intsts & inten & INT_STS_TDFA_) {
1841 temp = smsc911x_reg_read(pdata, FIFO_INT);
1842 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1843 smsc911x_reg_write(pdata, FIFO_INT, temp);
1844 smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_);
1845 netif_wake_queue(dev);
1846 serviced = IRQ_HANDLED;
1847 }
1848
1849 if (unlikely(intsts & inten & INT_STS_RXE_)) {
1850 SMSC_TRACE(pdata, intr, "RX Error interrupt");
1851 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_);
1852 serviced = IRQ_HANDLED;
1853 }
1854
1855 if (likely(intsts & inten & INT_STS_RSFL_)) {
1856 if (likely(napi_schedule_prep(&pdata->napi))) {
1857 /* Disable Rx interrupts */
1858 temp = smsc911x_reg_read(pdata, INT_EN);
1859 temp &= (~INT_EN_RSFL_EN_);
1860 smsc911x_reg_write(pdata, INT_EN, temp);
1861 /* Schedule a NAPI poll */
1862 __napi_schedule(&pdata->napi);
1863 } else {
1864 SMSC_WARN(pdata, rx_err, "napi_schedule_prep failed");
1865 }
1866 serviced = IRQ_HANDLED;
1867 }
1868
1869 return serviced;
1870}
1871
1872#ifdef CONFIG_NET_POLL_CONTROLLER
1873static void smsc911x_poll_controller(struct net_device *dev)
1874{
1875 disable_irq(dev->irq);
1876 smsc911x_irqhandler(0, dev);
1877 enable_irq(dev->irq);
1878}
1879#endif /* CONFIG_NET_POLL_CONTROLLER */
1880
1881static int smsc911x_set_mac_address(struct net_device *dev, void *p)
1882{
1883 struct smsc911x_data *pdata = netdev_priv(dev);
1884 struct sockaddr *addr = p;
1885
1886 /* On older hardware revisions we cannot change the mac address
1887 * registers while receiving data. Newer devices can safely change
1888 * this at any time. */
1889 if (pdata->generation <= 1 && netif_running(dev))
1890 return -EBUSY;
1891
1892 if (!is_valid_ether_addr(addr->sa_data))
1893 return -EADDRNOTAVAIL;
1894
1895 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
1896
1897 spin_lock_irq(&pdata->mac_lock);
1898 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1899 spin_unlock_irq(&pdata->mac_lock);
1900
1901 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
1902
1903 return 0;
1904}
1905
1906/* Standard ioctls for mii-tool */
1907static int smsc911x_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1908{
1909 struct smsc911x_data *pdata = netdev_priv(dev);
1910
1911 if (!netif_running(dev) || !pdata->phy_dev)
1912 return -EINVAL;
1913
1914 return phy_mii_ioctl(pdata->phy_dev, ifr, cmd);
1915}
1916
1917static int
1918smsc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1919{
1920 struct smsc911x_data *pdata = netdev_priv(dev);
1921
1922 cmd->maxtxpkt = 1;
1923 cmd->maxrxpkt = 1;
1924 return phy_ethtool_gset(pdata->phy_dev, cmd);
1925}
1926
1927static int
1928smsc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1929{
1930 struct smsc911x_data *pdata = netdev_priv(dev);
1931
1932 return phy_ethtool_sset(pdata->phy_dev, cmd);
1933}
1934
1935static void smsc911x_ethtool_getdrvinfo(struct net_device *dev,
1936 struct ethtool_drvinfo *info)
1937{
1938 strlcpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver));
1939 strlcpy(info->version, SMSC_DRV_VERSION, sizeof(info->version));
1940 strlcpy(info->bus_info, dev_name(dev->dev.parent),
1941 sizeof(info->bus_info));
1942}
1943
1944static int smsc911x_ethtool_nwayreset(struct net_device *dev)
1945{
1946 struct smsc911x_data *pdata = netdev_priv(dev);
1947
1948 return phy_start_aneg(pdata->phy_dev);
1949}
1950
1951static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev)
1952{
1953 struct smsc911x_data *pdata = netdev_priv(dev);
1954 return pdata->msg_enable;
1955}
1956
1957static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1958{
1959 struct smsc911x_data *pdata = netdev_priv(dev);
1960 pdata->msg_enable = level;
1961}
1962
1963static int smsc911x_ethtool_getregslen(struct net_device *dev)
1964{
1965 return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) *
1966 sizeof(u32);
1967}
1968
1969static void
1970smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs,
1971 void *buf)
1972{
1973 struct smsc911x_data *pdata = netdev_priv(dev);
1974 struct phy_device *phy_dev = pdata->phy_dev;
1975 unsigned long flags;
1976 unsigned int i;
1977 unsigned int j = 0;
1978 u32 *data = buf;
1979
1980 regs->version = pdata->idrev;
1981 for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32)))
1982 data[j++] = smsc911x_reg_read(pdata, i);
1983
1984 for (i = MAC_CR; i <= WUCSR; i++) {
1985 spin_lock_irqsave(&pdata->mac_lock, flags);
1986 data[j++] = smsc911x_mac_read(pdata, i);
1987 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1988 }
1989
1990 for (i = 0; i <= 31; i++)
1991 data[j++] = smsc911x_mii_read(phy_dev->mdio.bus,
1992 phy_dev->mdio.addr, i);
1993}
1994
1995static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata)
1996{
1997 unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG);
1998 temp &= ~GPIO_CFG_EEPR_EN_;
1999 smsc911x_reg_write(pdata, GPIO_CFG, temp);
2000 msleep(1);
2001}
2002
2003static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op)
2004{
2005 int timeout = 100;
2006 u32 e2cmd;
2007
2008 SMSC_TRACE(pdata, drv, "op 0x%08x", op);
2009 if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
2010 SMSC_WARN(pdata, drv, "Busy at start");
2011 return -EBUSY;
2012 }
2013
2014 e2cmd = op | E2P_CMD_EPC_BUSY_;
2015 smsc911x_reg_write(pdata, E2P_CMD, e2cmd);
2016
2017 do {
2018 msleep(1);
2019 e2cmd = smsc911x_reg_read(pdata, E2P_CMD);
2020 } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout));
2021
2022 if (!timeout) {
2023 SMSC_TRACE(pdata, drv, "TIMED OUT");
2024 return -EAGAIN;
2025 }
2026
2027 if (e2cmd & E2P_CMD_EPC_TIMEOUT_) {
2028 SMSC_TRACE(pdata, drv, "Error occurred during eeprom operation");
2029 return -EINVAL;
2030 }
2031
2032 return 0;
2033}
2034
2035static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata,
2036 u8 address, u8 *data)
2037{
2038 u32 op = E2P_CMD_EPC_CMD_READ_ | address;
2039 int ret;
2040
2041 SMSC_TRACE(pdata, drv, "address 0x%x", address);
2042 ret = smsc911x_eeprom_send_cmd(pdata, op);
2043
2044 if (!ret)
2045 data[address] = smsc911x_reg_read(pdata, E2P_DATA);
2046
2047 return ret;
2048}
2049
2050static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata,
2051 u8 address, u8 data)
2052{
2053 u32 op = E2P_CMD_EPC_CMD_ERASE_ | address;
2054 u32 temp;
2055 int ret;
2056
2057 SMSC_TRACE(pdata, drv, "address 0x%x, data 0x%x", address, data);
2058 ret = smsc911x_eeprom_send_cmd(pdata, op);
2059
2060 if (!ret) {
2061 op = E2P_CMD_EPC_CMD_WRITE_ | address;
2062 smsc911x_reg_write(pdata, E2P_DATA, (u32)data);
2063
2064 /* Workaround for hardware read-after-write restriction */
2065 temp = smsc911x_reg_read(pdata, BYTE_TEST);
2066
2067 ret = smsc911x_eeprom_send_cmd(pdata, op);
2068 }
2069
2070 return ret;
2071}
2072
2073static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev)
2074{
2075 return SMSC911X_EEPROM_SIZE;
2076}
2077
2078static int smsc911x_ethtool_get_eeprom(struct net_device *dev,
2079 struct ethtool_eeprom *eeprom, u8 *data)
2080{
2081 struct smsc911x_data *pdata = netdev_priv(dev);
2082 u8 eeprom_data[SMSC911X_EEPROM_SIZE];
2083 int len;
2084 int i;
2085
2086 smsc911x_eeprom_enable_access(pdata);
2087
2088 len = min(eeprom->len, SMSC911X_EEPROM_SIZE);
2089 for (i = 0; i < len; i++) {
2090 int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data);
2091 if (ret < 0) {
2092 eeprom->len = 0;
2093 return ret;
2094 }
2095 }
2096
2097 memcpy(data, &eeprom_data[eeprom->offset], len);
2098 eeprom->len = len;
2099 return 0;
2100}
2101
2102static int smsc911x_ethtool_set_eeprom(struct net_device *dev,
2103 struct ethtool_eeprom *eeprom, u8 *data)
2104{
2105 int ret;
2106 struct smsc911x_data *pdata = netdev_priv(dev);
2107
2108 smsc911x_eeprom_enable_access(pdata);
2109 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_);
2110 ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data);
2111 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_);
2112
2113 /* Single byte write, according to man page */
2114 eeprom->len = 1;
2115
2116 return ret;
2117}
2118
2119static const struct ethtool_ops smsc911x_ethtool_ops = {
2120 .get_settings = smsc911x_ethtool_getsettings,
2121 .set_settings = smsc911x_ethtool_setsettings,
2122 .get_link = ethtool_op_get_link,
2123 .get_drvinfo = smsc911x_ethtool_getdrvinfo,
2124 .nway_reset = smsc911x_ethtool_nwayreset,
2125 .get_msglevel = smsc911x_ethtool_getmsglevel,
2126 .set_msglevel = smsc911x_ethtool_setmsglevel,
2127 .get_regs_len = smsc911x_ethtool_getregslen,
2128 .get_regs = smsc911x_ethtool_getregs,
2129 .get_eeprom_len = smsc911x_ethtool_get_eeprom_len,
2130 .get_eeprom = smsc911x_ethtool_get_eeprom,
2131 .set_eeprom = smsc911x_ethtool_set_eeprom,
2132 .get_ts_info = ethtool_op_get_ts_info,
2133};
2134
2135static const struct net_device_ops smsc911x_netdev_ops = {
2136 .ndo_open = smsc911x_open,
2137 .ndo_stop = smsc911x_stop,
2138 .ndo_start_xmit = smsc911x_hard_start_xmit,
2139 .ndo_get_stats = smsc911x_get_stats,
2140 .ndo_set_rx_mode = smsc911x_set_multicast_list,
2141 .ndo_do_ioctl = smsc911x_do_ioctl,
2142 .ndo_change_mtu = eth_change_mtu,
2143 .ndo_validate_addr = eth_validate_addr,
2144 .ndo_set_mac_address = smsc911x_set_mac_address,
2145#ifdef CONFIG_NET_POLL_CONTROLLER
2146 .ndo_poll_controller = smsc911x_poll_controller,
2147#endif
2148};
2149
2150/* copies the current mac address from hardware to dev->dev_addr */
2151static void smsc911x_read_mac_address(struct net_device *dev)
2152{
2153 struct smsc911x_data *pdata = netdev_priv(dev);
2154 u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH);
2155 u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL);
2156
2157 dev->dev_addr[0] = (u8)(mac_low32);
2158 dev->dev_addr[1] = (u8)(mac_low32 >> 8);
2159 dev->dev_addr[2] = (u8)(mac_low32 >> 16);
2160 dev->dev_addr[3] = (u8)(mac_low32 >> 24);
2161 dev->dev_addr[4] = (u8)(mac_high16);
2162 dev->dev_addr[5] = (u8)(mac_high16 >> 8);
2163}
2164
2165/* Initializing private device structures, only called from probe */
2166static int smsc911x_init(struct net_device *dev)
2167{
2168 struct smsc911x_data *pdata = netdev_priv(dev);
2169 unsigned int byte_test, mask;
2170 unsigned int to = 100;
2171
2172 SMSC_TRACE(pdata, probe, "Driver Parameters:");
2173 SMSC_TRACE(pdata, probe, "LAN base: 0x%08lX",
2174 (unsigned long)pdata->ioaddr);
2175 SMSC_TRACE(pdata, probe, "IRQ: %d", dev->irq);
2176 SMSC_TRACE(pdata, probe, "PHY will be autodetected.");
2177
2178 spin_lock_init(&pdata->dev_lock);
2179 spin_lock_init(&pdata->mac_lock);
2180
2181 if (pdata->ioaddr == NULL) {
2182 SMSC_WARN(pdata, probe, "pdata->ioaddr: 0x00000000");
2183 return -ENODEV;
2184 }
2185
2186 /*
2187 * poll the READY bit in PMT_CTRL. Any other access to the device is
2188 * forbidden while this bit isn't set. Try for 100ms
2189 *
2190 * Note that this test is done before the WORD_SWAP register is
2191 * programmed. So in some configurations the READY bit is at 16 before
2192 * WORD_SWAP is written to. This issue is worked around by waiting
2193 * until either bit 0 or bit 16 gets set in PMT_CTRL.
2194 *
2195 * SMSC has confirmed that checking bit 16 (marked as reserved in
2196 * the datasheet) is fine since these bits "will either never be set
2197 * or can only go high after READY does (so also indicate the device
2198 * is ready)".
2199 */
2200
2201 mask = PMT_CTRL_READY_ | swahw32(PMT_CTRL_READY_);
2202 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & mask) && --to)
2203 udelay(1000);
2204
2205 if (to == 0) {
2206 netdev_err(dev, "Device not READY in 100ms aborting\n");
2207 return -ENODEV;
2208 }
2209
2210 /* Check byte ordering */
2211 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2212 SMSC_TRACE(pdata, probe, "BYTE_TEST: 0x%08X", byte_test);
2213 if (byte_test == 0x43218765) {
2214 SMSC_TRACE(pdata, probe, "BYTE_TEST looks swapped, "
2215 "applying WORD_SWAP");
2216 smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff);
2217
2218 /* 1 dummy read of BYTE_TEST is needed after a write to
2219 * WORD_SWAP before its contents are valid */
2220 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2221
2222 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2223 }
2224
2225 if (byte_test != 0x87654321) {
2226 SMSC_WARN(pdata, drv, "BYTE_TEST: 0x%08X", byte_test);
2227 if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) {
2228 SMSC_WARN(pdata, probe,
2229 "top 16 bits equal to bottom 16 bits");
2230 SMSC_TRACE(pdata, probe,
2231 "This may mean the chip is set "
2232 "for 32 bit while the bus is reading 16 bit");
2233 }
2234 return -ENODEV;
2235 }
2236
2237 /* Default generation to zero (all workarounds apply) */
2238 pdata->generation = 0;
2239
2240 pdata->idrev = smsc911x_reg_read(pdata, ID_REV);
2241 switch (pdata->idrev & 0xFFFF0000) {
2242 case 0x01180000:
2243 case 0x01170000:
2244 case 0x01160000:
2245 case 0x01150000:
2246 case 0x218A0000:
2247 /* LAN911[5678] family */
2248 pdata->generation = pdata->idrev & 0x0000FFFF;
2249 break;
2250
2251 case 0x118A0000:
2252 case 0x117A0000:
2253 case 0x116A0000:
2254 case 0x115A0000:
2255 /* LAN921[5678] family */
2256 pdata->generation = 3;
2257 break;
2258
2259 case 0x92100000:
2260 case 0x92110000:
2261 case 0x92200000:
2262 case 0x92210000:
2263 /* LAN9210/LAN9211/LAN9220/LAN9221 */
2264 pdata->generation = 4;
2265 break;
2266
2267 default:
2268 SMSC_WARN(pdata, probe, "LAN911x not identified, idrev: 0x%08X",
2269 pdata->idrev);
2270 return -ENODEV;
2271 }
2272
2273 SMSC_TRACE(pdata, probe,
2274 "LAN911x identified, idrev: 0x%08X, generation: %d",
2275 pdata->idrev, pdata->generation);
2276
2277 if (pdata->generation == 0)
2278 SMSC_WARN(pdata, probe,
2279 "This driver is not intended for this chip revision");
2280
2281 /* workaround for platforms without an eeprom, where the mac address
2282 * is stored elsewhere and set by the bootloader. This saves the
2283 * mac address before resetting the device */
2284 if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS) {
2285 spin_lock_irq(&pdata->mac_lock);
2286 smsc911x_read_mac_address(dev);
2287 spin_unlock_irq(&pdata->mac_lock);
2288 }
2289
2290 /* Reset the LAN911x */
2291 if (smsc911x_phy_reset(pdata) || smsc911x_soft_reset(pdata))
2292 return -ENODEV;
2293
2294 dev->flags |= IFF_MULTICAST;
2295 netif_napi_add(dev, &pdata->napi, smsc911x_poll, SMSC_NAPI_WEIGHT);
2296 dev->netdev_ops = &smsc911x_netdev_ops;
2297 dev->ethtool_ops = &smsc911x_ethtool_ops;
2298
2299 return 0;
2300}
2301
2302static int smsc911x_drv_remove(struct platform_device *pdev)
2303{
2304 struct net_device *dev;
2305 struct smsc911x_data *pdata;
2306 struct resource *res;
2307
2308 dev = platform_get_drvdata(pdev);
2309 BUG_ON(!dev);
2310 pdata = netdev_priv(dev);
2311 BUG_ON(!pdata);
2312 BUG_ON(!pdata->ioaddr);
2313 BUG_ON(!pdata->phy_dev);
2314
2315 SMSC_TRACE(pdata, ifdown, "Stopping driver");
2316
2317 phy_disconnect(pdata->phy_dev);
2318 pdata->phy_dev = NULL;
2319 mdiobus_unregister(pdata->mii_bus);
2320 mdiobus_free(pdata->mii_bus);
2321
2322 unregister_netdev(dev);
2323 free_irq(dev->irq, dev);
2324 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2325 "smsc911x-memory");
2326 if (!res)
2327 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2328
2329 release_mem_region(res->start, resource_size(res));
2330
2331 iounmap(pdata->ioaddr);
2332
2333 (void)smsc911x_disable_resources(pdev);
2334 smsc911x_free_resources(pdev);
2335
2336 free_netdev(dev);
2337
2338 pm_runtime_put(&pdev->dev);
2339 pm_runtime_disable(&pdev->dev);
2340
2341 return 0;
2342}
2343
2344/* standard register acces */
2345static const struct smsc911x_ops standard_smsc911x_ops = {
2346 .reg_read = __smsc911x_reg_read,
2347 .reg_write = __smsc911x_reg_write,
2348 .rx_readfifo = smsc911x_rx_readfifo,
2349 .tx_writefifo = smsc911x_tx_writefifo,
2350};
2351
2352/* shifted register access */
2353static const struct smsc911x_ops shifted_smsc911x_ops = {
2354 .reg_read = __smsc911x_reg_read_shift,
2355 .reg_write = __smsc911x_reg_write_shift,
2356 .rx_readfifo = smsc911x_rx_readfifo_shift,
2357 .tx_writefifo = smsc911x_tx_writefifo_shift,
2358};
2359
2360static int smsc911x_probe_config(struct smsc911x_platform_config *config,
2361 struct device *dev)
2362{
2363 int phy_interface;
2364 u32 width = 0;
2365 int err;
2366
2367 phy_interface = device_get_phy_mode(dev);
2368 if (phy_interface < 0)
2369 phy_interface = PHY_INTERFACE_MODE_NA;
2370 config->phy_interface = phy_interface;
2371
2372 device_get_mac_address(dev, config->mac, ETH_ALEN);
2373
2374 err = device_property_read_u32(dev, "reg-io-width", &width);
2375 if (err == -ENXIO)
2376 return err;
2377 if (!err && width == 4)
2378 config->flags |= SMSC911X_USE_32BIT;
2379 else
2380 config->flags |= SMSC911X_USE_16BIT;
2381
2382 device_property_read_u32(dev, "reg-shift", &config->shift);
2383
2384 if (device_property_present(dev, "smsc,irq-active-high"))
2385 config->irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH;
2386
2387 if (device_property_present(dev, "smsc,irq-push-pull"))
2388 config->irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL;
2389
2390 if (device_property_present(dev, "smsc,force-internal-phy"))
2391 config->flags |= SMSC911X_FORCE_INTERNAL_PHY;
2392
2393 if (device_property_present(dev, "smsc,force-external-phy"))
2394 config->flags |= SMSC911X_FORCE_EXTERNAL_PHY;
2395
2396 if (device_property_present(dev, "smsc,save-mac-address"))
2397 config->flags |= SMSC911X_SAVE_MAC_ADDRESS;
2398
2399 return 0;
2400}
2401
2402static int smsc911x_drv_probe(struct platform_device *pdev)
2403{
2404 struct net_device *dev;
2405 struct smsc911x_data *pdata;
2406 struct smsc911x_platform_config *config = dev_get_platdata(&pdev->dev);
2407 struct resource *res;
2408 unsigned int intcfg = 0;
2409 int res_size, irq, irq_flags;
2410 int retval;
2411
2412 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2413 "smsc911x-memory");
2414 if (!res)
2415 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2416 if (!res) {
2417 pr_warn("Could not allocate resource\n");
2418 retval = -ENODEV;
2419 goto out_0;
2420 }
2421 res_size = resource_size(res);
2422
2423 irq = platform_get_irq(pdev, 0);
2424 if (irq == -EPROBE_DEFER) {
2425 retval = -EPROBE_DEFER;
2426 goto out_0;
2427 } else if (irq <= 0) {
2428 pr_warn("Could not allocate irq resource\n");
2429 retval = -ENODEV;
2430 goto out_0;
2431 }
2432
2433 if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) {
2434 retval = -EBUSY;
2435 goto out_0;
2436 }
2437
2438 dev = alloc_etherdev(sizeof(struct smsc911x_data));
2439 if (!dev) {
2440 retval = -ENOMEM;
2441 goto out_release_io_1;
2442 }
2443
2444 SET_NETDEV_DEV(dev, &pdev->dev);
2445
2446 pdata = netdev_priv(dev);
2447 dev->irq = irq;
2448 irq_flags = irq_get_trigger_type(irq);
2449 pdata->ioaddr = ioremap_nocache(res->start, res_size);
2450
2451 pdata->dev = dev;
2452 pdata->msg_enable = ((1 << debug) - 1);
2453
2454 platform_set_drvdata(pdev, dev);
2455
2456 retval = smsc911x_request_resources(pdev);
2457 if (retval)
2458 goto out_request_resources_fail;
2459
2460 retval = smsc911x_enable_resources(pdev);
2461 if (retval)
2462 goto out_enable_resources_fail;
2463
2464 if (pdata->ioaddr == NULL) {
2465 SMSC_WARN(pdata, probe, "Error smsc911x base address invalid");
2466 retval = -ENOMEM;
2467 goto out_disable_resources;
2468 }
2469
2470 retval = smsc911x_probe_config(&pdata->config, &pdev->dev);
2471 if (retval && config) {
2472 /* copy config parameters across to pdata */
2473 memcpy(&pdata->config, config, sizeof(pdata->config));
2474 retval = 0;
2475 }
2476
2477 if (retval) {
2478 SMSC_WARN(pdata, probe, "Error smsc911x config not found");
2479 goto out_disable_resources;
2480 }
2481
2482 /* assume standard, non-shifted, access to HW registers */
2483 pdata->ops = &standard_smsc911x_ops;
2484 /* apply the right access if shifting is needed */
2485 if (pdata->config.shift)
2486 pdata->ops = &shifted_smsc911x_ops;
2487
2488 pm_runtime_enable(&pdev->dev);
2489 pm_runtime_get_sync(&pdev->dev);
2490
2491 retval = smsc911x_init(dev);
2492 if (retval < 0)
2493 goto out_disable_resources;
2494
2495 /* configure irq polarity and type before connecting isr */
2496 if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH)
2497 intcfg |= INT_CFG_IRQ_POL_;
2498
2499 if (pdata->config.irq_type == SMSC911X_IRQ_TYPE_PUSH_PULL)
2500 intcfg |= INT_CFG_IRQ_TYPE_;
2501
2502 smsc911x_reg_write(pdata, INT_CFG, intcfg);
2503
2504 /* Ensure interrupts are globally disabled before connecting ISR */
2505 smsc911x_disable_irq_chip(dev);
2506
2507 retval = request_irq(dev->irq, smsc911x_irqhandler,
2508 irq_flags | IRQF_SHARED, dev->name, dev);
2509 if (retval) {
2510 SMSC_WARN(pdata, probe,
2511 "Unable to claim requested irq: %d", dev->irq);
2512 goto out_disable_resources;
2513 }
2514
2515 netif_carrier_off(dev);
2516
2517 retval = register_netdev(dev);
2518 if (retval) {
2519 SMSC_WARN(pdata, probe, "Error %i registering device", retval);
2520 goto out_free_irq;
2521 } else {
2522 SMSC_TRACE(pdata, probe,
2523 "Network interface: \"%s\"", dev->name);
2524 }
2525
2526 retval = smsc911x_mii_init(pdev, dev);
2527 if (retval) {
2528 SMSC_WARN(pdata, probe, "Error %i initialising mii", retval);
2529 goto out_unregister_netdev_5;
2530 }
2531
2532 spin_lock_irq(&pdata->mac_lock);
2533
2534 /* Check if mac address has been specified when bringing interface up */
2535 if (is_valid_ether_addr(dev->dev_addr)) {
2536 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2537 SMSC_TRACE(pdata, probe,
2538 "MAC Address is specified by configuration");
2539 } else if (is_valid_ether_addr(pdata->config.mac)) {
2540 memcpy(dev->dev_addr, pdata->config.mac, ETH_ALEN);
2541 SMSC_TRACE(pdata, probe,
2542 "MAC Address specified by platform data");
2543 } else {
2544 /* Try reading mac address from device. if EEPROM is present
2545 * it will already have been set */
2546 smsc_get_mac(dev);
2547
2548 if (is_valid_ether_addr(dev->dev_addr)) {
2549 /* eeprom values are valid so use them */
2550 SMSC_TRACE(pdata, probe,
2551 "Mac Address is read from LAN911x EEPROM");
2552 } else {
2553 /* eeprom values are invalid, generate random MAC */
2554 eth_hw_addr_random(dev);
2555 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2556 SMSC_TRACE(pdata, probe,
2557 "MAC Address is set to eth_random_addr");
2558 }
2559 }
2560
2561 spin_unlock_irq(&pdata->mac_lock);
2562
2563 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
2564
2565 return 0;
2566
2567out_unregister_netdev_5:
2568 unregister_netdev(dev);
2569out_free_irq:
2570 free_irq(dev->irq, dev);
2571out_disable_resources:
2572 pm_runtime_put(&pdev->dev);
2573 pm_runtime_disable(&pdev->dev);
2574 (void)smsc911x_disable_resources(pdev);
2575out_enable_resources_fail:
2576 smsc911x_free_resources(pdev);
2577out_request_resources_fail:
2578 iounmap(pdata->ioaddr);
2579 free_netdev(dev);
2580out_release_io_1:
2581 release_mem_region(res->start, resource_size(res));
2582out_0:
2583 return retval;
2584}
2585
2586#ifdef CONFIG_PM
2587/* This implementation assumes the devices remains powered on its VDDVARIO
2588 * pins during suspend. */
2589
2590/* TODO: implement freeze/thaw callbacks for hibernation.*/
2591
2592static int smsc911x_suspend(struct device *dev)
2593{
2594 struct net_device *ndev = dev_get_drvdata(dev);
2595 struct smsc911x_data *pdata = netdev_priv(ndev);
2596
2597 /* enable wake on LAN, energy detection and the external PME
2598 * signal. */
2599 smsc911x_reg_write(pdata, PMT_CTRL,
2600 PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ |
2601 PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_);
2602
2603 return 0;
2604}
2605
2606static int smsc911x_resume(struct device *dev)
2607{
2608 struct net_device *ndev = dev_get_drvdata(dev);
2609 struct smsc911x_data *pdata = netdev_priv(ndev);
2610 unsigned int to = 100;
2611
2612 /* Note 3.11 from the datasheet:
2613 * "When the LAN9220 is in a power saving state, a write of any
2614 * data to the BYTE_TEST register will wake-up the device."
2615 */
2616 smsc911x_reg_write(pdata, BYTE_TEST, 0);
2617
2618 /* poll the READY bit in PMT_CTRL. Any other access to the device is
2619 * forbidden while this bit isn't set. Try for 100ms and return -EIO
2620 * if it failed. */
2621 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to)
2622 udelay(1000);
2623
2624 return (to == 0) ? -EIO : 0;
2625}
2626
2627static const struct dev_pm_ops smsc911x_pm_ops = {
2628 .suspend = smsc911x_suspend,
2629 .resume = smsc911x_resume,
2630};
2631
2632#define SMSC911X_PM_OPS (&smsc911x_pm_ops)
2633
2634#else
2635#define SMSC911X_PM_OPS NULL
2636#endif
2637
2638#ifdef CONFIG_OF
2639static const struct of_device_id smsc911x_dt_ids[] = {
2640 { .compatible = "smsc,lan9115", },
2641 { /* sentinel */ }
2642};
2643MODULE_DEVICE_TABLE(of, smsc911x_dt_ids);
2644#endif
2645
2646static const struct acpi_device_id smsc911x_acpi_match[] = {
2647 { "ARMH9118", 0 },
2648 { }
2649};
2650MODULE_DEVICE_TABLE(acpi, smsc911x_acpi_match);
2651
2652static struct platform_driver smsc911x_driver = {
2653 .probe = smsc911x_drv_probe,
2654 .remove = smsc911x_drv_remove,
2655 .driver = {
2656 .name = SMSC_CHIPNAME,
2657 .pm = SMSC911X_PM_OPS,
2658 .of_match_table = of_match_ptr(smsc911x_dt_ids),
2659 .acpi_match_table = ACPI_PTR(smsc911x_acpi_match),
2660 },
2661};
2662
2663/* Entry point for loading the module */
2664static int __init smsc911x_init_module(void)
2665{
2666 SMSC_INITIALIZE();
2667 return platform_driver_register(&smsc911x_driver);
2668}
2669
2670/* entry point for unloading the module */
2671static void __exit smsc911x_cleanup_module(void)
2672{
2673 platform_driver_unregister(&smsc911x_driver);
2674}
2675
2676module_init(smsc911x_init_module);
2677module_exit(smsc911x_cleanup_module);