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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * AT86RF230/RF231 driver
4 *
5 * Copyright (C) 2009-2012 Siemens AG
6 *
7 * Written by:
8 * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
9 * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
10 * Alexander Aring <aar@pengutronix.de>
11 */
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/hrtimer.h>
15#include <linux/jiffies.h>
16#include <linux/interrupt.h>
17#include <linux/irq.h>
18#include <linux/gpio.h>
19#include <linux/delay.h>
20#include <linux/property.h>
21#include <linux/spi/spi.h>
22#include <linux/regmap.h>
23#include <linux/skbuff.h>
24#include <linux/of_gpio.h>
25#include <linux/ieee802154.h>
26
27#include <net/mac802154.h>
28#include <net/cfg802154.h>
29
30#include "at86rf230.h"
31
32struct at86rf230_local;
33/* at86rf2xx chip depend data.
34 * All timings are in us.
35 */
36struct at86rf2xx_chip_data {
37 u16 t_sleep_cycle;
38 u16 t_channel_switch;
39 u16 t_reset_to_off;
40 u16 t_off_to_aack;
41 u16 t_off_to_tx_on;
42 u16 t_off_to_sleep;
43 u16 t_sleep_to_off;
44 u16 t_frame;
45 u16 t_p_ack;
46 int rssi_base_val;
47
48 int (*set_channel)(struct at86rf230_local *, u8, u8);
49 int (*set_txpower)(struct at86rf230_local *, s32);
50};
51
52#define AT86RF2XX_MAX_BUF (127 + 3)
53/* tx retries to access the TX_ON state
54 * if it's above then force change will be started.
55 *
56 * We assume the max_frame_retries (7) value of 802.15.4 here.
57 */
58#define AT86RF2XX_MAX_TX_RETRIES 7
59/* We use the recommended 5 minutes timeout to recalibrate */
60#define AT86RF2XX_CAL_LOOP_TIMEOUT (5 * 60 * HZ)
61
62struct at86rf230_state_change {
63 struct at86rf230_local *lp;
64 int irq;
65
66 struct hrtimer timer;
67 struct spi_message msg;
68 struct spi_transfer trx;
69 u8 buf[AT86RF2XX_MAX_BUF];
70
71 void (*complete)(void *context);
72 u8 from_state;
73 u8 to_state;
74 int trac;
75
76 bool free;
77};
78
79struct at86rf230_local {
80 struct spi_device *spi;
81
82 struct ieee802154_hw *hw;
83 struct at86rf2xx_chip_data *data;
84 struct regmap *regmap;
85 struct gpio_desc *slp_tr;
86 bool sleep;
87
88 struct completion state_complete;
89 struct at86rf230_state_change state;
90
91 unsigned long cal_timeout;
92 bool is_tx;
93 bool is_tx_from_off;
94 bool was_tx;
95 u8 tx_retry;
96 struct sk_buff *tx_skb;
97 struct at86rf230_state_change tx;
98};
99
100#define AT86RF2XX_NUMREGS 0x3F
101
102static void
103at86rf230_async_state_change(struct at86rf230_local *lp,
104 struct at86rf230_state_change *ctx,
105 const u8 state, void (*complete)(void *context));
106
107static inline void
108at86rf230_sleep(struct at86rf230_local *lp)
109{
110 if (lp->slp_tr) {
111 gpiod_set_value(lp->slp_tr, 1);
112 usleep_range(lp->data->t_off_to_sleep,
113 lp->data->t_off_to_sleep + 10);
114 lp->sleep = true;
115 }
116}
117
118static inline void
119at86rf230_awake(struct at86rf230_local *lp)
120{
121 if (lp->slp_tr) {
122 gpiod_set_value(lp->slp_tr, 0);
123 usleep_range(lp->data->t_sleep_to_off,
124 lp->data->t_sleep_to_off + 100);
125 lp->sleep = false;
126 }
127}
128
129static inline int
130__at86rf230_write(struct at86rf230_local *lp,
131 unsigned int addr, unsigned int data)
132{
133 bool sleep = lp->sleep;
134 int ret;
135
136 /* awake for register setting if sleep */
137 if (sleep)
138 at86rf230_awake(lp);
139
140 ret = regmap_write(lp->regmap, addr, data);
141
142 /* sleep again if was sleeping */
143 if (sleep)
144 at86rf230_sleep(lp);
145
146 return ret;
147}
148
149static inline int
150__at86rf230_read(struct at86rf230_local *lp,
151 unsigned int addr, unsigned int *data)
152{
153 bool sleep = lp->sleep;
154 int ret;
155
156 /* awake for register setting if sleep */
157 if (sleep)
158 at86rf230_awake(lp);
159
160 ret = regmap_read(lp->regmap, addr, data);
161
162 /* sleep again if was sleeping */
163 if (sleep)
164 at86rf230_sleep(lp);
165
166 return ret;
167}
168
169static inline int
170at86rf230_read_subreg(struct at86rf230_local *lp,
171 unsigned int addr, unsigned int mask,
172 unsigned int shift, unsigned int *data)
173{
174 int rc;
175
176 rc = __at86rf230_read(lp, addr, data);
177 if (!rc)
178 *data = (*data & mask) >> shift;
179
180 return rc;
181}
182
183static inline int
184at86rf230_write_subreg(struct at86rf230_local *lp,
185 unsigned int addr, unsigned int mask,
186 unsigned int shift, unsigned int data)
187{
188 bool sleep = lp->sleep;
189 int ret;
190
191 /* awake for register setting if sleep */
192 if (sleep)
193 at86rf230_awake(lp);
194
195 ret = regmap_update_bits(lp->regmap, addr, mask, data << shift);
196
197 /* sleep again if was sleeping */
198 if (sleep)
199 at86rf230_sleep(lp);
200
201 return ret;
202}
203
204static inline void
205at86rf230_slp_tr_rising_edge(struct at86rf230_local *lp)
206{
207 gpiod_set_value(lp->slp_tr, 1);
208 udelay(1);
209 gpiod_set_value(lp->slp_tr, 0);
210}
211
212static bool
213at86rf230_reg_writeable(struct device *dev, unsigned int reg)
214{
215 switch (reg) {
216 case RG_TRX_STATE:
217 case RG_TRX_CTRL_0:
218 case RG_TRX_CTRL_1:
219 case RG_PHY_TX_PWR:
220 case RG_PHY_ED_LEVEL:
221 case RG_PHY_CC_CCA:
222 case RG_CCA_THRES:
223 case RG_RX_CTRL:
224 case RG_SFD_VALUE:
225 case RG_TRX_CTRL_2:
226 case RG_ANT_DIV:
227 case RG_IRQ_MASK:
228 case RG_VREG_CTRL:
229 case RG_BATMON:
230 case RG_XOSC_CTRL:
231 case RG_RX_SYN:
232 case RG_XAH_CTRL_1:
233 case RG_FTN_CTRL:
234 case RG_PLL_CF:
235 case RG_PLL_DCU:
236 case RG_SHORT_ADDR_0:
237 case RG_SHORT_ADDR_1:
238 case RG_PAN_ID_0:
239 case RG_PAN_ID_1:
240 case RG_IEEE_ADDR_0:
241 case RG_IEEE_ADDR_1:
242 case RG_IEEE_ADDR_2:
243 case RG_IEEE_ADDR_3:
244 case RG_IEEE_ADDR_4:
245 case RG_IEEE_ADDR_5:
246 case RG_IEEE_ADDR_6:
247 case RG_IEEE_ADDR_7:
248 case RG_XAH_CTRL_0:
249 case RG_CSMA_SEED_0:
250 case RG_CSMA_SEED_1:
251 case RG_CSMA_BE:
252 return true;
253 default:
254 return false;
255 }
256}
257
258static bool
259at86rf230_reg_readable(struct device *dev, unsigned int reg)
260{
261 bool rc;
262
263 /* all writeable are also readable */
264 rc = at86rf230_reg_writeable(dev, reg);
265 if (rc)
266 return rc;
267
268 /* readonly regs */
269 switch (reg) {
270 case RG_TRX_STATUS:
271 case RG_PHY_RSSI:
272 case RG_IRQ_STATUS:
273 case RG_PART_NUM:
274 case RG_VERSION_NUM:
275 case RG_MAN_ID_1:
276 case RG_MAN_ID_0:
277 return true;
278 default:
279 return false;
280 }
281}
282
283static bool
284at86rf230_reg_volatile(struct device *dev, unsigned int reg)
285{
286 /* can be changed during runtime */
287 switch (reg) {
288 case RG_TRX_STATUS:
289 case RG_TRX_STATE:
290 case RG_PHY_RSSI:
291 case RG_PHY_ED_LEVEL:
292 case RG_IRQ_STATUS:
293 case RG_VREG_CTRL:
294 case RG_PLL_CF:
295 case RG_PLL_DCU:
296 return true;
297 default:
298 return false;
299 }
300}
301
302static bool
303at86rf230_reg_precious(struct device *dev, unsigned int reg)
304{
305 /* don't clear irq line on read */
306 switch (reg) {
307 case RG_IRQ_STATUS:
308 return true;
309 default:
310 return false;
311 }
312}
313
314static const struct regmap_config at86rf230_regmap_spi_config = {
315 .reg_bits = 8,
316 .val_bits = 8,
317 .write_flag_mask = CMD_REG | CMD_WRITE,
318 .read_flag_mask = CMD_REG,
319 .cache_type = REGCACHE_RBTREE,
320 .max_register = AT86RF2XX_NUMREGS,
321 .writeable_reg = at86rf230_reg_writeable,
322 .readable_reg = at86rf230_reg_readable,
323 .volatile_reg = at86rf230_reg_volatile,
324 .precious_reg = at86rf230_reg_precious,
325};
326
327static void
328at86rf230_async_error_recover_complete(void *context)
329{
330 struct at86rf230_state_change *ctx = context;
331 struct at86rf230_local *lp = ctx->lp;
332
333 if (ctx->free)
334 kfree(ctx);
335
336 if (lp->was_tx) {
337 lp->was_tx = 0;
338 ieee802154_xmit_hw_error(lp->hw, lp->tx_skb);
339 }
340}
341
342static void
343at86rf230_async_error_recover(void *context)
344{
345 struct at86rf230_state_change *ctx = context;
346 struct at86rf230_local *lp = ctx->lp;
347
348 if (lp->is_tx) {
349 lp->was_tx = 1;
350 lp->is_tx = 0;
351 }
352
353 at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON,
354 at86rf230_async_error_recover_complete);
355}
356
357static inline void
358at86rf230_async_error(struct at86rf230_local *lp,
359 struct at86rf230_state_change *ctx, int rc)
360{
361 dev_err(&lp->spi->dev, "spi_async error %d\n", rc);
362
363 at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF,
364 at86rf230_async_error_recover);
365}
366
367/* Generic function to get some register value in async mode */
368static void
369at86rf230_async_read_reg(struct at86rf230_local *lp, u8 reg,
370 struct at86rf230_state_change *ctx,
371 void (*complete)(void *context))
372{
373 int rc;
374
375 u8 *tx_buf = ctx->buf;
376
377 tx_buf[0] = (reg & CMD_REG_MASK) | CMD_REG;
378 ctx->msg.complete = complete;
379 rc = spi_async(lp->spi, &ctx->msg);
380 if (rc)
381 at86rf230_async_error(lp, ctx, rc);
382}
383
384static void
385at86rf230_async_write_reg(struct at86rf230_local *lp, u8 reg, u8 val,
386 struct at86rf230_state_change *ctx,
387 void (*complete)(void *context))
388{
389 int rc;
390
391 ctx->buf[0] = (reg & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
392 ctx->buf[1] = val;
393 ctx->msg.complete = complete;
394 rc = spi_async(lp->spi, &ctx->msg);
395 if (rc)
396 at86rf230_async_error(lp, ctx, rc);
397}
398
399static void
400at86rf230_async_state_assert(void *context)
401{
402 struct at86rf230_state_change *ctx = context;
403 struct at86rf230_local *lp = ctx->lp;
404 const u8 *buf = ctx->buf;
405 const u8 trx_state = buf[1] & TRX_STATE_MASK;
406
407 /* Assert state change */
408 if (trx_state != ctx->to_state) {
409 /* Special handling if transceiver state is in
410 * STATE_BUSY_RX_AACK and a SHR was detected.
411 */
412 if (trx_state == STATE_BUSY_RX_AACK) {
413 /* Undocumented race condition. If we send a state
414 * change to STATE_RX_AACK_ON the transceiver could
415 * change his state automatically to STATE_BUSY_RX_AACK
416 * if a SHR was detected. This is not an error, but we
417 * can't assert this.
418 */
419 if (ctx->to_state == STATE_RX_AACK_ON)
420 goto done;
421
422 /* If we change to STATE_TX_ON without forcing and
423 * transceiver state is STATE_BUSY_RX_AACK, we wait
424 * 'tFrame + tPAck' receiving time. In this time the
425 * PDU should be received. If the transceiver is still
426 * in STATE_BUSY_RX_AACK, we run a force state change
427 * to STATE_TX_ON. This is a timeout handling, if the
428 * transceiver stucks in STATE_BUSY_RX_AACK.
429 *
430 * Additional we do several retries to try to get into
431 * TX_ON state without forcing. If the retries are
432 * higher or equal than AT86RF2XX_MAX_TX_RETRIES we
433 * will do a force change.
434 */
435 if (ctx->to_state == STATE_TX_ON ||
436 ctx->to_state == STATE_TRX_OFF) {
437 u8 state = ctx->to_state;
438
439 if (lp->tx_retry >= AT86RF2XX_MAX_TX_RETRIES)
440 state = STATE_FORCE_TRX_OFF;
441 lp->tx_retry++;
442
443 at86rf230_async_state_change(lp, ctx, state,
444 ctx->complete);
445 return;
446 }
447 }
448
449 dev_warn(&lp->spi->dev, "unexcept state change from 0x%02x to 0x%02x. Actual state: 0x%02x\n",
450 ctx->from_state, ctx->to_state, trx_state);
451 }
452
453done:
454 if (ctx->complete)
455 ctx->complete(context);
456}
457
458static enum hrtimer_restart at86rf230_async_state_timer(struct hrtimer *timer)
459{
460 struct at86rf230_state_change *ctx =
461 container_of(timer, struct at86rf230_state_change, timer);
462 struct at86rf230_local *lp = ctx->lp;
463
464 at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
465 at86rf230_async_state_assert);
466
467 return HRTIMER_NORESTART;
468}
469
470/* Do state change timing delay. */
471static void
472at86rf230_async_state_delay(void *context)
473{
474 struct at86rf230_state_change *ctx = context;
475 struct at86rf230_local *lp = ctx->lp;
476 struct at86rf2xx_chip_data *c = lp->data;
477 bool force = false;
478 ktime_t tim;
479
480 /* The force state changes are will show as normal states in the
481 * state status subregister. We change the to_state to the
482 * corresponding one and remember if it was a force change, this
483 * differs if we do a state change from STATE_BUSY_RX_AACK.
484 */
485 switch (ctx->to_state) {
486 case STATE_FORCE_TX_ON:
487 ctx->to_state = STATE_TX_ON;
488 force = true;
489 break;
490 case STATE_FORCE_TRX_OFF:
491 ctx->to_state = STATE_TRX_OFF;
492 force = true;
493 break;
494 default:
495 break;
496 }
497
498 switch (ctx->from_state) {
499 case STATE_TRX_OFF:
500 switch (ctx->to_state) {
501 case STATE_RX_AACK_ON:
502 tim = c->t_off_to_aack * NSEC_PER_USEC;
503 /* state change from TRX_OFF to RX_AACK_ON to do a
504 * calibration, we need to reset the timeout for the
505 * next one.
506 */
507 lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
508 goto change;
509 case STATE_TX_ARET_ON:
510 case STATE_TX_ON:
511 tim = c->t_off_to_tx_on * NSEC_PER_USEC;
512 /* state change from TRX_OFF to TX_ON or ARET_ON to do
513 * a calibration, we need to reset the timeout for the
514 * next one.
515 */
516 lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
517 goto change;
518 default:
519 break;
520 }
521 break;
522 case STATE_BUSY_RX_AACK:
523 switch (ctx->to_state) {
524 case STATE_TRX_OFF:
525 case STATE_TX_ON:
526 /* Wait for worst case receiving time if we
527 * didn't make a force change from BUSY_RX_AACK
528 * to TX_ON or TRX_OFF.
529 */
530 if (!force) {
531 tim = (c->t_frame + c->t_p_ack) * NSEC_PER_USEC;
532 goto change;
533 }
534 break;
535 default:
536 break;
537 }
538 break;
539 /* Default value, means RESET state */
540 case STATE_P_ON:
541 switch (ctx->to_state) {
542 case STATE_TRX_OFF:
543 tim = c->t_reset_to_off * NSEC_PER_USEC;
544 goto change;
545 default:
546 break;
547 }
548 break;
549 default:
550 break;
551 }
552
553 /* Default delay is 1us in the most cases */
554 udelay(1);
555 at86rf230_async_state_timer(&ctx->timer);
556 return;
557
558change:
559 hrtimer_start(&ctx->timer, tim, HRTIMER_MODE_REL);
560}
561
562static void
563at86rf230_async_state_change_start(void *context)
564{
565 struct at86rf230_state_change *ctx = context;
566 struct at86rf230_local *lp = ctx->lp;
567 u8 *buf = ctx->buf;
568 const u8 trx_state = buf[1] & TRX_STATE_MASK;
569
570 /* Check for "possible" STATE_TRANSITION_IN_PROGRESS */
571 if (trx_state == STATE_TRANSITION_IN_PROGRESS) {
572 udelay(1);
573 at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
574 at86rf230_async_state_change_start);
575 return;
576 }
577
578 /* Check if we already are in the state which we change in */
579 if (trx_state == ctx->to_state) {
580 if (ctx->complete)
581 ctx->complete(context);
582 return;
583 }
584
585 /* Set current state to the context of state change */
586 ctx->from_state = trx_state;
587
588 /* Going into the next step for a state change which do a timing
589 * relevant delay.
590 */
591 at86rf230_async_write_reg(lp, RG_TRX_STATE, ctx->to_state, ctx,
592 at86rf230_async_state_delay);
593}
594
595static void
596at86rf230_async_state_change(struct at86rf230_local *lp,
597 struct at86rf230_state_change *ctx,
598 const u8 state, void (*complete)(void *context))
599{
600 /* Initialization for the state change context */
601 ctx->to_state = state;
602 ctx->complete = complete;
603 at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
604 at86rf230_async_state_change_start);
605}
606
607static void
608at86rf230_sync_state_change_complete(void *context)
609{
610 struct at86rf230_state_change *ctx = context;
611 struct at86rf230_local *lp = ctx->lp;
612
613 complete(&lp->state_complete);
614}
615
616/* This function do a sync framework above the async state change.
617 * Some callbacks of the IEEE 802.15.4 driver interface need to be
618 * handled synchronously.
619 */
620static int
621at86rf230_sync_state_change(struct at86rf230_local *lp, unsigned int state)
622{
623 unsigned long rc;
624
625 at86rf230_async_state_change(lp, &lp->state, state,
626 at86rf230_sync_state_change_complete);
627
628 rc = wait_for_completion_timeout(&lp->state_complete,
629 msecs_to_jiffies(100));
630 if (!rc) {
631 at86rf230_async_error(lp, &lp->state, -ETIMEDOUT);
632 return -ETIMEDOUT;
633 }
634
635 return 0;
636}
637
638static void
639at86rf230_tx_complete(void *context)
640{
641 struct at86rf230_state_change *ctx = context;
642 struct at86rf230_local *lp = ctx->lp;
643
644 if (ctx->trac == IEEE802154_SUCCESS)
645 ieee802154_xmit_complete(lp->hw, lp->tx_skb, false);
646 else
647 ieee802154_xmit_error(lp->hw, lp->tx_skb, ctx->trac);
648
649 kfree(ctx);
650}
651
652static void
653at86rf230_tx_on(void *context)
654{
655 struct at86rf230_state_change *ctx = context;
656 struct at86rf230_local *lp = ctx->lp;
657
658 at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON,
659 at86rf230_tx_complete);
660}
661
662static void
663at86rf230_tx_trac_check(void *context)
664{
665 struct at86rf230_state_change *ctx = context;
666 struct at86rf230_local *lp = ctx->lp;
667 u8 trac = TRAC_MASK(ctx->buf[1]);
668
669 switch (trac) {
670 case TRAC_SUCCESS:
671 case TRAC_SUCCESS_DATA_PENDING:
672 ctx->trac = IEEE802154_SUCCESS;
673 break;
674 case TRAC_CHANNEL_ACCESS_FAILURE:
675 ctx->trac = IEEE802154_CHANNEL_ACCESS_FAILURE;
676 break;
677 case TRAC_NO_ACK:
678 ctx->trac = IEEE802154_NO_ACK;
679 break;
680 default:
681 ctx->trac = IEEE802154_SYSTEM_ERROR;
682 }
683
684 at86rf230_async_state_change(lp, ctx, STATE_TX_ON, at86rf230_tx_on);
685}
686
687static void
688at86rf230_rx_read_frame_complete(void *context)
689{
690 struct at86rf230_state_change *ctx = context;
691 struct at86rf230_local *lp = ctx->lp;
692 const u8 *buf = ctx->buf;
693 struct sk_buff *skb;
694 u8 len, lqi;
695
696 len = buf[1];
697 if (!ieee802154_is_valid_psdu_len(len)) {
698 dev_vdbg(&lp->spi->dev, "corrupted frame received\n");
699 len = IEEE802154_MTU;
700 }
701 lqi = buf[2 + len];
702
703 skb = dev_alloc_skb(IEEE802154_MTU);
704 if (!skb) {
705 dev_vdbg(&lp->spi->dev, "failed to allocate sk_buff\n");
706 kfree(ctx);
707 return;
708 }
709
710 skb_put_data(skb, buf + 2, len);
711 ieee802154_rx_irqsafe(lp->hw, skb, lqi);
712 kfree(ctx);
713}
714
715static void
716at86rf230_rx_trac_check(void *context)
717{
718 struct at86rf230_state_change *ctx = context;
719 struct at86rf230_local *lp = ctx->lp;
720 u8 *buf = ctx->buf;
721 int rc;
722
723 buf[0] = CMD_FB;
724 ctx->trx.len = AT86RF2XX_MAX_BUF;
725 ctx->msg.complete = at86rf230_rx_read_frame_complete;
726 rc = spi_async(lp->spi, &ctx->msg);
727 if (rc) {
728 ctx->trx.len = 2;
729 at86rf230_async_error(lp, ctx, rc);
730 }
731}
732
733static void
734at86rf230_irq_trx_end(void *context)
735{
736 struct at86rf230_state_change *ctx = context;
737 struct at86rf230_local *lp = ctx->lp;
738
739 if (lp->is_tx) {
740 lp->is_tx = 0;
741 at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx,
742 at86rf230_tx_trac_check);
743 } else {
744 at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx,
745 at86rf230_rx_trac_check);
746 }
747}
748
749static void
750at86rf230_irq_status(void *context)
751{
752 struct at86rf230_state_change *ctx = context;
753 struct at86rf230_local *lp = ctx->lp;
754 const u8 *buf = ctx->buf;
755 u8 irq = buf[1];
756
757 enable_irq(lp->spi->irq);
758
759 if (irq & IRQ_TRX_END) {
760 at86rf230_irq_trx_end(ctx);
761 } else {
762 dev_err(&lp->spi->dev, "not supported irq %02x received\n",
763 irq);
764 kfree(ctx);
765 }
766}
767
768static void
769at86rf230_setup_spi_messages(struct at86rf230_local *lp,
770 struct at86rf230_state_change *state)
771{
772 state->lp = lp;
773 state->irq = lp->spi->irq;
774 spi_message_init(&state->msg);
775 state->msg.context = state;
776 state->trx.len = 2;
777 state->trx.tx_buf = state->buf;
778 state->trx.rx_buf = state->buf;
779 spi_message_add_tail(&state->trx, &state->msg);
780 hrtimer_init(&state->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
781 state->timer.function = at86rf230_async_state_timer;
782}
783
784static irqreturn_t at86rf230_isr(int irq, void *data)
785{
786 struct at86rf230_local *lp = data;
787 struct at86rf230_state_change *ctx;
788 int rc;
789
790 disable_irq_nosync(irq);
791
792 ctx = kzalloc(sizeof(*ctx), GFP_ATOMIC);
793 if (!ctx) {
794 enable_irq(irq);
795 return IRQ_NONE;
796 }
797
798 at86rf230_setup_spi_messages(lp, ctx);
799 /* tell on error handling to free ctx */
800 ctx->free = true;
801
802 ctx->buf[0] = (RG_IRQ_STATUS & CMD_REG_MASK) | CMD_REG;
803 ctx->msg.complete = at86rf230_irq_status;
804 rc = spi_async(lp->spi, &ctx->msg);
805 if (rc) {
806 at86rf230_async_error(lp, ctx, rc);
807 enable_irq(irq);
808 return IRQ_NONE;
809 }
810
811 return IRQ_HANDLED;
812}
813
814static void
815at86rf230_write_frame_complete(void *context)
816{
817 struct at86rf230_state_change *ctx = context;
818 struct at86rf230_local *lp = ctx->lp;
819
820 ctx->trx.len = 2;
821
822 if (lp->slp_tr)
823 at86rf230_slp_tr_rising_edge(lp);
824 else
825 at86rf230_async_write_reg(lp, RG_TRX_STATE, STATE_BUSY_TX, ctx,
826 NULL);
827}
828
829static void
830at86rf230_write_frame(void *context)
831{
832 struct at86rf230_state_change *ctx = context;
833 struct at86rf230_local *lp = ctx->lp;
834 struct sk_buff *skb = lp->tx_skb;
835 u8 *buf = ctx->buf;
836 int rc;
837
838 lp->is_tx = 1;
839
840 buf[0] = CMD_FB | CMD_WRITE;
841 buf[1] = skb->len + 2;
842 memcpy(buf + 2, skb->data, skb->len);
843 ctx->trx.len = skb->len + 2;
844 ctx->msg.complete = at86rf230_write_frame_complete;
845 rc = spi_async(lp->spi, &ctx->msg);
846 if (rc) {
847 ctx->trx.len = 2;
848 at86rf230_async_error(lp, ctx, rc);
849 }
850}
851
852static void
853at86rf230_xmit_tx_on(void *context)
854{
855 struct at86rf230_state_change *ctx = context;
856 struct at86rf230_local *lp = ctx->lp;
857
858 at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
859 at86rf230_write_frame);
860}
861
862static void
863at86rf230_xmit_start(void *context)
864{
865 struct at86rf230_state_change *ctx = context;
866 struct at86rf230_local *lp = ctx->lp;
867
868 /* check if we change from off state */
869 if (lp->is_tx_from_off)
870 at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
871 at86rf230_write_frame);
872 else
873 at86rf230_async_state_change(lp, ctx, STATE_TX_ON,
874 at86rf230_xmit_tx_on);
875}
876
877static int
878at86rf230_xmit(struct ieee802154_hw *hw, struct sk_buff *skb)
879{
880 struct at86rf230_local *lp = hw->priv;
881 struct at86rf230_state_change *ctx = &lp->tx;
882
883 lp->tx_skb = skb;
884 lp->tx_retry = 0;
885
886 /* After 5 minutes in PLL and the same frequency we run again the
887 * calibration loops which is recommended by at86rf2xx datasheets.
888 *
889 * The calibration is initiate by a state change from TRX_OFF
890 * to TX_ON, the lp->cal_timeout should be reinit by state_delay
891 * function then to start in the next 5 minutes.
892 */
893 if (time_is_before_jiffies(lp->cal_timeout)) {
894 lp->is_tx_from_off = true;
895 at86rf230_async_state_change(lp, ctx, STATE_TRX_OFF,
896 at86rf230_xmit_start);
897 } else {
898 lp->is_tx_from_off = false;
899 at86rf230_xmit_start(ctx);
900 }
901
902 return 0;
903}
904
905static int
906at86rf230_ed(struct ieee802154_hw *hw, u8 *level)
907{
908 WARN_ON(!level);
909 *level = 0xbe;
910 return 0;
911}
912
913static int
914at86rf230_start(struct ieee802154_hw *hw)
915{
916 struct at86rf230_local *lp = hw->priv;
917
918 at86rf230_awake(lp);
919 enable_irq(lp->spi->irq);
920
921 return at86rf230_sync_state_change(lp, STATE_RX_AACK_ON);
922}
923
924static void
925at86rf230_stop(struct ieee802154_hw *hw)
926{
927 struct at86rf230_local *lp = hw->priv;
928 u8 csma_seed[2];
929
930 at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
931
932 disable_irq(lp->spi->irq);
933
934 /* It's recommended to set random new csma_seeds before sleep state.
935 * Makes only sense in the stop callback, not doing this inside of
936 * at86rf230_sleep, this is also used when we don't transmit afterwards
937 * when calling start callback again.
938 */
939 get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
940 at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
941 at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
942
943 at86rf230_sleep(lp);
944}
945
946static int
947at86rf23x_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
948{
949 return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
950}
951
952#define AT86RF2XX_MAX_ED_LEVELS 0xF
953static const s32 at86rf233_ed_levels[AT86RF2XX_MAX_ED_LEVELS + 1] = {
954 -9400, -9200, -9000, -8800, -8600, -8400, -8200, -8000, -7800, -7600,
955 -7400, -7200, -7000, -6800, -6600, -6400,
956};
957
958static const s32 at86rf231_ed_levels[AT86RF2XX_MAX_ED_LEVELS + 1] = {
959 -9100, -8900, -8700, -8500, -8300, -8100, -7900, -7700, -7500, -7300,
960 -7100, -6900, -6700, -6500, -6300, -6100,
961};
962
963static const s32 at86rf212_ed_levels_100[AT86RF2XX_MAX_ED_LEVELS + 1] = {
964 -10000, -9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200,
965 -8000, -7800, -7600, -7400, -7200, -7000,
966};
967
968static const s32 at86rf212_ed_levels_98[AT86RF2XX_MAX_ED_LEVELS + 1] = {
969 -9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200, -8000,
970 -7800, -7600, -7400, -7200, -7000, -6800,
971};
972
973static inline int
974at86rf212_update_cca_ed_level(struct at86rf230_local *lp, int rssi_base_val)
975{
976 unsigned int cca_ed_thres;
977 int rc;
978
979 rc = at86rf230_read_subreg(lp, SR_CCA_ED_THRES, &cca_ed_thres);
980 if (rc < 0)
981 return rc;
982
983 switch (rssi_base_val) {
984 case -98:
985 lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_98;
986 lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_98);
987 lp->hw->phy->cca_ed_level = at86rf212_ed_levels_98[cca_ed_thres];
988 break;
989 case -100:
990 lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100;
991 lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100);
992 lp->hw->phy->cca_ed_level = at86rf212_ed_levels_100[cca_ed_thres];
993 break;
994 default:
995 WARN_ON(1);
996 }
997
998 return 0;
999}
1000
1001static int
1002at86rf212_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
1003{
1004 int rc;
1005
1006 if (channel == 0)
1007 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0);
1008 else
1009 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1);
1010 if (rc < 0)
1011 return rc;
1012
1013 if (page == 0) {
1014 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0);
1015 lp->data->rssi_base_val = -100;
1016 } else {
1017 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1);
1018 lp->data->rssi_base_val = -98;
1019 }
1020 if (rc < 0)
1021 return rc;
1022
1023 rc = at86rf212_update_cca_ed_level(lp, lp->data->rssi_base_val);
1024 if (rc < 0)
1025 return rc;
1026
1027 return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
1028}
1029
1030static int
1031at86rf230_channel(struct ieee802154_hw *hw, u8 page, u8 channel)
1032{
1033 struct at86rf230_local *lp = hw->priv;
1034 int rc;
1035
1036 rc = lp->data->set_channel(lp, page, channel);
1037 /* Wait for PLL */
1038 usleep_range(lp->data->t_channel_switch,
1039 lp->data->t_channel_switch + 10);
1040
1041 lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
1042 return rc;
1043}
1044
1045static int
1046at86rf230_set_hw_addr_filt(struct ieee802154_hw *hw,
1047 struct ieee802154_hw_addr_filt *filt,
1048 unsigned long changed)
1049{
1050 struct at86rf230_local *lp = hw->priv;
1051
1052 if (changed & IEEE802154_AFILT_SADDR_CHANGED) {
1053 u16 addr = le16_to_cpu(filt->short_addr);
1054
1055 dev_vdbg(&lp->spi->dev, "%s called for saddr\n", __func__);
1056 __at86rf230_write(lp, RG_SHORT_ADDR_0, addr);
1057 __at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8);
1058 }
1059
1060 if (changed & IEEE802154_AFILT_PANID_CHANGED) {
1061 u16 pan = le16_to_cpu(filt->pan_id);
1062
1063 dev_vdbg(&lp->spi->dev, "%s called for pan id\n", __func__);
1064 __at86rf230_write(lp, RG_PAN_ID_0, pan);
1065 __at86rf230_write(lp, RG_PAN_ID_1, pan >> 8);
1066 }
1067
1068 if (changed & IEEE802154_AFILT_IEEEADDR_CHANGED) {
1069 u8 i, addr[8];
1070
1071 memcpy(addr, &filt->ieee_addr, 8);
1072 dev_vdbg(&lp->spi->dev, "%s called for IEEE addr\n", __func__);
1073 for (i = 0; i < 8; i++)
1074 __at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]);
1075 }
1076
1077 if (changed & IEEE802154_AFILT_PANC_CHANGED) {
1078 dev_vdbg(&lp->spi->dev, "%s called for panc change\n", __func__);
1079 if (filt->pan_coord)
1080 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
1081 else
1082 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0);
1083 }
1084
1085 return 0;
1086}
1087
1088#define AT86RF23X_MAX_TX_POWERS 0xF
1089static const s32 at86rf233_powers[AT86RF23X_MAX_TX_POWERS + 1] = {
1090 400, 370, 340, 300, 250, 200, 100, 0, -100, -200, -300, -400, -600,
1091 -800, -1200, -1700,
1092};
1093
1094static const s32 at86rf231_powers[AT86RF23X_MAX_TX_POWERS + 1] = {
1095 300, 280, 230, 180, 130, 70, 0, -100, -200, -300, -400, -500, -700,
1096 -900, -1200, -1700,
1097};
1098
1099#define AT86RF212_MAX_TX_POWERS 0x1F
1100static const s32 at86rf212_powers[AT86RF212_MAX_TX_POWERS + 1] = {
1101 500, 400, 300, 200, 100, 0, -100, -200, -300, -400, -500, -600, -700,
1102 -800, -900, -1000, -1100, -1200, -1300, -1400, -1500, -1600, -1700,
1103 -1800, -1900, -2000, -2100, -2200, -2300, -2400, -2500, -2600,
1104};
1105
1106static int
1107at86rf23x_set_txpower(struct at86rf230_local *lp, s32 mbm)
1108{
1109 u32 i;
1110
1111 for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) {
1112 if (lp->hw->phy->supported.tx_powers[i] == mbm)
1113 return at86rf230_write_subreg(lp, SR_TX_PWR_23X, i);
1114 }
1115
1116 return -EINVAL;
1117}
1118
1119static int
1120at86rf212_set_txpower(struct at86rf230_local *lp, s32 mbm)
1121{
1122 u32 i;
1123
1124 for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) {
1125 if (lp->hw->phy->supported.tx_powers[i] == mbm)
1126 return at86rf230_write_subreg(lp, SR_TX_PWR_212, i);
1127 }
1128
1129 return -EINVAL;
1130}
1131
1132static int
1133at86rf230_set_txpower(struct ieee802154_hw *hw, s32 mbm)
1134{
1135 struct at86rf230_local *lp = hw->priv;
1136
1137 return lp->data->set_txpower(lp, mbm);
1138}
1139
1140static int
1141at86rf230_set_lbt(struct ieee802154_hw *hw, bool on)
1142{
1143 struct at86rf230_local *lp = hw->priv;
1144
1145 return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on);
1146}
1147
1148static int
1149at86rf230_set_cca_mode(struct ieee802154_hw *hw,
1150 const struct wpan_phy_cca *cca)
1151{
1152 struct at86rf230_local *lp = hw->priv;
1153 u8 val;
1154
1155 /* mapping 802.15.4 to driver spec */
1156 switch (cca->mode) {
1157 case NL802154_CCA_ENERGY:
1158 val = 1;
1159 break;
1160 case NL802154_CCA_CARRIER:
1161 val = 2;
1162 break;
1163 case NL802154_CCA_ENERGY_CARRIER:
1164 switch (cca->opt) {
1165 case NL802154_CCA_OPT_ENERGY_CARRIER_AND:
1166 val = 3;
1167 break;
1168 case NL802154_CCA_OPT_ENERGY_CARRIER_OR:
1169 val = 0;
1170 break;
1171 default:
1172 return -EINVAL;
1173 }
1174 break;
1175 default:
1176 return -EINVAL;
1177 }
1178
1179 return at86rf230_write_subreg(lp, SR_CCA_MODE, val);
1180}
1181
1182static int
1183at86rf230_set_cca_ed_level(struct ieee802154_hw *hw, s32 mbm)
1184{
1185 struct at86rf230_local *lp = hw->priv;
1186 u32 i;
1187
1188 for (i = 0; i < hw->phy->supported.cca_ed_levels_size; i++) {
1189 if (hw->phy->supported.cca_ed_levels[i] == mbm)
1190 return at86rf230_write_subreg(lp, SR_CCA_ED_THRES, i);
1191 }
1192
1193 return -EINVAL;
1194}
1195
1196static int
1197at86rf230_set_csma_params(struct ieee802154_hw *hw, u8 min_be, u8 max_be,
1198 u8 retries)
1199{
1200 struct at86rf230_local *lp = hw->priv;
1201 int rc;
1202
1203 rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be);
1204 if (rc)
1205 return rc;
1206
1207 rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be);
1208 if (rc)
1209 return rc;
1210
1211 return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries);
1212}
1213
1214static int
1215at86rf230_set_frame_retries(struct ieee802154_hw *hw, s8 retries)
1216{
1217 struct at86rf230_local *lp = hw->priv;
1218
1219 return at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries);
1220}
1221
1222static int
1223at86rf230_set_promiscuous_mode(struct ieee802154_hw *hw, const bool on)
1224{
1225 struct at86rf230_local *lp = hw->priv;
1226 int rc;
1227
1228 if (on) {
1229 rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 1);
1230 if (rc < 0)
1231 return rc;
1232
1233 rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 1);
1234 if (rc < 0)
1235 return rc;
1236 } else {
1237 rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 0);
1238 if (rc < 0)
1239 return rc;
1240
1241 rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 0);
1242 if (rc < 0)
1243 return rc;
1244 }
1245
1246 return 0;
1247}
1248
1249static const struct ieee802154_ops at86rf230_ops = {
1250 .owner = THIS_MODULE,
1251 .xmit_async = at86rf230_xmit,
1252 .ed = at86rf230_ed,
1253 .set_channel = at86rf230_channel,
1254 .start = at86rf230_start,
1255 .stop = at86rf230_stop,
1256 .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
1257 .set_txpower = at86rf230_set_txpower,
1258 .set_lbt = at86rf230_set_lbt,
1259 .set_cca_mode = at86rf230_set_cca_mode,
1260 .set_cca_ed_level = at86rf230_set_cca_ed_level,
1261 .set_csma_params = at86rf230_set_csma_params,
1262 .set_frame_retries = at86rf230_set_frame_retries,
1263 .set_promiscuous_mode = at86rf230_set_promiscuous_mode,
1264};
1265
1266static struct at86rf2xx_chip_data at86rf233_data = {
1267 .t_sleep_cycle = 330,
1268 .t_channel_switch = 11,
1269 .t_reset_to_off = 26,
1270 .t_off_to_aack = 80,
1271 .t_off_to_tx_on = 80,
1272 .t_off_to_sleep = 35,
1273 .t_sleep_to_off = 1000,
1274 .t_frame = 4096,
1275 .t_p_ack = 545,
1276 .rssi_base_val = -94,
1277 .set_channel = at86rf23x_set_channel,
1278 .set_txpower = at86rf23x_set_txpower,
1279};
1280
1281static struct at86rf2xx_chip_data at86rf231_data = {
1282 .t_sleep_cycle = 330,
1283 .t_channel_switch = 24,
1284 .t_reset_to_off = 37,
1285 .t_off_to_aack = 110,
1286 .t_off_to_tx_on = 110,
1287 .t_off_to_sleep = 35,
1288 .t_sleep_to_off = 1000,
1289 .t_frame = 4096,
1290 .t_p_ack = 545,
1291 .rssi_base_val = -91,
1292 .set_channel = at86rf23x_set_channel,
1293 .set_txpower = at86rf23x_set_txpower,
1294};
1295
1296static struct at86rf2xx_chip_data at86rf212_data = {
1297 .t_sleep_cycle = 330,
1298 .t_channel_switch = 11,
1299 .t_reset_to_off = 26,
1300 .t_off_to_aack = 200,
1301 .t_off_to_tx_on = 200,
1302 .t_off_to_sleep = 35,
1303 .t_sleep_to_off = 1000,
1304 .t_frame = 4096,
1305 .t_p_ack = 545,
1306 .rssi_base_val = -100,
1307 .set_channel = at86rf212_set_channel,
1308 .set_txpower = at86rf212_set_txpower,
1309};
1310
1311static int at86rf230_hw_init(struct at86rf230_local *lp, u8 xtal_trim)
1312{
1313 int rc, irq_type, irq_pol = IRQ_ACTIVE_HIGH;
1314 unsigned int dvdd;
1315 u8 csma_seed[2];
1316
1317 rc = at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
1318 if (rc)
1319 return rc;
1320
1321 irq_type = irq_get_trigger_type(lp->spi->irq);
1322 if (irq_type == IRQ_TYPE_EDGE_FALLING ||
1323 irq_type == IRQ_TYPE_LEVEL_LOW)
1324 irq_pol = IRQ_ACTIVE_LOW;
1325
1326 rc = at86rf230_write_subreg(lp, SR_IRQ_POLARITY, irq_pol);
1327 if (rc)
1328 return rc;
1329
1330 rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1);
1331 if (rc)
1332 return rc;
1333
1334 rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END);
1335 if (rc)
1336 return rc;
1337
1338 /* reset values differs in at86rf231 and at86rf233 */
1339 rc = at86rf230_write_subreg(lp, SR_IRQ_MASK_MODE, 0);
1340 if (rc)
1341 return rc;
1342
1343 get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
1344 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
1345 if (rc)
1346 return rc;
1347 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
1348 if (rc)
1349 return rc;
1350
1351 /* CLKM changes are applied immediately */
1352 rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00);
1353 if (rc)
1354 return rc;
1355
1356 /* Turn CLKM Off */
1357 rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00);
1358 if (rc)
1359 return rc;
1360 /* Wait the next SLEEP cycle */
1361 usleep_range(lp->data->t_sleep_cycle,
1362 lp->data->t_sleep_cycle + 100);
1363
1364 /* xtal_trim value is calculated by:
1365 * CL = 0.5 * (CX + CTRIM + CPAR)
1366 *
1367 * whereas:
1368 * CL = capacitor of used crystal
1369 * CX = connected capacitors at xtal pins
1370 * CPAR = in all at86rf2xx datasheets this is a constant value 3 pF,
1371 * but this is different on each board setup. You need to fine
1372 * tuning this value via CTRIM.
1373 * CTRIM = variable capacitor setting. Resolution is 0.3 pF range is
1374 * 0 pF upto 4.5 pF.
1375 *
1376 * Examples:
1377 * atben transceiver:
1378 *
1379 * CL = 8 pF
1380 * CX = 12 pF
1381 * CPAR = 3 pF (We assume the magic constant from datasheet)
1382 * CTRIM = 0.9 pF
1383 *
1384 * (12+0.9+3)/2 = 7.95 which is nearly at 8 pF
1385 *
1386 * xtal_trim = 0x3
1387 *
1388 * openlabs transceiver:
1389 *
1390 * CL = 16 pF
1391 * CX = 22 pF
1392 * CPAR = 3 pF (We assume the magic constant from datasheet)
1393 * CTRIM = 4.5 pF
1394 *
1395 * (22+4.5+3)/2 = 14.75 which is the nearest value to 16 pF
1396 *
1397 * xtal_trim = 0xf
1398 */
1399 rc = at86rf230_write_subreg(lp, SR_XTAL_TRIM, xtal_trim);
1400 if (rc)
1401 return rc;
1402
1403 rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &dvdd);
1404 if (rc)
1405 return rc;
1406 if (!dvdd) {
1407 dev_err(&lp->spi->dev, "DVDD error\n");
1408 return -EINVAL;
1409 }
1410
1411 /* Force setting slotted operation bit to 0. Sometimes the atben
1412 * sets this bit and I don't know why. We set this always force
1413 * to zero while probing.
1414 */
1415 return at86rf230_write_subreg(lp, SR_SLOTTED_OPERATION, 0);
1416}
1417
1418static int
1419at86rf230_detect_device(struct at86rf230_local *lp)
1420{
1421 unsigned int part, version, val;
1422 u16 man_id = 0;
1423 const char *chip;
1424 int rc;
1425
1426 rc = __at86rf230_read(lp, RG_MAN_ID_0, &val);
1427 if (rc)
1428 return rc;
1429 man_id |= val;
1430
1431 rc = __at86rf230_read(lp, RG_MAN_ID_1, &val);
1432 if (rc)
1433 return rc;
1434 man_id |= (val << 8);
1435
1436 rc = __at86rf230_read(lp, RG_PART_NUM, &part);
1437 if (rc)
1438 return rc;
1439
1440 rc = __at86rf230_read(lp, RG_VERSION_NUM, &version);
1441 if (rc)
1442 return rc;
1443
1444 if (man_id != 0x001f) {
1445 dev_err(&lp->spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
1446 man_id >> 8, man_id & 0xFF);
1447 return -EINVAL;
1448 }
1449
1450 lp->hw->flags = IEEE802154_HW_TX_OMIT_CKSUM |
1451 IEEE802154_HW_CSMA_PARAMS |
1452 IEEE802154_HW_FRAME_RETRIES | IEEE802154_HW_AFILT |
1453 IEEE802154_HW_PROMISCUOUS;
1454
1455 lp->hw->phy->flags = WPAN_PHY_FLAG_TXPOWER |
1456 WPAN_PHY_FLAG_CCA_ED_LEVEL |
1457 WPAN_PHY_FLAG_CCA_MODE;
1458
1459 lp->hw->phy->supported.cca_modes = BIT(NL802154_CCA_ENERGY) |
1460 BIT(NL802154_CCA_CARRIER) | BIT(NL802154_CCA_ENERGY_CARRIER);
1461 lp->hw->phy->supported.cca_opts = BIT(NL802154_CCA_OPT_ENERGY_CARRIER_AND) |
1462 BIT(NL802154_CCA_OPT_ENERGY_CARRIER_OR);
1463
1464 lp->hw->phy->cca.mode = NL802154_CCA_ENERGY;
1465
1466 switch (part) {
1467 case 2:
1468 chip = "at86rf230";
1469 rc = -ENOTSUPP;
1470 goto not_supp;
1471 case 3:
1472 chip = "at86rf231";
1473 lp->data = &at86rf231_data;
1474 lp->hw->phy->supported.channels[0] = 0x7FFF800;
1475 lp->hw->phy->current_channel = 11;
1476 lp->hw->phy->supported.tx_powers = at86rf231_powers;
1477 lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf231_powers);
1478 lp->hw->phy->supported.cca_ed_levels = at86rf231_ed_levels;
1479 lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf231_ed_levels);
1480 break;
1481 case 7:
1482 chip = "at86rf212";
1483 lp->data = &at86rf212_data;
1484 lp->hw->flags |= IEEE802154_HW_LBT;
1485 lp->hw->phy->supported.channels[0] = 0x00007FF;
1486 lp->hw->phy->supported.channels[2] = 0x00007FF;
1487 lp->hw->phy->current_channel = 5;
1488 lp->hw->phy->supported.lbt = NL802154_SUPPORTED_BOOL_BOTH;
1489 lp->hw->phy->supported.tx_powers = at86rf212_powers;
1490 lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf212_powers);
1491 lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100;
1492 lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100);
1493 break;
1494 case 11:
1495 chip = "at86rf233";
1496 lp->data = &at86rf233_data;
1497 lp->hw->phy->supported.channels[0] = 0x7FFF800;
1498 lp->hw->phy->current_channel = 13;
1499 lp->hw->phy->supported.tx_powers = at86rf233_powers;
1500 lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf233_powers);
1501 lp->hw->phy->supported.cca_ed_levels = at86rf233_ed_levels;
1502 lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf233_ed_levels);
1503 break;
1504 default:
1505 chip = "unknown";
1506 rc = -ENOTSUPP;
1507 goto not_supp;
1508 }
1509
1510 lp->hw->phy->cca_ed_level = lp->hw->phy->supported.cca_ed_levels[7];
1511 lp->hw->phy->transmit_power = lp->hw->phy->supported.tx_powers[0];
1512
1513not_supp:
1514 dev_info(&lp->spi->dev, "Detected %s chip version %d\n", chip, version);
1515
1516 return rc;
1517}
1518
1519static int at86rf230_probe(struct spi_device *spi)
1520{
1521 struct ieee802154_hw *hw;
1522 struct at86rf230_local *lp;
1523 struct gpio_desc *slp_tr;
1524 struct gpio_desc *rstn;
1525 unsigned int status;
1526 int rc, irq_type;
1527 u8 xtal_trim;
1528
1529 if (!spi->irq) {
1530 dev_err(&spi->dev, "no IRQ specified\n");
1531 return -EINVAL;
1532 }
1533
1534 rc = device_property_read_u8(&spi->dev, "xtal-trim", &xtal_trim);
1535 if (rc < 0) {
1536 if (rc != -EINVAL) {
1537 dev_err(&spi->dev,
1538 "failed to parse xtal-trim: %d\n", rc);
1539 return rc;
1540 }
1541 xtal_trim = 0;
1542 }
1543
1544 rstn = devm_gpiod_get_optional(&spi->dev, "reset", GPIOD_OUT_LOW);
1545 rc = PTR_ERR_OR_ZERO(rstn);
1546 if (rc)
1547 return rc;
1548
1549 gpiod_set_consumer_name(rstn, "rstn");
1550
1551 slp_tr = devm_gpiod_get_optional(&spi->dev, "sleep", GPIOD_OUT_LOW);
1552 rc = PTR_ERR_OR_ZERO(slp_tr);
1553 if (rc)
1554 return rc;
1555
1556 gpiod_set_consumer_name(slp_tr, "slp_tr");
1557
1558 /* Reset */
1559 if (rstn) {
1560 udelay(1);
1561 gpiod_set_value_cansleep(rstn, 1);
1562 udelay(1);
1563 gpiod_set_value_cansleep(rstn, 0);
1564 usleep_range(120, 240);
1565 }
1566
1567 hw = ieee802154_alloc_hw(sizeof(*lp), &at86rf230_ops);
1568 if (!hw)
1569 return -ENOMEM;
1570
1571 lp = hw->priv;
1572 lp->hw = hw;
1573 lp->spi = spi;
1574 lp->slp_tr = slp_tr;
1575 hw->parent = &spi->dev;
1576 ieee802154_random_extended_addr(&hw->phy->perm_extended_addr);
1577
1578 lp->regmap = devm_regmap_init_spi(spi, &at86rf230_regmap_spi_config);
1579 if (IS_ERR(lp->regmap)) {
1580 rc = PTR_ERR(lp->regmap);
1581 dev_err(&spi->dev, "Failed to allocate register map: %d\n",
1582 rc);
1583 goto free_dev;
1584 }
1585
1586 at86rf230_setup_spi_messages(lp, &lp->state);
1587 at86rf230_setup_spi_messages(lp, &lp->tx);
1588
1589 rc = at86rf230_detect_device(lp);
1590 if (rc < 0)
1591 goto free_dev;
1592
1593 init_completion(&lp->state_complete);
1594
1595 spi_set_drvdata(spi, lp);
1596
1597 rc = at86rf230_hw_init(lp, xtal_trim);
1598 if (rc)
1599 goto free_dev;
1600
1601 /* Read irq status register to reset irq line */
1602 rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status);
1603 if (rc)
1604 goto free_dev;
1605
1606 irq_type = irq_get_trigger_type(spi->irq);
1607 if (!irq_type)
1608 irq_type = IRQF_TRIGGER_HIGH;
1609
1610 rc = devm_request_irq(&spi->dev, spi->irq, at86rf230_isr,
1611 IRQF_SHARED | irq_type, dev_name(&spi->dev), lp);
1612 if (rc)
1613 goto free_dev;
1614
1615 /* disable_irq by default and wait for starting hardware */
1616 disable_irq(spi->irq);
1617
1618 /* going into sleep by default */
1619 at86rf230_sleep(lp);
1620
1621 rc = ieee802154_register_hw(lp->hw);
1622 if (rc)
1623 goto free_dev;
1624
1625 return rc;
1626
1627free_dev:
1628 ieee802154_free_hw(lp->hw);
1629
1630 return rc;
1631}
1632
1633static void at86rf230_remove(struct spi_device *spi)
1634{
1635 struct at86rf230_local *lp = spi_get_drvdata(spi);
1636
1637 /* mask all at86rf230 irq's */
1638 at86rf230_write_subreg(lp, SR_IRQ_MASK, 0);
1639 ieee802154_unregister_hw(lp->hw);
1640 ieee802154_free_hw(lp->hw);
1641 dev_dbg(&spi->dev, "unregistered at86rf230\n");
1642}
1643
1644static const struct of_device_id at86rf230_of_match[] = {
1645 { .compatible = "atmel,at86rf230", },
1646 { .compatible = "atmel,at86rf231", },
1647 { .compatible = "atmel,at86rf233", },
1648 { .compatible = "atmel,at86rf212", },
1649 { },
1650};
1651MODULE_DEVICE_TABLE(of, at86rf230_of_match);
1652
1653static const struct spi_device_id at86rf230_device_id[] = {
1654 { .name = "at86rf230", },
1655 { .name = "at86rf231", },
1656 { .name = "at86rf233", },
1657 { .name = "at86rf212", },
1658 { },
1659};
1660MODULE_DEVICE_TABLE(spi, at86rf230_device_id);
1661
1662static struct spi_driver at86rf230_driver = {
1663 .id_table = at86rf230_device_id,
1664 .driver = {
1665 .of_match_table = at86rf230_of_match,
1666 .name = "at86rf230",
1667 },
1668 .probe = at86rf230_probe,
1669 .remove = at86rf230_remove,
1670};
1671
1672module_spi_driver(at86rf230_driver);
1673
1674MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
1675MODULE_LICENSE("GPL v2");
1/*
2 * AT86RF230/RF231 driver
3 *
4 * Copyright (C) 2009-2012 Siemens AG
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Written by:
20 * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
21 * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
22 */
23#include <linux/kernel.h>
24#include <linux/module.h>
25#include <linux/interrupt.h>
26#include <linux/gpio.h>
27#include <linux/delay.h>
28#include <linux/mutex.h>
29#include <linux/workqueue.h>
30#include <linux/spinlock.h>
31#include <linux/spi/spi.h>
32#include <linux/spi/at86rf230.h>
33#include <linux/skbuff.h>
34#include <linux/of_gpio.h>
35
36#include <net/mac802154.h>
37#include <net/wpan-phy.h>
38
39struct at86rf230_local {
40 struct spi_device *spi;
41
42 u8 part;
43 u8 vers;
44
45 u8 buf[2];
46 struct mutex bmux;
47
48 struct work_struct irqwork;
49 struct completion tx_complete;
50
51 struct ieee802154_dev *dev;
52
53 spinlock_t lock;
54 bool irq_busy;
55 bool is_tx;
56 bool tx_aret;
57
58 int rssi_base_val;
59};
60
61static bool is_rf212(struct at86rf230_local *local)
62{
63 return local->part == 7;
64}
65
66#define RG_TRX_STATUS (0x01)
67#define SR_TRX_STATUS 0x01, 0x1f, 0
68#define SR_RESERVED_01_3 0x01, 0x20, 5
69#define SR_CCA_STATUS 0x01, 0x40, 6
70#define SR_CCA_DONE 0x01, 0x80, 7
71#define RG_TRX_STATE (0x02)
72#define SR_TRX_CMD 0x02, 0x1f, 0
73#define SR_TRAC_STATUS 0x02, 0xe0, 5
74#define RG_TRX_CTRL_0 (0x03)
75#define SR_CLKM_CTRL 0x03, 0x07, 0
76#define SR_CLKM_SHA_SEL 0x03, 0x08, 3
77#define SR_PAD_IO_CLKM 0x03, 0x30, 4
78#define SR_PAD_IO 0x03, 0xc0, 6
79#define RG_TRX_CTRL_1 (0x04)
80#define SR_IRQ_POLARITY 0x04, 0x01, 0
81#define SR_IRQ_MASK_MODE 0x04, 0x02, 1
82#define SR_SPI_CMD_MODE 0x04, 0x0c, 2
83#define SR_RX_BL_CTRL 0x04, 0x10, 4
84#define SR_TX_AUTO_CRC_ON 0x04, 0x20, 5
85#define SR_IRQ_2_EXT_EN 0x04, 0x40, 6
86#define SR_PA_EXT_EN 0x04, 0x80, 7
87#define RG_PHY_TX_PWR (0x05)
88#define SR_TX_PWR 0x05, 0x0f, 0
89#define SR_PA_LT 0x05, 0x30, 4
90#define SR_PA_BUF_LT 0x05, 0xc0, 6
91#define RG_PHY_RSSI (0x06)
92#define SR_RSSI 0x06, 0x1f, 0
93#define SR_RND_VALUE 0x06, 0x60, 5
94#define SR_RX_CRC_VALID 0x06, 0x80, 7
95#define RG_PHY_ED_LEVEL (0x07)
96#define SR_ED_LEVEL 0x07, 0xff, 0
97#define RG_PHY_CC_CCA (0x08)
98#define SR_CHANNEL 0x08, 0x1f, 0
99#define SR_CCA_MODE 0x08, 0x60, 5
100#define SR_CCA_REQUEST 0x08, 0x80, 7
101#define RG_CCA_THRES (0x09)
102#define SR_CCA_ED_THRES 0x09, 0x0f, 0
103#define SR_RESERVED_09_1 0x09, 0xf0, 4
104#define RG_RX_CTRL (0x0a)
105#define SR_PDT_THRES 0x0a, 0x0f, 0
106#define SR_RESERVED_0a_1 0x0a, 0xf0, 4
107#define RG_SFD_VALUE (0x0b)
108#define SR_SFD_VALUE 0x0b, 0xff, 0
109#define RG_TRX_CTRL_2 (0x0c)
110#define SR_OQPSK_DATA_RATE 0x0c, 0x03, 0
111#define SR_SUB_MODE 0x0c, 0x04, 2
112#define SR_BPSK_QPSK 0x0c, 0x08, 3
113#define SR_OQPSK_SUB1_RC_EN 0x0c, 0x10, 4
114#define SR_RESERVED_0c_5 0x0c, 0x60, 5
115#define SR_RX_SAFE_MODE 0x0c, 0x80, 7
116#define RG_ANT_DIV (0x0d)
117#define SR_ANT_CTRL 0x0d, 0x03, 0
118#define SR_ANT_EXT_SW_EN 0x0d, 0x04, 2
119#define SR_ANT_DIV_EN 0x0d, 0x08, 3
120#define SR_RESERVED_0d_2 0x0d, 0x70, 4
121#define SR_ANT_SEL 0x0d, 0x80, 7
122#define RG_IRQ_MASK (0x0e)
123#define SR_IRQ_MASK 0x0e, 0xff, 0
124#define RG_IRQ_STATUS (0x0f)
125#define SR_IRQ_0_PLL_LOCK 0x0f, 0x01, 0
126#define SR_IRQ_1_PLL_UNLOCK 0x0f, 0x02, 1
127#define SR_IRQ_2_RX_START 0x0f, 0x04, 2
128#define SR_IRQ_3_TRX_END 0x0f, 0x08, 3
129#define SR_IRQ_4_CCA_ED_DONE 0x0f, 0x10, 4
130#define SR_IRQ_5_AMI 0x0f, 0x20, 5
131#define SR_IRQ_6_TRX_UR 0x0f, 0x40, 6
132#define SR_IRQ_7_BAT_LOW 0x0f, 0x80, 7
133#define RG_VREG_CTRL (0x10)
134#define SR_RESERVED_10_6 0x10, 0x03, 0
135#define SR_DVDD_OK 0x10, 0x04, 2
136#define SR_DVREG_EXT 0x10, 0x08, 3
137#define SR_RESERVED_10_3 0x10, 0x30, 4
138#define SR_AVDD_OK 0x10, 0x40, 6
139#define SR_AVREG_EXT 0x10, 0x80, 7
140#define RG_BATMON (0x11)
141#define SR_BATMON_VTH 0x11, 0x0f, 0
142#define SR_BATMON_HR 0x11, 0x10, 4
143#define SR_BATMON_OK 0x11, 0x20, 5
144#define SR_RESERVED_11_1 0x11, 0xc0, 6
145#define RG_XOSC_CTRL (0x12)
146#define SR_XTAL_TRIM 0x12, 0x0f, 0
147#define SR_XTAL_MODE 0x12, 0xf0, 4
148#define RG_RX_SYN (0x15)
149#define SR_RX_PDT_LEVEL 0x15, 0x0f, 0
150#define SR_RESERVED_15_2 0x15, 0x70, 4
151#define SR_RX_PDT_DIS 0x15, 0x80, 7
152#define RG_XAH_CTRL_1 (0x17)
153#define SR_RESERVED_17_8 0x17, 0x01, 0
154#define SR_AACK_PROM_MODE 0x17, 0x02, 1
155#define SR_AACK_ACK_TIME 0x17, 0x04, 2
156#define SR_RESERVED_17_5 0x17, 0x08, 3
157#define SR_AACK_UPLD_RES_FT 0x17, 0x10, 4
158#define SR_AACK_FLTR_RES_FT 0x17, 0x20, 5
159#define SR_CSMA_LBT_MODE 0x17, 0x40, 6
160#define SR_RESERVED_17_1 0x17, 0x80, 7
161#define RG_FTN_CTRL (0x18)
162#define SR_RESERVED_18_2 0x18, 0x7f, 0
163#define SR_FTN_START 0x18, 0x80, 7
164#define RG_PLL_CF (0x1a)
165#define SR_RESERVED_1a_2 0x1a, 0x7f, 0
166#define SR_PLL_CF_START 0x1a, 0x80, 7
167#define RG_PLL_DCU (0x1b)
168#define SR_RESERVED_1b_3 0x1b, 0x3f, 0
169#define SR_RESERVED_1b_2 0x1b, 0x40, 6
170#define SR_PLL_DCU_START 0x1b, 0x80, 7
171#define RG_PART_NUM (0x1c)
172#define SR_PART_NUM 0x1c, 0xff, 0
173#define RG_VERSION_NUM (0x1d)
174#define SR_VERSION_NUM 0x1d, 0xff, 0
175#define RG_MAN_ID_0 (0x1e)
176#define SR_MAN_ID_0 0x1e, 0xff, 0
177#define RG_MAN_ID_1 (0x1f)
178#define SR_MAN_ID_1 0x1f, 0xff, 0
179#define RG_SHORT_ADDR_0 (0x20)
180#define SR_SHORT_ADDR_0 0x20, 0xff, 0
181#define RG_SHORT_ADDR_1 (0x21)
182#define SR_SHORT_ADDR_1 0x21, 0xff, 0
183#define RG_PAN_ID_0 (0x22)
184#define SR_PAN_ID_0 0x22, 0xff, 0
185#define RG_PAN_ID_1 (0x23)
186#define SR_PAN_ID_1 0x23, 0xff, 0
187#define RG_IEEE_ADDR_0 (0x24)
188#define SR_IEEE_ADDR_0 0x24, 0xff, 0
189#define RG_IEEE_ADDR_1 (0x25)
190#define SR_IEEE_ADDR_1 0x25, 0xff, 0
191#define RG_IEEE_ADDR_2 (0x26)
192#define SR_IEEE_ADDR_2 0x26, 0xff, 0
193#define RG_IEEE_ADDR_3 (0x27)
194#define SR_IEEE_ADDR_3 0x27, 0xff, 0
195#define RG_IEEE_ADDR_4 (0x28)
196#define SR_IEEE_ADDR_4 0x28, 0xff, 0
197#define RG_IEEE_ADDR_5 (0x29)
198#define SR_IEEE_ADDR_5 0x29, 0xff, 0
199#define RG_IEEE_ADDR_6 (0x2a)
200#define SR_IEEE_ADDR_6 0x2a, 0xff, 0
201#define RG_IEEE_ADDR_7 (0x2b)
202#define SR_IEEE_ADDR_7 0x2b, 0xff, 0
203#define RG_XAH_CTRL_0 (0x2c)
204#define SR_SLOTTED_OPERATION 0x2c, 0x01, 0
205#define SR_MAX_CSMA_RETRIES 0x2c, 0x0e, 1
206#define SR_MAX_FRAME_RETRIES 0x2c, 0xf0, 4
207#define RG_CSMA_SEED_0 (0x2d)
208#define SR_CSMA_SEED_0 0x2d, 0xff, 0
209#define RG_CSMA_SEED_1 (0x2e)
210#define SR_CSMA_SEED_1 0x2e, 0x07, 0
211#define SR_AACK_I_AM_COORD 0x2e, 0x08, 3
212#define SR_AACK_DIS_ACK 0x2e, 0x10, 4
213#define SR_AACK_SET_PD 0x2e, 0x20, 5
214#define SR_AACK_FVN_MODE 0x2e, 0xc0, 6
215#define RG_CSMA_BE (0x2f)
216#define SR_MIN_BE 0x2f, 0x0f, 0
217#define SR_MAX_BE 0x2f, 0xf0, 4
218
219#define CMD_REG 0x80
220#define CMD_REG_MASK 0x3f
221#define CMD_WRITE 0x40
222#define CMD_FB 0x20
223
224#define IRQ_BAT_LOW (1 << 7)
225#define IRQ_TRX_UR (1 << 6)
226#define IRQ_AMI (1 << 5)
227#define IRQ_CCA_ED (1 << 4)
228#define IRQ_TRX_END (1 << 3)
229#define IRQ_RX_START (1 << 2)
230#define IRQ_PLL_UNL (1 << 1)
231#define IRQ_PLL_LOCK (1 << 0)
232
233#define IRQ_ACTIVE_HIGH 0
234#define IRQ_ACTIVE_LOW 1
235
236#define STATE_P_ON 0x00 /* BUSY */
237#define STATE_BUSY_RX 0x01
238#define STATE_BUSY_TX 0x02
239#define STATE_FORCE_TRX_OFF 0x03
240#define STATE_FORCE_TX_ON 0x04 /* IDLE */
241/* 0x05 */ /* INVALID_PARAMETER */
242#define STATE_RX_ON 0x06
243/* 0x07 */ /* SUCCESS */
244#define STATE_TRX_OFF 0x08
245#define STATE_TX_ON 0x09
246/* 0x0a - 0x0e */ /* 0x0a - UNSUPPORTED_ATTRIBUTE */
247#define STATE_SLEEP 0x0F
248#define STATE_PREP_DEEP_SLEEP 0x10
249#define STATE_BUSY_RX_AACK 0x11
250#define STATE_BUSY_TX_ARET 0x12
251#define STATE_RX_AACK_ON 0x16
252#define STATE_TX_ARET_ON 0x19
253#define STATE_RX_ON_NOCLK 0x1C
254#define STATE_RX_AACK_ON_NOCLK 0x1D
255#define STATE_BUSY_RX_AACK_NOCLK 0x1E
256#define STATE_TRANSITION_IN_PROGRESS 0x1F
257
258static int
259__at86rf230_detect_device(struct spi_device *spi, u16 *man_id, u8 *part,
260 u8 *version)
261{
262 u8 data[4];
263 u8 *buf = kmalloc(2, GFP_KERNEL);
264 int status;
265 struct spi_message msg;
266 struct spi_transfer xfer = {
267 .len = 2,
268 .tx_buf = buf,
269 .rx_buf = buf,
270 };
271 u8 reg;
272
273 if (!buf)
274 return -ENOMEM;
275
276 for (reg = RG_PART_NUM; reg <= RG_MAN_ID_1; reg++) {
277 buf[0] = (reg & CMD_REG_MASK) | CMD_REG;
278 buf[1] = 0xff;
279 dev_vdbg(&spi->dev, "buf[0] = %02x\n", buf[0]);
280 spi_message_init(&msg);
281 spi_message_add_tail(&xfer, &msg);
282
283 status = spi_sync(spi, &msg);
284 dev_vdbg(&spi->dev, "status = %d\n", status);
285 if (msg.status)
286 status = msg.status;
287
288 dev_vdbg(&spi->dev, "status = %d\n", status);
289 dev_vdbg(&spi->dev, "buf[0] = %02x\n", buf[0]);
290 dev_vdbg(&spi->dev, "buf[1] = %02x\n", buf[1]);
291
292 if (status == 0)
293 data[reg - RG_PART_NUM] = buf[1];
294 else
295 break;
296 }
297
298 if (status == 0) {
299 *part = data[0];
300 *version = data[1];
301 *man_id = (data[3] << 8) | data[2];
302 }
303
304 kfree(buf);
305
306 return status;
307}
308
309static int
310__at86rf230_write(struct at86rf230_local *lp, u8 addr, u8 data)
311{
312 u8 *buf = lp->buf;
313 int status;
314 struct spi_message msg;
315 struct spi_transfer xfer = {
316 .len = 2,
317 .tx_buf = buf,
318 };
319
320 buf[0] = (addr & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
321 buf[1] = data;
322 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
323 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
324 spi_message_init(&msg);
325 spi_message_add_tail(&xfer, &msg);
326
327 status = spi_sync(lp->spi, &msg);
328 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
329 if (msg.status)
330 status = msg.status;
331
332 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
333 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
334 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
335
336 return status;
337}
338
339static int
340__at86rf230_read_subreg(struct at86rf230_local *lp,
341 u8 addr, u8 mask, int shift, u8 *data)
342{
343 u8 *buf = lp->buf;
344 int status;
345 struct spi_message msg;
346 struct spi_transfer xfer = {
347 .len = 2,
348 .tx_buf = buf,
349 .rx_buf = buf,
350 };
351
352 buf[0] = (addr & CMD_REG_MASK) | CMD_REG;
353 buf[1] = 0xff;
354 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
355 spi_message_init(&msg);
356 spi_message_add_tail(&xfer, &msg);
357
358 status = spi_sync(lp->spi, &msg);
359 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
360 if (msg.status)
361 status = msg.status;
362
363 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
364 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
365 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
366
367 if (status == 0)
368 *data = (buf[1] & mask) >> shift;
369
370 return status;
371}
372
373static int
374at86rf230_read_subreg(struct at86rf230_local *lp,
375 u8 addr, u8 mask, int shift, u8 *data)
376{
377 int status;
378
379 mutex_lock(&lp->bmux);
380 status = __at86rf230_read_subreg(lp, addr, mask, shift, data);
381 mutex_unlock(&lp->bmux);
382
383 return status;
384}
385
386static int
387at86rf230_write_subreg(struct at86rf230_local *lp,
388 u8 addr, u8 mask, int shift, u8 data)
389{
390 int status;
391 u8 val;
392
393 mutex_lock(&lp->bmux);
394 status = __at86rf230_read_subreg(lp, addr, 0xff, 0, &val);
395 if (status)
396 goto out;
397
398 val &= ~mask;
399 val |= (data << shift) & mask;
400
401 status = __at86rf230_write(lp, addr, val);
402out:
403 mutex_unlock(&lp->bmux);
404
405 return status;
406}
407
408static int
409at86rf230_write_fbuf(struct at86rf230_local *lp, u8 *data, u8 len)
410{
411 u8 *buf = lp->buf;
412 int status;
413 struct spi_message msg;
414 struct spi_transfer xfer_head = {
415 .len = 2,
416 .tx_buf = buf,
417
418 };
419 struct spi_transfer xfer_buf = {
420 .len = len,
421 .tx_buf = data,
422 };
423
424 mutex_lock(&lp->bmux);
425 buf[0] = CMD_WRITE | CMD_FB;
426 buf[1] = len + 2; /* 2 bytes for CRC that isn't written */
427
428 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
429 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
430
431 spi_message_init(&msg);
432 spi_message_add_tail(&xfer_head, &msg);
433 spi_message_add_tail(&xfer_buf, &msg);
434
435 status = spi_sync(lp->spi, &msg);
436 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
437 if (msg.status)
438 status = msg.status;
439
440 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
441 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
442 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
443
444 mutex_unlock(&lp->bmux);
445 return status;
446}
447
448static int
449at86rf230_read_fbuf(struct at86rf230_local *lp, u8 *data, u8 *len, u8 *lqi)
450{
451 u8 *buf = lp->buf;
452 int status;
453 struct spi_message msg;
454 struct spi_transfer xfer_head = {
455 .len = 2,
456 .tx_buf = buf,
457 .rx_buf = buf,
458 };
459 struct spi_transfer xfer_head1 = {
460 .len = 2,
461 .tx_buf = buf,
462 .rx_buf = buf,
463 };
464 struct spi_transfer xfer_buf = {
465 .len = 0,
466 .rx_buf = data,
467 };
468
469 mutex_lock(&lp->bmux);
470
471 buf[0] = CMD_FB;
472 buf[1] = 0x00;
473
474 spi_message_init(&msg);
475 spi_message_add_tail(&xfer_head, &msg);
476
477 status = spi_sync(lp->spi, &msg);
478 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
479
480 xfer_buf.len = *(buf + 1) + 1;
481 *len = buf[1];
482
483 buf[0] = CMD_FB;
484 buf[1] = 0x00;
485
486 spi_message_init(&msg);
487 spi_message_add_tail(&xfer_head1, &msg);
488 spi_message_add_tail(&xfer_buf, &msg);
489
490 status = spi_sync(lp->spi, &msg);
491
492 if (msg.status)
493 status = msg.status;
494
495 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
496 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
497 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
498
499 if (status) {
500 if (lqi && (*len > lp->buf[1]))
501 *lqi = data[lp->buf[1]];
502 }
503 mutex_unlock(&lp->bmux);
504
505 return status;
506}
507
508static int
509at86rf230_ed(struct ieee802154_dev *dev, u8 *level)
510{
511 might_sleep();
512 BUG_ON(!level);
513 *level = 0xbe;
514 return 0;
515}
516
517static int
518at86rf230_state(struct ieee802154_dev *dev, int state)
519{
520 struct at86rf230_local *lp = dev->priv;
521 int rc;
522 u8 val;
523 u8 desired_status;
524
525 might_sleep();
526
527 if (state == STATE_FORCE_TX_ON)
528 desired_status = STATE_TX_ON;
529 else if (state == STATE_FORCE_TRX_OFF)
530 desired_status = STATE_TRX_OFF;
531 else
532 desired_status = state;
533
534 do {
535 rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &val);
536 if (rc)
537 goto err;
538 } while (val == STATE_TRANSITION_IN_PROGRESS);
539
540 if (val == desired_status)
541 return 0;
542
543 /* state is equal to phy states */
544 rc = at86rf230_write_subreg(lp, SR_TRX_CMD, state);
545 if (rc)
546 goto err;
547
548 do {
549 rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &val);
550 if (rc)
551 goto err;
552 } while (val == STATE_TRANSITION_IN_PROGRESS);
553
554
555 if (val == desired_status ||
556 (desired_status == STATE_RX_ON && val == STATE_BUSY_RX) ||
557 (desired_status == STATE_RX_AACK_ON && val == STATE_BUSY_RX_AACK))
558 return 0;
559
560 pr_err("unexpected state change: %d, asked for %d\n", val, state);
561 return -EBUSY;
562
563err:
564 pr_err("error: %d\n", rc);
565 return rc;
566}
567
568static int
569at86rf230_start(struct ieee802154_dev *dev)
570{
571 struct at86rf230_local *lp = dev->priv;
572 u8 rc;
573
574 rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1);
575 if (rc)
576 return rc;
577
578 rc = at86rf230_state(dev, STATE_TX_ON);
579 if (rc)
580 return rc;
581
582 return at86rf230_state(dev, STATE_RX_AACK_ON);
583}
584
585static void
586at86rf230_stop(struct ieee802154_dev *dev)
587{
588 at86rf230_state(dev, STATE_FORCE_TRX_OFF);
589}
590
591static int
592at86rf230_set_channel(struct at86rf230_local *lp, int page, int channel)
593{
594 lp->rssi_base_val = -91;
595
596 return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
597}
598
599static int
600at86rf212_set_channel(struct at86rf230_local *lp, int page, int channel)
601{
602 int rc;
603
604 if (channel == 0)
605 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0);
606 else
607 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1);
608 if (rc < 0)
609 return rc;
610
611 if (page == 0) {
612 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0);
613 lp->rssi_base_val = -100;
614 } else {
615 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1);
616 lp->rssi_base_val = -98;
617 }
618 if (rc < 0)
619 return rc;
620
621 return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
622}
623
624static int
625at86rf230_channel(struct ieee802154_dev *dev, int page, int channel)
626{
627 struct at86rf230_local *lp = dev->priv;
628 int rc;
629
630 might_sleep();
631
632 if (page < 0 || page > 31 ||
633 !(lp->dev->phy->channels_supported[page] & BIT(channel))) {
634 WARN_ON(1);
635 return -EINVAL;
636 }
637
638 if (is_rf212(lp))
639 rc = at86rf212_set_channel(lp, page, channel);
640 else
641 rc = at86rf230_set_channel(lp, page, channel);
642 if (rc < 0)
643 return rc;
644
645 msleep(1); /* Wait for PLL */
646 dev->phy->current_channel = channel;
647 dev->phy->current_page = page;
648
649 return 0;
650}
651
652static int
653at86rf230_xmit(struct ieee802154_dev *dev, struct sk_buff *skb)
654{
655 struct at86rf230_local *lp = dev->priv;
656 int rc;
657 unsigned long flags;
658
659 spin_lock_irqsave(&lp->lock, flags);
660 if (lp->irq_busy) {
661 spin_unlock_irqrestore(&lp->lock, flags);
662 return -EBUSY;
663 }
664 spin_unlock_irqrestore(&lp->lock, flags);
665
666 might_sleep();
667
668 rc = at86rf230_state(dev, STATE_FORCE_TX_ON);
669 if (rc)
670 goto err;
671
672 spin_lock_irqsave(&lp->lock, flags);
673 lp->is_tx = 1;
674 reinit_completion(&lp->tx_complete);
675 spin_unlock_irqrestore(&lp->lock, flags);
676
677 rc = at86rf230_write_fbuf(lp, skb->data, skb->len);
678 if (rc)
679 goto err_rx;
680
681 if (lp->tx_aret) {
682 rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_TX_ARET_ON);
683 if (rc)
684 goto err_rx;
685 }
686
687 rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_BUSY_TX);
688 if (rc)
689 goto err_rx;
690
691 rc = wait_for_completion_interruptible(&lp->tx_complete);
692 if (rc < 0)
693 goto err_rx;
694
695 rc = at86rf230_start(dev);
696
697 return rc;
698
699err_rx:
700 at86rf230_start(dev);
701err:
702 pr_err("error: %d\n", rc);
703
704 spin_lock_irqsave(&lp->lock, flags);
705 lp->is_tx = 0;
706 spin_unlock_irqrestore(&lp->lock, flags);
707
708 return rc;
709}
710
711static int at86rf230_rx(struct at86rf230_local *lp)
712{
713 u8 len = 128, lqi = 0;
714 struct sk_buff *skb;
715
716 skb = alloc_skb(len, GFP_KERNEL);
717
718 if (!skb)
719 return -ENOMEM;
720
721 if (at86rf230_read_fbuf(lp, skb_put(skb, len), &len, &lqi))
722 goto err;
723
724 if (len < 2)
725 goto err;
726
727 skb_trim(skb, len - 2); /* We do not put CRC into the frame */
728
729 ieee802154_rx_irqsafe(lp->dev, skb, lqi);
730
731 dev_dbg(&lp->spi->dev, "READ_FBUF: %d %x\n", len, lqi);
732
733 return 0;
734err:
735 pr_debug("received frame is too small\n");
736
737 kfree_skb(skb);
738 return -EINVAL;
739}
740
741static int
742at86rf230_set_hw_addr_filt(struct ieee802154_dev *dev,
743 struct ieee802154_hw_addr_filt *filt,
744 unsigned long changed)
745{
746 struct at86rf230_local *lp = dev->priv;
747
748 if (changed & IEEE802515_AFILT_SADDR_CHANGED) {
749 u16 addr = le16_to_cpu(filt->short_addr);
750
751 dev_vdbg(&lp->spi->dev,
752 "at86rf230_set_hw_addr_filt called for saddr\n");
753 __at86rf230_write(lp, RG_SHORT_ADDR_0, addr);
754 __at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8);
755 }
756
757 if (changed & IEEE802515_AFILT_PANID_CHANGED) {
758 u16 pan = le16_to_cpu(filt->pan_id);
759
760 dev_vdbg(&lp->spi->dev,
761 "at86rf230_set_hw_addr_filt called for pan id\n");
762 __at86rf230_write(lp, RG_PAN_ID_0, pan);
763 __at86rf230_write(lp, RG_PAN_ID_1, pan >> 8);
764 }
765
766 if (changed & IEEE802515_AFILT_IEEEADDR_CHANGED) {
767 u8 i, addr[8];
768
769 memcpy(addr, &filt->ieee_addr, 8);
770 dev_vdbg(&lp->spi->dev,
771 "at86rf230_set_hw_addr_filt called for IEEE addr\n");
772 for (i = 0; i < 8; i++)
773 __at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]);
774 }
775
776 if (changed & IEEE802515_AFILT_PANC_CHANGED) {
777 dev_vdbg(&lp->spi->dev,
778 "at86rf230_set_hw_addr_filt called for panc change\n");
779 if (filt->pan_coord)
780 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
781 else
782 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0);
783 }
784
785 return 0;
786}
787
788static int
789at86rf212_set_txpower(struct ieee802154_dev *dev, int db)
790{
791 struct at86rf230_local *lp = dev->priv;
792
793 /* typical maximum output is 5dBm with RG_PHY_TX_PWR 0x60, lower five
794 * bits decrease power in 1dB steps. 0x60 represents extra PA gain of
795 * 0dB.
796 * thus, supported values for db range from -26 to 5, for 31dB of
797 * reduction to 0dB of reduction.
798 */
799 if (db > 5 || db < -26)
800 return -EINVAL;
801
802 db = -(db - 5);
803
804 return __at86rf230_write(lp, RG_PHY_TX_PWR, 0x60 | db);
805}
806
807static int
808at86rf212_set_lbt(struct ieee802154_dev *dev, bool on)
809{
810 struct at86rf230_local *lp = dev->priv;
811
812 return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on);
813}
814
815static int
816at86rf212_set_cca_mode(struct ieee802154_dev *dev, u8 mode)
817{
818 struct at86rf230_local *lp = dev->priv;
819
820 return at86rf230_write_subreg(lp, SR_CCA_MODE, mode);
821}
822
823static int
824at86rf212_set_cca_ed_level(struct ieee802154_dev *dev, s32 level)
825{
826 struct at86rf230_local *lp = dev->priv;
827 int desens_steps;
828
829 if (level < lp->rssi_base_val || level > 30)
830 return -EINVAL;
831
832 desens_steps = (level - lp->rssi_base_val) * 100 / 207;
833
834 return at86rf230_write_subreg(lp, SR_CCA_ED_THRES, desens_steps);
835}
836
837static int
838at86rf212_set_csma_params(struct ieee802154_dev *dev, u8 min_be, u8 max_be,
839 u8 retries)
840{
841 struct at86rf230_local *lp = dev->priv;
842 int rc;
843
844 if (min_be > max_be || max_be > 8 || retries > 5)
845 return -EINVAL;
846
847 rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be);
848 if (rc)
849 return rc;
850
851 rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be);
852 if (rc)
853 return rc;
854
855 return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries);
856}
857
858static int
859at86rf212_set_frame_retries(struct ieee802154_dev *dev, s8 retries)
860{
861 struct at86rf230_local *lp = dev->priv;
862 int rc = 0;
863
864 if (retries < -1 || retries > 15)
865 return -EINVAL;
866
867 lp->tx_aret = retries >= 0;
868
869 if (retries >= 0)
870 rc = at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries);
871
872 return rc;
873}
874
875static struct ieee802154_ops at86rf230_ops = {
876 .owner = THIS_MODULE,
877 .xmit = at86rf230_xmit,
878 .ed = at86rf230_ed,
879 .set_channel = at86rf230_channel,
880 .start = at86rf230_start,
881 .stop = at86rf230_stop,
882 .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
883};
884
885static struct ieee802154_ops at86rf212_ops = {
886 .owner = THIS_MODULE,
887 .xmit = at86rf230_xmit,
888 .ed = at86rf230_ed,
889 .set_channel = at86rf230_channel,
890 .start = at86rf230_start,
891 .stop = at86rf230_stop,
892 .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
893 .set_txpower = at86rf212_set_txpower,
894 .set_lbt = at86rf212_set_lbt,
895 .set_cca_mode = at86rf212_set_cca_mode,
896 .set_cca_ed_level = at86rf212_set_cca_ed_level,
897 .set_csma_params = at86rf212_set_csma_params,
898 .set_frame_retries = at86rf212_set_frame_retries,
899};
900
901static void at86rf230_irqwork(struct work_struct *work)
902{
903 struct at86rf230_local *lp =
904 container_of(work, struct at86rf230_local, irqwork);
905 u8 status = 0, val;
906 int rc;
907 unsigned long flags;
908
909 rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &val);
910 status |= val;
911
912 status &= ~IRQ_PLL_LOCK; /* ignore */
913 status &= ~IRQ_RX_START; /* ignore */
914 status &= ~IRQ_AMI; /* ignore */
915 status &= ~IRQ_TRX_UR; /* FIXME: possibly handle ???*/
916
917 if (status & IRQ_TRX_END) {
918 status &= ~IRQ_TRX_END;
919 spin_lock_irqsave(&lp->lock, flags);
920 if (lp->is_tx) {
921 lp->is_tx = 0;
922 spin_unlock_irqrestore(&lp->lock, flags);
923 complete(&lp->tx_complete);
924 } else {
925 spin_unlock_irqrestore(&lp->lock, flags);
926 at86rf230_rx(lp);
927 }
928 }
929
930 spin_lock_irqsave(&lp->lock, flags);
931 lp->irq_busy = 0;
932 spin_unlock_irqrestore(&lp->lock, flags);
933}
934
935static void at86rf230_irqwork_level(struct work_struct *work)
936{
937 struct at86rf230_local *lp =
938 container_of(work, struct at86rf230_local, irqwork);
939
940 at86rf230_irqwork(work);
941
942 enable_irq(lp->spi->irq);
943}
944
945static irqreturn_t at86rf230_isr(int irq, void *data)
946{
947 struct at86rf230_local *lp = data;
948 unsigned long flags;
949
950 spin_lock_irqsave(&lp->lock, flags);
951 lp->irq_busy = 1;
952 spin_unlock_irqrestore(&lp->lock, flags);
953
954 schedule_work(&lp->irqwork);
955
956 return IRQ_HANDLED;
957}
958
959static irqreturn_t at86rf230_isr_level(int irq, void *data)
960{
961 disable_irq_nosync(irq);
962
963 return at86rf230_isr(irq, data);
964}
965
966static int at86rf230_irq_polarity(struct at86rf230_local *lp, int pol)
967{
968 return at86rf230_write_subreg(lp, SR_IRQ_POLARITY, pol);
969}
970
971static int at86rf230_hw_init(struct at86rf230_local *lp)
972{
973 struct at86rf230_platform_data *pdata = lp->spi->dev.platform_data;
974 int rc, irq_pol;
975 u8 status;
976 u8 csma_seed[2];
977
978 rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &status);
979 if (rc)
980 return rc;
981
982 rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_FORCE_TRX_OFF);
983 if (rc)
984 return rc;
985
986 /* configure irq polarity, defaults to high active */
987 if (pdata->irq_type & (IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW))
988 irq_pol = IRQ_ACTIVE_LOW;
989 else
990 irq_pol = IRQ_ACTIVE_HIGH;
991
992 rc = at86rf230_irq_polarity(lp, irq_pol);
993 if (rc)
994 return rc;
995
996 rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END);
997 if (rc)
998 return rc;
999
1000 get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
1001 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
1002 if (rc)
1003 return rc;
1004 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
1005 if (rc)
1006 return rc;
1007
1008 /* CLKM changes are applied immediately */
1009 rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00);
1010 if (rc)
1011 return rc;
1012
1013 /* Turn CLKM Off */
1014 rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00);
1015 if (rc)
1016 return rc;
1017 /* Wait the next SLEEP cycle */
1018 msleep(100);
1019
1020 rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &status);
1021 if (rc)
1022 return rc;
1023 if (!status) {
1024 dev_err(&lp->spi->dev, "DVDD error\n");
1025 return -EINVAL;
1026 }
1027
1028 return 0;
1029}
1030
1031static struct at86rf230_platform_data *
1032at86rf230_get_pdata(struct spi_device *spi)
1033{
1034 struct at86rf230_platform_data *pdata;
1035 const char *irq_type;
1036
1037 if (!IS_ENABLED(CONFIG_OF) || !spi->dev.of_node)
1038 return spi->dev.platform_data;
1039
1040 pdata = devm_kzalloc(&spi->dev, sizeof(*pdata), GFP_KERNEL);
1041 if (!pdata)
1042 goto done;
1043
1044 pdata->rstn = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0);
1045 pdata->slp_tr = of_get_named_gpio(spi->dev.of_node, "sleep-gpio", 0);
1046
1047 pdata->irq_type = IRQF_TRIGGER_RISING;
1048 of_property_read_string(spi->dev.of_node, "irq-type", &irq_type);
1049 if (!strcmp(irq_type, "level-high"))
1050 pdata->irq_type = IRQF_TRIGGER_HIGH;
1051 else if (!strcmp(irq_type, "level-low"))
1052 pdata->irq_type = IRQF_TRIGGER_LOW;
1053 else if (!strcmp(irq_type, "edge-rising"))
1054 pdata->irq_type = IRQF_TRIGGER_RISING;
1055 else if (!strcmp(irq_type, "edge-falling"))
1056 pdata->irq_type = IRQF_TRIGGER_FALLING;
1057 else
1058 dev_warn(&spi->dev, "wrong irq-type specified using edge-rising\n");
1059
1060 spi->dev.platform_data = pdata;
1061done:
1062 return pdata;
1063}
1064
1065static int at86rf230_probe(struct spi_device *spi)
1066{
1067 struct at86rf230_platform_data *pdata;
1068 struct ieee802154_dev *dev;
1069 struct at86rf230_local *lp;
1070 u16 man_id = 0;
1071 u8 part = 0, version = 0, status;
1072 irq_handler_t irq_handler;
1073 work_func_t irq_worker;
1074 int rc;
1075 const char *chip;
1076 struct ieee802154_ops *ops = NULL;
1077
1078 if (!spi->irq) {
1079 dev_err(&spi->dev, "no IRQ specified\n");
1080 return -EINVAL;
1081 }
1082
1083 pdata = at86rf230_get_pdata(spi);
1084 if (!pdata) {
1085 dev_err(&spi->dev, "no platform_data\n");
1086 return -EINVAL;
1087 }
1088
1089 if (gpio_is_valid(pdata->rstn)) {
1090 rc = gpio_request(pdata->rstn, "rstn");
1091 if (rc)
1092 return rc;
1093 }
1094
1095 if (gpio_is_valid(pdata->slp_tr)) {
1096 rc = gpio_request(pdata->slp_tr, "slp_tr");
1097 if (rc)
1098 goto err_slp_tr;
1099 }
1100
1101 if (gpio_is_valid(pdata->rstn)) {
1102 rc = gpio_direction_output(pdata->rstn, 1);
1103 if (rc)
1104 goto err_gpio_dir;
1105 }
1106
1107 if (gpio_is_valid(pdata->slp_tr)) {
1108 rc = gpio_direction_output(pdata->slp_tr, 0);
1109 if (rc)
1110 goto err_gpio_dir;
1111 }
1112
1113 /* Reset */
1114 if (gpio_is_valid(pdata->rstn)) {
1115 udelay(1);
1116 gpio_set_value(pdata->rstn, 0);
1117 udelay(1);
1118 gpio_set_value(pdata->rstn, 1);
1119 usleep_range(120, 240);
1120 }
1121
1122 rc = __at86rf230_detect_device(spi, &man_id, &part, &version);
1123 if (rc < 0)
1124 goto err_gpio_dir;
1125
1126 if (man_id != 0x001f) {
1127 dev_err(&spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
1128 man_id >> 8, man_id & 0xFF);
1129 rc = -EINVAL;
1130 goto err_gpio_dir;
1131 }
1132
1133 switch (part) {
1134 case 2:
1135 chip = "at86rf230";
1136 /* FIXME: should be easy to support; */
1137 break;
1138 case 3:
1139 chip = "at86rf231";
1140 ops = &at86rf230_ops;
1141 break;
1142 case 7:
1143 chip = "at86rf212";
1144 if (version == 1)
1145 ops = &at86rf212_ops;
1146 break;
1147 case 11:
1148 chip = "at86rf233";
1149 ops = &at86rf230_ops;
1150 break;
1151 default:
1152 chip = "UNKNOWN";
1153 break;
1154 }
1155
1156 dev_info(&spi->dev, "Detected %s chip version %d\n", chip, version);
1157 if (!ops) {
1158 rc = -ENOTSUPP;
1159 goto err_gpio_dir;
1160 }
1161
1162 dev = ieee802154_alloc_device(sizeof(*lp), ops);
1163 if (!dev) {
1164 rc = -ENOMEM;
1165 goto err_gpio_dir;
1166 }
1167
1168 lp = dev->priv;
1169 lp->dev = dev;
1170 lp->part = part;
1171 lp->vers = version;
1172
1173 lp->spi = spi;
1174
1175 dev->parent = &spi->dev;
1176 dev->extra_tx_headroom = 0;
1177 dev->flags = IEEE802154_HW_OMIT_CKSUM | IEEE802154_HW_AACK;
1178
1179 if (pdata->irq_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
1180 irq_worker = at86rf230_irqwork;
1181 irq_handler = at86rf230_isr;
1182 } else {
1183 irq_worker = at86rf230_irqwork_level;
1184 irq_handler = at86rf230_isr_level;
1185 }
1186
1187 mutex_init(&lp->bmux);
1188 INIT_WORK(&lp->irqwork, irq_worker);
1189 spin_lock_init(&lp->lock);
1190 init_completion(&lp->tx_complete);
1191
1192 spi_set_drvdata(spi, lp);
1193
1194 if (is_rf212(lp)) {
1195 dev->phy->channels_supported[0] = 0x00007FF;
1196 dev->phy->channels_supported[2] = 0x00007FF;
1197 } else {
1198 dev->phy->channels_supported[0] = 0x7FFF800;
1199 }
1200
1201 rc = at86rf230_hw_init(lp);
1202 if (rc)
1203 goto err_hw_init;
1204
1205 rc = request_irq(spi->irq, irq_handler,
1206 IRQF_SHARED | pdata->irq_type,
1207 dev_name(&spi->dev), lp);
1208 if (rc)
1209 goto err_hw_init;
1210
1211 /* Read irq status register to reset irq line */
1212 rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status);
1213 if (rc)
1214 goto err_irq;
1215
1216 rc = ieee802154_register_device(lp->dev);
1217 if (rc)
1218 goto err_irq;
1219
1220 return rc;
1221
1222err_irq:
1223 free_irq(spi->irq, lp);
1224err_hw_init:
1225 flush_work(&lp->irqwork);
1226 spi_set_drvdata(spi, NULL);
1227 mutex_destroy(&lp->bmux);
1228 ieee802154_free_device(lp->dev);
1229
1230err_gpio_dir:
1231 if (gpio_is_valid(pdata->slp_tr))
1232 gpio_free(pdata->slp_tr);
1233err_slp_tr:
1234 if (gpio_is_valid(pdata->rstn))
1235 gpio_free(pdata->rstn);
1236 return rc;
1237}
1238
1239static int at86rf230_remove(struct spi_device *spi)
1240{
1241 struct at86rf230_local *lp = spi_get_drvdata(spi);
1242 struct at86rf230_platform_data *pdata = spi->dev.platform_data;
1243
1244 /* mask all at86rf230 irq's */
1245 at86rf230_write_subreg(lp, SR_IRQ_MASK, 0);
1246 ieee802154_unregister_device(lp->dev);
1247
1248 free_irq(spi->irq, lp);
1249 flush_work(&lp->irqwork);
1250
1251 if (gpio_is_valid(pdata->slp_tr))
1252 gpio_free(pdata->slp_tr);
1253 if (gpio_is_valid(pdata->rstn))
1254 gpio_free(pdata->rstn);
1255
1256 mutex_destroy(&lp->bmux);
1257 ieee802154_free_device(lp->dev);
1258
1259 dev_dbg(&spi->dev, "unregistered at86rf230\n");
1260 return 0;
1261}
1262
1263#if IS_ENABLED(CONFIG_OF)
1264static struct of_device_id at86rf230_of_match[] = {
1265 { .compatible = "atmel,at86rf230", },
1266 { .compatible = "atmel,at86rf231", },
1267 { .compatible = "atmel,at86rf233", },
1268 { .compatible = "atmel,at86rf212", },
1269 { },
1270};
1271#endif
1272
1273static struct spi_driver at86rf230_driver = {
1274 .driver = {
1275 .of_match_table = of_match_ptr(at86rf230_of_match),
1276 .name = "at86rf230",
1277 .owner = THIS_MODULE,
1278 },
1279 .probe = at86rf230_probe,
1280 .remove = at86rf230_remove,
1281};
1282
1283module_spi_driver(at86rf230_driver);
1284
1285MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
1286MODULE_LICENSE("GPL v2");