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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * acpi-cpufreq.c - ACPI Processor P-States Driver
4 *
5 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
6 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
7 * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
8 * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com>
9 */
10
11#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
12
13#include <linux/kernel.h>
14#include <linux/module.h>
15#include <linux/init.h>
16#include <linux/smp.h>
17#include <linux/sched.h>
18#include <linux/cpufreq.h>
19#include <linux/compiler.h>
20#include <linux/dmi.h>
21#include <linux/slab.h>
22#include <linux/string_helpers.h>
23#include <linux/platform_device.h>
24
25#include <linux/acpi.h>
26#include <linux/io.h>
27#include <linux/delay.h>
28#include <linux/uaccess.h>
29
30#include <acpi/processor.h>
31#include <acpi/cppc_acpi.h>
32
33#include <asm/msr.h>
34#include <asm/processor.h>
35#include <asm/cpufeature.h>
36#include <asm/cpu_device_id.h>
37
38MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
39MODULE_DESCRIPTION("ACPI Processor P-States Driver");
40MODULE_LICENSE("GPL");
41
42enum {
43 UNDEFINED_CAPABLE = 0,
44 SYSTEM_INTEL_MSR_CAPABLE,
45 SYSTEM_AMD_MSR_CAPABLE,
46 SYSTEM_IO_CAPABLE,
47};
48
49#define INTEL_MSR_RANGE (0xffff)
50#define AMD_MSR_RANGE (0x7)
51#define HYGON_MSR_RANGE (0x7)
52
53#define MSR_K7_HWCR_CPB_DIS (1ULL << 25)
54
55struct acpi_cpufreq_data {
56 unsigned int resume;
57 unsigned int cpu_feature;
58 unsigned int acpi_perf_cpu;
59 cpumask_var_t freqdomain_cpus;
60 void (*cpu_freq_write)(struct acpi_pct_register *reg, u32 val);
61 u32 (*cpu_freq_read)(struct acpi_pct_register *reg);
62};
63
64/* acpi_perf_data is a pointer to percpu data. */
65static struct acpi_processor_performance __percpu *acpi_perf_data;
66
67static inline struct acpi_processor_performance *to_perf_data(struct acpi_cpufreq_data *data)
68{
69 return per_cpu_ptr(acpi_perf_data, data->acpi_perf_cpu);
70}
71
72static struct cpufreq_driver acpi_cpufreq_driver;
73
74static unsigned int acpi_pstate_strict;
75
76static bool boost_state(unsigned int cpu)
77{
78 u32 lo, hi;
79 u64 msr;
80
81 switch (boot_cpu_data.x86_vendor) {
82 case X86_VENDOR_INTEL:
83 case X86_VENDOR_CENTAUR:
84 case X86_VENDOR_ZHAOXIN:
85 rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi);
86 msr = lo | ((u64)hi << 32);
87 return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE);
88 case X86_VENDOR_HYGON:
89 case X86_VENDOR_AMD:
90 rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
91 msr = lo | ((u64)hi << 32);
92 return !(msr & MSR_K7_HWCR_CPB_DIS);
93 }
94 return false;
95}
96
97static int boost_set_msr(bool enable)
98{
99 u32 msr_addr;
100 u64 msr_mask, val;
101
102 switch (boot_cpu_data.x86_vendor) {
103 case X86_VENDOR_INTEL:
104 case X86_VENDOR_CENTAUR:
105 case X86_VENDOR_ZHAOXIN:
106 msr_addr = MSR_IA32_MISC_ENABLE;
107 msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE;
108 break;
109 case X86_VENDOR_HYGON:
110 case X86_VENDOR_AMD:
111 msr_addr = MSR_K7_HWCR;
112 msr_mask = MSR_K7_HWCR_CPB_DIS;
113 break;
114 default:
115 return -EINVAL;
116 }
117
118 rdmsrl(msr_addr, val);
119
120 if (enable)
121 val &= ~msr_mask;
122 else
123 val |= msr_mask;
124
125 wrmsrl(msr_addr, val);
126 return 0;
127}
128
129static void boost_set_msr_each(void *p_en)
130{
131 bool enable = (bool) p_en;
132
133 boost_set_msr(enable);
134}
135
136static int set_boost(struct cpufreq_policy *policy, int val)
137{
138 on_each_cpu_mask(policy->cpus, boost_set_msr_each,
139 (void *)(long)val, 1);
140 pr_debug("CPU %*pbl: Core Boosting %s.\n",
141 cpumask_pr_args(policy->cpus), str_enabled_disabled(val));
142
143 return 0;
144}
145
146static ssize_t show_freqdomain_cpus(struct cpufreq_policy *policy, char *buf)
147{
148 struct acpi_cpufreq_data *data = policy->driver_data;
149
150 if (unlikely(!data))
151 return -ENODEV;
152
153 return cpufreq_show_cpus(data->freqdomain_cpus, buf);
154}
155
156cpufreq_freq_attr_ro(freqdomain_cpus);
157
158#ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
159static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf,
160 size_t count)
161{
162 int ret;
163 unsigned int val = 0;
164
165 if (!acpi_cpufreq_driver.set_boost)
166 return -EINVAL;
167
168 ret = kstrtouint(buf, 10, &val);
169 if (ret || val > 1)
170 return -EINVAL;
171
172 cpus_read_lock();
173 set_boost(policy, val);
174 cpus_read_unlock();
175
176 return count;
177}
178
179static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf)
180{
181 return sprintf(buf, "%u\n", acpi_cpufreq_driver.boost_enabled);
182}
183
184cpufreq_freq_attr_rw(cpb);
185#endif
186
187static int check_est_cpu(unsigned int cpuid)
188{
189 struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
190
191 return cpu_has(cpu, X86_FEATURE_EST);
192}
193
194static int check_amd_hwpstate_cpu(unsigned int cpuid)
195{
196 struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
197
198 return cpu_has(cpu, X86_FEATURE_HW_PSTATE);
199}
200
201static unsigned extract_io(struct cpufreq_policy *policy, u32 value)
202{
203 struct acpi_cpufreq_data *data = policy->driver_data;
204 struct acpi_processor_performance *perf;
205 int i;
206
207 perf = to_perf_data(data);
208
209 for (i = 0; i < perf->state_count; i++) {
210 if (value == perf->states[i].status)
211 return policy->freq_table[i].frequency;
212 }
213 return 0;
214}
215
216static unsigned extract_msr(struct cpufreq_policy *policy, u32 msr)
217{
218 struct acpi_cpufreq_data *data = policy->driver_data;
219 struct cpufreq_frequency_table *pos;
220 struct acpi_processor_performance *perf;
221
222 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
223 msr &= AMD_MSR_RANGE;
224 else if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)
225 msr &= HYGON_MSR_RANGE;
226 else
227 msr &= INTEL_MSR_RANGE;
228
229 perf = to_perf_data(data);
230
231 cpufreq_for_each_entry(pos, policy->freq_table)
232 if (msr == perf->states[pos->driver_data].status)
233 return pos->frequency;
234 return policy->freq_table[0].frequency;
235}
236
237static unsigned extract_freq(struct cpufreq_policy *policy, u32 val)
238{
239 struct acpi_cpufreq_data *data = policy->driver_data;
240
241 switch (data->cpu_feature) {
242 case SYSTEM_INTEL_MSR_CAPABLE:
243 case SYSTEM_AMD_MSR_CAPABLE:
244 return extract_msr(policy, val);
245 case SYSTEM_IO_CAPABLE:
246 return extract_io(policy, val);
247 default:
248 return 0;
249 }
250}
251
252static u32 cpu_freq_read_intel(struct acpi_pct_register *not_used)
253{
254 u32 val, dummy __always_unused;
255
256 rdmsr(MSR_IA32_PERF_CTL, val, dummy);
257 return val;
258}
259
260static void cpu_freq_write_intel(struct acpi_pct_register *not_used, u32 val)
261{
262 u32 lo, hi;
263
264 rdmsr(MSR_IA32_PERF_CTL, lo, hi);
265 lo = (lo & ~INTEL_MSR_RANGE) | (val & INTEL_MSR_RANGE);
266 wrmsr(MSR_IA32_PERF_CTL, lo, hi);
267}
268
269static u32 cpu_freq_read_amd(struct acpi_pct_register *not_used)
270{
271 u32 val, dummy __always_unused;
272
273 rdmsr(MSR_AMD_PERF_CTL, val, dummy);
274 return val;
275}
276
277static void cpu_freq_write_amd(struct acpi_pct_register *not_used, u32 val)
278{
279 wrmsr(MSR_AMD_PERF_CTL, val, 0);
280}
281
282static u32 cpu_freq_read_io(struct acpi_pct_register *reg)
283{
284 u32 val;
285
286 acpi_os_read_port(reg->address, &val, reg->bit_width);
287 return val;
288}
289
290static void cpu_freq_write_io(struct acpi_pct_register *reg, u32 val)
291{
292 acpi_os_write_port(reg->address, val, reg->bit_width);
293}
294
295struct drv_cmd {
296 struct acpi_pct_register *reg;
297 u32 val;
298 union {
299 void (*write)(struct acpi_pct_register *reg, u32 val);
300 u32 (*read)(struct acpi_pct_register *reg);
301 } func;
302};
303
304/* Called via smp_call_function_single(), on the target CPU */
305static void do_drv_read(void *_cmd)
306{
307 struct drv_cmd *cmd = _cmd;
308
309 cmd->val = cmd->func.read(cmd->reg);
310}
311
312static u32 drv_read(struct acpi_cpufreq_data *data, const struct cpumask *mask)
313{
314 struct acpi_processor_performance *perf = to_perf_data(data);
315 struct drv_cmd cmd = {
316 .reg = &perf->control_register,
317 .func.read = data->cpu_freq_read,
318 };
319 int err;
320
321 err = smp_call_function_any(mask, do_drv_read, &cmd, 1);
322 WARN_ON_ONCE(err); /* smp_call_function_any() was buggy? */
323 return cmd.val;
324}
325
326/* Called via smp_call_function_many(), on the target CPUs */
327static void do_drv_write(void *_cmd)
328{
329 struct drv_cmd *cmd = _cmd;
330
331 cmd->func.write(cmd->reg, cmd->val);
332}
333
334static void drv_write(struct acpi_cpufreq_data *data,
335 const struct cpumask *mask, u32 val)
336{
337 struct acpi_processor_performance *perf = to_perf_data(data);
338 struct drv_cmd cmd = {
339 .reg = &perf->control_register,
340 .val = val,
341 .func.write = data->cpu_freq_write,
342 };
343 int this_cpu;
344
345 this_cpu = get_cpu();
346 if (cpumask_test_cpu(this_cpu, mask))
347 do_drv_write(&cmd);
348
349 smp_call_function_many(mask, do_drv_write, &cmd, 1);
350 put_cpu();
351}
352
353static u32 get_cur_val(const struct cpumask *mask, struct acpi_cpufreq_data *data)
354{
355 u32 val;
356
357 if (unlikely(cpumask_empty(mask)))
358 return 0;
359
360 val = drv_read(data, mask);
361
362 pr_debug("%s = %u\n", __func__, val);
363
364 return val;
365}
366
367static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
368{
369 struct acpi_cpufreq_data *data;
370 struct cpufreq_policy *policy;
371 unsigned int freq;
372 unsigned int cached_freq;
373
374 pr_debug("%s (%d)\n", __func__, cpu);
375
376 policy = cpufreq_cpu_get_raw(cpu);
377 if (unlikely(!policy))
378 return 0;
379
380 data = policy->driver_data;
381 if (unlikely(!data || !policy->freq_table))
382 return 0;
383
384 cached_freq = policy->freq_table[to_perf_data(data)->state].frequency;
385 freq = extract_freq(policy, get_cur_val(cpumask_of(cpu), data));
386 if (freq != cached_freq) {
387 /*
388 * The dreaded BIOS frequency change behind our back.
389 * Force set the frequency on next target call.
390 */
391 data->resume = 1;
392 }
393
394 pr_debug("cur freq = %u\n", freq);
395
396 return freq;
397}
398
399static unsigned int check_freqs(struct cpufreq_policy *policy,
400 const struct cpumask *mask, unsigned int freq)
401{
402 struct acpi_cpufreq_data *data = policy->driver_data;
403 unsigned int cur_freq;
404 unsigned int i;
405
406 for (i = 0; i < 100; i++) {
407 cur_freq = extract_freq(policy, get_cur_val(mask, data));
408 if (cur_freq == freq)
409 return 1;
410 udelay(10);
411 }
412 return 0;
413}
414
415static int acpi_cpufreq_target(struct cpufreq_policy *policy,
416 unsigned int index)
417{
418 struct acpi_cpufreq_data *data = policy->driver_data;
419 struct acpi_processor_performance *perf;
420 const struct cpumask *mask;
421 unsigned int next_perf_state = 0; /* Index into perf table */
422 int result = 0;
423
424 if (unlikely(!data)) {
425 return -ENODEV;
426 }
427
428 perf = to_perf_data(data);
429 next_perf_state = policy->freq_table[index].driver_data;
430 if (perf->state == next_perf_state) {
431 if (unlikely(data->resume)) {
432 pr_debug("Called after resume, resetting to P%d\n",
433 next_perf_state);
434 data->resume = 0;
435 } else {
436 pr_debug("Already at target state (P%d)\n",
437 next_perf_state);
438 return 0;
439 }
440 }
441
442 /*
443 * The core won't allow CPUs to go away until the governor has been
444 * stopped, so we can rely on the stability of policy->cpus.
445 */
446 mask = policy->shared_type == CPUFREQ_SHARED_TYPE_ANY ?
447 cpumask_of(policy->cpu) : policy->cpus;
448
449 drv_write(data, mask, perf->states[next_perf_state].control);
450
451 if (acpi_pstate_strict) {
452 if (!check_freqs(policy, mask,
453 policy->freq_table[index].frequency)) {
454 pr_debug("%s (%d)\n", __func__, policy->cpu);
455 result = -EAGAIN;
456 }
457 }
458
459 if (!result)
460 perf->state = next_perf_state;
461
462 return result;
463}
464
465static unsigned int acpi_cpufreq_fast_switch(struct cpufreq_policy *policy,
466 unsigned int target_freq)
467{
468 struct acpi_cpufreq_data *data = policy->driver_data;
469 struct acpi_processor_performance *perf;
470 struct cpufreq_frequency_table *entry;
471 unsigned int next_perf_state, next_freq, index;
472
473 /*
474 * Find the closest frequency above target_freq.
475 */
476 if (policy->cached_target_freq == target_freq)
477 index = policy->cached_resolved_idx;
478 else
479 index = cpufreq_table_find_index_dl(policy, target_freq,
480 false);
481
482 entry = &policy->freq_table[index];
483 next_freq = entry->frequency;
484 next_perf_state = entry->driver_data;
485
486 perf = to_perf_data(data);
487 if (perf->state == next_perf_state) {
488 if (unlikely(data->resume))
489 data->resume = 0;
490 else
491 return next_freq;
492 }
493
494 data->cpu_freq_write(&perf->control_register,
495 perf->states[next_perf_state].control);
496 perf->state = next_perf_state;
497 return next_freq;
498}
499
500static unsigned long
501acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
502{
503 struct acpi_processor_performance *perf;
504
505 perf = to_perf_data(data);
506 if (cpu_khz) {
507 /* search the closest match to cpu_khz */
508 unsigned int i;
509 unsigned long freq;
510 unsigned long freqn = perf->states[0].core_frequency * 1000;
511
512 for (i = 0; i < (perf->state_count-1); i++) {
513 freq = freqn;
514 freqn = perf->states[i+1].core_frequency * 1000;
515 if ((2 * cpu_khz) > (freqn + freq)) {
516 perf->state = i;
517 return freq;
518 }
519 }
520 perf->state = perf->state_count-1;
521 return freqn;
522 } else {
523 /* assume CPU is at P0... */
524 perf->state = 0;
525 return perf->states[0].core_frequency * 1000;
526 }
527}
528
529static void free_acpi_perf_data(void)
530{
531 unsigned int i;
532
533 /* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */
534 for_each_possible_cpu(i)
535 free_cpumask_var(per_cpu_ptr(acpi_perf_data, i)
536 ->shared_cpu_map);
537 free_percpu(acpi_perf_data);
538}
539
540static int cpufreq_boost_down_prep(unsigned int cpu)
541{
542 /*
543 * Clear the boost-disable bit on the CPU_DOWN path so that
544 * this cpu cannot block the remaining ones from boosting.
545 */
546 return boost_set_msr(1);
547}
548
549/*
550 * acpi_cpufreq_early_init - initialize ACPI P-States library
551 *
552 * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c)
553 * in order to determine correct frequency and voltage pairings. We can
554 * do _PDC and _PSD and find out the processor dependency for the
555 * actual init that will happen later...
556 */
557static int __init acpi_cpufreq_early_init(void)
558{
559 unsigned int i;
560 pr_debug("%s\n", __func__);
561
562 acpi_perf_data = alloc_percpu(struct acpi_processor_performance);
563 if (!acpi_perf_data) {
564 pr_debug("Memory allocation error for acpi_perf_data.\n");
565 return -ENOMEM;
566 }
567 for_each_possible_cpu(i) {
568 if (!zalloc_cpumask_var_node(
569 &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map,
570 GFP_KERNEL, cpu_to_node(i))) {
571
572 /* Freeing a NULL pointer is OK: alloc_percpu zeroes. */
573 free_acpi_perf_data();
574 return -ENOMEM;
575 }
576 }
577
578 /* Do initialization in ACPI core */
579 acpi_processor_preregister_performance(acpi_perf_data);
580 return 0;
581}
582
583#ifdef CONFIG_SMP
584/*
585 * Some BIOSes do SW_ANY coordination internally, either set it up in hw
586 * or do it in BIOS firmware and won't inform about it to OS. If not
587 * detected, this has a side effect of making CPU run at a different speed
588 * than OS intended it to run at. Detect it and handle it cleanly.
589 */
590static int bios_with_sw_any_bug;
591
592static int sw_any_bug_found(const struct dmi_system_id *d)
593{
594 bios_with_sw_any_bug = 1;
595 return 0;
596}
597
598static const struct dmi_system_id sw_any_bug_dmi_table[] = {
599 {
600 .callback = sw_any_bug_found,
601 .ident = "Supermicro Server X6DLP",
602 .matches = {
603 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
604 DMI_MATCH(DMI_BIOS_VERSION, "080010"),
605 DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"),
606 },
607 },
608 { }
609};
610
611static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c)
612{
613 /* Intel Xeon Processor 7100 Series Specification Update
614 * https://www.intel.com/Assets/PDF/specupdate/314554.pdf
615 * AL30: A Machine Check Exception (MCE) Occurring during an
616 * Enhanced Intel SpeedStep Technology Ratio Change May Cause
617 * Both Processor Cores to Lock Up. */
618 if (c->x86_vendor == X86_VENDOR_INTEL) {
619 if ((c->x86 == 15) &&
620 (c->x86_model == 6) &&
621 (c->x86_stepping == 8)) {
622 pr_info("Intel(R) Xeon(R) 7100 Errata AL30, processors may lock up on frequency changes: disabling acpi-cpufreq\n");
623 return -ENODEV;
624 }
625 }
626 return 0;
627}
628#endif
629
630#ifdef CONFIG_ACPI_CPPC_LIB
631static u64 get_max_boost_ratio(unsigned int cpu)
632{
633 struct cppc_perf_caps perf_caps;
634 u64 highest_perf, nominal_perf;
635 int ret;
636
637 if (acpi_pstate_strict)
638 return 0;
639
640 ret = cppc_get_perf_caps(cpu, &perf_caps);
641 if (ret) {
642 pr_debug("CPU%d: Unable to get performance capabilities (%d)\n",
643 cpu, ret);
644 return 0;
645 }
646
647 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
648 highest_perf = amd_get_highest_perf();
649 else
650 highest_perf = perf_caps.highest_perf;
651
652 nominal_perf = perf_caps.nominal_perf;
653
654 if (!highest_perf || !nominal_perf) {
655 pr_debug("CPU%d: highest or nominal performance missing\n", cpu);
656 return 0;
657 }
658
659 if (highest_perf < nominal_perf) {
660 pr_debug("CPU%d: nominal performance above highest\n", cpu);
661 return 0;
662 }
663
664 return div_u64(highest_perf << SCHED_CAPACITY_SHIFT, nominal_perf);
665}
666#else
667static inline u64 get_max_boost_ratio(unsigned int cpu) { return 0; }
668#endif
669
670static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
671{
672 struct cpufreq_frequency_table *freq_table;
673 struct acpi_processor_performance *perf;
674 struct acpi_cpufreq_data *data;
675 unsigned int cpu = policy->cpu;
676 struct cpuinfo_x86 *c = &cpu_data(cpu);
677 unsigned int valid_states = 0;
678 unsigned int result = 0;
679 u64 max_boost_ratio;
680 unsigned int i;
681#ifdef CONFIG_SMP
682 static int blacklisted;
683#endif
684
685 pr_debug("%s\n", __func__);
686
687#ifdef CONFIG_SMP
688 if (blacklisted)
689 return blacklisted;
690 blacklisted = acpi_cpufreq_blacklist(c);
691 if (blacklisted)
692 return blacklisted;
693#endif
694
695 data = kzalloc(sizeof(*data), GFP_KERNEL);
696 if (!data)
697 return -ENOMEM;
698
699 if (!zalloc_cpumask_var(&data->freqdomain_cpus, GFP_KERNEL)) {
700 result = -ENOMEM;
701 goto err_free;
702 }
703
704 perf = per_cpu_ptr(acpi_perf_data, cpu);
705 data->acpi_perf_cpu = cpu;
706 policy->driver_data = data;
707
708 if (cpu_has(c, X86_FEATURE_CONSTANT_TSC))
709 acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS;
710
711 result = acpi_processor_register_performance(perf, cpu);
712 if (result)
713 goto err_free_mask;
714
715 policy->shared_type = perf->shared_type;
716
717 /*
718 * Will let policy->cpus know about dependency only when software
719 * coordination is required.
720 */
721 if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL ||
722 policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
723 cpumask_copy(policy->cpus, perf->shared_cpu_map);
724 }
725 cpumask_copy(data->freqdomain_cpus, perf->shared_cpu_map);
726
727#ifdef CONFIG_SMP
728 dmi_check_system(sw_any_bug_dmi_table);
729 if (bios_with_sw_any_bug && !policy_is_shared(policy)) {
730 policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
731 cpumask_copy(policy->cpus, topology_core_cpumask(cpu));
732 }
733
734 if (check_amd_hwpstate_cpu(cpu) && boot_cpu_data.x86 < 0x19 &&
735 !acpi_pstate_strict) {
736 cpumask_clear(policy->cpus);
737 cpumask_set_cpu(cpu, policy->cpus);
738 cpumask_copy(data->freqdomain_cpus,
739 topology_sibling_cpumask(cpu));
740 policy->shared_type = CPUFREQ_SHARED_TYPE_HW;
741 pr_info_once("overriding BIOS provided _PSD data\n");
742 }
743#endif
744
745 /* capability check */
746 if (perf->state_count <= 1) {
747 pr_debug("No P-States\n");
748 result = -ENODEV;
749 goto err_unreg;
750 }
751
752 if (perf->control_register.space_id != perf->status_register.space_id) {
753 result = -ENODEV;
754 goto err_unreg;
755 }
756
757 switch (perf->control_register.space_id) {
758 case ACPI_ADR_SPACE_SYSTEM_IO:
759 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
760 boot_cpu_data.x86 == 0xf) {
761 pr_debug("AMD K8 systems must use native drivers.\n");
762 result = -ENODEV;
763 goto err_unreg;
764 }
765 pr_debug("SYSTEM IO addr space\n");
766 data->cpu_feature = SYSTEM_IO_CAPABLE;
767 data->cpu_freq_read = cpu_freq_read_io;
768 data->cpu_freq_write = cpu_freq_write_io;
769 break;
770 case ACPI_ADR_SPACE_FIXED_HARDWARE:
771 pr_debug("HARDWARE addr space\n");
772 if (check_est_cpu(cpu)) {
773 data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE;
774 data->cpu_freq_read = cpu_freq_read_intel;
775 data->cpu_freq_write = cpu_freq_write_intel;
776 break;
777 }
778 if (check_amd_hwpstate_cpu(cpu)) {
779 data->cpu_feature = SYSTEM_AMD_MSR_CAPABLE;
780 data->cpu_freq_read = cpu_freq_read_amd;
781 data->cpu_freq_write = cpu_freq_write_amd;
782 break;
783 }
784 result = -ENODEV;
785 goto err_unreg;
786 default:
787 pr_debug("Unknown addr space %d\n",
788 (u32) (perf->control_register.space_id));
789 result = -ENODEV;
790 goto err_unreg;
791 }
792
793 freq_table = kcalloc(perf->state_count + 1, sizeof(*freq_table),
794 GFP_KERNEL);
795 if (!freq_table) {
796 result = -ENOMEM;
797 goto err_unreg;
798 }
799
800 /* detect transition latency */
801 policy->cpuinfo.transition_latency = 0;
802 for (i = 0; i < perf->state_count; i++) {
803 if ((perf->states[i].transition_latency * 1000) >
804 policy->cpuinfo.transition_latency)
805 policy->cpuinfo.transition_latency =
806 perf->states[i].transition_latency * 1000;
807 }
808
809 /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */
810 if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE &&
811 policy->cpuinfo.transition_latency > 20 * 1000) {
812 policy->cpuinfo.transition_latency = 20 * 1000;
813 pr_info_once("P-state transition latency capped at 20 uS\n");
814 }
815
816 /* table init */
817 for (i = 0; i < perf->state_count; i++) {
818 if (i > 0 && perf->states[i].core_frequency >=
819 freq_table[valid_states-1].frequency / 1000)
820 continue;
821
822 freq_table[valid_states].driver_data = i;
823 freq_table[valid_states].frequency =
824 perf->states[i].core_frequency * 1000;
825 valid_states++;
826 }
827 freq_table[valid_states].frequency = CPUFREQ_TABLE_END;
828
829 max_boost_ratio = get_max_boost_ratio(cpu);
830 if (max_boost_ratio) {
831 unsigned int freq = freq_table[0].frequency;
832
833 /*
834 * Because the loop above sorts the freq_table entries in the
835 * descending order, freq is the maximum frequency in the table.
836 * Assume that it corresponds to the CPPC nominal frequency and
837 * use it to set cpuinfo.max_freq.
838 */
839 policy->cpuinfo.max_freq = freq * max_boost_ratio >> SCHED_CAPACITY_SHIFT;
840 } else {
841 /*
842 * If the maximum "boost" frequency is unknown, ask the arch
843 * scale-invariance code to use the "nominal" performance for
844 * CPU utilization scaling so as to prevent the schedutil
845 * governor from selecting inadequate CPU frequencies.
846 */
847 arch_set_max_freq_ratio(true);
848 }
849
850 policy->freq_table = freq_table;
851 perf->state = 0;
852
853 switch (perf->control_register.space_id) {
854 case ACPI_ADR_SPACE_SYSTEM_IO:
855 /*
856 * The core will not set policy->cur, because
857 * cpufreq_driver->get is NULL, so we need to set it here.
858 * However, we have to guess it, because the current speed is
859 * unknown and not detectable via IO ports.
860 */
861 policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu);
862 break;
863 case ACPI_ADR_SPACE_FIXED_HARDWARE:
864 acpi_cpufreq_driver.get = get_cur_freq_on_cpu;
865 break;
866 default:
867 break;
868 }
869
870 /* notify BIOS that we exist */
871 acpi_processor_notify_smm(THIS_MODULE);
872
873 pr_debug("CPU%u - ACPI performance management activated.\n", cpu);
874 for (i = 0; i < perf->state_count; i++)
875 pr_debug(" %cP%d: %d MHz, %d mW, %d uS\n",
876 (i == perf->state ? '*' : ' '), i,
877 (u32) perf->states[i].core_frequency,
878 (u32) perf->states[i].power,
879 (u32) perf->states[i].transition_latency);
880
881 /*
882 * the first call to ->target() should result in us actually
883 * writing something to the appropriate registers.
884 */
885 data->resume = 1;
886
887 policy->fast_switch_possible = !acpi_pstate_strict &&
888 !(policy_is_shared(policy) && policy->shared_type != CPUFREQ_SHARED_TYPE_ANY);
889
890 if (perf->states[0].core_frequency * 1000 != freq_table[0].frequency)
891 pr_warn(FW_WARN "P-state 0 is not max freq\n");
892
893 if (acpi_cpufreq_driver.set_boost)
894 set_boost(policy, acpi_cpufreq_driver.boost_enabled);
895
896 return result;
897
898err_unreg:
899 acpi_processor_unregister_performance(cpu);
900err_free_mask:
901 free_cpumask_var(data->freqdomain_cpus);
902err_free:
903 kfree(data);
904 policy->driver_data = NULL;
905
906 return result;
907}
908
909static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy)
910{
911 struct acpi_cpufreq_data *data = policy->driver_data;
912
913 pr_debug("%s\n", __func__);
914
915 cpufreq_boost_down_prep(policy->cpu);
916 policy->fast_switch_possible = false;
917 policy->driver_data = NULL;
918 acpi_processor_unregister_performance(data->acpi_perf_cpu);
919 free_cpumask_var(data->freqdomain_cpus);
920 kfree(policy->freq_table);
921 kfree(data);
922
923 return 0;
924}
925
926static int acpi_cpufreq_resume(struct cpufreq_policy *policy)
927{
928 struct acpi_cpufreq_data *data = policy->driver_data;
929
930 pr_debug("%s\n", __func__);
931
932 data->resume = 1;
933
934 return 0;
935}
936
937static struct freq_attr *acpi_cpufreq_attr[] = {
938 &cpufreq_freq_attr_scaling_available_freqs,
939 &freqdomain_cpus,
940#ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
941 &cpb,
942#endif
943 NULL,
944};
945
946static struct cpufreq_driver acpi_cpufreq_driver = {
947 .verify = cpufreq_generic_frequency_table_verify,
948 .target_index = acpi_cpufreq_target,
949 .fast_switch = acpi_cpufreq_fast_switch,
950 .bios_limit = acpi_processor_get_bios_limit,
951 .init = acpi_cpufreq_cpu_init,
952 .exit = acpi_cpufreq_cpu_exit,
953 .resume = acpi_cpufreq_resume,
954 .name = "acpi-cpufreq",
955 .attr = acpi_cpufreq_attr,
956};
957
958static void __init acpi_cpufreq_boost_init(void)
959{
960 if (!(boot_cpu_has(X86_FEATURE_CPB) || boot_cpu_has(X86_FEATURE_IDA))) {
961 pr_debug("Boost capabilities not present in the processor\n");
962 return;
963 }
964
965 acpi_cpufreq_driver.set_boost = set_boost;
966 acpi_cpufreq_driver.boost_enabled = boost_state(0);
967}
968
969static int __init acpi_cpufreq_probe(struct platform_device *pdev)
970{
971 int ret;
972
973 if (acpi_disabled)
974 return -ENODEV;
975
976 /* don't keep reloading if cpufreq_driver exists */
977 if (cpufreq_get_current_driver())
978 return -ENODEV;
979
980 pr_debug("%s\n", __func__);
981
982 ret = acpi_cpufreq_early_init();
983 if (ret)
984 return ret;
985
986#ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
987 /* this is a sysfs file with a strange name and an even stranger
988 * semantic - per CPU instantiation, but system global effect.
989 * Lets enable it only on AMD CPUs for compatibility reasons and
990 * only if configured. This is considered legacy code, which
991 * will probably be removed at some point in the future.
992 */
993 if (!check_amd_hwpstate_cpu(0)) {
994 struct freq_attr **attr;
995
996 pr_debug("CPB unsupported, do not expose it\n");
997
998 for (attr = acpi_cpufreq_attr; *attr; attr++)
999 if (*attr == &cpb) {
1000 *attr = NULL;
1001 break;
1002 }
1003 }
1004#endif
1005 acpi_cpufreq_boost_init();
1006
1007 ret = cpufreq_register_driver(&acpi_cpufreq_driver);
1008 if (ret) {
1009 free_acpi_perf_data();
1010 }
1011 return ret;
1012}
1013
1014static void acpi_cpufreq_remove(struct platform_device *pdev)
1015{
1016 pr_debug("%s\n", __func__);
1017
1018 cpufreq_unregister_driver(&acpi_cpufreq_driver);
1019
1020 free_acpi_perf_data();
1021}
1022
1023static struct platform_driver acpi_cpufreq_platdrv = {
1024 .driver = {
1025 .name = "acpi-cpufreq",
1026 },
1027 .remove_new = acpi_cpufreq_remove,
1028};
1029
1030static int __init acpi_cpufreq_init(void)
1031{
1032 return platform_driver_probe(&acpi_cpufreq_platdrv, acpi_cpufreq_probe);
1033}
1034
1035static void __exit acpi_cpufreq_exit(void)
1036{
1037 platform_driver_unregister(&acpi_cpufreq_platdrv);
1038}
1039
1040module_param(acpi_pstate_strict, uint, 0644);
1041MODULE_PARM_DESC(acpi_pstate_strict,
1042 "value 0 or non-zero. non-zero -> strict ACPI checks are "
1043 "performed during frequency changes.");
1044
1045late_initcall(acpi_cpufreq_init);
1046module_exit(acpi_cpufreq_exit);
1047
1048MODULE_ALIAS("platform:acpi-cpufreq");
1/*
2 * acpi-cpufreq.c - ACPI Processor P-States Driver
3 *
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com>
8 *
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
24 *
25 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
26 */
27
28#include <linux/kernel.h>
29#include <linux/module.h>
30#include <linux/init.h>
31#include <linux/smp.h>
32#include <linux/sched.h>
33#include <linux/cpufreq.h>
34#include <linux/compiler.h>
35#include <linux/dmi.h>
36#include <linux/slab.h>
37
38#include <linux/acpi.h>
39#include <linux/io.h>
40#include <linux/delay.h>
41#include <linux/uaccess.h>
42
43#include <acpi/processor.h>
44
45#include <asm/msr.h>
46#include <asm/processor.h>
47#include <asm/cpufeature.h>
48
49MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
50MODULE_DESCRIPTION("ACPI Processor P-States Driver");
51MODULE_LICENSE("GPL");
52
53#define PFX "acpi-cpufreq: "
54
55enum {
56 UNDEFINED_CAPABLE = 0,
57 SYSTEM_INTEL_MSR_CAPABLE,
58 SYSTEM_AMD_MSR_CAPABLE,
59 SYSTEM_IO_CAPABLE,
60};
61
62#define INTEL_MSR_RANGE (0xffff)
63#define AMD_MSR_RANGE (0x7)
64
65#define MSR_K7_HWCR_CPB_DIS (1ULL << 25)
66
67struct acpi_cpufreq_data {
68 struct acpi_processor_performance *acpi_data;
69 struct cpufreq_frequency_table *freq_table;
70 unsigned int resume;
71 unsigned int cpu_feature;
72 cpumask_var_t freqdomain_cpus;
73};
74
75static DEFINE_PER_CPU(struct acpi_cpufreq_data *, acfreq_data);
76
77/* acpi_perf_data is a pointer to percpu data. */
78static struct acpi_processor_performance __percpu *acpi_perf_data;
79
80static struct cpufreq_driver acpi_cpufreq_driver;
81
82static unsigned int acpi_pstate_strict;
83static struct msr __percpu *msrs;
84
85static bool boost_state(unsigned int cpu)
86{
87 u32 lo, hi;
88 u64 msr;
89
90 switch (boot_cpu_data.x86_vendor) {
91 case X86_VENDOR_INTEL:
92 rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi);
93 msr = lo | ((u64)hi << 32);
94 return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE);
95 case X86_VENDOR_AMD:
96 rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
97 msr = lo | ((u64)hi << 32);
98 return !(msr & MSR_K7_HWCR_CPB_DIS);
99 }
100 return false;
101}
102
103static void boost_set_msrs(bool enable, const struct cpumask *cpumask)
104{
105 u32 cpu;
106 u32 msr_addr;
107 u64 msr_mask;
108
109 switch (boot_cpu_data.x86_vendor) {
110 case X86_VENDOR_INTEL:
111 msr_addr = MSR_IA32_MISC_ENABLE;
112 msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE;
113 break;
114 case X86_VENDOR_AMD:
115 msr_addr = MSR_K7_HWCR;
116 msr_mask = MSR_K7_HWCR_CPB_DIS;
117 break;
118 default:
119 return;
120 }
121
122 rdmsr_on_cpus(cpumask, msr_addr, msrs);
123
124 for_each_cpu(cpu, cpumask) {
125 struct msr *reg = per_cpu_ptr(msrs, cpu);
126 if (enable)
127 reg->q &= ~msr_mask;
128 else
129 reg->q |= msr_mask;
130 }
131
132 wrmsr_on_cpus(cpumask, msr_addr, msrs);
133}
134
135static int _store_boost(int val)
136{
137 get_online_cpus();
138 boost_set_msrs(val, cpu_online_mask);
139 put_online_cpus();
140 pr_debug("Core Boosting %sabled.\n", val ? "en" : "dis");
141
142 return 0;
143}
144
145static ssize_t show_freqdomain_cpus(struct cpufreq_policy *policy, char *buf)
146{
147 struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
148
149 return cpufreq_show_cpus(data->freqdomain_cpus, buf);
150}
151
152cpufreq_freq_attr_ro(freqdomain_cpus);
153
154#ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
155static ssize_t store_boost(const char *buf, size_t count)
156{
157 int ret;
158 unsigned long val = 0;
159
160 if (!acpi_cpufreq_driver.boost_supported)
161 return -EINVAL;
162
163 ret = kstrtoul(buf, 10, &val);
164 if (ret || (val > 1))
165 return -EINVAL;
166
167 _store_boost((int) val);
168
169 return count;
170}
171
172static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf,
173 size_t count)
174{
175 return store_boost(buf, count);
176}
177
178static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf)
179{
180 return sprintf(buf, "%u\n", acpi_cpufreq_driver.boost_enabled);
181}
182
183cpufreq_freq_attr_rw(cpb);
184#endif
185
186static int check_est_cpu(unsigned int cpuid)
187{
188 struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
189
190 return cpu_has(cpu, X86_FEATURE_EST);
191}
192
193static int check_amd_hwpstate_cpu(unsigned int cpuid)
194{
195 struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
196
197 return cpu_has(cpu, X86_FEATURE_HW_PSTATE);
198}
199
200static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data)
201{
202 struct acpi_processor_performance *perf;
203 int i;
204
205 perf = data->acpi_data;
206
207 for (i = 0; i < perf->state_count; i++) {
208 if (value == perf->states[i].status)
209 return data->freq_table[i].frequency;
210 }
211 return 0;
212}
213
214static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data)
215{
216 int i;
217 struct acpi_processor_performance *perf;
218
219 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
220 msr &= AMD_MSR_RANGE;
221 else
222 msr &= INTEL_MSR_RANGE;
223
224 perf = data->acpi_data;
225
226 for (i = 0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
227 if (msr == perf->states[data->freq_table[i].driver_data].status)
228 return data->freq_table[i].frequency;
229 }
230 return data->freq_table[0].frequency;
231}
232
233static unsigned extract_freq(u32 val, struct acpi_cpufreq_data *data)
234{
235 switch (data->cpu_feature) {
236 case SYSTEM_INTEL_MSR_CAPABLE:
237 case SYSTEM_AMD_MSR_CAPABLE:
238 return extract_msr(val, data);
239 case SYSTEM_IO_CAPABLE:
240 return extract_io(val, data);
241 default:
242 return 0;
243 }
244}
245
246struct msr_addr {
247 u32 reg;
248};
249
250struct io_addr {
251 u16 port;
252 u8 bit_width;
253};
254
255struct drv_cmd {
256 unsigned int type;
257 const struct cpumask *mask;
258 union {
259 struct msr_addr msr;
260 struct io_addr io;
261 } addr;
262 u32 val;
263};
264
265/* Called via smp_call_function_single(), on the target CPU */
266static void do_drv_read(void *_cmd)
267{
268 struct drv_cmd *cmd = _cmd;
269 u32 h;
270
271 switch (cmd->type) {
272 case SYSTEM_INTEL_MSR_CAPABLE:
273 case SYSTEM_AMD_MSR_CAPABLE:
274 rdmsr(cmd->addr.msr.reg, cmd->val, h);
275 break;
276 case SYSTEM_IO_CAPABLE:
277 acpi_os_read_port((acpi_io_address)cmd->addr.io.port,
278 &cmd->val,
279 (u32)cmd->addr.io.bit_width);
280 break;
281 default:
282 break;
283 }
284}
285
286/* Called via smp_call_function_many(), on the target CPUs */
287static void do_drv_write(void *_cmd)
288{
289 struct drv_cmd *cmd = _cmd;
290 u32 lo, hi;
291
292 switch (cmd->type) {
293 case SYSTEM_INTEL_MSR_CAPABLE:
294 rdmsr(cmd->addr.msr.reg, lo, hi);
295 lo = (lo & ~INTEL_MSR_RANGE) | (cmd->val & INTEL_MSR_RANGE);
296 wrmsr(cmd->addr.msr.reg, lo, hi);
297 break;
298 case SYSTEM_AMD_MSR_CAPABLE:
299 wrmsr(cmd->addr.msr.reg, cmd->val, 0);
300 break;
301 case SYSTEM_IO_CAPABLE:
302 acpi_os_write_port((acpi_io_address)cmd->addr.io.port,
303 cmd->val,
304 (u32)cmd->addr.io.bit_width);
305 break;
306 default:
307 break;
308 }
309}
310
311static void drv_read(struct drv_cmd *cmd)
312{
313 int err;
314 cmd->val = 0;
315
316 err = smp_call_function_any(cmd->mask, do_drv_read, cmd, 1);
317 WARN_ON_ONCE(err); /* smp_call_function_any() was buggy? */
318}
319
320static void drv_write(struct drv_cmd *cmd)
321{
322 int this_cpu;
323
324 this_cpu = get_cpu();
325 if (cpumask_test_cpu(this_cpu, cmd->mask))
326 do_drv_write(cmd);
327 smp_call_function_many(cmd->mask, do_drv_write, cmd, 1);
328 put_cpu();
329}
330
331static u32 get_cur_val(const struct cpumask *mask)
332{
333 struct acpi_processor_performance *perf;
334 struct drv_cmd cmd;
335
336 if (unlikely(cpumask_empty(mask)))
337 return 0;
338
339 switch (per_cpu(acfreq_data, cpumask_first(mask))->cpu_feature) {
340 case SYSTEM_INTEL_MSR_CAPABLE:
341 cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
342 cmd.addr.msr.reg = MSR_IA32_PERF_CTL;
343 break;
344 case SYSTEM_AMD_MSR_CAPABLE:
345 cmd.type = SYSTEM_AMD_MSR_CAPABLE;
346 cmd.addr.msr.reg = MSR_AMD_PERF_CTL;
347 break;
348 case SYSTEM_IO_CAPABLE:
349 cmd.type = SYSTEM_IO_CAPABLE;
350 perf = per_cpu(acfreq_data, cpumask_first(mask))->acpi_data;
351 cmd.addr.io.port = perf->control_register.address;
352 cmd.addr.io.bit_width = perf->control_register.bit_width;
353 break;
354 default:
355 return 0;
356 }
357
358 cmd.mask = mask;
359 drv_read(&cmd);
360
361 pr_debug("get_cur_val = %u\n", cmd.val);
362
363 return cmd.val;
364}
365
366static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
367{
368 struct acpi_cpufreq_data *data = per_cpu(acfreq_data, cpu);
369 unsigned int freq;
370 unsigned int cached_freq;
371
372 pr_debug("get_cur_freq_on_cpu (%d)\n", cpu);
373
374 if (unlikely(data == NULL ||
375 data->acpi_data == NULL || data->freq_table == NULL)) {
376 return 0;
377 }
378
379 cached_freq = data->freq_table[data->acpi_data->state].frequency;
380 freq = extract_freq(get_cur_val(cpumask_of(cpu)), data);
381 if (freq != cached_freq) {
382 /*
383 * The dreaded BIOS frequency change behind our back.
384 * Force set the frequency on next target call.
385 */
386 data->resume = 1;
387 }
388
389 pr_debug("cur freq = %u\n", freq);
390
391 return freq;
392}
393
394static unsigned int check_freqs(const struct cpumask *mask, unsigned int freq,
395 struct acpi_cpufreq_data *data)
396{
397 unsigned int cur_freq;
398 unsigned int i;
399
400 for (i = 0; i < 100; i++) {
401 cur_freq = extract_freq(get_cur_val(mask), data);
402 if (cur_freq == freq)
403 return 1;
404 udelay(10);
405 }
406 return 0;
407}
408
409static int acpi_cpufreq_target(struct cpufreq_policy *policy,
410 unsigned int index)
411{
412 struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
413 struct acpi_processor_performance *perf;
414 struct drv_cmd cmd;
415 unsigned int next_perf_state = 0; /* Index into perf table */
416 int result = 0;
417
418 if (unlikely(data == NULL ||
419 data->acpi_data == NULL || data->freq_table == NULL)) {
420 return -ENODEV;
421 }
422
423 perf = data->acpi_data;
424 next_perf_state = data->freq_table[index].driver_data;
425 if (perf->state == next_perf_state) {
426 if (unlikely(data->resume)) {
427 pr_debug("Called after resume, resetting to P%d\n",
428 next_perf_state);
429 data->resume = 0;
430 } else {
431 pr_debug("Already at target state (P%d)\n",
432 next_perf_state);
433 goto out;
434 }
435 }
436
437 switch (data->cpu_feature) {
438 case SYSTEM_INTEL_MSR_CAPABLE:
439 cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
440 cmd.addr.msr.reg = MSR_IA32_PERF_CTL;
441 cmd.val = (u32) perf->states[next_perf_state].control;
442 break;
443 case SYSTEM_AMD_MSR_CAPABLE:
444 cmd.type = SYSTEM_AMD_MSR_CAPABLE;
445 cmd.addr.msr.reg = MSR_AMD_PERF_CTL;
446 cmd.val = (u32) perf->states[next_perf_state].control;
447 break;
448 case SYSTEM_IO_CAPABLE:
449 cmd.type = SYSTEM_IO_CAPABLE;
450 cmd.addr.io.port = perf->control_register.address;
451 cmd.addr.io.bit_width = perf->control_register.bit_width;
452 cmd.val = (u32) perf->states[next_perf_state].control;
453 break;
454 default:
455 result = -ENODEV;
456 goto out;
457 }
458
459 /* cpufreq holds the hotplug lock, so we are safe from here on */
460 if (policy->shared_type != CPUFREQ_SHARED_TYPE_ANY)
461 cmd.mask = policy->cpus;
462 else
463 cmd.mask = cpumask_of(policy->cpu);
464
465 drv_write(&cmd);
466
467 if (acpi_pstate_strict) {
468 if (!check_freqs(cmd.mask, data->freq_table[index].frequency,
469 data)) {
470 pr_debug("acpi_cpufreq_target failed (%d)\n",
471 policy->cpu);
472 result = -EAGAIN;
473 }
474 }
475
476 if (!result)
477 perf->state = next_perf_state;
478
479out:
480 return result;
481}
482
483static unsigned long
484acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
485{
486 struct acpi_processor_performance *perf = data->acpi_data;
487
488 if (cpu_khz) {
489 /* search the closest match to cpu_khz */
490 unsigned int i;
491 unsigned long freq;
492 unsigned long freqn = perf->states[0].core_frequency * 1000;
493
494 for (i = 0; i < (perf->state_count-1); i++) {
495 freq = freqn;
496 freqn = perf->states[i+1].core_frequency * 1000;
497 if ((2 * cpu_khz) > (freqn + freq)) {
498 perf->state = i;
499 return freq;
500 }
501 }
502 perf->state = perf->state_count-1;
503 return freqn;
504 } else {
505 /* assume CPU is at P0... */
506 perf->state = 0;
507 return perf->states[0].core_frequency * 1000;
508 }
509}
510
511static void free_acpi_perf_data(void)
512{
513 unsigned int i;
514
515 /* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */
516 for_each_possible_cpu(i)
517 free_cpumask_var(per_cpu_ptr(acpi_perf_data, i)
518 ->shared_cpu_map);
519 free_percpu(acpi_perf_data);
520}
521
522static int boost_notify(struct notifier_block *nb, unsigned long action,
523 void *hcpu)
524{
525 unsigned cpu = (long)hcpu;
526 const struct cpumask *cpumask;
527
528 cpumask = get_cpu_mask(cpu);
529
530 /*
531 * Clear the boost-disable bit on the CPU_DOWN path so that
532 * this cpu cannot block the remaining ones from boosting. On
533 * the CPU_UP path we simply keep the boost-disable flag in
534 * sync with the current global state.
535 */
536
537 switch (action) {
538 case CPU_UP_PREPARE:
539 case CPU_UP_PREPARE_FROZEN:
540 boost_set_msrs(acpi_cpufreq_driver.boost_enabled, cpumask);
541 break;
542
543 case CPU_DOWN_PREPARE:
544 case CPU_DOWN_PREPARE_FROZEN:
545 boost_set_msrs(1, cpumask);
546 break;
547
548 default:
549 break;
550 }
551
552 return NOTIFY_OK;
553}
554
555
556static struct notifier_block boost_nb = {
557 .notifier_call = boost_notify,
558};
559
560/*
561 * acpi_cpufreq_early_init - initialize ACPI P-States library
562 *
563 * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c)
564 * in order to determine correct frequency and voltage pairings. We can
565 * do _PDC and _PSD and find out the processor dependency for the
566 * actual init that will happen later...
567 */
568static int __init acpi_cpufreq_early_init(void)
569{
570 unsigned int i;
571 pr_debug("acpi_cpufreq_early_init\n");
572
573 acpi_perf_data = alloc_percpu(struct acpi_processor_performance);
574 if (!acpi_perf_data) {
575 pr_debug("Memory allocation error for acpi_perf_data.\n");
576 return -ENOMEM;
577 }
578 for_each_possible_cpu(i) {
579 if (!zalloc_cpumask_var_node(
580 &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map,
581 GFP_KERNEL, cpu_to_node(i))) {
582
583 /* Freeing a NULL pointer is OK: alloc_percpu zeroes. */
584 free_acpi_perf_data();
585 return -ENOMEM;
586 }
587 }
588
589 /* Do initialization in ACPI core */
590 acpi_processor_preregister_performance(acpi_perf_data);
591 return 0;
592}
593
594#ifdef CONFIG_SMP
595/*
596 * Some BIOSes do SW_ANY coordination internally, either set it up in hw
597 * or do it in BIOS firmware and won't inform about it to OS. If not
598 * detected, this has a side effect of making CPU run at a different speed
599 * than OS intended it to run at. Detect it and handle it cleanly.
600 */
601static int bios_with_sw_any_bug;
602
603static int sw_any_bug_found(const struct dmi_system_id *d)
604{
605 bios_with_sw_any_bug = 1;
606 return 0;
607}
608
609static const struct dmi_system_id sw_any_bug_dmi_table[] = {
610 {
611 .callback = sw_any_bug_found,
612 .ident = "Supermicro Server X6DLP",
613 .matches = {
614 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
615 DMI_MATCH(DMI_BIOS_VERSION, "080010"),
616 DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"),
617 },
618 },
619 { }
620};
621
622static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c)
623{
624 /* Intel Xeon Processor 7100 Series Specification Update
625 * http://www.intel.com/Assets/PDF/specupdate/314554.pdf
626 * AL30: A Machine Check Exception (MCE) Occurring during an
627 * Enhanced Intel SpeedStep Technology Ratio Change May Cause
628 * Both Processor Cores to Lock Up. */
629 if (c->x86_vendor == X86_VENDOR_INTEL) {
630 if ((c->x86 == 15) &&
631 (c->x86_model == 6) &&
632 (c->x86_mask == 8)) {
633 printk(KERN_INFO "acpi-cpufreq: Intel(R) "
634 "Xeon(R) 7100 Errata AL30, processors may "
635 "lock up on frequency changes: disabling "
636 "acpi-cpufreq.\n");
637 return -ENODEV;
638 }
639 }
640 return 0;
641}
642#endif
643
644static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
645{
646 unsigned int i;
647 unsigned int valid_states = 0;
648 unsigned int cpu = policy->cpu;
649 struct acpi_cpufreq_data *data;
650 unsigned int result = 0;
651 struct cpuinfo_x86 *c = &cpu_data(policy->cpu);
652 struct acpi_processor_performance *perf;
653#ifdef CONFIG_SMP
654 static int blacklisted;
655#endif
656
657 pr_debug("acpi_cpufreq_cpu_init\n");
658
659#ifdef CONFIG_SMP
660 if (blacklisted)
661 return blacklisted;
662 blacklisted = acpi_cpufreq_blacklist(c);
663 if (blacklisted)
664 return blacklisted;
665#endif
666
667 data = kzalloc(sizeof(*data), GFP_KERNEL);
668 if (!data)
669 return -ENOMEM;
670
671 if (!zalloc_cpumask_var(&data->freqdomain_cpus, GFP_KERNEL)) {
672 result = -ENOMEM;
673 goto err_free;
674 }
675
676 data->acpi_data = per_cpu_ptr(acpi_perf_data, cpu);
677 per_cpu(acfreq_data, cpu) = data;
678
679 if (cpu_has(c, X86_FEATURE_CONSTANT_TSC))
680 acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS;
681
682 result = acpi_processor_register_performance(data->acpi_data, cpu);
683 if (result)
684 goto err_free_mask;
685
686 perf = data->acpi_data;
687 policy->shared_type = perf->shared_type;
688
689 /*
690 * Will let policy->cpus know about dependency only when software
691 * coordination is required.
692 */
693 if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL ||
694 policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
695 cpumask_copy(policy->cpus, perf->shared_cpu_map);
696 }
697 cpumask_copy(data->freqdomain_cpus, perf->shared_cpu_map);
698
699#ifdef CONFIG_SMP
700 dmi_check_system(sw_any_bug_dmi_table);
701 if (bios_with_sw_any_bug && !policy_is_shared(policy)) {
702 policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
703 cpumask_copy(policy->cpus, cpu_core_mask(cpu));
704 }
705
706 if (check_amd_hwpstate_cpu(cpu) && !acpi_pstate_strict) {
707 cpumask_clear(policy->cpus);
708 cpumask_set_cpu(cpu, policy->cpus);
709 cpumask_copy(data->freqdomain_cpus, cpu_sibling_mask(cpu));
710 policy->shared_type = CPUFREQ_SHARED_TYPE_HW;
711 pr_info_once(PFX "overriding BIOS provided _PSD data\n");
712 }
713#endif
714
715 /* capability check */
716 if (perf->state_count <= 1) {
717 pr_debug("No P-States\n");
718 result = -ENODEV;
719 goto err_unreg;
720 }
721
722 if (perf->control_register.space_id != perf->status_register.space_id) {
723 result = -ENODEV;
724 goto err_unreg;
725 }
726
727 switch (perf->control_register.space_id) {
728 case ACPI_ADR_SPACE_SYSTEM_IO:
729 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
730 boot_cpu_data.x86 == 0xf) {
731 pr_debug("AMD K8 systems must use native drivers.\n");
732 result = -ENODEV;
733 goto err_unreg;
734 }
735 pr_debug("SYSTEM IO addr space\n");
736 data->cpu_feature = SYSTEM_IO_CAPABLE;
737 break;
738 case ACPI_ADR_SPACE_FIXED_HARDWARE:
739 pr_debug("HARDWARE addr space\n");
740 if (check_est_cpu(cpu)) {
741 data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE;
742 break;
743 }
744 if (check_amd_hwpstate_cpu(cpu)) {
745 data->cpu_feature = SYSTEM_AMD_MSR_CAPABLE;
746 break;
747 }
748 result = -ENODEV;
749 goto err_unreg;
750 default:
751 pr_debug("Unknown addr space %d\n",
752 (u32) (perf->control_register.space_id));
753 result = -ENODEV;
754 goto err_unreg;
755 }
756
757 data->freq_table = kzalloc(sizeof(*data->freq_table) *
758 (perf->state_count+1), GFP_KERNEL);
759 if (!data->freq_table) {
760 result = -ENOMEM;
761 goto err_unreg;
762 }
763
764 /* detect transition latency */
765 policy->cpuinfo.transition_latency = 0;
766 for (i = 0; i < perf->state_count; i++) {
767 if ((perf->states[i].transition_latency * 1000) >
768 policy->cpuinfo.transition_latency)
769 policy->cpuinfo.transition_latency =
770 perf->states[i].transition_latency * 1000;
771 }
772
773 /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */
774 if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE &&
775 policy->cpuinfo.transition_latency > 20 * 1000) {
776 policy->cpuinfo.transition_latency = 20 * 1000;
777 printk_once(KERN_INFO
778 "P-state transition latency capped at 20 uS\n");
779 }
780
781 /* table init */
782 for (i = 0; i < perf->state_count; i++) {
783 if (i > 0 && perf->states[i].core_frequency >=
784 data->freq_table[valid_states-1].frequency / 1000)
785 continue;
786
787 data->freq_table[valid_states].driver_data = i;
788 data->freq_table[valid_states].frequency =
789 perf->states[i].core_frequency * 1000;
790 valid_states++;
791 }
792 data->freq_table[valid_states].frequency = CPUFREQ_TABLE_END;
793 perf->state = 0;
794
795 result = cpufreq_table_validate_and_show(policy, data->freq_table);
796 if (result)
797 goto err_freqfree;
798
799 if (perf->states[0].core_frequency * 1000 != policy->cpuinfo.max_freq)
800 printk(KERN_WARNING FW_WARN "P-state 0 is not max freq\n");
801
802 switch (perf->control_register.space_id) {
803 case ACPI_ADR_SPACE_SYSTEM_IO:
804 /*
805 * The core will not set policy->cur, because
806 * cpufreq_driver->get is NULL, so we need to set it here.
807 * However, we have to guess it, because the current speed is
808 * unknown and not detectable via IO ports.
809 */
810 policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu);
811 break;
812 case ACPI_ADR_SPACE_FIXED_HARDWARE:
813 acpi_cpufreq_driver.get = get_cur_freq_on_cpu;
814 break;
815 default:
816 break;
817 }
818
819 /* notify BIOS that we exist */
820 acpi_processor_notify_smm(THIS_MODULE);
821
822 pr_debug("CPU%u - ACPI performance management activated.\n", cpu);
823 for (i = 0; i < perf->state_count; i++)
824 pr_debug(" %cP%d: %d MHz, %d mW, %d uS\n",
825 (i == perf->state ? '*' : ' '), i,
826 (u32) perf->states[i].core_frequency,
827 (u32) perf->states[i].power,
828 (u32) perf->states[i].transition_latency);
829
830 /*
831 * the first call to ->target() should result in us actually
832 * writing something to the appropriate registers.
833 */
834 data->resume = 1;
835
836 return result;
837
838err_freqfree:
839 kfree(data->freq_table);
840err_unreg:
841 acpi_processor_unregister_performance(perf, cpu);
842err_free_mask:
843 free_cpumask_var(data->freqdomain_cpus);
844err_free:
845 kfree(data);
846 per_cpu(acfreq_data, cpu) = NULL;
847
848 return result;
849}
850
851static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy)
852{
853 struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
854
855 pr_debug("acpi_cpufreq_cpu_exit\n");
856
857 if (data) {
858 per_cpu(acfreq_data, policy->cpu) = NULL;
859 acpi_processor_unregister_performance(data->acpi_data,
860 policy->cpu);
861 free_cpumask_var(data->freqdomain_cpus);
862 kfree(data->freq_table);
863 kfree(data);
864 }
865
866 return 0;
867}
868
869static int acpi_cpufreq_resume(struct cpufreq_policy *policy)
870{
871 struct acpi_cpufreq_data *data = per_cpu(acfreq_data, policy->cpu);
872
873 pr_debug("acpi_cpufreq_resume\n");
874
875 data->resume = 1;
876
877 return 0;
878}
879
880static struct freq_attr *acpi_cpufreq_attr[] = {
881 &cpufreq_freq_attr_scaling_available_freqs,
882 &freqdomain_cpus,
883 NULL, /* this is a placeholder for cpb, do not remove */
884 NULL,
885};
886
887static struct cpufreq_driver acpi_cpufreq_driver = {
888 .verify = cpufreq_generic_frequency_table_verify,
889 .target_index = acpi_cpufreq_target,
890 .bios_limit = acpi_processor_get_bios_limit,
891 .init = acpi_cpufreq_cpu_init,
892 .exit = acpi_cpufreq_cpu_exit,
893 .resume = acpi_cpufreq_resume,
894 .name = "acpi-cpufreq",
895 .attr = acpi_cpufreq_attr,
896 .set_boost = _store_boost,
897};
898
899static void __init acpi_cpufreq_boost_init(void)
900{
901 if (boot_cpu_has(X86_FEATURE_CPB) || boot_cpu_has(X86_FEATURE_IDA)) {
902 msrs = msrs_alloc();
903
904 if (!msrs)
905 return;
906
907 acpi_cpufreq_driver.boost_supported = true;
908 acpi_cpufreq_driver.boost_enabled = boost_state(0);
909
910 cpu_notifier_register_begin();
911
912 /* Force all MSRs to the same value */
913 boost_set_msrs(acpi_cpufreq_driver.boost_enabled,
914 cpu_online_mask);
915
916 __register_cpu_notifier(&boost_nb);
917
918 cpu_notifier_register_done();
919 }
920}
921
922static void acpi_cpufreq_boost_exit(void)
923{
924 if (msrs) {
925 unregister_cpu_notifier(&boost_nb);
926
927 msrs_free(msrs);
928 msrs = NULL;
929 }
930}
931
932static int __init acpi_cpufreq_init(void)
933{
934 int ret;
935
936 if (acpi_disabled)
937 return -ENODEV;
938
939 /* don't keep reloading if cpufreq_driver exists */
940 if (cpufreq_get_current_driver())
941 return -EEXIST;
942
943 pr_debug("acpi_cpufreq_init\n");
944
945 ret = acpi_cpufreq_early_init();
946 if (ret)
947 return ret;
948
949#ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
950 /* this is a sysfs file with a strange name and an even stranger
951 * semantic - per CPU instantiation, but system global effect.
952 * Lets enable it only on AMD CPUs for compatibility reasons and
953 * only if configured. This is considered legacy code, which
954 * will probably be removed at some point in the future.
955 */
956 if (check_amd_hwpstate_cpu(0)) {
957 struct freq_attr **iter;
958
959 pr_debug("adding sysfs entry for cpb\n");
960
961 for (iter = acpi_cpufreq_attr; *iter != NULL; iter++)
962 ;
963
964 /* make sure there is a terminator behind it */
965 if (iter[1] == NULL)
966 *iter = &cpb;
967 }
968#endif
969 acpi_cpufreq_boost_init();
970
971 ret = cpufreq_register_driver(&acpi_cpufreq_driver);
972 if (ret) {
973 free_acpi_perf_data();
974 acpi_cpufreq_boost_exit();
975 }
976 return ret;
977}
978
979static void __exit acpi_cpufreq_exit(void)
980{
981 pr_debug("acpi_cpufreq_exit\n");
982
983 acpi_cpufreq_boost_exit();
984
985 cpufreq_unregister_driver(&acpi_cpufreq_driver);
986
987 free_acpi_perf_data();
988}
989
990module_param(acpi_pstate_strict, uint, 0644);
991MODULE_PARM_DESC(acpi_pstate_strict,
992 "value 0 or non-zero. non-zero -> strict ACPI checks are "
993 "performed during frequency changes.");
994
995late_initcall(acpi_cpufreq_init);
996module_exit(acpi_cpufreq_exit);
997
998static const struct x86_cpu_id acpi_cpufreq_ids[] = {
999 X86_FEATURE_MATCH(X86_FEATURE_ACPI),
1000 X86_FEATURE_MATCH(X86_FEATURE_HW_PSTATE),
1001 {}
1002};
1003MODULE_DEVICE_TABLE(x86cpu, acpi_cpufreq_ids);
1004
1005static const struct acpi_device_id processor_device_ids[] = {
1006 {ACPI_PROCESSOR_OBJECT_HID, },
1007 {ACPI_PROCESSOR_DEVICE_HID, },
1008 {},
1009};
1010MODULE_DEVICE_TABLE(acpi, processor_device_ids);
1011
1012MODULE_ALIAS("acpi");