1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * Common boot and setup code for both 32-bit and 64-bit.
  4 * Extracted from arch/powerpc/kernel/setup_64.c.
  5 *
  6 * Copyright (C) 2001 PPC64 Team, IBM Corp
 
 
 
 
 
  7 */
  8
  9#undef DEBUG
 10
 11#include <linux/export.h>
 12#include <linux/panic_notifier.h>
 13#include <linux/string.h>
 14#include <linux/sched.h>
 15#include <linux/init.h>
 16#include <linux/kernel.h>
 17#include <linux/reboot.h>
 18#include <linux/delay.h>
 19#include <linux/initrd.h>
 20#include <linux/platform_device.h>
 21#include <linux/printk.h>
 22#include <linux/seq_file.h>
 23#include <linux/ioport.h>
 24#include <linux/console.h>
 
 25#include <linux/root_dev.h>
 
 26#include <linux/cpu.h>
 27#include <linux/unistd.h>
 28#include <linux/seq_buf.h>
 29#include <linux/serial.h>
 30#include <linux/serial_8250.h>
 
 31#include <linux/percpu.h>
 32#include <linux/memblock.h>
 33#include <linux/of.h>
 34#include <linux/of_fdt.h>
 35#include <linux/of_irq.h>
 36#include <linux/hugetlb.h>
 37#include <linux/pgtable.h>
 38#include <asm/io.h>
 39#include <asm/paca.h>
 
 40#include <asm/processor.h>
 41#include <asm/vdso_datapage.h>
 
 42#include <asm/smp.h>
 43#include <asm/elf.h>
 44#include <asm/machdep.h>
 45#include <asm/time.h>
 46#include <asm/cputable.h>
 47#include <asm/sections.h>
 48#include <asm/firmware.h>
 49#include <asm/btext.h>
 50#include <asm/nvram.h>
 51#include <asm/setup.h>
 52#include <asm/rtas.h>
 53#include <asm/iommu.h>
 54#include <asm/serial.h>
 55#include <asm/cache.h>
 56#include <asm/page.h>
 57#include <asm/mmu.h>
 58#include <asm/xmon.h>
 59#include <asm/cputhreads.h>
 60#include <mm/mmu_decl.h>
 61#include <asm/archrandom.h>
 62#include <asm/fadump.h>
 63#include <asm/udbg.h>
 64#include <asm/hugetlb.h>
 65#include <asm/livepatch.h>
 66#include <asm/mmu_context.h>
 67#include <asm/cpu_has_feature.h>
 68#include <asm/kasan.h>
 69#include <asm/mce.h>
 70
 71#include "setup.h"
 72
 73#ifdef DEBUG
 
 74#define DBG(fmt...) udbg_printf(fmt)
 75#else
 76#define DBG(fmt...)
 77#endif
 78
 79/* The main machine-dep calls structure
 80 */
 81struct machdep_calls ppc_md;
 82EXPORT_SYMBOL(ppc_md);
 83struct machdep_calls *machine_id;
 84EXPORT_SYMBOL(machine_id);
 85
 86int boot_cpuid = -1;
 87EXPORT_SYMBOL_GPL(boot_cpuid);
 88
 89#ifdef CONFIG_PPC64
 90int boot_cpu_hwid = -1;
 91#endif
 92
 93/*
 94 * These are used in binfmt_elf.c to put aux entries on the stack
 95 * for each elf executable being started.
 96 */
 97int dcache_bsize;
 98int icache_bsize;
 
 
 
 
 
 99
100/* Variables required to store legacy IO irq routing */
101int of_i8042_kbd_irq;
102EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
103int of_i8042_aux_irq;
104EXPORT_SYMBOL_GPL(of_i8042_aux_irq);
105
106#ifdef __DO_IRQ_CANON
107/* XXX should go elsewhere eventually */
108int ppc_do_canonicalize_irqs;
109EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
110#endif
111
112#ifdef CONFIG_CRASH_CORE
113/* This keeps a track of which one is the crashing cpu. */
114int crashing_cpu = -1;
115#endif
116
117/* also used by kexec */
118void machine_shutdown(void)
119{
 
120	/*
121	 * if fadump is active, cleanup the fadump registration before we
122	 * shutdown.
123	 */
124	fadump_cleanup();
 
125
126	if (ppc_md.machine_shutdown)
127		ppc_md.machine_shutdown();
128}
129
130static void machine_hang(void)
131{
132	pr_emerg("System Halted, OK to turn off power\n");
133	local_irq_disable();
134	while (1)
135		;
136}
137
138void machine_restart(char *cmd)
139{
140	machine_shutdown();
141	if (ppc_md.restart)
142		ppc_md.restart(cmd);
143
144	smp_send_stop();
145
146	do_kernel_restart(cmd);
147	mdelay(1000);
148
149	machine_hang();
150}
151
152void machine_power_off(void)
153{
154	machine_shutdown();
155	do_kernel_power_off();
 
 
156	smp_send_stop();
157	machine_hang();
 
 
 
158}
159/* Used by the G5 thermal driver */
160EXPORT_SYMBOL_GPL(machine_power_off);
161
162void (*pm_power_off)(void);
163EXPORT_SYMBOL_GPL(pm_power_off);
164
165size_t __must_check arch_get_random_seed_longs(unsigned long *v, size_t max_longs)
166{
167	if (max_longs && ppc_md.get_random_seed && ppc_md.get_random_seed(v))
168		return 1;
169	return 0;
170}
171EXPORT_SYMBOL(arch_get_random_seed_longs);
172
173void machine_halt(void)
174{
175	machine_shutdown();
176	if (ppc_md.halt)
177		ppc_md.halt();
178
179	smp_send_stop();
180	machine_hang();
 
 
 
181}
182
 
 
 
 
 
 
183#ifdef CONFIG_SMP
184DEFINE_PER_CPU(unsigned int, cpu_pvr);
185#endif
186
187static void show_cpuinfo_summary(struct seq_file *m)
188{
189	struct device_node *root;
190	const char *model = NULL;
 
191	unsigned long bogosum = 0;
192	int i;
193
194	if (IS_ENABLED(CONFIG_SMP) && IS_ENABLED(CONFIG_PPC32)) {
195		for_each_online_cpu(i)
196			bogosum += loops_per_jiffy;
197		seq_printf(m, "total bogomips\t: %lu.%02lu\n",
198			   bogosum / (500000 / HZ), bogosum / (5000 / HZ) % 100);
199	}
200	seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
201	if (ppc_md.name)
202		seq_printf(m, "platform\t: %s\n", ppc_md.name);
203	root = of_find_node_by_path("/");
204	if (root)
205		model = of_get_property(root, "model", NULL);
206	if (model)
207		seq_printf(m, "model\t\t: %s\n", model);
208	of_node_put(root);
209
210	if (ppc_md.show_cpuinfo != NULL)
211		ppc_md.show_cpuinfo(m);
212
 
213	/* Display the amount of memory */
214	if (IS_ENABLED(CONFIG_PPC32))
215		seq_printf(m, "Memory\t\t: %d MB\n",
216			   (unsigned int)(total_memory / (1024 * 1024)));
217}
218
219static int show_cpuinfo(struct seq_file *m, void *v)
220{
221	unsigned long cpu_id = (unsigned long)v - 1;
222	unsigned int pvr;
223	unsigned long proc_freq;
224	unsigned short maj;
225	unsigned short min;
226
 
 
 
 
 
 
 
 
227#ifdef CONFIG_SMP
228	pvr = per_cpu(cpu_pvr, cpu_id);
229#else
230	pvr = mfspr(SPRN_PVR);
231#endif
232	maj = (pvr >> 8) & 0xFF;
233	min = pvr & 0xFF;
234
235	seq_printf(m, "processor\t: %lu\ncpu\t\t: ", cpu_id);
 
236
237	if (cur_cpu_spec->pvr_mask && cur_cpu_spec->cpu_name)
238		seq_puts(m, cur_cpu_spec->cpu_name);
239	else
240		seq_printf(m, "unknown (%08x)", pvr);
241
 
242	if (cpu_has_feature(CPU_FTR_ALTIVEC))
243		seq_puts(m, ", altivec supported");
 
244
245	seq_putc(m, '\n');
246
247#ifdef CONFIG_TAU
248	if (cpu_has_feature(CPU_FTR_TAU)) {
249		if (IS_ENABLED(CONFIG_TAU_AVERAGE)) {
250			/* more straightforward, but potentially misleading */
251			seq_printf(m,  "temperature \t: %u C (uncalibrated)\n",
252				   cpu_temp(cpu_id));
253		} else {
254			/* show the actual temp sensor range */
255			u32 temp;
256			temp = cpu_temp_both(cpu_id);
257			seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
258				   temp & 0xff, temp >> 16);
259		}
260	}
261#endif /* CONFIG_TAU */
262
263	/*
264	 * Platforms that have variable clock rates, should implement
265	 * the method ppc_md.get_proc_freq() that reports the clock
266	 * rate of a given cpu. The rest can use ppc_proc_freq to
267	 * report the clock rate that is same across all cpus.
268	 */
269	if (ppc_md.get_proc_freq)
270		proc_freq = ppc_md.get_proc_freq(cpu_id);
271	else
272		proc_freq = ppc_proc_freq;
273
274	if (proc_freq)
275		seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
276			   proc_freq / 1000000, proc_freq % 1000000);
 
 
 
277
278	/* If we are a Freescale core do a simple check so
279	 * we don't have to keep adding cases in the future */
280	if (PVR_VER(pvr) & 0x8000) {
281		switch (PVR_VER(pvr)) {
282		case 0x8000:	/* 7441/7450/7451, Voyager */
283		case 0x8001:	/* 7445/7455, Apollo 6 */
284		case 0x8002:	/* 7447/7457, Apollo 7 */
285		case 0x8003:	/* 7447A, Apollo 7 PM */
286		case 0x8004:	/* 7448, Apollo 8 */
287		case 0x800c:	/* 7410, Nitro */
288			maj = ((pvr >> 8) & 0xF);
289			min = PVR_MIN(pvr);
290			break;
291		default:	/* e500/book-e */
292			maj = PVR_MAJ(pvr);
293			min = PVR_MIN(pvr);
294			break;
295		}
296	} else {
297		switch (PVR_VER(pvr)) {
 
 
 
 
298			case 0x1008:	/* 740P/750P ?? */
299				maj = ((pvr >> 8) & 0xFF) - 1;
300				min = pvr & 0xFF;
301				break;
302			case 0x004e: /* POWER9 bits 12-15 give chip type */
303			case 0x0080: /* POWER10 bit 12 gives SMT8/4 */
304				maj = (pvr >> 8) & 0x0F;
305				min = pvr & 0xFF;
306				break;
307			default:
308				maj = (pvr >> 8) & 0xFF;
309				min = pvr & 0xFF;
310				break;
311		}
312	}
313
314	seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
315		   maj, min, PVR_VER(pvr), PVR_REV(pvr));
316
317	if (IS_ENABLED(CONFIG_PPC32))
318		seq_printf(m, "bogomips\t: %lu.%02lu\n", loops_per_jiffy / (500000 / HZ),
319			   (loops_per_jiffy / (5000 / HZ)) % 100);
 
 
320
321	seq_putc(m, '\n');
 
 
 
 
322
323	/* If this is the last cpu, print the summary */
324	if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
325		show_cpuinfo_summary(m);
326
327	return 0;
328}
329
330static void *c_start(struct seq_file *m, loff_t *pos)
331{
332	if (*pos == 0)	/* just in case, cpu 0 is not the first */
333		*pos = cpumask_first(cpu_online_mask);
334	else
335		*pos = cpumask_next(*pos - 1, cpu_online_mask);
336	if ((*pos) < nr_cpu_ids)
337		return (void *)(unsigned long)(*pos + 1);
338	return NULL;
339}
340
341static void *c_next(struct seq_file *m, void *v, loff_t *pos)
342{
343	(*pos)++;
344	return c_start(m, pos);
345}
346
347static void c_stop(struct seq_file *m, void *v)
348{
349}
350
351const struct seq_operations cpuinfo_op = {
352	.start	= c_start,
353	.next	= c_next,
354	.stop	= c_stop,
355	.show	= show_cpuinfo,
356};
357
358void __init check_for_initrd(void)
359{
360#ifdef CONFIG_BLK_DEV_INITRD
361	DBG(" -> check_for_initrd()  initrd_start=0x%lx  initrd_end=0x%lx\n",
362	    initrd_start, initrd_end);
363
364	/* If we were passed an initrd, set the ROOT_DEV properly if the values
365	 * look sensible. If not, clear initrd reference.
366	 */
367	if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
368	    initrd_end > initrd_start)
369		ROOT_DEV = Root_RAM0;
370	else
371		initrd_start = initrd_end = 0;
372
373	if (initrd_start)
374		pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
375
376	DBG(" <- check_for_initrd()\n");
377#endif /* CONFIG_BLK_DEV_INITRD */
378}
379
380#ifdef CONFIG_SMP
381
382int threads_per_core, threads_per_subcore, threads_shift __read_mostly;
383cpumask_t threads_core_mask __read_mostly;
384EXPORT_SYMBOL_GPL(threads_per_core);
385EXPORT_SYMBOL_GPL(threads_per_subcore);
386EXPORT_SYMBOL_GPL(threads_shift);
387EXPORT_SYMBOL_GPL(threads_core_mask);
388
389static void __init cpu_init_thread_core_maps(int tpc)
390{
391	int i;
392
393	threads_per_core = tpc;
394	threads_per_subcore = tpc;
395	cpumask_clear(&threads_core_mask);
396
397	/* This implementation only supports power of 2 number of threads
398	 * for simplicity and performance
399	 */
400	threads_shift = ilog2(tpc);
401	BUG_ON(tpc != (1 << threads_shift));
402
403	for (i = 0; i < tpc; i++)
404		cpumask_set_cpu(i, &threads_core_mask);
405
406	printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
407	       tpc, tpc > 1 ? "s" : "");
408	printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
409}
410
411
412u32 *cpu_to_phys_id = NULL;
413
414/**
415 * setup_cpu_maps - initialize the following cpu maps:
416 *                  cpu_possible_mask
417 *                  cpu_present_mask
418 *
419 * Having the possible map set up early allows us to restrict allocations
420 * of things like irqstacks to nr_cpu_ids rather than NR_CPUS.
421 *
422 * We do not initialize the online map here; cpus set their own bits in
423 * cpu_online_mask as they come up.
424 *
425 * This function is valid only for Open Firmware systems.  finish_device_tree
426 * must be called before using this.
427 *
428 * While we're here, we may as well set the "physical" cpu ids in the paca.
429 *
430 * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
431 */
432void __init smp_setup_cpu_maps(void)
433{
434	struct device_node *dn;
435	int cpu = 0;
436	int nthreads = 1;
437
438	DBG("smp_setup_cpu_maps()\n");
439
440	cpu_to_phys_id = memblock_alloc(nr_cpu_ids * sizeof(u32),
441					__alignof__(u32));
442	if (!cpu_to_phys_id)
443		panic("%s: Failed to allocate %zu bytes align=0x%zx\n",
444		      __func__, nr_cpu_ids * sizeof(u32), __alignof__(u32));
445
446	for_each_node_by_type(dn, "cpu") {
447		const __be32 *intserv;
448		__be32 cpu_be;
449		int j, len;
450
451		DBG("  * %pOF...\n", dn);
452
453		intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
454				&len);
455		if (intserv) {
456			DBG("    ibm,ppc-interrupt-server#s -> %lu threads\n",
457			    (len / sizeof(int)));
 
458		} else {
459			DBG("    no ibm,ppc-interrupt-server#s -> 1 thread\n");
460			intserv = of_get_property(dn, "reg", &len);
461			if (!intserv) {
462				cpu_be = cpu_to_be32(cpu);
463				/* XXX: what is this? uninitialized?? */
464				intserv = &cpu_be;	/* assume logical == phys */
465				len = 4;
466			}
467		}
468
469		nthreads = len / sizeof(int);
470
471		for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
472			bool avail;
473
474			DBG("    thread %d -> cpu %d (hard id %d)\n",
475			    j, cpu, be32_to_cpu(intserv[j]));
476
477			avail = of_device_is_available(dn);
478			if (!avail)
479				avail = !of_property_match_string(dn,
480						"enable-method", "spin-table");
481
482			set_cpu_present(cpu, avail);
483			set_cpu_possible(cpu, true);
484			cpu_to_phys_id[cpu] = be32_to_cpu(intserv[j]);
485			cpu++;
486		}
487
488		if (cpu >= nr_cpu_ids) {
489			of_node_put(dn);
490			break;
491		}
492	}
493
494	/* If no SMT supported, nthreads is forced to 1 */
495	if (!cpu_has_feature(CPU_FTR_SMT)) {
496		DBG("  SMT disabled ! nthreads forced to 1\n");
497		nthreads = 1;
498	}
499
500#ifdef CONFIG_PPC64
501	/*
502	 * On pSeries LPAR, we need to know how many cpus
503	 * could possibly be added to this partition.
504	 */
505	if (firmware_has_feature(FW_FEATURE_LPAR) &&
506	    (dn = of_find_node_by_path("/rtas"))) {
507		int num_addr_cell, num_size_cell, maxcpus;
508		const __be32 *ireg;
509
510		num_addr_cell = of_n_addr_cells(dn);
511		num_size_cell = of_n_size_cells(dn);
512
513		ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
514
515		if (!ireg)
516			goto out;
517
518		maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell);
519
520		/* Double maxcpus for processors which have SMT capability */
521		if (cpu_has_feature(CPU_FTR_SMT))
522			maxcpus *= nthreads;
523
524		if (maxcpus > nr_cpu_ids) {
525			printk(KERN_WARNING
526			       "Partition configured for %d cpus, "
527			       "operating system maximum is %u.\n",
528			       maxcpus, nr_cpu_ids);
529			maxcpus = nr_cpu_ids;
530		} else
531			printk(KERN_INFO "Partition configured for %d cpus.\n",
532			       maxcpus);
533
534		for (cpu = 0; cpu < maxcpus; cpu++)
535			set_cpu_possible(cpu, true);
536	out:
537		of_node_put(dn);
538	}
539	vdso_data->processorCount = num_present_cpus();
540#endif /* CONFIG_PPC64 */
541
542        /* Initialize CPU <=> thread mapping/
543	 *
544	 * WARNING: We assume that the number of threads is the same for
545	 * every CPU in the system. If that is not the case, then some code
546	 * here will have to be reworked
547	 */
548	cpu_init_thread_core_maps(nthreads);
549
550	/* Now that possible cpus are set, set nr_cpu_ids for later use */
551	setup_nr_cpu_ids();
552
553	free_unused_pacas();
554}
555#endif /* CONFIG_SMP */
556
557#ifdef CONFIG_PCSPKR_PLATFORM
558static __init int add_pcspkr(void)
559{
560	struct device_node *np;
561	struct platform_device *pd;
562	int ret;
563
564	np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
565	of_node_put(np);
566	if (!np)
567		return -ENODEV;
568
569	pd = platform_device_alloc("pcspkr", -1);
570	if (!pd)
571		return -ENOMEM;
572
573	ret = platform_device_add(pd);
574	if (ret)
575		platform_device_put(pd);
576
577	return ret;
578}
579device_initcall(add_pcspkr);
580#endif	/* CONFIG_PCSPKR_PLATFORM */
581
582static char ppc_hw_desc_buf[128] __initdata;
583
584struct seq_buf ppc_hw_desc __initdata = {
585	.buffer = ppc_hw_desc_buf,
586	.size = sizeof(ppc_hw_desc_buf),
587	.len = 0,
588};
589
590static __init void probe_machine(void)
591{
592	extern struct machdep_calls __machine_desc_start;
593	extern struct machdep_calls __machine_desc_end;
594	unsigned int i;
595
596	/*
597	 * Iterate all ppc_md structures until we find the proper
598	 * one for the current machine type
599	 */
600	DBG("Probing machine type ...\n");
601
602	/*
603	 * Check ppc_md is empty, if not we have a bug, ie, we setup an
604	 * entry before probe_machine() which will be overwritten
605	 */
606	for (i = 0; i < (sizeof(ppc_md) / sizeof(void *)); i++) {
607		if (((void **)&ppc_md)[i]) {
608			printk(KERN_ERR "Entry %d in ppc_md non empty before"
609			       " machine probe !\n", i);
610		}
611	}
612
613	for (machine_id = &__machine_desc_start;
614	     machine_id < &__machine_desc_end;
615	     machine_id++) {
616		DBG("  %s ...\n", machine_id->name);
617		if (machine_id->compatible && !of_machine_is_compatible(machine_id->compatible))
618			continue;
619		memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
620		if (ppc_md.probe && !ppc_md.probe())
621			continue;
622		DBG("   %s match !\n", machine_id->name);
623		break;
 
624	}
625	/* What can we do if we didn't find ? */
626	if (machine_id >= &__machine_desc_end) {
627		pr_err("No suitable machine description found !\n");
628		for (;;);
629	}
630
631	// Append the machine name to other info we've gathered
632	seq_buf_puts(&ppc_hw_desc, ppc_md.name);
633
634	// Set the generic hardware description shown in oopses
635	dump_stack_set_arch_desc(ppc_hw_desc.buffer);
636
637	pr_info("Hardware name: %s\n", ppc_hw_desc.buffer);
638}
639
640/* Match a class of boards, not a specific device configuration. */
641int check_legacy_ioport(unsigned long base_port)
642{
643	struct device_node *parent, *np = NULL;
644	int ret = -ENODEV;
645
646	switch(base_port) {
647	case I8042_DATA_REG:
648		if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
649			np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
650		if (np) {
651			parent = of_get_parent(np);
652
653			of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
654			if (!of_i8042_kbd_irq)
655				of_i8042_kbd_irq = 1;
656
657			of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
658			if (!of_i8042_aux_irq)
659				of_i8042_aux_irq = 12;
660
661			of_node_put(np);
662			np = parent;
663			break;
664		}
665		np = of_find_node_by_type(NULL, "8042");
666		/* Pegasos has no device_type on its 8042 node, look for the
667		 * name instead */
668		if (!np)
669			np = of_find_node_by_name(NULL, "8042");
670		if (np) {
671			of_i8042_kbd_irq = 1;
672			of_i8042_aux_irq = 12;
673		}
674		break;
675	case FDC_BASE: /* FDC1 */
676		np = of_find_node_by_type(NULL, "fdc");
677		break;
678	default:
679		/* ipmi is supposed to fail here */
680		break;
681	}
682	if (!np)
683		return ret;
684	parent = of_get_parent(np);
685	if (parent) {
686		if (of_node_is_type(parent, "isa"))
687			ret = 0;
688		of_node_put(parent);
689	}
690	of_node_put(np);
691	return ret;
692}
693EXPORT_SYMBOL(check_legacy_ioport);
694
695/*
696 * Panic notifiers setup
697 *
698 * We have 3 notifiers for powerpc, each one from a different "nature":
699 *
700 * - ppc_panic_fadump_handler() is a hypervisor notifier, which hard-disables
701 *   IRQs and deal with the Firmware-Assisted dump, when it is configured;
702 *   should run early in the panic path.
703 *
704 * - dump_kernel_offset() is an informative notifier, just showing the KASLR
705 *   offset if we have RANDOMIZE_BASE set.
706 *
707 * - ppc_panic_platform_handler() is a low-level handler that's registered
708 *   only if the platform wishes to perform final actions in the panic path,
709 *   hence it should run late and might not even return. Currently, only
710 *   pseries and ps3 platforms register callbacks.
711 */
712static int ppc_panic_fadump_handler(struct notifier_block *this,
713				    unsigned long event, void *ptr)
714{
715	/*
716	 * panic does a local_irq_disable, but we really
717	 * want interrupts to be hard disabled.
718	 */
719	hard_irq_disable();
720
721	/*
722	 * If firmware-assisted dump has been registered then trigger
723	 * its callback and let the firmware handles everything else.
724	 */
725	crash_fadump(NULL, ptr);
726
727	return NOTIFY_DONE;
728}
729
730static int dump_kernel_offset(struct notifier_block *self, unsigned long v,
731			      void *p)
732{
733	pr_emerg("Kernel Offset: 0x%lx from 0x%lx\n",
734		 kaslr_offset(), KERNELBASE);
735
736	return NOTIFY_DONE;
737}
738
739static int ppc_panic_platform_handler(struct notifier_block *this,
740				      unsigned long event, void *ptr)
741{
742	/*
743	 * This handler is only registered if we have a panic callback
744	 * on ppc_md, hence NULL check is not needed.
745	 * Also, it may not return, so it runs really late on panic path.
746	 */
747	ppc_md.panic(ptr);
748
749	return NOTIFY_DONE;
750}
751
752static struct notifier_block ppc_fadump_block = {
753	.notifier_call = ppc_panic_fadump_handler,
754	.priority = INT_MAX, /* run early, to notify the firmware ASAP */
755};
756
757static struct notifier_block kernel_offset_notifier = {
758	.notifier_call = dump_kernel_offset,
759};
760
761static struct notifier_block ppc_panic_block = {
762	.notifier_call = ppc_panic_platform_handler,
763	.priority = INT_MIN, /* may not return; must be done last */
764};
765
766void __init setup_panic(void)
767{
768	/* Hard-disables IRQs + deal with FW-assisted dump (fadump) */
769	atomic_notifier_chain_register(&panic_notifier_list,
770				       &ppc_fadump_block);
771
772	if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && kaslr_offset() > 0)
773		atomic_notifier_chain_register(&panic_notifier_list,
774					       &kernel_offset_notifier);
775
776	/* Low-level platform-specific routines that should run on panic */
777	if (ppc_md.panic)
778		atomic_notifier_chain_register(&panic_notifier_list,
779					       &ppc_panic_block);
780}
781
782#ifdef CONFIG_CHECK_CACHE_COHERENCY
783/*
784 * For platforms that have configurable cache-coherency.  This function
785 * checks that the cache coherency setting of the kernel matches the setting
786 * left by the firmware, as indicated in the device tree.  Since a mismatch
787 * will eventually result in DMA failures, we print * and error and call
788 * BUG() in that case.
789 */
790
791#define KERNEL_COHERENCY	(!IS_ENABLED(CONFIG_NOT_COHERENT_CACHE))
 
 
 
 
792
793static int __init check_cache_coherency(void)
794{
795	struct device_node *np;
796	const void *prop;
797	bool devtree_coherency;
798
799	np = of_find_node_by_path("/");
800	prop = of_get_property(np, "coherency-off", NULL);
801	of_node_put(np);
802
803	devtree_coherency = prop ? false : true;
804
805	if (devtree_coherency != KERNEL_COHERENCY) {
806		printk(KERN_ERR
807			"kernel coherency:%s != device tree_coherency:%s\n",
808			KERNEL_COHERENCY ? "on" : "off",
809			devtree_coherency ? "on" : "off");
810		BUG();
811	}
812
813	return 0;
814}
815
816late_initcall(check_cache_coherency);
817#endif /* CONFIG_CHECK_CACHE_COHERENCY */
818
819void ppc_printk_progress(char *s, unsigned short hex)
820{
821	pr_info("%s\n", s);
822}
823
824static __init void print_system_info(void)
825{
826	pr_info("-----------------------------------------------------\n");
827	pr_info("phys_mem_size     = 0x%llx\n",
828		(unsigned long long)memblock_phys_mem_size());
829
830	pr_info("dcache_bsize      = 0x%x\n", dcache_bsize);
831	pr_info("icache_bsize      = 0x%x\n", icache_bsize);
832
833	pr_info("cpu_features      = 0x%016lx\n", cur_cpu_spec->cpu_features);
834	pr_info("  possible        = 0x%016lx\n",
835		(unsigned long)CPU_FTRS_POSSIBLE);
836	pr_info("  always          = 0x%016lx\n",
837		(unsigned long)CPU_FTRS_ALWAYS);
838	pr_info("cpu_user_features = 0x%08x 0x%08x\n",
839		cur_cpu_spec->cpu_user_features,
840		cur_cpu_spec->cpu_user_features2);
841	pr_info("mmu_features      = 0x%08x\n", cur_cpu_spec->mmu_features);
842#ifdef CONFIG_PPC64
843	pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features);
844#ifdef CONFIG_PPC_BOOK3S
845	pr_info("vmalloc start     = 0x%lx\n", KERN_VIRT_START);
846	pr_info("IO start          = 0x%lx\n", KERN_IO_START);
847	pr_info("vmemmap start     = 0x%lx\n", (unsigned long)vmemmap);
848#endif
849#endif
850
851	if (!early_radix_enabled())
852		print_system_hash_info();
 
 
 
 
 
 
 
853
854	if (PHYSICAL_START > 0)
855		pr_info("physical_start    = 0x%llx\n",
856		       (unsigned long long)PHYSICAL_START);
857	pr_info("-----------------------------------------------------\n");
858}
 
859
860#ifdef CONFIG_SMP
861static void __init smp_setup_pacas(void)
862{
863	int cpu;
864
865	for_each_possible_cpu(cpu) {
866		if (cpu == smp_processor_id())
867			continue;
868		allocate_paca(cpu);
869		set_hard_smp_processor_id(cpu, cpu_to_phys_id[cpu]);
870	}
871
872	memblock_free(cpu_to_phys_id, nr_cpu_ids * sizeof(u32));
873	cpu_to_phys_id = NULL;
874}
875#endif
 
876
877/*
878 * Called into from start_kernel this initializes memblock, which is used
879 * to manage page allocation until mem_init is called.
880 */
881void __init setup_arch(char **cmdline_p)
882{
883	kasan_init();
884
885	*cmdline_p = boot_command_line;
886
887	/* Set a half-reasonable default so udelay does something sensible */
888	loops_per_jiffy = 500000000 / HZ;
889
890	/* Unflatten the device-tree passed by prom_init or kexec */
891	unflatten_device_tree();
892
893	/*
894	 * Initialize cache line/block info from device-tree (on ppc64) or
895	 * just cputable (on ppc32).
896	 */
897	initialize_cache_info();
898
899	/* Initialize RTAS if available. */
900	rtas_initialize();
901
902	/* Check if we have an initrd provided via the device-tree. */
903	check_for_initrd();
904
905	/* Probe the machine type, establish ppc_md. */
906	probe_machine();
907
908	/* Setup panic notifier if requested by the platform. */
909	setup_panic();
910
911	/*
912	 * Configure ppc_md.power_save (ppc32 only, 64-bit machines do
913	 * it from their respective probe() function.
914	 */
915	setup_power_save();
916
917	/* Discover standard serial ports. */
918	find_legacy_serial_ports();
919
920	/* Register early console with the printk subsystem. */
921	register_early_udbg_console();
922
923	/* Setup the various CPU maps based on the device-tree. */
924	smp_setup_cpu_maps();
925
926	/* Initialize xmon. */
927	xmon_setup();
928
929	/* Check the SMT related command line arguments (ppc64). */
930	check_smt_enabled();
931
932	/* Parse memory topology */
933	mem_topology_setup();
934	/* Set max_mapnr before paging_init() */
935	set_max_mapnr(max_pfn);
936
937	/*
938	 * Release secondary cpus out of their spinloops at 0x60 now that
939	 * we can map physical -> logical CPU ids.
940	 *
941	 * Freescale Book3e parts spin in a loop provided by firmware,
942	 * so smp_release_cpus() does nothing for them.
943	 */
944#ifdef CONFIG_SMP
945	smp_setup_pacas();
946
947	/* On BookE, setup per-core TLB data structures. */
948	setup_tlb_core_data();
949#endif
950
951	/* Print various info about the machine that has been gathered so far. */
952	print_system_info();
953
954	klp_init_thread_info(&init_task);
955
956	setup_initial_init_mm(_stext, _etext, _edata, _end);
957	/* sched_init() does the mmgrab(&init_mm) for the primary CPU */
958	VM_WARN_ON(cpumask_test_cpu(smp_processor_id(), mm_cpumask(&init_mm)));
959	cpumask_set_cpu(smp_processor_id(), mm_cpumask(&init_mm));
960	inc_mm_active_cpus(&init_mm);
961	mm_iommu_init(&init_mm);
962
963	irqstack_early_init();
964	exc_lvl_early_init();
965	emergency_stack_init();
966
967	mce_init();
968	smp_release_cpus();
969
970	initmem_init();
971
972	/*
973	 * Reserve large chunks of memory for use by CMA for KVM and hugetlb. These must
974	 * be called after initmem_init(), so that pageblock_order is initialised.
975	 */
976	kvm_cma_reserve();
977	gigantic_hugetlb_cma_reserve();
978
979	early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT);
980
981	if (ppc_md.setup_arch)
982		ppc_md.setup_arch();
983
984	setup_barrier_nospec();
985	setup_spectre_v2();
986
987	paging_init();
988
989	/* Initialize the MMU context management stuff. */
990	mmu_context_init();
991
992	/* Interrupt code needs to be 64K-aligned. */
993	if (IS_ENABLED(CONFIG_PPC64) && (unsigned long)_stext & 0xffff)
994		panic("Kernelbase not 64K-aligned (0x%lx)!\n",
995		      (unsigned long)_stext);
 
996}