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1/*
2 * Dynamic DMA mapping support.
3 *
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
10 *
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
17 * 08/12/11 beckyb Add highmem support
18 */
19
20#include <linux/cache.h>
21#include <linux/dma-mapping.h>
22#include <linux/mm.h>
23#include <linux/module.h>
24#include <linux/spinlock.h>
25#include <linux/string.h>
26#include <linux/swiotlb.h>
27#include <linux/pfn.h>
28#include <linux/types.h>
29#include <linux/ctype.h>
30#include <linux/highmem.h>
31#include <linux/gfp.h>
32
33#include <asm/io.h>
34#include <asm/dma.h>
35#include <asm/scatterlist.h>
36
37#include <linux/init.h>
38#include <linux/bootmem.h>
39#include <linux/iommu-helper.h>
40
41#define OFFSET(val,align) ((unsigned long) \
42 ( (val) & ( (align) - 1)))
43
44#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
45
46/*
47 * Minimum IO TLB size to bother booting with. Systems with mainly
48 * 64bit capable cards will only lightly use the swiotlb. If we can't
49 * allocate a contiguous 1MB, we're probably in trouble anyway.
50 */
51#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
52
53int swiotlb_force;
54
55/*
56 * Used to do a quick range check in swiotlb_tbl_unmap_single and
57 * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
58 * API.
59 */
60static char *io_tlb_start, *io_tlb_end;
61
62/*
63 * The number of IO TLB blocks (in groups of 64) between io_tlb_start and
64 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
65 */
66static unsigned long io_tlb_nslabs;
67
68/*
69 * When the IOMMU overflows we return a fallback buffer. This sets the size.
70 */
71static unsigned long io_tlb_overflow = 32*1024;
72
73static void *io_tlb_overflow_buffer;
74
75/*
76 * This is a free list describing the number of free entries available from
77 * each index
78 */
79static unsigned int *io_tlb_list;
80static unsigned int io_tlb_index;
81
82/*
83 * We need to save away the original address corresponding to a mapped entry
84 * for the sync operations.
85 */
86static phys_addr_t *io_tlb_orig_addr;
87
88/*
89 * Protect the above data structures in the map and unmap calls
90 */
91static DEFINE_SPINLOCK(io_tlb_lock);
92
93static int late_alloc;
94
95static int __init
96setup_io_tlb_npages(char *str)
97{
98 if (isdigit(*str)) {
99 io_tlb_nslabs = simple_strtoul(str, &str, 0);
100 /* avoid tail segment of size < IO_TLB_SEGSIZE */
101 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
102 }
103 if (*str == ',')
104 ++str;
105 if (!strcmp(str, "force"))
106 swiotlb_force = 1;
107
108 return 1;
109}
110__setup("swiotlb=", setup_io_tlb_npages);
111/* make io_tlb_overflow tunable too? */
112
113unsigned long swioltb_nr_tbl(void)
114{
115 return io_tlb_nslabs;
116}
117
118/* Note that this doesn't work with highmem page */
119static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
120 volatile void *address)
121{
122 return phys_to_dma(hwdev, virt_to_phys(address));
123}
124
125void swiotlb_print_info(void)
126{
127 unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
128 phys_addr_t pstart, pend;
129
130 pstart = virt_to_phys(io_tlb_start);
131 pend = virt_to_phys(io_tlb_end);
132
133 printk(KERN_INFO "Placing %luMB software IO TLB between %p - %p\n",
134 bytes >> 20, io_tlb_start, io_tlb_end);
135 printk(KERN_INFO "software IO TLB at phys %#llx - %#llx\n",
136 (unsigned long long)pstart,
137 (unsigned long long)pend);
138}
139
140void __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
141{
142 unsigned long i, bytes;
143
144 bytes = nslabs << IO_TLB_SHIFT;
145
146 io_tlb_nslabs = nslabs;
147 io_tlb_start = tlb;
148 io_tlb_end = io_tlb_start + bytes;
149
150 /*
151 * Allocate and initialize the free list array. This array is used
152 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
153 * between io_tlb_start and io_tlb_end.
154 */
155 io_tlb_list = alloc_bootmem_pages(PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
156 for (i = 0; i < io_tlb_nslabs; i++)
157 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
158 io_tlb_index = 0;
159 io_tlb_orig_addr = alloc_bootmem_pages(PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
160
161 /*
162 * Get the overflow emergency buffer
163 */
164 io_tlb_overflow_buffer = alloc_bootmem_low_pages(PAGE_ALIGN(io_tlb_overflow));
165 if (!io_tlb_overflow_buffer)
166 panic("Cannot allocate SWIOTLB overflow buffer!\n");
167 if (verbose)
168 swiotlb_print_info();
169}
170
171/*
172 * Statically reserve bounce buffer space and initialize bounce buffer data
173 * structures for the software IO TLB used to implement the DMA API.
174 */
175void __init
176swiotlb_init_with_default_size(size_t default_size, int verbose)
177{
178 unsigned long bytes;
179
180 if (!io_tlb_nslabs) {
181 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
182 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
183 }
184
185 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
186
187 /*
188 * Get IO TLB memory from the low pages
189 */
190 io_tlb_start = alloc_bootmem_low_pages(PAGE_ALIGN(bytes));
191 if (!io_tlb_start)
192 panic("Cannot allocate SWIOTLB buffer");
193
194 swiotlb_init_with_tbl(io_tlb_start, io_tlb_nslabs, verbose);
195}
196
197void __init
198swiotlb_init(int verbose)
199{
200 swiotlb_init_with_default_size(64 * (1<<20), verbose); /* default to 64MB */
201}
202
203/*
204 * Systems with larger DMA zones (those that don't support ISA) can
205 * initialize the swiotlb later using the slab allocator if needed.
206 * This should be just like above, but with some error catching.
207 */
208int
209swiotlb_late_init_with_default_size(size_t default_size)
210{
211 unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
212 unsigned int order;
213
214 if (!io_tlb_nslabs) {
215 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
216 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
217 }
218
219 /*
220 * Get IO TLB memory from the low pages
221 */
222 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
223 io_tlb_nslabs = SLABS_PER_PAGE << order;
224 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
225
226 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
227 io_tlb_start = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
228 order);
229 if (io_tlb_start)
230 break;
231 order--;
232 }
233
234 if (!io_tlb_start)
235 goto cleanup1;
236
237 if (order != get_order(bytes)) {
238 printk(KERN_WARNING "Warning: only able to allocate %ld MB "
239 "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
240 io_tlb_nslabs = SLABS_PER_PAGE << order;
241 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
242 }
243 io_tlb_end = io_tlb_start + bytes;
244 memset(io_tlb_start, 0, bytes);
245
246 /*
247 * Allocate and initialize the free list array. This array is used
248 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
249 * between io_tlb_start and io_tlb_end.
250 */
251 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
252 get_order(io_tlb_nslabs * sizeof(int)));
253 if (!io_tlb_list)
254 goto cleanup2;
255
256 for (i = 0; i < io_tlb_nslabs; i++)
257 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
258 io_tlb_index = 0;
259
260 io_tlb_orig_addr = (phys_addr_t *)
261 __get_free_pages(GFP_KERNEL,
262 get_order(io_tlb_nslabs *
263 sizeof(phys_addr_t)));
264 if (!io_tlb_orig_addr)
265 goto cleanup3;
266
267 memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t));
268
269 /*
270 * Get the overflow emergency buffer
271 */
272 io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
273 get_order(io_tlb_overflow));
274 if (!io_tlb_overflow_buffer)
275 goto cleanup4;
276
277 swiotlb_print_info();
278
279 late_alloc = 1;
280
281 return 0;
282
283cleanup4:
284 free_pages((unsigned long)io_tlb_orig_addr,
285 get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
286 io_tlb_orig_addr = NULL;
287cleanup3:
288 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
289 sizeof(int)));
290 io_tlb_list = NULL;
291cleanup2:
292 io_tlb_end = NULL;
293 free_pages((unsigned long)io_tlb_start, order);
294 io_tlb_start = NULL;
295cleanup1:
296 io_tlb_nslabs = req_nslabs;
297 return -ENOMEM;
298}
299
300void __init swiotlb_free(void)
301{
302 if (!io_tlb_overflow_buffer)
303 return;
304
305 if (late_alloc) {
306 free_pages((unsigned long)io_tlb_overflow_buffer,
307 get_order(io_tlb_overflow));
308 free_pages((unsigned long)io_tlb_orig_addr,
309 get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
310 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
311 sizeof(int)));
312 free_pages((unsigned long)io_tlb_start,
313 get_order(io_tlb_nslabs << IO_TLB_SHIFT));
314 } else {
315 free_bootmem_late(__pa(io_tlb_overflow_buffer),
316 PAGE_ALIGN(io_tlb_overflow));
317 free_bootmem_late(__pa(io_tlb_orig_addr),
318 PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
319 free_bootmem_late(__pa(io_tlb_list),
320 PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
321 free_bootmem_late(__pa(io_tlb_start),
322 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
323 }
324}
325
326static int is_swiotlb_buffer(phys_addr_t paddr)
327{
328 return paddr >= virt_to_phys(io_tlb_start) &&
329 paddr < virt_to_phys(io_tlb_end);
330}
331
332/*
333 * Bounce: copy the swiotlb buffer back to the original dma location
334 */
335void swiotlb_bounce(phys_addr_t phys, char *dma_addr, size_t size,
336 enum dma_data_direction dir)
337{
338 unsigned long pfn = PFN_DOWN(phys);
339
340 if (PageHighMem(pfn_to_page(pfn))) {
341 /* The buffer does not have a mapping. Map it in and copy */
342 unsigned int offset = phys & ~PAGE_MASK;
343 char *buffer;
344 unsigned int sz = 0;
345 unsigned long flags;
346
347 while (size) {
348 sz = min_t(size_t, PAGE_SIZE - offset, size);
349
350 local_irq_save(flags);
351 buffer = kmap_atomic(pfn_to_page(pfn),
352 KM_BOUNCE_READ);
353 if (dir == DMA_TO_DEVICE)
354 memcpy(dma_addr, buffer + offset, sz);
355 else
356 memcpy(buffer + offset, dma_addr, sz);
357 kunmap_atomic(buffer, KM_BOUNCE_READ);
358 local_irq_restore(flags);
359
360 size -= sz;
361 pfn++;
362 dma_addr += sz;
363 offset = 0;
364 }
365 } else {
366 if (dir == DMA_TO_DEVICE)
367 memcpy(dma_addr, phys_to_virt(phys), size);
368 else
369 memcpy(phys_to_virt(phys), dma_addr, size);
370 }
371}
372EXPORT_SYMBOL_GPL(swiotlb_bounce);
373
374void *swiotlb_tbl_map_single(struct device *hwdev, dma_addr_t tbl_dma_addr,
375 phys_addr_t phys, size_t size,
376 enum dma_data_direction dir)
377{
378 unsigned long flags;
379 char *dma_addr;
380 unsigned int nslots, stride, index, wrap;
381 int i;
382 unsigned long mask;
383 unsigned long offset_slots;
384 unsigned long max_slots;
385
386 mask = dma_get_seg_boundary(hwdev);
387
388 tbl_dma_addr &= mask;
389
390 offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
391
392 /*
393 * Carefully handle integer overflow which can occur when mask == ~0UL.
394 */
395 max_slots = mask + 1
396 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
397 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
398
399 /*
400 * For mappings greater than a page, we limit the stride (and
401 * hence alignment) to a page size.
402 */
403 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
404 if (size > PAGE_SIZE)
405 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
406 else
407 stride = 1;
408
409 BUG_ON(!nslots);
410
411 /*
412 * Find suitable number of IO TLB entries size that will fit this
413 * request and allocate a buffer from that IO TLB pool.
414 */
415 spin_lock_irqsave(&io_tlb_lock, flags);
416 index = ALIGN(io_tlb_index, stride);
417 if (index >= io_tlb_nslabs)
418 index = 0;
419 wrap = index;
420
421 do {
422 while (iommu_is_span_boundary(index, nslots, offset_slots,
423 max_slots)) {
424 index += stride;
425 if (index >= io_tlb_nslabs)
426 index = 0;
427 if (index == wrap)
428 goto not_found;
429 }
430
431 /*
432 * If we find a slot that indicates we have 'nslots' number of
433 * contiguous buffers, we allocate the buffers from that slot
434 * and mark the entries as '0' indicating unavailable.
435 */
436 if (io_tlb_list[index] >= nslots) {
437 int count = 0;
438
439 for (i = index; i < (int) (index + nslots); i++)
440 io_tlb_list[i] = 0;
441 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
442 io_tlb_list[i] = ++count;
443 dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
444
445 /*
446 * Update the indices to avoid searching in the next
447 * round.
448 */
449 io_tlb_index = ((index + nslots) < io_tlb_nslabs
450 ? (index + nslots) : 0);
451
452 goto found;
453 }
454 index += stride;
455 if (index >= io_tlb_nslabs)
456 index = 0;
457 } while (index != wrap);
458
459not_found:
460 spin_unlock_irqrestore(&io_tlb_lock, flags);
461 return NULL;
462found:
463 spin_unlock_irqrestore(&io_tlb_lock, flags);
464
465 /*
466 * Save away the mapping from the original address to the DMA address.
467 * This is needed when we sync the memory. Then we sync the buffer if
468 * needed.
469 */
470 for (i = 0; i < nslots; i++)
471 io_tlb_orig_addr[index+i] = phys + (i << IO_TLB_SHIFT);
472 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
473 swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
474
475 return dma_addr;
476}
477EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single);
478
479/*
480 * Allocates bounce buffer and returns its kernel virtual address.
481 */
482
483static void *
484map_single(struct device *hwdev, phys_addr_t phys, size_t size,
485 enum dma_data_direction dir)
486{
487 dma_addr_t start_dma_addr = swiotlb_virt_to_bus(hwdev, io_tlb_start);
488
489 return swiotlb_tbl_map_single(hwdev, start_dma_addr, phys, size, dir);
490}
491
492/*
493 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
494 */
495void
496swiotlb_tbl_unmap_single(struct device *hwdev, char *dma_addr, size_t size,
497 enum dma_data_direction dir)
498{
499 unsigned long flags;
500 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
501 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
502 phys_addr_t phys = io_tlb_orig_addr[index];
503
504 /*
505 * First, sync the memory before unmapping the entry
506 */
507 if (phys && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
508 swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
509
510 /*
511 * Return the buffer to the free list by setting the corresponding
512 * entries to indicate the number of contiguous entries available.
513 * While returning the entries to the free list, we merge the entries
514 * with slots below and above the pool being returned.
515 */
516 spin_lock_irqsave(&io_tlb_lock, flags);
517 {
518 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
519 io_tlb_list[index + nslots] : 0);
520 /*
521 * Step 1: return the slots to the free list, merging the
522 * slots with superceeding slots
523 */
524 for (i = index + nslots - 1; i >= index; i--)
525 io_tlb_list[i] = ++count;
526 /*
527 * Step 2: merge the returned slots with the preceding slots,
528 * if available (non zero)
529 */
530 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
531 io_tlb_list[i] = ++count;
532 }
533 spin_unlock_irqrestore(&io_tlb_lock, flags);
534}
535EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single);
536
537void
538swiotlb_tbl_sync_single(struct device *hwdev, char *dma_addr, size_t size,
539 enum dma_data_direction dir,
540 enum dma_sync_target target)
541{
542 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
543 phys_addr_t phys = io_tlb_orig_addr[index];
544
545 phys += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
546
547 switch (target) {
548 case SYNC_FOR_CPU:
549 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
550 swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
551 else
552 BUG_ON(dir != DMA_TO_DEVICE);
553 break;
554 case SYNC_FOR_DEVICE:
555 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
556 swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
557 else
558 BUG_ON(dir != DMA_FROM_DEVICE);
559 break;
560 default:
561 BUG();
562 }
563}
564EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single);
565
566void *
567swiotlb_alloc_coherent(struct device *hwdev, size_t size,
568 dma_addr_t *dma_handle, gfp_t flags)
569{
570 dma_addr_t dev_addr;
571 void *ret;
572 int order = get_order(size);
573 u64 dma_mask = DMA_BIT_MASK(32);
574
575 if (hwdev && hwdev->coherent_dma_mask)
576 dma_mask = hwdev->coherent_dma_mask;
577
578 ret = (void *)__get_free_pages(flags, order);
579 if (ret && swiotlb_virt_to_bus(hwdev, ret) + size - 1 > dma_mask) {
580 /*
581 * The allocated memory isn't reachable by the device.
582 */
583 free_pages((unsigned long) ret, order);
584 ret = NULL;
585 }
586 if (!ret) {
587 /*
588 * We are either out of memory or the device can't DMA to
589 * GFP_DMA memory; fall back on map_single(), which
590 * will grab memory from the lowest available address range.
591 */
592 ret = map_single(hwdev, 0, size, DMA_FROM_DEVICE);
593 if (!ret)
594 return NULL;
595 }
596
597 memset(ret, 0, size);
598 dev_addr = swiotlb_virt_to_bus(hwdev, ret);
599
600 /* Confirm address can be DMA'd by device */
601 if (dev_addr + size - 1 > dma_mask) {
602 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
603 (unsigned long long)dma_mask,
604 (unsigned long long)dev_addr);
605
606 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
607 swiotlb_tbl_unmap_single(hwdev, ret, size, DMA_TO_DEVICE);
608 return NULL;
609 }
610 *dma_handle = dev_addr;
611 return ret;
612}
613EXPORT_SYMBOL(swiotlb_alloc_coherent);
614
615void
616swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
617 dma_addr_t dev_addr)
618{
619 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
620
621 WARN_ON(irqs_disabled());
622 if (!is_swiotlb_buffer(paddr))
623 free_pages((unsigned long)vaddr, get_order(size));
624 else
625 /* DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single */
626 swiotlb_tbl_unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE);
627}
628EXPORT_SYMBOL(swiotlb_free_coherent);
629
630static void
631swiotlb_full(struct device *dev, size_t size, enum dma_data_direction dir,
632 int do_panic)
633{
634 /*
635 * Ran out of IOMMU space for this operation. This is very bad.
636 * Unfortunately the drivers cannot handle this operation properly.
637 * unless they check for dma_mapping_error (most don't)
638 * When the mapping is small enough return a static buffer to limit
639 * the damage, or panic when the transfer is too big.
640 */
641 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
642 "device %s\n", size, dev ? dev_name(dev) : "?");
643
644 if (size <= io_tlb_overflow || !do_panic)
645 return;
646
647 if (dir == DMA_BIDIRECTIONAL)
648 panic("DMA: Random memory could be DMA accessed\n");
649 if (dir == DMA_FROM_DEVICE)
650 panic("DMA: Random memory could be DMA written\n");
651 if (dir == DMA_TO_DEVICE)
652 panic("DMA: Random memory could be DMA read\n");
653}
654
655/*
656 * Map a single buffer of the indicated size for DMA in streaming mode. The
657 * physical address to use is returned.
658 *
659 * Once the device is given the dma address, the device owns this memory until
660 * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
661 */
662dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
663 unsigned long offset, size_t size,
664 enum dma_data_direction dir,
665 struct dma_attrs *attrs)
666{
667 phys_addr_t phys = page_to_phys(page) + offset;
668 dma_addr_t dev_addr = phys_to_dma(dev, phys);
669 void *map;
670
671 BUG_ON(dir == DMA_NONE);
672 /*
673 * If the address happens to be in the device's DMA window,
674 * we can safely return the device addr and not worry about bounce
675 * buffering it.
676 */
677 if (dma_capable(dev, dev_addr, size) && !swiotlb_force)
678 return dev_addr;
679
680 /*
681 * Oh well, have to allocate and map a bounce buffer.
682 */
683 map = map_single(dev, phys, size, dir);
684 if (!map) {
685 swiotlb_full(dev, size, dir, 1);
686 map = io_tlb_overflow_buffer;
687 }
688
689 dev_addr = swiotlb_virt_to_bus(dev, map);
690
691 /*
692 * Ensure that the address returned is DMA'ble
693 */
694 if (!dma_capable(dev, dev_addr, size)) {
695 swiotlb_tbl_unmap_single(dev, map, size, dir);
696 dev_addr = swiotlb_virt_to_bus(dev, io_tlb_overflow_buffer);
697 }
698
699 return dev_addr;
700}
701EXPORT_SYMBOL_GPL(swiotlb_map_page);
702
703/*
704 * Unmap a single streaming mode DMA translation. The dma_addr and size must
705 * match what was provided for in a previous swiotlb_map_page call. All
706 * other usages are undefined.
707 *
708 * After this call, reads by the cpu to the buffer are guaranteed to see
709 * whatever the device wrote there.
710 */
711static void unmap_single(struct device *hwdev, dma_addr_t dev_addr,
712 size_t size, enum dma_data_direction dir)
713{
714 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
715
716 BUG_ON(dir == DMA_NONE);
717
718 if (is_swiotlb_buffer(paddr)) {
719 swiotlb_tbl_unmap_single(hwdev, phys_to_virt(paddr), size, dir);
720 return;
721 }
722
723 if (dir != DMA_FROM_DEVICE)
724 return;
725
726 /*
727 * phys_to_virt doesn't work with hihgmem page but we could
728 * call dma_mark_clean() with hihgmem page here. However, we
729 * are fine since dma_mark_clean() is null on POWERPC. We can
730 * make dma_mark_clean() take a physical address if necessary.
731 */
732 dma_mark_clean(phys_to_virt(paddr), size);
733}
734
735void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
736 size_t size, enum dma_data_direction dir,
737 struct dma_attrs *attrs)
738{
739 unmap_single(hwdev, dev_addr, size, dir);
740}
741EXPORT_SYMBOL_GPL(swiotlb_unmap_page);
742
743/*
744 * Make physical memory consistent for a single streaming mode DMA translation
745 * after a transfer.
746 *
747 * If you perform a swiotlb_map_page() but wish to interrogate the buffer
748 * using the cpu, yet do not wish to teardown the dma mapping, you must
749 * call this function before doing so. At the next point you give the dma
750 * address back to the card, you must first perform a
751 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
752 */
753static void
754swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
755 size_t size, enum dma_data_direction dir,
756 enum dma_sync_target target)
757{
758 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
759
760 BUG_ON(dir == DMA_NONE);
761
762 if (is_swiotlb_buffer(paddr)) {
763 swiotlb_tbl_sync_single(hwdev, phys_to_virt(paddr), size, dir,
764 target);
765 return;
766 }
767
768 if (dir != DMA_FROM_DEVICE)
769 return;
770
771 dma_mark_clean(phys_to_virt(paddr), size);
772}
773
774void
775swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
776 size_t size, enum dma_data_direction dir)
777{
778 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
779}
780EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
781
782void
783swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
784 size_t size, enum dma_data_direction dir)
785{
786 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
787}
788EXPORT_SYMBOL(swiotlb_sync_single_for_device);
789
790/*
791 * Map a set of buffers described by scatterlist in streaming mode for DMA.
792 * This is the scatter-gather version of the above swiotlb_map_page
793 * interface. Here the scatter gather list elements are each tagged with the
794 * appropriate dma address and length. They are obtained via
795 * sg_dma_{address,length}(SG).
796 *
797 * NOTE: An implementation may be able to use a smaller number of
798 * DMA address/length pairs than there are SG table elements.
799 * (for example via virtual mapping capabilities)
800 * The routine returns the number of addr/length pairs actually
801 * used, at most nents.
802 *
803 * Device ownership issues as mentioned above for swiotlb_map_page are the
804 * same here.
805 */
806int
807swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
808 enum dma_data_direction dir, struct dma_attrs *attrs)
809{
810 struct scatterlist *sg;
811 int i;
812
813 BUG_ON(dir == DMA_NONE);
814
815 for_each_sg(sgl, sg, nelems, i) {
816 phys_addr_t paddr = sg_phys(sg);
817 dma_addr_t dev_addr = phys_to_dma(hwdev, paddr);
818
819 if (swiotlb_force ||
820 !dma_capable(hwdev, dev_addr, sg->length)) {
821 void *map = map_single(hwdev, sg_phys(sg),
822 sg->length, dir);
823 if (!map) {
824 /* Don't panic here, we expect map_sg users
825 to do proper error handling. */
826 swiotlb_full(hwdev, sg->length, dir, 0);
827 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
828 attrs);
829 sgl[0].dma_length = 0;
830 return 0;
831 }
832 sg->dma_address = swiotlb_virt_to_bus(hwdev, map);
833 } else
834 sg->dma_address = dev_addr;
835 sg->dma_length = sg->length;
836 }
837 return nelems;
838}
839EXPORT_SYMBOL(swiotlb_map_sg_attrs);
840
841int
842swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
843 enum dma_data_direction dir)
844{
845 return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
846}
847EXPORT_SYMBOL(swiotlb_map_sg);
848
849/*
850 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
851 * concerning calls here are the same as for swiotlb_unmap_page() above.
852 */
853void
854swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
855 int nelems, enum dma_data_direction dir, struct dma_attrs *attrs)
856{
857 struct scatterlist *sg;
858 int i;
859
860 BUG_ON(dir == DMA_NONE);
861
862 for_each_sg(sgl, sg, nelems, i)
863 unmap_single(hwdev, sg->dma_address, sg->dma_length, dir);
864
865}
866EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
867
868void
869swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
870 enum dma_data_direction dir)
871{
872 return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
873}
874EXPORT_SYMBOL(swiotlb_unmap_sg);
875
876/*
877 * Make physical memory consistent for a set of streaming mode DMA translations
878 * after a transfer.
879 *
880 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
881 * and usage.
882 */
883static void
884swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
885 int nelems, enum dma_data_direction dir,
886 enum dma_sync_target target)
887{
888 struct scatterlist *sg;
889 int i;
890
891 for_each_sg(sgl, sg, nelems, i)
892 swiotlb_sync_single(hwdev, sg->dma_address,
893 sg->dma_length, dir, target);
894}
895
896void
897swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
898 int nelems, enum dma_data_direction dir)
899{
900 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
901}
902EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
903
904void
905swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
906 int nelems, enum dma_data_direction dir)
907{
908 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
909}
910EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
911
912int
913swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
914{
915 return (dma_addr == swiotlb_virt_to_bus(hwdev, io_tlb_overflow_buffer));
916}
917EXPORT_SYMBOL(swiotlb_dma_mapping_error);
918
919/*
920 * Return whether the given device DMA address mask can be supported
921 * properly. For example, if your device can only drive the low 24-bits
922 * during bus mastering, then you would pass 0x00ffffff as the mask to
923 * this function.
924 */
925int
926swiotlb_dma_supported(struct device *hwdev, u64 mask)
927{
928 return swiotlb_virt_to_bus(hwdev, io_tlb_end - 1) <= mask;
929}
930EXPORT_SYMBOL(swiotlb_dma_supported);