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1/*
2 * Dynamic DMA mapping support.
3 *
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
10 *
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
17 * 08/12/11 beckyb Add highmem support
18 */
19
20#include <linux/cache.h>
21#include <linux/dma-mapping.h>
22#include <linux/mm.h>
23#include <linux/export.h>
24#include <linux/spinlock.h>
25#include <linux/string.h>
26#include <linux/swiotlb.h>
27#include <linux/pfn.h>
28#include <linux/types.h>
29#include <linux/ctype.h>
30#include <linux/highmem.h>
31#include <linux/gfp.h>
32
33#include <asm/io.h>
34#include <asm/dma.h>
35#include <asm/scatterlist.h>
36
37#include <linux/init.h>
38#include <linux/bootmem.h>
39#include <linux/iommu-helper.h>
40
41#define OFFSET(val,align) ((unsigned long) \
42 ( (val) & ( (align) - 1)))
43
44#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
45
46/*
47 * Minimum IO TLB size to bother booting with. Systems with mainly
48 * 64bit capable cards will only lightly use the swiotlb. If we can't
49 * allocate a contiguous 1MB, we're probably in trouble anyway.
50 */
51#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
52
53int swiotlb_force;
54
55/*
56 * Used to do a quick range check in swiotlb_tbl_unmap_single and
57 * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
58 * API.
59 */
60static char *io_tlb_start, *io_tlb_end;
61
62/*
63 * The number of IO TLB blocks (in groups of 64) between io_tlb_start and
64 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
65 */
66static unsigned long io_tlb_nslabs;
67
68/*
69 * When the IOMMU overflows we return a fallback buffer. This sets the size.
70 */
71static unsigned long io_tlb_overflow = 32*1024;
72
73static void *io_tlb_overflow_buffer;
74
75/*
76 * This is a free list describing the number of free entries available from
77 * each index
78 */
79static unsigned int *io_tlb_list;
80static unsigned int io_tlb_index;
81
82/*
83 * We need to save away the original address corresponding to a mapped entry
84 * for the sync operations.
85 */
86static phys_addr_t *io_tlb_orig_addr;
87
88/*
89 * Protect the above data structures in the map and unmap calls
90 */
91static DEFINE_SPINLOCK(io_tlb_lock);
92
93static int late_alloc;
94
95static int __init
96setup_io_tlb_npages(char *str)
97{
98 if (isdigit(*str)) {
99 io_tlb_nslabs = simple_strtoul(str, &str, 0);
100 /* avoid tail segment of size < IO_TLB_SEGSIZE */
101 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
102 }
103 if (*str == ',')
104 ++str;
105 if (!strcmp(str, "force"))
106 swiotlb_force = 1;
107
108 return 1;
109}
110__setup("swiotlb=", setup_io_tlb_npages);
111/* make io_tlb_overflow tunable too? */
112
113unsigned long swiotlb_nr_tbl(void)
114{
115 return io_tlb_nslabs;
116}
117EXPORT_SYMBOL_GPL(swiotlb_nr_tbl);
118/* Note that this doesn't work with highmem page */
119static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
120 volatile void *address)
121{
122 return phys_to_dma(hwdev, virt_to_phys(address));
123}
124
125void swiotlb_print_info(void)
126{
127 unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
128 phys_addr_t pstart, pend;
129
130 pstart = virt_to_phys(io_tlb_start);
131 pend = virt_to_phys(io_tlb_end);
132
133 printk(KERN_INFO "software IO TLB [mem %#010llx-%#010llx] (%luMB) mapped at [%p-%p]\n",
134 (unsigned long long)pstart, (unsigned long long)pend - 1,
135 bytes >> 20, io_tlb_start, io_tlb_end - 1);
136}
137
138void __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
139{
140 unsigned long i, bytes;
141
142 bytes = nslabs << IO_TLB_SHIFT;
143
144 io_tlb_nslabs = nslabs;
145 io_tlb_start = tlb;
146 io_tlb_end = io_tlb_start + bytes;
147
148 /*
149 * Allocate and initialize the free list array. This array is used
150 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
151 * between io_tlb_start and io_tlb_end.
152 */
153 io_tlb_list = alloc_bootmem_pages(PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
154 for (i = 0; i < io_tlb_nslabs; i++)
155 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
156 io_tlb_index = 0;
157 io_tlb_orig_addr = alloc_bootmem_pages(PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
158
159 /*
160 * Get the overflow emergency buffer
161 */
162 io_tlb_overflow_buffer = alloc_bootmem_low_pages(PAGE_ALIGN(io_tlb_overflow));
163 if (!io_tlb_overflow_buffer)
164 panic("Cannot allocate SWIOTLB overflow buffer!\n");
165 if (verbose)
166 swiotlb_print_info();
167}
168
169/*
170 * Statically reserve bounce buffer space and initialize bounce buffer data
171 * structures for the software IO TLB used to implement the DMA API.
172 */
173void __init
174swiotlb_init_with_default_size(size_t default_size, int verbose)
175{
176 unsigned long bytes;
177
178 if (!io_tlb_nslabs) {
179 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
180 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
181 }
182
183 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
184
185 /*
186 * Get IO TLB memory from the low pages
187 */
188 io_tlb_start = alloc_bootmem_low_pages(PAGE_ALIGN(bytes));
189 if (!io_tlb_start)
190 panic("Cannot allocate SWIOTLB buffer");
191
192 swiotlb_init_with_tbl(io_tlb_start, io_tlb_nslabs, verbose);
193}
194
195void __init
196swiotlb_init(int verbose)
197{
198 swiotlb_init_with_default_size(64 * (1<<20), verbose); /* default to 64MB */
199}
200
201/*
202 * Systems with larger DMA zones (those that don't support ISA) can
203 * initialize the swiotlb later using the slab allocator if needed.
204 * This should be just like above, but with some error catching.
205 */
206int
207swiotlb_late_init_with_default_size(size_t default_size)
208{
209 unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
210 unsigned int order;
211
212 if (!io_tlb_nslabs) {
213 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
214 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
215 }
216
217 /*
218 * Get IO TLB memory from the low pages
219 */
220 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
221 io_tlb_nslabs = SLABS_PER_PAGE << order;
222 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
223
224 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
225 io_tlb_start = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
226 order);
227 if (io_tlb_start)
228 break;
229 order--;
230 }
231
232 if (!io_tlb_start)
233 goto cleanup1;
234
235 if (order != get_order(bytes)) {
236 printk(KERN_WARNING "Warning: only able to allocate %ld MB "
237 "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
238 io_tlb_nslabs = SLABS_PER_PAGE << order;
239 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
240 }
241 io_tlb_end = io_tlb_start + bytes;
242 memset(io_tlb_start, 0, bytes);
243
244 /*
245 * Allocate and initialize the free list array. This array is used
246 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
247 * between io_tlb_start and io_tlb_end.
248 */
249 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
250 get_order(io_tlb_nslabs * sizeof(int)));
251 if (!io_tlb_list)
252 goto cleanup2;
253
254 for (i = 0; i < io_tlb_nslabs; i++)
255 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
256 io_tlb_index = 0;
257
258 io_tlb_orig_addr = (phys_addr_t *)
259 __get_free_pages(GFP_KERNEL,
260 get_order(io_tlb_nslabs *
261 sizeof(phys_addr_t)));
262 if (!io_tlb_orig_addr)
263 goto cleanup3;
264
265 memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t));
266
267 /*
268 * Get the overflow emergency buffer
269 */
270 io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
271 get_order(io_tlb_overflow));
272 if (!io_tlb_overflow_buffer)
273 goto cleanup4;
274
275 swiotlb_print_info();
276
277 late_alloc = 1;
278
279 return 0;
280
281cleanup4:
282 free_pages((unsigned long)io_tlb_orig_addr,
283 get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
284 io_tlb_orig_addr = NULL;
285cleanup3:
286 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
287 sizeof(int)));
288 io_tlb_list = NULL;
289cleanup2:
290 io_tlb_end = NULL;
291 free_pages((unsigned long)io_tlb_start, order);
292 io_tlb_start = NULL;
293cleanup1:
294 io_tlb_nslabs = req_nslabs;
295 return -ENOMEM;
296}
297
298void __init swiotlb_free(void)
299{
300 if (!io_tlb_overflow_buffer)
301 return;
302
303 if (late_alloc) {
304 free_pages((unsigned long)io_tlb_overflow_buffer,
305 get_order(io_tlb_overflow));
306 free_pages((unsigned long)io_tlb_orig_addr,
307 get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
308 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
309 sizeof(int)));
310 free_pages((unsigned long)io_tlb_start,
311 get_order(io_tlb_nslabs << IO_TLB_SHIFT));
312 } else {
313 free_bootmem_late(__pa(io_tlb_overflow_buffer),
314 PAGE_ALIGN(io_tlb_overflow));
315 free_bootmem_late(__pa(io_tlb_orig_addr),
316 PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
317 free_bootmem_late(__pa(io_tlb_list),
318 PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
319 free_bootmem_late(__pa(io_tlb_start),
320 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
321 }
322 io_tlb_nslabs = 0;
323}
324
325static int is_swiotlb_buffer(phys_addr_t paddr)
326{
327 return paddr >= virt_to_phys(io_tlb_start) &&
328 paddr < virt_to_phys(io_tlb_end);
329}
330
331/*
332 * Bounce: copy the swiotlb buffer back to the original dma location
333 */
334void swiotlb_bounce(phys_addr_t phys, char *dma_addr, size_t size,
335 enum dma_data_direction dir)
336{
337 unsigned long pfn = PFN_DOWN(phys);
338
339 if (PageHighMem(pfn_to_page(pfn))) {
340 /* The buffer does not have a mapping. Map it in and copy */
341 unsigned int offset = phys & ~PAGE_MASK;
342 char *buffer;
343 unsigned int sz = 0;
344 unsigned long flags;
345
346 while (size) {
347 sz = min_t(size_t, PAGE_SIZE - offset, size);
348
349 local_irq_save(flags);
350 buffer = kmap_atomic(pfn_to_page(pfn));
351 if (dir == DMA_TO_DEVICE)
352 memcpy(dma_addr, buffer + offset, sz);
353 else
354 memcpy(buffer + offset, dma_addr, sz);
355 kunmap_atomic(buffer);
356 local_irq_restore(flags);
357
358 size -= sz;
359 pfn++;
360 dma_addr += sz;
361 offset = 0;
362 }
363 } else {
364 if (dir == DMA_TO_DEVICE)
365 memcpy(dma_addr, phys_to_virt(phys), size);
366 else
367 memcpy(phys_to_virt(phys), dma_addr, size);
368 }
369}
370EXPORT_SYMBOL_GPL(swiotlb_bounce);
371
372void *swiotlb_tbl_map_single(struct device *hwdev, dma_addr_t tbl_dma_addr,
373 phys_addr_t phys, size_t size,
374 enum dma_data_direction dir)
375{
376 unsigned long flags;
377 char *dma_addr;
378 unsigned int nslots, stride, index, wrap;
379 int i;
380 unsigned long mask;
381 unsigned long offset_slots;
382 unsigned long max_slots;
383
384 mask = dma_get_seg_boundary(hwdev);
385
386 tbl_dma_addr &= mask;
387
388 offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
389
390 /*
391 * Carefully handle integer overflow which can occur when mask == ~0UL.
392 */
393 max_slots = mask + 1
394 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
395 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
396
397 /*
398 * For mappings greater than a page, we limit the stride (and
399 * hence alignment) to a page size.
400 */
401 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
402 if (size > PAGE_SIZE)
403 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
404 else
405 stride = 1;
406
407 BUG_ON(!nslots);
408
409 /*
410 * Find suitable number of IO TLB entries size that will fit this
411 * request and allocate a buffer from that IO TLB pool.
412 */
413 spin_lock_irqsave(&io_tlb_lock, flags);
414 index = ALIGN(io_tlb_index, stride);
415 if (index >= io_tlb_nslabs)
416 index = 0;
417 wrap = index;
418
419 do {
420 while (iommu_is_span_boundary(index, nslots, offset_slots,
421 max_slots)) {
422 index += stride;
423 if (index >= io_tlb_nslabs)
424 index = 0;
425 if (index == wrap)
426 goto not_found;
427 }
428
429 /*
430 * If we find a slot that indicates we have 'nslots' number of
431 * contiguous buffers, we allocate the buffers from that slot
432 * and mark the entries as '0' indicating unavailable.
433 */
434 if (io_tlb_list[index] >= nslots) {
435 int count = 0;
436
437 for (i = index; i < (int) (index + nslots); i++)
438 io_tlb_list[i] = 0;
439 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
440 io_tlb_list[i] = ++count;
441 dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
442
443 /*
444 * Update the indices to avoid searching in the next
445 * round.
446 */
447 io_tlb_index = ((index + nslots) < io_tlb_nslabs
448 ? (index + nslots) : 0);
449
450 goto found;
451 }
452 index += stride;
453 if (index >= io_tlb_nslabs)
454 index = 0;
455 } while (index != wrap);
456
457not_found:
458 spin_unlock_irqrestore(&io_tlb_lock, flags);
459 return NULL;
460found:
461 spin_unlock_irqrestore(&io_tlb_lock, flags);
462
463 /*
464 * Save away the mapping from the original address to the DMA address.
465 * This is needed when we sync the memory. Then we sync the buffer if
466 * needed.
467 */
468 for (i = 0; i < nslots; i++)
469 io_tlb_orig_addr[index+i] = phys + (i << IO_TLB_SHIFT);
470 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
471 swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
472
473 return dma_addr;
474}
475EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single);
476
477/*
478 * Allocates bounce buffer and returns its kernel virtual address.
479 */
480
481static void *
482map_single(struct device *hwdev, phys_addr_t phys, size_t size,
483 enum dma_data_direction dir)
484{
485 dma_addr_t start_dma_addr = swiotlb_virt_to_bus(hwdev, io_tlb_start);
486
487 return swiotlb_tbl_map_single(hwdev, start_dma_addr, phys, size, dir);
488}
489
490/*
491 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
492 */
493void
494swiotlb_tbl_unmap_single(struct device *hwdev, char *dma_addr, size_t size,
495 enum dma_data_direction dir)
496{
497 unsigned long flags;
498 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
499 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
500 phys_addr_t phys = io_tlb_orig_addr[index];
501
502 /*
503 * First, sync the memory before unmapping the entry
504 */
505 if (phys && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
506 swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
507
508 /*
509 * Return the buffer to the free list by setting the corresponding
510 * entries to indicate the number of contiguous entries available.
511 * While returning the entries to the free list, we merge the entries
512 * with slots below and above the pool being returned.
513 */
514 spin_lock_irqsave(&io_tlb_lock, flags);
515 {
516 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
517 io_tlb_list[index + nslots] : 0);
518 /*
519 * Step 1: return the slots to the free list, merging the
520 * slots with superceeding slots
521 */
522 for (i = index + nslots - 1; i >= index; i--)
523 io_tlb_list[i] = ++count;
524 /*
525 * Step 2: merge the returned slots with the preceding slots,
526 * if available (non zero)
527 */
528 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
529 io_tlb_list[i] = ++count;
530 }
531 spin_unlock_irqrestore(&io_tlb_lock, flags);
532}
533EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single);
534
535void
536swiotlb_tbl_sync_single(struct device *hwdev, char *dma_addr, size_t size,
537 enum dma_data_direction dir,
538 enum dma_sync_target target)
539{
540 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
541 phys_addr_t phys = io_tlb_orig_addr[index];
542
543 phys += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
544
545 switch (target) {
546 case SYNC_FOR_CPU:
547 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
548 swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
549 else
550 BUG_ON(dir != DMA_TO_DEVICE);
551 break;
552 case SYNC_FOR_DEVICE:
553 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
554 swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
555 else
556 BUG_ON(dir != DMA_FROM_DEVICE);
557 break;
558 default:
559 BUG();
560 }
561}
562EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single);
563
564void *
565swiotlb_alloc_coherent(struct device *hwdev, size_t size,
566 dma_addr_t *dma_handle, gfp_t flags)
567{
568 dma_addr_t dev_addr;
569 void *ret;
570 int order = get_order(size);
571 u64 dma_mask = DMA_BIT_MASK(32);
572
573 if (hwdev && hwdev->coherent_dma_mask)
574 dma_mask = hwdev->coherent_dma_mask;
575
576 ret = (void *)__get_free_pages(flags, order);
577 if (ret && swiotlb_virt_to_bus(hwdev, ret) + size - 1 > dma_mask) {
578 /*
579 * The allocated memory isn't reachable by the device.
580 */
581 free_pages((unsigned long) ret, order);
582 ret = NULL;
583 }
584 if (!ret) {
585 /*
586 * We are either out of memory or the device can't DMA to
587 * GFP_DMA memory; fall back on map_single(), which
588 * will grab memory from the lowest available address range.
589 */
590 ret = map_single(hwdev, 0, size, DMA_FROM_DEVICE);
591 if (!ret)
592 return NULL;
593 }
594
595 memset(ret, 0, size);
596 dev_addr = swiotlb_virt_to_bus(hwdev, ret);
597
598 /* Confirm address can be DMA'd by device */
599 if (dev_addr + size - 1 > dma_mask) {
600 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
601 (unsigned long long)dma_mask,
602 (unsigned long long)dev_addr);
603
604 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
605 swiotlb_tbl_unmap_single(hwdev, ret, size, DMA_TO_DEVICE);
606 return NULL;
607 }
608 *dma_handle = dev_addr;
609 return ret;
610}
611EXPORT_SYMBOL(swiotlb_alloc_coherent);
612
613void
614swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
615 dma_addr_t dev_addr)
616{
617 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
618
619 WARN_ON(irqs_disabled());
620 if (!is_swiotlb_buffer(paddr))
621 free_pages((unsigned long)vaddr, get_order(size));
622 else
623 /* DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single */
624 swiotlb_tbl_unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE);
625}
626EXPORT_SYMBOL(swiotlb_free_coherent);
627
628static void
629swiotlb_full(struct device *dev, size_t size, enum dma_data_direction dir,
630 int do_panic)
631{
632 /*
633 * Ran out of IOMMU space for this operation. This is very bad.
634 * Unfortunately the drivers cannot handle this operation properly.
635 * unless they check for dma_mapping_error (most don't)
636 * When the mapping is small enough return a static buffer to limit
637 * the damage, or panic when the transfer is too big.
638 */
639 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
640 "device %s\n", size, dev ? dev_name(dev) : "?");
641
642 if (size <= io_tlb_overflow || !do_panic)
643 return;
644
645 if (dir == DMA_BIDIRECTIONAL)
646 panic("DMA: Random memory could be DMA accessed\n");
647 if (dir == DMA_FROM_DEVICE)
648 panic("DMA: Random memory could be DMA written\n");
649 if (dir == DMA_TO_DEVICE)
650 panic("DMA: Random memory could be DMA read\n");
651}
652
653/*
654 * Map a single buffer of the indicated size for DMA in streaming mode. The
655 * physical address to use is returned.
656 *
657 * Once the device is given the dma address, the device owns this memory until
658 * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
659 */
660dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
661 unsigned long offset, size_t size,
662 enum dma_data_direction dir,
663 struct dma_attrs *attrs)
664{
665 phys_addr_t phys = page_to_phys(page) + offset;
666 dma_addr_t dev_addr = phys_to_dma(dev, phys);
667 void *map;
668
669 BUG_ON(dir == DMA_NONE);
670 /*
671 * If the address happens to be in the device's DMA window,
672 * we can safely return the device addr and not worry about bounce
673 * buffering it.
674 */
675 if (dma_capable(dev, dev_addr, size) && !swiotlb_force)
676 return dev_addr;
677
678 /*
679 * Oh well, have to allocate and map a bounce buffer.
680 */
681 map = map_single(dev, phys, size, dir);
682 if (!map) {
683 swiotlb_full(dev, size, dir, 1);
684 map = io_tlb_overflow_buffer;
685 }
686
687 dev_addr = swiotlb_virt_to_bus(dev, map);
688
689 /*
690 * Ensure that the address returned is DMA'ble
691 */
692 if (!dma_capable(dev, dev_addr, size)) {
693 swiotlb_tbl_unmap_single(dev, map, size, dir);
694 dev_addr = swiotlb_virt_to_bus(dev, io_tlb_overflow_buffer);
695 }
696
697 return dev_addr;
698}
699EXPORT_SYMBOL_GPL(swiotlb_map_page);
700
701/*
702 * Unmap a single streaming mode DMA translation. The dma_addr and size must
703 * match what was provided for in a previous swiotlb_map_page call. All
704 * other usages are undefined.
705 *
706 * After this call, reads by the cpu to the buffer are guaranteed to see
707 * whatever the device wrote there.
708 */
709static void unmap_single(struct device *hwdev, dma_addr_t dev_addr,
710 size_t size, enum dma_data_direction dir)
711{
712 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
713
714 BUG_ON(dir == DMA_NONE);
715
716 if (is_swiotlb_buffer(paddr)) {
717 swiotlb_tbl_unmap_single(hwdev, phys_to_virt(paddr), size, dir);
718 return;
719 }
720
721 if (dir != DMA_FROM_DEVICE)
722 return;
723
724 /*
725 * phys_to_virt doesn't work with hihgmem page but we could
726 * call dma_mark_clean() with hihgmem page here. However, we
727 * are fine since dma_mark_clean() is null on POWERPC. We can
728 * make dma_mark_clean() take a physical address if necessary.
729 */
730 dma_mark_clean(phys_to_virt(paddr), size);
731}
732
733void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
734 size_t size, enum dma_data_direction dir,
735 struct dma_attrs *attrs)
736{
737 unmap_single(hwdev, dev_addr, size, dir);
738}
739EXPORT_SYMBOL_GPL(swiotlb_unmap_page);
740
741/*
742 * Make physical memory consistent for a single streaming mode DMA translation
743 * after a transfer.
744 *
745 * If you perform a swiotlb_map_page() but wish to interrogate the buffer
746 * using the cpu, yet do not wish to teardown the dma mapping, you must
747 * call this function before doing so. At the next point you give the dma
748 * address back to the card, you must first perform a
749 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
750 */
751static void
752swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
753 size_t size, enum dma_data_direction dir,
754 enum dma_sync_target target)
755{
756 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
757
758 BUG_ON(dir == DMA_NONE);
759
760 if (is_swiotlb_buffer(paddr)) {
761 swiotlb_tbl_sync_single(hwdev, phys_to_virt(paddr), size, dir,
762 target);
763 return;
764 }
765
766 if (dir != DMA_FROM_DEVICE)
767 return;
768
769 dma_mark_clean(phys_to_virt(paddr), size);
770}
771
772void
773swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
774 size_t size, enum dma_data_direction dir)
775{
776 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
777}
778EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
779
780void
781swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
782 size_t size, enum dma_data_direction dir)
783{
784 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
785}
786EXPORT_SYMBOL(swiotlb_sync_single_for_device);
787
788/*
789 * Map a set of buffers described by scatterlist in streaming mode for DMA.
790 * This is the scatter-gather version of the above swiotlb_map_page
791 * interface. Here the scatter gather list elements are each tagged with the
792 * appropriate dma address and length. They are obtained via
793 * sg_dma_{address,length}(SG).
794 *
795 * NOTE: An implementation may be able to use a smaller number of
796 * DMA address/length pairs than there are SG table elements.
797 * (for example via virtual mapping capabilities)
798 * The routine returns the number of addr/length pairs actually
799 * used, at most nents.
800 *
801 * Device ownership issues as mentioned above for swiotlb_map_page are the
802 * same here.
803 */
804int
805swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
806 enum dma_data_direction dir, struct dma_attrs *attrs)
807{
808 struct scatterlist *sg;
809 int i;
810
811 BUG_ON(dir == DMA_NONE);
812
813 for_each_sg(sgl, sg, nelems, i) {
814 phys_addr_t paddr = sg_phys(sg);
815 dma_addr_t dev_addr = phys_to_dma(hwdev, paddr);
816
817 if (swiotlb_force ||
818 !dma_capable(hwdev, dev_addr, sg->length)) {
819 void *map = map_single(hwdev, sg_phys(sg),
820 sg->length, dir);
821 if (!map) {
822 /* Don't panic here, we expect map_sg users
823 to do proper error handling. */
824 swiotlb_full(hwdev, sg->length, dir, 0);
825 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
826 attrs);
827 sgl[0].dma_length = 0;
828 return 0;
829 }
830 sg->dma_address = swiotlb_virt_to_bus(hwdev, map);
831 } else
832 sg->dma_address = dev_addr;
833 sg->dma_length = sg->length;
834 }
835 return nelems;
836}
837EXPORT_SYMBOL(swiotlb_map_sg_attrs);
838
839int
840swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
841 enum dma_data_direction dir)
842{
843 return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
844}
845EXPORT_SYMBOL(swiotlb_map_sg);
846
847/*
848 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
849 * concerning calls here are the same as for swiotlb_unmap_page() above.
850 */
851void
852swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
853 int nelems, enum dma_data_direction dir, struct dma_attrs *attrs)
854{
855 struct scatterlist *sg;
856 int i;
857
858 BUG_ON(dir == DMA_NONE);
859
860 for_each_sg(sgl, sg, nelems, i)
861 unmap_single(hwdev, sg->dma_address, sg->dma_length, dir);
862
863}
864EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
865
866void
867swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
868 enum dma_data_direction dir)
869{
870 return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
871}
872EXPORT_SYMBOL(swiotlb_unmap_sg);
873
874/*
875 * Make physical memory consistent for a set of streaming mode DMA translations
876 * after a transfer.
877 *
878 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
879 * and usage.
880 */
881static void
882swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
883 int nelems, enum dma_data_direction dir,
884 enum dma_sync_target target)
885{
886 struct scatterlist *sg;
887 int i;
888
889 for_each_sg(sgl, sg, nelems, i)
890 swiotlb_sync_single(hwdev, sg->dma_address,
891 sg->dma_length, dir, target);
892}
893
894void
895swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
896 int nelems, enum dma_data_direction dir)
897{
898 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
899}
900EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
901
902void
903swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
904 int nelems, enum dma_data_direction dir)
905{
906 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
907}
908EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
909
910int
911swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
912{
913 return (dma_addr == swiotlb_virt_to_bus(hwdev, io_tlb_overflow_buffer));
914}
915EXPORT_SYMBOL(swiotlb_dma_mapping_error);
916
917/*
918 * Return whether the given device DMA address mask can be supported
919 * properly. For example, if your device can only drive the low 24-bits
920 * during bus mastering, then you would pass 0x00ffffff as the mask to
921 * this function.
922 */
923int
924swiotlb_dma_supported(struct device *hwdev, u64 mask)
925{
926 return swiotlb_virt_to_bus(hwdev, io_tlb_end - 1) <= mask;
927}
928EXPORT_SYMBOL(swiotlb_dma_supported);