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v6.8
   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Copyright (C) ST-Ericsson SA 2010
   4 *
 
   5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
   6 * Author: Rabin Vincent <rabin.vincent@stericsson.com>
   7 * Author: Mattias Wallin <mattias.wallin@stericsson.com>
   8 */
   9
  10#include <linux/kernel.h>
  11#include <linux/slab.h>
  12#include <linux/init.h>
  13#include <linux/irq.h>
  14#include <linux/irqdomain.h>
  15#include <linux/delay.h>
  16#include <linux/interrupt.h>
  17#include <linux/moduleparam.h>
  18#include <linux/platform_device.h>
  19#include <linux/mfd/core.h>
  20#include <linux/mfd/abx500.h>
  21#include <linux/mfd/abx500/ab8500.h>
  22#include <linux/mfd/dbx500-prcmu.h>
  23#include <linux/of.h>
  24
  25/*
  26 * Interrupt register offsets
  27 * Bank : 0x0E
  28 */
  29#define AB8500_IT_SOURCE1_REG		0x00
  30#define AB8500_IT_SOURCE2_REG		0x01
  31#define AB8500_IT_SOURCE3_REG		0x02
  32#define AB8500_IT_SOURCE4_REG		0x03
  33#define AB8500_IT_SOURCE5_REG		0x04
  34#define AB8500_IT_SOURCE6_REG		0x05
  35#define AB8500_IT_SOURCE7_REG		0x06
  36#define AB8500_IT_SOURCE8_REG		0x07
  37#define AB9540_IT_SOURCE13_REG		0x0C
  38#define AB8500_IT_SOURCE19_REG		0x12
  39#define AB8500_IT_SOURCE20_REG		0x13
  40#define AB8500_IT_SOURCE21_REG		0x14
  41#define AB8500_IT_SOURCE22_REG		0x15
  42#define AB8500_IT_SOURCE23_REG		0x16
  43#define AB8500_IT_SOURCE24_REG		0x17
  44
  45/*
  46 * latch registers
  47 */
  48#define AB8500_IT_LATCH1_REG		0x20
  49#define AB8500_IT_LATCH2_REG		0x21
  50#define AB8500_IT_LATCH3_REG		0x22
  51#define AB8500_IT_LATCH4_REG		0x23
  52#define AB8500_IT_LATCH5_REG		0x24
  53#define AB8500_IT_LATCH6_REG		0x25
  54#define AB8500_IT_LATCH7_REG		0x26
  55#define AB8500_IT_LATCH8_REG		0x27
  56#define AB8500_IT_LATCH9_REG		0x28
  57#define AB8500_IT_LATCH10_REG		0x29
  58#define AB8500_IT_LATCH12_REG		0x2B
  59#define AB9540_IT_LATCH13_REG		0x2C
  60#define AB8500_IT_LATCH19_REG		0x32
  61#define AB8500_IT_LATCH20_REG		0x33
  62#define AB8500_IT_LATCH21_REG		0x34
  63#define AB8500_IT_LATCH22_REG		0x35
  64#define AB8500_IT_LATCH23_REG		0x36
  65#define AB8500_IT_LATCH24_REG		0x37
  66
  67/*
  68 * mask registers
  69 */
  70
  71#define AB8500_IT_MASK1_REG		0x40
  72#define AB8500_IT_MASK2_REG		0x41
  73#define AB8500_IT_MASK3_REG		0x42
  74#define AB8500_IT_MASK4_REG		0x43
  75#define AB8500_IT_MASK5_REG		0x44
  76#define AB8500_IT_MASK6_REG		0x45
  77#define AB8500_IT_MASK7_REG		0x46
  78#define AB8500_IT_MASK8_REG		0x47
  79#define AB8500_IT_MASK9_REG		0x48
  80#define AB8500_IT_MASK10_REG		0x49
  81#define AB8500_IT_MASK11_REG		0x4A
  82#define AB8500_IT_MASK12_REG		0x4B
  83#define AB8500_IT_MASK13_REG		0x4C
  84#define AB8500_IT_MASK14_REG		0x4D
  85#define AB8500_IT_MASK15_REG		0x4E
  86#define AB8500_IT_MASK16_REG		0x4F
  87#define AB8500_IT_MASK17_REG		0x50
  88#define AB8500_IT_MASK18_REG		0x51
  89#define AB8500_IT_MASK19_REG		0x52
  90#define AB8500_IT_MASK20_REG		0x53
  91#define AB8500_IT_MASK21_REG		0x54
  92#define AB8500_IT_MASK22_REG		0x55
  93#define AB8500_IT_MASK23_REG		0x56
  94#define AB8500_IT_MASK24_REG		0x57
  95#define AB8500_IT_MASK25_REG		0x58
  96
  97/*
  98 * latch hierarchy registers
  99 */
 100#define AB8500_IT_LATCHHIER1_REG	0x60
 101#define AB8500_IT_LATCHHIER2_REG	0x61
 102#define AB8500_IT_LATCHHIER3_REG	0x62
 103#define AB8540_IT_LATCHHIER4_REG	0x63
 104
 105#define AB8500_IT_LATCHHIER_NUM		3
 106#define AB8540_IT_LATCHHIER_NUM		4
 107
 108#define AB8500_REV_REG			0x80
 109#define AB8500_IC_NAME_REG		0x82
 110#define AB8500_SWITCH_OFF_STATUS	0x00
 111
 112#define AB8500_TURN_ON_STATUS		0x00
 113#define AB8505_TURN_ON_STATUS_2		0x04
 114
 115#define AB8500_CH_USBCH_STAT1_REG	0x02
 116#define VBUS_DET_DBNC100		0x02
 117#define VBUS_DET_DBNC1			0x01
 118
 119static DEFINE_SPINLOCK(on_stat_lock);
 120static u8 turn_on_stat_mask = 0xFF;
 121static u8 turn_on_stat_set;
 122
 123#define AB9540_MODEM_CTRL2_REG			0x23
 124#define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT	BIT(2)
 125
 126/*
 127 * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt
 128 * numbers are indexed into this array with (num / 8). The interupts are
 129 * defined in linux/mfd/ab8500.h
 130 *
 131 * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
 132 * offset 0.
 133 */
 134/* AB8500 support */
 135static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = {
 136	0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21,
 137};
 138
 139/* AB9540 / AB8505 support */
 140static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = {
 141	0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22, 23
 142};
 143
 144/* AB8540 support */
 145static const int ab8540_irq_regoffset[AB8540_NUM_IRQ_REGS] = {
 146	0, 1, 2, 3, 4, -1, -1, -1, -1, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22,
 147	23, 25, 26, 27, 28, 29, 30, 31,
 148};
 149
 150static const char ab8500_version_str[][7] = {
 151	[AB8500_VERSION_AB8500] = "AB8500",
 152	[AB8500_VERSION_AB8505] = "AB8505",
 153	[AB8500_VERSION_AB9540] = "AB9540",
 154	[AB8500_VERSION_AB8540] = "AB8540",
 155};
 156
 157static int ab8500_prcmu_write(struct ab8500 *ab8500, u16 addr, u8 data)
 158{
 159	int ret;
 160
 161	ret = prcmu_abb_write((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
 162	if (ret < 0)
 163		dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
 164	return ret;
 165}
 166
 167static int ab8500_prcmu_write_masked(struct ab8500 *ab8500, u16 addr, u8 mask,
 168	u8 data)
 169{
 170	int ret;
 171
 172	ret = prcmu_abb_write_masked((u8)(addr >> 8), (u8)(addr & 0xFF), &data,
 173		&mask, 1);
 174	if (ret < 0)
 175		dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
 176	return ret;
 177}
 178
 179static int ab8500_prcmu_read(struct ab8500 *ab8500, u16 addr)
 180{
 181	int ret;
 182	u8 data;
 183
 184	ret = prcmu_abb_read((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
 185	if (ret < 0) {
 186		dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
 187		return ret;
 188	}
 189	return (int)data;
 190}
 191
 192static int ab8500_get_chip_id(struct device *dev)
 193{
 194	struct ab8500 *ab8500;
 195
 196	if (!dev)
 197		return -EINVAL;
 198	ab8500 = dev_get_drvdata(dev->parent);
 199	return ab8500 ? (int)ab8500->chip_id : -EINVAL;
 200}
 201
 202static int set_register_interruptible(struct ab8500 *ab8500, u8 bank,
 203	u8 reg, u8 data)
 204{
 205	int ret;
 206	/*
 207	 * Put the u8 bank and u8 register together into a an u16.
 208	 * The bank on higher 8 bits and register in lower 8 bits.
 209	 */
 210	u16 addr = ((u16)bank) << 8 | reg;
 211
 212	dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data);
 213
 214	mutex_lock(&ab8500->lock);
 
 
 215
 216	ret = ab8500->write(ab8500, addr, data);
 217	if (ret < 0)
 218		dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
 219			addr, ret);
 220	mutex_unlock(&ab8500->lock);
 221
 222	return ret;
 223}
 224
 225static int ab8500_set_register(struct device *dev, u8 bank,
 226	u8 reg, u8 value)
 227{
 228	int ret;
 229	struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
 230
 231	atomic_inc(&ab8500->transfer_ongoing);
 232	ret = set_register_interruptible(ab8500, bank, reg, value);
 233	atomic_dec(&ab8500->transfer_ongoing);
 234	return ret;
 235}
 236
 237static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,
 238	u8 reg, u8 *value)
 239{
 240	int ret;
 
 
 241	u16 addr = ((u16)bank) << 8 | reg;
 242
 243	mutex_lock(&ab8500->lock);
 
 
 244
 245	ret = ab8500->read(ab8500, addr);
 246	if (ret < 0)
 247		dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
 248			addr, ret);
 249	else
 250		*value = ret;
 251
 252	mutex_unlock(&ab8500->lock);
 253	dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret);
 254
 255	return (ret < 0) ? ret : 0;
 256}
 257
 258static int ab8500_get_register(struct device *dev, u8 bank,
 259	u8 reg, u8 *value)
 260{
 261	int ret;
 262	struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
 263
 264	atomic_inc(&ab8500->transfer_ongoing);
 265	ret = get_register_interruptible(ab8500, bank, reg, value);
 266	atomic_dec(&ab8500->transfer_ongoing);
 267	return ret;
 268}
 269
 270static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank,
 271	u8 reg, u8 bitmask, u8 bitvalues)
 272{
 273	int ret;
 
 
 
 274	u16 addr = ((u16)bank) << 8 | reg;
 275
 276	mutex_lock(&ab8500->lock);
 277
 278	if (ab8500->write_masked == NULL) {
 279		u8 data;
 280
 281		ret = ab8500->read(ab8500, addr);
 282		if (ret < 0) {
 283			dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
 284				addr, ret);
 285			goto out;
 286		}
 287
 288		data = (u8)ret;
 289		data = (~bitmask & data) | (bitmask & bitvalues);
 290
 291		ret = ab8500->write(ab8500, addr, data);
 292		if (ret < 0)
 293			dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
 294				addr, ret);
 295
 296		dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr,
 297			data);
 
 
 298		goto out;
 299	}
 300	ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues);
 
 
 
 
 301	if (ret < 0)
 302		dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr,
 303			ret);
 
 
 304out:
 305	mutex_unlock(&ab8500->lock);
 306	return ret;
 307}
 308
 309static int ab8500_mask_and_set_register(struct device *dev,
 310	u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
 311{
 312	int ret;
 313	struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
 314
 315	atomic_inc(&ab8500->transfer_ongoing);
 316	ret = mask_and_set_register_interruptible(ab8500, bank, reg,
 317						 bitmask, bitvalues);
 318	atomic_dec(&ab8500->transfer_ongoing);
 319	return ret;
 320}
 321
 322static struct abx500_ops ab8500_ops = {
 323	.get_chip_id = ab8500_get_chip_id,
 324	.get_register = ab8500_get_register,
 325	.set_register = ab8500_set_register,
 326	.get_register_page = NULL,
 327	.set_register_page = NULL,
 328	.mask_and_set_register = ab8500_mask_and_set_register,
 329	.event_registers_startup_state_get = NULL,
 330	.startup_irq_enabled = NULL,
 331	.dump_all_banks = ab8500_dump_all_banks,
 332};
 333
 334static void ab8500_irq_lock(struct irq_data *data)
 335{
 336	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
 337
 338	mutex_lock(&ab8500->irq_lock);
 339	atomic_inc(&ab8500->transfer_ongoing);
 340}
 341
 342static void ab8500_irq_sync_unlock(struct irq_data *data)
 343{
 344	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
 345	int i;
 346
 347	for (i = 0; i < ab8500->mask_size; i++) {
 348		u8 old = ab8500->oldmask[i];
 349		u8 new = ab8500->mask[i];
 350		int reg;
 351
 352		if (new == old)
 353			continue;
 354
 355		/*
 356		 * Interrupt register 12 doesn't exist prior to AB8500 version
 357		 * 2.0
 358		 */
 359		if (ab8500->irq_reg_offset[i] == 11 &&
 360			is_ab8500_1p1_or_earlier(ab8500))
 361			continue;
 362
 363		if (ab8500->irq_reg_offset[i] < 0)
 364			continue;
 365
 366		ab8500->oldmask[i] = new;
 367
 368		reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i];
 369		set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new);
 370	}
 371	atomic_dec(&ab8500->transfer_ongoing);
 372	mutex_unlock(&ab8500->irq_lock);
 373}
 374
 375static void ab8500_irq_mask(struct irq_data *data)
 376{
 377	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
 378	int offset = data->hwirq;
 379	int index = offset / 8;
 380	int mask = 1 << (offset % 8);
 381
 382	ab8500->mask[index] |= mask;
 383
 384	/* The AB8500 GPIOs have two interrupts each (rising & falling). */
 385	if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R)
 386		ab8500->mask[index + 2] |= mask;
 387	if (offset >= AB9540_INT_GPIO50R && offset <= AB9540_INT_GPIO54R)
 388		ab8500->mask[index + 1] |= mask;
 389	if (offset == AB8540_INT_GPIO43R || offset == AB8540_INT_GPIO44R)
 390		/* Here the falling IRQ is one bit lower */
 391		ab8500->mask[index] |= (mask << 1);
 392}
 393
 394static void ab8500_irq_unmask(struct irq_data *data)
 395{
 396	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
 397	unsigned int type = irqd_get_trigger_type(data);
 398	int offset = data->hwirq;
 399	int index = offset / 8;
 400	int mask = 1 << (offset % 8);
 401
 402	if (type & IRQ_TYPE_EDGE_RISING)
 403		ab8500->mask[index] &= ~mask;
 404
 405	/* The AB8500 GPIOs have two interrupts each (rising & falling). */
 406	if (type & IRQ_TYPE_EDGE_FALLING) {
 407		if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R)
 408			ab8500->mask[index + 2] &= ~mask;
 409		else if (offset >= AB9540_INT_GPIO50R &&
 410			 offset <= AB9540_INT_GPIO54R)
 411			ab8500->mask[index + 1] &= ~mask;
 412		else if (offset == AB8540_INT_GPIO43R ||
 413			 offset == AB8540_INT_GPIO44R)
 414			/* Here the falling IRQ is one bit lower */
 415			ab8500->mask[index] &= ~(mask << 1);
 416		else
 417			ab8500->mask[index] &= ~mask;
 418	} else {
 419		/* Satisfies the case where type is not set. */
 420		ab8500->mask[index] &= ~mask;
 421	}
 422}
 423
 424static int ab8500_irq_set_type(struct irq_data *data, unsigned int type)
 425{
 426	return 0;
 427}
 428
 429static struct irq_chip ab8500_irq_chip = {
 430	.name			= "ab8500",
 431	.irq_bus_lock		= ab8500_irq_lock,
 432	.irq_bus_sync_unlock	= ab8500_irq_sync_unlock,
 433	.irq_mask		= ab8500_irq_mask,
 434	.irq_disable		= ab8500_irq_mask,
 435	.irq_unmask		= ab8500_irq_unmask,
 436	.irq_set_type		= ab8500_irq_set_type,
 437};
 438
 439static void update_latch_offset(u8 *offset, int i)
 440{
 441	/* Fix inconsistent ITFromLatch25 bit mapping... */
 442	if (unlikely(*offset == 17))
 443		*offset = 24;
 444	/* Fix inconsistent ab8540 bit mapping... */
 445	if (unlikely(*offset == 16))
 446		*offset = 25;
 447	if ((i == 3) && (*offset >= 24))
 448		*offset += 2;
 449}
 450
 451static int ab8500_handle_hierarchical_line(struct ab8500 *ab8500,
 452					int latch_offset, u8 latch_val)
 453{
 454	int int_bit, line, i;
 455
 456	for (i = 0; i < ab8500->mask_size; i++)
 457		if (ab8500->irq_reg_offset[i] == latch_offset)
 458			break;
 459
 460	if (i >= ab8500->mask_size) {
 461		dev_err(ab8500->dev, "Register offset 0x%2x not declared\n",
 462				latch_offset);
 463		return -ENXIO;
 464	}
 465
 466	/* ignore masked out interrupts */
 467	latch_val &= ~ab8500->mask[i];
 468
 469	while (latch_val) {
 470		int_bit = __ffs(latch_val);
 471		line = (i << 3) + int_bit;
 472		latch_val &= ~(1 << int_bit);
 473
 474		/*
 475		 * This handles the falling edge hwirqs from the GPIO
 476		 * lines. Route them back to the line registered for the
 477		 * rising IRQ, as this is merely a flag for the same IRQ
 478		 * in linux terms.
 479		 */
 480		if (line >= AB8500_INT_GPIO6F && line <= AB8500_INT_GPIO41F)
 481			line -= 16;
 482		if (line >= AB9540_INT_GPIO50F && line <= AB9540_INT_GPIO54F)
 483			line -= 8;
 484		if (line == AB8540_INT_GPIO43F || line == AB8540_INT_GPIO44F)
 485			line += 1;
 486
 487		handle_nested_irq(irq_find_mapping(ab8500->domain, line));
 488	}
 489
 490	return 0;
 491}
 492
 493static int ab8500_handle_hierarchical_latch(struct ab8500 *ab8500,
 494					int hier_offset, u8 hier_val)
 495{
 496	int latch_bit, status;
 497	u8 latch_offset, latch_val;
 498
 499	do {
 500		latch_bit = __ffs(hier_val);
 501		latch_offset = (hier_offset << 3) + latch_bit;
 502
 503		update_latch_offset(&latch_offset, hier_offset);
 504
 505		status = get_register_interruptible(ab8500,
 506				AB8500_INTERRUPT,
 507				AB8500_IT_LATCH1_REG + latch_offset,
 508				&latch_val);
 509		if (status < 0 || latch_val == 0)
 510			goto discard;
 511
 512		status = ab8500_handle_hierarchical_line(ab8500,
 513				latch_offset, latch_val);
 514		if (status < 0)
 515			return status;
 516discard:
 517		hier_val &= ~(1 << latch_bit);
 518	} while (hier_val);
 519
 520	return 0;
 521}
 522
 523static irqreturn_t ab8500_hierarchical_irq(int irq, void *dev)
 524{
 525	struct ab8500 *ab8500 = dev;
 526	u8 i;
 527
 528	dev_vdbg(ab8500->dev, "interrupt\n");
 529
 530	/*  Hierarchical interrupt version */
 531	for (i = 0; i < (ab8500->it_latchhier_num); i++) {
 532		int status;
 533		u8 hier_val;
 
 
 
 
 534
 535		status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
 536			AB8500_IT_LATCHHIER1_REG + i, &hier_val);
 537		if (status < 0 || hier_val == 0)
 538			continue;
 539
 540		status = ab8500_handle_hierarchical_latch(ab8500, i, hier_val);
 541		if (status < 0)
 542			break;
 
 
 
 
 543	}
 
 544	return IRQ_HANDLED;
 545}
 546
 547static int ab8500_irq_map(struct irq_domain *d, unsigned int virq,
 548				irq_hw_number_t hwirq)
 549{
 550	struct ab8500 *ab8500 = d->host_data;
 551
 552	if (!ab8500)
 553		return -EINVAL;
 554
 555	irq_set_chip_data(virq, ab8500);
 556	irq_set_chip_and_handler(virq, &ab8500_irq_chip,
 557				handle_simple_irq);
 558	irq_set_nested_thread(virq, 1);
 559	irq_set_noprobe(virq);
 
 
 
 
 
 
 560
 561	return 0;
 562}
 563
 564static const struct irq_domain_ops ab8500_irq_ops = {
 565	.map    = ab8500_irq_map,
 566	.xlate  = irq_domain_xlate_twocell,
 567};
 568
 569static int ab8500_irq_init(struct ab8500 *ab8500, struct device_node *np)
 570{
 571	int num_irqs;
 572
 573	if (is_ab8540(ab8500))
 574		num_irqs = AB8540_NR_IRQS;
 575	else if (is_ab9540(ab8500))
 576		num_irqs = AB9540_NR_IRQS;
 577	else if (is_ab8505(ab8500))
 578		num_irqs = AB8505_NR_IRQS;
 579	else
 580		num_irqs = AB8500_NR_IRQS;
 581
 582	/* If ->irq_base is zero this will give a linear mapping */
 583	ab8500->domain = irq_domain_add_simple(ab8500->dev->of_node,
 584					       num_irqs, 0,
 585					       &ab8500_irq_ops, ab8500);
 586
 587	if (!ab8500->domain) {
 588		dev_err(ab8500->dev, "Failed to create irqdomain\n");
 589		return -ENODEV;
 590	}
 591
 592	return 0;
 593}
 594
 595int ab8500_suspend(struct ab8500 *ab8500)
 596{
 597	if (atomic_read(&ab8500->transfer_ongoing))
 598		return -EINVAL;
 
 
 
 
 599
 600	return 0;
 601}
 
 
 
 
 
 
 
 
 
 
 
 
 602
 603static const struct mfd_cell ab8500_bm_devs[] = {
 604	MFD_CELL_OF("ab8500-charger", NULL, NULL, 0, 0,
 605		    "stericsson,ab8500-charger"),
 606	MFD_CELL_OF("ab8500-btemp", NULL, NULL, 0, 0,
 607		    "stericsson,ab8500-btemp"),
 608	MFD_CELL_OF("ab8500-fg", NULL, NULL, 0, 0,
 609		    "stericsson,ab8500-fg"),
 610	MFD_CELL_OF("ab8500-chargalg", NULL, NULL, 0, 0,
 611		    "stericsson,ab8500-chargalg"),
 
 
 
 
 612};
 613
 614static const struct mfd_cell ab8500_devs[] = {
 615	MFD_CELL_OF("ab8500-sysctrl",
 616		    NULL, NULL, 0, 0, "stericsson,ab8500-sysctrl"),
 617	MFD_CELL_OF("ab8500-ext-regulator",
 618		    NULL, NULL, 0, 0, "stericsson,ab8500-ext-regulator"),
 619	MFD_CELL_OF("ab8500-regulator",
 620		    NULL, NULL, 0, 0, "stericsson,ab8500-regulator"),
 621	MFD_CELL_OF("ab8500-clk",
 622		    NULL, NULL, 0, 0, "stericsson,ab8500-clk"),
 623	MFD_CELL_OF("ab8500-gpadc",
 624		    NULL, NULL, 0, 0, "stericsson,ab8500-gpadc"),
 625	MFD_CELL_OF("ab8500-rtc",
 626		    NULL, NULL, 0, 0, "stericsson,ab8500-rtc"),
 627	MFD_CELL_OF("ab8500-acc-det",
 628		    NULL, NULL, 0, 0, "stericsson,ab8500-acc-det"),
 629	MFD_CELL_OF("ab8500-poweron-key",
 630		    NULL, NULL, 0, 0, "stericsson,ab8500-poweron-key"),
 631	MFD_CELL_OF("ab8500-pwm",
 632		    NULL, NULL, 0, 1, "stericsson,ab8500-pwm"),
 633	MFD_CELL_OF("ab8500-pwm",
 634		    NULL, NULL, 0, 2, "stericsson,ab8500-pwm"),
 635	MFD_CELL_OF("ab8500-pwm",
 636		    NULL, NULL, 0, 3, "stericsson,ab8500-pwm"),
 637	MFD_CELL_OF("ab8500-denc",
 638		    NULL, NULL, 0, 0, "stericsson,ab8500-denc"),
 639	MFD_CELL_OF("pinctrl-ab8500",
 640		    NULL, NULL, 0, 0, "stericsson,ab8500-gpio"),
 641	MFD_CELL_OF("abx500-temp",
 642		    NULL, NULL, 0, 0, "stericsson,abx500-temp"),
 643	MFD_CELL_OF("ab8500-usb",
 644		    NULL, NULL, 0, 0, "stericsson,ab8500-usb"),
 645	MFD_CELL_OF("ab8500-codec",
 646		    NULL, NULL, 0, 0, "stericsson,ab8500-codec"),
 647};
 648
 649static const struct mfd_cell ab9540_devs[] = {
 650	{
 651		.name = "ab8500-sysctrl",
 
 
 
 652	},
 653	{
 654		.name = "ab8500-ext-regulator",
 
 
 
 655	},
 656	{
 657		.name = "ab8500-regulator",
 
 
 
 658	},
 659	{
 660		.name = "abx500-clk",
 661		.of_compatible = "stericsson,abx500-clk",
 
 
 662	},
 663	{
 664		.name = "ab8500-gpadc",
 665		.of_compatible = "stericsson,ab8500-gpadc",
 
 
 666	},
 667	{
 668		.name = "ab8500-rtc",
 
 
 
 669	},
 
 
 
 670	{
 671		.name = "ab8500-acc-det",
 
 
 
 672	},
 673	{
 674		.name = "ab8500-poweron-key",
 
 
 
 675	},
 676	{
 677		.name = "ab8500-pwm",
 678		.id = 1,
 
 
 679	},
 680	{
 681		.name = "abx500-temp",
 
 
 
 682	},
 683	{
 684		.name = "pinctrl-ab9540",
 685		.of_compatible = "stericsson,ab9540-gpio",
 
 
 686	},
 687	{
 688		.name = "ab9540-usb",
 
 
 
 689	},
 690	{
 691		.name = "ab9540-codec",
 
 
 
 692	},
 693	{
 694		.name = "ab-iddet",
 
 
 
 695	},
 696};
 697
 698/* Device list for ab8505  */
 699static const struct mfd_cell ab8505_devs[] = {
 700	{
 701		.name = "ab8500-sysctrl",
 702		.of_compatible = "stericsson,ab8500-sysctrl",
 
 
 703	},
 704	{
 705		.name = "ab8500-regulator",
 706		.of_compatible = "stericsson,ab8505-regulator",
 
 
 707	},
 708	{
 709		.name = "abx500-clk",
 710		.of_compatible = "stericsson,ab8500-clk",
 
 
 711	},
 712	{
 713		.name = "ab8500-gpadc",
 714		.of_compatible = "stericsson,ab8500-gpadc",
 
 
 715	},
 716	{
 717		.name = "ab8500-rtc",
 718		.of_compatible = "stericsson,ab8500-rtc",
 
 
 719	},
 720	{
 721		.name = "ab8500-acc-det",
 722		.of_compatible = "stericsson,ab8500-acc-det",
 
 
 723	},
 724	{
 725		.name = "ab8500-poweron-key",
 726		.of_compatible = "stericsson,ab8500-poweron-key",
 
 
 727	},
 
 
 
 728	{
 729		.name = "ab8500-pwm",
 730		.of_compatible = "stericsson,ab8500-pwm",
 731		.id = 1,
 
 732	},
 733	{
 734		.name = "pinctrl-ab8505",
 735		.of_compatible = "stericsson,ab8505-gpio",
 
 
 736	},
 737	{
 738		.name = "ab8500-usb",
 739		.of_compatible = "stericsson,ab8500-usb",
 
 
 740	},
 741	{
 742		.name = "ab8500-codec",
 743		.of_compatible = "stericsson,ab8500-codec",
 
 
 744	},
 745	{
 746		.name = "ab-iddet",
 
 
 
 747	},
 748};
 749
 750static const struct mfd_cell ab8540_devs[] = {
 751	{
 752		.name = "ab8500-sysctrl",
 
 
 
 753	},
 754	{
 755		.name = "ab8500-ext-regulator",
 
 
 
 756	},
 757	{
 758		.name = "ab8500-regulator",
 
 
 
 759	},
 760	{
 761		.name = "abx500-clk",
 762		.of_compatible = "stericsson,abx500-clk",
 
 
 763	},
 764	{
 765		.name = "ab8500-gpadc",
 766		.of_compatible = "stericsson,ab8500-gpadc",
 
 
 
 
 
 
 
 
 
 
 
 
 
 767	},
 768	{
 769		.name = "ab8500-acc-det",
 
 
 
 770	},
 
 
 
 771	{
 772		.name = "ab8500-poweron-key",
 
 
 
 773	},
 774	{
 775		.name = "ab8500-pwm",
 776		.id = 1,
 
 
 777	},
 778	{
 779		.name = "abx500-temp",
 
 
 
 780	},
 781	{
 782		.name = "pinctrl-ab8540",
 
 
 
 783	},
 784	{
 785		.name = "ab8540-usb",
 
 
 
 786	},
 787	{
 788		.name = "ab8540-codec",
 
 
 
 789	},
 790	{
 791		.name = "ab-iddet",
 
 
 
 792	},
 793};
 794
 795static const struct mfd_cell ab8540_cut1_devs[] = {
 796	{
 797		.name = "ab8500-rtc",
 798		.of_compatible = "stericsson,ab8500-rtc",
 
 
 799	},
 800};
 801
 802static const struct mfd_cell ab8540_cut2_devs[] = {
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 803	{
 804		.name = "ab8540-rtc",
 805		.of_compatible = "stericsson,ab8540-rtc",
 
 
 
 
 806	},
 807};
 808
 809static ssize_t chip_id_show(struct device *dev,
 810			    struct device_attribute *attr, char *buf)
 811{
 812	struct ab8500 *ab8500;
 813
 814	ab8500 = dev_get_drvdata(dev);
 815
 816	return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL);
 817}
 818
 819/*
 820 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
 821 * 0x01 Swoff bit programming
 822 * 0x02 Thermal protection activation
 823 * 0x04 Vbat lower then BattOk falling threshold
 824 * 0x08 Watchdog expired
 825 * 0x10 Non presence of 32kHz clock
 826 * 0x20 Battery level lower than power on reset threshold
 827 * 0x40 Power on key 1 pressed longer than 10 seconds
 828 * 0x80 DB8500 thermal shutdown
 829 */
 830static ssize_t switch_off_status_show(struct device *dev,
 831				      struct device_attribute *attr, char *buf)
 832{
 833	int ret;
 834	u8 value;
 835	struct ab8500 *ab8500;
 836
 837	ab8500 = dev_get_drvdata(dev);
 838	ret = get_register_interruptible(ab8500, AB8500_RTC,
 839		AB8500_SWITCH_OFF_STATUS, &value);
 840	if (ret < 0)
 841		return ret;
 842	return sprintf(buf, "%#x\n", value);
 843}
 844
 845/* use mask and set to override the register turn_on_stat value */
 846void ab8500_override_turn_on_stat(u8 mask, u8 set)
 847{
 848	spin_lock(&on_stat_lock);
 849	turn_on_stat_mask = mask;
 850	turn_on_stat_set = set;
 851	spin_unlock(&on_stat_lock);
 852}
 853
 854/*
 855 * ab8500 has turned on due to (TURN_ON_STATUS):
 856 * 0x01 PORnVbat
 857 * 0x02 PonKey1dbF
 858 * 0x04 PonKey2dbF
 859 * 0x08 RTCAlarm
 860 * 0x10 MainChDet
 861 * 0x20 VbusDet
 862 * 0x40 UsbIDDetect
 863 * 0x80 Reserved
 864 */
 865static ssize_t turn_on_status_show(struct device *dev,
 866				   struct device_attribute *attr, char *buf)
 867{
 868	int ret;
 869	u8 value;
 870	struct ab8500 *ab8500;
 871
 872	ab8500 = dev_get_drvdata(dev);
 873	ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
 874		AB8500_TURN_ON_STATUS, &value);
 875	if (ret < 0)
 876		return ret;
 877
 878	/*
 879	 * In L9540, turn_on_status register is not updated correctly if
 880	 * the device is rebooted with AC/USB charger connected. Due to
 881	 * this, the device boots android instead of entering into charge
 882	 * only mode. Read the AC/USB status register to detect the charger
 883	 * presence and update the turn on status manually.
 884	 */
 885	if (is_ab9540(ab8500)) {
 886		spin_lock(&on_stat_lock);
 887		value = (value & turn_on_stat_mask) | turn_on_stat_set;
 888		spin_unlock(&on_stat_lock);
 889	}
 890
 891	return sprintf(buf, "%#x\n", value);
 892}
 893
 894static ssize_t turn_on_status_2_show(struct device *dev,
 895				     struct device_attribute *attr, char *buf)
 896{
 897	int ret;
 898	u8 value;
 899	struct ab8500 *ab8500;
 900
 901	ab8500 = dev_get_drvdata(dev);
 902	ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
 903		AB8505_TURN_ON_STATUS_2, &value);
 904	if (ret < 0)
 905		return ret;
 906	return sprintf(buf, "%#x\n", (value & 0x1));
 907}
 908
 909static ssize_t dbbrstn_show(struct device *dev,
 910			    struct device_attribute *attr, char *buf)
 911{
 912	struct ab8500 *ab8500;
 913	int ret;
 914	u8 value;
 915
 916	ab8500 = dev_get_drvdata(dev);
 917
 918	ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2,
 919		AB9540_MODEM_CTRL2_REG, &value);
 920	if (ret < 0)
 921		return ret;
 922
 923	return sprintf(buf, "%d\n",
 924			(value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0);
 925}
 926
 927static ssize_t dbbrstn_store(struct device *dev,
 928	struct device_attribute *attr, const char *buf, size_t count)
 929{
 930	struct ab8500 *ab8500;
 931	int ret = count;
 932	int err;
 933	u8 bitvalues;
 934
 935	ab8500 = dev_get_drvdata(dev);
 936
 937	if (count > 0) {
 938		switch (buf[0]) {
 939		case '0':
 940			bitvalues = 0;
 941			break;
 942		case '1':
 943			bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT;
 944			break;
 945		default:
 946			goto exit;
 947		}
 948
 949		err = mask_and_set_register_interruptible(ab8500,
 950			AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG,
 951			AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues);
 952		if (err)
 953			dev_info(ab8500->dev,
 954				"Failed to set DBBRSTN %c, err %#x\n",
 955				buf[0], err);
 956	}
 957
 958exit:
 959	return ret;
 960}
 961
 962static DEVICE_ATTR_RO(chip_id);
 963static DEVICE_ATTR_RO(switch_off_status);
 964static DEVICE_ATTR_RO(turn_on_status);
 965static DEVICE_ATTR_RO(turn_on_status_2);
 966static DEVICE_ATTR_RW(dbbrstn);
 967
 968static struct attribute *ab8500_sysfs_entries[] = {
 969	&dev_attr_chip_id.attr,
 970	&dev_attr_switch_off_status.attr,
 971	&dev_attr_turn_on_status.attr,
 972	NULL,
 973};
 974
 975static struct attribute *ab8505_sysfs_entries[] = {
 976	&dev_attr_turn_on_status_2.attr,
 977	NULL,
 978};
 979
 980static struct attribute *ab9540_sysfs_entries[] = {
 981	&dev_attr_chip_id.attr,
 982	&dev_attr_switch_off_status.attr,
 983	&dev_attr_turn_on_status.attr,
 984	&dev_attr_dbbrstn.attr,
 985	NULL,
 986};
 987
 988static const struct attribute_group ab8500_attr_group = {
 989	.attrs	= ab8500_sysfs_entries,
 990};
 991
 992static const struct attribute_group ab8505_attr_group = {
 993	.attrs	= ab8505_sysfs_entries,
 994};
 995
 996static const struct attribute_group ab9540_attr_group = {
 997	.attrs	= ab9540_sysfs_entries,
 998};
 999
1000static int ab8500_probe(struct platform_device *pdev)
1001{
1002	static const char * const switch_off_status[] = {
1003		"Swoff bit programming",
1004		"Thermal protection activation",
1005		"Vbat lower then BattOk falling threshold",
1006		"Watchdog expired",
1007		"Non presence of 32kHz clock",
1008		"Battery level lower than power on reset threshold",
1009		"Power on key 1 pressed longer than 10 seconds",
1010		"DB8500 thermal shutdown"};
1011	static const char * const turn_on_status[] = {
1012		"Battery rising (Vbat)",
1013		"Power On Key 1 dbF",
1014		"Power On Key 2 dbF",
1015		"RTC Alarm",
1016		"Main Charger Detect",
1017		"Vbus Detect (USB)",
1018		"USB ID Detect",
1019		"UART Factory Mode Detect"};
1020	const struct platform_device_id *platid = platform_get_device_id(pdev);
1021	enum ab8500_version version = AB8500_VERSION_UNDEFINED;
1022	struct device_node *np = pdev->dev.of_node;
1023	struct ab8500 *ab8500;
1024	int ret;
1025	int i;
1026	int irq;
1027	u8 value;
1028
1029	ab8500 = devm_kzalloc(&pdev->dev, sizeof(*ab8500), GFP_KERNEL);
1030	if (!ab8500)
1031		return -ENOMEM;
1032
1033	ab8500->dev = &pdev->dev;
1034
1035	irq = platform_get_irq(pdev, 0);
1036	if (irq < 0)
1037		return irq;
1038
1039	ab8500->irq = irq;
1040
1041	ab8500->read = ab8500_prcmu_read;
1042	ab8500->write = ab8500_prcmu_write;
1043	ab8500->write_masked = ab8500_prcmu_write_masked;
1044
1045	mutex_init(&ab8500->lock);
1046	mutex_init(&ab8500->irq_lock);
1047	atomic_set(&ab8500->transfer_ongoing, 0);
1048
1049	platform_set_drvdata(pdev, ab8500);
1050
1051	if (platid)
1052		version = platid->driver_data;
1053
1054	if (version != AB8500_VERSION_UNDEFINED)
1055		ab8500->version = version;
1056	else {
1057		ret = get_register_interruptible(ab8500, AB8500_MISC,
1058			AB8500_IC_NAME_REG, &value);
1059		if (ret < 0) {
1060			dev_err(&pdev->dev, "could not probe HW\n");
1061			return ret;
1062		}
1063
1064		ab8500->version = value;
1065	}
1066
1067	ret = get_register_interruptible(ab8500, AB8500_MISC,
1068		AB8500_REV_REG, &value);
1069	if (ret < 0)
1070		return ret;
1071
1072	ab8500->chip_id = value;
1073
1074	dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n",
1075			ab8500_version_str[ab8500->version],
1076			ab8500->chip_id >> 4,
1077			ab8500->chip_id & 0x0F);
1078
1079	/* Configure AB8540 */
1080	if (is_ab8540(ab8500)) {
1081		ab8500->mask_size = AB8540_NUM_IRQ_REGS;
1082		ab8500->irq_reg_offset = ab8540_irq_regoffset;
1083		ab8500->it_latchhier_num = AB8540_IT_LATCHHIER_NUM;
1084	} /* Configure AB8500 or AB9540 IRQ */
1085	else if (is_ab9540(ab8500) || is_ab8505(ab8500)) {
1086		ab8500->mask_size = AB9540_NUM_IRQ_REGS;
1087		ab8500->irq_reg_offset = ab9540_irq_regoffset;
1088		ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM;
1089	} else {
1090		ab8500->mask_size = AB8500_NUM_IRQ_REGS;
1091		ab8500->irq_reg_offset = ab8500_irq_regoffset;
1092		ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM;
1093	}
1094	ab8500->mask = devm_kzalloc(&pdev->dev, ab8500->mask_size,
1095				    GFP_KERNEL);
1096	if (!ab8500->mask)
1097		return -ENOMEM;
1098	ab8500->oldmask = devm_kzalloc(&pdev->dev, ab8500->mask_size,
1099				       GFP_KERNEL);
1100	if (!ab8500->oldmask)
1101		return -ENOMEM;
1102
1103	/*
1104	 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
1105	 * 0x01 Swoff bit programming
1106	 * 0x02 Thermal protection activation
1107	 * 0x04 Vbat lower then BattOk falling threshold
1108	 * 0x08 Watchdog expired
1109	 * 0x10 Non presence of 32kHz clock
1110	 * 0x20 Battery level lower than power on reset threshold
1111	 * 0x40 Power on key 1 pressed longer than 10 seconds
1112	 * 0x80 DB8500 thermal shutdown
1113	 */
1114
1115	ret = get_register_interruptible(ab8500, AB8500_RTC,
1116		AB8500_SWITCH_OFF_STATUS, &value);
1117	if (ret < 0)
1118		return ret;
1119	dev_info(ab8500->dev, "switch off cause(s) (%#x): ", value);
1120
1121	if (value) {
1122		for (i = 0; i < ARRAY_SIZE(switch_off_status); i++) {
1123			if (value & 1)
1124				pr_cont(" \"%s\"", switch_off_status[i]);
1125			value = value >> 1;
1126
1127		}
1128		pr_cont("\n");
1129	} else {
1130		pr_cont(" None\n");
1131	}
1132	ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
1133		AB8500_TURN_ON_STATUS, &value);
1134	if (ret < 0)
1135		return ret;
1136	dev_info(ab8500->dev, "turn on reason(s) (%#x): ", value);
1137
1138	if (value) {
1139		for (i = 0; i < ARRAY_SIZE(turn_on_status); i++) {
1140			if (value & 1)
1141				pr_cont("\"%s\" ", turn_on_status[i]);
1142			value = value >> 1;
1143		}
1144		pr_cont("\n");
1145	} else {
1146		pr_cont("None\n");
1147	}
1148
1149	if (is_ab9540(ab8500)) {
1150		ret = get_register_interruptible(ab8500, AB8500_CHARGER,
1151			AB8500_CH_USBCH_STAT1_REG, &value);
1152		if (ret < 0)
1153			return ret;
1154		if ((value & VBUS_DET_DBNC1) && (value & VBUS_DET_DBNC100))
1155			ab8500_override_turn_on_stat(~AB8500_POW_KEY_1_ON,
1156						     AB8500_VBUS_DET);
1157	}
1158
1159	/* Clear and mask all interrupts */
1160	for (i = 0; i < ab8500->mask_size; i++) {
1161		/*
1162		 * Interrupt register 12 doesn't exist prior to AB8500 version
1163		 * 2.0
1164		 */
1165		if (ab8500->irq_reg_offset[i] == 11 &&
1166				is_ab8500_1p1_or_earlier(ab8500))
1167			continue;
1168
1169		if (ab8500->irq_reg_offset[i] < 0)
1170			continue;
1171
1172		get_register_interruptible(ab8500, AB8500_INTERRUPT,
1173			AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i],
1174			&value);
1175		set_register_interruptible(ab8500, AB8500_INTERRUPT,
1176			AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff);
1177	}
1178
1179	ret = abx500_register_ops(ab8500->dev, &ab8500_ops);
1180	if (ret)
1181		return ret;
1182
1183	for (i = 0; i < ab8500->mask_size; i++)
1184		ab8500->mask[i] = ab8500->oldmask[i] = 0xff;
1185
1186	ret = ab8500_irq_init(ab8500, np);
1187	if (ret)
1188		return ret;
1189
1190	ret = devm_request_threaded_irq(&pdev->dev, ab8500->irq, NULL,
1191			ab8500_hierarchical_irq,
1192			IRQF_ONESHOT | IRQF_NO_SUSPEND,
1193			"ab8500", ab8500);
1194	if (ret)
1195		return ret;
1196
1197	if (is_ab9540(ab8500))
1198		ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs,
1199				ARRAY_SIZE(ab9540_devs), NULL,
1200				0, ab8500->domain);
1201	else if (is_ab8540(ab8500)) {
1202		ret = mfd_add_devices(ab8500->dev, 0, ab8540_devs,
1203			      ARRAY_SIZE(ab8540_devs), NULL,
1204			      0, ab8500->domain);
1205		if (ret)
1206			return ret;
1207
1208		if (is_ab8540_1p2_or_earlier(ab8500))
1209			ret = mfd_add_devices(ab8500->dev, 0, ab8540_cut1_devs,
1210			      ARRAY_SIZE(ab8540_cut1_devs), NULL,
1211			      0, ab8500->domain);
1212		else /* ab8540 >= cut2 */
1213			ret = mfd_add_devices(ab8500->dev, 0, ab8540_cut2_devs,
1214			      ARRAY_SIZE(ab8540_cut2_devs), NULL,
1215			      0, ab8500->domain);
1216	} else if (is_ab8505(ab8500))
1217		ret = mfd_add_devices(ab8500->dev, 0, ab8505_devs,
1218			      ARRAY_SIZE(ab8505_devs), NULL,
1219			      0, ab8500->domain);
1220	else
1221		ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs,
1222				ARRAY_SIZE(ab8500_devs), NULL,
1223				0, ab8500->domain);
1224	if (ret)
1225		return ret;
1226
1227	/* Add battery management devices */
1228	ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs,
1229			      ARRAY_SIZE(ab8500_bm_devs), NULL,
1230			      0, ab8500->domain);
1231	if (ret)
1232		dev_err(ab8500->dev, "error adding bm devices\n");
1233
1234	if (((is_ab8505(ab8500) || is_ab9540(ab8500)) &&
1235			ab8500->chip_id >= AB8500_CUT2P0) || is_ab8540(ab8500))
1236		ret = sysfs_create_group(&ab8500->dev->kobj,
1237					&ab9540_attr_group);
1238	else
1239		ret = sysfs_create_group(&ab8500->dev->kobj,
1240					&ab8500_attr_group);
1241
1242	if ((is_ab8505(ab8500) || is_ab9540(ab8500)) &&
1243			ab8500->chip_id >= AB8500_CUT2P0)
1244		ret = sysfs_create_group(&ab8500->dev->kobj,
1245					 &ab8505_attr_group);
1246
 
1247	if (ret)
1248		dev_err(ab8500->dev, "error creating sysfs entries\n");
1249
1250	return ret;
1251}
1252
1253static const struct platform_device_id ab8500_id[] = {
1254	{ "ab8500-core", AB8500_VERSION_AB8500 },
1255	{ "ab8505-core", AB8500_VERSION_AB8505 },
1256	{ "ab9540-i2c", AB8500_VERSION_AB9540 },
1257	{ "ab8540-i2c", AB8500_VERSION_AB8540 },
1258	{ }
1259};
1260
1261static struct platform_driver ab8500_core_driver = {
1262	.driver = {
1263		.name = "ab8500-core",
1264		.suppress_bind_attrs = true,
1265	},
1266	.probe	= ab8500_probe,
1267	.id_table = ab8500_id,
1268};
1269
1270static int __init ab8500_core_init(void)
1271{
1272	return platform_driver_register(&ab8500_core_driver);
 
 
 
 
 
 
 
1273}
1274core_initcall(ab8500_core_init);
 
 
 
v3.1
 
  1/*
  2 * Copyright (C) ST-Ericsson SA 2010
  3 *
  4 * License Terms: GNU General Public License v2
  5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
  6 * Author: Rabin Vincent <rabin.vincent@stericsson.com>
  7 * Author: Mattias Wallin <mattias.wallin@stericsson.com>
  8 */
  9
 10#include <linux/kernel.h>
 11#include <linux/slab.h>
 12#include <linux/init.h>
 13#include <linux/irq.h>
 
 14#include <linux/delay.h>
 15#include <linux/interrupt.h>
 16#include <linux/module.h>
 17#include <linux/platform_device.h>
 18#include <linux/mfd/core.h>
 19#include <linux/mfd/abx500.h>
 20#include <linux/mfd/ab8500.h>
 21#include <linux/regulator/ab8500.h>
 
 22
 23/*
 24 * Interrupt register offsets
 25 * Bank : 0x0E
 26 */
 27#define AB8500_IT_SOURCE1_REG		0x00
 28#define AB8500_IT_SOURCE2_REG		0x01
 29#define AB8500_IT_SOURCE3_REG		0x02
 30#define AB8500_IT_SOURCE4_REG		0x03
 31#define AB8500_IT_SOURCE5_REG		0x04
 32#define AB8500_IT_SOURCE6_REG		0x05
 33#define AB8500_IT_SOURCE7_REG		0x06
 34#define AB8500_IT_SOURCE8_REG		0x07
 
 35#define AB8500_IT_SOURCE19_REG		0x12
 36#define AB8500_IT_SOURCE20_REG		0x13
 37#define AB8500_IT_SOURCE21_REG		0x14
 38#define AB8500_IT_SOURCE22_REG		0x15
 39#define AB8500_IT_SOURCE23_REG		0x16
 40#define AB8500_IT_SOURCE24_REG		0x17
 41
 42/*
 43 * latch registers
 44 */
 45#define AB8500_IT_LATCH1_REG		0x20
 46#define AB8500_IT_LATCH2_REG		0x21
 47#define AB8500_IT_LATCH3_REG		0x22
 48#define AB8500_IT_LATCH4_REG		0x23
 49#define AB8500_IT_LATCH5_REG		0x24
 50#define AB8500_IT_LATCH6_REG		0x25
 51#define AB8500_IT_LATCH7_REG		0x26
 52#define AB8500_IT_LATCH8_REG		0x27
 53#define AB8500_IT_LATCH9_REG		0x28
 54#define AB8500_IT_LATCH10_REG		0x29
 55#define AB8500_IT_LATCH12_REG		0x2B
 
 56#define AB8500_IT_LATCH19_REG		0x32
 57#define AB8500_IT_LATCH20_REG		0x33
 58#define AB8500_IT_LATCH21_REG		0x34
 59#define AB8500_IT_LATCH22_REG		0x35
 60#define AB8500_IT_LATCH23_REG		0x36
 61#define AB8500_IT_LATCH24_REG		0x37
 62
 63/*
 64 * mask registers
 65 */
 66
 67#define AB8500_IT_MASK1_REG		0x40
 68#define AB8500_IT_MASK2_REG		0x41
 69#define AB8500_IT_MASK3_REG		0x42
 70#define AB8500_IT_MASK4_REG		0x43
 71#define AB8500_IT_MASK5_REG		0x44
 72#define AB8500_IT_MASK6_REG		0x45
 73#define AB8500_IT_MASK7_REG		0x46
 74#define AB8500_IT_MASK8_REG		0x47
 75#define AB8500_IT_MASK9_REG		0x48
 76#define AB8500_IT_MASK10_REG		0x49
 77#define AB8500_IT_MASK11_REG		0x4A
 78#define AB8500_IT_MASK12_REG		0x4B
 79#define AB8500_IT_MASK13_REG		0x4C
 80#define AB8500_IT_MASK14_REG		0x4D
 81#define AB8500_IT_MASK15_REG		0x4E
 82#define AB8500_IT_MASK16_REG		0x4F
 83#define AB8500_IT_MASK17_REG		0x50
 84#define AB8500_IT_MASK18_REG		0x51
 85#define AB8500_IT_MASK19_REG		0x52
 86#define AB8500_IT_MASK20_REG		0x53
 87#define AB8500_IT_MASK21_REG		0x54
 88#define AB8500_IT_MASK22_REG		0x55
 89#define AB8500_IT_MASK23_REG		0x56
 90#define AB8500_IT_MASK24_REG		0x57
 
 
 
 
 
 
 
 
 
 
 
 
 91
 92#define AB8500_REV_REG			0x80
 
 93#define AB8500_SWITCH_OFF_STATUS	0x00
 94
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 95/*
 96 * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt
 97 * numbers are indexed into this array with (num / 8).
 
 98 *
 99 * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
100 * offset 0.
101 */
 
102static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = {
103	0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21,
104};
105
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
106static int ab8500_get_chip_id(struct device *dev)
107{
108	struct ab8500 *ab8500;
109
110	if (!dev)
111		return -EINVAL;
112	ab8500 = dev_get_drvdata(dev->parent);
113	return ab8500 ? (int)ab8500->chip_id : -EINVAL;
114}
115
116static int set_register_interruptible(struct ab8500 *ab8500, u8 bank,
117	u8 reg, u8 data)
118{
119	int ret;
120	/*
121	 * Put the u8 bank and u8 register together into a an u16.
122	 * The bank on higher 8 bits and register in lower 8 bits.
123	 * */
124	u16 addr = ((u16)bank) << 8 | reg;
125
126	dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data);
127
128	ret = mutex_lock_interruptible(&ab8500->lock);
129	if (ret)
130		return ret;
131
132	ret = ab8500->write(ab8500, addr, data);
133	if (ret < 0)
134		dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
135			addr, ret);
136	mutex_unlock(&ab8500->lock);
137
138	return ret;
139}
140
141static int ab8500_set_register(struct device *dev, u8 bank,
142	u8 reg, u8 value)
143{
 
144	struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
145
146	return set_register_interruptible(ab8500, bank, reg, value);
 
 
 
147}
148
149static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,
150	u8 reg, u8 *value)
151{
152	int ret;
153	/* put the u8 bank and u8 reg together into a an u16.
154	 * bank on higher 8 bits and reg in lower */
155	u16 addr = ((u16)bank) << 8 | reg;
156
157	ret = mutex_lock_interruptible(&ab8500->lock);
158	if (ret)
159		return ret;
160
161	ret = ab8500->read(ab8500, addr);
162	if (ret < 0)
163		dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
164			addr, ret);
165	else
166		*value = ret;
167
168	mutex_unlock(&ab8500->lock);
169	dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret);
170
171	return ret;
172}
173
174static int ab8500_get_register(struct device *dev, u8 bank,
175	u8 reg, u8 *value)
176{
 
177	struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
178
179	return get_register_interruptible(ab8500, bank, reg, value);
 
 
 
180}
181
182static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank,
183	u8 reg, u8 bitmask, u8 bitvalues)
184{
185	int ret;
186	u8 data;
187	/* put the u8 bank and u8 reg together into a an u16.
188	 * bank on higher 8 bits and reg in lower */
189	u16 addr = ((u16)bank) << 8 | reg;
190
191	ret = mutex_lock_interruptible(&ab8500->lock);
192	if (ret)
193		return ret;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
194
195	ret = ab8500->read(ab8500, addr);
196	if (ret < 0) {
197		dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
198			addr, ret);
199		goto out;
200	}
201
202	data = (u8)ret;
203	data = (~bitmask & data) | (bitmask & bitvalues);
204
205	ret = ab8500->write(ab8500, addr, data);
206	if (ret < 0)
207		dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
208			addr, ret);
209
210	dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, data);
211out:
212	mutex_unlock(&ab8500->lock);
213	return ret;
214}
215
216static int ab8500_mask_and_set_register(struct device *dev,
217	u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
218{
 
219	struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
220
221	return mask_and_set_register_interruptible(ab8500, bank, reg,
222		bitmask, bitvalues);
223
 
 
224}
225
226static struct abx500_ops ab8500_ops = {
227	.get_chip_id = ab8500_get_chip_id,
228	.get_register = ab8500_get_register,
229	.set_register = ab8500_set_register,
230	.get_register_page = NULL,
231	.set_register_page = NULL,
232	.mask_and_set_register = ab8500_mask_and_set_register,
233	.event_registers_startup_state_get = NULL,
234	.startup_irq_enabled = NULL,
 
235};
236
237static void ab8500_irq_lock(struct irq_data *data)
238{
239	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
240
241	mutex_lock(&ab8500->irq_lock);
 
242}
243
244static void ab8500_irq_sync_unlock(struct irq_data *data)
245{
246	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
247	int i;
248
249	for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) {
250		u8 old = ab8500->oldmask[i];
251		u8 new = ab8500->mask[i];
252		int reg;
253
254		if (new == old)
255			continue;
256
257		/* Interrupt register 12 doesn't exist prior to version 2.0 */
258		if (ab8500_irq_regoffset[i] == 11 &&
259			ab8500->chip_id < AB8500_CUT2P0)
 
 
 
 
 
 
260			continue;
261
262		ab8500->oldmask[i] = new;
263
264		reg = AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i];
265		set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new);
266	}
267
268	mutex_unlock(&ab8500->irq_lock);
269}
270
271static void ab8500_irq_mask(struct irq_data *data)
272{
273	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
274	int offset = data->irq - ab8500->irq_base;
275	int index = offset / 8;
276	int mask = 1 << (offset % 8);
277
278	ab8500->mask[index] |= mask;
 
 
 
 
 
 
 
 
 
279}
280
281static void ab8500_irq_unmask(struct irq_data *data)
282{
283	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
284	int offset = data->irq - ab8500->irq_base;
 
285	int index = offset / 8;
286	int mask = 1 << (offset % 8);
287
288	ab8500->mask[index] &= ~mask;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
289}
290
291static struct irq_chip ab8500_irq_chip = {
292	.name			= "ab8500",
293	.irq_bus_lock		= ab8500_irq_lock,
294	.irq_bus_sync_unlock	= ab8500_irq_sync_unlock,
295	.irq_mask		= ab8500_irq_mask,
 
296	.irq_unmask		= ab8500_irq_unmask,
 
297};
298
299static irqreturn_t ab8500_irq(int irq, void *dev)
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
300{
301	struct ab8500 *ab8500 = dev;
302	int i;
303
304	dev_vdbg(ab8500->dev, "interrupt\n");
305
306	for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) {
307		int regoffset = ab8500_irq_regoffset[i];
308		int status;
309		u8 value;
310
311		/* Interrupt register 12 doesn't exist prior to version 2.0 */
312		if (regoffset == 11 && ab8500->chip_id < AB8500_CUT2P0)
313			continue;
314
315		status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
316			AB8500_IT_LATCH1_REG + regoffset, &value);
317		if (status < 0 || value == 0)
318			continue;
319
320		do {
321			int bit = __ffs(value);
322			int line = i * 8 + bit;
323
324			handle_nested_irq(ab8500->irq_base + line);
325			value &= ~(1 << bit);
326		} while (value);
327	}
328
329	return IRQ_HANDLED;
330}
331
332static int ab8500_irq_init(struct ab8500 *ab8500)
 
333{
334	int base = ab8500->irq_base;
335	int irq;
 
 
336
337	for (irq = base; irq < base + AB8500_NR_IRQS; irq++) {
338		irq_set_chip_data(irq, ab8500);
339		irq_set_chip_and_handler(irq, &ab8500_irq_chip,
340					 handle_simple_irq);
341		irq_set_nested_thread(irq, 1);
342#ifdef CONFIG_ARM
343		set_irq_flags(irq, IRQF_VALID);
344#else
345		irq_set_noprobe(irq);
346#endif
347	}
348
349	return 0;
350}
351
352static void ab8500_irq_remove(struct ab8500 *ab8500)
 
 
 
 
 
353{
354	int base = ab8500->irq_base;
355	int irq;
 
 
 
 
 
 
 
 
356
357	for (irq = base; irq < base + AB8500_NR_IRQS; irq++) {
358#ifdef CONFIG_ARM
359		set_irq_flags(irq, 0);
360#endif
361		irq_set_chip_and_handler(irq, NULL, NULL);
362		irq_set_chip_data(irq, NULL);
 
 
363	}
 
 
364}
365
366static struct resource __devinitdata ab8500_gpio_resources[] = {
367	{
368		.name	= "GPIO_INT6",
369		.start	= AB8500_INT_GPIO6R,
370		.end	= AB8500_INT_GPIO41F,
371		.flags	= IORESOURCE_IRQ,
372	}
373};
374
375static struct resource __devinitdata ab8500_gpadc_resources[] = {
376	{
377		.name	= "HW_CONV_END",
378		.start	= AB8500_INT_GP_HW_ADC_CONV_END,
379		.end	= AB8500_INT_GP_HW_ADC_CONV_END,
380		.flags	= IORESOURCE_IRQ,
381	},
382	{
383		.name	= "SW_CONV_END",
384		.start	= AB8500_INT_GP_SW_ADC_CONV_END,
385		.end	= AB8500_INT_GP_SW_ADC_CONV_END,
386		.flags	= IORESOURCE_IRQ,
387	},
388};
389
390static struct resource __devinitdata ab8500_rtc_resources[] = {
391	{
392		.name	= "60S",
393		.start	= AB8500_INT_RTC_60S,
394		.end	= AB8500_INT_RTC_60S,
395		.flags	= IORESOURCE_IRQ,
396	},
397	{
398		.name	= "ALARM",
399		.start	= AB8500_INT_RTC_ALARM,
400		.end	= AB8500_INT_RTC_ALARM,
401		.flags	= IORESOURCE_IRQ,
402	},
403};
404
405static struct resource __devinitdata ab8500_poweronkey_db_resources[] = {
406	{
407		.name	= "ONKEY_DBF",
408		.start	= AB8500_INT_PON_KEY1DB_F,
409		.end	= AB8500_INT_PON_KEY1DB_F,
410		.flags	= IORESOURCE_IRQ,
411	},
412	{
413		.name	= "ONKEY_DBR",
414		.start	= AB8500_INT_PON_KEY1DB_R,
415		.end	= AB8500_INT_PON_KEY1DB_R,
416		.flags	= IORESOURCE_IRQ,
417	},
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
418};
419
420static struct resource __devinitdata ab8500_av_acc_detect_resources[] = {
421	{
422	       .name = "ACC_DETECT_1DB_F",
423	       .start = AB8500_INT_ACC_DETECT_1DB_F,
424	       .end = AB8500_INT_ACC_DETECT_1DB_F,
425	       .flags = IORESOURCE_IRQ,
426	},
427	{
428	       .name = "ACC_DETECT_1DB_R",
429	       .start = AB8500_INT_ACC_DETECT_1DB_R,
430	       .end = AB8500_INT_ACC_DETECT_1DB_R,
431	       .flags = IORESOURCE_IRQ,
432	},
433	{
434	       .name = "ACC_DETECT_21DB_F",
435	       .start = AB8500_INT_ACC_DETECT_21DB_F,
436	       .end = AB8500_INT_ACC_DETECT_21DB_F,
437	       .flags = IORESOURCE_IRQ,
438	},
439	{
440	       .name = "ACC_DETECT_21DB_R",
441	       .start = AB8500_INT_ACC_DETECT_21DB_R,
442	       .end = AB8500_INT_ACC_DETECT_21DB_R,
443	       .flags = IORESOURCE_IRQ,
444	},
445	{
446	       .name = "ACC_DETECT_22DB_F",
447	       .start = AB8500_INT_ACC_DETECT_22DB_F,
448	       .end = AB8500_INT_ACC_DETECT_22DB_F,
449	       .flags = IORESOURCE_IRQ,
450	},
451	{
452	       .name = "ACC_DETECT_22DB_R",
453	       .start = AB8500_INT_ACC_DETECT_22DB_R,
454	       .end = AB8500_INT_ACC_DETECT_22DB_R,
455	       .flags = IORESOURCE_IRQ,
456	},
457};
458
459static struct resource __devinitdata ab8500_charger_resources[] = {
460	{
461		.name = "MAIN_CH_UNPLUG_DET",
462		.start = AB8500_INT_MAIN_CH_UNPLUG_DET,
463		.end = AB8500_INT_MAIN_CH_UNPLUG_DET,
464		.flags = IORESOURCE_IRQ,
465	},
466	{
467		.name = "MAIN_CHARGE_PLUG_DET",
468		.start = AB8500_INT_MAIN_CH_PLUG_DET,
469		.end = AB8500_INT_MAIN_CH_PLUG_DET,
470		.flags = IORESOURCE_IRQ,
471	},
472	{
473		.name = "VBUS_DET_R",
474		.start = AB8500_INT_VBUS_DET_R,
475		.end = AB8500_INT_VBUS_DET_R,
476		.flags = IORESOURCE_IRQ,
477	},
478	{
479		.name = "VBUS_DET_F",
480		.start = AB8500_INT_VBUS_DET_F,
481		.end = AB8500_INT_VBUS_DET_F,
482		.flags = IORESOURCE_IRQ,
483	},
484	{
485		.name = "USB_LINK_STATUS",
486		.start = AB8500_INT_USB_LINK_STATUS,
487		.end = AB8500_INT_USB_LINK_STATUS,
488		.flags = IORESOURCE_IRQ,
489	},
490	{
491		.name = "USB_CHARGE_DET_DONE",
492		.start = AB8500_INT_USB_CHG_DET_DONE,
493		.end = AB8500_INT_USB_CHG_DET_DONE,
494		.flags = IORESOURCE_IRQ,
495	},
496	{
497		.name = "VBUS_OVV",
498		.start = AB8500_INT_VBUS_OVV,
499		.end = AB8500_INT_VBUS_OVV,
500		.flags = IORESOURCE_IRQ,
501	},
502	{
503		.name = "USB_CH_TH_PROT_R",
504		.start = AB8500_INT_USB_CH_TH_PROT_R,
505		.end = AB8500_INT_USB_CH_TH_PROT_R,
506		.flags = IORESOURCE_IRQ,
507	},
 
 
 
 
508	{
509		.name = "USB_CH_TH_PROT_F",
510		.start = AB8500_INT_USB_CH_TH_PROT_F,
511		.end = AB8500_INT_USB_CH_TH_PROT_F,
512		.flags = IORESOURCE_IRQ,
513	},
514	{
515		.name = "MAIN_EXT_CH_NOT_OK",
516		.start = AB8500_INT_MAIN_EXT_CH_NOT_OK,
517		.end = AB8500_INT_MAIN_EXT_CH_NOT_OK,
518		.flags = IORESOURCE_IRQ,
519	},
520	{
521		.name = "MAIN_CH_TH_PROT_R",
522		.start = AB8500_INT_MAIN_CH_TH_PROT_R,
523		.end = AB8500_INT_MAIN_CH_TH_PROT_R,
524		.flags = IORESOURCE_IRQ,
525	},
526	{
527		.name = "MAIN_CH_TH_PROT_F",
528		.start = AB8500_INT_MAIN_CH_TH_PROT_F,
529		.end = AB8500_INT_MAIN_CH_TH_PROT_F,
530		.flags = IORESOURCE_IRQ,
531	},
532	{
533		.name = "USB_CHARGER_NOT_OKR",
534		.start = AB8500_INT_USB_CHARGER_NOT_OK,
535		.end = AB8500_INT_USB_CHARGER_NOT_OK,
536		.flags = IORESOURCE_IRQ,
537	},
538	{
539		.name = "USB_CHARGER_NOT_OKF",
540		.start = AB8500_INT_USB_CHARGER_NOT_OKF,
541		.end = AB8500_INT_USB_CHARGER_NOT_OKF,
542		.flags = IORESOURCE_IRQ,
543	},
544	{
545		.name = "CH_WD_EXP",
546		.start = AB8500_INT_CH_WD_EXP,
547		.end = AB8500_INT_CH_WD_EXP,
548		.flags = IORESOURCE_IRQ,
549	},
550};
551
552static struct resource __devinitdata ab8500_btemp_resources[] = {
553	{
554		.name = "BAT_CTRL_INDB",
555		.start = AB8500_INT_BAT_CTRL_INDB,
556		.end = AB8500_INT_BAT_CTRL_INDB,
557		.flags = IORESOURCE_IRQ,
558	},
559	{
560		.name = "BTEMP_LOW",
561		.start = AB8500_INT_BTEMP_LOW,
562		.end = AB8500_INT_BTEMP_LOW,
563		.flags = IORESOURCE_IRQ,
564	},
565	{
566		.name = "BTEMP_HIGH",
567		.start = AB8500_INT_BTEMP_HIGH,
568		.end = AB8500_INT_BTEMP_HIGH,
569		.flags = IORESOURCE_IRQ,
570	},
571	{
572		.name = "BTEMP_LOW_MEDIUM",
573		.start = AB8500_INT_BTEMP_LOW_MEDIUM,
574		.end = AB8500_INT_BTEMP_LOW_MEDIUM,
575		.flags = IORESOURCE_IRQ,
576	},
577	{
578		.name = "BTEMP_MEDIUM_HIGH",
579		.start = AB8500_INT_BTEMP_MEDIUM_HIGH,
580		.end = AB8500_INT_BTEMP_MEDIUM_HIGH,
581		.flags = IORESOURCE_IRQ,
582	},
583};
584
585static struct resource __devinitdata ab8500_fg_resources[] = {
586	{
587		.name = "NCONV_ACCU",
588		.start = AB8500_INT_CCN_CONV_ACC,
589		.end = AB8500_INT_CCN_CONV_ACC,
590		.flags = IORESOURCE_IRQ,
591	},
592	{
593		.name = "BATT_OVV",
594		.start = AB8500_INT_BATT_OVV,
595		.end = AB8500_INT_BATT_OVV,
596		.flags = IORESOURCE_IRQ,
597	},
598	{
599		.name = "LOW_BAT_F",
600		.start = AB8500_INT_LOW_BAT_F,
601		.end = AB8500_INT_LOW_BAT_F,
602		.flags = IORESOURCE_IRQ,
603	},
604	{
605		.name = "LOW_BAT_R",
606		.start = AB8500_INT_LOW_BAT_R,
607		.end = AB8500_INT_LOW_BAT_R,
608		.flags = IORESOURCE_IRQ,
609	},
610	{
611		.name = "CC_INT_CALIB",
612		.start = AB8500_INT_CC_INT_CALIB,
613		.end = AB8500_INT_CC_INT_CALIB,
614		.flags = IORESOURCE_IRQ,
615	},
616};
617
618static struct resource __devinitdata ab8500_chargalg_resources[] = {};
619
620static struct resource __devinitdata ab8500_debug_resources[] = {
621	{
622		.name	= "IRQ_FIRST",
623		.start	= AB8500_INT_MAIN_EXT_CH_NOT_OK,
624		.end	= AB8500_INT_MAIN_EXT_CH_NOT_OK,
625		.flags	= IORESOURCE_IRQ,
626	},
627	{
628		.name	= "IRQ_LAST",
629		.start	= AB8500_INT_USB_CHARGER_NOT_OKF,
630		.end	= AB8500_INT_USB_CHARGER_NOT_OKF,
631		.flags	= IORESOURCE_IRQ,
632	},
633};
634
635static struct resource __devinitdata ab8500_usb_resources[] = {
636	{
637		.name = "ID_WAKEUP_R",
638		.start = AB8500_INT_ID_WAKEUP_R,
639		.end = AB8500_INT_ID_WAKEUP_R,
640		.flags = IORESOURCE_IRQ,
641	},
642	{
643		.name = "ID_WAKEUP_F",
644		.start = AB8500_INT_ID_WAKEUP_F,
645		.end = AB8500_INT_ID_WAKEUP_F,
646		.flags = IORESOURCE_IRQ,
647	},
648	{
649		.name = "VBUS_DET_F",
650		.start = AB8500_INT_VBUS_DET_F,
651		.end = AB8500_INT_VBUS_DET_F,
652		.flags = IORESOURCE_IRQ,
653	},
654	{
655		.name = "VBUS_DET_R",
656		.start = AB8500_INT_VBUS_DET_R,
657		.end = AB8500_INT_VBUS_DET_R,
658		.flags = IORESOURCE_IRQ,
659	},
660	{
661		.name = "USB_LINK_STATUS",
662		.start = AB8500_INT_USB_LINK_STATUS,
663		.end = AB8500_INT_USB_LINK_STATUS,
664		.flags = IORESOURCE_IRQ,
665	},
666	{
667		.name = "USB_ADP_PROBE_PLUG",
668		.start = AB8500_INT_ADP_PROBE_PLUG,
669		.end = AB8500_INT_ADP_PROBE_PLUG,
670		.flags = IORESOURCE_IRQ,
671	},
672	{
673		.name = "USB_ADP_PROBE_UNPLUG",
674		.start = AB8500_INT_ADP_PROBE_UNPLUG,
675		.end = AB8500_INT_ADP_PROBE_UNPLUG,
676		.flags = IORESOURCE_IRQ,
677	},
678};
679
680static struct resource __devinitdata ab8500_temp_resources[] = {
681	{
682		.name  = "AB8500_TEMP_WARM",
683		.start = AB8500_INT_TEMP_WARM,
684		.end   = AB8500_INT_TEMP_WARM,
685		.flags = IORESOURCE_IRQ,
686	},
687};
688
689static struct mfd_cell __devinitdata ab8500_devs[] = {
690#ifdef CONFIG_DEBUG_FS
691	{
692		.name = "ab8500-debug",
693		.num_resources = ARRAY_SIZE(ab8500_debug_resources),
694		.resources = ab8500_debug_resources,
695	},
696#endif
697	{
698		.name = "ab8500-sysctrl",
699	},
700	{
701		.name = "ab8500-regulator",
702	},
703	{
704		.name = "ab8500-gpio",
705		.num_resources = ARRAY_SIZE(ab8500_gpio_resources),
706		.resources = ab8500_gpio_resources,
707	},
708	{
709		.name = "ab8500-gpadc",
710		.num_resources = ARRAY_SIZE(ab8500_gpadc_resources),
711		.resources = ab8500_gpadc_resources,
712	},
713	{
714		.name = "ab8500-rtc",
715		.num_resources = ARRAY_SIZE(ab8500_rtc_resources),
716		.resources = ab8500_rtc_resources,
717	},
718	{
719		.name = "ab8500-charger",
720		.num_resources = ARRAY_SIZE(ab8500_charger_resources),
721		.resources = ab8500_charger_resources,
722	},
723	{
724		.name = "ab8500-btemp",
725		.num_resources = ARRAY_SIZE(ab8500_btemp_resources),
726		.resources = ab8500_btemp_resources,
727	},
728	{
729		.name = "ab8500-fg",
730		.num_resources = ARRAY_SIZE(ab8500_fg_resources),
731		.resources = ab8500_fg_resources,
732	},
733	{
734		.name = "ab8500-chargalg",
735		.num_resources = ARRAY_SIZE(ab8500_chargalg_resources),
736		.resources = ab8500_chargalg_resources,
737	},
738	{
739		.name = "ab8500-acc-det",
740		.num_resources = ARRAY_SIZE(ab8500_av_acc_detect_resources),
741		.resources = ab8500_av_acc_detect_resources,
742	},
743	{
744		.name = "ab8500-codec",
745	},
746	{
747		.name = "ab8500-usb",
748		.num_resources = ARRAY_SIZE(ab8500_usb_resources),
749		.resources = ab8500_usb_resources,
750	},
751	{
752		.name = "ab8500-poweron-key",
753		.num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
754		.resources = ab8500_poweronkey_db_resources,
755	},
756	{
757		.name = "ab8500-pwm",
758		.id = 1,
759	},
760	{
761		.name = "ab8500-pwm",
762		.id = 2,
763	},
764	{
765		.name = "ab8500-pwm",
766		.id = 3,
767	},
768	{ .name = "ab8500-leds", },
769	{
770		.name = "ab8500-denc",
771	},
772	{
773		.name = "ab8500-temp",
774		.num_resources = ARRAY_SIZE(ab8500_temp_resources),
775		.resources = ab8500_temp_resources,
776	},
777};
778
779static ssize_t show_chip_id(struct device *dev,
780				struct device_attribute *attr, char *buf)
781{
782	struct ab8500 *ab8500;
783
784	ab8500 = dev_get_drvdata(dev);
 
785	return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL);
786}
787
788/*
789 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
790 * 0x01 Swoff bit programming
791 * 0x02 Thermal protection activation
792 * 0x04 Vbat lower then BattOk falling threshold
793 * 0x08 Watchdog expired
794 * 0x10 Non presence of 32kHz clock
795 * 0x20 Battery level lower than power on reset threshold
796 * 0x40 Power on key 1 pressed longer than 10 seconds
797 * 0x80 DB8500 thermal shutdown
798 */
799static ssize_t show_switch_off_status(struct device *dev,
800				struct device_attribute *attr, char *buf)
801{
802	int ret;
803	u8 value;
804	struct ab8500 *ab8500;
805
806	ab8500 = dev_get_drvdata(dev);
807	ret = get_register_interruptible(ab8500, AB8500_RTC,
808		AB8500_SWITCH_OFF_STATUS, &value);
809	if (ret < 0)
810		return ret;
811	return sprintf(buf, "%#x\n", value);
812}
813
814static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL);
815static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
816
817static struct attribute *ab8500_sysfs_entries[] = {
818	&dev_attr_chip_id.attr,
819	&dev_attr_switch_off_status.attr,
 
 
 
 
 
 
 
 
 
 
 
 
 
 
820	NULL,
821};
822
823static struct attribute_group ab8500_attr_group = {
824	.attrs	= ab8500_sysfs_entries,
825};
826
827int __devinit ab8500_init(struct ab8500 *ab8500)
 
 
 
 
 
 
 
 
828{
829	struct ab8500_platform_data *plat = dev_get_platdata(ab8500->dev);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
830	int ret;
831	int i;
 
832	u8 value;
833
834	if (plat)
835		ab8500->irq_base = plat->irq_base;
 
 
 
 
 
 
 
 
 
 
 
 
 
836
837	mutex_init(&ab8500->lock);
838	mutex_init(&ab8500->irq_lock);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
839
840	ret = get_register_interruptible(ab8500, AB8500_MISC,
841		AB8500_REV_REG, &value);
842	if (ret < 0)
843		return ret;
844
845	switch (value) {
846	case AB8500_CUTEARLY:
847	case AB8500_CUT1P0:
848	case AB8500_CUT1P1:
849	case AB8500_CUT2P0:
850	case AB8500_CUT3P0:
851		dev_info(ab8500->dev, "detected chip, revision: %#x\n", value);
852		break;
853	default:
854		dev_err(ab8500->dev, "unknown chip, revision: %#x\n", value);
855		return -EINVAL;
 
 
 
 
 
 
 
 
 
 
856	}
857	ab8500->chip_id = value;
 
 
 
 
 
 
 
858
859	/*
860	 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
861	 * 0x01 Swoff bit programming
862	 * 0x02 Thermal protection activation
863	 * 0x04 Vbat lower then BattOk falling threshold
864	 * 0x08 Watchdog expired
865	 * 0x10 Non presence of 32kHz clock
866	 * 0x20 Battery level lower than power on reset threshold
867	 * 0x40 Power on key 1 pressed longer than 10 seconds
868	 * 0x80 DB8500 thermal shutdown
869	 */
870
871	ret = get_register_interruptible(ab8500, AB8500_RTC,
872		AB8500_SWITCH_OFF_STATUS, &value);
873	if (ret < 0)
874		return ret;
875	dev_info(ab8500->dev, "switch off status: %#x", value);
876
877	if (plat && plat->init)
878		plat->init(ab8500);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
879
880	/* Clear and mask all interrupts */
881	for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) {
882		/* Interrupt register 12 doesn't exist prior to version 2.0 */
883		if (ab8500_irq_regoffset[i] == 11 &&
884			ab8500->chip_id < AB8500_CUT2P0)
 
 
 
 
 
 
885			continue;
886
887		get_register_interruptible(ab8500, AB8500_INTERRUPT,
888			AB8500_IT_LATCH1_REG + ab8500_irq_regoffset[i],
889			&value);
890		set_register_interruptible(ab8500, AB8500_INTERRUPT,
891			AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i], 0xff);
892	}
893
894	ret = abx500_register_ops(ab8500->dev, &ab8500_ops);
895	if (ret)
896		return ret;
897
898	for (i = 0; i < AB8500_NUM_IRQ_REGS; i++)
899		ab8500->mask[i] = ab8500->oldmask[i] = 0xff;
900
901	if (ab8500->irq_base) {
902		ret = ab8500_irq_init(ab8500);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
903		if (ret)
904			return ret;
905
906		ret = request_threaded_irq(ab8500->irq, NULL, ab8500_irq,
907					   IRQF_ONESHOT | IRQF_NO_SUSPEND,
908					   "ab8500", ab8500);
909		if (ret)
910			goto out_removeirq;
911	}
 
 
 
 
 
 
 
 
 
 
 
 
912
913	ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs,
914			      ARRAY_SIZE(ab8500_devs), NULL,
915			      ab8500->irq_base);
 
916	if (ret)
917		goto out_freeirq;
 
 
 
 
 
 
 
 
 
 
 
 
 
918
919	ret = sysfs_create_group(&ab8500->dev->kobj, &ab8500_attr_group);
920	if (ret)
921		dev_err(ab8500->dev, "error creating sysfs entries\n");
922
923	return ret;
 
 
 
 
 
 
 
 
 
924
925out_freeirq:
926	if (ab8500->irq_base) {
927		free_irq(ab8500->irq, ab8500);
928out_removeirq:
929		ab8500_irq_remove(ab8500);
930	}
931	return ret;
932}
933
934int __devexit ab8500_exit(struct ab8500 *ab8500)
935{
936	sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group);
937	mfd_remove_devices(ab8500->dev);
938	if (ab8500->irq_base) {
939		free_irq(ab8500->irq, ab8500);
940		ab8500_irq_remove(ab8500);
941	}
942
943	return 0;
944}
945
946MODULE_AUTHOR("Mattias Wallin, Srinidhi Kasagar, Rabin Vincent");
947MODULE_DESCRIPTION("AB8500 MFD core");
948MODULE_LICENSE("GPL v2");