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v6.8
   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Copyright (C) ST-Ericsson SA 2010
   4 *
   5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
   6 * Author: Rabin Vincent <rabin.vincent@stericsson.com>
   7 * Author: Mattias Wallin <mattias.wallin@stericsson.com>
   8 */
   9
  10#include <linux/kernel.h>
  11#include <linux/slab.h>
  12#include <linux/init.h>
  13#include <linux/irq.h>
  14#include <linux/irqdomain.h>
  15#include <linux/delay.h>
  16#include <linux/interrupt.h>
  17#include <linux/moduleparam.h>
  18#include <linux/platform_device.h>
  19#include <linux/mfd/core.h>
  20#include <linux/mfd/abx500.h>
  21#include <linux/mfd/abx500/ab8500.h>
  22#include <linux/mfd/dbx500-prcmu.h>
  23#include <linux/of.h>
 
  24
  25/*
  26 * Interrupt register offsets
  27 * Bank : 0x0E
  28 */
  29#define AB8500_IT_SOURCE1_REG		0x00
  30#define AB8500_IT_SOURCE2_REG		0x01
  31#define AB8500_IT_SOURCE3_REG		0x02
  32#define AB8500_IT_SOURCE4_REG		0x03
  33#define AB8500_IT_SOURCE5_REG		0x04
  34#define AB8500_IT_SOURCE6_REG		0x05
  35#define AB8500_IT_SOURCE7_REG		0x06
  36#define AB8500_IT_SOURCE8_REG		0x07
  37#define AB9540_IT_SOURCE13_REG		0x0C
  38#define AB8500_IT_SOURCE19_REG		0x12
  39#define AB8500_IT_SOURCE20_REG		0x13
  40#define AB8500_IT_SOURCE21_REG		0x14
  41#define AB8500_IT_SOURCE22_REG		0x15
  42#define AB8500_IT_SOURCE23_REG		0x16
  43#define AB8500_IT_SOURCE24_REG		0x17
  44
  45/*
  46 * latch registers
  47 */
  48#define AB8500_IT_LATCH1_REG		0x20
  49#define AB8500_IT_LATCH2_REG		0x21
  50#define AB8500_IT_LATCH3_REG		0x22
  51#define AB8500_IT_LATCH4_REG		0x23
  52#define AB8500_IT_LATCH5_REG		0x24
  53#define AB8500_IT_LATCH6_REG		0x25
  54#define AB8500_IT_LATCH7_REG		0x26
  55#define AB8500_IT_LATCH8_REG		0x27
  56#define AB8500_IT_LATCH9_REG		0x28
  57#define AB8500_IT_LATCH10_REG		0x29
  58#define AB8500_IT_LATCH12_REG		0x2B
  59#define AB9540_IT_LATCH13_REG		0x2C
  60#define AB8500_IT_LATCH19_REG		0x32
  61#define AB8500_IT_LATCH20_REG		0x33
  62#define AB8500_IT_LATCH21_REG		0x34
  63#define AB8500_IT_LATCH22_REG		0x35
  64#define AB8500_IT_LATCH23_REG		0x36
  65#define AB8500_IT_LATCH24_REG		0x37
  66
  67/*
  68 * mask registers
  69 */
  70
  71#define AB8500_IT_MASK1_REG		0x40
  72#define AB8500_IT_MASK2_REG		0x41
  73#define AB8500_IT_MASK3_REG		0x42
  74#define AB8500_IT_MASK4_REG		0x43
  75#define AB8500_IT_MASK5_REG		0x44
  76#define AB8500_IT_MASK6_REG		0x45
  77#define AB8500_IT_MASK7_REG		0x46
  78#define AB8500_IT_MASK8_REG		0x47
  79#define AB8500_IT_MASK9_REG		0x48
  80#define AB8500_IT_MASK10_REG		0x49
  81#define AB8500_IT_MASK11_REG		0x4A
  82#define AB8500_IT_MASK12_REG		0x4B
  83#define AB8500_IT_MASK13_REG		0x4C
  84#define AB8500_IT_MASK14_REG		0x4D
  85#define AB8500_IT_MASK15_REG		0x4E
  86#define AB8500_IT_MASK16_REG		0x4F
  87#define AB8500_IT_MASK17_REG		0x50
  88#define AB8500_IT_MASK18_REG		0x51
  89#define AB8500_IT_MASK19_REG		0x52
  90#define AB8500_IT_MASK20_REG		0x53
  91#define AB8500_IT_MASK21_REG		0x54
  92#define AB8500_IT_MASK22_REG		0x55
  93#define AB8500_IT_MASK23_REG		0x56
  94#define AB8500_IT_MASK24_REG		0x57
  95#define AB8500_IT_MASK25_REG		0x58
  96
  97/*
  98 * latch hierarchy registers
  99 */
 100#define AB8500_IT_LATCHHIER1_REG	0x60
 101#define AB8500_IT_LATCHHIER2_REG	0x61
 102#define AB8500_IT_LATCHHIER3_REG	0x62
 103#define AB8540_IT_LATCHHIER4_REG	0x63
 104
 105#define AB8500_IT_LATCHHIER_NUM		3
 106#define AB8540_IT_LATCHHIER_NUM		4
 107
 108#define AB8500_REV_REG			0x80
 109#define AB8500_IC_NAME_REG		0x82
 110#define AB8500_SWITCH_OFF_STATUS	0x00
 111
 112#define AB8500_TURN_ON_STATUS		0x00
 113#define AB8505_TURN_ON_STATUS_2		0x04
 114
 115#define AB8500_CH_USBCH_STAT1_REG	0x02
 116#define VBUS_DET_DBNC100		0x02
 117#define VBUS_DET_DBNC1			0x01
 118
 119static DEFINE_SPINLOCK(on_stat_lock);
 120static u8 turn_on_stat_mask = 0xFF;
 121static u8 turn_on_stat_set;
 122
 123#define AB9540_MODEM_CTRL2_REG			0x23
 124#define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT	BIT(2)
 125
 126/*
 127 * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt
 128 * numbers are indexed into this array with (num / 8). The interupts are
 129 * defined in linux/mfd/ab8500.h
 130 *
 131 * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
 132 * offset 0.
 133 */
 134/* AB8500 support */
 135static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = {
 136	0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21,
 137};
 138
 139/* AB9540 / AB8505 support */
 140static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = {
 141	0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22, 23
 142};
 143
 144/* AB8540 support */
 145static const int ab8540_irq_regoffset[AB8540_NUM_IRQ_REGS] = {
 146	0, 1, 2, 3, 4, -1, -1, -1, -1, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22,
 147	23, 25, 26, 27, 28, 29, 30, 31,
 148};
 149
 150static const char ab8500_version_str[][7] = {
 151	[AB8500_VERSION_AB8500] = "AB8500",
 152	[AB8500_VERSION_AB8505] = "AB8505",
 153	[AB8500_VERSION_AB9540] = "AB9540",
 154	[AB8500_VERSION_AB8540] = "AB8540",
 155};
 156
 157static int ab8500_prcmu_write(struct ab8500 *ab8500, u16 addr, u8 data)
 158{
 159	int ret;
 160
 161	ret = prcmu_abb_write((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
 162	if (ret < 0)
 163		dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
 164	return ret;
 165}
 166
 167static int ab8500_prcmu_write_masked(struct ab8500 *ab8500, u16 addr, u8 mask,
 168	u8 data)
 169{
 170	int ret;
 171
 172	ret = prcmu_abb_write_masked((u8)(addr >> 8), (u8)(addr & 0xFF), &data,
 173		&mask, 1);
 174	if (ret < 0)
 175		dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
 176	return ret;
 177}
 178
 179static int ab8500_prcmu_read(struct ab8500 *ab8500, u16 addr)
 180{
 181	int ret;
 182	u8 data;
 183
 184	ret = prcmu_abb_read((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
 185	if (ret < 0) {
 186		dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
 187		return ret;
 188	}
 189	return (int)data;
 190}
 191
 192static int ab8500_get_chip_id(struct device *dev)
 193{
 194	struct ab8500 *ab8500;
 195
 196	if (!dev)
 197		return -EINVAL;
 198	ab8500 = dev_get_drvdata(dev->parent);
 199	return ab8500 ? (int)ab8500->chip_id : -EINVAL;
 200}
 201
 202static int set_register_interruptible(struct ab8500 *ab8500, u8 bank,
 203	u8 reg, u8 data)
 204{
 205	int ret;
 206	/*
 207	 * Put the u8 bank and u8 register together into a an u16.
 208	 * The bank on higher 8 bits and register in lower 8 bits.
 209	 */
 210	u16 addr = ((u16)bank) << 8 | reg;
 211
 212	dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data);
 213
 214	mutex_lock(&ab8500->lock);
 215
 216	ret = ab8500->write(ab8500, addr, data);
 217	if (ret < 0)
 218		dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
 219			addr, ret);
 220	mutex_unlock(&ab8500->lock);
 221
 222	return ret;
 223}
 224
 225static int ab8500_set_register(struct device *dev, u8 bank,
 226	u8 reg, u8 value)
 227{
 228	int ret;
 229	struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
 230
 231	atomic_inc(&ab8500->transfer_ongoing);
 232	ret = set_register_interruptible(ab8500, bank, reg, value);
 233	atomic_dec(&ab8500->transfer_ongoing);
 234	return ret;
 235}
 236
 237static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,
 238	u8 reg, u8 *value)
 239{
 240	int ret;
 241	u16 addr = ((u16)bank) << 8 | reg;
 242
 243	mutex_lock(&ab8500->lock);
 244
 245	ret = ab8500->read(ab8500, addr);
 246	if (ret < 0)
 247		dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
 248			addr, ret);
 249	else
 250		*value = ret;
 251
 252	mutex_unlock(&ab8500->lock);
 253	dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret);
 254
 255	return (ret < 0) ? ret : 0;
 256}
 257
 258static int ab8500_get_register(struct device *dev, u8 bank,
 259	u8 reg, u8 *value)
 260{
 261	int ret;
 262	struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
 263
 264	atomic_inc(&ab8500->transfer_ongoing);
 265	ret = get_register_interruptible(ab8500, bank, reg, value);
 266	atomic_dec(&ab8500->transfer_ongoing);
 267	return ret;
 268}
 269
 270static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank,
 271	u8 reg, u8 bitmask, u8 bitvalues)
 272{
 273	int ret;
 274	u16 addr = ((u16)bank) << 8 | reg;
 275
 276	mutex_lock(&ab8500->lock);
 277
 278	if (ab8500->write_masked == NULL) {
 279		u8 data;
 280
 281		ret = ab8500->read(ab8500, addr);
 282		if (ret < 0) {
 283			dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
 284				addr, ret);
 285			goto out;
 286		}
 287
 288		data = (u8)ret;
 289		data = (~bitmask & data) | (bitmask & bitvalues);
 290
 291		ret = ab8500->write(ab8500, addr, data);
 292		if (ret < 0)
 293			dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
 294				addr, ret);
 295
 296		dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr,
 297			data);
 298		goto out;
 299	}
 300	ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues);
 301	if (ret < 0)
 302		dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr,
 303			ret);
 304out:
 305	mutex_unlock(&ab8500->lock);
 306	return ret;
 307}
 308
 309static int ab8500_mask_and_set_register(struct device *dev,
 310	u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
 311{
 312	int ret;
 313	struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
 314
 315	atomic_inc(&ab8500->transfer_ongoing);
 316	ret = mask_and_set_register_interruptible(ab8500, bank, reg,
 317						 bitmask, bitvalues);
 318	atomic_dec(&ab8500->transfer_ongoing);
 319	return ret;
 320}
 321
 322static struct abx500_ops ab8500_ops = {
 323	.get_chip_id = ab8500_get_chip_id,
 324	.get_register = ab8500_get_register,
 325	.set_register = ab8500_set_register,
 326	.get_register_page = NULL,
 327	.set_register_page = NULL,
 328	.mask_and_set_register = ab8500_mask_and_set_register,
 329	.event_registers_startup_state_get = NULL,
 330	.startup_irq_enabled = NULL,
 331	.dump_all_banks = ab8500_dump_all_banks,
 332};
 333
 334static void ab8500_irq_lock(struct irq_data *data)
 335{
 336	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
 337
 338	mutex_lock(&ab8500->irq_lock);
 339	atomic_inc(&ab8500->transfer_ongoing);
 340}
 341
 342static void ab8500_irq_sync_unlock(struct irq_data *data)
 343{
 344	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
 345	int i;
 346
 347	for (i = 0; i < ab8500->mask_size; i++) {
 348		u8 old = ab8500->oldmask[i];
 349		u8 new = ab8500->mask[i];
 350		int reg;
 351
 352		if (new == old)
 353			continue;
 354
 355		/*
 356		 * Interrupt register 12 doesn't exist prior to AB8500 version
 357		 * 2.0
 358		 */
 359		if (ab8500->irq_reg_offset[i] == 11 &&
 360			is_ab8500_1p1_or_earlier(ab8500))
 361			continue;
 362
 363		if (ab8500->irq_reg_offset[i] < 0)
 364			continue;
 365
 366		ab8500->oldmask[i] = new;
 367
 368		reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i];
 369		set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new);
 370	}
 371	atomic_dec(&ab8500->transfer_ongoing);
 372	mutex_unlock(&ab8500->irq_lock);
 373}
 374
 375static void ab8500_irq_mask(struct irq_data *data)
 376{
 377	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
 378	int offset = data->hwirq;
 379	int index = offset / 8;
 380	int mask = 1 << (offset % 8);
 381
 382	ab8500->mask[index] |= mask;
 383
 384	/* The AB8500 GPIOs have two interrupts each (rising & falling). */
 385	if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R)
 386		ab8500->mask[index + 2] |= mask;
 387	if (offset >= AB9540_INT_GPIO50R && offset <= AB9540_INT_GPIO54R)
 388		ab8500->mask[index + 1] |= mask;
 389	if (offset == AB8540_INT_GPIO43R || offset == AB8540_INT_GPIO44R)
 390		/* Here the falling IRQ is one bit lower */
 391		ab8500->mask[index] |= (mask << 1);
 392}
 393
 394static void ab8500_irq_unmask(struct irq_data *data)
 395{
 396	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
 397	unsigned int type = irqd_get_trigger_type(data);
 398	int offset = data->hwirq;
 399	int index = offset / 8;
 400	int mask = 1 << (offset % 8);
 401
 402	if (type & IRQ_TYPE_EDGE_RISING)
 403		ab8500->mask[index] &= ~mask;
 404
 405	/* The AB8500 GPIOs have two interrupts each (rising & falling). */
 406	if (type & IRQ_TYPE_EDGE_FALLING) {
 407		if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R)
 408			ab8500->mask[index + 2] &= ~mask;
 409		else if (offset >= AB9540_INT_GPIO50R &&
 410			 offset <= AB9540_INT_GPIO54R)
 411			ab8500->mask[index + 1] &= ~mask;
 412		else if (offset == AB8540_INT_GPIO43R ||
 413			 offset == AB8540_INT_GPIO44R)
 414			/* Here the falling IRQ is one bit lower */
 415			ab8500->mask[index] &= ~(mask << 1);
 416		else
 417			ab8500->mask[index] &= ~mask;
 418	} else {
 419		/* Satisfies the case where type is not set. */
 420		ab8500->mask[index] &= ~mask;
 421	}
 422}
 423
 424static int ab8500_irq_set_type(struct irq_data *data, unsigned int type)
 425{
 426	return 0;
 427}
 428
 429static struct irq_chip ab8500_irq_chip = {
 430	.name			= "ab8500",
 431	.irq_bus_lock		= ab8500_irq_lock,
 432	.irq_bus_sync_unlock	= ab8500_irq_sync_unlock,
 433	.irq_mask		= ab8500_irq_mask,
 434	.irq_disable		= ab8500_irq_mask,
 435	.irq_unmask		= ab8500_irq_unmask,
 436	.irq_set_type		= ab8500_irq_set_type,
 437};
 438
 439static void update_latch_offset(u8 *offset, int i)
 440{
 441	/* Fix inconsistent ITFromLatch25 bit mapping... */
 442	if (unlikely(*offset == 17))
 443		*offset = 24;
 444	/* Fix inconsistent ab8540 bit mapping... */
 445	if (unlikely(*offset == 16))
 446		*offset = 25;
 447	if ((i == 3) && (*offset >= 24))
 448		*offset += 2;
 449}
 450
 451static int ab8500_handle_hierarchical_line(struct ab8500 *ab8500,
 452					int latch_offset, u8 latch_val)
 453{
 454	int int_bit, line, i;
 455
 456	for (i = 0; i < ab8500->mask_size; i++)
 457		if (ab8500->irq_reg_offset[i] == latch_offset)
 458			break;
 459
 460	if (i >= ab8500->mask_size) {
 461		dev_err(ab8500->dev, "Register offset 0x%2x not declared\n",
 462				latch_offset);
 463		return -ENXIO;
 464	}
 465
 466	/* ignore masked out interrupts */
 467	latch_val &= ~ab8500->mask[i];
 468
 469	while (latch_val) {
 470		int_bit = __ffs(latch_val);
 471		line = (i << 3) + int_bit;
 472		latch_val &= ~(1 << int_bit);
 473
 474		/*
 475		 * This handles the falling edge hwirqs from the GPIO
 476		 * lines. Route them back to the line registered for the
 477		 * rising IRQ, as this is merely a flag for the same IRQ
 478		 * in linux terms.
 479		 */
 480		if (line >= AB8500_INT_GPIO6F && line <= AB8500_INT_GPIO41F)
 481			line -= 16;
 482		if (line >= AB9540_INT_GPIO50F && line <= AB9540_INT_GPIO54F)
 483			line -= 8;
 484		if (line == AB8540_INT_GPIO43F || line == AB8540_INT_GPIO44F)
 485			line += 1;
 486
 487		handle_nested_irq(irq_find_mapping(ab8500->domain, line));
 488	}
 489
 490	return 0;
 491}
 492
 493static int ab8500_handle_hierarchical_latch(struct ab8500 *ab8500,
 494					int hier_offset, u8 hier_val)
 495{
 496	int latch_bit, status;
 497	u8 latch_offset, latch_val;
 498
 499	do {
 500		latch_bit = __ffs(hier_val);
 501		latch_offset = (hier_offset << 3) + latch_bit;
 502
 503		update_latch_offset(&latch_offset, hier_offset);
 504
 505		status = get_register_interruptible(ab8500,
 506				AB8500_INTERRUPT,
 507				AB8500_IT_LATCH1_REG + latch_offset,
 508				&latch_val);
 509		if (status < 0 || latch_val == 0)
 510			goto discard;
 511
 512		status = ab8500_handle_hierarchical_line(ab8500,
 513				latch_offset, latch_val);
 514		if (status < 0)
 515			return status;
 516discard:
 517		hier_val &= ~(1 << latch_bit);
 518	} while (hier_val);
 519
 520	return 0;
 521}
 522
 523static irqreturn_t ab8500_hierarchical_irq(int irq, void *dev)
 524{
 525	struct ab8500 *ab8500 = dev;
 526	u8 i;
 527
 528	dev_vdbg(ab8500->dev, "interrupt\n");
 529
 530	/*  Hierarchical interrupt version */
 531	for (i = 0; i < (ab8500->it_latchhier_num); i++) {
 532		int status;
 533		u8 hier_val;
 534
 535		status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
 536			AB8500_IT_LATCHHIER1_REG + i, &hier_val);
 537		if (status < 0 || hier_val == 0)
 538			continue;
 539
 540		status = ab8500_handle_hierarchical_latch(ab8500, i, hier_val);
 541		if (status < 0)
 542			break;
 543	}
 544	return IRQ_HANDLED;
 545}
 546
 547static int ab8500_irq_map(struct irq_domain *d, unsigned int virq,
 548				irq_hw_number_t hwirq)
 549{
 550	struct ab8500 *ab8500 = d->host_data;
 551
 552	if (!ab8500)
 553		return -EINVAL;
 554
 555	irq_set_chip_data(virq, ab8500);
 556	irq_set_chip_and_handler(virq, &ab8500_irq_chip,
 557				handle_simple_irq);
 558	irq_set_nested_thread(virq, 1);
 559	irq_set_noprobe(virq);
 560
 561	return 0;
 562}
 563
 564static const struct irq_domain_ops ab8500_irq_ops = {
 565	.map    = ab8500_irq_map,
 566	.xlate  = irq_domain_xlate_twocell,
 567};
 568
 569static int ab8500_irq_init(struct ab8500 *ab8500, struct device_node *np)
 570{
 571	int num_irqs;
 572
 573	if (is_ab8540(ab8500))
 574		num_irqs = AB8540_NR_IRQS;
 575	else if (is_ab9540(ab8500))
 576		num_irqs = AB9540_NR_IRQS;
 577	else if (is_ab8505(ab8500))
 578		num_irqs = AB8505_NR_IRQS;
 579	else
 580		num_irqs = AB8500_NR_IRQS;
 581
 582	/* If ->irq_base is zero this will give a linear mapping */
 583	ab8500->domain = irq_domain_add_simple(ab8500->dev->of_node,
 584					       num_irqs, 0,
 585					       &ab8500_irq_ops, ab8500);
 586
 587	if (!ab8500->domain) {
 588		dev_err(ab8500->dev, "Failed to create irqdomain\n");
 589		return -ENODEV;
 590	}
 591
 592	return 0;
 593}
 594
 595int ab8500_suspend(struct ab8500 *ab8500)
 596{
 597	if (atomic_read(&ab8500->transfer_ongoing))
 598		return -EINVAL;
 599
 600	return 0;
 601}
 602
 603static const struct mfd_cell ab8500_bm_devs[] = {
 604	MFD_CELL_OF("ab8500-charger", NULL, NULL, 0, 0,
 605		    "stericsson,ab8500-charger"),
 606	MFD_CELL_OF("ab8500-btemp", NULL, NULL, 0, 0,
 607		    "stericsson,ab8500-btemp"),
 608	MFD_CELL_OF("ab8500-fg", NULL, NULL, 0, 0,
 609		    "stericsson,ab8500-fg"),
 610	MFD_CELL_OF("ab8500-chargalg", NULL, NULL, 0, 0,
 611		    "stericsson,ab8500-chargalg"),
 612};
 613
 614static const struct mfd_cell ab8500_devs[] = {
 615	MFD_CELL_OF("ab8500-sysctrl",
 616		    NULL, NULL, 0, 0, "stericsson,ab8500-sysctrl"),
 617	MFD_CELL_OF("ab8500-ext-regulator",
 618		    NULL, NULL, 0, 0, "stericsson,ab8500-ext-regulator"),
 619	MFD_CELL_OF("ab8500-regulator",
 620		    NULL, NULL, 0, 0, "stericsson,ab8500-regulator"),
 621	MFD_CELL_OF("ab8500-clk",
 622		    NULL, NULL, 0, 0, "stericsson,ab8500-clk"),
 623	MFD_CELL_OF("ab8500-gpadc",
 624		    NULL, NULL, 0, 0, "stericsson,ab8500-gpadc"),
 625	MFD_CELL_OF("ab8500-rtc",
 626		    NULL, NULL, 0, 0, "stericsson,ab8500-rtc"),
 627	MFD_CELL_OF("ab8500-acc-det",
 628		    NULL, NULL, 0, 0, "stericsson,ab8500-acc-det"),
 629	MFD_CELL_OF("ab8500-poweron-key",
 630		    NULL, NULL, 0, 0, "stericsson,ab8500-poweron-key"),
 631	MFD_CELL_OF("ab8500-pwm",
 632		    NULL, NULL, 0, 1, "stericsson,ab8500-pwm"),
 633	MFD_CELL_OF("ab8500-pwm",
 634		    NULL, NULL, 0, 2, "stericsson,ab8500-pwm"),
 635	MFD_CELL_OF("ab8500-pwm",
 636		    NULL, NULL, 0, 3, "stericsson,ab8500-pwm"),
 637	MFD_CELL_OF("ab8500-denc",
 638		    NULL, NULL, 0, 0, "stericsson,ab8500-denc"),
 639	MFD_CELL_OF("pinctrl-ab8500",
 640		    NULL, NULL, 0, 0, "stericsson,ab8500-gpio"),
 641	MFD_CELL_OF("abx500-temp",
 642		    NULL, NULL, 0, 0, "stericsson,abx500-temp"),
 643	MFD_CELL_OF("ab8500-usb",
 644		    NULL, NULL, 0, 0, "stericsson,ab8500-usb"),
 645	MFD_CELL_OF("ab8500-codec",
 646		    NULL, NULL, 0, 0, "stericsson,ab8500-codec"),
 647};
 648
 649static const struct mfd_cell ab9540_devs[] = {
 650	{
 651		.name = "ab8500-sysctrl",
 652	},
 653	{
 654		.name = "ab8500-ext-regulator",
 655	},
 656	{
 657		.name = "ab8500-regulator",
 658	},
 659	{
 660		.name = "abx500-clk",
 661		.of_compatible = "stericsson,abx500-clk",
 662	},
 663	{
 664		.name = "ab8500-gpadc",
 665		.of_compatible = "stericsson,ab8500-gpadc",
 666	},
 667	{
 668		.name = "ab8500-rtc",
 669	},
 670	{
 671		.name = "ab8500-acc-det",
 672	},
 673	{
 674		.name = "ab8500-poweron-key",
 675	},
 676	{
 677		.name = "ab8500-pwm",
 678		.id = 1,
 679	},
 680	{
 681		.name = "abx500-temp",
 682	},
 683	{
 684		.name = "pinctrl-ab9540",
 685		.of_compatible = "stericsson,ab9540-gpio",
 686	},
 687	{
 688		.name = "ab9540-usb",
 689	},
 690	{
 691		.name = "ab9540-codec",
 692	},
 693	{
 694		.name = "ab-iddet",
 695	},
 696};
 697
 698/* Device list for ab8505  */
 699static const struct mfd_cell ab8505_devs[] = {
 700	{
 701		.name = "ab8500-sysctrl",
 702		.of_compatible = "stericsson,ab8500-sysctrl",
 703	},
 704	{
 705		.name = "ab8500-regulator",
 706		.of_compatible = "stericsson,ab8505-regulator",
 707	},
 708	{
 709		.name = "abx500-clk",
 710		.of_compatible = "stericsson,ab8500-clk",
 711	},
 712	{
 713		.name = "ab8500-gpadc",
 714		.of_compatible = "stericsson,ab8500-gpadc",
 715	},
 716	{
 717		.name = "ab8500-rtc",
 718		.of_compatible = "stericsson,ab8500-rtc",
 719	},
 720	{
 721		.name = "ab8500-acc-det",
 722		.of_compatible = "stericsson,ab8500-acc-det",
 723	},
 724	{
 725		.name = "ab8500-poweron-key",
 726		.of_compatible = "stericsson,ab8500-poweron-key",
 727	},
 728	{
 729		.name = "ab8500-pwm",
 730		.of_compatible = "stericsson,ab8500-pwm",
 731		.id = 1,
 732	},
 733	{
 734		.name = "pinctrl-ab8505",
 735		.of_compatible = "stericsson,ab8505-gpio",
 736	},
 737	{
 738		.name = "ab8500-usb",
 739		.of_compatible = "stericsson,ab8500-usb",
 740	},
 741	{
 742		.name = "ab8500-codec",
 743		.of_compatible = "stericsson,ab8500-codec",
 744	},
 745	{
 746		.name = "ab-iddet",
 747	},
 748};
 749
 750static const struct mfd_cell ab8540_devs[] = {
 751	{
 752		.name = "ab8500-sysctrl",
 753	},
 754	{
 755		.name = "ab8500-ext-regulator",
 756	},
 757	{
 758		.name = "ab8500-regulator",
 759	},
 760	{
 761		.name = "abx500-clk",
 762		.of_compatible = "stericsson,abx500-clk",
 763	},
 764	{
 765		.name = "ab8500-gpadc",
 766		.of_compatible = "stericsson,ab8500-gpadc",
 767	},
 768	{
 769		.name = "ab8500-acc-det",
 770	},
 771	{
 772		.name = "ab8500-poweron-key",
 773	},
 774	{
 775		.name = "ab8500-pwm",
 776		.id = 1,
 777	},
 778	{
 779		.name = "abx500-temp",
 780	},
 781	{
 782		.name = "pinctrl-ab8540",
 783	},
 784	{
 785		.name = "ab8540-usb",
 786	},
 787	{
 788		.name = "ab8540-codec",
 789	},
 790	{
 791		.name = "ab-iddet",
 792	},
 793};
 794
 795static const struct mfd_cell ab8540_cut1_devs[] = {
 796	{
 797		.name = "ab8500-rtc",
 798		.of_compatible = "stericsson,ab8500-rtc",
 799	},
 800};
 801
 802static const struct mfd_cell ab8540_cut2_devs[] = {
 803	{
 804		.name = "ab8540-rtc",
 805		.of_compatible = "stericsson,ab8540-rtc",
 806	},
 807};
 808
 809static ssize_t chip_id_show(struct device *dev,
 810			    struct device_attribute *attr, char *buf)
 811{
 812	struct ab8500 *ab8500;
 813
 814	ab8500 = dev_get_drvdata(dev);
 815
 816	return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL);
 817}
 818
 819/*
 820 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
 821 * 0x01 Swoff bit programming
 822 * 0x02 Thermal protection activation
 823 * 0x04 Vbat lower then BattOk falling threshold
 824 * 0x08 Watchdog expired
 825 * 0x10 Non presence of 32kHz clock
 826 * 0x20 Battery level lower than power on reset threshold
 827 * 0x40 Power on key 1 pressed longer than 10 seconds
 828 * 0x80 DB8500 thermal shutdown
 829 */
 830static ssize_t switch_off_status_show(struct device *dev,
 831				      struct device_attribute *attr, char *buf)
 832{
 833	int ret;
 834	u8 value;
 835	struct ab8500 *ab8500;
 836
 837	ab8500 = dev_get_drvdata(dev);
 838	ret = get_register_interruptible(ab8500, AB8500_RTC,
 839		AB8500_SWITCH_OFF_STATUS, &value);
 840	if (ret < 0)
 841		return ret;
 842	return sprintf(buf, "%#x\n", value);
 843}
 844
 845/* use mask and set to override the register turn_on_stat value */
 846void ab8500_override_turn_on_stat(u8 mask, u8 set)
 847{
 848	spin_lock(&on_stat_lock);
 849	turn_on_stat_mask = mask;
 850	turn_on_stat_set = set;
 851	spin_unlock(&on_stat_lock);
 852}
 853
 854/*
 855 * ab8500 has turned on due to (TURN_ON_STATUS):
 856 * 0x01 PORnVbat
 857 * 0x02 PonKey1dbF
 858 * 0x04 PonKey2dbF
 859 * 0x08 RTCAlarm
 860 * 0x10 MainChDet
 861 * 0x20 VbusDet
 862 * 0x40 UsbIDDetect
 863 * 0x80 Reserved
 864 */
 865static ssize_t turn_on_status_show(struct device *dev,
 866				   struct device_attribute *attr, char *buf)
 867{
 868	int ret;
 869	u8 value;
 870	struct ab8500 *ab8500;
 871
 872	ab8500 = dev_get_drvdata(dev);
 873	ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
 874		AB8500_TURN_ON_STATUS, &value);
 875	if (ret < 0)
 876		return ret;
 877
 878	/*
 879	 * In L9540, turn_on_status register is not updated correctly if
 880	 * the device is rebooted with AC/USB charger connected. Due to
 881	 * this, the device boots android instead of entering into charge
 882	 * only mode. Read the AC/USB status register to detect the charger
 883	 * presence and update the turn on status manually.
 884	 */
 885	if (is_ab9540(ab8500)) {
 886		spin_lock(&on_stat_lock);
 887		value = (value & turn_on_stat_mask) | turn_on_stat_set;
 888		spin_unlock(&on_stat_lock);
 889	}
 890
 891	return sprintf(buf, "%#x\n", value);
 892}
 893
 894static ssize_t turn_on_status_2_show(struct device *dev,
 895				     struct device_attribute *attr, char *buf)
 896{
 897	int ret;
 898	u8 value;
 899	struct ab8500 *ab8500;
 900
 901	ab8500 = dev_get_drvdata(dev);
 902	ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
 903		AB8505_TURN_ON_STATUS_2, &value);
 904	if (ret < 0)
 905		return ret;
 906	return sprintf(buf, "%#x\n", (value & 0x1));
 907}
 908
 909static ssize_t dbbrstn_show(struct device *dev,
 910			    struct device_attribute *attr, char *buf)
 911{
 912	struct ab8500 *ab8500;
 913	int ret;
 914	u8 value;
 915
 916	ab8500 = dev_get_drvdata(dev);
 917
 918	ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2,
 919		AB9540_MODEM_CTRL2_REG, &value);
 920	if (ret < 0)
 921		return ret;
 922
 923	return sprintf(buf, "%d\n",
 924			(value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0);
 925}
 926
 927static ssize_t dbbrstn_store(struct device *dev,
 928	struct device_attribute *attr, const char *buf, size_t count)
 929{
 930	struct ab8500 *ab8500;
 931	int ret = count;
 932	int err;
 933	u8 bitvalues;
 934
 935	ab8500 = dev_get_drvdata(dev);
 936
 937	if (count > 0) {
 938		switch (buf[0]) {
 939		case '0':
 940			bitvalues = 0;
 941			break;
 942		case '1':
 943			bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT;
 944			break;
 945		default:
 946			goto exit;
 947		}
 948
 949		err = mask_and_set_register_interruptible(ab8500,
 950			AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG,
 951			AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues);
 952		if (err)
 953			dev_info(ab8500->dev,
 954				"Failed to set DBBRSTN %c, err %#x\n",
 955				buf[0], err);
 956	}
 957
 958exit:
 959	return ret;
 960}
 961
 962static DEVICE_ATTR_RO(chip_id);
 963static DEVICE_ATTR_RO(switch_off_status);
 964static DEVICE_ATTR_RO(turn_on_status);
 965static DEVICE_ATTR_RO(turn_on_status_2);
 966static DEVICE_ATTR_RW(dbbrstn);
 967
 968static struct attribute *ab8500_sysfs_entries[] = {
 969	&dev_attr_chip_id.attr,
 970	&dev_attr_switch_off_status.attr,
 971	&dev_attr_turn_on_status.attr,
 972	NULL,
 973};
 974
 975static struct attribute *ab8505_sysfs_entries[] = {
 976	&dev_attr_turn_on_status_2.attr,
 977	NULL,
 978};
 979
 980static struct attribute *ab9540_sysfs_entries[] = {
 981	&dev_attr_chip_id.attr,
 982	&dev_attr_switch_off_status.attr,
 983	&dev_attr_turn_on_status.attr,
 984	&dev_attr_dbbrstn.attr,
 985	NULL,
 986};
 987
 988static const struct attribute_group ab8500_attr_group = {
 989	.attrs	= ab8500_sysfs_entries,
 990};
 991
 992static const struct attribute_group ab8505_attr_group = {
 993	.attrs	= ab8505_sysfs_entries,
 994};
 995
 996static const struct attribute_group ab9540_attr_group = {
 997	.attrs	= ab9540_sysfs_entries,
 998};
 999
1000static int ab8500_probe(struct platform_device *pdev)
1001{
1002	static const char * const switch_off_status[] = {
1003		"Swoff bit programming",
1004		"Thermal protection activation",
1005		"Vbat lower then BattOk falling threshold",
1006		"Watchdog expired",
1007		"Non presence of 32kHz clock",
1008		"Battery level lower than power on reset threshold",
1009		"Power on key 1 pressed longer than 10 seconds",
1010		"DB8500 thermal shutdown"};
1011	static const char * const turn_on_status[] = {
1012		"Battery rising (Vbat)",
1013		"Power On Key 1 dbF",
1014		"Power On Key 2 dbF",
1015		"RTC Alarm",
1016		"Main Charger Detect",
1017		"Vbus Detect (USB)",
1018		"USB ID Detect",
1019		"UART Factory Mode Detect"};
1020	const struct platform_device_id *platid = platform_get_device_id(pdev);
1021	enum ab8500_version version = AB8500_VERSION_UNDEFINED;
1022	struct device_node *np = pdev->dev.of_node;
1023	struct ab8500 *ab8500;
1024	int ret;
1025	int i;
1026	int irq;
1027	u8 value;
1028
1029	ab8500 = devm_kzalloc(&pdev->dev, sizeof(*ab8500), GFP_KERNEL);
1030	if (!ab8500)
1031		return -ENOMEM;
1032
1033	ab8500->dev = &pdev->dev;
1034
1035	irq = platform_get_irq(pdev, 0);
1036	if (irq < 0)
1037		return irq;
1038
1039	ab8500->irq = irq;
1040
1041	ab8500->read = ab8500_prcmu_read;
1042	ab8500->write = ab8500_prcmu_write;
1043	ab8500->write_masked = ab8500_prcmu_write_masked;
1044
1045	mutex_init(&ab8500->lock);
1046	mutex_init(&ab8500->irq_lock);
1047	atomic_set(&ab8500->transfer_ongoing, 0);
1048
1049	platform_set_drvdata(pdev, ab8500);
1050
1051	if (platid)
1052		version = platid->driver_data;
1053
1054	if (version != AB8500_VERSION_UNDEFINED)
1055		ab8500->version = version;
1056	else {
1057		ret = get_register_interruptible(ab8500, AB8500_MISC,
1058			AB8500_IC_NAME_REG, &value);
1059		if (ret < 0) {
1060			dev_err(&pdev->dev, "could not probe HW\n");
1061			return ret;
1062		}
1063
1064		ab8500->version = value;
1065	}
1066
1067	ret = get_register_interruptible(ab8500, AB8500_MISC,
1068		AB8500_REV_REG, &value);
1069	if (ret < 0)
1070		return ret;
1071
1072	ab8500->chip_id = value;
1073
1074	dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n",
1075			ab8500_version_str[ab8500->version],
1076			ab8500->chip_id >> 4,
1077			ab8500->chip_id & 0x0F);
1078
1079	/* Configure AB8540 */
1080	if (is_ab8540(ab8500)) {
1081		ab8500->mask_size = AB8540_NUM_IRQ_REGS;
1082		ab8500->irq_reg_offset = ab8540_irq_regoffset;
1083		ab8500->it_latchhier_num = AB8540_IT_LATCHHIER_NUM;
1084	} /* Configure AB8500 or AB9540 IRQ */
1085	else if (is_ab9540(ab8500) || is_ab8505(ab8500)) {
1086		ab8500->mask_size = AB9540_NUM_IRQ_REGS;
1087		ab8500->irq_reg_offset = ab9540_irq_regoffset;
1088		ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM;
1089	} else {
1090		ab8500->mask_size = AB8500_NUM_IRQ_REGS;
1091		ab8500->irq_reg_offset = ab8500_irq_regoffset;
1092		ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM;
1093	}
1094	ab8500->mask = devm_kzalloc(&pdev->dev, ab8500->mask_size,
1095				    GFP_KERNEL);
1096	if (!ab8500->mask)
1097		return -ENOMEM;
1098	ab8500->oldmask = devm_kzalloc(&pdev->dev, ab8500->mask_size,
1099				       GFP_KERNEL);
1100	if (!ab8500->oldmask)
1101		return -ENOMEM;
1102
1103	/*
1104	 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
1105	 * 0x01 Swoff bit programming
1106	 * 0x02 Thermal protection activation
1107	 * 0x04 Vbat lower then BattOk falling threshold
1108	 * 0x08 Watchdog expired
1109	 * 0x10 Non presence of 32kHz clock
1110	 * 0x20 Battery level lower than power on reset threshold
1111	 * 0x40 Power on key 1 pressed longer than 10 seconds
1112	 * 0x80 DB8500 thermal shutdown
1113	 */
1114
1115	ret = get_register_interruptible(ab8500, AB8500_RTC,
1116		AB8500_SWITCH_OFF_STATUS, &value);
1117	if (ret < 0)
1118		return ret;
1119	dev_info(ab8500->dev, "switch off cause(s) (%#x): ", value);
1120
1121	if (value) {
1122		for (i = 0; i < ARRAY_SIZE(switch_off_status); i++) {
1123			if (value & 1)
1124				pr_cont(" \"%s\"", switch_off_status[i]);
1125			value = value >> 1;
1126
1127		}
1128		pr_cont("\n");
1129	} else {
1130		pr_cont(" None\n");
1131	}
1132	ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
1133		AB8500_TURN_ON_STATUS, &value);
1134	if (ret < 0)
1135		return ret;
1136	dev_info(ab8500->dev, "turn on reason(s) (%#x): ", value);
1137
1138	if (value) {
1139		for (i = 0; i < ARRAY_SIZE(turn_on_status); i++) {
1140			if (value & 1)
1141				pr_cont("\"%s\" ", turn_on_status[i]);
1142			value = value >> 1;
1143		}
1144		pr_cont("\n");
1145	} else {
1146		pr_cont("None\n");
1147	}
1148
1149	if (is_ab9540(ab8500)) {
1150		ret = get_register_interruptible(ab8500, AB8500_CHARGER,
1151			AB8500_CH_USBCH_STAT1_REG, &value);
1152		if (ret < 0)
1153			return ret;
1154		if ((value & VBUS_DET_DBNC1) && (value & VBUS_DET_DBNC100))
1155			ab8500_override_turn_on_stat(~AB8500_POW_KEY_1_ON,
1156						     AB8500_VBUS_DET);
1157	}
1158
1159	/* Clear and mask all interrupts */
1160	for (i = 0; i < ab8500->mask_size; i++) {
1161		/*
1162		 * Interrupt register 12 doesn't exist prior to AB8500 version
1163		 * 2.0
1164		 */
1165		if (ab8500->irq_reg_offset[i] == 11 &&
1166				is_ab8500_1p1_or_earlier(ab8500))
1167			continue;
1168
1169		if (ab8500->irq_reg_offset[i] < 0)
1170			continue;
1171
1172		get_register_interruptible(ab8500, AB8500_INTERRUPT,
1173			AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i],
1174			&value);
1175		set_register_interruptible(ab8500, AB8500_INTERRUPT,
1176			AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff);
1177	}
1178
1179	ret = abx500_register_ops(ab8500->dev, &ab8500_ops);
1180	if (ret)
1181		return ret;
1182
1183	for (i = 0; i < ab8500->mask_size; i++)
1184		ab8500->mask[i] = ab8500->oldmask[i] = 0xff;
1185
1186	ret = ab8500_irq_init(ab8500, np);
1187	if (ret)
1188		return ret;
1189
1190	ret = devm_request_threaded_irq(&pdev->dev, ab8500->irq, NULL,
1191			ab8500_hierarchical_irq,
1192			IRQF_ONESHOT | IRQF_NO_SUSPEND,
1193			"ab8500", ab8500);
1194	if (ret)
1195		return ret;
1196
1197	if (is_ab9540(ab8500))
1198		ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs,
1199				ARRAY_SIZE(ab9540_devs), NULL,
1200				0, ab8500->domain);
1201	else if (is_ab8540(ab8500)) {
1202		ret = mfd_add_devices(ab8500->dev, 0, ab8540_devs,
1203			      ARRAY_SIZE(ab8540_devs), NULL,
1204			      0, ab8500->domain);
1205		if (ret)
1206			return ret;
1207
1208		if (is_ab8540_1p2_or_earlier(ab8500))
1209			ret = mfd_add_devices(ab8500->dev, 0, ab8540_cut1_devs,
1210			      ARRAY_SIZE(ab8540_cut1_devs), NULL,
1211			      0, ab8500->domain);
1212		else /* ab8540 >= cut2 */
1213			ret = mfd_add_devices(ab8500->dev, 0, ab8540_cut2_devs,
1214			      ARRAY_SIZE(ab8540_cut2_devs), NULL,
1215			      0, ab8500->domain);
1216	} else if (is_ab8505(ab8500))
1217		ret = mfd_add_devices(ab8500->dev, 0, ab8505_devs,
1218			      ARRAY_SIZE(ab8505_devs), NULL,
1219			      0, ab8500->domain);
1220	else
1221		ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs,
1222				ARRAY_SIZE(ab8500_devs), NULL,
1223				0, ab8500->domain);
1224	if (ret)
1225		return ret;
1226
1227	/* Add battery management devices */
1228	ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs,
1229			      ARRAY_SIZE(ab8500_bm_devs), NULL,
1230			      0, ab8500->domain);
1231	if (ret)
1232		dev_err(ab8500->dev, "error adding bm devices\n");
1233
1234	if (((is_ab8505(ab8500) || is_ab9540(ab8500)) &&
1235			ab8500->chip_id >= AB8500_CUT2P0) || is_ab8540(ab8500))
1236		ret = sysfs_create_group(&ab8500->dev->kobj,
1237					&ab9540_attr_group);
1238	else
1239		ret = sysfs_create_group(&ab8500->dev->kobj,
1240					&ab8500_attr_group);
1241
1242	if ((is_ab8505(ab8500) || is_ab9540(ab8500)) &&
1243			ab8500->chip_id >= AB8500_CUT2P0)
1244		ret = sysfs_create_group(&ab8500->dev->kobj,
1245					 &ab8505_attr_group);
1246
1247	if (ret)
1248		dev_err(ab8500->dev, "error creating sysfs entries\n");
1249
1250	return ret;
1251}
1252
1253static const struct platform_device_id ab8500_id[] = {
1254	{ "ab8500-core", AB8500_VERSION_AB8500 },
1255	{ "ab8505-core", AB8500_VERSION_AB8505 },
1256	{ "ab9540-i2c", AB8500_VERSION_AB9540 },
1257	{ "ab8540-i2c", AB8500_VERSION_AB8540 },
1258	{ }
1259};
1260
1261static struct platform_driver ab8500_core_driver = {
1262	.driver = {
1263		.name = "ab8500-core",
1264		.suppress_bind_attrs = true,
1265	},
1266	.probe	= ab8500_probe,
1267	.id_table = ab8500_id,
1268};
1269
1270static int __init ab8500_core_init(void)
1271{
1272	return platform_driver_register(&ab8500_core_driver);
1273}
1274core_initcall(ab8500_core_init);
v6.2
   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Copyright (C) ST-Ericsson SA 2010
   4 *
   5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
   6 * Author: Rabin Vincent <rabin.vincent@stericsson.com>
   7 * Author: Mattias Wallin <mattias.wallin@stericsson.com>
   8 */
   9
  10#include <linux/kernel.h>
  11#include <linux/slab.h>
  12#include <linux/init.h>
  13#include <linux/irq.h>
  14#include <linux/irqdomain.h>
  15#include <linux/delay.h>
  16#include <linux/interrupt.h>
  17#include <linux/moduleparam.h>
  18#include <linux/platform_device.h>
  19#include <linux/mfd/core.h>
  20#include <linux/mfd/abx500.h>
  21#include <linux/mfd/abx500/ab8500.h>
  22#include <linux/mfd/dbx500-prcmu.h>
  23#include <linux/of.h>
  24#include <linux/of_device.h>
  25
  26/*
  27 * Interrupt register offsets
  28 * Bank : 0x0E
  29 */
  30#define AB8500_IT_SOURCE1_REG		0x00
  31#define AB8500_IT_SOURCE2_REG		0x01
  32#define AB8500_IT_SOURCE3_REG		0x02
  33#define AB8500_IT_SOURCE4_REG		0x03
  34#define AB8500_IT_SOURCE5_REG		0x04
  35#define AB8500_IT_SOURCE6_REG		0x05
  36#define AB8500_IT_SOURCE7_REG		0x06
  37#define AB8500_IT_SOURCE8_REG		0x07
  38#define AB9540_IT_SOURCE13_REG		0x0C
  39#define AB8500_IT_SOURCE19_REG		0x12
  40#define AB8500_IT_SOURCE20_REG		0x13
  41#define AB8500_IT_SOURCE21_REG		0x14
  42#define AB8500_IT_SOURCE22_REG		0x15
  43#define AB8500_IT_SOURCE23_REG		0x16
  44#define AB8500_IT_SOURCE24_REG		0x17
  45
  46/*
  47 * latch registers
  48 */
  49#define AB8500_IT_LATCH1_REG		0x20
  50#define AB8500_IT_LATCH2_REG		0x21
  51#define AB8500_IT_LATCH3_REG		0x22
  52#define AB8500_IT_LATCH4_REG		0x23
  53#define AB8500_IT_LATCH5_REG		0x24
  54#define AB8500_IT_LATCH6_REG		0x25
  55#define AB8500_IT_LATCH7_REG		0x26
  56#define AB8500_IT_LATCH8_REG		0x27
  57#define AB8500_IT_LATCH9_REG		0x28
  58#define AB8500_IT_LATCH10_REG		0x29
  59#define AB8500_IT_LATCH12_REG		0x2B
  60#define AB9540_IT_LATCH13_REG		0x2C
  61#define AB8500_IT_LATCH19_REG		0x32
  62#define AB8500_IT_LATCH20_REG		0x33
  63#define AB8500_IT_LATCH21_REG		0x34
  64#define AB8500_IT_LATCH22_REG		0x35
  65#define AB8500_IT_LATCH23_REG		0x36
  66#define AB8500_IT_LATCH24_REG		0x37
  67
  68/*
  69 * mask registers
  70 */
  71
  72#define AB8500_IT_MASK1_REG		0x40
  73#define AB8500_IT_MASK2_REG		0x41
  74#define AB8500_IT_MASK3_REG		0x42
  75#define AB8500_IT_MASK4_REG		0x43
  76#define AB8500_IT_MASK5_REG		0x44
  77#define AB8500_IT_MASK6_REG		0x45
  78#define AB8500_IT_MASK7_REG		0x46
  79#define AB8500_IT_MASK8_REG		0x47
  80#define AB8500_IT_MASK9_REG		0x48
  81#define AB8500_IT_MASK10_REG		0x49
  82#define AB8500_IT_MASK11_REG		0x4A
  83#define AB8500_IT_MASK12_REG		0x4B
  84#define AB8500_IT_MASK13_REG		0x4C
  85#define AB8500_IT_MASK14_REG		0x4D
  86#define AB8500_IT_MASK15_REG		0x4E
  87#define AB8500_IT_MASK16_REG		0x4F
  88#define AB8500_IT_MASK17_REG		0x50
  89#define AB8500_IT_MASK18_REG		0x51
  90#define AB8500_IT_MASK19_REG		0x52
  91#define AB8500_IT_MASK20_REG		0x53
  92#define AB8500_IT_MASK21_REG		0x54
  93#define AB8500_IT_MASK22_REG		0x55
  94#define AB8500_IT_MASK23_REG		0x56
  95#define AB8500_IT_MASK24_REG		0x57
  96#define AB8500_IT_MASK25_REG		0x58
  97
  98/*
  99 * latch hierarchy registers
 100 */
 101#define AB8500_IT_LATCHHIER1_REG	0x60
 102#define AB8500_IT_LATCHHIER2_REG	0x61
 103#define AB8500_IT_LATCHHIER3_REG	0x62
 104#define AB8540_IT_LATCHHIER4_REG	0x63
 105
 106#define AB8500_IT_LATCHHIER_NUM		3
 107#define AB8540_IT_LATCHHIER_NUM		4
 108
 109#define AB8500_REV_REG			0x80
 110#define AB8500_IC_NAME_REG		0x82
 111#define AB8500_SWITCH_OFF_STATUS	0x00
 112
 113#define AB8500_TURN_ON_STATUS		0x00
 114#define AB8505_TURN_ON_STATUS_2		0x04
 115
 116#define AB8500_CH_USBCH_STAT1_REG	0x02
 117#define VBUS_DET_DBNC100		0x02
 118#define VBUS_DET_DBNC1			0x01
 119
 120static DEFINE_SPINLOCK(on_stat_lock);
 121static u8 turn_on_stat_mask = 0xFF;
 122static u8 turn_on_stat_set;
 123
 124#define AB9540_MODEM_CTRL2_REG			0x23
 125#define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT	BIT(2)
 126
 127/*
 128 * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt
 129 * numbers are indexed into this array with (num / 8). The interupts are
 130 * defined in linux/mfd/ab8500.h
 131 *
 132 * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
 133 * offset 0.
 134 */
 135/* AB8500 support */
 136static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = {
 137	0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21,
 138};
 139
 140/* AB9540 / AB8505 support */
 141static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = {
 142	0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22, 23
 143};
 144
 145/* AB8540 support */
 146static const int ab8540_irq_regoffset[AB8540_NUM_IRQ_REGS] = {
 147	0, 1, 2, 3, 4, -1, -1, -1, -1, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22,
 148	23, 25, 26, 27, 28, 29, 30, 31,
 149};
 150
 151static const char ab8500_version_str[][7] = {
 152	[AB8500_VERSION_AB8500] = "AB8500",
 153	[AB8500_VERSION_AB8505] = "AB8505",
 154	[AB8500_VERSION_AB9540] = "AB9540",
 155	[AB8500_VERSION_AB8540] = "AB8540",
 156};
 157
 158static int ab8500_prcmu_write(struct ab8500 *ab8500, u16 addr, u8 data)
 159{
 160	int ret;
 161
 162	ret = prcmu_abb_write((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
 163	if (ret < 0)
 164		dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
 165	return ret;
 166}
 167
 168static int ab8500_prcmu_write_masked(struct ab8500 *ab8500, u16 addr, u8 mask,
 169	u8 data)
 170{
 171	int ret;
 172
 173	ret = prcmu_abb_write_masked((u8)(addr >> 8), (u8)(addr & 0xFF), &data,
 174		&mask, 1);
 175	if (ret < 0)
 176		dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
 177	return ret;
 178}
 179
 180static int ab8500_prcmu_read(struct ab8500 *ab8500, u16 addr)
 181{
 182	int ret;
 183	u8 data;
 184
 185	ret = prcmu_abb_read((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
 186	if (ret < 0) {
 187		dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
 188		return ret;
 189	}
 190	return (int)data;
 191}
 192
 193static int ab8500_get_chip_id(struct device *dev)
 194{
 195	struct ab8500 *ab8500;
 196
 197	if (!dev)
 198		return -EINVAL;
 199	ab8500 = dev_get_drvdata(dev->parent);
 200	return ab8500 ? (int)ab8500->chip_id : -EINVAL;
 201}
 202
 203static int set_register_interruptible(struct ab8500 *ab8500, u8 bank,
 204	u8 reg, u8 data)
 205{
 206	int ret;
 207	/*
 208	 * Put the u8 bank and u8 register together into a an u16.
 209	 * The bank on higher 8 bits and register in lower 8 bits.
 210	 */
 211	u16 addr = ((u16)bank) << 8 | reg;
 212
 213	dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data);
 214
 215	mutex_lock(&ab8500->lock);
 216
 217	ret = ab8500->write(ab8500, addr, data);
 218	if (ret < 0)
 219		dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
 220			addr, ret);
 221	mutex_unlock(&ab8500->lock);
 222
 223	return ret;
 224}
 225
 226static int ab8500_set_register(struct device *dev, u8 bank,
 227	u8 reg, u8 value)
 228{
 229	int ret;
 230	struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
 231
 232	atomic_inc(&ab8500->transfer_ongoing);
 233	ret = set_register_interruptible(ab8500, bank, reg, value);
 234	atomic_dec(&ab8500->transfer_ongoing);
 235	return ret;
 236}
 237
 238static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,
 239	u8 reg, u8 *value)
 240{
 241	int ret;
 242	u16 addr = ((u16)bank) << 8 | reg;
 243
 244	mutex_lock(&ab8500->lock);
 245
 246	ret = ab8500->read(ab8500, addr);
 247	if (ret < 0)
 248		dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
 249			addr, ret);
 250	else
 251		*value = ret;
 252
 253	mutex_unlock(&ab8500->lock);
 254	dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret);
 255
 256	return (ret < 0) ? ret : 0;
 257}
 258
 259static int ab8500_get_register(struct device *dev, u8 bank,
 260	u8 reg, u8 *value)
 261{
 262	int ret;
 263	struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
 264
 265	atomic_inc(&ab8500->transfer_ongoing);
 266	ret = get_register_interruptible(ab8500, bank, reg, value);
 267	atomic_dec(&ab8500->transfer_ongoing);
 268	return ret;
 269}
 270
 271static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank,
 272	u8 reg, u8 bitmask, u8 bitvalues)
 273{
 274	int ret;
 275	u16 addr = ((u16)bank) << 8 | reg;
 276
 277	mutex_lock(&ab8500->lock);
 278
 279	if (ab8500->write_masked == NULL) {
 280		u8 data;
 281
 282		ret = ab8500->read(ab8500, addr);
 283		if (ret < 0) {
 284			dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
 285				addr, ret);
 286			goto out;
 287		}
 288
 289		data = (u8)ret;
 290		data = (~bitmask & data) | (bitmask & bitvalues);
 291
 292		ret = ab8500->write(ab8500, addr, data);
 293		if (ret < 0)
 294			dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
 295				addr, ret);
 296
 297		dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr,
 298			data);
 299		goto out;
 300	}
 301	ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues);
 302	if (ret < 0)
 303		dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr,
 304			ret);
 305out:
 306	mutex_unlock(&ab8500->lock);
 307	return ret;
 308}
 309
 310static int ab8500_mask_and_set_register(struct device *dev,
 311	u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
 312{
 313	int ret;
 314	struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
 315
 316	atomic_inc(&ab8500->transfer_ongoing);
 317	ret = mask_and_set_register_interruptible(ab8500, bank, reg,
 318						 bitmask, bitvalues);
 319	atomic_dec(&ab8500->transfer_ongoing);
 320	return ret;
 321}
 322
 323static struct abx500_ops ab8500_ops = {
 324	.get_chip_id = ab8500_get_chip_id,
 325	.get_register = ab8500_get_register,
 326	.set_register = ab8500_set_register,
 327	.get_register_page = NULL,
 328	.set_register_page = NULL,
 329	.mask_and_set_register = ab8500_mask_and_set_register,
 330	.event_registers_startup_state_get = NULL,
 331	.startup_irq_enabled = NULL,
 332	.dump_all_banks = ab8500_dump_all_banks,
 333};
 334
 335static void ab8500_irq_lock(struct irq_data *data)
 336{
 337	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
 338
 339	mutex_lock(&ab8500->irq_lock);
 340	atomic_inc(&ab8500->transfer_ongoing);
 341}
 342
 343static void ab8500_irq_sync_unlock(struct irq_data *data)
 344{
 345	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
 346	int i;
 347
 348	for (i = 0; i < ab8500->mask_size; i++) {
 349		u8 old = ab8500->oldmask[i];
 350		u8 new = ab8500->mask[i];
 351		int reg;
 352
 353		if (new == old)
 354			continue;
 355
 356		/*
 357		 * Interrupt register 12 doesn't exist prior to AB8500 version
 358		 * 2.0
 359		 */
 360		if (ab8500->irq_reg_offset[i] == 11 &&
 361			is_ab8500_1p1_or_earlier(ab8500))
 362			continue;
 363
 364		if (ab8500->irq_reg_offset[i] < 0)
 365			continue;
 366
 367		ab8500->oldmask[i] = new;
 368
 369		reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i];
 370		set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new);
 371	}
 372	atomic_dec(&ab8500->transfer_ongoing);
 373	mutex_unlock(&ab8500->irq_lock);
 374}
 375
 376static void ab8500_irq_mask(struct irq_data *data)
 377{
 378	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
 379	int offset = data->hwirq;
 380	int index = offset / 8;
 381	int mask = 1 << (offset % 8);
 382
 383	ab8500->mask[index] |= mask;
 384
 385	/* The AB8500 GPIOs have two interrupts each (rising & falling). */
 386	if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R)
 387		ab8500->mask[index + 2] |= mask;
 388	if (offset >= AB9540_INT_GPIO50R && offset <= AB9540_INT_GPIO54R)
 389		ab8500->mask[index + 1] |= mask;
 390	if (offset == AB8540_INT_GPIO43R || offset == AB8540_INT_GPIO44R)
 391		/* Here the falling IRQ is one bit lower */
 392		ab8500->mask[index] |= (mask << 1);
 393}
 394
 395static void ab8500_irq_unmask(struct irq_data *data)
 396{
 397	struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
 398	unsigned int type = irqd_get_trigger_type(data);
 399	int offset = data->hwirq;
 400	int index = offset / 8;
 401	int mask = 1 << (offset % 8);
 402
 403	if (type & IRQ_TYPE_EDGE_RISING)
 404		ab8500->mask[index] &= ~mask;
 405
 406	/* The AB8500 GPIOs have two interrupts each (rising & falling). */
 407	if (type & IRQ_TYPE_EDGE_FALLING) {
 408		if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R)
 409			ab8500->mask[index + 2] &= ~mask;
 410		else if (offset >= AB9540_INT_GPIO50R &&
 411			 offset <= AB9540_INT_GPIO54R)
 412			ab8500->mask[index + 1] &= ~mask;
 413		else if (offset == AB8540_INT_GPIO43R ||
 414			 offset == AB8540_INT_GPIO44R)
 415			/* Here the falling IRQ is one bit lower */
 416			ab8500->mask[index] &= ~(mask << 1);
 417		else
 418			ab8500->mask[index] &= ~mask;
 419	} else {
 420		/* Satisfies the case where type is not set. */
 421		ab8500->mask[index] &= ~mask;
 422	}
 423}
 424
 425static int ab8500_irq_set_type(struct irq_data *data, unsigned int type)
 426{
 427	return 0;
 428}
 429
 430static struct irq_chip ab8500_irq_chip = {
 431	.name			= "ab8500",
 432	.irq_bus_lock		= ab8500_irq_lock,
 433	.irq_bus_sync_unlock	= ab8500_irq_sync_unlock,
 434	.irq_mask		= ab8500_irq_mask,
 435	.irq_disable		= ab8500_irq_mask,
 436	.irq_unmask		= ab8500_irq_unmask,
 437	.irq_set_type		= ab8500_irq_set_type,
 438};
 439
 440static void update_latch_offset(u8 *offset, int i)
 441{
 442	/* Fix inconsistent ITFromLatch25 bit mapping... */
 443	if (unlikely(*offset == 17))
 444		*offset = 24;
 445	/* Fix inconsistent ab8540 bit mapping... */
 446	if (unlikely(*offset == 16))
 447		*offset = 25;
 448	if ((i == 3) && (*offset >= 24))
 449		*offset += 2;
 450}
 451
 452static int ab8500_handle_hierarchical_line(struct ab8500 *ab8500,
 453					int latch_offset, u8 latch_val)
 454{
 455	int int_bit, line, i;
 456
 457	for (i = 0; i < ab8500->mask_size; i++)
 458		if (ab8500->irq_reg_offset[i] == latch_offset)
 459			break;
 460
 461	if (i >= ab8500->mask_size) {
 462		dev_err(ab8500->dev, "Register offset 0x%2x not declared\n",
 463				latch_offset);
 464		return -ENXIO;
 465	}
 466
 467	/* ignore masked out interrupts */
 468	latch_val &= ~ab8500->mask[i];
 469
 470	while (latch_val) {
 471		int_bit = __ffs(latch_val);
 472		line = (i << 3) + int_bit;
 473		latch_val &= ~(1 << int_bit);
 474
 475		/*
 476		 * This handles the falling edge hwirqs from the GPIO
 477		 * lines. Route them back to the line registered for the
 478		 * rising IRQ, as this is merely a flag for the same IRQ
 479		 * in linux terms.
 480		 */
 481		if (line >= AB8500_INT_GPIO6F && line <= AB8500_INT_GPIO41F)
 482			line -= 16;
 483		if (line >= AB9540_INT_GPIO50F && line <= AB9540_INT_GPIO54F)
 484			line -= 8;
 485		if (line == AB8540_INT_GPIO43F || line == AB8540_INT_GPIO44F)
 486			line += 1;
 487
 488		handle_nested_irq(irq_find_mapping(ab8500->domain, line));
 489	}
 490
 491	return 0;
 492}
 493
 494static int ab8500_handle_hierarchical_latch(struct ab8500 *ab8500,
 495					int hier_offset, u8 hier_val)
 496{
 497	int latch_bit, status;
 498	u8 latch_offset, latch_val;
 499
 500	do {
 501		latch_bit = __ffs(hier_val);
 502		latch_offset = (hier_offset << 3) + latch_bit;
 503
 504		update_latch_offset(&latch_offset, hier_offset);
 505
 506		status = get_register_interruptible(ab8500,
 507				AB8500_INTERRUPT,
 508				AB8500_IT_LATCH1_REG + latch_offset,
 509				&latch_val);
 510		if (status < 0 || latch_val == 0)
 511			goto discard;
 512
 513		status = ab8500_handle_hierarchical_line(ab8500,
 514				latch_offset, latch_val);
 515		if (status < 0)
 516			return status;
 517discard:
 518		hier_val &= ~(1 << latch_bit);
 519	} while (hier_val);
 520
 521	return 0;
 522}
 523
 524static irqreturn_t ab8500_hierarchical_irq(int irq, void *dev)
 525{
 526	struct ab8500 *ab8500 = dev;
 527	u8 i;
 528
 529	dev_vdbg(ab8500->dev, "interrupt\n");
 530
 531	/*  Hierarchical interrupt version */
 532	for (i = 0; i < (ab8500->it_latchhier_num); i++) {
 533		int status;
 534		u8 hier_val;
 535
 536		status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
 537			AB8500_IT_LATCHHIER1_REG + i, &hier_val);
 538		if (status < 0 || hier_val == 0)
 539			continue;
 540
 541		status = ab8500_handle_hierarchical_latch(ab8500, i, hier_val);
 542		if (status < 0)
 543			break;
 544	}
 545	return IRQ_HANDLED;
 546}
 547
 548static int ab8500_irq_map(struct irq_domain *d, unsigned int virq,
 549				irq_hw_number_t hwirq)
 550{
 551	struct ab8500 *ab8500 = d->host_data;
 552
 553	if (!ab8500)
 554		return -EINVAL;
 555
 556	irq_set_chip_data(virq, ab8500);
 557	irq_set_chip_and_handler(virq, &ab8500_irq_chip,
 558				handle_simple_irq);
 559	irq_set_nested_thread(virq, 1);
 560	irq_set_noprobe(virq);
 561
 562	return 0;
 563}
 564
 565static const struct irq_domain_ops ab8500_irq_ops = {
 566	.map    = ab8500_irq_map,
 567	.xlate  = irq_domain_xlate_twocell,
 568};
 569
 570static int ab8500_irq_init(struct ab8500 *ab8500, struct device_node *np)
 571{
 572	int num_irqs;
 573
 574	if (is_ab8540(ab8500))
 575		num_irqs = AB8540_NR_IRQS;
 576	else if (is_ab9540(ab8500))
 577		num_irqs = AB9540_NR_IRQS;
 578	else if (is_ab8505(ab8500))
 579		num_irqs = AB8505_NR_IRQS;
 580	else
 581		num_irqs = AB8500_NR_IRQS;
 582
 583	/* If ->irq_base is zero this will give a linear mapping */
 584	ab8500->domain = irq_domain_add_simple(ab8500->dev->of_node,
 585					       num_irqs, 0,
 586					       &ab8500_irq_ops, ab8500);
 587
 588	if (!ab8500->domain) {
 589		dev_err(ab8500->dev, "Failed to create irqdomain\n");
 590		return -ENODEV;
 591	}
 592
 593	return 0;
 594}
 595
 596int ab8500_suspend(struct ab8500 *ab8500)
 597{
 598	if (atomic_read(&ab8500->transfer_ongoing))
 599		return -EINVAL;
 600
 601	return 0;
 602}
 603
 604static const struct mfd_cell ab8500_bm_devs[] = {
 605	MFD_CELL_OF("ab8500-charger", NULL, NULL, 0, 0,
 606		    "stericsson,ab8500-charger"),
 607	MFD_CELL_OF("ab8500-btemp", NULL, NULL, 0, 0,
 608		    "stericsson,ab8500-btemp"),
 609	MFD_CELL_OF("ab8500-fg", NULL, NULL, 0, 0,
 610		    "stericsson,ab8500-fg"),
 611	MFD_CELL_OF("ab8500-chargalg", NULL, NULL, 0, 0,
 612		    "stericsson,ab8500-chargalg"),
 613};
 614
 615static const struct mfd_cell ab8500_devs[] = {
 616	MFD_CELL_OF("ab8500-sysctrl",
 617		    NULL, NULL, 0, 0, "stericsson,ab8500-sysctrl"),
 618	MFD_CELL_OF("ab8500-ext-regulator",
 619		    NULL, NULL, 0, 0, "stericsson,ab8500-ext-regulator"),
 620	MFD_CELL_OF("ab8500-regulator",
 621		    NULL, NULL, 0, 0, "stericsson,ab8500-regulator"),
 622	MFD_CELL_OF("ab8500-clk",
 623		    NULL, NULL, 0, 0, "stericsson,ab8500-clk"),
 624	MFD_CELL_OF("ab8500-gpadc",
 625		    NULL, NULL, 0, 0, "stericsson,ab8500-gpadc"),
 626	MFD_CELL_OF("ab8500-rtc",
 627		    NULL, NULL, 0, 0, "stericsson,ab8500-rtc"),
 628	MFD_CELL_OF("ab8500-acc-det",
 629		    NULL, NULL, 0, 0, "stericsson,ab8500-acc-det"),
 630	MFD_CELL_OF("ab8500-poweron-key",
 631		    NULL, NULL, 0, 0, "stericsson,ab8500-poweron-key"),
 632	MFD_CELL_OF("ab8500-pwm",
 633		    NULL, NULL, 0, 1, "stericsson,ab8500-pwm"),
 634	MFD_CELL_OF("ab8500-pwm",
 635		    NULL, NULL, 0, 2, "stericsson,ab8500-pwm"),
 636	MFD_CELL_OF("ab8500-pwm",
 637		    NULL, NULL, 0, 3, "stericsson,ab8500-pwm"),
 638	MFD_CELL_OF("ab8500-denc",
 639		    NULL, NULL, 0, 0, "stericsson,ab8500-denc"),
 640	MFD_CELL_OF("pinctrl-ab8500",
 641		    NULL, NULL, 0, 0, "stericsson,ab8500-gpio"),
 642	MFD_CELL_OF("abx500-temp",
 643		    NULL, NULL, 0, 0, "stericsson,abx500-temp"),
 644	MFD_CELL_OF("ab8500-usb",
 645		    NULL, NULL, 0, 0, "stericsson,ab8500-usb"),
 646	MFD_CELL_OF("ab8500-codec",
 647		    NULL, NULL, 0, 0, "stericsson,ab8500-codec"),
 648};
 649
 650static const struct mfd_cell ab9540_devs[] = {
 651	{
 652		.name = "ab8500-sysctrl",
 653	},
 654	{
 655		.name = "ab8500-ext-regulator",
 656	},
 657	{
 658		.name = "ab8500-regulator",
 659	},
 660	{
 661		.name = "abx500-clk",
 662		.of_compatible = "stericsson,abx500-clk",
 663	},
 664	{
 665		.name = "ab8500-gpadc",
 666		.of_compatible = "stericsson,ab8500-gpadc",
 667	},
 668	{
 669		.name = "ab8500-rtc",
 670	},
 671	{
 672		.name = "ab8500-acc-det",
 673	},
 674	{
 675		.name = "ab8500-poweron-key",
 676	},
 677	{
 678		.name = "ab8500-pwm",
 679		.id = 1,
 680	},
 681	{
 682		.name = "abx500-temp",
 683	},
 684	{
 685		.name = "pinctrl-ab9540",
 686		.of_compatible = "stericsson,ab9540-gpio",
 687	},
 688	{
 689		.name = "ab9540-usb",
 690	},
 691	{
 692		.name = "ab9540-codec",
 693	},
 694	{
 695		.name = "ab-iddet",
 696	},
 697};
 698
 699/* Device list for ab8505  */
 700static const struct mfd_cell ab8505_devs[] = {
 701	{
 702		.name = "ab8500-sysctrl",
 703		.of_compatible = "stericsson,ab8500-sysctrl",
 704	},
 705	{
 706		.name = "ab8500-regulator",
 707		.of_compatible = "stericsson,ab8505-regulator",
 708	},
 709	{
 710		.name = "abx500-clk",
 711		.of_compatible = "stericsson,ab8500-clk",
 712	},
 713	{
 714		.name = "ab8500-gpadc",
 715		.of_compatible = "stericsson,ab8500-gpadc",
 716	},
 717	{
 718		.name = "ab8500-rtc",
 719		.of_compatible = "stericsson,ab8500-rtc",
 720	},
 721	{
 722		.name = "ab8500-acc-det",
 723		.of_compatible = "stericsson,ab8500-acc-det",
 724	},
 725	{
 726		.name = "ab8500-poweron-key",
 727		.of_compatible = "stericsson,ab8500-poweron-key",
 728	},
 729	{
 730		.name = "ab8500-pwm",
 731		.of_compatible = "stericsson,ab8500-pwm",
 732		.id = 1,
 733	},
 734	{
 735		.name = "pinctrl-ab8505",
 736		.of_compatible = "stericsson,ab8505-gpio",
 737	},
 738	{
 739		.name = "ab8500-usb",
 740		.of_compatible = "stericsson,ab8500-usb",
 741	},
 742	{
 743		.name = "ab8500-codec",
 744		.of_compatible = "stericsson,ab8500-codec",
 745	},
 746	{
 747		.name = "ab-iddet",
 748	},
 749};
 750
 751static const struct mfd_cell ab8540_devs[] = {
 752	{
 753		.name = "ab8500-sysctrl",
 754	},
 755	{
 756		.name = "ab8500-ext-regulator",
 757	},
 758	{
 759		.name = "ab8500-regulator",
 760	},
 761	{
 762		.name = "abx500-clk",
 763		.of_compatible = "stericsson,abx500-clk",
 764	},
 765	{
 766		.name = "ab8500-gpadc",
 767		.of_compatible = "stericsson,ab8500-gpadc",
 768	},
 769	{
 770		.name = "ab8500-acc-det",
 771	},
 772	{
 773		.name = "ab8500-poweron-key",
 774	},
 775	{
 776		.name = "ab8500-pwm",
 777		.id = 1,
 778	},
 779	{
 780		.name = "abx500-temp",
 781	},
 782	{
 783		.name = "pinctrl-ab8540",
 784	},
 785	{
 786		.name = "ab8540-usb",
 787	},
 788	{
 789		.name = "ab8540-codec",
 790	},
 791	{
 792		.name = "ab-iddet",
 793	},
 794};
 795
 796static const struct mfd_cell ab8540_cut1_devs[] = {
 797	{
 798		.name = "ab8500-rtc",
 799		.of_compatible = "stericsson,ab8500-rtc",
 800	},
 801};
 802
 803static const struct mfd_cell ab8540_cut2_devs[] = {
 804	{
 805		.name = "ab8540-rtc",
 806		.of_compatible = "stericsson,ab8540-rtc",
 807	},
 808};
 809
 810static ssize_t chip_id_show(struct device *dev,
 811			    struct device_attribute *attr, char *buf)
 812{
 813	struct ab8500 *ab8500;
 814
 815	ab8500 = dev_get_drvdata(dev);
 816
 817	return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL);
 818}
 819
 820/*
 821 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
 822 * 0x01 Swoff bit programming
 823 * 0x02 Thermal protection activation
 824 * 0x04 Vbat lower then BattOk falling threshold
 825 * 0x08 Watchdog expired
 826 * 0x10 Non presence of 32kHz clock
 827 * 0x20 Battery level lower than power on reset threshold
 828 * 0x40 Power on key 1 pressed longer than 10 seconds
 829 * 0x80 DB8500 thermal shutdown
 830 */
 831static ssize_t switch_off_status_show(struct device *dev,
 832				      struct device_attribute *attr, char *buf)
 833{
 834	int ret;
 835	u8 value;
 836	struct ab8500 *ab8500;
 837
 838	ab8500 = dev_get_drvdata(dev);
 839	ret = get_register_interruptible(ab8500, AB8500_RTC,
 840		AB8500_SWITCH_OFF_STATUS, &value);
 841	if (ret < 0)
 842		return ret;
 843	return sprintf(buf, "%#x\n", value);
 844}
 845
 846/* use mask and set to override the register turn_on_stat value */
 847void ab8500_override_turn_on_stat(u8 mask, u8 set)
 848{
 849	spin_lock(&on_stat_lock);
 850	turn_on_stat_mask = mask;
 851	turn_on_stat_set = set;
 852	spin_unlock(&on_stat_lock);
 853}
 854
 855/*
 856 * ab8500 has turned on due to (TURN_ON_STATUS):
 857 * 0x01 PORnVbat
 858 * 0x02 PonKey1dbF
 859 * 0x04 PonKey2dbF
 860 * 0x08 RTCAlarm
 861 * 0x10 MainChDet
 862 * 0x20 VbusDet
 863 * 0x40 UsbIDDetect
 864 * 0x80 Reserved
 865 */
 866static ssize_t turn_on_status_show(struct device *dev,
 867				   struct device_attribute *attr, char *buf)
 868{
 869	int ret;
 870	u8 value;
 871	struct ab8500 *ab8500;
 872
 873	ab8500 = dev_get_drvdata(dev);
 874	ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
 875		AB8500_TURN_ON_STATUS, &value);
 876	if (ret < 0)
 877		return ret;
 878
 879	/*
 880	 * In L9540, turn_on_status register is not updated correctly if
 881	 * the device is rebooted with AC/USB charger connected. Due to
 882	 * this, the device boots android instead of entering into charge
 883	 * only mode. Read the AC/USB status register to detect the charger
 884	 * presence and update the turn on status manually.
 885	 */
 886	if (is_ab9540(ab8500)) {
 887		spin_lock(&on_stat_lock);
 888		value = (value & turn_on_stat_mask) | turn_on_stat_set;
 889		spin_unlock(&on_stat_lock);
 890	}
 891
 892	return sprintf(buf, "%#x\n", value);
 893}
 894
 895static ssize_t turn_on_status_2_show(struct device *dev,
 896				     struct device_attribute *attr, char *buf)
 897{
 898	int ret;
 899	u8 value;
 900	struct ab8500 *ab8500;
 901
 902	ab8500 = dev_get_drvdata(dev);
 903	ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
 904		AB8505_TURN_ON_STATUS_2, &value);
 905	if (ret < 0)
 906		return ret;
 907	return sprintf(buf, "%#x\n", (value & 0x1));
 908}
 909
 910static ssize_t dbbrstn_show(struct device *dev,
 911			    struct device_attribute *attr, char *buf)
 912{
 913	struct ab8500 *ab8500;
 914	int ret;
 915	u8 value;
 916
 917	ab8500 = dev_get_drvdata(dev);
 918
 919	ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2,
 920		AB9540_MODEM_CTRL2_REG, &value);
 921	if (ret < 0)
 922		return ret;
 923
 924	return sprintf(buf, "%d\n",
 925			(value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0);
 926}
 927
 928static ssize_t dbbrstn_store(struct device *dev,
 929	struct device_attribute *attr, const char *buf, size_t count)
 930{
 931	struct ab8500 *ab8500;
 932	int ret = count;
 933	int err;
 934	u8 bitvalues;
 935
 936	ab8500 = dev_get_drvdata(dev);
 937
 938	if (count > 0) {
 939		switch (buf[0]) {
 940		case '0':
 941			bitvalues = 0;
 942			break;
 943		case '1':
 944			bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT;
 945			break;
 946		default:
 947			goto exit;
 948		}
 949
 950		err = mask_and_set_register_interruptible(ab8500,
 951			AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG,
 952			AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues);
 953		if (err)
 954			dev_info(ab8500->dev,
 955				"Failed to set DBBRSTN %c, err %#x\n",
 956				buf[0], err);
 957	}
 958
 959exit:
 960	return ret;
 961}
 962
 963static DEVICE_ATTR_RO(chip_id);
 964static DEVICE_ATTR_RO(switch_off_status);
 965static DEVICE_ATTR_RO(turn_on_status);
 966static DEVICE_ATTR_RO(turn_on_status_2);
 967static DEVICE_ATTR_RW(dbbrstn);
 968
 969static struct attribute *ab8500_sysfs_entries[] = {
 970	&dev_attr_chip_id.attr,
 971	&dev_attr_switch_off_status.attr,
 972	&dev_attr_turn_on_status.attr,
 973	NULL,
 974};
 975
 976static struct attribute *ab8505_sysfs_entries[] = {
 977	&dev_attr_turn_on_status_2.attr,
 978	NULL,
 979};
 980
 981static struct attribute *ab9540_sysfs_entries[] = {
 982	&dev_attr_chip_id.attr,
 983	&dev_attr_switch_off_status.attr,
 984	&dev_attr_turn_on_status.attr,
 985	&dev_attr_dbbrstn.attr,
 986	NULL,
 987};
 988
 989static const struct attribute_group ab8500_attr_group = {
 990	.attrs	= ab8500_sysfs_entries,
 991};
 992
 993static const struct attribute_group ab8505_attr_group = {
 994	.attrs	= ab8505_sysfs_entries,
 995};
 996
 997static const struct attribute_group ab9540_attr_group = {
 998	.attrs	= ab9540_sysfs_entries,
 999};
1000
1001static int ab8500_probe(struct platform_device *pdev)
1002{
1003	static const char * const switch_off_status[] = {
1004		"Swoff bit programming",
1005		"Thermal protection activation",
1006		"Vbat lower then BattOk falling threshold",
1007		"Watchdog expired",
1008		"Non presence of 32kHz clock",
1009		"Battery level lower than power on reset threshold",
1010		"Power on key 1 pressed longer than 10 seconds",
1011		"DB8500 thermal shutdown"};
1012	static const char * const turn_on_status[] = {
1013		"Battery rising (Vbat)",
1014		"Power On Key 1 dbF",
1015		"Power On Key 2 dbF",
1016		"RTC Alarm",
1017		"Main Charger Detect",
1018		"Vbus Detect (USB)",
1019		"USB ID Detect",
1020		"UART Factory Mode Detect"};
1021	const struct platform_device_id *platid = platform_get_device_id(pdev);
1022	enum ab8500_version version = AB8500_VERSION_UNDEFINED;
1023	struct device_node *np = pdev->dev.of_node;
1024	struct ab8500 *ab8500;
1025	int ret;
1026	int i;
1027	int irq;
1028	u8 value;
1029
1030	ab8500 = devm_kzalloc(&pdev->dev, sizeof(*ab8500), GFP_KERNEL);
1031	if (!ab8500)
1032		return -ENOMEM;
1033
1034	ab8500->dev = &pdev->dev;
1035
1036	irq = platform_get_irq(pdev, 0);
1037	if (irq < 0)
1038		return irq;
1039
1040	ab8500->irq = irq;
1041
1042	ab8500->read = ab8500_prcmu_read;
1043	ab8500->write = ab8500_prcmu_write;
1044	ab8500->write_masked = ab8500_prcmu_write_masked;
1045
1046	mutex_init(&ab8500->lock);
1047	mutex_init(&ab8500->irq_lock);
1048	atomic_set(&ab8500->transfer_ongoing, 0);
1049
1050	platform_set_drvdata(pdev, ab8500);
1051
1052	if (platid)
1053		version = platid->driver_data;
1054
1055	if (version != AB8500_VERSION_UNDEFINED)
1056		ab8500->version = version;
1057	else {
1058		ret = get_register_interruptible(ab8500, AB8500_MISC,
1059			AB8500_IC_NAME_REG, &value);
1060		if (ret < 0) {
1061			dev_err(&pdev->dev, "could not probe HW\n");
1062			return ret;
1063		}
1064
1065		ab8500->version = value;
1066	}
1067
1068	ret = get_register_interruptible(ab8500, AB8500_MISC,
1069		AB8500_REV_REG, &value);
1070	if (ret < 0)
1071		return ret;
1072
1073	ab8500->chip_id = value;
1074
1075	dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n",
1076			ab8500_version_str[ab8500->version],
1077			ab8500->chip_id >> 4,
1078			ab8500->chip_id & 0x0F);
1079
1080	/* Configure AB8540 */
1081	if (is_ab8540(ab8500)) {
1082		ab8500->mask_size = AB8540_NUM_IRQ_REGS;
1083		ab8500->irq_reg_offset = ab8540_irq_regoffset;
1084		ab8500->it_latchhier_num = AB8540_IT_LATCHHIER_NUM;
1085	} /* Configure AB8500 or AB9540 IRQ */
1086	else if (is_ab9540(ab8500) || is_ab8505(ab8500)) {
1087		ab8500->mask_size = AB9540_NUM_IRQ_REGS;
1088		ab8500->irq_reg_offset = ab9540_irq_regoffset;
1089		ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM;
1090	} else {
1091		ab8500->mask_size = AB8500_NUM_IRQ_REGS;
1092		ab8500->irq_reg_offset = ab8500_irq_regoffset;
1093		ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM;
1094	}
1095	ab8500->mask = devm_kzalloc(&pdev->dev, ab8500->mask_size,
1096				    GFP_KERNEL);
1097	if (!ab8500->mask)
1098		return -ENOMEM;
1099	ab8500->oldmask = devm_kzalloc(&pdev->dev, ab8500->mask_size,
1100				       GFP_KERNEL);
1101	if (!ab8500->oldmask)
1102		return -ENOMEM;
1103
1104	/*
1105	 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
1106	 * 0x01 Swoff bit programming
1107	 * 0x02 Thermal protection activation
1108	 * 0x04 Vbat lower then BattOk falling threshold
1109	 * 0x08 Watchdog expired
1110	 * 0x10 Non presence of 32kHz clock
1111	 * 0x20 Battery level lower than power on reset threshold
1112	 * 0x40 Power on key 1 pressed longer than 10 seconds
1113	 * 0x80 DB8500 thermal shutdown
1114	 */
1115
1116	ret = get_register_interruptible(ab8500, AB8500_RTC,
1117		AB8500_SWITCH_OFF_STATUS, &value);
1118	if (ret < 0)
1119		return ret;
1120	dev_info(ab8500->dev, "switch off cause(s) (%#x): ", value);
1121
1122	if (value) {
1123		for (i = 0; i < ARRAY_SIZE(switch_off_status); i++) {
1124			if (value & 1)
1125				pr_cont(" \"%s\"", switch_off_status[i]);
1126			value = value >> 1;
1127
1128		}
1129		pr_cont("\n");
1130	} else {
1131		pr_cont(" None\n");
1132	}
1133	ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
1134		AB8500_TURN_ON_STATUS, &value);
1135	if (ret < 0)
1136		return ret;
1137	dev_info(ab8500->dev, "turn on reason(s) (%#x): ", value);
1138
1139	if (value) {
1140		for (i = 0; i < ARRAY_SIZE(turn_on_status); i++) {
1141			if (value & 1)
1142				pr_cont("\"%s\" ", turn_on_status[i]);
1143			value = value >> 1;
1144		}
1145		pr_cont("\n");
1146	} else {
1147		pr_cont("None\n");
1148	}
1149
1150	if (is_ab9540(ab8500)) {
1151		ret = get_register_interruptible(ab8500, AB8500_CHARGER,
1152			AB8500_CH_USBCH_STAT1_REG, &value);
1153		if (ret < 0)
1154			return ret;
1155		if ((value & VBUS_DET_DBNC1) && (value & VBUS_DET_DBNC100))
1156			ab8500_override_turn_on_stat(~AB8500_POW_KEY_1_ON,
1157						     AB8500_VBUS_DET);
1158	}
1159
1160	/* Clear and mask all interrupts */
1161	for (i = 0; i < ab8500->mask_size; i++) {
1162		/*
1163		 * Interrupt register 12 doesn't exist prior to AB8500 version
1164		 * 2.0
1165		 */
1166		if (ab8500->irq_reg_offset[i] == 11 &&
1167				is_ab8500_1p1_or_earlier(ab8500))
1168			continue;
1169
1170		if (ab8500->irq_reg_offset[i] < 0)
1171			continue;
1172
1173		get_register_interruptible(ab8500, AB8500_INTERRUPT,
1174			AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i],
1175			&value);
1176		set_register_interruptible(ab8500, AB8500_INTERRUPT,
1177			AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff);
1178	}
1179
1180	ret = abx500_register_ops(ab8500->dev, &ab8500_ops);
1181	if (ret)
1182		return ret;
1183
1184	for (i = 0; i < ab8500->mask_size; i++)
1185		ab8500->mask[i] = ab8500->oldmask[i] = 0xff;
1186
1187	ret = ab8500_irq_init(ab8500, np);
1188	if (ret)
1189		return ret;
1190
1191	ret = devm_request_threaded_irq(&pdev->dev, ab8500->irq, NULL,
1192			ab8500_hierarchical_irq,
1193			IRQF_ONESHOT | IRQF_NO_SUSPEND,
1194			"ab8500", ab8500);
1195	if (ret)
1196		return ret;
1197
1198	if (is_ab9540(ab8500))
1199		ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs,
1200				ARRAY_SIZE(ab9540_devs), NULL,
1201				0, ab8500->domain);
1202	else if (is_ab8540(ab8500)) {
1203		ret = mfd_add_devices(ab8500->dev, 0, ab8540_devs,
1204			      ARRAY_SIZE(ab8540_devs), NULL,
1205			      0, ab8500->domain);
1206		if (ret)
1207			return ret;
1208
1209		if (is_ab8540_1p2_or_earlier(ab8500))
1210			ret = mfd_add_devices(ab8500->dev, 0, ab8540_cut1_devs,
1211			      ARRAY_SIZE(ab8540_cut1_devs), NULL,
1212			      0, ab8500->domain);
1213		else /* ab8540 >= cut2 */
1214			ret = mfd_add_devices(ab8500->dev, 0, ab8540_cut2_devs,
1215			      ARRAY_SIZE(ab8540_cut2_devs), NULL,
1216			      0, ab8500->domain);
1217	} else if (is_ab8505(ab8500))
1218		ret = mfd_add_devices(ab8500->dev, 0, ab8505_devs,
1219			      ARRAY_SIZE(ab8505_devs), NULL,
1220			      0, ab8500->domain);
1221	else
1222		ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs,
1223				ARRAY_SIZE(ab8500_devs), NULL,
1224				0, ab8500->domain);
1225	if (ret)
1226		return ret;
1227
1228	/* Add battery management devices */
1229	ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs,
1230			      ARRAY_SIZE(ab8500_bm_devs), NULL,
1231			      0, ab8500->domain);
1232	if (ret)
1233		dev_err(ab8500->dev, "error adding bm devices\n");
1234
1235	if (((is_ab8505(ab8500) || is_ab9540(ab8500)) &&
1236			ab8500->chip_id >= AB8500_CUT2P0) || is_ab8540(ab8500))
1237		ret = sysfs_create_group(&ab8500->dev->kobj,
1238					&ab9540_attr_group);
1239	else
1240		ret = sysfs_create_group(&ab8500->dev->kobj,
1241					&ab8500_attr_group);
1242
1243	if ((is_ab8505(ab8500) || is_ab9540(ab8500)) &&
1244			ab8500->chip_id >= AB8500_CUT2P0)
1245		ret = sysfs_create_group(&ab8500->dev->kobj,
1246					 &ab8505_attr_group);
1247
1248	if (ret)
1249		dev_err(ab8500->dev, "error creating sysfs entries\n");
1250
1251	return ret;
1252}
1253
1254static const struct platform_device_id ab8500_id[] = {
1255	{ "ab8500-core", AB8500_VERSION_AB8500 },
1256	{ "ab8505-core", AB8500_VERSION_AB8505 },
1257	{ "ab9540-i2c", AB8500_VERSION_AB9540 },
1258	{ "ab8540-i2c", AB8500_VERSION_AB8540 },
1259	{ }
1260};
1261
1262static struct platform_driver ab8500_core_driver = {
1263	.driver = {
1264		.name = "ab8500-core",
1265		.suppress_bind_attrs = true,
1266	},
1267	.probe	= ab8500_probe,
1268	.id_table = ab8500_id,
1269};
1270
1271static int __init ab8500_core_init(void)
1272{
1273	return platform_driver_register(&ab8500_core_driver);
1274}
1275core_initcall(ab8500_core_init);