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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * OMAP hardware spinlock driver
4 *
5 * Copyright (C) 2010-2021 Texas Instruments Incorporated - https://www.ti.com
6 *
7 * Contact: Simon Que <sque@ti.com>
8 * Hari Kanigeri <h-kanigeri2@ti.com>
9 * Ohad Ben-Cohen <ohad@wizery.com>
10 * Suman Anna <s-anna@ti.com>
11 */
12
13#include <linux/kernel.h>
14#include <linux/module.h>
15#include <linux/device.h>
16#include <linux/delay.h>
17#include <linux/io.h>
18#include <linux/bitops.h>
19#include <linux/pm_runtime.h>
20#include <linux/slab.h>
21#include <linux/spinlock.h>
22#include <linux/hwspinlock.h>
23#include <linux/of.h>
24#include <linux/platform_device.h>
25
26#include "hwspinlock_internal.h"
27
28/* Spinlock register offsets */
29#define SYSSTATUS_OFFSET 0x0014
30#define LOCK_BASE_OFFSET 0x0800
31
32#define SPINLOCK_NUMLOCKS_BIT_OFFSET (24)
33
34/* Possible values of SPINLOCK_LOCK_REG */
35#define SPINLOCK_NOTTAKEN (0) /* free */
36#define SPINLOCK_TAKEN (1) /* locked */
37
38static int omap_hwspinlock_trylock(struct hwspinlock *lock)
39{
40 void __iomem *lock_addr = lock->priv;
41
42 /* attempt to acquire the lock by reading its value */
43 return (SPINLOCK_NOTTAKEN == readl(lock_addr));
44}
45
46static void omap_hwspinlock_unlock(struct hwspinlock *lock)
47{
48 void __iomem *lock_addr = lock->priv;
49
50 /* release the lock by writing 0 to it */
51 writel(SPINLOCK_NOTTAKEN, lock_addr);
52}
53
54/*
55 * relax the OMAP interconnect while spinning on it.
56 *
57 * The specs recommended that the retry delay time will be
58 * just over half of the time that a requester would be
59 * expected to hold the lock.
60 *
61 * The number below is taken from an hardware specs example,
62 * obviously it is somewhat arbitrary.
63 */
64static void omap_hwspinlock_relax(struct hwspinlock *lock)
65{
66 ndelay(50);
67}
68
69static const struct hwspinlock_ops omap_hwspinlock_ops = {
70 .trylock = omap_hwspinlock_trylock,
71 .unlock = omap_hwspinlock_unlock,
72 .relax = omap_hwspinlock_relax,
73};
74
75static int omap_hwspinlock_probe(struct platform_device *pdev)
76{
77 struct device_node *node = pdev->dev.of_node;
78 struct hwspinlock_device *bank;
79 struct hwspinlock *hwlock;
80 void __iomem *io_base;
81 int num_locks, i, ret;
82 /* Only a single hwspinlock block device is supported */
83 int base_id = 0;
84
85 if (!node)
86 return -ENODEV;
87
88 io_base = devm_platform_ioremap_resource(pdev, 0);
89 if (IS_ERR(io_base))
90 return PTR_ERR(io_base);
91
92 /*
93 * make sure the module is enabled and clocked before reading
94 * the module SYSSTATUS register
95 */
96 pm_runtime_enable(&pdev->dev);
97 ret = pm_runtime_resume_and_get(&pdev->dev);
98 if (ret < 0)
99 goto runtime_err;
100
101 /* Determine number of locks */
102 i = readl(io_base + SYSSTATUS_OFFSET);
103 i >>= SPINLOCK_NUMLOCKS_BIT_OFFSET;
104
105 /*
106 * runtime PM will make sure the clock of this module is
107 * enabled again iff at least one lock is requested
108 */
109 ret = pm_runtime_put(&pdev->dev);
110 if (ret < 0)
111 goto runtime_err;
112
113 /* one of the four lsb's must be set, and nothing else */
114 if (hweight_long(i & 0xf) != 1 || i > 8) {
115 ret = -EINVAL;
116 goto runtime_err;
117 }
118
119 num_locks = i * 32; /* actual number of locks in this device */
120
121 bank = devm_kzalloc(&pdev->dev, struct_size(bank, lock, num_locks),
122 GFP_KERNEL);
123 if (!bank) {
124 ret = -ENOMEM;
125 goto runtime_err;
126 }
127
128 platform_set_drvdata(pdev, bank);
129
130 for (i = 0, hwlock = &bank->lock[0]; i < num_locks; i++, hwlock++)
131 hwlock->priv = io_base + LOCK_BASE_OFFSET + sizeof(u32) * i;
132
133 ret = hwspin_lock_register(bank, &pdev->dev, &omap_hwspinlock_ops,
134 base_id, num_locks);
135 if (ret)
136 goto runtime_err;
137
138 dev_dbg(&pdev->dev, "Registered %d locks with HwSpinlock core\n",
139 num_locks);
140
141 return 0;
142
143runtime_err:
144 pm_runtime_disable(&pdev->dev);
145 return ret;
146}
147
148static void omap_hwspinlock_remove(struct platform_device *pdev)
149{
150 struct hwspinlock_device *bank = platform_get_drvdata(pdev);
151 int ret;
152
153 ret = hwspin_lock_unregister(bank);
154 if (ret) {
155 dev_err(&pdev->dev, "%s failed: %d\n", __func__, ret);
156 return;
157 }
158
159 pm_runtime_disable(&pdev->dev);
160}
161
162static const struct of_device_id omap_hwspinlock_of_match[] = {
163 { .compatible = "ti,omap4-hwspinlock", },
164 { .compatible = "ti,am64-hwspinlock", },
165 { .compatible = "ti,am654-hwspinlock", },
166 { /* end */ },
167};
168MODULE_DEVICE_TABLE(of, omap_hwspinlock_of_match);
169
170static struct platform_driver omap_hwspinlock_driver = {
171 .probe = omap_hwspinlock_probe,
172 .remove_new = omap_hwspinlock_remove,
173 .driver = {
174 .name = "omap_hwspinlock",
175 .of_match_table = omap_hwspinlock_of_match,
176 },
177};
178
179static int __init omap_hwspinlock_init(void)
180{
181 return platform_driver_register(&omap_hwspinlock_driver);
182}
183/* board init code might need to reserve hwspinlocks for predefined purposes */
184postcore_initcall(omap_hwspinlock_init);
185
186static void __exit omap_hwspinlock_exit(void)
187{
188 platform_driver_unregister(&omap_hwspinlock_driver);
189}
190module_exit(omap_hwspinlock_exit);
191
192MODULE_LICENSE("GPL v2");
193MODULE_DESCRIPTION("Hardware spinlock driver for OMAP");
194MODULE_AUTHOR("Simon Que <sque@ti.com>");
195MODULE_AUTHOR("Hari Kanigeri <h-kanigeri2@ti.com>");
196MODULE_AUTHOR("Ohad Ben-Cohen <ohad@wizery.com>");
1/*
2 * OMAP hardware spinlock driver
3 *
4 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com
5 *
6 * Contact: Simon Que <sque@ti.com>
7 * Hari Kanigeri <h-kanigeri2@ti.com>
8 * Ohad Ben-Cohen <ohad@wizery.com>
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 */
19
20#include <linux/kernel.h>
21#include <linux/module.h>
22#include <linux/device.h>
23#include <linux/delay.h>
24#include <linux/io.h>
25#include <linux/bitops.h>
26#include <linux/pm_runtime.h>
27#include <linux/slab.h>
28#include <linux/spinlock.h>
29#include <linux/hwspinlock.h>
30#include <linux/platform_device.h>
31
32#include "hwspinlock_internal.h"
33
34/* Spinlock register offsets */
35#define SYSSTATUS_OFFSET 0x0014
36#define LOCK_BASE_OFFSET 0x0800
37
38#define SPINLOCK_NUMLOCKS_BIT_OFFSET (24)
39
40/* Possible values of SPINLOCK_LOCK_REG */
41#define SPINLOCK_NOTTAKEN (0) /* free */
42#define SPINLOCK_TAKEN (1) /* locked */
43
44#define to_omap_hwspinlock(lock) \
45 container_of(lock, struct omap_hwspinlock, lock)
46
47struct omap_hwspinlock {
48 struct hwspinlock lock;
49 void __iomem *addr;
50};
51
52struct omap_hwspinlock_state {
53 int num_locks; /* Total number of locks in system */
54 void __iomem *io_base; /* Mapped base address */
55};
56
57static int omap_hwspinlock_trylock(struct hwspinlock *lock)
58{
59 struct omap_hwspinlock *omap_lock = to_omap_hwspinlock(lock);
60
61 /* attempt to acquire the lock by reading its value */
62 return (SPINLOCK_NOTTAKEN == readl(omap_lock->addr));
63}
64
65static void omap_hwspinlock_unlock(struct hwspinlock *lock)
66{
67 struct omap_hwspinlock *omap_lock = to_omap_hwspinlock(lock);
68
69 /* release the lock by writing 0 to it */
70 writel(SPINLOCK_NOTTAKEN, omap_lock->addr);
71}
72
73/*
74 * relax the OMAP interconnect while spinning on it.
75 *
76 * The specs recommended that the retry delay time will be
77 * just over half of the time that a requester would be
78 * expected to hold the lock.
79 *
80 * The number below is taken from an hardware specs example,
81 * obviously it is somewhat arbitrary.
82 */
83static void omap_hwspinlock_relax(struct hwspinlock *lock)
84{
85 ndelay(50);
86}
87
88static const struct hwspinlock_ops omap_hwspinlock_ops = {
89 .trylock = omap_hwspinlock_trylock,
90 .unlock = omap_hwspinlock_unlock,
91 .relax = omap_hwspinlock_relax,
92};
93
94static int __devinit omap_hwspinlock_probe(struct platform_device *pdev)
95{
96 struct omap_hwspinlock *omap_lock;
97 struct omap_hwspinlock_state *state;
98 struct hwspinlock *lock;
99 struct resource *res;
100 void __iomem *io_base;
101 int i, ret;
102
103 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
104 if (!res)
105 return -ENODEV;
106
107 state = kzalloc(sizeof(*state), GFP_KERNEL);
108 if (!state)
109 return -ENOMEM;
110
111 io_base = ioremap(res->start, resource_size(res));
112 if (!io_base) {
113 ret = -ENOMEM;
114 goto free_state;
115 }
116
117 /* Determine number of locks */
118 i = readl(io_base + SYSSTATUS_OFFSET);
119 i >>= SPINLOCK_NUMLOCKS_BIT_OFFSET;
120
121 /* one of the four lsb's must be set, and nothing else */
122 if (hweight_long(i & 0xf) != 1 || i > 8) {
123 ret = -EINVAL;
124 goto iounmap_base;
125 }
126
127 state->num_locks = i * 32;
128 state->io_base = io_base;
129
130 platform_set_drvdata(pdev, state);
131
132 /*
133 * runtime PM will make sure the clock of this module is
134 * enabled iff at least one lock is requested
135 */
136 pm_runtime_enable(&pdev->dev);
137
138 for (i = 0; i < state->num_locks; i++) {
139 omap_lock = kzalloc(sizeof(*omap_lock), GFP_KERNEL);
140 if (!omap_lock) {
141 ret = -ENOMEM;
142 goto free_locks;
143 }
144
145 omap_lock->lock.dev = &pdev->dev;
146 omap_lock->lock.owner = THIS_MODULE;
147 omap_lock->lock.id = i;
148 omap_lock->lock.ops = &omap_hwspinlock_ops;
149 omap_lock->addr = io_base + LOCK_BASE_OFFSET + sizeof(u32) * i;
150
151 ret = hwspin_lock_register(&omap_lock->lock);
152 if (ret) {
153 kfree(omap_lock);
154 goto free_locks;
155 }
156 }
157
158 return 0;
159
160free_locks:
161 while (--i >= 0) {
162 lock = hwspin_lock_unregister(i);
163 /* this should't happen, but let's give our best effort */
164 if (!lock) {
165 dev_err(&pdev->dev, "%s: cleanups failed\n", __func__);
166 continue;
167 }
168 omap_lock = to_omap_hwspinlock(lock);
169 kfree(omap_lock);
170 }
171 pm_runtime_disable(&pdev->dev);
172iounmap_base:
173 iounmap(io_base);
174free_state:
175 kfree(state);
176 return ret;
177}
178
179static int omap_hwspinlock_remove(struct platform_device *pdev)
180{
181 struct omap_hwspinlock_state *state = platform_get_drvdata(pdev);
182 struct hwspinlock *lock;
183 struct omap_hwspinlock *omap_lock;
184 int i;
185
186 for (i = 0; i < state->num_locks; i++) {
187 lock = hwspin_lock_unregister(i);
188 /* this shouldn't happen at this point. if it does, at least
189 * don't continue with the remove */
190 if (!lock) {
191 dev_err(&pdev->dev, "%s: failed on %d\n", __func__, i);
192 return -EBUSY;
193 }
194
195 omap_lock = to_omap_hwspinlock(lock);
196 kfree(omap_lock);
197 }
198
199 pm_runtime_disable(&pdev->dev);
200 iounmap(state->io_base);
201 kfree(state);
202
203 return 0;
204}
205
206static struct platform_driver omap_hwspinlock_driver = {
207 .probe = omap_hwspinlock_probe,
208 .remove = omap_hwspinlock_remove,
209 .driver = {
210 .name = "omap_hwspinlock",
211 },
212};
213
214static int __init omap_hwspinlock_init(void)
215{
216 return platform_driver_register(&omap_hwspinlock_driver);
217}
218/* board init code might need to reserve hwspinlocks for predefined purposes */
219postcore_initcall(omap_hwspinlock_init);
220
221static void __exit omap_hwspinlock_exit(void)
222{
223 platform_driver_unregister(&omap_hwspinlock_driver);
224}
225module_exit(omap_hwspinlock_exit);
226
227MODULE_LICENSE("GPL v2");
228MODULE_DESCRIPTION("Hardware spinlock driver for OMAP");
229MODULE_AUTHOR("Simon Que <sque@ti.com>");
230MODULE_AUTHOR("Hari Kanigeri <h-kanigeri2@ti.com>");
231MODULE_AUTHOR("Ohad Ben-Cohen <ohad@wizery.com>");