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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Driver for the MMC / SD / SDIO IP found in:
4 *
5 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
6 *
7 * Copyright (C) 2015-19 Renesas Electronics Corporation
8 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang
9 * Copyright (C) 2017 Horms Solutions, Simon Horman
10 * Copyright (C) 2011 Guennadi Liakhovetski
11 * Copyright (C) 2007 Ian Molton
12 * Copyright (C) 2004 Ian Molton
13 *
14 * This driver draws mainly on scattered spec sheets, Reverse engineering
15 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
16 * support). (Further 4 bit support from a later datasheet).
17 *
18 * TODO:
19 * Investigate using a workqueue for PIO transfers
20 * Eliminate FIXMEs
21 * Better Power management
22 * Handle MMC errors better
23 * double buffer support
24 *
25 */
26
27#include <linux/delay.h>
28#include <linux/device.h>
29#include <linux/dma-mapping.h>
30#include <linux/highmem.h>
31#include <linux/interrupt.h>
32#include <linux/io.h>
33#include <linux/irq.h>
34#include <linux/mfd/tmio.h>
35#include <linux/mmc/card.h>
36#include <linux/mmc/host.h>
37#include <linux/mmc/mmc.h>
38#include <linux/mmc/slot-gpio.h>
39#include <linux/module.h>
40#include <linux/pagemap.h>
41#include <linux/platform_device.h>
42#include <linux/pm_qos.h>
43#include <linux/pm_runtime.h>
44#include <linux/regulator/consumer.h>
45#include <linux/mmc/sdio.h>
46#include <linux/scatterlist.h>
47#include <linux/sizes.h>
48#include <linux/spinlock.h>
49#include <linux/workqueue.h>
50
51#include "tmio_mmc.h"
52
53static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
54 struct mmc_data *data)
55{
56 if (host->dma_ops)
57 host->dma_ops->start(host, data);
58}
59
60static inline void tmio_mmc_end_dma(struct tmio_mmc_host *host)
61{
62 if (host->dma_ops && host->dma_ops->end)
63 host->dma_ops->end(host);
64}
65
66static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
67{
68 if (host->dma_ops)
69 host->dma_ops->enable(host, enable);
70}
71
72static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
73 struct tmio_mmc_data *pdata)
74{
75 if (host->dma_ops) {
76 host->dma_ops->request(host, pdata);
77 } else {
78 host->chan_tx = NULL;
79 host->chan_rx = NULL;
80 }
81}
82
83static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
84{
85 if (host->dma_ops)
86 host->dma_ops->release(host);
87}
88
89static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
90{
91 if (host->dma_ops)
92 host->dma_ops->abort(host);
93}
94
95static inline void tmio_mmc_dataend_dma(struct tmio_mmc_host *host)
96{
97 if (host->dma_ops)
98 host->dma_ops->dataend(host);
99}
100
101void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
102{
103 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
104 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
105}
106EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs);
107
108void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
109{
110 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
111 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
112}
113EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs);
114
115static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
116{
117 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i);
118}
119
120static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
121{
122 host->sg_len = data->sg_len;
123 host->sg_ptr = data->sg;
124 host->sg_orig = data->sg;
125 host->sg_off = 0;
126}
127
128static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
129{
130 host->sg_ptr = sg_next(host->sg_ptr);
131 host->sg_off = 0;
132 return --host->sg_len;
133}
134
135#define CMDREQ_TIMEOUT 5000
136
137static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
138{
139 struct tmio_mmc_host *host = mmc_priv(mmc);
140
141 if (enable && !host->sdio_irq_enabled) {
142 u16 sdio_status;
143
144 /* Keep device active while SDIO irq is enabled */
145 pm_runtime_get_sync(mmc_dev(mmc));
146
147 host->sdio_irq_enabled = true;
148 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ;
149
150 /* Clear obsolete interrupts before enabling */
151 sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL;
152 if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
153 sdio_status |= TMIO_SDIO_SETBITS_MASK;
154 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
155
156 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
157 } else if (!enable && host->sdio_irq_enabled) {
158 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
159 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
160
161 host->sdio_irq_enabled = false;
162 pm_runtime_mark_last_busy(mmc_dev(mmc));
163 pm_runtime_put_autosuspend(mmc_dev(mmc));
164 }
165}
166
167static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
168 unsigned char bus_width)
169{
170 u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT)
171 & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8);
172
173 /* reg now applies to MMC_BUS_WIDTH_4 */
174 if (bus_width == MMC_BUS_WIDTH_1)
175 reg |= CARD_OPT_WIDTH;
176 else if (bus_width == MMC_BUS_WIDTH_8)
177 reg |= CARD_OPT_WIDTH8;
178
179 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
180}
181
182static void tmio_mmc_reset(struct tmio_mmc_host *host, bool preserve)
183{
184 u16 card_opt, clk_ctrl, sdif_mode;
185
186 if (preserve) {
187 card_opt = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT);
188 clk_ctrl = sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL);
189 if (host->pdata->flags & TMIO_MMC_MIN_RCAR2)
190 sdif_mode = sd_ctrl_read16(host, CTL_SDIF_MODE);
191 }
192
193 /* FIXME - should we set stop clock reg here */
194 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
195 usleep_range(10000, 11000);
196 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
197 usleep_range(10000, 11000);
198
199 tmio_mmc_abort_dma(host);
200
201 if (host->reset)
202 host->reset(host, preserve);
203
204 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask_all);
205 host->sdcard_irq_mask = host->sdcard_irq_mask_all;
206
207 if (host->native_hotplug)
208 tmio_mmc_enable_mmc_irqs(host,
209 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
210
211 tmio_mmc_set_bus_width(host, host->mmc->ios.bus_width);
212
213 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) {
214 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
215 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
216 }
217
218 if (preserve) {
219 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, card_opt);
220 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk_ctrl);
221 if (host->pdata->flags & TMIO_MMC_MIN_RCAR2)
222 sd_ctrl_write16(host, CTL_SDIF_MODE, sdif_mode);
223 }
224
225 if (host->mmc->card)
226 mmc_retune_needed(host->mmc);
227}
228
229static void tmio_mmc_reset_work(struct work_struct *work)
230{
231 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
232 delayed_reset_work.work);
233 struct mmc_request *mrq;
234 unsigned long flags;
235
236 spin_lock_irqsave(&host->lock, flags);
237 mrq = host->mrq;
238
239 /*
240 * is request already finished? Since we use a non-blocking
241 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
242 * us, so, have to check for IS_ERR(host->mrq)
243 */
244 if (IS_ERR_OR_NULL(mrq) ||
245 time_is_after_jiffies(host->last_req_ts +
246 msecs_to_jiffies(CMDREQ_TIMEOUT))) {
247 spin_unlock_irqrestore(&host->lock, flags);
248 return;
249 }
250
251 dev_warn(&host->pdev->dev,
252 "timeout waiting for hardware interrupt (CMD%u)\n",
253 mrq->cmd->opcode);
254
255 if (host->data)
256 host->data->error = -ETIMEDOUT;
257 else if (host->cmd)
258 host->cmd->error = -ETIMEDOUT;
259 else
260 mrq->cmd->error = -ETIMEDOUT;
261
262 host->cmd = NULL;
263 host->data = NULL;
264
265 spin_unlock_irqrestore(&host->lock, flags);
266
267 tmio_mmc_reset(host, true);
268
269 /* Ready for new calls */
270 host->mrq = NULL;
271 mmc_request_done(host->mmc, mrq);
272}
273
274/* These are the bitmasks the tmio chip requires to implement the MMC response
275 * types. Note that R1 and R6 are the same in this scheme. */
276#define APP_CMD 0x0040
277#define RESP_NONE 0x0300
278#define RESP_R1 0x0400
279#define RESP_R1B 0x0500
280#define RESP_R2 0x0600
281#define RESP_R3 0x0700
282#define DATA_PRESENT 0x0800
283#define TRANSFER_READ 0x1000
284#define TRANSFER_MULTI 0x2000
285#define SECURITY_CMD 0x4000
286#define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
287
288static int tmio_mmc_start_command(struct tmio_mmc_host *host,
289 struct mmc_command *cmd)
290{
291 struct mmc_data *data = host->data;
292 int c = cmd->opcode;
293
294 switch (mmc_resp_type(cmd)) {
295 case MMC_RSP_NONE: c |= RESP_NONE; break;
296 case MMC_RSP_R1:
297 case MMC_RSP_R1_NO_CRC:
298 c |= RESP_R1; break;
299 case MMC_RSP_R1B: c |= RESP_R1B; break;
300 case MMC_RSP_R2: c |= RESP_R2; break;
301 case MMC_RSP_R3: c |= RESP_R3; break;
302 default:
303 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
304 return -EINVAL;
305 }
306
307 host->cmd = cmd;
308
309/* FIXME - this seems to be ok commented out but the spec suggest this bit
310 * should be set when issuing app commands.
311 * if(cmd->flags & MMC_FLAG_ACMD)
312 * c |= APP_CMD;
313 */
314 if (data) {
315 c |= DATA_PRESENT;
316 if (data->blocks > 1) {
317 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC);
318 c |= TRANSFER_MULTI;
319
320 /*
321 * Disable auto CMD12 at IO_RW_EXTENDED and
322 * SET_BLOCK_COUNT when doing multiple block transfer
323 */
324 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&
325 (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc))
326 c |= NO_CMD12_ISSUE;
327 }
328 if (data->flags & MMC_DATA_READ)
329 c |= TRANSFER_READ;
330 }
331
332 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_CMD);
333
334 /* Fire off the command */
335 sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg);
336 sd_ctrl_write16(host, CTL_SD_CMD, c);
337
338 return 0;
339}
340
341static void tmio_mmc_transfer_data(struct tmio_mmc_host *host,
342 unsigned short *buf,
343 unsigned int count)
344{
345 int is_read = host->data->flags & MMC_DATA_READ;
346 u8 *buf8;
347
348 /*
349 * Transfer the data
350 */
351 if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) {
352 u32 data = 0;
353 u32 *buf32 = (u32 *)buf;
354
355 if (is_read)
356 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, buf32,
357 count >> 2);
358 else
359 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, buf32,
360 count >> 2);
361
362 /* if count was multiple of 4 */
363 if (!(count & 0x3))
364 return;
365
366 buf32 += count >> 2;
367 count %= 4;
368
369 if (is_read) {
370 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1);
371 memcpy(buf32, &data, count);
372 } else {
373 memcpy(&data, buf32, count);
374 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1);
375 }
376
377 return;
378 }
379
380 if (is_read)
381 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
382 else
383 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
384
385 /* if count was even number */
386 if (!(count & 0x1))
387 return;
388
389 /* if count was odd number */
390 buf8 = (u8 *)(buf + (count >> 1));
391
392 /*
393 * FIXME
394 *
395 * driver and this function are assuming that
396 * it is used as little endian
397 */
398 if (is_read)
399 *buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff;
400 else
401 sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8);
402}
403
404/*
405 * This chip always returns (at least?) as much data as you ask for.
406 * I'm unsure what happens if you ask for less than a block. This should be
407 * looked into to ensure that a funny length read doesn't hose the controller.
408 */
409static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
410{
411 struct mmc_data *data = host->data;
412 void *sg_virt;
413 unsigned short *buf;
414 unsigned int count;
415
416 if (host->dma_on) {
417 pr_err("PIO IRQ in DMA mode!\n");
418 return;
419 } else if (!data) {
420 pr_debug("Spurious PIO IRQ\n");
421 return;
422 }
423
424 sg_virt = kmap_local_page(sg_page(host->sg_ptr));
425 buf = (unsigned short *)(sg_virt + host->sg_ptr->offset + host->sg_off);
426
427 count = host->sg_ptr->length - host->sg_off;
428 if (count > data->blksz)
429 count = data->blksz;
430
431 pr_debug("count: %08x offset: %08x flags %08x\n",
432 count, host->sg_off, data->flags);
433
434 /* Transfer the data */
435 tmio_mmc_transfer_data(host, buf, count);
436
437 host->sg_off += count;
438
439 kunmap_local(sg_virt);
440
441 if (host->sg_off == host->sg_ptr->length)
442 tmio_mmc_next_sg(host);
443}
444
445static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
446{
447 if (host->sg_ptr == &host->bounce_sg) {
448 void *sg_virt = kmap_local_page(sg_page(host->sg_orig));
449
450 memcpy(sg_virt + host->sg_orig->offset, host->bounce_buf,
451 host->bounce_sg.length);
452 kunmap_local(sg_virt);
453 }
454}
455
456/* needs to be called with host->lock held */
457void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
458{
459 struct mmc_data *data = host->data;
460 struct mmc_command *stop;
461
462 host->data = NULL;
463
464 if (!data) {
465 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
466 return;
467 }
468 stop = data->stop;
469
470 /* FIXME - return correct transfer count on errors */
471 if (!data->error)
472 data->bytes_xfered = data->blocks * data->blksz;
473 else
474 data->bytes_xfered = 0;
475
476 pr_debug("Completed data request\n");
477
478 /*
479 * FIXME: other drivers allow an optional stop command of any given type
480 * which we dont do, as the chip can auto generate them.
481 * Perhaps we can be smarter about when to use auto CMD12 and
482 * only issue the auto request when we know this is the desired
483 * stop command, allowing fallback to the stop command the
484 * upper layers expect. For now, we do what works.
485 */
486
487 if (data->flags & MMC_DATA_READ) {
488 if (host->dma_on)
489 tmio_mmc_check_bounce_buffer(host);
490 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
491 host->mrq);
492 } else {
493 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
494 host->mrq);
495 }
496
497 if (stop && !host->mrq->sbc) {
498 if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg)
499 dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n",
500 stop->opcode, stop->arg);
501
502 /* fill in response from auto CMD12 */
503 stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE);
504
505 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0);
506 }
507
508 schedule_work(&host->done);
509}
510EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq);
511
512static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
513{
514 struct mmc_data *data;
515
516 spin_lock(&host->lock);
517 data = host->data;
518
519 if (!data)
520 goto out;
521
522 if (stat & TMIO_STAT_DATATIMEOUT)
523 data->error = -ETIMEDOUT;
524 else if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||
525 stat & TMIO_STAT_TXUNDERRUN)
526 data->error = -EILSEQ;
527 if (host->dma_on && (data->flags & MMC_DATA_WRITE)) {
528 u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
529 bool done = false;
530
531 /*
532 * Has all data been written out yet? Testing on SuperH showed,
533 * that in most cases the first interrupt comes already with the
534 * BUSY status bit clear, but on some operations, like mount or
535 * in the beginning of a write / sync / umount, there is one
536 * DATAEND interrupt with the BUSY bit set, in this cases
537 * waiting for one more interrupt fixes the problem.
538 */
539 if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) {
540 if (status & TMIO_STAT_SCLKDIVEN)
541 done = true;
542 } else {
543 if (!(status & TMIO_STAT_CMD_BUSY))
544 done = true;
545 }
546
547 if (done) {
548 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
549 tmio_mmc_dataend_dma(host);
550 }
551 } else if (host->dma_on && (data->flags & MMC_DATA_READ)) {
552 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
553 tmio_mmc_dataend_dma(host);
554 } else {
555 tmio_mmc_do_data_irq(host);
556 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
557 }
558out:
559 spin_unlock(&host->lock);
560}
561
562static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat)
563{
564 struct mmc_command *cmd = host->cmd;
565 int i, addr;
566
567 spin_lock(&host->lock);
568
569 if (!host->cmd) {
570 pr_debug("Spurious CMD irq\n");
571 goto out;
572 }
573
574 /* This controller is sicker than the PXA one. Not only do we need to
575 * drop the top 8 bits of the first response word, we also need to
576 * modify the order of the response for short response command types.
577 */
578
579 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
580 cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr);
581
582 if (cmd->flags & MMC_RSP_136) {
583 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
584 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
585 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
586 cmd->resp[3] <<= 8;
587 } else if (cmd->flags & MMC_RSP_R3) {
588 cmd->resp[0] = cmd->resp[3];
589 }
590
591 if (stat & TMIO_STAT_CMDTIMEOUT)
592 cmd->error = -ETIMEDOUT;
593 else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) ||
594 stat & TMIO_STAT_STOPBIT_ERR ||
595 stat & TMIO_STAT_CMD_IDX_ERR)
596 cmd->error = -EILSEQ;
597
598 /* If there is data to handle we enable data IRQs here, and
599 * we will ultimatley finish the request in the data_end handler.
600 * If theres no data or we encountered an error, finish now.
601 */
602 if (host->data && (!cmd->error || cmd->error == -EILSEQ)) {
603 if (host->data->flags & MMC_DATA_READ) {
604 if (!host->dma_on) {
605 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
606 } else {
607 tmio_mmc_disable_mmc_irqs(host,
608 TMIO_MASK_READOP);
609 tasklet_schedule(&host->dma_issue);
610 }
611 } else {
612 if (!host->dma_on) {
613 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
614 } else {
615 tmio_mmc_disable_mmc_irqs(host,
616 TMIO_MASK_WRITEOP);
617 tasklet_schedule(&host->dma_issue);
618 }
619 }
620 } else {
621 schedule_work(&host->done);
622 }
623
624out:
625 spin_unlock(&host->lock);
626}
627
628static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
629 int ireg, int status)
630{
631 struct mmc_host *mmc = host->mmc;
632
633 /* Card insert / remove attempts */
634 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
635 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
636 TMIO_STAT_CARD_REMOVE);
637 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
638 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
639 !work_pending(&mmc->detect.work))
640 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
641 return true;
642 }
643
644 return false;
645}
646
647static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg,
648 int status)
649{
650 /* Command completion */
651 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
652 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND |
653 TMIO_STAT_CMDTIMEOUT);
654 tmio_mmc_cmd_irq(host, status);
655 return true;
656 }
657
658 /* Data transfer */
659 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
660 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
661 tmio_mmc_pio_irq(host);
662 return true;
663 }
664
665 /* Data transfer completion */
666 if (ireg & TMIO_STAT_DATAEND) {
667 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
668 tmio_mmc_data_irq(host, status);
669 return true;
670 }
671
672 if (host->dma_ops && host->dma_ops->dma_irq && host->dma_ops->dma_irq(host))
673 return true;
674
675 return false;
676}
677
678static bool __tmio_mmc_sdio_irq(struct tmio_mmc_host *host)
679{
680 struct mmc_host *mmc = host->mmc;
681 struct tmio_mmc_data *pdata = host->pdata;
682 unsigned int ireg, status;
683 unsigned int sdio_status;
684
685 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
686 return false;
687
688 status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
689 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
690
691 sdio_status = status & ~TMIO_SDIO_MASK_ALL;
692 if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
693 sdio_status |= TMIO_SDIO_SETBITS_MASK;
694
695 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
696
697 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
698 mmc_signal_sdio_irq(mmc);
699
700 return ireg;
701}
702
703irqreturn_t tmio_mmc_irq(int irq, void *devid)
704{
705 struct tmio_mmc_host *host = devid;
706 unsigned int ireg, status;
707
708 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
709 ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
710
711 /* Clear the status except the interrupt status */
712 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ);
713
714 if (__tmio_mmc_card_detect_irq(host, ireg, status))
715 return IRQ_HANDLED;
716 if (__tmio_mmc_sdcard_irq(host, ireg, status))
717 return IRQ_HANDLED;
718
719 if (__tmio_mmc_sdio_irq(host))
720 return IRQ_HANDLED;
721
722 return IRQ_NONE;
723}
724EXPORT_SYMBOL_GPL(tmio_mmc_irq);
725
726static int tmio_mmc_start_data(struct tmio_mmc_host *host,
727 struct mmc_data *data)
728{
729 struct tmio_mmc_data *pdata = host->pdata;
730
731 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
732 data->blksz, data->blocks);
733
734 /* Some hardware cannot perform 2 byte requests in 4/8 bit mode */
735 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 ||
736 host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
737 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
738
739 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
740 pr_err("%s: %d byte block unsupported in 4/8 bit mode\n",
741 mmc_hostname(host->mmc), data->blksz);
742 return -EINVAL;
743 }
744 }
745
746 tmio_mmc_init_sg(host, data);
747 host->data = data;
748 host->dma_on = false;
749
750 /* Set transfer length / blocksize */
751 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
752 if (host->mmc->max_blk_count >= SZ_64K)
753 sd_ctrl_write32(host, CTL_XFER_BLK_COUNT, data->blocks);
754 else
755 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
756
757 tmio_mmc_start_dma(host, data);
758
759 return 0;
760}
761
762static void tmio_process_mrq(struct tmio_mmc_host *host,
763 struct mmc_request *mrq)
764{
765 struct mmc_command *cmd;
766 int ret;
767
768 if (mrq->sbc && host->cmd != mrq->sbc) {
769 cmd = mrq->sbc;
770 } else {
771 cmd = mrq->cmd;
772 if (mrq->data) {
773 ret = tmio_mmc_start_data(host, mrq->data);
774 if (ret)
775 goto fail;
776 }
777 }
778
779 ret = tmio_mmc_start_command(host, cmd);
780 if (ret)
781 goto fail;
782
783 schedule_delayed_work(&host->delayed_reset_work,
784 msecs_to_jiffies(CMDREQ_TIMEOUT));
785 return;
786
787fail:
788 host->mrq = NULL;
789 mrq->cmd->error = ret;
790 mmc_request_done(host->mmc, mrq);
791}
792
793/* Process requests from the MMC layer */
794static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
795{
796 struct tmio_mmc_host *host = mmc_priv(mmc);
797 unsigned long flags;
798
799 spin_lock_irqsave(&host->lock, flags);
800
801 if (host->mrq) {
802 pr_debug("request not null\n");
803 if (IS_ERR(host->mrq)) {
804 spin_unlock_irqrestore(&host->lock, flags);
805 mrq->cmd->error = -EAGAIN;
806 mmc_request_done(mmc, mrq);
807 return;
808 }
809 }
810
811 host->last_req_ts = jiffies;
812 wmb();
813 host->mrq = mrq;
814
815 spin_unlock_irqrestore(&host->lock, flags);
816
817 tmio_process_mrq(host, mrq);
818}
819
820static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
821{
822 struct mmc_request *mrq;
823 unsigned long flags;
824
825 spin_lock_irqsave(&host->lock, flags);
826
827 tmio_mmc_end_dma(host);
828
829 mrq = host->mrq;
830 if (IS_ERR_OR_NULL(mrq)) {
831 spin_unlock_irqrestore(&host->lock, flags);
832 return;
833 }
834
835 /* If not SET_BLOCK_COUNT, clear old data */
836 if (host->cmd != mrq->sbc) {
837 host->cmd = NULL;
838 host->data = NULL;
839 host->mrq = NULL;
840 }
841
842 cancel_delayed_work(&host->delayed_reset_work);
843
844 spin_unlock_irqrestore(&host->lock, flags);
845
846 if (mrq->cmd->error || (mrq->data && mrq->data->error)) {
847 tmio_mmc_ack_mmc_irqs(host, TMIO_MASK_IRQ); /* Clear all */
848 tmio_mmc_abort_dma(host);
849 }
850
851 /* Error means retune, but executed command was still successful */
852 if (host->check_retune && host->check_retune(host, mrq))
853 mmc_retune_needed(host->mmc);
854
855 /* If SET_BLOCK_COUNT, continue with main command */
856 if (host->mrq && !mrq->cmd->error) {
857 tmio_process_mrq(host, mrq);
858 return;
859 }
860
861 if (host->fixup_request)
862 host->fixup_request(host, mrq);
863
864 mmc_request_done(host->mmc, mrq);
865}
866
867static void tmio_mmc_done_work(struct work_struct *work)
868{
869 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
870 done);
871 tmio_mmc_finish_request(host);
872}
873
874static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
875{
876 struct mmc_host *mmc = host->mmc;
877 int ret = 0;
878
879 /* .set_ios() is returning void, so, no chance to report an error */
880
881 if (host->set_pwr)
882 host->set_pwr(host->pdev, 1);
883
884 if (!IS_ERR(mmc->supply.vmmc)) {
885 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
886 /*
887 * Attention: empiric value. With a b43 WiFi SDIO card this
888 * delay proved necessary for reliable card-insertion probing.
889 * 100us were not enough. Is this the same 140us delay, as in
890 * tmio_mmc_set_ios()?
891 */
892 usleep_range(200, 300);
893 }
894 /*
895 * It seems, VccQ should be switched on after Vcc, this is also what the
896 * omap_hsmmc.c driver does.
897 */
898 if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
899 ret = regulator_enable(mmc->supply.vqmmc);
900 usleep_range(200, 300);
901 }
902
903 if (ret < 0)
904 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
905 ret);
906}
907
908static void tmio_mmc_power_off(struct tmio_mmc_host *host)
909{
910 struct mmc_host *mmc = host->mmc;
911
912 if (!IS_ERR(mmc->supply.vqmmc))
913 regulator_disable(mmc->supply.vqmmc);
914
915 if (!IS_ERR(mmc->supply.vmmc))
916 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
917
918 if (host->set_pwr)
919 host->set_pwr(host->pdev, 0);
920}
921
922static unsigned int tmio_mmc_get_timeout_cycles(struct tmio_mmc_host *host)
923{
924 u16 val = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT);
925
926 val = (val & CARD_OPT_TOP_MASK) >> CARD_OPT_TOP_SHIFT;
927 return 1 << (13 + val);
928}
929
930static void tmio_mmc_max_busy_timeout(struct tmio_mmc_host *host)
931{
932 unsigned int clk_rate = host->mmc->actual_clock ?: host->mmc->f_max;
933
934 host->mmc->max_busy_timeout = host->get_timeout_cycles(host) /
935 (clk_rate / MSEC_PER_SEC);
936}
937
938/* Set MMC clock / power.
939 * Note: This controller uses a simple divider scheme therefore it cannot
940 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
941 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
942 * slowest setting.
943 */
944static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
945{
946 struct tmio_mmc_host *host = mmc_priv(mmc);
947 struct device *dev = &host->pdev->dev;
948 unsigned long flags;
949
950 mutex_lock(&host->ios_lock);
951
952 spin_lock_irqsave(&host->lock, flags);
953 if (host->mrq) {
954 if (IS_ERR(host->mrq)) {
955 dev_dbg(dev,
956 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
957 current->comm, task_pid_nr(current),
958 ios->clock, ios->power_mode);
959 host->mrq = ERR_PTR(-EINTR);
960 } else {
961 dev_dbg(dev,
962 "%s.%d: CMD%u active since %lu, now %lu!\n",
963 current->comm, task_pid_nr(current),
964 host->mrq->cmd->opcode, host->last_req_ts,
965 jiffies);
966 }
967 spin_unlock_irqrestore(&host->lock, flags);
968
969 mutex_unlock(&host->ios_lock);
970 return;
971 }
972
973 host->mrq = ERR_PTR(-EBUSY);
974
975 spin_unlock_irqrestore(&host->lock, flags);
976
977 switch (ios->power_mode) {
978 case MMC_POWER_OFF:
979 tmio_mmc_power_off(host);
980 /* For R-Car Gen2+, we need to reset SDHI specific SCC */
981 if (host->pdata->flags & TMIO_MMC_MIN_RCAR2)
982 tmio_mmc_reset(host, false);
983
984 host->set_clock(host, 0);
985 break;
986 case MMC_POWER_UP:
987 tmio_mmc_power_on(host, ios->vdd);
988 host->set_clock(host, ios->clock);
989 tmio_mmc_set_bus_width(host, ios->bus_width);
990 break;
991 case MMC_POWER_ON:
992 host->set_clock(host, ios->clock);
993 tmio_mmc_set_bus_width(host, ios->bus_width);
994 break;
995 }
996
997 if (host->pdata->flags & TMIO_MMC_USE_BUSY_TIMEOUT)
998 tmio_mmc_max_busy_timeout(host);
999
1000 /* Let things settle. delay taken from winCE driver */
1001 usleep_range(140, 200);
1002 if (PTR_ERR(host->mrq) == -EINTR)
1003 dev_dbg(&host->pdev->dev,
1004 "%s.%d: IOS interrupted: clk %u, mode %u",
1005 current->comm, task_pid_nr(current),
1006 ios->clock, ios->power_mode);
1007 host->mrq = NULL;
1008
1009 host->clk_cache = ios->clock;
1010
1011 mutex_unlock(&host->ios_lock);
1012}
1013
1014static int tmio_mmc_get_ro(struct mmc_host *mmc)
1015{
1016 struct tmio_mmc_host *host = mmc_priv(mmc);
1017
1018 return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
1019 TMIO_STAT_WRPROTECT);
1020}
1021
1022static int tmio_mmc_get_cd(struct mmc_host *mmc)
1023{
1024 struct tmio_mmc_host *host = mmc_priv(mmc);
1025
1026 return !!(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
1027 TMIO_STAT_SIGSTATE);
1028}
1029
1030static int tmio_multi_io_quirk(struct mmc_card *card,
1031 unsigned int direction, int blk_size)
1032{
1033 struct tmio_mmc_host *host = mmc_priv(card->host);
1034
1035 if (host->multi_io_quirk)
1036 return host->multi_io_quirk(card, direction, blk_size);
1037
1038 return blk_size;
1039}
1040
1041static struct mmc_host_ops tmio_mmc_ops = {
1042 .request = tmio_mmc_request,
1043 .set_ios = tmio_mmc_set_ios,
1044 .get_ro = tmio_mmc_get_ro,
1045 .get_cd = tmio_mmc_get_cd,
1046 .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
1047 .multi_io_quirk = tmio_multi_io_quirk,
1048};
1049
1050static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
1051{
1052 struct tmio_mmc_data *pdata = host->pdata;
1053 struct mmc_host *mmc = host->mmc;
1054 int err;
1055
1056 err = mmc_regulator_get_supply(mmc);
1057 if (err)
1058 return err;
1059
1060 /* use ocr_mask if no regulator */
1061 if (!mmc->ocr_avail)
1062 mmc->ocr_avail = pdata->ocr_mask;
1063
1064 /*
1065 * try again.
1066 * There is possibility that regulator has not been probed
1067 */
1068 if (!mmc->ocr_avail)
1069 return -EPROBE_DEFER;
1070
1071 return 0;
1072}
1073
1074static void tmio_mmc_of_parse(struct platform_device *pdev,
1075 struct mmc_host *mmc)
1076{
1077 const struct device_node *np = pdev->dev.of_node;
1078
1079 if (!np)
1080 return;
1081
1082 /*
1083 * DEPRECATED:
1084 * For new platforms, please use "disable-wp" instead of
1085 * "toshiba,mmc-wrprotect-disable"
1086 */
1087 if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL))
1088 mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT;
1089}
1090
1091struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
1092 struct tmio_mmc_data *pdata)
1093{
1094 struct tmio_mmc_host *host;
1095 struct mmc_host *mmc;
1096 void __iomem *ctl;
1097 int ret;
1098
1099 ctl = devm_platform_ioremap_resource(pdev, 0);
1100 if (IS_ERR(ctl))
1101 return ERR_CAST(ctl);
1102
1103 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
1104 if (!mmc)
1105 return ERR_PTR(-ENOMEM);
1106
1107 host = mmc_priv(mmc);
1108 host->ctl = ctl;
1109 host->mmc = mmc;
1110 host->pdev = pdev;
1111 host->pdata = pdata;
1112 host->ops = tmio_mmc_ops;
1113 mmc->ops = &host->ops;
1114
1115 ret = mmc_of_parse(host->mmc);
1116 if (ret) {
1117 host = ERR_PTR(ret);
1118 goto free;
1119 }
1120
1121 tmio_mmc_of_parse(pdev, mmc);
1122
1123 platform_set_drvdata(pdev, host);
1124
1125 return host;
1126free:
1127 mmc_free_host(mmc);
1128
1129 return host;
1130}
1131EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc);
1132
1133void tmio_mmc_host_free(struct tmio_mmc_host *host)
1134{
1135 mmc_free_host(host->mmc);
1136}
1137EXPORT_SYMBOL_GPL(tmio_mmc_host_free);
1138
1139int tmio_mmc_host_probe(struct tmio_mmc_host *_host)
1140{
1141 struct platform_device *pdev = _host->pdev;
1142 struct tmio_mmc_data *pdata = _host->pdata;
1143 struct mmc_host *mmc = _host->mmc;
1144 int ret;
1145
1146 /*
1147 * Check the sanity of mmc->f_min to prevent host->set_clock() from
1148 * looping forever...
1149 */
1150 if (mmc->f_min == 0)
1151 return -EINVAL;
1152
1153 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
1154 _host->write16_hook = NULL;
1155
1156 if (pdata->flags & TMIO_MMC_USE_BUSY_TIMEOUT && !_host->get_timeout_cycles)
1157 _host->get_timeout_cycles = tmio_mmc_get_timeout_cycles;
1158
1159 _host->set_pwr = pdata->set_pwr;
1160
1161 ret = tmio_mmc_init_ocr(_host);
1162 if (ret < 0)
1163 return ret;
1164
1165 /*
1166 * Look for a card detect GPIO, if it fails with anything
1167 * else than a probe deferral, just live without it.
1168 */
1169 ret = mmc_gpiod_request_cd(mmc, "cd", 0, false, 0);
1170 if (ret == -EPROBE_DEFER)
1171 return ret;
1172
1173 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
1174 mmc->caps2 |= pdata->capabilities2;
1175 mmc->max_segs = pdata->max_segs ? : 32;
1176 mmc->max_blk_size = TMIO_MAX_BLK_SIZE;
1177 mmc->max_blk_count = pdata->max_blk_count ? :
1178 (PAGE_SIZE / mmc->max_blk_size) * mmc->max_segs;
1179 mmc->max_req_size = min_t(size_t,
1180 mmc->max_blk_size * mmc->max_blk_count,
1181 dma_max_mapping_size(&pdev->dev));
1182 mmc->max_seg_size = mmc->max_req_size;
1183
1184 if (mmc_can_gpio_ro(mmc))
1185 _host->ops.get_ro = mmc_gpio_get_ro;
1186
1187 if (mmc_can_gpio_cd(mmc))
1188 _host->ops.get_cd = mmc_gpio_get_cd;
1189
1190 /* must be set before tmio_mmc_reset() */
1191 _host->native_hotplug = !(mmc_can_gpio_cd(mmc) ||
1192 mmc->caps & MMC_CAP_NEEDS_POLL ||
1193 !mmc_card_is_removable(mmc));
1194
1195 /*
1196 * While using internal tmio hardware logic for card detection, we need
1197 * to ensure it stays powered for it to work.
1198 */
1199 if (_host->native_hotplug)
1200 pm_runtime_get_noresume(&pdev->dev);
1201
1202 _host->sdio_irq_enabled = false;
1203 if (pdata->flags & TMIO_MMC_SDIO_IRQ)
1204 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
1205
1206 if (!_host->sdcard_irq_mask_all)
1207 _host->sdcard_irq_mask_all = TMIO_MASK_ALL;
1208
1209 _host->set_clock(_host, 0);
1210 tmio_mmc_reset(_host, false);
1211
1212 spin_lock_init(&_host->lock);
1213 mutex_init(&_host->ios_lock);
1214
1215 /* Init delayed work for request timeouts */
1216 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
1217 INIT_WORK(&_host->done, tmio_mmc_done_work);
1218
1219 /* See if we also get DMA */
1220 tmio_mmc_request_dma(_host, pdata);
1221
1222 pm_runtime_get_noresume(&pdev->dev);
1223 pm_runtime_set_active(&pdev->dev);
1224 pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
1225 pm_runtime_use_autosuspend(&pdev->dev);
1226 pm_runtime_enable(&pdev->dev);
1227
1228 ret = mmc_add_host(mmc);
1229 if (ret)
1230 goto remove_host;
1231
1232 dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
1233 pm_runtime_put(&pdev->dev);
1234
1235 return 0;
1236
1237remove_host:
1238 pm_runtime_put_noidle(&pdev->dev);
1239 tmio_mmc_host_remove(_host);
1240 return ret;
1241}
1242EXPORT_SYMBOL_GPL(tmio_mmc_host_probe);
1243
1244void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1245{
1246 struct platform_device *pdev = host->pdev;
1247 struct mmc_host *mmc = host->mmc;
1248
1249 pm_runtime_get_sync(&pdev->dev);
1250
1251 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ)
1252 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
1253
1254 dev_pm_qos_hide_latency_limit(&pdev->dev);
1255
1256 mmc_remove_host(mmc);
1257 cancel_work_sync(&host->done);
1258 cancel_delayed_work_sync(&host->delayed_reset_work);
1259 tmio_mmc_release_dma(host);
1260 tmio_mmc_disable_mmc_irqs(host, host->sdcard_irq_mask_all);
1261
1262 if (host->native_hotplug)
1263 pm_runtime_put_noidle(&pdev->dev);
1264
1265 pm_runtime_disable(&pdev->dev);
1266 pm_runtime_dont_use_autosuspend(&pdev->dev);
1267 pm_runtime_put_noidle(&pdev->dev);
1268}
1269EXPORT_SYMBOL_GPL(tmio_mmc_host_remove);
1270
1271#ifdef CONFIG_PM
1272static int tmio_mmc_clk_enable(struct tmio_mmc_host *host)
1273{
1274 if (!host->clk_enable)
1275 return -ENOTSUPP;
1276
1277 return host->clk_enable(host);
1278}
1279
1280static void tmio_mmc_clk_disable(struct tmio_mmc_host *host)
1281{
1282 if (host->clk_disable)
1283 host->clk_disable(host);
1284}
1285
1286int tmio_mmc_host_runtime_suspend(struct device *dev)
1287{
1288 struct tmio_mmc_host *host = dev_get_drvdata(dev);
1289
1290 tmio_mmc_disable_mmc_irqs(host, host->sdcard_irq_mask_all);
1291
1292 if (host->clk_cache)
1293 host->set_clock(host, 0);
1294
1295 tmio_mmc_clk_disable(host);
1296
1297 return 0;
1298}
1299EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend);
1300
1301int tmio_mmc_host_runtime_resume(struct device *dev)
1302{
1303 struct tmio_mmc_host *host = dev_get_drvdata(dev);
1304
1305 tmio_mmc_clk_enable(host);
1306 tmio_mmc_reset(host, false);
1307
1308 if (host->clk_cache)
1309 host->set_clock(host, host->clk_cache);
1310
1311 tmio_mmc_enable_dma(host, true);
1312
1313 return 0;
1314}
1315EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume);
1316#endif
1317
1318MODULE_LICENSE("GPL v2");
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Driver for the MMC / SD / SDIO IP found in:
4 *
5 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
6 *
7 * Copyright (C) 2015-19 Renesas Electronics Corporation
8 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang
9 * Copyright (C) 2017 Horms Solutions, Simon Horman
10 * Copyright (C) 2011 Guennadi Liakhovetski
11 * Copyright (C) 2007 Ian Molton
12 * Copyright (C) 2004 Ian Molton
13 *
14 * This driver draws mainly on scattered spec sheets, Reverse engineering
15 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
16 * support). (Further 4 bit support from a later datasheet).
17 *
18 * TODO:
19 * Investigate using a workqueue for PIO transfers
20 * Eliminate FIXMEs
21 * Better Power management
22 * Handle MMC errors better
23 * double buffer support
24 *
25 */
26
27#include <linux/delay.h>
28#include <linux/device.h>
29#include <linux/dma-mapping.h>
30#include <linux/highmem.h>
31#include <linux/interrupt.h>
32#include <linux/io.h>
33#include <linux/irq.h>
34#include <linux/mfd/tmio.h>
35#include <linux/mmc/card.h>
36#include <linux/mmc/host.h>
37#include <linux/mmc/mmc.h>
38#include <linux/mmc/slot-gpio.h>
39#include <linux/module.h>
40#include <linux/pagemap.h>
41#include <linux/platform_device.h>
42#include <linux/pm_qos.h>
43#include <linux/pm_runtime.h>
44#include <linux/regulator/consumer.h>
45#include <linux/mmc/sdio.h>
46#include <linux/scatterlist.h>
47#include <linux/sizes.h>
48#include <linux/spinlock.h>
49#include <linux/workqueue.h>
50
51#include "tmio_mmc.h"
52
53static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
54 struct mmc_data *data)
55{
56 if (host->dma_ops)
57 host->dma_ops->start(host, data);
58}
59
60static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
61{
62 if (host->dma_ops)
63 host->dma_ops->enable(host, enable);
64}
65
66static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
67 struct tmio_mmc_data *pdata)
68{
69 if (host->dma_ops) {
70 host->dma_ops->request(host, pdata);
71 } else {
72 host->chan_tx = NULL;
73 host->chan_rx = NULL;
74 }
75}
76
77static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
78{
79 if (host->dma_ops)
80 host->dma_ops->release(host);
81}
82
83static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
84{
85 if (host->dma_ops)
86 host->dma_ops->abort(host);
87}
88
89static inline void tmio_mmc_dataend_dma(struct tmio_mmc_host *host)
90{
91 if (host->dma_ops)
92 host->dma_ops->dataend(host);
93}
94
95void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
96{
97 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
98 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
99}
100EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs);
101
102void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
103{
104 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
105 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
106}
107EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs);
108
109static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
110{
111 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i);
112}
113
114static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
115{
116 host->sg_len = data->sg_len;
117 host->sg_ptr = data->sg;
118 host->sg_orig = data->sg;
119 host->sg_off = 0;
120}
121
122static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
123{
124 host->sg_ptr = sg_next(host->sg_ptr);
125 host->sg_off = 0;
126 return --host->sg_len;
127}
128
129#define CMDREQ_TIMEOUT 5000
130
131static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
132{
133 struct tmio_mmc_host *host = mmc_priv(mmc);
134
135 if (enable && !host->sdio_irq_enabled) {
136 u16 sdio_status;
137
138 /* Keep device active while SDIO irq is enabled */
139 pm_runtime_get_sync(mmc_dev(mmc));
140
141 host->sdio_irq_enabled = true;
142 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ;
143
144 /* Clear obsolete interrupts before enabling */
145 sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL;
146 if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
147 sdio_status |= TMIO_SDIO_SETBITS_MASK;
148 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
149
150 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
151 } else if (!enable && host->sdio_irq_enabled) {
152 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
153 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
154
155 host->sdio_irq_enabled = false;
156 pm_runtime_mark_last_busy(mmc_dev(mmc));
157 pm_runtime_put_autosuspend(mmc_dev(mmc));
158 }
159}
160
161static void tmio_mmc_reset(struct tmio_mmc_host *host)
162{
163 /* FIXME - should we set stop clock reg here */
164 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
165 usleep_range(10000, 11000);
166 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
167 usleep_range(10000, 11000);
168
169 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) {
170 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
171 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
172 }
173}
174
175static void tmio_mmc_hw_reset(struct mmc_host *mmc)
176{
177 struct tmio_mmc_host *host = mmc_priv(mmc);
178
179 host->reset(host);
180
181 tmio_mmc_abort_dma(host);
182
183 if (host->hw_reset)
184 host->hw_reset(host);
185}
186
187static void tmio_mmc_reset_work(struct work_struct *work)
188{
189 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
190 delayed_reset_work.work);
191 struct mmc_request *mrq;
192 unsigned long flags;
193
194 spin_lock_irqsave(&host->lock, flags);
195 mrq = host->mrq;
196
197 /*
198 * is request already finished? Since we use a non-blocking
199 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
200 * us, so, have to check for IS_ERR(host->mrq)
201 */
202 if (IS_ERR_OR_NULL(mrq) ||
203 time_is_after_jiffies(host->last_req_ts +
204 msecs_to_jiffies(CMDREQ_TIMEOUT))) {
205 spin_unlock_irqrestore(&host->lock, flags);
206 return;
207 }
208
209 dev_warn(&host->pdev->dev,
210 "timeout waiting for hardware interrupt (CMD%u)\n",
211 mrq->cmd->opcode);
212
213 if (host->data)
214 host->data->error = -ETIMEDOUT;
215 else if (host->cmd)
216 host->cmd->error = -ETIMEDOUT;
217 else
218 mrq->cmd->error = -ETIMEDOUT;
219
220 host->cmd = NULL;
221 host->data = NULL;
222
223 spin_unlock_irqrestore(&host->lock, flags);
224
225 tmio_mmc_hw_reset(host->mmc);
226
227 /* Ready for new calls */
228 host->mrq = NULL;
229
230 mmc_request_done(host->mmc, mrq);
231}
232
233/* These are the bitmasks the tmio chip requires to implement the MMC response
234 * types. Note that R1 and R6 are the same in this scheme. */
235#define APP_CMD 0x0040
236#define RESP_NONE 0x0300
237#define RESP_R1 0x0400
238#define RESP_R1B 0x0500
239#define RESP_R2 0x0600
240#define RESP_R3 0x0700
241#define DATA_PRESENT 0x0800
242#define TRANSFER_READ 0x1000
243#define TRANSFER_MULTI 0x2000
244#define SECURITY_CMD 0x4000
245#define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
246
247static int tmio_mmc_start_command(struct tmio_mmc_host *host,
248 struct mmc_command *cmd)
249{
250 struct mmc_data *data = host->data;
251 int c = cmd->opcode;
252
253 switch (mmc_resp_type(cmd)) {
254 case MMC_RSP_NONE: c |= RESP_NONE; break;
255 case MMC_RSP_R1:
256 case MMC_RSP_R1_NO_CRC:
257 c |= RESP_R1; break;
258 case MMC_RSP_R1B: c |= RESP_R1B; break;
259 case MMC_RSP_R2: c |= RESP_R2; break;
260 case MMC_RSP_R3: c |= RESP_R3; break;
261 default:
262 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
263 return -EINVAL;
264 }
265
266 host->cmd = cmd;
267
268/* FIXME - this seems to be ok commented out but the spec suggest this bit
269 * should be set when issuing app commands.
270 * if(cmd->flags & MMC_FLAG_ACMD)
271 * c |= APP_CMD;
272 */
273 if (data) {
274 c |= DATA_PRESENT;
275 if (data->blocks > 1) {
276 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC);
277 c |= TRANSFER_MULTI;
278
279 /*
280 * Disable auto CMD12 at IO_RW_EXTENDED and
281 * SET_BLOCK_COUNT when doing multiple block transfer
282 */
283 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&
284 (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc))
285 c |= NO_CMD12_ISSUE;
286 }
287 if (data->flags & MMC_DATA_READ)
288 c |= TRANSFER_READ;
289 }
290
291 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_CMD);
292
293 /* Fire off the command */
294 sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg);
295 sd_ctrl_write16(host, CTL_SD_CMD, c);
296
297 return 0;
298}
299
300static void tmio_mmc_transfer_data(struct tmio_mmc_host *host,
301 unsigned short *buf,
302 unsigned int count)
303{
304 int is_read = host->data->flags & MMC_DATA_READ;
305 u8 *buf8;
306
307 /*
308 * Transfer the data
309 */
310 if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) {
311 u32 data = 0;
312 u32 *buf32 = (u32 *)buf;
313
314 if (is_read)
315 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, buf32,
316 count >> 2);
317 else
318 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, buf32,
319 count >> 2);
320
321 /* if count was multiple of 4 */
322 if (!(count & 0x3))
323 return;
324
325 buf32 += count >> 2;
326 count %= 4;
327
328 if (is_read) {
329 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1);
330 memcpy(buf32, &data, count);
331 } else {
332 memcpy(&data, buf32, count);
333 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1);
334 }
335
336 return;
337 }
338
339 if (is_read)
340 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
341 else
342 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
343
344 /* if count was even number */
345 if (!(count & 0x1))
346 return;
347
348 /* if count was odd number */
349 buf8 = (u8 *)(buf + (count >> 1));
350
351 /*
352 * FIXME
353 *
354 * driver and this function are assuming that
355 * it is used as little endian
356 */
357 if (is_read)
358 *buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff;
359 else
360 sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8);
361}
362
363/*
364 * This chip always returns (at least?) as much data as you ask for.
365 * I'm unsure what happens if you ask for less than a block. This should be
366 * looked into to ensure that a funny length read doesn't hose the controller.
367 */
368static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
369{
370 struct mmc_data *data = host->data;
371 void *sg_virt;
372 unsigned short *buf;
373 unsigned int count;
374 unsigned long flags;
375
376 if (host->dma_on) {
377 pr_err("PIO IRQ in DMA mode!\n");
378 return;
379 } else if (!data) {
380 pr_debug("Spurious PIO IRQ\n");
381 return;
382 }
383
384 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
385 buf = (unsigned short *)(sg_virt + host->sg_off);
386
387 count = host->sg_ptr->length - host->sg_off;
388 if (count > data->blksz)
389 count = data->blksz;
390
391 pr_debug("count: %08x offset: %08x flags %08x\n",
392 count, host->sg_off, data->flags);
393
394 /* Transfer the data */
395 tmio_mmc_transfer_data(host, buf, count);
396
397 host->sg_off += count;
398
399 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
400
401 if (host->sg_off == host->sg_ptr->length)
402 tmio_mmc_next_sg(host);
403}
404
405static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
406{
407 if (host->sg_ptr == &host->bounce_sg) {
408 unsigned long flags;
409 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
410
411 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
412 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
413 }
414}
415
416/* needs to be called with host->lock held */
417void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
418{
419 struct mmc_data *data = host->data;
420 struct mmc_command *stop;
421
422 host->data = NULL;
423
424 if (!data) {
425 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
426 return;
427 }
428 stop = data->stop;
429
430 /* FIXME - return correct transfer count on errors */
431 if (!data->error)
432 data->bytes_xfered = data->blocks * data->blksz;
433 else
434 data->bytes_xfered = 0;
435
436 pr_debug("Completed data request\n");
437
438 /*
439 * FIXME: other drivers allow an optional stop command of any given type
440 * which we dont do, as the chip can auto generate them.
441 * Perhaps we can be smarter about when to use auto CMD12 and
442 * only issue the auto request when we know this is the desired
443 * stop command, allowing fallback to the stop command the
444 * upper layers expect. For now, we do what works.
445 */
446
447 if (data->flags & MMC_DATA_READ) {
448 if (host->dma_on)
449 tmio_mmc_check_bounce_buffer(host);
450 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
451 host->mrq);
452 } else {
453 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
454 host->mrq);
455 }
456
457 if (stop && !host->mrq->sbc) {
458 if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg)
459 dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n",
460 stop->opcode, stop->arg);
461
462 /* fill in response from auto CMD12 */
463 stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE);
464
465 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0);
466 }
467
468 schedule_work(&host->done);
469}
470EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq);
471
472static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
473{
474 struct mmc_data *data;
475
476 spin_lock(&host->lock);
477 data = host->data;
478
479 if (!data)
480 goto out;
481
482 if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||
483 stat & TMIO_STAT_TXUNDERRUN)
484 data->error = -EILSEQ;
485 if (host->dma_on && (data->flags & MMC_DATA_WRITE)) {
486 u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
487 bool done = false;
488
489 /*
490 * Has all data been written out yet? Testing on SuperH showed,
491 * that in most cases the first interrupt comes already with the
492 * BUSY status bit clear, but on some operations, like mount or
493 * in the beginning of a write / sync / umount, there is one
494 * DATAEND interrupt with the BUSY bit set, in this cases
495 * waiting for one more interrupt fixes the problem.
496 */
497 if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) {
498 if (status & TMIO_STAT_SCLKDIVEN)
499 done = true;
500 } else {
501 if (!(status & TMIO_STAT_CMD_BUSY))
502 done = true;
503 }
504
505 if (done) {
506 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
507 tmio_mmc_dataend_dma(host);
508 }
509 } else if (host->dma_on && (data->flags & MMC_DATA_READ)) {
510 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
511 tmio_mmc_dataend_dma(host);
512 } else {
513 tmio_mmc_do_data_irq(host);
514 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
515 }
516out:
517 spin_unlock(&host->lock);
518}
519
520static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat)
521{
522 struct mmc_command *cmd = host->cmd;
523 int i, addr;
524
525 spin_lock(&host->lock);
526
527 if (!host->cmd) {
528 pr_debug("Spurious CMD irq\n");
529 goto out;
530 }
531
532 /* This controller is sicker than the PXA one. Not only do we need to
533 * drop the top 8 bits of the first response word, we also need to
534 * modify the order of the response for short response command types.
535 */
536
537 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
538 cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr);
539
540 if (cmd->flags & MMC_RSP_136) {
541 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
542 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
543 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
544 cmd->resp[3] <<= 8;
545 } else if (cmd->flags & MMC_RSP_R3) {
546 cmd->resp[0] = cmd->resp[3];
547 }
548
549 if (stat & TMIO_STAT_CMDTIMEOUT)
550 cmd->error = -ETIMEDOUT;
551 else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) ||
552 stat & TMIO_STAT_STOPBIT_ERR ||
553 stat & TMIO_STAT_CMD_IDX_ERR)
554 cmd->error = -EILSEQ;
555
556 /* If there is data to handle we enable data IRQs here, and
557 * we will ultimatley finish the request in the data_end handler.
558 * If theres no data or we encountered an error, finish now.
559 */
560 if (host->data && (!cmd->error || cmd->error == -EILSEQ)) {
561 if (host->data->flags & MMC_DATA_READ) {
562 if (!host->dma_on) {
563 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
564 } else {
565 tmio_mmc_disable_mmc_irqs(host,
566 TMIO_MASK_READOP);
567 tasklet_schedule(&host->dma_issue);
568 }
569 } else {
570 if (!host->dma_on) {
571 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
572 } else {
573 tmio_mmc_disable_mmc_irqs(host,
574 TMIO_MASK_WRITEOP);
575 tasklet_schedule(&host->dma_issue);
576 }
577 }
578 } else {
579 schedule_work(&host->done);
580 }
581
582out:
583 spin_unlock(&host->lock);
584}
585
586static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
587 int ireg, int status)
588{
589 struct mmc_host *mmc = host->mmc;
590
591 /* Card insert / remove attempts */
592 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
593 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
594 TMIO_STAT_CARD_REMOVE);
595 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
596 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
597 !work_pending(&mmc->detect.work))
598 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
599 return true;
600 }
601
602 return false;
603}
604
605static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg,
606 int status)
607{
608 /* Command completion */
609 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
610 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND |
611 TMIO_STAT_CMDTIMEOUT);
612 tmio_mmc_cmd_irq(host, status);
613 return true;
614 }
615
616 /* Data transfer */
617 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
618 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
619 tmio_mmc_pio_irq(host);
620 return true;
621 }
622
623 /* Data transfer completion */
624 if (ireg & TMIO_STAT_DATAEND) {
625 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
626 tmio_mmc_data_irq(host, status);
627 return true;
628 }
629
630 return false;
631}
632
633static bool __tmio_mmc_sdio_irq(struct tmio_mmc_host *host)
634{
635 struct mmc_host *mmc = host->mmc;
636 struct tmio_mmc_data *pdata = host->pdata;
637 unsigned int ireg, status;
638 unsigned int sdio_status;
639
640 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
641 return false;
642
643 status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
644 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
645
646 sdio_status = status & ~TMIO_SDIO_MASK_ALL;
647 if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
648 sdio_status |= TMIO_SDIO_SETBITS_MASK;
649
650 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
651
652 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
653 mmc_signal_sdio_irq(mmc);
654
655 return ireg;
656}
657
658irqreturn_t tmio_mmc_irq(int irq, void *devid)
659{
660 struct tmio_mmc_host *host = devid;
661 unsigned int ireg, status;
662
663 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
664 ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
665
666 /* Clear the status except the interrupt status */
667 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ);
668
669 if (__tmio_mmc_card_detect_irq(host, ireg, status))
670 return IRQ_HANDLED;
671 if (__tmio_mmc_sdcard_irq(host, ireg, status))
672 return IRQ_HANDLED;
673
674 if (__tmio_mmc_sdio_irq(host))
675 return IRQ_HANDLED;
676
677 return IRQ_NONE;
678}
679EXPORT_SYMBOL_GPL(tmio_mmc_irq);
680
681static int tmio_mmc_start_data(struct tmio_mmc_host *host,
682 struct mmc_data *data)
683{
684 struct tmio_mmc_data *pdata = host->pdata;
685
686 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
687 data->blksz, data->blocks);
688
689 /* Some hardware cannot perform 2 byte requests in 4/8 bit mode */
690 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 ||
691 host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
692 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
693
694 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
695 pr_err("%s: %d byte block unsupported in 4/8 bit mode\n",
696 mmc_hostname(host->mmc), data->blksz);
697 return -EINVAL;
698 }
699 }
700
701 tmio_mmc_init_sg(host, data);
702 host->data = data;
703 host->dma_on = false;
704
705 /* Set transfer length / blocksize */
706 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
707 if (host->mmc->max_blk_count >= SZ_64K)
708 sd_ctrl_write32(host, CTL_XFER_BLK_COUNT, data->blocks);
709 else
710 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
711
712 tmio_mmc_start_dma(host, data);
713
714 return 0;
715}
716
717static int tmio_mmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
718{
719 struct tmio_mmc_host *host = mmc_priv(mmc);
720 int i, ret = 0;
721
722 if (!host->init_tuning || !host->select_tuning)
723 /* Tuning is not supported */
724 goto out;
725
726 host->tap_num = host->init_tuning(host);
727 if (!host->tap_num)
728 /* Tuning is not supported */
729 goto out;
730
731 if (host->tap_num * 2 >= sizeof(host->taps) * BITS_PER_BYTE) {
732 dev_warn_once(&host->pdev->dev,
733 "Too many taps, skipping tuning. Please consider updating size of taps field of tmio_mmc_host\n");
734 goto out;
735 }
736
737 bitmap_zero(host->taps, host->tap_num * 2);
738
739 /* Issue CMD19 twice for each tap */
740 for (i = 0; i < 2 * host->tap_num; i++) {
741 if (host->prepare_tuning)
742 host->prepare_tuning(host, i % host->tap_num);
743
744 ret = mmc_send_tuning(mmc, opcode, NULL);
745 if (ret == 0)
746 set_bit(i, host->taps);
747 }
748
749 ret = host->select_tuning(host);
750
751out:
752 if (ret < 0) {
753 dev_warn(&host->pdev->dev, "Tuning procedure failed\n");
754 tmio_mmc_hw_reset(mmc);
755 }
756
757 return ret;
758}
759
760static void tmio_process_mrq(struct tmio_mmc_host *host,
761 struct mmc_request *mrq)
762{
763 struct mmc_command *cmd;
764 int ret;
765
766 if (mrq->sbc && host->cmd != mrq->sbc) {
767 cmd = mrq->sbc;
768 } else {
769 cmd = mrq->cmd;
770 if (mrq->data) {
771 ret = tmio_mmc_start_data(host, mrq->data);
772 if (ret)
773 goto fail;
774 }
775 }
776
777 ret = tmio_mmc_start_command(host, cmd);
778 if (ret)
779 goto fail;
780
781 schedule_delayed_work(&host->delayed_reset_work,
782 msecs_to_jiffies(CMDREQ_TIMEOUT));
783 return;
784
785fail:
786 host->mrq = NULL;
787 mrq->cmd->error = ret;
788 mmc_request_done(host->mmc, mrq);
789}
790
791/* Process requests from the MMC layer */
792static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
793{
794 struct tmio_mmc_host *host = mmc_priv(mmc);
795 unsigned long flags;
796
797 spin_lock_irqsave(&host->lock, flags);
798
799 if (host->mrq) {
800 pr_debug("request not null\n");
801 if (IS_ERR(host->mrq)) {
802 spin_unlock_irqrestore(&host->lock, flags);
803 mrq->cmd->error = -EAGAIN;
804 mmc_request_done(mmc, mrq);
805 return;
806 }
807 }
808
809 host->last_req_ts = jiffies;
810 wmb();
811 host->mrq = mrq;
812
813 spin_unlock_irqrestore(&host->lock, flags);
814
815 tmio_process_mrq(host, mrq);
816}
817
818static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
819{
820 struct mmc_request *mrq;
821 unsigned long flags;
822
823 spin_lock_irqsave(&host->lock, flags);
824
825 mrq = host->mrq;
826 if (IS_ERR_OR_NULL(mrq)) {
827 spin_unlock_irqrestore(&host->lock, flags);
828 return;
829 }
830
831 /* If not SET_BLOCK_COUNT, clear old data */
832 if (host->cmd != mrq->sbc) {
833 host->cmd = NULL;
834 host->data = NULL;
835 host->mrq = NULL;
836 }
837
838 cancel_delayed_work(&host->delayed_reset_work);
839
840 spin_unlock_irqrestore(&host->lock, flags);
841
842 if (mrq->cmd->error || (mrq->data && mrq->data->error))
843 tmio_mmc_abort_dma(host);
844
845 /* SCC error means retune, but executed command was still successful */
846 if (host->check_scc_error && host->check_scc_error(host))
847 mmc_retune_needed(host->mmc);
848
849 /* If SET_BLOCK_COUNT, continue with main command */
850 if (host->mrq && !mrq->cmd->error) {
851 tmio_process_mrq(host, mrq);
852 return;
853 }
854
855 mmc_request_done(host->mmc, mrq);
856}
857
858static void tmio_mmc_done_work(struct work_struct *work)
859{
860 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
861 done);
862 tmio_mmc_finish_request(host);
863}
864
865static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
866{
867 struct mmc_host *mmc = host->mmc;
868 int ret = 0;
869
870 /* .set_ios() is returning void, so, no chance to report an error */
871
872 if (host->set_pwr)
873 host->set_pwr(host->pdev, 1);
874
875 if (!IS_ERR(mmc->supply.vmmc)) {
876 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
877 /*
878 * Attention: empiric value. With a b43 WiFi SDIO card this
879 * delay proved necessary for reliable card-insertion probing.
880 * 100us were not enough. Is this the same 140us delay, as in
881 * tmio_mmc_set_ios()?
882 */
883 usleep_range(200, 300);
884 }
885 /*
886 * It seems, VccQ should be switched on after Vcc, this is also what the
887 * omap_hsmmc.c driver does.
888 */
889 if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
890 ret = regulator_enable(mmc->supply.vqmmc);
891 usleep_range(200, 300);
892 }
893
894 if (ret < 0)
895 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
896 ret);
897}
898
899static void tmio_mmc_power_off(struct tmio_mmc_host *host)
900{
901 struct mmc_host *mmc = host->mmc;
902
903 if (!IS_ERR(mmc->supply.vqmmc))
904 regulator_disable(mmc->supply.vqmmc);
905
906 if (!IS_ERR(mmc->supply.vmmc))
907 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
908
909 if (host->set_pwr)
910 host->set_pwr(host->pdev, 0);
911}
912
913static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
914 unsigned char bus_width)
915{
916 u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT)
917 & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8);
918
919 /* reg now applies to MMC_BUS_WIDTH_4 */
920 if (bus_width == MMC_BUS_WIDTH_1)
921 reg |= CARD_OPT_WIDTH;
922 else if (bus_width == MMC_BUS_WIDTH_8)
923 reg |= CARD_OPT_WIDTH8;
924
925 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
926}
927
928/* Set MMC clock / power.
929 * Note: This controller uses a simple divider scheme therefore it cannot
930 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
931 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
932 * slowest setting.
933 */
934static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
935{
936 struct tmio_mmc_host *host = mmc_priv(mmc);
937 struct device *dev = &host->pdev->dev;
938 unsigned long flags;
939
940 mutex_lock(&host->ios_lock);
941
942 spin_lock_irqsave(&host->lock, flags);
943 if (host->mrq) {
944 if (IS_ERR(host->mrq)) {
945 dev_dbg(dev,
946 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
947 current->comm, task_pid_nr(current),
948 ios->clock, ios->power_mode);
949 host->mrq = ERR_PTR(-EINTR);
950 } else {
951 dev_dbg(dev,
952 "%s.%d: CMD%u active since %lu, now %lu!\n",
953 current->comm, task_pid_nr(current),
954 host->mrq->cmd->opcode, host->last_req_ts,
955 jiffies);
956 }
957 spin_unlock_irqrestore(&host->lock, flags);
958
959 mutex_unlock(&host->ios_lock);
960 return;
961 }
962
963 host->mrq = ERR_PTR(-EBUSY);
964
965 spin_unlock_irqrestore(&host->lock, flags);
966
967 switch (ios->power_mode) {
968 case MMC_POWER_OFF:
969 tmio_mmc_power_off(host);
970 host->set_clock(host, 0);
971 break;
972 case MMC_POWER_UP:
973 tmio_mmc_power_on(host, ios->vdd);
974 host->set_clock(host, ios->clock);
975 tmio_mmc_set_bus_width(host, ios->bus_width);
976 break;
977 case MMC_POWER_ON:
978 host->set_clock(host, ios->clock);
979 tmio_mmc_set_bus_width(host, ios->bus_width);
980 break;
981 }
982
983 /* Let things settle. delay taken from winCE driver */
984 usleep_range(140, 200);
985 if (PTR_ERR(host->mrq) == -EINTR)
986 dev_dbg(&host->pdev->dev,
987 "%s.%d: IOS interrupted: clk %u, mode %u",
988 current->comm, task_pid_nr(current),
989 ios->clock, ios->power_mode);
990 host->mrq = NULL;
991
992 host->clk_cache = ios->clock;
993
994 mutex_unlock(&host->ios_lock);
995}
996
997static int tmio_mmc_get_ro(struct mmc_host *mmc)
998{
999 struct tmio_mmc_host *host = mmc_priv(mmc);
1000
1001 return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
1002 TMIO_STAT_WRPROTECT);
1003}
1004
1005static int tmio_mmc_get_cd(struct mmc_host *mmc)
1006{
1007 struct tmio_mmc_host *host = mmc_priv(mmc);
1008
1009 return !!(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
1010 TMIO_STAT_SIGSTATE);
1011}
1012
1013static int tmio_multi_io_quirk(struct mmc_card *card,
1014 unsigned int direction, int blk_size)
1015{
1016 struct tmio_mmc_host *host = mmc_priv(card->host);
1017
1018 if (host->multi_io_quirk)
1019 return host->multi_io_quirk(card, direction, blk_size);
1020
1021 return blk_size;
1022}
1023
1024static int tmio_mmc_prepare_hs400_tuning(struct mmc_host *mmc,
1025 struct mmc_ios *ios)
1026{
1027 struct tmio_mmc_host *host = mmc_priv(mmc);
1028
1029 if (host->prepare_hs400_tuning)
1030 host->prepare_hs400_tuning(host);
1031
1032 return 0;
1033}
1034
1035static void tmio_mmc_hs400_downgrade(struct mmc_host *mmc)
1036{
1037 struct tmio_mmc_host *host = mmc_priv(mmc);
1038
1039 if (host->hs400_downgrade)
1040 host->hs400_downgrade(host);
1041}
1042
1043static void tmio_mmc_hs400_complete(struct mmc_host *mmc)
1044{
1045 struct tmio_mmc_host *host = mmc_priv(mmc);
1046
1047 if (host->hs400_complete)
1048 host->hs400_complete(host);
1049}
1050
1051static const struct mmc_host_ops tmio_mmc_ops = {
1052 .request = tmio_mmc_request,
1053 .set_ios = tmio_mmc_set_ios,
1054 .get_ro = tmio_mmc_get_ro,
1055 .get_cd = tmio_mmc_get_cd,
1056 .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
1057 .multi_io_quirk = tmio_multi_io_quirk,
1058 .hw_reset = tmio_mmc_hw_reset,
1059 .execute_tuning = tmio_mmc_execute_tuning,
1060 .prepare_hs400_tuning = tmio_mmc_prepare_hs400_tuning,
1061 .hs400_downgrade = tmio_mmc_hs400_downgrade,
1062 .hs400_complete = tmio_mmc_hs400_complete,
1063};
1064
1065static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
1066{
1067 struct tmio_mmc_data *pdata = host->pdata;
1068 struct mmc_host *mmc = host->mmc;
1069 int err;
1070
1071 err = mmc_regulator_get_supply(mmc);
1072 if (err)
1073 return err;
1074
1075 /* use ocr_mask if no regulator */
1076 if (!mmc->ocr_avail)
1077 mmc->ocr_avail = pdata->ocr_mask;
1078
1079 /*
1080 * try again.
1081 * There is possibility that regulator has not been probed
1082 */
1083 if (!mmc->ocr_avail)
1084 return -EPROBE_DEFER;
1085
1086 return 0;
1087}
1088
1089static void tmio_mmc_of_parse(struct platform_device *pdev,
1090 struct mmc_host *mmc)
1091{
1092 const struct device_node *np = pdev->dev.of_node;
1093
1094 if (!np)
1095 return;
1096
1097 /*
1098 * DEPRECATED:
1099 * For new platforms, please use "disable-wp" instead of
1100 * "toshiba,mmc-wrprotect-disable"
1101 */
1102 if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL))
1103 mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT;
1104}
1105
1106struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
1107 struct tmio_mmc_data *pdata)
1108{
1109 struct tmio_mmc_host *host;
1110 struct mmc_host *mmc;
1111 struct resource *res;
1112 void __iomem *ctl;
1113 int ret;
1114
1115 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1116 ctl = devm_ioremap_resource(&pdev->dev, res);
1117 if (IS_ERR(ctl))
1118 return ERR_CAST(ctl);
1119
1120 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
1121 if (!mmc)
1122 return ERR_PTR(-ENOMEM);
1123
1124 host = mmc_priv(mmc);
1125 host->ctl = ctl;
1126 host->mmc = mmc;
1127 host->pdev = pdev;
1128 host->pdata = pdata;
1129 host->ops = tmio_mmc_ops;
1130 mmc->ops = &host->ops;
1131
1132 ret = mmc_of_parse(host->mmc);
1133 if (ret) {
1134 host = ERR_PTR(ret);
1135 goto free;
1136 }
1137
1138 tmio_mmc_of_parse(pdev, mmc);
1139
1140 platform_set_drvdata(pdev, host);
1141
1142 return host;
1143free:
1144 mmc_free_host(mmc);
1145
1146 return host;
1147}
1148EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc);
1149
1150void tmio_mmc_host_free(struct tmio_mmc_host *host)
1151{
1152 mmc_free_host(host->mmc);
1153}
1154EXPORT_SYMBOL_GPL(tmio_mmc_host_free);
1155
1156int tmio_mmc_host_probe(struct tmio_mmc_host *_host)
1157{
1158 struct platform_device *pdev = _host->pdev;
1159 struct tmio_mmc_data *pdata = _host->pdata;
1160 struct mmc_host *mmc = _host->mmc;
1161 int ret;
1162
1163 /*
1164 * Check the sanity of mmc->f_min to prevent host->set_clock() from
1165 * looping forever...
1166 */
1167 if (mmc->f_min == 0)
1168 return -EINVAL;
1169
1170 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
1171 _host->write16_hook = NULL;
1172
1173 _host->set_pwr = pdata->set_pwr;
1174
1175 ret = tmio_mmc_init_ocr(_host);
1176 if (ret < 0)
1177 return ret;
1178
1179 /*
1180 * Look for a card detect GPIO, if it fails with anything
1181 * else than a probe deferral, just live without it.
1182 */
1183 ret = mmc_gpiod_request_cd(mmc, "cd", 0, false, 0, NULL);
1184 if (ret == -EPROBE_DEFER)
1185 return ret;
1186
1187 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
1188 mmc->caps2 |= pdata->capabilities2;
1189 mmc->max_segs = pdata->max_segs ? : 32;
1190 mmc->max_blk_size = TMIO_MAX_BLK_SIZE;
1191 mmc->max_blk_count = pdata->max_blk_count ? :
1192 (PAGE_SIZE / mmc->max_blk_size) * mmc->max_segs;
1193 mmc->max_req_size = min_t(size_t,
1194 mmc->max_blk_size * mmc->max_blk_count,
1195 dma_max_mapping_size(&pdev->dev));
1196 mmc->max_seg_size = mmc->max_req_size;
1197
1198 if (mmc_can_gpio_ro(mmc))
1199 _host->ops.get_ro = mmc_gpio_get_ro;
1200
1201 if (mmc_can_gpio_cd(mmc))
1202 _host->ops.get_cd = mmc_gpio_get_cd;
1203
1204 _host->native_hotplug = !(mmc_can_gpio_cd(mmc) ||
1205 mmc->caps & MMC_CAP_NEEDS_POLL ||
1206 !mmc_card_is_removable(mmc));
1207
1208 if (!_host->reset)
1209 _host->reset = tmio_mmc_reset;
1210
1211 /*
1212 * On Gen2+, eMMC with NONREMOVABLE currently fails because native
1213 * hotplug gets disabled. It seems RuntimePM related yet we need further
1214 * research. Since we are planning a PM overhaul anyway, let's enforce
1215 * for now the device being active by enabling native hotplug always.
1216 */
1217 if (pdata->flags & TMIO_MMC_MIN_RCAR2)
1218 _host->native_hotplug = true;
1219
1220 /*
1221 * While using internal tmio hardware logic for card detection, we need
1222 * to ensure it stays powered for it to work.
1223 */
1224 if (_host->native_hotplug)
1225 pm_runtime_get_noresume(&pdev->dev);
1226
1227 _host->sdio_irq_enabled = false;
1228 if (pdata->flags & TMIO_MMC_SDIO_IRQ)
1229 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
1230
1231 _host->set_clock(_host, 0);
1232 tmio_mmc_hw_reset(mmc);
1233
1234 _host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK);
1235 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
1236
1237 if (_host->native_hotplug)
1238 tmio_mmc_enable_mmc_irqs(_host,
1239 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1240
1241 spin_lock_init(&_host->lock);
1242 mutex_init(&_host->ios_lock);
1243
1244 /* Init delayed work for request timeouts */
1245 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
1246 INIT_WORK(&_host->done, tmio_mmc_done_work);
1247
1248 /* See if we also get DMA */
1249 tmio_mmc_request_dma(_host, pdata);
1250
1251 pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
1252 pm_runtime_use_autosuspend(&pdev->dev);
1253 pm_runtime_enable(&pdev->dev);
1254 pm_runtime_get_sync(&pdev->dev);
1255
1256 ret = mmc_add_host(mmc);
1257 if (ret)
1258 goto remove_host;
1259
1260 dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
1261 pm_runtime_put(&pdev->dev);
1262
1263 return 0;
1264
1265remove_host:
1266 pm_runtime_put_noidle(&pdev->dev);
1267 tmio_mmc_host_remove(_host);
1268 return ret;
1269}
1270EXPORT_SYMBOL_GPL(tmio_mmc_host_probe);
1271
1272void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1273{
1274 struct platform_device *pdev = host->pdev;
1275 struct mmc_host *mmc = host->mmc;
1276
1277 pm_runtime_get_sync(&pdev->dev);
1278
1279 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ)
1280 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
1281
1282 dev_pm_qos_hide_latency_limit(&pdev->dev);
1283
1284 mmc_remove_host(mmc);
1285 cancel_work_sync(&host->done);
1286 cancel_delayed_work_sync(&host->delayed_reset_work);
1287 tmio_mmc_release_dma(host);
1288
1289 pm_runtime_dont_use_autosuspend(&pdev->dev);
1290 if (host->native_hotplug)
1291 pm_runtime_put_noidle(&pdev->dev);
1292 pm_runtime_put_sync(&pdev->dev);
1293 pm_runtime_disable(&pdev->dev);
1294}
1295EXPORT_SYMBOL_GPL(tmio_mmc_host_remove);
1296
1297#ifdef CONFIG_PM
1298static int tmio_mmc_clk_enable(struct tmio_mmc_host *host)
1299{
1300 if (!host->clk_enable)
1301 return -ENOTSUPP;
1302
1303 return host->clk_enable(host);
1304}
1305
1306static void tmio_mmc_clk_disable(struct tmio_mmc_host *host)
1307{
1308 if (host->clk_disable)
1309 host->clk_disable(host);
1310}
1311
1312int tmio_mmc_host_runtime_suspend(struct device *dev)
1313{
1314 struct tmio_mmc_host *host = dev_get_drvdata(dev);
1315
1316 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
1317
1318 if (host->clk_cache)
1319 host->set_clock(host, 0);
1320
1321 tmio_mmc_clk_disable(host);
1322
1323 return 0;
1324}
1325EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend);
1326
1327static bool tmio_mmc_can_retune(struct tmio_mmc_host *host)
1328{
1329 return host->tap_num && mmc_can_retune(host->mmc);
1330}
1331
1332int tmio_mmc_host_runtime_resume(struct device *dev)
1333{
1334 struct tmio_mmc_host *host = dev_get_drvdata(dev);
1335
1336 if (!host->runtime_synced) {
1337 host->runtime_synced = true;
1338 return 0;
1339 }
1340
1341 tmio_mmc_clk_enable(host);
1342 tmio_mmc_hw_reset(host->mmc);
1343
1344 if (host->clk_cache)
1345 host->set_clock(host, host->clk_cache);
1346
1347 if (host->native_hotplug)
1348 tmio_mmc_enable_mmc_irqs(host,
1349 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1350
1351 tmio_mmc_enable_dma(host, true);
1352
1353 if (tmio_mmc_can_retune(host) && host->select_tuning(host))
1354 dev_warn(&host->pdev->dev, "Tuning selection failed\n");
1355
1356 return 0;
1357}
1358EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume);
1359#endif
1360
1361MODULE_LICENSE("GPL v2");