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v6.2
  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * AHCI SATA platform library
  4 *
  5 * Copyright 2004-2005  Red Hat, Inc.
  6 *   Jeff Garzik <jgarzik@pobox.com>
  7 * Copyright 2010  MontaVista Software, LLC.
  8 *   Anton Vorontsov <avorontsov@ru.mvista.com>
  9 */
 10
 11#include <linux/clk.h>
 12#include <linux/kernel.h>
 13#include <linux/gfp.h>
 14#include <linux/module.h>
 15#include <linux/pm.h>
 16#include <linux/interrupt.h>
 17#include <linux/device.h>
 18#include <linux/platform_device.h>
 19#include <linux/libata.h>
 20#include <linux/ahci_platform.h>
 21#include <linux/phy/phy.h>
 22#include <linux/pm_runtime.h>
 23#include <linux/of_platform.h>
 24#include <linux/reset.h>
 25#include "ahci.h"
 26
 27static void ahci_host_stop(struct ata_host *host);
 28
 29struct ata_port_operations ahci_platform_ops = {
 30	.inherits	= &ahci_ops,
 31	.host_stop	= ahci_host_stop,
 32};
 33EXPORT_SYMBOL_GPL(ahci_platform_ops);
 34
 35/**
 36 * ahci_platform_enable_phys - Enable PHYs
 37 * @hpriv: host private area to store config values
 38 *
 39 * This function enables all the PHYs found in hpriv->phys, if any.
 40 * If a PHY fails to be enabled, it disables all the PHYs already
 41 * enabled in reverse order and returns an error.
 42 *
 43 * RETURNS:
 44 * 0 on success otherwise a negative error code
 45 */
 46int ahci_platform_enable_phys(struct ahci_host_priv *hpriv)
 47{
 48	int rc, i;
 49
 50	for (i = 0; i < hpriv->nports; i++) {
 51		rc = phy_init(hpriv->phys[i]);
 52		if (rc)
 53			goto disable_phys;
 54
 55		rc = phy_set_mode(hpriv->phys[i], PHY_MODE_SATA);
 56		if (rc) {
 57			phy_exit(hpriv->phys[i]);
 58			goto disable_phys;
 59		}
 60
 61		rc = phy_power_on(hpriv->phys[i]);
 62		if (rc) {
 63			phy_exit(hpriv->phys[i]);
 64			goto disable_phys;
 65		}
 66	}
 67
 68	return 0;
 69
 70disable_phys:
 71	while (--i >= 0) {
 72		phy_power_off(hpriv->phys[i]);
 73		phy_exit(hpriv->phys[i]);
 74	}
 75	return rc;
 76}
 77EXPORT_SYMBOL_GPL(ahci_platform_enable_phys);
 78
 79/**
 80 * ahci_platform_disable_phys - Disable PHYs
 81 * @hpriv: host private area to store config values
 82 *
 83 * This function disables all PHYs found in hpriv->phys.
 84 */
 85void ahci_platform_disable_phys(struct ahci_host_priv *hpriv)
 86{
 87	int i;
 88
 89	for (i = 0; i < hpriv->nports; i++) {
 90		phy_power_off(hpriv->phys[i]);
 91		phy_exit(hpriv->phys[i]);
 92	}
 93}
 94EXPORT_SYMBOL_GPL(ahci_platform_disable_phys);
 95
 96/**
 97 * ahci_platform_find_clk - Find platform clock
 98 * @hpriv: host private area to store config values
 99 * @con_id: clock connection ID
100 *
101 * This function returns a pointer to the clock descriptor of the clock with
102 * the passed ID.
103 *
104 * RETURNS:
105 * Pointer to the clock descriptor on success otherwise NULL
106 */
107struct clk *ahci_platform_find_clk(struct ahci_host_priv *hpriv, const char *con_id)
108{
109	int i;
110
111	for (i = 0; i < hpriv->n_clks; i++) {
112		if (hpriv->clks[i].id && !strcmp(hpriv->clks[i].id, con_id))
113			return hpriv->clks[i].clk;
114	}
115
116	return NULL;
117}
118EXPORT_SYMBOL_GPL(ahci_platform_find_clk);
119
120/**
121 * ahci_platform_enable_clks - Enable platform clocks
122 * @hpriv: host private area to store config values
123 *
124 * This function enables all the clks found for the AHCI device.
 
 
125 *
126 * RETURNS:
127 * 0 on success otherwise a negative error code
128 */
129int ahci_platform_enable_clks(struct ahci_host_priv *hpriv)
130{
131	return clk_bulk_prepare_enable(hpriv->n_clks, hpriv->clks);
 
 
 
 
 
 
 
 
 
 
 
 
132}
133EXPORT_SYMBOL_GPL(ahci_platform_enable_clks);
134
135/**
136 * ahci_platform_disable_clks - Disable platform clocks
137 * @hpriv: host private area to store config values
138 *
139 * This function disables all the clocks enabled before
140 * (bulk-clocks-disable function is supposed to do that in reverse
141 * from the enabling procedure order).
142 */
143void ahci_platform_disable_clks(struct ahci_host_priv *hpriv)
144{
145	clk_bulk_disable_unprepare(hpriv->n_clks, hpriv->clks);
146}
147EXPORT_SYMBOL_GPL(ahci_platform_disable_clks);
148
149/**
150 * ahci_platform_deassert_rsts - Deassert/trigger platform resets
151 * @hpriv: host private area to store config values
152 *
153 * This function deasserts or triggers all the reset lines found for
154 * the AHCI device.
155 *
156 * RETURNS:
157 * 0 on success otherwise a negative error code
158 */
159int ahci_platform_deassert_rsts(struct ahci_host_priv *hpriv)
160{
161	if (hpriv->f_rsts & AHCI_PLATFORM_RST_TRIGGER)
162		return reset_control_reset(hpriv->rsts);
163
164	return reset_control_deassert(hpriv->rsts);
165}
166EXPORT_SYMBOL_GPL(ahci_platform_deassert_rsts);
167
168/**
169 * ahci_platform_assert_rsts - Assert/rearm platform resets
170 * @hpriv: host private area to store config values
171 *
172 * This function asserts or rearms (for self-deasserting resets) all
173 * the reset controls found for the AHCI device.
174 *
175 * RETURNS:
176 * 0 on success otherwise a negative error code
177 */
178int ahci_platform_assert_rsts(struct ahci_host_priv *hpriv)
179{
180	if (hpriv->f_rsts & AHCI_PLATFORM_RST_TRIGGER)
181		return reset_control_rearm(hpriv->rsts);
182
183	return reset_control_assert(hpriv->rsts);
 
 
184}
185EXPORT_SYMBOL_GPL(ahci_platform_assert_rsts);
186
187/**
188 * ahci_platform_enable_regulators - Enable regulators
189 * @hpriv: host private area to store config values
190 *
191 * This function enables all the regulators found in controller and
192 * hpriv->target_pwrs, if any.  If a regulator fails to be enabled, it
193 * disables all the regulators already enabled in reverse order and
194 * returns an error.
195 *
196 * RETURNS:
197 * 0 on success otherwise a negative error code
198 */
199int ahci_platform_enable_regulators(struct ahci_host_priv *hpriv)
200{
201	int rc, i;
202
203	rc = regulator_enable(hpriv->ahci_regulator);
204	if (rc)
205		return rc;
206
207	rc = regulator_enable(hpriv->phy_regulator);
208	if (rc)
209		goto disable_ahci_pwrs;
210
211	for (i = 0; i < hpriv->nports; i++) {
212		if (!hpriv->target_pwrs[i])
213			continue;
214
215		rc = regulator_enable(hpriv->target_pwrs[i]);
216		if (rc)
217			goto disable_target_pwrs;
218	}
219
220	return 0;
221
222disable_target_pwrs:
223	while (--i >= 0)
224		if (hpriv->target_pwrs[i])
225			regulator_disable(hpriv->target_pwrs[i]);
226
227	regulator_disable(hpriv->phy_regulator);
228disable_ahci_pwrs:
229	regulator_disable(hpriv->ahci_regulator);
230	return rc;
231}
232EXPORT_SYMBOL_GPL(ahci_platform_enable_regulators);
233
234/**
235 * ahci_platform_disable_regulators - Disable regulators
236 * @hpriv: host private area to store config values
237 *
238 * This function disables all regulators found in hpriv->target_pwrs and
239 * AHCI controller.
240 */
241void ahci_platform_disable_regulators(struct ahci_host_priv *hpriv)
242{
243	int i;
244
245	for (i = 0; i < hpriv->nports; i++) {
246		if (!hpriv->target_pwrs[i])
247			continue;
248		regulator_disable(hpriv->target_pwrs[i]);
249	}
250
251	regulator_disable(hpriv->ahci_regulator);
252	regulator_disable(hpriv->phy_regulator);
253}
254EXPORT_SYMBOL_GPL(ahci_platform_disable_regulators);
255/**
256 * ahci_platform_enable_resources - Enable platform resources
257 * @hpriv: host private area to store config values
258 *
259 * This function enables all ahci_platform managed resources in the
260 * following order:
261 * 1) Regulator
262 * 2) Clocks (through ahci_platform_enable_clks)
263 * 3) Resets
264 * 4) Phys
265 *
266 * If resource enabling fails at any point the previous enabled resources
267 * are disabled in reverse order.
268 *
269 * RETURNS:
270 * 0 on success otherwise a negative error code
271 */
272int ahci_platform_enable_resources(struct ahci_host_priv *hpriv)
273{
274	int rc;
275
276	rc = ahci_platform_enable_regulators(hpriv);
277	if (rc)
278		return rc;
279
280	rc = ahci_platform_enable_clks(hpriv);
281	if (rc)
282		goto disable_regulator;
283
284	rc = ahci_platform_deassert_rsts(hpriv);
285	if (rc)
286		goto disable_clks;
287
288	rc = ahci_platform_enable_phys(hpriv);
289	if (rc)
290		goto disable_rsts;
291
292	return 0;
293
294disable_rsts:
295	ahci_platform_assert_rsts(hpriv);
296
297disable_clks:
298	ahci_platform_disable_clks(hpriv);
299
300disable_regulator:
301	ahci_platform_disable_regulators(hpriv);
302
303	return rc;
304}
305EXPORT_SYMBOL_GPL(ahci_platform_enable_resources);
306
307/**
308 * ahci_platform_disable_resources - Disable platform resources
309 * @hpriv: host private area to store config values
310 *
311 * This function disables all ahci_platform managed resources in the
312 * following order:
313 * 1) Phys
314 * 2) Resets
315 * 3) Clocks (through ahci_platform_disable_clks)
316 * 4) Regulator
317 */
318void ahci_platform_disable_resources(struct ahci_host_priv *hpriv)
319{
320	ahci_platform_disable_phys(hpriv);
321
322	ahci_platform_assert_rsts(hpriv);
323
324	ahci_platform_disable_clks(hpriv);
325
326	ahci_platform_disable_regulators(hpriv);
327}
328EXPORT_SYMBOL_GPL(ahci_platform_disable_resources);
329
330static void ahci_platform_put_resources(struct device *dev, void *res)
331{
332	struct ahci_host_priv *hpriv = res;
333	int c;
334
335	if (hpriv->got_runtime_pm) {
336		pm_runtime_put_sync(dev);
337		pm_runtime_disable(dev);
338	}
339
 
 
340	/*
341	 * The regulators are tied to child node device and not to the
342	 * SATA device itself. So we can't use devm for automatically
343	 * releasing them. We have to do it manually here.
344	 */
345	for (c = 0; c < hpriv->nports; c++)
346		if (hpriv->target_pwrs && hpriv->target_pwrs[c])
347			regulator_put(hpriv->target_pwrs[c]);
348
349	kfree(hpriv->target_pwrs);
350}
351
352static int ahci_platform_get_phy(struct ahci_host_priv *hpriv, u32 port,
353				struct device *dev, struct device_node *node)
354{
355	int rc;
356
357	hpriv->phys[port] = devm_of_phy_get(dev, node, NULL);
358
359	if (!IS_ERR(hpriv->phys[port]))
360		return 0;
361
362	rc = PTR_ERR(hpriv->phys[port]);
363	switch (rc) {
364	case -ENOSYS:
365		/* No PHY support. Check if PHY is required. */
366		if (of_find_property(node, "phys", NULL)) {
367			dev_err(dev,
368				"couldn't get PHY in node %pOFn: ENOSYS\n",
369				node);
370			break;
371		}
372		fallthrough;
373	case -ENODEV:
374		/* continue normally */
375		hpriv->phys[port] = NULL;
376		rc = 0;
377		break;
378	case -EPROBE_DEFER:
379		/* Do not complain yet */
380		break;
381
382	default:
383		dev_err(dev,
384			"couldn't get PHY in node %pOFn: %d\n",
385			node, rc);
386
387		break;
388	}
389
390	return rc;
391}
392
393static int ahci_platform_get_regulator(struct ahci_host_priv *hpriv, u32 port,
394				struct device *dev)
395{
396	struct regulator *target_pwr;
397	int rc = 0;
398
399	target_pwr = regulator_get(dev, "target");
400
401	if (!IS_ERR(target_pwr))
402		hpriv->target_pwrs[port] = target_pwr;
403	else
404		rc = PTR_ERR(target_pwr);
405
406	return rc;
407}
408
409static int ahci_platform_get_firmware(struct ahci_host_priv *hpriv,
410				      struct device *dev)
411{
412	struct device_node *child;
413	u32 port;
414
415	if (!of_property_read_u32(dev->of_node, "hba-cap", &hpriv->saved_cap))
416		hpriv->saved_cap &= (HOST_CAP_SSS | HOST_CAP_MPS);
417
418	of_property_read_u32(dev->of_node,
419			     "ports-implemented", &hpriv->saved_port_map);
420
421	for_each_child_of_node(dev->of_node, child) {
422		if (!of_device_is_available(child))
423			continue;
424
425		if (of_property_read_u32(child, "reg", &port)) {
426			of_node_put(child);
427			return -EINVAL;
428		}
429
430		if (!of_property_read_u32(child, "hba-port-cap", &hpriv->saved_port_cap[port]))
431			hpriv->saved_port_cap[port] &= PORT_CMD_CAP;
432	}
433
434	return 0;
435}
436
437/**
438 * ahci_platform_get_resources - Get platform resources
439 * @pdev: platform device to get resources for
440 * @flags: bitmap representing the resource to get
441 *
442 * This function allocates an ahci_host_priv struct, and gets the following
443 * resources, storing a reference to them inside the returned struct:
444 *
445 * 1) mmio registers (IORESOURCE_MEM 0, mandatory)
446 * 2) regulator for controlling the targets power (optional)
447 *    regulator for controlling the AHCI controller (optional)
448 * 3) all clocks specified in the devicetree node, or a single
449 *    clock for non-OF platforms (optional)
450 * 4) resets, if flags has AHCI_PLATFORM_GET_RESETS (optional)
451 * 5) phys (optional)
452 *
453 * RETURNS:
454 * The allocated ahci_host_priv on success, otherwise an ERR_PTR value
455 */
456struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev,
457						   unsigned int flags)
458{
459	int child_nodes, rc = -ENOMEM, enabled_ports = 0;
460	struct device *dev = &pdev->dev;
461	struct ahci_host_priv *hpriv;
 
462	struct device_node *child;
 
463	u32 mask_port_map = 0;
464
465	if (!devres_open_group(dev, NULL, GFP_KERNEL))
466		return ERR_PTR(-ENOMEM);
467
468	hpriv = devres_alloc(ahci_platform_put_resources, sizeof(*hpriv),
469			     GFP_KERNEL);
470	if (!hpriv)
471		goto err_out;
472
473	devres_add(dev, hpriv);
474
475	/*
476	 * If the DT provided an "ahci" named resource, use it. Otherwise,
477	 * fallback to using the default first resource for the device node.
478	 */
479	if (platform_get_resource_byname(pdev, IORESOURCE_MEM, "ahci"))
480		hpriv->mmio = devm_platform_ioremap_resource_byname(pdev, "ahci");
481	else
482		hpriv->mmio = devm_platform_ioremap_resource(pdev, 0);
483	if (IS_ERR(hpriv->mmio)) {
484		rc = PTR_ERR(hpriv->mmio);
485		goto err_out;
486	}
487
488	/*
489	 * Bulk clocks getting procedure can fail to find any clock due to
490	 * running on a non-OF platform or due to the clocks being defined in
491	 * bypass of the DT firmware (like da850, spear13xx). In that case we
492	 * fallback to getting a single clock source right from the dev clocks
493	 * list.
494	 */
495	rc = devm_clk_bulk_get_all(dev, &hpriv->clks);
496	if (rc < 0)
497		goto err_out;
498
499	if (rc > 0) {
500		/* Got clocks in bulk */
501		hpriv->n_clks = rc;
502	} else {
503		/*
504		 * No clock bulk found: fallback to manually getting
505		 * the optional clock.
 
 
506		 */
507		hpriv->clks = devm_kzalloc(dev, sizeof(*hpriv->clks), GFP_KERNEL);
508		if (!hpriv->clks) {
509			rc = -ENOMEM;
510			goto err_out;
511		}
512		hpriv->clks->clk = devm_clk_get_optional(dev, NULL);
513		if (IS_ERR(hpriv->clks->clk)) {
514			rc = PTR_ERR(hpriv->clks->clk);
515			goto err_out;
516		} else if (hpriv->clks->clk) {
517			hpriv->clks->id = "ahci";
518			hpriv->n_clks = 1;
519		}
 
520	}
521
522	hpriv->ahci_regulator = devm_regulator_get(dev, "ahci");
523	if (IS_ERR(hpriv->ahci_regulator)) {
524		rc = PTR_ERR(hpriv->ahci_regulator);
525		if (rc != 0)
526			goto err_out;
527	}
528
529	hpriv->phy_regulator = devm_regulator_get(dev, "phy");
530	if (IS_ERR(hpriv->phy_regulator)) {
531		rc = PTR_ERR(hpriv->phy_regulator);
532		goto err_out;
 
 
 
533	}
534
535	if (flags & AHCI_PLATFORM_GET_RESETS) {
536		hpriv->rsts = devm_reset_control_array_get_optional_shared(dev);
537		if (IS_ERR(hpriv->rsts)) {
538			rc = PTR_ERR(hpriv->rsts);
539			goto err_out;
540		}
541
542		hpriv->f_rsts = flags & AHCI_PLATFORM_RST_TRIGGER;
543	}
544
545	/*
546	 * Too many sub-nodes most likely means having something wrong with
547	 * the firmware.
548	 */
549	child_nodes = of_get_child_count(dev->of_node);
550	if (child_nodes > AHCI_MAX_PORTS) {
551		rc = -EINVAL;
552		goto err_out;
553	}
554
555	/*
556	 * If no sub-node was found, we still need to set nports to
557	 * one in order to be able to use the
558	 * ahci_platform_[en|dis]able_[phys|regulators] functions.
559	 */
560	if (child_nodes)
561		hpriv->nports = child_nodes;
562	else
563		hpriv->nports = 1;
564
565	hpriv->phys = devm_kcalloc(dev, hpriv->nports, sizeof(*hpriv->phys), GFP_KERNEL);
566	if (!hpriv->phys) {
567		rc = -ENOMEM;
568		goto err_out;
569	}
570	/*
571	 * We cannot use devm_ here, since ahci_platform_put_resources() uses
572	 * target_pwrs after devm_ have freed memory
573	 */
574	hpriv->target_pwrs = kcalloc(hpriv->nports, sizeof(*hpriv->target_pwrs), GFP_KERNEL);
575	if (!hpriv->target_pwrs) {
576		rc = -ENOMEM;
577		goto err_out;
578	}
579
580	if (child_nodes) {
581		for_each_child_of_node(dev->of_node, child) {
582			u32 port;
583			struct platform_device *port_dev __maybe_unused;
584
585			if (!of_device_is_available(child))
586				continue;
587
588			if (of_property_read_u32(child, "reg", &port)) {
589				rc = -EINVAL;
590				of_node_put(child);
591				goto err_out;
592			}
593
594			if (port >= hpriv->nports) {
595				dev_warn(dev, "invalid port number %d\n", port);
596				continue;
597			}
598			mask_port_map |= BIT(port);
599
600#ifdef CONFIG_OF_ADDRESS
601			of_platform_device_create(child, NULL, NULL);
602
603			port_dev = of_find_device_by_node(child);
604
605			if (port_dev) {
606				rc = ahci_platform_get_regulator(hpriv, port,
607								&port_dev->dev);
608				if (rc == -EPROBE_DEFER) {
609					of_node_put(child);
610					goto err_out;
611				}
612			}
613#endif
614
615			rc = ahci_platform_get_phy(hpriv, port, dev, child);
616			if (rc) {
617				of_node_put(child);
618				goto err_out;
619			}
620
621			enabled_ports++;
622		}
623		if (!enabled_ports) {
624			dev_warn(dev, "No port enabled\n");
625			rc = -ENODEV;
626			goto err_out;
627		}
628
629		if (!hpriv->mask_port_map)
630			hpriv->mask_port_map = mask_port_map;
631	} else {
632		/*
633		 * If no sub-node was found, keep this for device tree
634		 * compatibility
635		 */
636		rc = ahci_platform_get_phy(hpriv, 0, dev, dev->of_node);
637		if (rc)
638			goto err_out;
639
640		rc = ahci_platform_get_regulator(hpriv, 0, dev);
641		if (rc == -EPROBE_DEFER)
642			goto err_out;
643	}
644
645	/*
646	 * Retrieve firmware-specific flags which then will be used to set
647	 * the HW-init fields of HBA and its ports
648	 */
649	rc = ahci_platform_get_firmware(hpriv, dev);
650	if (rc)
651		goto err_out;
652
653	pm_runtime_enable(dev);
654	pm_runtime_get_sync(dev);
655	hpriv->got_runtime_pm = true;
656
657	devres_remove_group(dev, NULL);
658	return hpriv;
659
660err_out:
661	devres_release_group(dev, NULL);
662	return ERR_PTR(rc);
663}
664EXPORT_SYMBOL_GPL(ahci_platform_get_resources);
665
666/**
667 * ahci_platform_init_host - Bring up an ahci-platform host
668 * @pdev: platform device pointer for the host
669 * @hpriv: ahci-host private data for the host
670 * @pi_template: template for the ata_port_info to use
671 * @sht: scsi_host_template to use when registering
672 *
673 * This function does all the usual steps needed to bring up an
674 * ahci-platform host, note any necessary resources (ie clks, phys, etc.)
675 * must be initialized / enabled before calling this.
676 *
677 * RETURNS:
678 * 0 on success otherwise a negative error code
679 */
680int ahci_platform_init_host(struct platform_device *pdev,
681			    struct ahci_host_priv *hpriv,
682			    const struct ata_port_info *pi_template,
683			    struct scsi_host_template *sht)
684{
685	struct device *dev = &pdev->dev;
686	struct ata_port_info pi = *pi_template;
687	const struct ata_port_info *ppi[] = { &pi, NULL };
688	struct ata_host *host;
689	int i, irq, n_ports, rc;
690
691	irq = platform_get_irq(pdev, 0);
692	if (irq < 0)
 
 
693		return irq;
694	if (!irq)
695		return -EINVAL;
696
697	hpriv->irq = irq;
698
699	/* prepare host */
700	pi.private_data = (void *)(unsigned long)hpriv->flags;
701
702	ahci_save_initial_config(dev, hpriv);
703
704	if (hpriv->cap & HOST_CAP_NCQ)
705		pi.flags |= ATA_FLAG_NCQ;
706
707	if (hpriv->cap & HOST_CAP_PMP)
708		pi.flags |= ATA_FLAG_PMP;
709
710	ahci_set_em_messages(hpriv, &pi);
711
712	/* CAP.NP sometimes indicate the index of the last enabled
713	 * port, at other times, that of the last possible port, so
714	 * determining the maximum port number requires looking at
715	 * both CAP.NP and port_map.
716	 */
717	n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map));
718
719	host = ata_host_alloc_pinfo(dev, ppi, n_ports);
720	if (!host)
721		return -ENOMEM;
722
723	host->private_data = hpriv;
724
725	if (!(hpriv->cap & HOST_CAP_SSS) || ahci_ignore_sss)
726		host->flags |= ATA_HOST_PARALLEL_SCAN;
727	else
728		dev_info(dev, "SSS flag set, parallel bus scan disabled\n");
729
730	if (pi.flags & ATA_FLAG_EM)
731		ahci_reset_em(host);
732
733	for (i = 0; i < host->n_ports; i++) {
734		struct ata_port *ap = host->ports[i];
735
736		ata_port_desc(ap, "mmio %pR",
737			      platform_get_resource(pdev, IORESOURCE_MEM, 0));
738		ata_port_desc(ap, "port 0x%x", 0x100 + ap->port_no * 0x80);
739
740		/* set enclosure management message type */
741		if (ap->flags & ATA_FLAG_EM)
742			ap->em_message_type = hpriv->em_msg_type;
743
744		/* disabled/not-implemented port */
745		if (!(hpriv->port_map & (1 << i)))
746			ap->ops = &ata_dummy_port_ops;
747	}
748
749	if (hpriv->cap & HOST_CAP_64) {
750		rc = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(64));
751		if (rc) {
752			dev_err(dev, "Failed to enable 64-bit DMA.\n");
753			return rc;
 
 
 
 
 
754		}
755	}
756
757	rc = ahci_reset_controller(host);
758	if (rc)
759		return rc;
760
761	ahci_init_controller(host);
762	ahci_print_info(host, "platform");
763
764	return ahci_host_activate(host, sht);
765}
766EXPORT_SYMBOL_GPL(ahci_platform_init_host);
767
768static void ahci_host_stop(struct ata_host *host)
769{
770	struct ahci_host_priv *hpriv = host->private_data;
771
772	ahci_platform_disable_resources(hpriv);
773}
774
775/**
776 * ahci_platform_shutdown - Disable interrupts and stop DMA for host ports
777 * @pdev: platform device pointer for the host
778 *
779 * This function is called during system shutdown and performs the minimal
780 * deconfiguration required to ensure that an ahci_platform host cannot
781 * corrupt or otherwise interfere with a new kernel being started with kexec.
782 */
783void ahci_platform_shutdown(struct platform_device *pdev)
784{
785	struct ata_host *host = platform_get_drvdata(pdev);
786	struct ahci_host_priv *hpriv = host->private_data;
787	void __iomem *mmio = hpriv->mmio;
788	int i;
789
790	for (i = 0; i < host->n_ports; i++) {
791		struct ata_port *ap = host->ports[i];
792
793		/* Disable port interrupts */
794		if (ap->ops->freeze)
795			ap->ops->freeze(ap);
796
797		/* Stop the port DMA engines */
798		if (ap->ops->port_stop)
799			ap->ops->port_stop(ap);
800	}
801
802	/* Disable and clear host interrupts */
803	writel(readl(mmio + HOST_CTL) & ~HOST_IRQ_EN, mmio + HOST_CTL);
804	readl(mmio + HOST_CTL); /* flush */
805	writel(GENMASK(host->n_ports, 0), mmio + HOST_IRQ_STAT);
806}
807EXPORT_SYMBOL_GPL(ahci_platform_shutdown);
808
809#ifdef CONFIG_PM_SLEEP
810/**
811 * ahci_platform_suspend_host - Suspend an ahci-platform host
812 * @dev: device pointer for the host
813 *
814 * This function does all the usual steps needed to suspend an
815 * ahci-platform host, note any necessary resources (ie clks, phys, etc.)
816 * must be disabled after calling this.
817 *
818 * RETURNS:
819 * 0 on success otherwise a negative error code
820 */
821int ahci_platform_suspend_host(struct device *dev)
822{
823	struct ata_host *host = dev_get_drvdata(dev);
824	struct ahci_host_priv *hpriv = host->private_data;
825	void __iomem *mmio = hpriv->mmio;
826	u32 ctl;
827
828	if (hpriv->flags & AHCI_HFLAG_NO_SUSPEND) {
829		dev_err(dev, "firmware update required for suspend/resume\n");
830		return -EIO;
831	}
832
833	/*
834	 * AHCI spec rev1.1 section 8.3.3:
835	 * Software must disable interrupts prior to requesting a
836	 * transition of the HBA to D3 state.
837	 */
838	ctl = readl(mmio + HOST_CTL);
839	ctl &= ~HOST_IRQ_EN;
840	writel(ctl, mmio + HOST_CTL);
841	readl(mmio + HOST_CTL); /* flush */
842
843	if (hpriv->flags & AHCI_HFLAG_SUSPEND_PHYS)
844		ahci_platform_disable_phys(hpriv);
845
846	ata_host_suspend(host, PMSG_SUSPEND);
847	return 0;
848}
849EXPORT_SYMBOL_GPL(ahci_platform_suspend_host);
850
851/**
852 * ahci_platform_resume_host - Resume an ahci-platform host
853 * @dev: device pointer for the host
854 *
855 * This function does all the usual steps needed to resume an ahci-platform
856 * host, note any necessary resources (ie clks, phys, etc.)  must be
857 * initialized / enabled before calling this.
858 *
859 * RETURNS:
860 * 0 on success otherwise a negative error code
861 */
862int ahci_platform_resume_host(struct device *dev)
863{
864	struct ata_host *host = dev_get_drvdata(dev);
865	struct ahci_host_priv *hpriv = host->private_data;
866	int rc;
867
868	if (dev->power.power_state.event == PM_EVENT_SUSPEND) {
869		rc = ahci_reset_controller(host);
870		if (rc)
871			return rc;
872
873		ahci_init_controller(host);
874	}
875
876	if (hpriv->flags & AHCI_HFLAG_SUSPEND_PHYS)
877		ahci_platform_enable_phys(hpriv);
878
879	ata_host_resume(host);
880
881	return 0;
882}
883EXPORT_SYMBOL_GPL(ahci_platform_resume_host);
884
885/**
886 * ahci_platform_suspend - Suspend an ahci-platform device
887 * @dev: the platform device to suspend
888 *
889 * This function suspends the host associated with the device, followed by
890 * disabling all the resources of the device.
891 *
892 * RETURNS:
893 * 0 on success otherwise a negative error code
894 */
895int ahci_platform_suspend(struct device *dev)
896{
897	struct ata_host *host = dev_get_drvdata(dev);
898	struct ahci_host_priv *hpriv = host->private_data;
899	int rc;
900
901	rc = ahci_platform_suspend_host(dev);
902	if (rc)
903		return rc;
904
905	ahci_platform_disable_resources(hpriv);
906
907	return 0;
908}
909EXPORT_SYMBOL_GPL(ahci_platform_suspend);
910
911/**
912 * ahci_platform_resume - Resume an ahci-platform device
913 * @dev: the platform device to resume
914 *
915 * This function enables all the resources of the device followed by
916 * resuming the host associated with the device.
917 *
918 * RETURNS:
919 * 0 on success otherwise a negative error code
920 */
921int ahci_platform_resume(struct device *dev)
922{
923	struct ata_host *host = dev_get_drvdata(dev);
924	struct ahci_host_priv *hpriv = host->private_data;
925	int rc;
926
927	rc = ahci_platform_enable_resources(hpriv);
928	if (rc)
929		return rc;
930
931	rc = ahci_platform_resume_host(dev);
932	if (rc)
933		goto disable_resources;
934
935	/* We resumed so update PM runtime state */
936	pm_runtime_disable(dev);
937	pm_runtime_set_active(dev);
938	pm_runtime_enable(dev);
939
940	return 0;
941
942disable_resources:
943	ahci_platform_disable_resources(hpriv);
944
945	return rc;
946}
947EXPORT_SYMBOL_GPL(ahci_platform_resume);
948#endif
949
950MODULE_DESCRIPTION("AHCI SATA platform library");
951MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>");
952MODULE_LICENSE("GPL");
v5.4
  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * AHCI SATA platform library
  4 *
  5 * Copyright 2004-2005  Red Hat, Inc.
  6 *   Jeff Garzik <jgarzik@pobox.com>
  7 * Copyright 2010  MontaVista Software, LLC.
  8 *   Anton Vorontsov <avorontsov@ru.mvista.com>
  9 */
 10
 11#include <linux/clk.h>
 12#include <linux/kernel.h>
 13#include <linux/gfp.h>
 14#include <linux/module.h>
 15#include <linux/pm.h>
 16#include <linux/interrupt.h>
 17#include <linux/device.h>
 18#include <linux/platform_device.h>
 19#include <linux/libata.h>
 20#include <linux/ahci_platform.h>
 21#include <linux/phy/phy.h>
 22#include <linux/pm_runtime.h>
 23#include <linux/of_platform.h>
 24#include <linux/reset.h>
 25#include "ahci.h"
 26
 27static void ahci_host_stop(struct ata_host *host);
 28
 29struct ata_port_operations ahci_platform_ops = {
 30	.inherits	= &ahci_ops,
 31	.host_stop	= ahci_host_stop,
 32};
 33EXPORT_SYMBOL_GPL(ahci_platform_ops);
 34
 35/**
 36 * ahci_platform_enable_phys - Enable PHYs
 37 * @hpriv: host private area to store config values
 38 *
 39 * This function enables all the PHYs found in hpriv->phys, if any.
 40 * If a PHY fails to be enabled, it disables all the PHYs already
 41 * enabled in reverse order and returns an error.
 42 *
 43 * RETURNS:
 44 * 0 on success otherwise a negative error code
 45 */
 46static int ahci_platform_enable_phys(struct ahci_host_priv *hpriv)
 47{
 48	int rc, i;
 49
 50	for (i = 0; i < hpriv->nports; i++) {
 51		rc = phy_init(hpriv->phys[i]);
 52		if (rc)
 53			goto disable_phys;
 54
 55		rc = phy_set_mode(hpriv->phys[i], PHY_MODE_SATA);
 56		if (rc) {
 57			phy_exit(hpriv->phys[i]);
 58			goto disable_phys;
 59		}
 60
 61		rc = phy_power_on(hpriv->phys[i]);
 62		if (rc) {
 63			phy_exit(hpriv->phys[i]);
 64			goto disable_phys;
 65		}
 66	}
 67
 68	return 0;
 69
 70disable_phys:
 71	while (--i >= 0) {
 72		phy_power_off(hpriv->phys[i]);
 73		phy_exit(hpriv->phys[i]);
 74	}
 75	return rc;
 76}
 
 77
 78/**
 79 * ahci_platform_disable_phys - Disable PHYs
 80 * @hpriv: host private area to store config values
 81 *
 82 * This function disables all PHYs found in hpriv->phys.
 83 */
 84static void ahci_platform_disable_phys(struct ahci_host_priv *hpriv)
 85{
 86	int i;
 87
 88	for (i = 0; i < hpriv->nports; i++) {
 89		phy_power_off(hpriv->phys[i]);
 90		phy_exit(hpriv->phys[i]);
 91	}
 92}
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 93
 94/**
 95 * ahci_platform_enable_clks - Enable platform clocks
 96 * @hpriv: host private area to store config values
 97 *
 98 * This function enables all the clks found in hpriv->clks, starting at
 99 * index 0. If any clk fails to enable it disables all the clks already
100 * enabled in reverse order, and then returns an error.
101 *
102 * RETURNS:
103 * 0 on success otherwise a negative error code
104 */
105int ahci_platform_enable_clks(struct ahci_host_priv *hpriv)
106{
107	int c, rc;
108
109	for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++) {
110		rc = clk_prepare_enable(hpriv->clks[c]);
111		if (rc)
112			goto disable_unprepare_clk;
113	}
114	return 0;
115
116disable_unprepare_clk:
117	while (--c >= 0)
118		clk_disable_unprepare(hpriv->clks[c]);
119	return rc;
120}
121EXPORT_SYMBOL_GPL(ahci_platform_enable_clks);
122
123/**
124 * ahci_platform_disable_clks - Disable platform clocks
125 * @hpriv: host private area to store config values
126 *
127 * This function disables all the clks found in hpriv->clks, in reverse
128 * order of ahci_platform_enable_clks (starting at the end of the array).
 
129 */
130void ahci_platform_disable_clks(struct ahci_host_priv *hpriv)
131{
132	int c;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
133
134	for (c = AHCI_MAX_CLKS - 1; c >= 0; c--)
135		if (hpriv->clks[c])
136			clk_disable_unprepare(hpriv->clks[c]);
137}
138EXPORT_SYMBOL_GPL(ahci_platform_disable_clks);
139
140/**
141 * ahci_platform_enable_regulators - Enable regulators
142 * @hpriv: host private area to store config values
143 *
144 * This function enables all the regulators found in controller and
145 * hpriv->target_pwrs, if any.  If a regulator fails to be enabled, it
146 * disables all the regulators already enabled in reverse order and
147 * returns an error.
148 *
149 * RETURNS:
150 * 0 on success otherwise a negative error code
151 */
152int ahci_platform_enable_regulators(struct ahci_host_priv *hpriv)
153{
154	int rc, i;
155
156	rc = regulator_enable(hpriv->ahci_regulator);
157	if (rc)
158		return rc;
159
160	rc = regulator_enable(hpriv->phy_regulator);
161	if (rc)
162		goto disable_ahci_pwrs;
163
164	for (i = 0; i < hpriv->nports; i++) {
165		if (!hpriv->target_pwrs[i])
166			continue;
167
168		rc = regulator_enable(hpriv->target_pwrs[i]);
169		if (rc)
170			goto disable_target_pwrs;
171	}
172
173	return 0;
174
175disable_target_pwrs:
176	while (--i >= 0)
177		if (hpriv->target_pwrs[i])
178			regulator_disable(hpriv->target_pwrs[i]);
179
180	regulator_disable(hpriv->phy_regulator);
181disable_ahci_pwrs:
182	regulator_disable(hpriv->ahci_regulator);
183	return rc;
184}
185EXPORT_SYMBOL_GPL(ahci_platform_enable_regulators);
186
187/**
188 * ahci_platform_disable_regulators - Disable regulators
189 * @hpriv: host private area to store config values
190 *
191 * This function disables all regulators found in hpriv->target_pwrs and
192 * AHCI controller.
193 */
194void ahci_platform_disable_regulators(struct ahci_host_priv *hpriv)
195{
196	int i;
197
198	for (i = 0; i < hpriv->nports; i++) {
199		if (!hpriv->target_pwrs[i])
200			continue;
201		regulator_disable(hpriv->target_pwrs[i]);
202	}
203
204	regulator_disable(hpriv->ahci_regulator);
205	regulator_disable(hpriv->phy_regulator);
206}
207EXPORT_SYMBOL_GPL(ahci_platform_disable_regulators);
208/**
209 * ahci_platform_enable_resources - Enable platform resources
210 * @hpriv: host private area to store config values
211 *
212 * This function enables all ahci_platform managed resources in the
213 * following order:
214 * 1) Regulator
215 * 2) Clocks (through ahci_platform_enable_clks)
216 * 3) Resets
217 * 4) Phys
218 *
219 * If resource enabling fails at any point the previous enabled resources
220 * are disabled in reverse order.
221 *
222 * RETURNS:
223 * 0 on success otherwise a negative error code
224 */
225int ahci_platform_enable_resources(struct ahci_host_priv *hpriv)
226{
227	int rc;
228
229	rc = ahci_platform_enable_regulators(hpriv);
230	if (rc)
231		return rc;
232
233	rc = ahci_platform_enable_clks(hpriv);
234	if (rc)
235		goto disable_regulator;
236
237	rc = reset_control_deassert(hpriv->rsts);
238	if (rc)
239		goto disable_clks;
240
241	rc = ahci_platform_enable_phys(hpriv);
242	if (rc)
243		goto disable_resets;
244
245	return 0;
246
247disable_resets:
248	reset_control_assert(hpriv->rsts);
249
250disable_clks:
251	ahci_platform_disable_clks(hpriv);
252
253disable_regulator:
254	ahci_platform_disable_regulators(hpriv);
255
256	return rc;
257}
258EXPORT_SYMBOL_GPL(ahci_platform_enable_resources);
259
260/**
261 * ahci_platform_disable_resources - Disable platform resources
262 * @hpriv: host private area to store config values
263 *
264 * This function disables all ahci_platform managed resources in the
265 * following order:
266 * 1) Phys
267 * 2) Resets
268 * 3) Clocks (through ahci_platform_disable_clks)
269 * 4) Regulator
270 */
271void ahci_platform_disable_resources(struct ahci_host_priv *hpriv)
272{
273	ahci_platform_disable_phys(hpriv);
274
275	reset_control_assert(hpriv->rsts);
276
277	ahci_platform_disable_clks(hpriv);
278
279	ahci_platform_disable_regulators(hpriv);
280}
281EXPORT_SYMBOL_GPL(ahci_platform_disable_resources);
282
283static void ahci_platform_put_resources(struct device *dev, void *res)
284{
285	struct ahci_host_priv *hpriv = res;
286	int c;
287
288	if (hpriv->got_runtime_pm) {
289		pm_runtime_put_sync(dev);
290		pm_runtime_disable(dev);
291	}
292
293	for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++)
294		clk_put(hpriv->clks[c]);
295	/*
296	 * The regulators are tied to child node device and not to the
297	 * SATA device itself. So we can't use devm for automatically
298	 * releasing them. We have to do it manually here.
299	 */
300	for (c = 0; c < hpriv->nports; c++)
301		if (hpriv->target_pwrs && hpriv->target_pwrs[c])
302			regulator_put(hpriv->target_pwrs[c]);
303
304	kfree(hpriv->target_pwrs);
305}
306
307static int ahci_platform_get_phy(struct ahci_host_priv *hpriv, u32 port,
308				struct device *dev, struct device_node *node)
309{
310	int rc;
311
312	hpriv->phys[port] = devm_of_phy_get(dev, node, NULL);
313
314	if (!IS_ERR(hpriv->phys[port]))
315		return 0;
316
317	rc = PTR_ERR(hpriv->phys[port]);
318	switch (rc) {
319	case -ENOSYS:
320		/* No PHY support. Check if PHY is required. */
321		if (of_find_property(node, "phys", NULL)) {
322			dev_err(dev,
323				"couldn't get PHY in node %pOFn: ENOSYS\n",
324				node);
325			break;
326		}
327		/* fall through */
328	case -ENODEV:
329		/* continue normally */
330		hpriv->phys[port] = NULL;
331		rc = 0;
332		break;
333	case -EPROBE_DEFER:
334		/* Do not complain yet */
335		break;
336
337	default:
338		dev_err(dev,
339			"couldn't get PHY in node %pOFn: %d\n",
340			node, rc);
341
342		break;
343	}
344
345	return rc;
346}
347
348static int ahci_platform_get_regulator(struct ahci_host_priv *hpriv, u32 port,
349				struct device *dev)
350{
351	struct regulator *target_pwr;
352	int rc = 0;
353
354	target_pwr = regulator_get(dev, "target");
355
356	if (!IS_ERR(target_pwr))
357		hpriv->target_pwrs[port] = target_pwr;
358	else
359		rc = PTR_ERR(target_pwr);
360
361	return rc;
362}
363
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
364/**
365 * ahci_platform_get_resources - Get platform resources
366 * @pdev: platform device to get resources for
367 * @flags: bitmap representing the resource to get
368 *
369 * This function allocates an ahci_host_priv struct, and gets the following
370 * resources, storing a reference to them inside the returned struct:
371 *
372 * 1) mmio registers (IORESOURCE_MEM 0, mandatory)
373 * 2) regulator for controlling the targets power (optional)
374 *    regulator for controlling the AHCI controller (optional)
375 * 3) 0 - AHCI_MAX_CLKS clocks, as specified in the devs devicetree node,
376 *    or for non devicetree enabled platforms a single clock
377 * 4) resets, if flags has AHCI_PLATFORM_GET_RESETS (optional)
378 * 5) phys (optional)
379 *
380 * RETURNS:
381 * The allocated ahci_host_priv on success, otherwise an ERR_PTR value
382 */
383struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev,
384						   unsigned int flags)
385{
 
386	struct device *dev = &pdev->dev;
387	struct ahci_host_priv *hpriv;
388	struct clk *clk;
389	struct device_node *child;
390	int i, enabled_ports = 0, rc = -ENOMEM, child_nodes;
391	u32 mask_port_map = 0;
392
393	if (!devres_open_group(dev, NULL, GFP_KERNEL))
394		return ERR_PTR(-ENOMEM);
395
396	hpriv = devres_alloc(ahci_platform_put_resources, sizeof(*hpriv),
397			     GFP_KERNEL);
398	if (!hpriv)
399		goto err_out;
400
401	devres_add(dev, hpriv);
402
403	hpriv->mmio = devm_ioremap_resource(dev,
404			      platform_get_resource(pdev, IORESOURCE_MEM, 0));
 
 
 
 
 
 
405	if (IS_ERR(hpriv->mmio)) {
406		rc = PTR_ERR(hpriv->mmio);
407		goto err_out;
408	}
409
410	for (i = 0; i < AHCI_MAX_CLKS; i++) {
 
 
 
 
 
 
 
 
 
 
 
 
 
 
411		/*
412		 * For now we must use clk_get(dev, NULL) for the first clock,
413		 * because some platforms (da850, spear13xx) are not yet
414		 * converted to use devicetree for clocks.  For new platforms
415		 * this is equivalent to of_clk_get(dev->of_node, 0).
416		 */
417		if (i == 0)
418			clk = clk_get(dev, NULL);
419		else
420			clk = of_clk_get(dev->of_node, i);
421
422		if (IS_ERR(clk)) {
423			rc = PTR_ERR(clk);
424			if (rc == -EPROBE_DEFER)
425				goto err_out;
426			break;
 
 
427		}
428		hpriv->clks[i] = clk;
429	}
430
431	hpriv->ahci_regulator = devm_regulator_get(dev, "ahci");
432	if (IS_ERR(hpriv->ahci_regulator)) {
433		rc = PTR_ERR(hpriv->ahci_regulator);
434		if (rc != 0)
435			goto err_out;
436	}
437
438	hpriv->phy_regulator = devm_regulator_get(dev, "phy");
439	if (IS_ERR(hpriv->phy_regulator)) {
440		rc = PTR_ERR(hpriv->phy_regulator);
441		if (rc == -EPROBE_DEFER)
442			goto err_out;
443		rc = 0;
444		hpriv->phy_regulator = NULL;
445	}
446
447	if (flags & AHCI_PLATFORM_GET_RESETS) {
448		hpriv->rsts = devm_reset_control_array_get_optional_shared(dev);
449		if (IS_ERR(hpriv->rsts)) {
450			rc = PTR_ERR(hpriv->rsts);
451			goto err_out;
452		}
 
 
453	}
454
455	hpriv->nports = child_nodes = of_get_child_count(dev->of_node);
 
 
 
 
 
 
 
 
456
457	/*
458	 * If no sub-node was found, we still need to set nports to
459	 * one in order to be able to use the
460	 * ahci_platform_[en|dis]able_[phys|regulators] functions.
461	 */
462	if (!child_nodes)
 
 
463		hpriv->nports = 1;
464
465	hpriv->phys = devm_kcalloc(dev, hpriv->nports, sizeof(*hpriv->phys), GFP_KERNEL);
466	if (!hpriv->phys) {
467		rc = -ENOMEM;
468		goto err_out;
469	}
470	/*
471	 * We cannot use devm_ here, since ahci_platform_put_resources() uses
472	 * target_pwrs after devm_ have freed memory
473	 */
474	hpriv->target_pwrs = kcalloc(hpriv->nports, sizeof(*hpriv->target_pwrs), GFP_KERNEL);
475	if (!hpriv->target_pwrs) {
476		rc = -ENOMEM;
477		goto err_out;
478	}
479
480	if (child_nodes) {
481		for_each_child_of_node(dev->of_node, child) {
482			u32 port;
483			struct platform_device *port_dev __maybe_unused;
484
485			if (!of_device_is_available(child))
486				continue;
487
488			if (of_property_read_u32(child, "reg", &port)) {
489				rc = -EINVAL;
490				of_node_put(child);
491				goto err_out;
492			}
493
494			if (port >= hpriv->nports) {
495				dev_warn(dev, "invalid port number %d\n", port);
496				continue;
497			}
498			mask_port_map |= BIT(port);
499
500#ifdef CONFIG_OF_ADDRESS
501			of_platform_device_create(child, NULL, NULL);
502
503			port_dev = of_find_device_by_node(child);
504
505			if (port_dev) {
506				rc = ahci_platform_get_regulator(hpriv, port,
507								&port_dev->dev);
508				if (rc == -EPROBE_DEFER) {
509					of_node_put(child);
510					goto err_out;
511				}
512			}
513#endif
514
515			rc = ahci_platform_get_phy(hpriv, port, dev, child);
516			if (rc) {
517				of_node_put(child);
518				goto err_out;
519			}
520
521			enabled_ports++;
522		}
523		if (!enabled_ports) {
524			dev_warn(dev, "No port enabled\n");
525			rc = -ENODEV;
526			goto err_out;
527		}
528
529		if (!hpriv->mask_port_map)
530			hpriv->mask_port_map = mask_port_map;
531	} else {
532		/*
533		 * If no sub-node was found, keep this for device tree
534		 * compatibility
535		 */
536		rc = ahci_platform_get_phy(hpriv, 0, dev, dev->of_node);
537		if (rc)
538			goto err_out;
539
540		rc = ahci_platform_get_regulator(hpriv, 0, dev);
541		if (rc == -EPROBE_DEFER)
542			goto err_out;
543	}
 
 
 
 
 
 
 
 
 
544	pm_runtime_enable(dev);
545	pm_runtime_get_sync(dev);
546	hpriv->got_runtime_pm = true;
547
548	devres_remove_group(dev, NULL);
549	return hpriv;
550
551err_out:
552	devres_release_group(dev, NULL);
553	return ERR_PTR(rc);
554}
555EXPORT_SYMBOL_GPL(ahci_platform_get_resources);
556
557/**
558 * ahci_platform_init_host - Bring up an ahci-platform host
559 * @pdev: platform device pointer for the host
560 * @hpriv: ahci-host private data for the host
561 * @pi_template: template for the ata_port_info to use
562 * @sht: scsi_host_template to use when registering
563 *
564 * This function does all the usual steps needed to bring up an
565 * ahci-platform host, note any necessary resources (ie clks, phys, etc.)
566 * must be initialized / enabled before calling this.
567 *
568 * RETURNS:
569 * 0 on success otherwise a negative error code
570 */
571int ahci_platform_init_host(struct platform_device *pdev,
572			    struct ahci_host_priv *hpriv,
573			    const struct ata_port_info *pi_template,
574			    struct scsi_host_template *sht)
575{
576	struct device *dev = &pdev->dev;
577	struct ata_port_info pi = *pi_template;
578	const struct ata_port_info *ppi[] = { &pi, NULL };
579	struct ata_host *host;
580	int i, irq, n_ports, rc;
581
582	irq = platform_get_irq(pdev, 0);
583	if (irq <= 0) {
584		if (irq != -EPROBE_DEFER)
585			dev_err(dev, "no irq\n");
586		return irq;
587	}
 
588
589	hpriv->irq = irq;
590
591	/* prepare host */
592	pi.private_data = (void *)(unsigned long)hpriv->flags;
593
594	ahci_save_initial_config(dev, hpriv);
595
596	if (hpriv->cap & HOST_CAP_NCQ)
597		pi.flags |= ATA_FLAG_NCQ;
598
599	if (hpriv->cap & HOST_CAP_PMP)
600		pi.flags |= ATA_FLAG_PMP;
601
602	ahci_set_em_messages(hpriv, &pi);
603
604	/* CAP.NP sometimes indicate the index of the last enabled
605	 * port, at other times, that of the last possible port, so
606	 * determining the maximum port number requires looking at
607	 * both CAP.NP and port_map.
608	 */
609	n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map));
610
611	host = ata_host_alloc_pinfo(dev, ppi, n_ports);
612	if (!host)
613		return -ENOMEM;
614
615	host->private_data = hpriv;
616
617	if (!(hpriv->cap & HOST_CAP_SSS) || ahci_ignore_sss)
618		host->flags |= ATA_HOST_PARALLEL_SCAN;
619	else
620		dev_info(dev, "SSS flag set, parallel bus scan disabled\n");
621
622	if (pi.flags & ATA_FLAG_EM)
623		ahci_reset_em(host);
624
625	for (i = 0; i < host->n_ports; i++) {
626		struct ata_port *ap = host->ports[i];
627
628		ata_port_desc(ap, "mmio %pR",
629			      platform_get_resource(pdev, IORESOURCE_MEM, 0));
630		ata_port_desc(ap, "port 0x%x", 0x100 + ap->port_no * 0x80);
631
632		/* set enclosure management message type */
633		if (ap->flags & ATA_FLAG_EM)
634			ap->em_message_type = hpriv->em_msg_type;
635
636		/* disabled/not-implemented port */
637		if (!(hpriv->port_map & (1 << i)))
638			ap->ops = &ata_dummy_port_ops;
639	}
640
641	if (hpriv->cap & HOST_CAP_64) {
642		rc = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(64));
643		if (rc) {
644			rc = dma_coerce_mask_and_coherent(dev,
645							  DMA_BIT_MASK(32));
646			if (rc) {
647				dev_err(dev, "Failed to enable 64-bit DMA.\n");
648				return rc;
649			}
650			dev_warn(dev, "Enable 32-bit DMA instead of 64-bit.\n");
651		}
652	}
653
654	rc = ahci_reset_controller(host);
655	if (rc)
656		return rc;
657
658	ahci_init_controller(host);
659	ahci_print_info(host, "platform");
660
661	return ahci_host_activate(host, sht);
662}
663EXPORT_SYMBOL_GPL(ahci_platform_init_host);
664
665static void ahci_host_stop(struct ata_host *host)
666{
667	struct ahci_host_priv *hpriv = host->private_data;
668
669	ahci_platform_disable_resources(hpriv);
670}
671
672/**
673 * ahci_platform_shutdown - Disable interrupts and stop DMA for host ports
674 * @pdev: platform device pointer for the host
675 *
676 * This function is called during system shutdown and performs the minimal
677 * deconfiguration required to ensure that an ahci_platform host cannot
678 * corrupt or otherwise interfere with a new kernel being started with kexec.
679 */
680void ahci_platform_shutdown(struct platform_device *pdev)
681{
682	struct ata_host *host = platform_get_drvdata(pdev);
683	struct ahci_host_priv *hpriv = host->private_data;
684	void __iomem *mmio = hpriv->mmio;
685	int i;
686
687	for (i = 0; i < host->n_ports; i++) {
688		struct ata_port *ap = host->ports[i];
689
690		/* Disable port interrupts */
691		if (ap->ops->freeze)
692			ap->ops->freeze(ap);
693
694		/* Stop the port DMA engines */
695		if (ap->ops->port_stop)
696			ap->ops->port_stop(ap);
697	}
698
699	/* Disable and clear host interrupts */
700	writel(readl(mmio + HOST_CTL) & ~HOST_IRQ_EN, mmio + HOST_CTL);
701	readl(mmio + HOST_CTL); /* flush */
702	writel(GENMASK(host->n_ports, 0), mmio + HOST_IRQ_STAT);
703}
704EXPORT_SYMBOL_GPL(ahci_platform_shutdown);
705
706#ifdef CONFIG_PM_SLEEP
707/**
708 * ahci_platform_suspend_host - Suspend an ahci-platform host
709 * @dev: device pointer for the host
710 *
711 * This function does all the usual steps needed to suspend an
712 * ahci-platform host, note any necessary resources (ie clks, phys, etc.)
713 * must be disabled after calling this.
714 *
715 * RETURNS:
716 * 0 on success otherwise a negative error code
717 */
718int ahci_platform_suspend_host(struct device *dev)
719{
720	struct ata_host *host = dev_get_drvdata(dev);
721	struct ahci_host_priv *hpriv = host->private_data;
722	void __iomem *mmio = hpriv->mmio;
723	u32 ctl;
724
725	if (hpriv->flags & AHCI_HFLAG_NO_SUSPEND) {
726		dev_err(dev, "firmware update required for suspend/resume\n");
727		return -EIO;
728	}
729
730	/*
731	 * AHCI spec rev1.1 section 8.3.3:
732	 * Software must disable interrupts prior to requesting a
733	 * transition of the HBA to D3 state.
734	 */
735	ctl = readl(mmio + HOST_CTL);
736	ctl &= ~HOST_IRQ_EN;
737	writel(ctl, mmio + HOST_CTL);
738	readl(mmio + HOST_CTL); /* flush */
739
740	if (hpriv->flags & AHCI_HFLAG_SUSPEND_PHYS)
741		ahci_platform_disable_phys(hpriv);
742
743	return ata_host_suspend(host, PMSG_SUSPEND);
 
744}
745EXPORT_SYMBOL_GPL(ahci_platform_suspend_host);
746
747/**
748 * ahci_platform_resume_host - Resume an ahci-platform host
749 * @dev: device pointer for the host
750 *
751 * This function does all the usual steps needed to resume an ahci-platform
752 * host, note any necessary resources (ie clks, phys, etc.)  must be
753 * initialized / enabled before calling this.
754 *
755 * RETURNS:
756 * 0 on success otherwise a negative error code
757 */
758int ahci_platform_resume_host(struct device *dev)
759{
760	struct ata_host *host = dev_get_drvdata(dev);
761	struct ahci_host_priv *hpriv = host->private_data;
762	int rc;
763
764	if (dev->power.power_state.event == PM_EVENT_SUSPEND) {
765		rc = ahci_reset_controller(host);
766		if (rc)
767			return rc;
768
769		ahci_init_controller(host);
770	}
771
772	if (hpriv->flags & AHCI_HFLAG_SUSPEND_PHYS)
773		ahci_platform_enable_phys(hpriv);
774
775	ata_host_resume(host);
776
777	return 0;
778}
779EXPORT_SYMBOL_GPL(ahci_platform_resume_host);
780
781/**
782 * ahci_platform_suspend - Suspend an ahci-platform device
783 * @dev: the platform device to suspend
784 *
785 * This function suspends the host associated with the device, followed by
786 * disabling all the resources of the device.
787 *
788 * RETURNS:
789 * 0 on success otherwise a negative error code
790 */
791int ahci_platform_suspend(struct device *dev)
792{
793	struct ata_host *host = dev_get_drvdata(dev);
794	struct ahci_host_priv *hpriv = host->private_data;
795	int rc;
796
797	rc = ahci_platform_suspend_host(dev);
798	if (rc)
799		return rc;
800
801	ahci_platform_disable_resources(hpriv);
802
803	return 0;
804}
805EXPORT_SYMBOL_GPL(ahci_platform_suspend);
806
807/**
808 * ahci_platform_resume - Resume an ahci-platform device
809 * @dev: the platform device to resume
810 *
811 * This function enables all the resources of the device followed by
812 * resuming the host associated with the device.
813 *
814 * RETURNS:
815 * 0 on success otherwise a negative error code
816 */
817int ahci_platform_resume(struct device *dev)
818{
819	struct ata_host *host = dev_get_drvdata(dev);
820	struct ahci_host_priv *hpriv = host->private_data;
821	int rc;
822
823	rc = ahci_platform_enable_resources(hpriv);
824	if (rc)
825		return rc;
826
827	rc = ahci_platform_resume_host(dev);
828	if (rc)
829		goto disable_resources;
830
831	/* We resumed so update PM runtime state */
832	pm_runtime_disable(dev);
833	pm_runtime_set_active(dev);
834	pm_runtime_enable(dev);
835
836	return 0;
837
838disable_resources:
839	ahci_platform_disable_resources(hpriv);
840
841	return rc;
842}
843EXPORT_SYMBOL_GPL(ahci_platform_resume);
844#endif
845
846MODULE_DESCRIPTION("AHCI SATA platform library");
847MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>");
848MODULE_LICENSE("GPL");