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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * udc.c - ChipIdea UDC driver
4 *
5 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
6 *
7 * Author: David Lopo
8 */
9
10#include <linux/delay.h>
11#include <linux/device.h>
12#include <linux/dmapool.h>
13#include <linux/err.h>
14#include <linux/irqreturn.h>
15#include <linux/kernel.h>
16#include <linux/slab.h>
17#include <linux/pm_runtime.h>
18#include <linux/pinctrl/consumer.h>
19#include <linux/usb/ch9.h>
20#include <linux/usb/gadget.h>
21#include <linux/usb/otg-fsm.h>
22#include <linux/usb/chipidea.h>
23
24#include "ci.h"
25#include "udc.h"
26#include "bits.h"
27#include "otg.h"
28#include "otg_fsm.h"
29#include "trace.h"
30
31/* control endpoint description */
32static const struct usb_endpoint_descriptor
33ctrl_endpt_out_desc = {
34 .bLength = USB_DT_ENDPOINT_SIZE,
35 .bDescriptorType = USB_DT_ENDPOINT,
36
37 .bEndpointAddress = USB_DIR_OUT,
38 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
39 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
40};
41
42static const struct usb_endpoint_descriptor
43ctrl_endpt_in_desc = {
44 .bLength = USB_DT_ENDPOINT_SIZE,
45 .bDescriptorType = USB_DT_ENDPOINT,
46
47 .bEndpointAddress = USB_DIR_IN,
48 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
49 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
50};
51
52static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
53 struct td_node *node);
54/**
55 * hw_ep_bit: calculates the bit number
56 * @num: endpoint number
57 * @dir: endpoint direction
58 *
59 * This function returns bit number
60 */
61static inline int hw_ep_bit(int num, int dir)
62{
63 return num + ((dir == TX) ? 16 : 0);
64}
65
66static inline int ep_to_bit(struct ci_hdrc *ci, int n)
67{
68 int fill = 16 - ci->hw_ep_max / 2;
69
70 if (n >= ci->hw_ep_max / 2)
71 n += fill;
72
73 return n;
74}
75
76/**
77 * hw_device_state: enables/disables interrupts (execute without interruption)
78 * @ci: the controller
79 * @dma: 0 => disable, !0 => enable and set dma engine
80 *
81 * This function returns an error code
82 */
83static int hw_device_state(struct ci_hdrc *ci, u32 dma)
84{
85 if (dma) {
86 hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
87 /* interrupt, error, port change, reset, sleep/suspend */
88 hw_write(ci, OP_USBINTR, ~0,
89 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
90 } else {
91 hw_write(ci, OP_USBINTR, ~0, 0);
92 }
93 return 0;
94}
95
96/**
97 * hw_ep_flush: flush endpoint fifo (execute without interruption)
98 * @ci: the controller
99 * @num: endpoint number
100 * @dir: endpoint direction
101 *
102 * This function returns an error code
103 */
104static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
105{
106 int n = hw_ep_bit(num, dir);
107
108 do {
109 /* flush any pending transfer */
110 hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
111 while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
112 cpu_relax();
113 } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
114
115 return 0;
116}
117
118/**
119 * hw_ep_disable: disables endpoint (execute without interruption)
120 * @ci: the controller
121 * @num: endpoint number
122 * @dir: endpoint direction
123 *
124 * This function returns an error code
125 */
126static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
127{
128 hw_write(ci, OP_ENDPTCTRL + num,
129 (dir == TX) ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
130 return 0;
131}
132
133/**
134 * hw_ep_enable: enables endpoint (execute without interruption)
135 * @ci: the controller
136 * @num: endpoint number
137 * @dir: endpoint direction
138 * @type: endpoint type
139 *
140 * This function returns an error code
141 */
142static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
143{
144 u32 mask, data;
145
146 if (dir == TX) {
147 mask = ENDPTCTRL_TXT; /* type */
148 data = type << __ffs(mask);
149
150 mask |= ENDPTCTRL_TXS; /* unstall */
151 mask |= ENDPTCTRL_TXR; /* reset data toggle */
152 data |= ENDPTCTRL_TXR;
153 mask |= ENDPTCTRL_TXE; /* enable */
154 data |= ENDPTCTRL_TXE;
155 } else {
156 mask = ENDPTCTRL_RXT; /* type */
157 data = type << __ffs(mask);
158
159 mask |= ENDPTCTRL_RXS; /* unstall */
160 mask |= ENDPTCTRL_RXR; /* reset data toggle */
161 data |= ENDPTCTRL_RXR;
162 mask |= ENDPTCTRL_RXE; /* enable */
163 data |= ENDPTCTRL_RXE;
164 }
165 hw_write(ci, OP_ENDPTCTRL + num, mask, data);
166 return 0;
167}
168
169/**
170 * hw_ep_get_halt: return endpoint halt status
171 * @ci: the controller
172 * @num: endpoint number
173 * @dir: endpoint direction
174 *
175 * This function returns 1 if endpoint halted
176 */
177static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
178{
179 u32 mask = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
180
181 return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
182}
183
184/**
185 * hw_ep_prime: primes endpoint (execute without interruption)
186 * @ci: the controller
187 * @num: endpoint number
188 * @dir: endpoint direction
189 * @is_ctrl: true if control endpoint
190 *
191 * This function returns an error code
192 */
193static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
194{
195 int n = hw_ep_bit(num, dir);
196
197 /* Synchronize before ep prime */
198 wmb();
199
200 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
201 return -EAGAIN;
202
203 hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
204
205 while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
206 cpu_relax();
207 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
208 return -EAGAIN;
209
210 /* status shoult be tested according with manual but it doesn't work */
211 return 0;
212}
213
214/**
215 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
216 * without interruption)
217 * @ci: the controller
218 * @num: endpoint number
219 * @dir: endpoint direction
220 * @value: true => stall, false => unstall
221 *
222 * This function returns an error code
223 */
224static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
225{
226 if (value != 0 && value != 1)
227 return -EINVAL;
228
229 do {
230 enum ci_hw_regs reg = OP_ENDPTCTRL + num;
231 u32 mask_xs = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
232 u32 mask_xr = (dir == TX) ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
233
234 /* data toggle - reserved for EP0 but it's in ESS */
235 hw_write(ci, reg, mask_xs|mask_xr,
236 value ? mask_xs : mask_xr);
237 } while (value != hw_ep_get_halt(ci, num, dir));
238
239 return 0;
240}
241
242/**
243 * hw_port_is_high_speed: test if port is high speed
244 * @ci: the controller
245 *
246 * This function returns true if high speed port
247 */
248static int hw_port_is_high_speed(struct ci_hdrc *ci)
249{
250 return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
251 hw_read(ci, OP_PORTSC, PORTSC_HSP);
252}
253
254/**
255 * hw_test_and_clear_complete: test & clear complete status (execute without
256 * interruption)
257 * @ci: the controller
258 * @n: endpoint number
259 *
260 * This function returns complete status
261 */
262static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
263{
264 n = ep_to_bit(ci, n);
265 return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
266}
267
268/**
269 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
270 * without interruption)
271 * @ci: the controller
272 *
273 * This function returns active interrutps
274 */
275static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
276{
277 u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
278
279 hw_write(ci, OP_USBSTS, ~0, reg);
280 return reg;
281}
282
283/**
284 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
285 * interruption)
286 * @ci: the controller
287 *
288 * This function returns guard value
289 */
290static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
291{
292 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
293}
294
295/**
296 * hw_test_and_set_setup_guard: test & set setup guard (execute without
297 * interruption)
298 * @ci: the controller
299 *
300 * This function returns guard value
301 */
302static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
303{
304 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
305}
306
307/**
308 * hw_usb_set_address: configures USB address (execute without interruption)
309 * @ci: the controller
310 * @value: new USB address
311 *
312 * This function explicitly sets the address, without the "USBADRA" (advance)
313 * feature, which is not supported by older versions of the controller.
314 */
315static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
316{
317 hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
318 value << __ffs(DEVICEADDR_USBADR));
319}
320
321/**
322 * hw_usb_reset: restart device after a bus reset (execute without
323 * interruption)
324 * @ci: the controller
325 *
326 * This function returns an error code
327 */
328static int hw_usb_reset(struct ci_hdrc *ci)
329{
330 hw_usb_set_address(ci, 0);
331
332 /* ESS flushes only at end?!? */
333 hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
334
335 /* clear setup token semaphores */
336 hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
337
338 /* clear complete status */
339 hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
340
341 /* wait until all bits cleared */
342 while (hw_read(ci, OP_ENDPTPRIME, ~0))
343 udelay(10); /* not RTOS friendly */
344
345 /* reset all endpoints ? */
346
347 /* reset internal status and wait for further instructions
348 no need to verify the port reset status (ESS does it) */
349
350 return 0;
351}
352
353/******************************************************************************
354 * UTIL block
355 *****************************************************************************/
356
357static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
358 unsigned int length, struct scatterlist *s)
359{
360 int i;
361 u32 temp;
362 struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
363 GFP_ATOMIC);
364
365 if (node == NULL)
366 return -ENOMEM;
367
368 node->ptr = dma_pool_zalloc(hwep->td_pool, GFP_ATOMIC, &node->dma);
369 if (node->ptr == NULL) {
370 kfree(node);
371 return -ENOMEM;
372 }
373
374 node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
375 node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
376 node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
377 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
378 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
379
380 if (hwreq->req.length == 0
381 || hwreq->req.length % hwep->ep.maxpacket)
382 mul++;
383 node->ptr->token |= cpu_to_le32(mul << __ffs(TD_MULTO));
384 }
385
386 if (s) {
387 temp = (u32) (sg_dma_address(s) + hwreq->req.actual);
388 node->td_remaining_size = CI_MAX_BUF_SIZE - length;
389 } else {
390 temp = (u32) (hwreq->req.dma + hwreq->req.actual);
391 }
392
393 if (length) {
394 node->ptr->page[0] = cpu_to_le32(temp);
395 for (i = 1; i < TD_PAGE_COUNT; i++) {
396 u32 page = temp + i * CI_HDRC_PAGE_SIZE;
397 page &= ~TD_RESERVED_MASK;
398 node->ptr->page[i] = cpu_to_le32(page);
399 }
400 }
401
402 hwreq->req.actual += length;
403
404 if (!list_empty(&hwreq->tds)) {
405 /* get the last entry */
406 lastnode = list_entry(hwreq->tds.prev,
407 struct td_node, td);
408 lastnode->ptr->next = cpu_to_le32(node->dma);
409 }
410
411 INIT_LIST_HEAD(&node->td);
412 list_add_tail(&node->td, &hwreq->tds);
413
414 return 0;
415}
416
417/**
418 * _usb_addr: calculates endpoint address from direction & number
419 * @ep: endpoint
420 */
421static inline u8 _usb_addr(struct ci_hw_ep *ep)
422{
423 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
424}
425
426static int prepare_td_for_non_sg(struct ci_hw_ep *hwep,
427 struct ci_hw_req *hwreq)
428{
429 unsigned int rest = hwreq->req.length;
430 int pages = TD_PAGE_COUNT;
431 int ret = 0;
432
433 if (rest == 0) {
434 ret = add_td_to_list(hwep, hwreq, 0, NULL);
435 if (ret < 0)
436 return ret;
437 }
438
439 /*
440 * The first buffer could be not page aligned.
441 * In that case we have to span into one extra td.
442 */
443 if (hwreq->req.dma % PAGE_SIZE)
444 pages--;
445
446 while (rest > 0) {
447 unsigned int count = min(hwreq->req.length - hwreq->req.actual,
448 (unsigned int)(pages * CI_HDRC_PAGE_SIZE));
449
450 ret = add_td_to_list(hwep, hwreq, count, NULL);
451 if (ret < 0)
452 return ret;
453
454 rest -= count;
455 }
456
457 if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX
458 && (hwreq->req.length % hwep->ep.maxpacket == 0)) {
459 ret = add_td_to_list(hwep, hwreq, 0, NULL);
460 if (ret < 0)
461 return ret;
462 }
463
464 return ret;
465}
466
467static int prepare_td_per_sg(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
468 struct scatterlist *s)
469{
470 unsigned int rest = sg_dma_len(s);
471 int ret = 0;
472
473 hwreq->req.actual = 0;
474 while (rest > 0) {
475 unsigned int count = min_t(unsigned int, rest,
476 CI_MAX_BUF_SIZE);
477
478 ret = add_td_to_list(hwep, hwreq, count, s);
479 if (ret < 0)
480 return ret;
481
482 rest -= count;
483 }
484
485 return ret;
486}
487
488static void ci_add_buffer_entry(struct td_node *node, struct scatterlist *s)
489{
490 int empty_td_slot_index = (CI_MAX_BUF_SIZE - node->td_remaining_size)
491 / CI_HDRC_PAGE_SIZE;
492 int i;
493 u32 token;
494
495 token = le32_to_cpu(node->ptr->token) + (sg_dma_len(s) << __ffs(TD_TOTAL_BYTES));
496 node->ptr->token = cpu_to_le32(token);
497
498 for (i = empty_td_slot_index; i < TD_PAGE_COUNT; i++) {
499 u32 page = (u32) sg_dma_address(s) +
500 (i - empty_td_slot_index) * CI_HDRC_PAGE_SIZE;
501
502 page &= ~TD_RESERVED_MASK;
503 node->ptr->page[i] = cpu_to_le32(page);
504 }
505}
506
507static int prepare_td_for_sg(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
508{
509 struct usb_request *req = &hwreq->req;
510 struct scatterlist *s = req->sg;
511 int ret = 0, i = 0;
512 struct td_node *node = NULL;
513
514 if (!s || req->zero || req->length == 0) {
515 dev_err(hwep->ci->dev, "not supported operation for sg\n");
516 return -EINVAL;
517 }
518
519 while (i++ < req->num_mapped_sgs) {
520 if (sg_dma_address(s) % PAGE_SIZE) {
521 dev_err(hwep->ci->dev, "not page aligned sg buffer\n");
522 return -EINVAL;
523 }
524
525 if (node && (node->td_remaining_size >= sg_dma_len(s))) {
526 ci_add_buffer_entry(node, s);
527 node->td_remaining_size -= sg_dma_len(s);
528 } else {
529 ret = prepare_td_per_sg(hwep, hwreq, s);
530 if (ret)
531 return ret;
532
533 node = list_entry(hwreq->tds.prev,
534 struct td_node, td);
535 }
536
537 s = sg_next(s);
538 }
539
540 return ret;
541}
542
543/**
544 * _hardware_enqueue: configures a request at hardware level
545 * @hwep: endpoint
546 * @hwreq: request
547 *
548 * This function returns an error code
549 */
550static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
551{
552 struct ci_hdrc *ci = hwep->ci;
553 int ret = 0;
554 struct td_node *firstnode, *lastnode;
555
556 /* don't queue twice */
557 if (hwreq->req.status == -EALREADY)
558 return -EALREADY;
559
560 hwreq->req.status = -EALREADY;
561
562 ret = usb_gadget_map_request_by_dev(ci->dev->parent,
563 &hwreq->req, hwep->dir);
564 if (ret)
565 return ret;
566
567 if (hwreq->req.num_mapped_sgs)
568 ret = prepare_td_for_sg(hwep, hwreq);
569 else
570 ret = prepare_td_for_non_sg(hwep, hwreq);
571
572 if (ret)
573 return ret;
574
575 lastnode = list_entry(hwreq->tds.prev,
576 struct td_node, td);
577
578 lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
579 if (!hwreq->req.no_interrupt)
580 lastnode->ptr->token |= cpu_to_le32(TD_IOC);
581
582 list_for_each_entry_safe(firstnode, lastnode, &hwreq->tds, td)
583 trace_ci_prepare_td(hwep, hwreq, firstnode);
584
585 firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
586
587 wmb();
588
589 hwreq->req.actual = 0;
590 if (!list_empty(&hwep->qh.queue)) {
591 struct ci_hw_req *hwreqprev;
592 int n = hw_ep_bit(hwep->num, hwep->dir);
593 int tmp_stat;
594 struct td_node *prevlastnode;
595 u32 next = firstnode->dma & TD_ADDR_MASK;
596
597 hwreqprev = list_entry(hwep->qh.queue.prev,
598 struct ci_hw_req, queue);
599 prevlastnode = list_entry(hwreqprev->tds.prev,
600 struct td_node, td);
601
602 prevlastnode->ptr->next = cpu_to_le32(next);
603 wmb();
604
605 if (ci->rev == CI_REVISION_22) {
606 if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
607 reprime_dtd(ci, hwep, prevlastnode);
608 }
609
610 if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
611 goto done;
612 do {
613 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
614 tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
615 } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
616 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
617 if (tmp_stat)
618 goto done;
619 }
620
621 /* QH configuration */
622 hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
623 hwep->qh.ptr->td.token &=
624 cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
625
626 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
627 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
628
629 if (hwreq->req.length == 0
630 || hwreq->req.length % hwep->ep.maxpacket)
631 mul++;
632 hwep->qh.ptr->cap |= cpu_to_le32(mul << __ffs(QH_MULT));
633 }
634
635 ret = hw_ep_prime(ci, hwep->num, hwep->dir,
636 hwep->type == USB_ENDPOINT_XFER_CONTROL);
637done:
638 return ret;
639}
640
641/**
642 * free_pending_td: remove a pending request for the endpoint
643 * @hwep: endpoint
644 */
645static void free_pending_td(struct ci_hw_ep *hwep)
646{
647 struct td_node *pending = hwep->pending_td;
648
649 dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
650 hwep->pending_td = NULL;
651 kfree(pending);
652}
653
654static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
655 struct td_node *node)
656{
657 hwep->qh.ptr->td.next = cpu_to_le32(node->dma);
658 hwep->qh.ptr->td.token &=
659 cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
660
661 return hw_ep_prime(ci, hwep->num, hwep->dir,
662 hwep->type == USB_ENDPOINT_XFER_CONTROL);
663}
664
665/**
666 * _hardware_dequeue: handles a request at hardware level
667 * @hwep: endpoint
668 * @hwreq: request
669 *
670 * This function returns an error code
671 */
672static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
673{
674 u32 tmptoken;
675 struct td_node *node, *tmpnode;
676 unsigned remaining_length;
677 unsigned actual = hwreq->req.length;
678 struct ci_hdrc *ci = hwep->ci;
679
680 if (hwreq->req.status != -EALREADY)
681 return -EINVAL;
682
683 hwreq->req.status = 0;
684
685 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
686 tmptoken = le32_to_cpu(node->ptr->token);
687 trace_ci_complete_td(hwep, hwreq, node);
688 if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
689 int n = hw_ep_bit(hwep->num, hwep->dir);
690
691 if (ci->rev == CI_REVISION_24)
692 if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
693 reprime_dtd(ci, hwep, node);
694 hwreq->req.status = -EALREADY;
695 return -EBUSY;
696 }
697
698 remaining_length = (tmptoken & TD_TOTAL_BYTES);
699 remaining_length >>= __ffs(TD_TOTAL_BYTES);
700 actual -= remaining_length;
701
702 hwreq->req.status = tmptoken & TD_STATUS;
703 if ((TD_STATUS_HALTED & hwreq->req.status)) {
704 hwreq->req.status = -EPIPE;
705 break;
706 } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
707 hwreq->req.status = -EPROTO;
708 break;
709 } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
710 hwreq->req.status = -EILSEQ;
711 break;
712 }
713
714 if (remaining_length) {
715 if (hwep->dir == TX) {
716 hwreq->req.status = -EPROTO;
717 break;
718 }
719 }
720 /*
721 * As the hardware could still address the freed td
722 * which will run the udc unusable, the cleanup of the
723 * td has to be delayed by one.
724 */
725 if (hwep->pending_td)
726 free_pending_td(hwep);
727
728 hwep->pending_td = node;
729 list_del_init(&node->td);
730 }
731
732 usb_gadget_unmap_request_by_dev(hwep->ci->dev->parent,
733 &hwreq->req, hwep->dir);
734
735 hwreq->req.actual += actual;
736
737 if (hwreq->req.status)
738 return hwreq->req.status;
739
740 return hwreq->req.actual;
741}
742
743/**
744 * _ep_nuke: dequeues all endpoint requests
745 * @hwep: endpoint
746 *
747 * This function returns an error code
748 * Caller must hold lock
749 */
750static int _ep_nuke(struct ci_hw_ep *hwep)
751__releases(hwep->lock)
752__acquires(hwep->lock)
753{
754 struct td_node *node, *tmpnode;
755 if (hwep == NULL)
756 return -EINVAL;
757
758 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
759
760 while (!list_empty(&hwep->qh.queue)) {
761
762 /* pop oldest request */
763 struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
764 struct ci_hw_req, queue);
765
766 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
767 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
768 list_del_init(&node->td);
769 node->ptr = NULL;
770 kfree(node);
771 }
772
773 list_del_init(&hwreq->queue);
774 hwreq->req.status = -ESHUTDOWN;
775
776 if (hwreq->req.complete != NULL) {
777 spin_unlock(hwep->lock);
778 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
779 spin_lock(hwep->lock);
780 }
781 }
782
783 if (hwep->pending_td)
784 free_pending_td(hwep);
785
786 return 0;
787}
788
789static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer)
790{
791 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
792 int direction, retval = 0;
793 unsigned long flags;
794
795 if (ep == NULL || hwep->ep.desc == NULL)
796 return -EINVAL;
797
798 if (usb_endpoint_xfer_isoc(hwep->ep.desc))
799 return -EOPNOTSUPP;
800
801 spin_lock_irqsave(hwep->lock, flags);
802
803 if (value && hwep->dir == TX && check_transfer &&
804 !list_empty(&hwep->qh.queue) &&
805 !usb_endpoint_xfer_control(hwep->ep.desc)) {
806 spin_unlock_irqrestore(hwep->lock, flags);
807 return -EAGAIN;
808 }
809
810 direction = hwep->dir;
811 do {
812 retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
813
814 if (!value)
815 hwep->wedge = 0;
816
817 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
818 hwep->dir = (hwep->dir == TX) ? RX : TX;
819
820 } while (hwep->dir != direction);
821
822 spin_unlock_irqrestore(hwep->lock, flags);
823 return retval;
824}
825
826
827/**
828 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
829 * @gadget: gadget
830 *
831 * This function returns an error code
832 */
833static int _gadget_stop_activity(struct usb_gadget *gadget)
834{
835 struct usb_ep *ep;
836 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
837 unsigned long flags;
838
839 /* flush all endpoints */
840 gadget_for_each_ep(ep, gadget) {
841 usb_ep_fifo_flush(ep);
842 }
843 usb_ep_fifo_flush(&ci->ep0out->ep);
844 usb_ep_fifo_flush(&ci->ep0in->ep);
845
846 /* make sure to disable all endpoints */
847 gadget_for_each_ep(ep, gadget) {
848 usb_ep_disable(ep);
849 }
850
851 if (ci->status != NULL) {
852 usb_ep_free_request(&ci->ep0in->ep, ci->status);
853 ci->status = NULL;
854 }
855
856 spin_lock_irqsave(&ci->lock, flags);
857 ci->gadget.speed = USB_SPEED_UNKNOWN;
858 ci->remote_wakeup = 0;
859 ci->suspended = 0;
860 spin_unlock_irqrestore(&ci->lock, flags);
861
862 return 0;
863}
864
865/******************************************************************************
866 * ISR block
867 *****************************************************************************/
868/**
869 * isr_reset_handler: USB reset interrupt handler
870 * @ci: UDC device
871 *
872 * This function resets USB engine after a bus reset occurred
873 */
874static void isr_reset_handler(struct ci_hdrc *ci)
875__releases(ci->lock)
876__acquires(ci->lock)
877{
878 int retval;
879
880 spin_unlock(&ci->lock);
881 if (ci->gadget.speed != USB_SPEED_UNKNOWN)
882 usb_gadget_udc_reset(&ci->gadget, ci->driver);
883
884 retval = _gadget_stop_activity(&ci->gadget);
885 if (retval)
886 goto done;
887
888 retval = hw_usb_reset(ci);
889 if (retval)
890 goto done;
891
892 ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
893 if (ci->status == NULL)
894 retval = -ENOMEM;
895
896done:
897 spin_lock(&ci->lock);
898
899 if (retval)
900 dev_err(ci->dev, "error: %i\n", retval);
901}
902
903/**
904 * isr_get_status_complete: get_status request complete function
905 * @ep: endpoint
906 * @req: request handled
907 *
908 * Caller must release lock
909 */
910static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
911{
912 if (ep == NULL || req == NULL)
913 return;
914
915 kfree(req->buf);
916 usb_ep_free_request(ep, req);
917}
918
919/**
920 * _ep_queue: queues (submits) an I/O request to an endpoint
921 * @ep: endpoint
922 * @req: request
923 * @gfp_flags: GFP flags (not used)
924 *
925 * Caller must hold lock
926 * This function returns an error code
927 */
928static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
929 gfp_t __maybe_unused gfp_flags)
930{
931 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
932 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
933 struct ci_hdrc *ci = hwep->ci;
934 int retval = 0;
935
936 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
937 return -EINVAL;
938
939 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
940 if (req->length)
941 hwep = (ci->ep0_dir == RX) ?
942 ci->ep0out : ci->ep0in;
943 if (!list_empty(&hwep->qh.queue)) {
944 _ep_nuke(hwep);
945 dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
946 _usb_addr(hwep));
947 }
948 }
949
950 if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
951 hwreq->req.length > hwep->ep.mult * hwep->ep.maxpacket) {
952 dev_err(hwep->ci->dev, "request length too big for isochronous\n");
953 return -EMSGSIZE;
954 }
955
956 /* first nuke then test link, e.g. previous status has not sent */
957 if (!list_empty(&hwreq->queue)) {
958 dev_err(hwep->ci->dev, "request already in queue\n");
959 return -EBUSY;
960 }
961
962 /* push request */
963 hwreq->req.status = -EINPROGRESS;
964 hwreq->req.actual = 0;
965
966 retval = _hardware_enqueue(hwep, hwreq);
967
968 if (retval == -EALREADY)
969 retval = 0;
970 if (!retval)
971 list_add_tail(&hwreq->queue, &hwep->qh.queue);
972
973 return retval;
974}
975
976/**
977 * isr_get_status_response: get_status request response
978 * @ci: ci struct
979 * @setup: setup request packet
980 *
981 * This function returns an error code
982 */
983static int isr_get_status_response(struct ci_hdrc *ci,
984 struct usb_ctrlrequest *setup)
985__releases(hwep->lock)
986__acquires(hwep->lock)
987{
988 struct ci_hw_ep *hwep = ci->ep0in;
989 struct usb_request *req = NULL;
990 gfp_t gfp_flags = GFP_ATOMIC;
991 int dir, num, retval;
992
993 if (hwep == NULL || setup == NULL)
994 return -EINVAL;
995
996 spin_unlock(hwep->lock);
997 req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
998 spin_lock(hwep->lock);
999 if (req == NULL)
1000 return -ENOMEM;
1001
1002 req->complete = isr_get_status_complete;
1003 req->length = 2;
1004 req->buf = kzalloc(req->length, gfp_flags);
1005 if (req->buf == NULL) {
1006 retval = -ENOMEM;
1007 goto err_free_req;
1008 }
1009
1010 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
1011 *(u16 *)req->buf = (ci->remote_wakeup << 1) |
1012 ci->gadget.is_selfpowered;
1013 } else if ((setup->bRequestType & USB_RECIP_MASK) \
1014 == USB_RECIP_ENDPOINT) {
1015 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
1016 TX : RX;
1017 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
1018 *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
1019 }
1020 /* else do nothing; reserved for future use */
1021
1022 retval = _ep_queue(&hwep->ep, req, gfp_flags);
1023 if (retval)
1024 goto err_free_buf;
1025
1026 return 0;
1027
1028 err_free_buf:
1029 kfree(req->buf);
1030 err_free_req:
1031 spin_unlock(hwep->lock);
1032 usb_ep_free_request(&hwep->ep, req);
1033 spin_lock(hwep->lock);
1034 return retval;
1035}
1036
1037/**
1038 * isr_setup_status_complete: setup_status request complete function
1039 * @ep: endpoint
1040 * @req: request handled
1041 *
1042 * Caller must release lock. Put the port in test mode if test mode
1043 * feature is selected.
1044 */
1045static void
1046isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
1047{
1048 struct ci_hdrc *ci = req->context;
1049 unsigned long flags;
1050
1051 if (req->status < 0)
1052 return;
1053
1054 if (ci->setaddr) {
1055 hw_usb_set_address(ci, ci->address);
1056 ci->setaddr = false;
1057 if (ci->address)
1058 usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS);
1059 }
1060
1061 spin_lock_irqsave(&ci->lock, flags);
1062 if (ci->test_mode)
1063 hw_port_test_set(ci, ci->test_mode);
1064 spin_unlock_irqrestore(&ci->lock, flags);
1065}
1066
1067/**
1068 * isr_setup_status_phase: queues the status phase of a setup transation
1069 * @ci: ci struct
1070 *
1071 * This function returns an error code
1072 */
1073static int isr_setup_status_phase(struct ci_hdrc *ci)
1074{
1075 struct ci_hw_ep *hwep;
1076
1077 /*
1078 * Unexpected USB controller behavior, caused by bad signal integrity
1079 * or ground reference problems, can lead to isr_setup_status_phase
1080 * being called with ci->status equal to NULL.
1081 * If this situation occurs, you should review your USB hardware design.
1082 */
1083 if (WARN_ON_ONCE(!ci->status))
1084 return -EPIPE;
1085
1086 hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
1087 ci->status->context = ci;
1088 ci->status->complete = isr_setup_status_complete;
1089
1090 return _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
1091}
1092
1093/**
1094 * isr_tr_complete_low: transaction complete low level handler
1095 * @hwep: endpoint
1096 *
1097 * This function returns an error code
1098 * Caller must hold lock
1099 */
1100static int isr_tr_complete_low(struct ci_hw_ep *hwep)
1101__releases(hwep->lock)
1102__acquires(hwep->lock)
1103{
1104 struct ci_hw_req *hwreq, *hwreqtemp;
1105 struct ci_hw_ep *hweptemp = hwep;
1106 int retval = 0;
1107
1108 list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
1109 queue) {
1110 retval = _hardware_dequeue(hwep, hwreq);
1111 if (retval < 0)
1112 break;
1113 list_del_init(&hwreq->queue);
1114 if (hwreq->req.complete != NULL) {
1115 spin_unlock(hwep->lock);
1116 if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
1117 hwreq->req.length)
1118 hweptemp = hwep->ci->ep0in;
1119 usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req);
1120 spin_lock(hwep->lock);
1121 }
1122 }
1123
1124 if (retval == -EBUSY)
1125 retval = 0;
1126
1127 return retval;
1128}
1129
1130static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
1131{
1132 dev_warn(&ci->gadget.dev,
1133 "connect the device to an alternate port if you want HNP\n");
1134 return isr_setup_status_phase(ci);
1135}
1136
1137/**
1138 * isr_setup_packet_handler: setup packet handler
1139 * @ci: UDC descriptor
1140 *
1141 * This function handles setup packet
1142 */
1143static void isr_setup_packet_handler(struct ci_hdrc *ci)
1144__releases(ci->lock)
1145__acquires(ci->lock)
1146{
1147 struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
1148 struct usb_ctrlrequest req;
1149 int type, num, dir, err = -EINVAL;
1150 u8 tmode = 0;
1151
1152 /*
1153 * Flush data and handshake transactions of previous
1154 * setup packet.
1155 */
1156 _ep_nuke(ci->ep0out);
1157 _ep_nuke(ci->ep0in);
1158
1159 /* read_setup_packet */
1160 do {
1161 hw_test_and_set_setup_guard(ci);
1162 memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
1163 } while (!hw_test_and_clear_setup_guard(ci));
1164
1165 type = req.bRequestType;
1166
1167 ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
1168
1169 switch (req.bRequest) {
1170 case USB_REQ_CLEAR_FEATURE:
1171 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1172 le16_to_cpu(req.wValue) ==
1173 USB_ENDPOINT_HALT) {
1174 if (req.wLength != 0)
1175 break;
1176 num = le16_to_cpu(req.wIndex);
1177 dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1178 num &= USB_ENDPOINT_NUMBER_MASK;
1179 if (dir == TX)
1180 num += ci->hw_ep_max / 2;
1181 if (!ci->ci_hw_ep[num].wedge) {
1182 spin_unlock(&ci->lock);
1183 err = usb_ep_clear_halt(
1184 &ci->ci_hw_ep[num].ep);
1185 spin_lock(&ci->lock);
1186 if (err)
1187 break;
1188 }
1189 err = isr_setup_status_phase(ci);
1190 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
1191 le16_to_cpu(req.wValue) ==
1192 USB_DEVICE_REMOTE_WAKEUP) {
1193 if (req.wLength != 0)
1194 break;
1195 ci->remote_wakeup = 0;
1196 err = isr_setup_status_phase(ci);
1197 } else {
1198 goto delegate;
1199 }
1200 break;
1201 case USB_REQ_GET_STATUS:
1202 if ((type != (USB_DIR_IN|USB_RECIP_DEVICE) ||
1203 le16_to_cpu(req.wIndex) == OTG_STS_SELECTOR) &&
1204 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
1205 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
1206 goto delegate;
1207 if (le16_to_cpu(req.wLength) != 2 ||
1208 le16_to_cpu(req.wValue) != 0)
1209 break;
1210 err = isr_get_status_response(ci, &req);
1211 break;
1212 case USB_REQ_SET_ADDRESS:
1213 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
1214 goto delegate;
1215 if (le16_to_cpu(req.wLength) != 0 ||
1216 le16_to_cpu(req.wIndex) != 0)
1217 break;
1218 ci->address = (u8)le16_to_cpu(req.wValue);
1219 ci->setaddr = true;
1220 err = isr_setup_status_phase(ci);
1221 break;
1222 case USB_REQ_SET_FEATURE:
1223 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1224 le16_to_cpu(req.wValue) ==
1225 USB_ENDPOINT_HALT) {
1226 if (req.wLength != 0)
1227 break;
1228 num = le16_to_cpu(req.wIndex);
1229 dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1230 num &= USB_ENDPOINT_NUMBER_MASK;
1231 if (dir == TX)
1232 num += ci->hw_ep_max / 2;
1233
1234 spin_unlock(&ci->lock);
1235 err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false);
1236 spin_lock(&ci->lock);
1237 if (!err)
1238 isr_setup_status_phase(ci);
1239 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
1240 if (req.wLength != 0)
1241 break;
1242 switch (le16_to_cpu(req.wValue)) {
1243 case USB_DEVICE_REMOTE_WAKEUP:
1244 ci->remote_wakeup = 1;
1245 err = isr_setup_status_phase(ci);
1246 break;
1247 case USB_DEVICE_TEST_MODE:
1248 tmode = le16_to_cpu(req.wIndex) >> 8;
1249 switch (tmode) {
1250 case USB_TEST_J:
1251 case USB_TEST_K:
1252 case USB_TEST_SE0_NAK:
1253 case USB_TEST_PACKET:
1254 case USB_TEST_FORCE_ENABLE:
1255 ci->test_mode = tmode;
1256 err = isr_setup_status_phase(
1257 ci);
1258 break;
1259 default:
1260 break;
1261 }
1262 break;
1263 case USB_DEVICE_B_HNP_ENABLE:
1264 if (ci_otg_is_fsm_mode(ci)) {
1265 ci->gadget.b_hnp_enable = 1;
1266 err = isr_setup_status_phase(
1267 ci);
1268 }
1269 break;
1270 case USB_DEVICE_A_ALT_HNP_SUPPORT:
1271 if (ci_otg_is_fsm_mode(ci))
1272 err = otg_a_alt_hnp_support(ci);
1273 break;
1274 case USB_DEVICE_A_HNP_SUPPORT:
1275 if (ci_otg_is_fsm_mode(ci)) {
1276 ci->gadget.a_hnp_support = 1;
1277 err = isr_setup_status_phase(
1278 ci);
1279 }
1280 break;
1281 default:
1282 goto delegate;
1283 }
1284 } else {
1285 goto delegate;
1286 }
1287 break;
1288 default:
1289delegate:
1290 if (req.wLength == 0) /* no data phase */
1291 ci->ep0_dir = TX;
1292
1293 spin_unlock(&ci->lock);
1294 err = ci->driver->setup(&ci->gadget, &req);
1295 spin_lock(&ci->lock);
1296 break;
1297 }
1298
1299 if (err < 0) {
1300 spin_unlock(&ci->lock);
1301 if (_ep_set_halt(&hwep->ep, 1, false))
1302 dev_err(ci->dev, "error: _ep_set_halt\n");
1303 spin_lock(&ci->lock);
1304 }
1305}
1306
1307/**
1308 * isr_tr_complete_handler: transaction complete interrupt handler
1309 * @ci: UDC descriptor
1310 *
1311 * This function handles traffic events
1312 */
1313static void isr_tr_complete_handler(struct ci_hdrc *ci)
1314__releases(ci->lock)
1315__acquires(ci->lock)
1316{
1317 unsigned i;
1318 int err;
1319
1320 for (i = 0; i < ci->hw_ep_max; i++) {
1321 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1322
1323 if (hwep->ep.desc == NULL)
1324 continue; /* not configured */
1325
1326 if (hw_test_and_clear_complete(ci, i)) {
1327 err = isr_tr_complete_low(hwep);
1328 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1329 if (err > 0) /* needs status phase */
1330 err = isr_setup_status_phase(ci);
1331 if (err < 0) {
1332 spin_unlock(&ci->lock);
1333 if (_ep_set_halt(&hwep->ep, 1, false))
1334 dev_err(ci->dev,
1335 "error: _ep_set_halt\n");
1336 spin_lock(&ci->lock);
1337 }
1338 }
1339 }
1340
1341 /* Only handle setup packet below */
1342 if (i == 0 &&
1343 hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
1344 isr_setup_packet_handler(ci);
1345 }
1346}
1347
1348/******************************************************************************
1349 * ENDPT block
1350 *****************************************************************************/
1351/*
1352 * ep_enable: configure endpoint, making it usable
1353 *
1354 * Check usb_ep_enable() at "usb_gadget.h" for details
1355 */
1356static int ep_enable(struct usb_ep *ep,
1357 const struct usb_endpoint_descriptor *desc)
1358{
1359 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1360 int retval = 0;
1361 unsigned long flags;
1362 u32 cap = 0;
1363
1364 if (ep == NULL || desc == NULL)
1365 return -EINVAL;
1366
1367 spin_lock_irqsave(hwep->lock, flags);
1368
1369 /* only internal SW should enable ctrl endpts */
1370
1371 if (!list_empty(&hwep->qh.queue)) {
1372 dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
1373 spin_unlock_irqrestore(hwep->lock, flags);
1374 return -EBUSY;
1375 }
1376
1377 hwep->ep.desc = desc;
1378
1379 hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
1380 hwep->num = usb_endpoint_num(desc);
1381 hwep->type = usb_endpoint_type(desc);
1382
1383 hwep->ep.maxpacket = usb_endpoint_maxp(desc);
1384 hwep->ep.mult = usb_endpoint_maxp_mult(desc);
1385
1386 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1387 cap |= QH_IOS;
1388
1389 cap |= QH_ZLT;
1390 cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
1391 /*
1392 * For ISO-TX, we set mult at QH as the largest value, and use
1393 * MultO at TD as real mult value.
1394 */
1395 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
1396 cap |= 3 << __ffs(QH_MULT);
1397
1398 hwep->qh.ptr->cap = cpu_to_le32(cap);
1399
1400 hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
1401
1402 if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1403 dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
1404 retval = -EINVAL;
1405 }
1406
1407 /*
1408 * Enable endpoints in the HW other than ep0 as ep0
1409 * is always enabled
1410 */
1411 if (hwep->num)
1412 retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
1413 hwep->type);
1414
1415 spin_unlock_irqrestore(hwep->lock, flags);
1416 return retval;
1417}
1418
1419/*
1420 * ep_disable: endpoint is no longer usable
1421 *
1422 * Check usb_ep_disable() at "usb_gadget.h" for details
1423 */
1424static int ep_disable(struct usb_ep *ep)
1425{
1426 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1427 int direction, retval = 0;
1428 unsigned long flags;
1429
1430 if (ep == NULL)
1431 return -EINVAL;
1432 else if (hwep->ep.desc == NULL)
1433 return -EBUSY;
1434
1435 spin_lock_irqsave(hwep->lock, flags);
1436 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1437 spin_unlock_irqrestore(hwep->lock, flags);
1438 return 0;
1439 }
1440
1441 /* only internal SW should disable ctrl endpts */
1442
1443 direction = hwep->dir;
1444 do {
1445 retval |= _ep_nuke(hwep);
1446 retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
1447
1448 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1449 hwep->dir = (hwep->dir == TX) ? RX : TX;
1450
1451 } while (hwep->dir != direction);
1452
1453 hwep->ep.desc = NULL;
1454
1455 spin_unlock_irqrestore(hwep->lock, flags);
1456 return retval;
1457}
1458
1459/*
1460 * ep_alloc_request: allocate a request object to use with this endpoint
1461 *
1462 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
1463 */
1464static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
1465{
1466 struct ci_hw_req *hwreq = NULL;
1467
1468 if (ep == NULL)
1469 return NULL;
1470
1471 hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
1472 if (hwreq != NULL) {
1473 INIT_LIST_HEAD(&hwreq->queue);
1474 INIT_LIST_HEAD(&hwreq->tds);
1475 }
1476
1477 return (hwreq == NULL) ? NULL : &hwreq->req;
1478}
1479
1480/*
1481 * ep_free_request: frees a request object
1482 *
1483 * Check usb_ep_free_request() at "usb_gadget.h" for details
1484 */
1485static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
1486{
1487 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1488 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1489 struct td_node *node, *tmpnode;
1490 unsigned long flags;
1491
1492 if (ep == NULL || req == NULL) {
1493 return;
1494 } else if (!list_empty(&hwreq->queue)) {
1495 dev_err(hwep->ci->dev, "freeing queued request\n");
1496 return;
1497 }
1498
1499 spin_lock_irqsave(hwep->lock, flags);
1500
1501 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1502 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1503 list_del_init(&node->td);
1504 node->ptr = NULL;
1505 kfree(node);
1506 }
1507
1508 kfree(hwreq);
1509
1510 spin_unlock_irqrestore(hwep->lock, flags);
1511}
1512
1513/*
1514 * ep_queue: queues (submits) an I/O request to an endpoint
1515 *
1516 * Check usb_ep_queue()* at usb_gadget.h" for details
1517 */
1518static int ep_queue(struct usb_ep *ep, struct usb_request *req,
1519 gfp_t __maybe_unused gfp_flags)
1520{
1521 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1522 int retval = 0;
1523 unsigned long flags;
1524
1525 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
1526 return -EINVAL;
1527
1528 spin_lock_irqsave(hwep->lock, flags);
1529 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1530 spin_unlock_irqrestore(hwep->lock, flags);
1531 return 0;
1532 }
1533 retval = _ep_queue(ep, req, gfp_flags);
1534 spin_unlock_irqrestore(hwep->lock, flags);
1535 return retval;
1536}
1537
1538/*
1539 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
1540 *
1541 * Check usb_ep_dequeue() at "usb_gadget.h" for details
1542 */
1543static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
1544{
1545 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1546 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1547 unsigned long flags;
1548 struct td_node *node, *tmpnode;
1549
1550 if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
1551 hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
1552 list_empty(&hwep->qh.queue))
1553 return -EINVAL;
1554
1555 spin_lock_irqsave(hwep->lock, flags);
1556 if (hwep->ci->gadget.speed != USB_SPEED_UNKNOWN)
1557 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1558
1559 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1560 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1561 list_del(&node->td);
1562 kfree(node);
1563 }
1564
1565 /* pop request */
1566 list_del_init(&hwreq->queue);
1567
1568 usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
1569
1570 req->status = -ECONNRESET;
1571
1572 if (hwreq->req.complete != NULL) {
1573 spin_unlock(hwep->lock);
1574 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
1575 spin_lock(hwep->lock);
1576 }
1577
1578 spin_unlock_irqrestore(hwep->lock, flags);
1579 return 0;
1580}
1581
1582/*
1583 * ep_set_halt: sets the endpoint halt feature
1584 *
1585 * Check usb_ep_set_halt() at "usb_gadget.h" for details
1586 */
1587static int ep_set_halt(struct usb_ep *ep, int value)
1588{
1589 return _ep_set_halt(ep, value, true);
1590}
1591
1592/*
1593 * ep_set_wedge: sets the halt feature and ignores clear requests
1594 *
1595 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
1596 */
1597static int ep_set_wedge(struct usb_ep *ep)
1598{
1599 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1600 unsigned long flags;
1601
1602 if (ep == NULL || hwep->ep.desc == NULL)
1603 return -EINVAL;
1604
1605 spin_lock_irqsave(hwep->lock, flags);
1606 hwep->wedge = 1;
1607 spin_unlock_irqrestore(hwep->lock, flags);
1608
1609 return usb_ep_set_halt(ep);
1610}
1611
1612/*
1613 * ep_fifo_flush: flushes contents of a fifo
1614 *
1615 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
1616 */
1617static void ep_fifo_flush(struct usb_ep *ep)
1618{
1619 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1620 unsigned long flags;
1621
1622 if (ep == NULL) {
1623 dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
1624 return;
1625 }
1626
1627 spin_lock_irqsave(hwep->lock, flags);
1628 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1629 spin_unlock_irqrestore(hwep->lock, flags);
1630 return;
1631 }
1632
1633 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1634
1635 spin_unlock_irqrestore(hwep->lock, flags);
1636}
1637
1638/*
1639 * Endpoint-specific part of the API to the USB controller hardware
1640 * Check "usb_gadget.h" for details
1641 */
1642static const struct usb_ep_ops usb_ep_ops = {
1643 .enable = ep_enable,
1644 .disable = ep_disable,
1645 .alloc_request = ep_alloc_request,
1646 .free_request = ep_free_request,
1647 .queue = ep_queue,
1648 .dequeue = ep_dequeue,
1649 .set_halt = ep_set_halt,
1650 .set_wedge = ep_set_wedge,
1651 .fifo_flush = ep_fifo_flush,
1652};
1653
1654/******************************************************************************
1655 * GADGET block
1656 *****************************************************************************/
1657
1658static int ci_udc_get_frame(struct usb_gadget *_gadget)
1659{
1660 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1661 unsigned long flags;
1662 int ret;
1663
1664 spin_lock_irqsave(&ci->lock, flags);
1665 ret = hw_read(ci, OP_FRINDEX, 0x3fff);
1666 spin_unlock_irqrestore(&ci->lock, flags);
1667 return ret >> 3;
1668}
1669
1670/*
1671 * ci_hdrc_gadget_connect: caller makes sure gadget driver is binded
1672 */
1673static void ci_hdrc_gadget_connect(struct usb_gadget *_gadget, int is_active)
1674{
1675 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1676
1677 if (is_active) {
1678 pm_runtime_get_sync(ci->dev);
1679 hw_device_reset(ci);
1680 spin_lock_irq(&ci->lock);
1681 if (ci->driver) {
1682 hw_device_state(ci, ci->ep0out->qh.dma);
1683 usb_gadget_set_state(_gadget, USB_STATE_POWERED);
1684 spin_unlock_irq(&ci->lock);
1685 usb_udc_vbus_handler(_gadget, true);
1686 } else {
1687 spin_unlock_irq(&ci->lock);
1688 }
1689 } else {
1690 usb_udc_vbus_handler(_gadget, false);
1691 if (ci->driver)
1692 ci->driver->disconnect(&ci->gadget);
1693 hw_device_state(ci, 0);
1694 if (ci->platdata->notify_event)
1695 ci->platdata->notify_event(ci,
1696 CI_HDRC_CONTROLLER_STOPPED_EVENT);
1697 _gadget_stop_activity(&ci->gadget);
1698 pm_runtime_put_sync(ci->dev);
1699 usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED);
1700 }
1701}
1702
1703static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
1704{
1705 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1706 unsigned long flags;
1707 int ret = 0;
1708
1709 spin_lock_irqsave(&ci->lock, flags);
1710 ci->vbus_active = is_active;
1711 spin_unlock_irqrestore(&ci->lock, flags);
1712
1713 if (ci->usb_phy)
1714 usb_phy_set_charger_state(ci->usb_phy, is_active ?
1715 USB_CHARGER_PRESENT : USB_CHARGER_ABSENT);
1716
1717 if (ci->platdata->notify_event)
1718 ret = ci->platdata->notify_event(ci,
1719 CI_HDRC_CONTROLLER_VBUS_EVENT);
1720
1721 if (ci->driver)
1722 ci_hdrc_gadget_connect(_gadget, is_active);
1723
1724 return ret;
1725}
1726
1727static int ci_udc_wakeup(struct usb_gadget *_gadget)
1728{
1729 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1730 unsigned long flags;
1731 int ret = 0;
1732
1733 spin_lock_irqsave(&ci->lock, flags);
1734 if (ci->gadget.speed == USB_SPEED_UNKNOWN) {
1735 spin_unlock_irqrestore(&ci->lock, flags);
1736 return 0;
1737 }
1738 if (!ci->remote_wakeup) {
1739 ret = -EOPNOTSUPP;
1740 goto out;
1741 }
1742 if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
1743 ret = -EINVAL;
1744 goto out;
1745 }
1746 hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
1747out:
1748 spin_unlock_irqrestore(&ci->lock, flags);
1749 return ret;
1750}
1751
1752static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1753{
1754 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1755
1756 if (ci->usb_phy)
1757 return usb_phy_set_power(ci->usb_phy, ma);
1758 return -ENOTSUPP;
1759}
1760
1761static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on)
1762{
1763 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1764 struct ci_hw_ep *hwep = ci->ep0in;
1765 unsigned long flags;
1766
1767 spin_lock_irqsave(hwep->lock, flags);
1768 _gadget->is_selfpowered = (is_on != 0);
1769 spin_unlock_irqrestore(hwep->lock, flags);
1770
1771 return 0;
1772}
1773
1774/* Change Data+ pullup status
1775 * this func is used by usb_gadget_connect/disconnect
1776 */
1777static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
1778{
1779 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1780
1781 /*
1782 * Data+ pullup controlled by OTG state machine in OTG fsm mode;
1783 * and don't touch Data+ in host mode for dual role config.
1784 */
1785 if (ci_otg_is_fsm_mode(ci) || ci->role == CI_ROLE_HOST)
1786 return 0;
1787
1788 pm_runtime_get_sync(ci->dev);
1789 if (is_on)
1790 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
1791 else
1792 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
1793 pm_runtime_put_sync(ci->dev);
1794
1795 return 0;
1796}
1797
1798static int ci_udc_start(struct usb_gadget *gadget,
1799 struct usb_gadget_driver *driver);
1800static int ci_udc_stop(struct usb_gadget *gadget);
1801
1802/* Match ISOC IN from the highest endpoint */
1803static struct usb_ep *ci_udc_match_ep(struct usb_gadget *gadget,
1804 struct usb_endpoint_descriptor *desc,
1805 struct usb_ss_ep_comp_descriptor *comp_desc)
1806{
1807 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1808 struct usb_ep *ep;
1809
1810 if (usb_endpoint_xfer_isoc(desc) && usb_endpoint_dir_in(desc)) {
1811 list_for_each_entry_reverse(ep, &ci->gadget.ep_list, ep_list) {
1812 if (ep->caps.dir_in && !ep->claimed)
1813 return ep;
1814 }
1815 }
1816
1817 return NULL;
1818}
1819
1820/*
1821 * Device operations part of the API to the USB controller hardware,
1822 * which don't involve endpoints (or i/o)
1823 * Check "usb_gadget.h" for details
1824 */
1825static const struct usb_gadget_ops usb_gadget_ops = {
1826 .get_frame = ci_udc_get_frame,
1827 .vbus_session = ci_udc_vbus_session,
1828 .wakeup = ci_udc_wakeup,
1829 .set_selfpowered = ci_udc_selfpowered,
1830 .pullup = ci_udc_pullup,
1831 .vbus_draw = ci_udc_vbus_draw,
1832 .udc_start = ci_udc_start,
1833 .udc_stop = ci_udc_stop,
1834 .match_ep = ci_udc_match_ep,
1835};
1836
1837static int init_eps(struct ci_hdrc *ci)
1838{
1839 int retval = 0, i, j;
1840
1841 for (i = 0; i < ci->hw_ep_max/2; i++)
1842 for (j = RX; j <= TX; j++) {
1843 int k = i + j * ci->hw_ep_max/2;
1844 struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
1845
1846 scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
1847 (j == TX) ? "in" : "out");
1848
1849 hwep->ci = ci;
1850 hwep->lock = &ci->lock;
1851 hwep->td_pool = ci->td_pool;
1852
1853 hwep->ep.name = hwep->name;
1854 hwep->ep.ops = &usb_ep_ops;
1855
1856 if (i == 0) {
1857 hwep->ep.caps.type_control = true;
1858 } else {
1859 hwep->ep.caps.type_iso = true;
1860 hwep->ep.caps.type_bulk = true;
1861 hwep->ep.caps.type_int = true;
1862 }
1863
1864 if (j == TX)
1865 hwep->ep.caps.dir_in = true;
1866 else
1867 hwep->ep.caps.dir_out = true;
1868
1869 /*
1870 * for ep0: maxP defined in desc, for other
1871 * eps, maxP is set by epautoconfig() called
1872 * by gadget layer
1873 */
1874 usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
1875
1876 INIT_LIST_HEAD(&hwep->qh.queue);
1877 hwep->qh.ptr = dma_pool_zalloc(ci->qh_pool, GFP_KERNEL,
1878 &hwep->qh.dma);
1879 if (hwep->qh.ptr == NULL)
1880 retval = -ENOMEM;
1881
1882 /*
1883 * set up shorthands for ep0 out and in endpoints,
1884 * don't add to gadget's ep_list
1885 */
1886 if (i == 0) {
1887 if (j == RX)
1888 ci->ep0out = hwep;
1889 else
1890 ci->ep0in = hwep;
1891
1892 usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
1893 continue;
1894 }
1895
1896 list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
1897 }
1898
1899 return retval;
1900}
1901
1902static void destroy_eps(struct ci_hdrc *ci)
1903{
1904 int i;
1905
1906 for (i = 0; i < ci->hw_ep_max; i++) {
1907 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1908
1909 if (hwep->pending_td)
1910 free_pending_td(hwep);
1911 dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
1912 }
1913}
1914
1915/**
1916 * ci_udc_start: register a gadget driver
1917 * @gadget: our gadget
1918 * @driver: the driver being registered
1919 *
1920 * Interrupts are enabled here.
1921 */
1922static int ci_udc_start(struct usb_gadget *gadget,
1923 struct usb_gadget_driver *driver)
1924{
1925 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1926 int retval;
1927
1928 if (driver->disconnect == NULL)
1929 return -EINVAL;
1930
1931 ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
1932 retval = usb_ep_enable(&ci->ep0out->ep);
1933 if (retval)
1934 return retval;
1935
1936 ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
1937 retval = usb_ep_enable(&ci->ep0in->ep);
1938 if (retval)
1939 return retval;
1940
1941 ci->driver = driver;
1942
1943 /* Start otg fsm for B-device */
1944 if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
1945 ci_hdrc_otg_fsm_start(ci);
1946 return retval;
1947 }
1948
1949 if (ci->vbus_active)
1950 ci_hdrc_gadget_connect(gadget, 1);
1951 else
1952 usb_udc_vbus_handler(&ci->gadget, false);
1953
1954 return retval;
1955}
1956
1957static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci)
1958{
1959 if (!ci_otg_is_fsm_mode(ci))
1960 return;
1961
1962 mutex_lock(&ci->fsm.lock);
1963 if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
1964 ci->fsm.a_bidl_adis_tmout = 1;
1965 ci_hdrc_otg_fsm_start(ci);
1966 } else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
1967 ci->fsm.protocol = PROTO_UNDEF;
1968 ci->fsm.otg->state = OTG_STATE_UNDEFINED;
1969 }
1970 mutex_unlock(&ci->fsm.lock);
1971}
1972
1973/*
1974 * ci_udc_stop: unregister a gadget driver
1975 */
1976static int ci_udc_stop(struct usb_gadget *gadget)
1977{
1978 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1979 unsigned long flags;
1980
1981 spin_lock_irqsave(&ci->lock, flags);
1982 ci->driver = NULL;
1983
1984 if (ci->vbus_active) {
1985 hw_device_state(ci, 0);
1986 spin_unlock_irqrestore(&ci->lock, flags);
1987 if (ci->platdata->notify_event)
1988 ci->platdata->notify_event(ci,
1989 CI_HDRC_CONTROLLER_STOPPED_EVENT);
1990 _gadget_stop_activity(&ci->gadget);
1991 spin_lock_irqsave(&ci->lock, flags);
1992 pm_runtime_put(ci->dev);
1993 }
1994
1995 spin_unlock_irqrestore(&ci->lock, flags);
1996
1997 ci_udc_stop_for_otg_fsm(ci);
1998 return 0;
1999}
2000
2001/******************************************************************************
2002 * BUS block
2003 *****************************************************************************/
2004/*
2005 * udc_irq: ci interrupt handler
2006 *
2007 * This function returns IRQ_HANDLED if the IRQ has been handled
2008 * It locks access to registers
2009 */
2010static irqreturn_t udc_irq(struct ci_hdrc *ci)
2011{
2012 irqreturn_t retval;
2013 u32 intr;
2014
2015 if (ci == NULL)
2016 return IRQ_HANDLED;
2017
2018 spin_lock(&ci->lock);
2019
2020 if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
2021 if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
2022 USBMODE_CM_DC) {
2023 spin_unlock(&ci->lock);
2024 return IRQ_NONE;
2025 }
2026 }
2027 intr = hw_test_and_clear_intr_active(ci);
2028
2029 if (intr) {
2030 /* order defines priority - do NOT change it */
2031 if (USBi_URI & intr)
2032 isr_reset_handler(ci);
2033
2034 if (USBi_PCI & intr) {
2035 ci->gadget.speed = hw_port_is_high_speed(ci) ?
2036 USB_SPEED_HIGH : USB_SPEED_FULL;
2037 if (ci->suspended) {
2038 if (ci->driver->resume) {
2039 spin_unlock(&ci->lock);
2040 ci->driver->resume(&ci->gadget);
2041 spin_lock(&ci->lock);
2042 }
2043 ci->suspended = 0;
2044 usb_gadget_set_state(&ci->gadget,
2045 ci->resume_state);
2046 }
2047 }
2048
2049 if (USBi_UI & intr)
2050 isr_tr_complete_handler(ci);
2051
2052 if ((USBi_SLI & intr) && !(ci->suspended)) {
2053 ci->suspended = 1;
2054 ci->resume_state = ci->gadget.state;
2055 if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
2056 ci->driver->suspend) {
2057 spin_unlock(&ci->lock);
2058 ci->driver->suspend(&ci->gadget);
2059 spin_lock(&ci->lock);
2060 }
2061 usb_gadget_set_state(&ci->gadget,
2062 USB_STATE_SUSPENDED);
2063 }
2064 retval = IRQ_HANDLED;
2065 } else {
2066 retval = IRQ_NONE;
2067 }
2068 spin_unlock(&ci->lock);
2069
2070 return retval;
2071}
2072
2073/**
2074 * udc_start: initialize gadget role
2075 * @ci: chipidea controller
2076 */
2077static int udc_start(struct ci_hdrc *ci)
2078{
2079 struct device *dev = ci->dev;
2080 struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps;
2081 int retval = 0;
2082
2083 ci->gadget.ops = &usb_gadget_ops;
2084 ci->gadget.speed = USB_SPEED_UNKNOWN;
2085 ci->gadget.max_speed = USB_SPEED_HIGH;
2086 ci->gadget.name = ci->platdata->name;
2087 ci->gadget.otg_caps = otg_caps;
2088 ci->gadget.sg_supported = 1;
2089 ci->gadget.irq = ci->irq;
2090
2091 if (ci->platdata->flags & CI_HDRC_REQUIRES_ALIGNED_DMA)
2092 ci->gadget.quirk_avoids_skb_reserve = 1;
2093
2094 if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support ||
2095 otg_caps->adp_support))
2096 ci->gadget.is_otg = 1;
2097
2098 INIT_LIST_HEAD(&ci->gadget.ep_list);
2099
2100 /* alloc resources */
2101 ci->qh_pool = dma_pool_create("ci_hw_qh", dev->parent,
2102 sizeof(struct ci_hw_qh),
2103 64, CI_HDRC_PAGE_SIZE);
2104 if (ci->qh_pool == NULL)
2105 return -ENOMEM;
2106
2107 ci->td_pool = dma_pool_create("ci_hw_td", dev->parent,
2108 sizeof(struct ci_hw_td),
2109 64, CI_HDRC_PAGE_SIZE);
2110 if (ci->td_pool == NULL) {
2111 retval = -ENOMEM;
2112 goto free_qh_pool;
2113 }
2114
2115 retval = init_eps(ci);
2116 if (retval)
2117 goto free_pools;
2118
2119 ci->gadget.ep0 = &ci->ep0in->ep;
2120
2121 retval = usb_add_gadget_udc(dev, &ci->gadget);
2122 if (retval)
2123 goto destroy_eps;
2124
2125 return retval;
2126
2127destroy_eps:
2128 destroy_eps(ci);
2129free_pools:
2130 dma_pool_destroy(ci->td_pool);
2131free_qh_pool:
2132 dma_pool_destroy(ci->qh_pool);
2133 return retval;
2134}
2135
2136/*
2137 * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
2138 *
2139 * No interrupts active, the IRQ has been released
2140 */
2141void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
2142{
2143 if (!ci->roles[CI_ROLE_GADGET])
2144 return;
2145
2146 usb_del_gadget_udc(&ci->gadget);
2147
2148 destroy_eps(ci);
2149
2150 dma_pool_destroy(ci->td_pool);
2151 dma_pool_destroy(ci->qh_pool);
2152}
2153
2154static int udc_id_switch_for_device(struct ci_hdrc *ci)
2155{
2156 if (ci->platdata->pins_device)
2157 pinctrl_select_state(ci->platdata->pctl,
2158 ci->platdata->pins_device);
2159
2160 if (ci->is_otg)
2161 /* Clear and enable BSV irq */
2162 hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
2163 OTGSC_BSVIS | OTGSC_BSVIE);
2164
2165 return 0;
2166}
2167
2168static void udc_id_switch_for_host(struct ci_hdrc *ci)
2169{
2170 /*
2171 * host doesn't care B_SESSION_VALID event
2172 * so clear and disable BSV irq
2173 */
2174 if (ci->is_otg)
2175 hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
2176
2177 ci->vbus_active = 0;
2178
2179 if (ci->platdata->pins_device && ci->platdata->pins_default)
2180 pinctrl_select_state(ci->platdata->pctl,
2181 ci->platdata->pins_default);
2182}
2183
2184#ifdef CONFIG_PM_SLEEP
2185static void udc_suspend(struct ci_hdrc *ci)
2186{
2187 /*
2188 * Set OP_ENDPTLISTADDR to be non-zero for
2189 * checking if controller resume from power lost
2190 * in non-host mode.
2191 */
2192 if (hw_read(ci, OP_ENDPTLISTADDR, ~0) == 0)
2193 hw_write(ci, OP_ENDPTLISTADDR, ~0, ~0);
2194}
2195
2196static void udc_resume(struct ci_hdrc *ci, bool power_lost)
2197{
2198 if (power_lost) {
2199 if (ci->is_otg)
2200 hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
2201 OTGSC_BSVIS | OTGSC_BSVIE);
2202 if (ci->vbus_active)
2203 usb_gadget_vbus_disconnect(&ci->gadget);
2204 }
2205
2206 /* Restore value 0 if it was set for power lost check */
2207 if (hw_read(ci, OP_ENDPTLISTADDR, ~0) == 0xFFFFFFFF)
2208 hw_write(ci, OP_ENDPTLISTADDR, ~0, 0);
2209}
2210#endif
2211
2212/**
2213 * ci_hdrc_gadget_init - initialize device related bits
2214 * @ci: the controller
2215 *
2216 * This function initializes the gadget, if the device is "device capable".
2217 */
2218int ci_hdrc_gadget_init(struct ci_hdrc *ci)
2219{
2220 struct ci_role_driver *rdrv;
2221 int ret;
2222
2223 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
2224 return -ENXIO;
2225
2226 rdrv = devm_kzalloc(ci->dev, sizeof(*rdrv), GFP_KERNEL);
2227 if (!rdrv)
2228 return -ENOMEM;
2229
2230 rdrv->start = udc_id_switch_for_device;
2231 rdrv->stop = udc_id_switch_for_host;
2232#ifdef CONFIG_PM_SLEEP
2233 rdrv->suspend = udc_suspend;
2234 rdrv->resume = udc_resume;
2235#endif
2236 rdrv->irq = udc_irq;
2237 rdrv->name = "gadget";
2238
2239 ret = udc_start(ci);
2240 if (!ret)
2241 ci->roles[CI_ROLE_GADGET] = rdrv;
2242
2243 return ret;
2244}
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * udc.c - ChipIdea UDC driver
4 *
5 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
6 *
7 * Author: David Lopo
8 */
9
10#include <linux/delay.h>
11#include <linux/device.h>
12#include <linux/dmapool.h>
13#include <linux/err.h>
14#include <linux/irqreturn.h>
15#include <linux/kernel.h>
16#include <linux/slab.h>
17#include <linux/pm_runtime.h>
18#include <linux/pinctrl/consumer.h>
19#include <linux/usb/ch9.h>
20#include <linux/usb/gadget.h>
21#include <linux/usb/otg-fsm.h>
22#include <linux/usb/chipidea.h>
23
24#include "ci.h"
25#include "udc.h"
26#include "bits.h"
27#include "otg.h"
28#include "otg_fsm.h"
29
30/* control endpoint description */
31static const struct usb_endpoint_descriptor
32ctrl_endpt_out_desc = {
33 .bLength = USB_DT_ENDPOINT_SIZE,
34 .bDescriptorType = USB_DT_ENDPOINT,
35
36 .bEndpointAddress = USB_DIR_OUT,
37 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
38 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
39};
40
41static const struct usb_endpoint_descriptor
42ctrl_endpt_in_desc = {
43 .bLength = USB_DT_ENDPOINT_SIZE,
44 .bDescriptorType = USB_DT_ENDPOINT,
45
46 .bEndpointAddress = USB_DIR_IN,
47 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
48 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
49};
50
51/**
52 * hw_ep_bit: calculates the bit number
53 * @num: endpoint number
54 * @dir: endpoint direction
55 *
56 * This function returns bit number
57 */
58static inline int hw_ep_bit(int num, int dir)
59{
60 return num + ((dir == TX) ? 16 : 0);
61}
62
63static inline int ep_to_bit(struct ci_hdrc *ci, int n)
64{
65 int fill = 16 - ci->hw_ep_max / 2;
66
67 if (n >= ci->hw_ep_max / 2)
68 n += fill;
69
70 return n;
71}
72
73/**
74 * hw_device_state: enables/disables interrupts (execute without interruption)
75 * @dma: 0 => disable, !0 => enable and set dma engine
76 *
77 * This function returns an error code
78 */
79static int hw_device_state(struct ci_hdrc *ci, u32 dma)
80{
81 if (dma) {
82 hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
83 /* interrupt, error, port change, reset, sleep/suspend */
84 hw_write(ci, OP_USBINTR, ~0,
85 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
86 } else {
87 hw_write(ci, OP_USBINTR, ~0, 0);
88 }
89 return 0;
90}
91
92/**
93 * hw_ep_flush: flush endpoint fifo (execute without interruption)
94 * @num: endpoint number
95 * @dir: endpoint direction
96 *
97 * This function returns an error code
98 */
99static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
100{
101 int n = hw_ep_bit(num, dir);
102
103 do {
104 /* flush any pending transfer */
105 hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
106 while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
107 cpu_relax();
108 } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
109
110 return 0;
111}
112
113/**
114 * hw_ep_disable: disables endpoint (execute without interruption)
115 * @num: endpoint number
116 * @dir: endpoint direction
117 *
118 * This function returns an error code
119 */
120static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
121{
122 hw_write(ci, OP_ENDPTCTRL + num,
123 (dir == TX) ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
124 return 0;
125}
126
127/**
128 * hw_ep_enable: enables endpoint (execute without interruption)
129 * @num: endpoint number
130 * @dir: endpoint direction
131 * @type: endpoint type
132 *
133 * This function returns an error code
134 */
135static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
136{
137 u32 mask, data;
138
139 if (dir == TX) {
140 mask = ENDPTCTRL_TXT; /* type */
141 data = type << __ffs(mask);
142
143 mask |= ENDPTCTRL_TXS; /* unstall */
144 mask |= ENDPTCTRL_TXR; /* reset data toggle */
145 data |= ENDPTCTRL_TXR;
146 mask |= ENDPTCTRL_TXE; /* enable */
147 data |= ENDPTCTRL_TXE;
148 } else {
149 mask = ENDPTCTRL_RXT; /* type */
150 data = type << __ffs(mask);
151
152 mask |= ENDPTCTRL_RXS; /* unstall */
153 mask |= ENDPTCTRL_RXR; /* reset data toggle */
154 data |= ENDPTCTRL_RXR;
155 mask |= ENDPTCTRL_RXE; /* enable */
156 data |= ENDPTCTRL_RXE;
157 }
158 hw_write(ci, OP_ENDPTCTRL + num, mask, data);
159 return 0;
160}
161
162/**
163 * hw_ep_get_halt: return endpoint halt status
164 * @num: endpoint number
165 * @dir: endpoint direction
166 *
167 * This function returns 1 if endpoint halted
168 */
169static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
170{
171 u32 mask = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
172
173 return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
174}
175
176/**
177 * hw_ep_prime: primes endpoint (execute without interruption)
178 * @num: endpoint number
179 * @dir: endpoint direction
180 * @is_ctrl: true if control endpoint
181 *
182 * This function returns an error code
183 */
184static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
185{
186 int n = hw_ep_bit(num, dir);
187
188 /* Synchronize before ep prime */
189 wmb();
190
191 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
192 return -EAGAIN;
193
194 hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
195
196 while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
197 cpu_relax();
198 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
199 return -EAGAIN;
200
201 /* status shoult be tested according with manual but it doesn't work */
202 return 0;
203}
204
205/**
206 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
207 * without interruption)
208 * @num: endpoint number
209 * @dir: endpoint direction
210 * @value: true => stall, false => unstall
211 *
212 * This function returns an error code
213 */
214static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
215{
216 if (value != 0 && value != 1)
217 return -EINVAL;
218
219 do {
220 enum ci_hw_regs reg = OP_ENDPTCTRL + num;
221 u32 mask_xs = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
222 u32 mask_xr = (dir == TX) ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
223
224 /* data toggle - reserved for EP0 but it's in ESS */
225 hw_write(ci, reg, mask_xs|mask_xr,
226 value ? mask_xs : mask_xr);
227 } while (value != hw_ep_get_halt(ci, num, dir));
228
229 return 0;
230}
231
232/**
233 * hw_is_port_high_speed: test if port is high speed
234 *
235 * This function returns true if high speed port
236 */
237static int hw_port_is_high_speed(struct ci_hdrc *ci)
238{
239 return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
240 hw_read(ci, OP_PORTSC, PORTSC_HSP);
241}
242
243/**
244 * hw_test_and_clear_complete: test & clear complete status (execute without
245 * interruption)
246 * @n: endpoint number
247 *
248 * This function returns complete status
249 */
250static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
251{
252 n = ep_to_bit(ci, n);
253 return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
254}
255
256/**
257 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
258 * without interruption)
259 *
260 * This function returns active interrutps
261 */
262static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
263{
264 u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
265
266 hw_write(ci, OP_USBSTS, ~0, reg);
267 return reg;
268}
269
270/**
271 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
272 * interruption)
273 *
274 * This function returns guard value
275 */
276static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
277{
278 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
279}
280
281/**
282 * hw_test_and_set_setup_guard: test & set setup guard (execute without
283 * interruption)
284 *
285 * This function returns guard value
286 */
287static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
288{
289 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
290}
291
292/**
293 * hw_usb_set_address: configures USB address (execute without interruption)
294 * @value: new USB address
295 *
296 * This function explicitly sets the address, without the "USBADRA" (advance)
297 * feature, which is not supported by older versions of the controller.
298 */
299static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
300{
301 hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
302 value << __ffs(DEVICEADDR_USBADR));
303}
304
305/**
306 * hw_usb_reset: restart device after a bus reset (execute without
307 * interruption)
308 *
309 * This function returns an error code
310 */
311static int hw_usb_reset(struct ci_hdrc *ci)
312{
313 hw_usb_set_address(ci, 0);
314
315 /* ESS flushes only at end?!? */
316 hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
317
318 /* clear setup token semaphores */
319 hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
320
321 /* clear complete status */
322 hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
323
324 /* wait until all bits cleared */
325 while (hw_read(ci, OP_ENDPTPRIME, ~0))
326 udelay(10); /* not RTOS friendly */
327
328 /* reset all endpoints ? */
329
330 /* reset internal status and wait for further instructions
331 no need to verify the port reset status (ESS does it) */
332
333 return 0;
334}
335
336/******************************************************************************
337 * UTIL block
338 *****************************************************************************/
339
340static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
341 unsigned length)
342{
343 int i;
344 u32 temp;
345 struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
346 GFP_ATOMIC);
347
348 if (node == NULL)
349 return -ENOMEM;
350
351 node->ptr = dma_pool_zalloc(hwep->td_pool, GFP_ATOMIC, &node->dma);
352 if (node->ptr == NULL) {
353 kfree(node);
354 return -ENOMEM;
355 }
356
357 node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
358 node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
359 node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
360 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
361 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
362
363 if (hwreq->req.length == 0
364 || hwreq->req.length % hwep->ep.maxpacket)
365 mul++;
366 node->ptr->token |= cpu_to_le32(mul << __ffs(TD_MULTO));
367 }
368
369 temp = (u32) (hwreq->req.dma + hwreq->req.actual);
370 if (length) {
371 node->ptr->page[0] = cpu_to_le32(temp);
372 for (i = 1; i < TD_PAGE_COUNT; i++) {
373 u32 page = temp + i * CI_HDRC_PAGE_SIZE;
374 page &= ~TD_RESERVED_MASK;
375 node->ptr->page[i] = cpu_to_le32(page);
376 }
377 }
378
379 hwreq->req.actual += length;
380
381 if (!list_empty(&hwreq->tds)) {
382 /* get the last entry */
383 lastnode = list_entry(hwreq->tds.prev,
384 struct td_node, td);
385 lastnode->ptr->next = cpu_to_le32(node->dma);
386 }
387
388 INIT_LIST_HEAD(&node->td);
389 list_add_tail(&node->td, &hwreq->tds);
390
391 return 0;
392}
393
394/**
395 * _usb_addr: calculates endpoint address from direction & number
396 * @ep: endpoint
397 */
398static inline u8 _usb_addr(struct ci_hw_ep *ep)
399{
400 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
401}
402
403/**
404 * _hardware_enqueue: configures a request at hardware level
405 * @hwep: endpoint
406 * @hwreq: request
407 *
408 * This function returns an error code
409 */
410static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
411{
412 struct ci_hdrc *ci = hwep->ci;
413 int ret = 0;
414 unsigned rest = hwreq->req.length;
415 int pages = TD_PAGE_COUNT;
416 struct td_node *firstnode, *lastnode;
417
418 /* don't queue twice */
419 if (hwreq->req.status == -EALREADY)
420 return -EALREADY;
421
422 hwreq->req.status = -EALREADY;
423
424 ret = usb_gadget_map_request_by_dev(ci->dev->parent,
425 &hwreq->req, hwep->dir);
426 if (ret)
427 return ret;
428
429 /*
430 * The first buffer could be not page aligned.
431 * In that case we have to span into one extra td.
432 */
433 if (hwreq->req.dma % PAGE_SIZE)
434 pages--;
435
436 if (rest == 0) {
437 ret = add_td_to_list(hwep, hwreq, 0);
438 if (ret < 0)
439 goto done;
440 }
441
442 while (rest > 0) {
443 unsigned count = min(hwreq->req.length - hwreq->req.actual,
444 (unsigned)(pages * CI_HDRC_PAGE_SIZE));
445 ret = add_td_to_list(hwep, hwreq, count);
446 if (ret < 0)
447 goto done;
448
449 rest -= count;
450 }
451
452 if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX
453 && (hwreq->req.length % hwep->ep.maxpacket == 0)) {
454 ret = add_td_to_list(hwep, hwreq, 0);
455 if (ret < 0)
456 goto done;
457 }
458
459 firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
460
461 lastnode = list_entry(hwreq->tds.prev,
462 struct td_node, td);
463
464 lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
465 if (!hwreq->req.no_interrupt)
466 lastnode->ptr->token |= cpu_to_le32(TD_IOC);
467 wmb();
468
469 hwreq->req.actual = 0;
470 if (!list_empty(&hwep->qh.queue)) {
471 struct ci_hw_req *hwreqprev;
472 int n = hw_ep_bit(hwep->num, hwep->dir);
473 int tmp_stat;
474 struct td_node *prevlastnode;
475 u32 next = firstnode->dma & TD_ADDR_MASK;
476
477 hwreqprev = list_entry(hwep->qh.queue.prev,
478 struct ci_hw_req, queue);
479 prevlastnode = list_entry(hwreqprev->tds.prev,
480 struct td_node, td);
481
482 prevlastnode->ptr->next = cpu_to_le32(next);
483 wmb();
484 if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
485 goto done;
486 do {
487 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
488 tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
489 } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
490 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
491 if (tmp_stat)
492 goto done;
493 }
494
495 /* QH configuration */
496 hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
497 hwep->qh.ptr->td.token &=
498 cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
499
500 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
501 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
502
503 if (hwreq->req.length == 0
504 || hwreq->req.length % hwep->ep.maxpacket)
505 mul++;
506 hwep->qh.ptr->cap |= cpu_to_le32(mul << __ffs(QH_MULT));
507 }
508
509 ret = hw_ep_prime(ci, hwep->num, hwep->dir,
510 hwep->type == USB_ENDPOINT_XFER_CONTROL);
511done:
512 return ret;
513}
514
515/*
516 * free_pending_td: remove a pending request for the endpoint
517 * @hwep: endpoint
518 */
519static void free_pending_td(struct ci_hw_ep *hwep)
520{
521 struct td_node *pending = hwep->pending_td;
522
523 dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
524 hwep->pending_td = NULL;
525 kfree(pending);
526}
527
528static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
529 struct td_node *node)
530{
531 hwep->qh.ptr->td.next = cpu_to_le32(node->dma);
532 hwep->qh.ptr->td.token &=
533 cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
534
535 return hw_ep_prime(ci, hwep->num, hwep->dir,
536 hwep->type == USB_ENDPOINT_XFER_CONTROL);
537}
538
539/**
540 * _hardware_dequeue: handles a request at hardware level
541 * @gadget: gadget
542 * @hwep: endpoint
543 *
544 * This function returns an error code
545 */
546static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
547{
548 u32 tmptoken;
549 struct td_node *node, *tmpnode;
550 unsigned remaining_length;
551 unsigned actual = hwreq->req.length;
552 struct ci_hdrc *ci = hwep->ci;
553
554 if (hwreq->req.status != -EALREADY)
555 return -EINVAL;
556
557 hwreq->req.status = 0;
558
559 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
560 tmptoken = le32_to_cpu(node->ptr->token);
561 if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
562 int n = hw_ep_bit(hwep->num, hwep->dir);
563
564 if (ci->rev == CI_REVISION_24)
565 if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
566 reprime_dtd(ci, hwep, node);
567 hwreq->req.status = -EALREADY;
568 return -EBUSY;
569 }
570
571 remaining_length = (tmptoken & TD_TOTAL_BYTES);
572 remaining_length >>= __ffs(TD_TOTAL_BYTES);
573 actual -= remaining_length;
574
575 hwreq->req.status = tmptoken & TD_STATUS;
576 if ((TD_STATUS_HALTED & hwreq->req.status)) {
577 hwreq->req.status = -EPIPE;
578 break;
579 } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
580 hwreq->req.status = -EPROTO;
581 break;
582 } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
583 hwreq->req.status = -EILSEQ;
584 break;
585 }
586
587 if (remaining_length) {
588 if (hwep->dir == TX) {
589 hwreq->req.status = -EPROTO;
590 break;
591 }
592 }
593 /*
594 * As the hardware could still address the freed td
595 * which will run the udc unusable, the cleanup of the
596 * td has to be delayed by one.
597 */
598 if (hwep->pending_td)
599 free_pending_td(hwep);
600
601 hwep->pending_td = node;
602 list_del_init(&node->td);
603 }
604
605 usb_gadget_unmap_request_by_dev(hwep->ci->dev->parent,
606 &hwreq->req, hwep->dir);
607
608 hwreq->req.actual += actual;
609
610 if (hwreq->req.status)
611 return hwreq->req.status;
612
613 return hwreq->req.actual;
614}
615
616/**
617 * _ep_nuke: dequeues all endpoint requests
618 * @hwep: endpoint
619 *
620 * This function returns an error code
621 * Caller must hold lock
622 */
623static int _ep_nuke(struct ci_hw_ep *hwep)
624__releases(hwep->lock)
625__acquires(hwep->lock)
626{
627 struct td_node *node, *tmpnode;
628 if (hwep == NULL)
629 return -EINVAL;
630
631 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
632
633 while (!list_empty(&hwep->qh.queue)) {
634
635 /* pop oldest request */
636 struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
637 struct ci_hw_req, queue);
638
639 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
640 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
641 list_del_init(&node->td);
642 node->ptr = NULL;
643 kfree(node);
644 }
645
646 list_del_init(&hwreq->queue);
647 hwreq->req.status = -ESHUTDOWN;
648
649 if (hwreq->req.complete != NULL) {
650 spin_unlock(hwep->lock);
651 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
652 spin_lock(hwep->lock);
653 }
654 }
655
656 if (hwep->pending_td)
657 free_pending_td(hwep);
658
659 return 0;
660}
661
662static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer)
663{
664 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
665 int direction, retval = 0;
666 unsigned long flags;
667
668 if (ep == NULL || hwep->ep.desc == NULL)
669 return -EINVAL;
670
671 if (usb_endpoint_xfer_isoc(hwep->ep.desc))
672 return -EOPNOTSUPP;
673
674 spin_lock_irqsave(hwep->lock, flags);
675
676 if (value && hwep->dir == TX && check_transfer &&
677 !list_empty(&hwep->qh.queue) &&
678 !usb_endpoint_xfer_control(hwep->ep.desc)) {
679 spin_unlock_irqrestore(hwep->lock, flags);
680 return -EAGAIN;
681 }
682
683 direction = hwep->dir;
684 do {
685 retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
686
687 if (!value)
688 hwep->wedge = 0;
689
690 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
691 hwep->dir = (hwep->dir == TX) ? RX : TX;
692
693 } while (hwep->dir != direction);
694
695 spin_unlock_irqrestore(hwep->lock, flags);
696 return retval;
697}
698
699
700/**
701 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
702 * @gadget: gadget
703 *
704 * This function returns an error code
705 */
706static int _gadget_stop_activity(struct usb_gadget *gadget)
707{
708 struct usb_ep *ep;
709 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
710 unsigned long flags;
711
712 /* flush all endpoints */
713 gadget_for_each_ep(ep, gadget) {
714 usb_ep_fifo_flush(ep);
715 }
716 usb_ep_fifo_flush(&ci->ep0out->ep);
717 usb_ep_fifo_flush(&ci->ep0in->ep);
718
719 /* make sure to disable all endpoints */
720 gadget_for_each_ep(ep, gadget) {
721 usb_ep_disable(ep);
722 }
723
724 if (ci->status != NULL) {
725 usb_ep_free_request(&ci->ep0in->ep, ci->status);
726 ci->status = NULL;
727 }
728
729 spin_lock_irqsave(&ci->lock, flags);
730 ci->gadget.speed = USB_SPEED_UNKNOWN;
731 ci->remote_wakeup = 0;
732 ci->suspended = 0;
733 spin_unlock_irqrestore(&ci->lock, flags);
734
735 return 0;
736}
737
738/******************************************************************************
739 * ISR block
740 *****************************************************************************/
741/**
742 * isr_reset_handler: USB reset interrupt handler
743 * @ci: UDC device
744 *
745 * This function resets USB engine after a bus reset occurred
746 */
747static void isr_reset_handler(struct ci_hdrc *ci)
748__releases(ci->lock)
749__acquires(ci->lock)
750{
751 int retval;
752
753 spin_unlock(&ci->lock);
754 if (ci->gadget.speed != USB_SPEED_UNKNOWN)
755 usb_gadget_udc_reset(&ci->gadget, ci->driver);
756
757 retval = _gadget_stop_activity(&ci->gadget);
758 if (retval)
759 goto done;
760
761 retval = hw_usb_reset(ci);
762 if (retval)
763 goto done;
764
765 ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
766 if (ci->status == NULL)
767 retval = -ENOMEM;
768
769done:
770 spin_lock(&ci->lock);
771
772 if (retval)
773 dev_err(ci->dev, "error: %i\n", retval);
774}
775
776/**
777 * isr_get_status_complete: get_status request complete function
778 * @ep: endpoint
779 * @req: request handled
780 *
781 * Caller must release lock
782 */
783static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
784{
785 if (ep == NULL || req == NULL)
786 return;
787
788 kfree(req->buf);
789 usb_ep_free_request(ep, req);
790}
791
792/**
793 * _ep_queue: queues (submits) an I/O request to an endpoint
794 * @ep: endpoint
795 * @req: request
796 * @gfp_flags: GFP flags (not used)
797 *
798 * Caller must hold lock
799 * This function returns an error code
800 */
801static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
802 gfp_t __maybe_unused gfp_flags)
803{
804 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
805 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
806 struct ci_hdrc *ci = hwep->ci;
807 int retval = 0;
808
809 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
810 return -EINVAL;
811
812 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
813 if (req->length)
814 hwep = (ci->ep0_dir == RX) ?
815 ci->ep0out : ci->ep0in;
816 if (!list_empty(&hwep->qh.queue)) {
817 _ep_nuke(hwep);
818 dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
819 _usb_addr(hwep));
820 }
821 }
822
823 if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
824 hwreq->req.length > hwep->ep.mult * hwep->ep.maxpacket) {
825 dev_err(hwep->ci->dev, "request length too big for isochronous\n");
826 return -EMSGSIZE;
827 }
828
829 /* first nuke then test link, e.g. previous status has not sent */
830 if (!list_empty(&hwreq->queue)) {
831 dev_err(hwep->ci->dev, "request already in queue\n");
832 return -EBUSY;
833 }
834
835 /* push request */
836 hwreq->req.status = -EINPROGRESS;
837 hwreq->req.actual = 0;
838
839 retval = _hardware_enqueue(hwep, hwreq);
840
841 if (retval == -EALREADY)
842 retval = 0;
843 if (!retval)
844 list_add_tail(&hwreq->queue, &hwep->qh.queue);
845
846 return retval;
847}
848
849/**
850 * isr_get_status_response: get_status request response
851 * @ci: ci struct
852 * @setup: setup request packet
853 *
854 * This function returns an error code
855 */
856static int isr_get_status_response(struct ci_hdrc *ci,
857 struct usb_ctrlrequest *setup)
858__releases(hwep->lock)
859__acquires(hwep->lock)
860{
861 struct ci_hw_ep *hwep = ci->ep0in;
862 struct usb_request *req = NULL;
863 gfp_t gfp_flags = GFP_ATOMIC;
864 int dir, num, retval;
865
866 if (hwep == NULL || setup == NULL)
867 return -EINVAL;
868
869 spin_unlock(hwep->lock);
870 req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
871 spin_lock(hwep->lock);
872 if (req == NULL)
873 return -ENOMEM;
874
875 req->complete = isr_get_status_complete;
876 req->length = 2;
877 req->buf = kzalloc(req->length, gfp_flags);
878 if (req->buf == NULL) {
879 retval = -ENOMEM;
880 goto err_free_req;
881 }
882
883 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
884 *(u16 *)req->buf = (ci->remote_wakeup << 1) |
885 ci->gadget.is_selfpowered;
886 } else if ((setup->bRequestType & USB_RECIP_MASK) \
887 == USB_RECIP_ENDPOINT) {
888 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
889 TX : RX;
890 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
891 *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
892 }
893 /* else do nothing; reserved for future use */
894
895 retval = _ep_queue(&hwep->ep, req, gfp_flags);
896 if (retval)
897 goto err_free_buf;
898
899 return 0;
900
901 err_free_buf:
902 kfree(req->buf);
903 err_free_req:
904 spin_unlock(hwep->lock);
905 usb_ep_free_request(&hwep->ep, req);
906 spin_lock(hwep->lock);
907 return retval;
908}
909
910/**
911 * isr_setup_status_complete: setup_status request complete function
912 * @ep: endpoint
913 * @req: request handled
914 *
915 * Caller must release lock. Put the port in test mode if test mode
916 * feature is selected.
917 */
918static void
919isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
920{
921 struct ci_hdrc *ci = req->context;
922 unsigned long flags;
923
924 if (ci->setaddr) {
925 hw_usb_set_address(ci, ci->address);
926 ci->setaddr = false;
927 if (ci->address)
928 usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS);
929 }
930
931 spin_lock_irqsave(&ci->lock, flags);
932 if (ci->test_mode)
933 hw_port_test_set(ci, ci->test_mode);
934 spin_unlock_irqrestore(&ci->lock, flags);
935}
936
937/**
938 * isr_setup_status_phase: queues the status phase of a setup transation
939 * @ci: ci struct
940 *
941 * This function returns an error code
942 */
943static int isr_setup_status_phase(struct ci_hdrc *ci)
944{
945 struct ci_hw_ep *hwep;
946
947 /*
948 * Unexpected USB controller behavior, caused by bad signal integrity
949 * or ground reference problems, can lead to isr_setup_status_phase
950 * being called with ci->status equal to NULL.
951 * If this situation occurs, you should review your USB hardware design.
952 */
953 if (WARN_ON_ONCE(!ci->status))
954 return -EPIPE;
955
956 hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
957 ci->status->context = ci;
958 ci->status->complete = isr_setup_status_complete;
959
960 return _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
961}
962
963/**
964 * isr_tr_complete_low: transaction complete low level handler
965 * @hwep: endpoint
966 *
967 * This function returns an error code
968 * Caller must hold lock
969 */
970static int isr_tr_complete_low(struct ci_hw_ep *hwep)
971__releases(hwep->lock)
972__acquires(hwep->lock)
973{
974 struct ci_hw_req *hwreq, *hwreqtemp;
975 struct ci_hw_ep *hweptemp = hwep;
976 int retval = 0;
977
978 list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
979 queue) {
980 retval = _hardware_dequeue(hwep, hwreq);
981 if (retval < 0)
982 break;
983 list_del_init(&hwreq->queue);
984 if (hwreq->req.complete != NULL) {
985 spin_unlock(hwep->lock);
986 if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
987 hwreq->req.length)
988 hweptemp = hwep->ci->ep0in;
989 usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req);
990 spin_lock(hwep->lock);
991 }
992 }
993
994 if (retval == -EBUSY)
995 retval = 0;
996
997 return retval;
998}
999
1000static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
1001{
1002 dev_warn(&ci->gadget.dev,
1003 "connect the device to an alternate port if you want HNP\n");
1004 return isr_setup_status_phase(ci);
1005}
1006
1007/**
1008 * isr_setup_packet_handler: setup packet handler
1009 * @ci: UDC descriptor
1010 *
1011 * This function handles setup packet
1012 */
1013static void isr_setup_packet_handler(struct ci_hdrc *ci)
1014__releases(ci->lock)
1015__acquires(ci->lock)
1016{
1017 struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
1018 struct usb_ctrlrequest req;
1019 int type, num, dir, err = -EINVAL;
1020 u8 tmode = 0;
1021
1022 /*
1023 * Flush data and handshake transactions of previous
1024 * setup packet.
1025 */
1026 _ep_nuke(ci->ep0out);
1027 _ep_nuke(ci->ep0in);
1028
1029 /* read_setup_packet */
1030 do {
1031 hw_test_and_set_setup_guard(ci);
1032 memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
1033 } while (!hw_test_and_clear_setup_guard(ci));
1034
1035 type = req.bRequestType;
1036
1037 ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
1038
1039 switch (req.bRequest) {
1040 case USB_REQ_CLEAR_FEATURE:
1041 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1042 le16_to_cpu(req.wValue) ==
1043 USB_ENDPOINT_HALT) {
1044 if (req.wLength != 0)
1045 break;
1046 num = le16_to_cpu(req.wIndex);
1047 dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1048 num &= USB_ENDPOINT_NUMBER_MASK;
1049 if (dir == TX)
1050 num += ci->hw_ep_max / 2;
1051 if (!ci->ci_hw_ep[num].wedge) {
1052 spin_unlock(&ci->lock);
1053 err = usb_ep_clear_halt(
1054 &ci->ci_hw_ep[num].ep);
1055 spin_lock(&ci->lock);
1056 if (err)
1057 break;
1058 }
1059 err = isr_setup_status_phase(ci);
1060 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
1061 le16_to_cpu(req.wValue) ==
1062 USB_DEVICE_REMOTE_WAKEUP) {
1063 if (req.wLength != 0)
1064 break;
1065 ci->remote_wakeup = 0;
1066 err = isr_setup_status_phase(ci);
1067 } else {
1068 goto delegate;
1069 }
1070 break;
1071 case USB_REQ_GET_STATUS:
1072 if ((type != (USB_DIR_IN|USB_RECIP_DEVICE) ||
1073 le16_to_cpu(req.wIndex) == OTG_STS_SELECTOR) &&
1074 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
1075 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
1076 goto delegate;
1077 if (le16_to_cpu(req.wLength) != 2 ||
1078 le16_to_cpu(req.wValue) != 0)
1079 break;
1080 err = isr_get_status_response(ci, &req);
1081 break;
1082 case USB_REQ_SET_ADDRESS:
1083 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
1084 goto delegate;
1085 if (le16_to_cpu(req.wLength) != 0 ||
1086 le16_to_cpu(req.wIndex) != 0)
1087 break;
1088 ci->address = (u8)le16_to_cpu(req.wValue);
1089 ci->setaddr = true;
1090 err = isr_setup_status_phase(ci);
1091 break;
1092 case USB_REQ_SET_FEATURE:
1093 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1094 le16_to_cpu(req.wValue) ==
1095 USB_ENDPOINT_HALT) {
1096 if (req.wLength != 0)
1097 break;
1098 num = le16_to_cpu(req.wIndex);
1099 dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1100 num &= USB_ENDPOINT_NUMBER_MASK;
1101 if (dir == TX)
1102 num += ci->hw_ep_max / 2;
1103
1104 spin_unlock(&ci->lock);
1105 err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false);
1106 spin_lock(&ci->lock);
1107 if (!err)
1108 isr_setup_status_phase(ci);
1109 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
1110 if (req.wLength != 0)
1111 break;
1112 switch (le16_to_cpu(req.wValue)) {
1113 case USB_DEVICE_REMOTE_WAKEUP:
1114 ci->remote_wakeup = 1;
1115 err = isr_setup_status_phase(ci);
1116 break;
1117 case USB_DEVICE_TEST_MODE:
1118 tmode = le16_to_cpu(req.wIndex) >> 8;
1119 switch (tmode) {
1120 case TEST_J:
1121 case TEST_K:
1122 case TEST_SE0_NAK:
1123 case TEST_PACKET:
1124 case TEST_FORCE_EN:
1125 ci->test_mode = tmode;
1126 err = isr_setup_status_phase(
1127 ci);
1128 break;
1129 default:
1130 break;
1131 }
1132 break;
1133 case USB_DEVICE_B_HNP_ENABLE:
1134 if (ci_otg_is_fsm_mode(ci)) {
1135 ci->gadget.b_hnp_enable = 1;
1136 err = isr_setup_status_phase(
1137 ci);
1138 }
1139 break;
1140 case USB_DEVICE_A_ALT_HNP_SUPPORT:
1141 if (ci_otg_is_fsm_mode(ci))
1142 err = otg_a_alt_hnp_support(ci);
1143 break;
1144 case USB_DEVICE_A_HNP_SUPPORT:
1145 if (ci_otg_is_fsm_mode(ci)) {
1146 ci->gadget.a_hnp_support = 1;
1147 err = isr_setup_status_phase(
1148 ci);
1149 }
1150 break;
1151 default:
1152 goto delegate;
1153 }
1154 } else {
1155 goto delegate;
1156 }
1157 break;
1158 default:
1159delegate:
1160 if (req.wLength == 0) /* no data phase */
1161 ci->ep0_dir = TX;
1162
1163 spin_unlock(&ci->lock);
1164 err = ci->driver->setup(&ci->gadget, &req);
1165 spin_lock(&ci->lock);
1166 break;
1167 }
1168
1169 if (err < 0) {
1170 spin_unlock(&ci->lock);
1171 if (_ep_set_halt(&hwep->ep, 1, false))
1172 dev_err(ci->dev, "error: _ep_set_halt\n");
1173 spin_lock(&ci->lock);
1174 }
1175}
1176
1177/**
1178 * isr_tr_complete_handler: transaction complete interrupt handler
1179 * @ci: UDC descriptor
1180 *
1181 * This function handles traffic events
1182 */
1183static void isr_tr_complete_handler(struct ci_hdrc *ci)
1184__releases(ci->lock)
1185__acquires(ci->lock)
1186{
1187 unsigned i;
1188 int err;
1189
1190 for (i = 0; i < ci->hw_ep_max; i++) {
1191 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1192
1193 if (hwep->ep.desc == NULL)
1194 continue; /* not configured */
1195
1196 if (hw_test_and_clear_complete(ci, i)) {
1197 err = isr_tr_complete_low(hwep);
1198 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1199 if (err > 0) /* needs status phase */
1200 err = isr_setup_status_phase(ci);
1201 if (err < 0) {
1202 spin_unlock(&ci->lock);
1203 if (_ep_set_halt(&hwep->ep, 1, false))
1204 dev_err(ci->dev,
1205 "error: _ep_set_halt\n");
1206 spin_lock(&ci->lock);
1207 }
1208 }
1209 }
1210
1211 /* Only handle setup packet below */
1212 if (i == 0 &&
1213 hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
1214 isr_setup_packet_handler(ci);
1215 }
1216}
1217
1218/******************************************************************************
1219 * ENDPT block
1220 *****************************************************************************/
1221/**
1222 * ep_enable: configure endpoint, making it usable
1223 *
1224 * Check usb_ep_enable() at "usb_gadget.h" for details
1225 */
1226static int ep_enable(struct usb_ep *ep,
1227 const struct usb_endpoint_descriptor *desc)
1228{
1229 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1230 int retval = 0;
1231 unsigned long flags;
1232 u32 cap = 0;
1233
1234 if (ep == NULL || desc == NULL)
1235 return -EINVAL;
1236
1237 spin_lock_irqsave(hwep->lock, flags);
1238
1239 /* only internal SW should enable ctrl endpts */
1240
1241 if (!list_empty(&hwep->qh.queue)) {
1242 dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
1243 spin_unlock_irqrestore(hwep->lock, flags);
1244 return -EBUSY;
1245 }
1246
1247 hwep->ep.desc = desc;
1248
1249 hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
1250 hwep->num = usb_endpoint_num(desc);
1251 hwep->type = usb_endpoint_type(desc);
1252
1253 hwep->ep.maxpacket = usb_endpoint_maxp(desc);
1254 hwep->ep.mult = usb_endpoint_maxp_mult(desc);
1255
1256 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1257 cap |= QH_IOS;
1258
1259 cap |= QH_ZLT;
1260 cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
1261 /*
1262 * For ISO-TX, we set mult at QH as the largest value, and use
1263 * MultO at TD as real mult value.
1264 */
1265 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
1266 cap |= 3 << __ffs(QH_MULT);
1267
1268 hwep->qh.ptr->cap = cpu_to_le32(cap);
1269
1270 hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
1271
1272 if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1273 dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
1274 retval = -EINVAL;
1275 }
1276
1277 /*
1278 * Enable endpoints in the HW other than ep0 as ep0
1279 * is always enabled
1280 */
1281 if (hwep->num)
1282 retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
1283 hwep->type);
1284
1285 spin_unlock_irqrestore(hwep->lock, flags);
1286 return retval;
1287}
1288
1289/**
1290 * ep_disable: endpoint is no longer usable
1291 *
1292 * Check usb_ep_disable() at "usb_gadget.h" for details
1293 */
1294static int ep_disable(struct usb_ep *ep)
1295{
1296 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1297 int direction, retval = 0;
1298 unsigned long flags;
1299
1300 if (ep == NULL)
1301 return -EINVAL;
1302 else if (hwep->ep.desc == NULL)
1303 return -EBUSY;
1304
1305 spin_lock_irqsave(hwep->lock, flags);
1306 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1307 spin_unlock_irqrestore(hwep->lock, flags);
1308 return 0;
1309 }
1310
1311 /* only internal SW should disable ctrl endpts */
1312
1313 direction = hwep->dir;
1314 do {
1315 retval |= _ep_nuke(hwep);
1316 retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
1317
1318 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1319 hwep->dir = (hwep->dir == TX) ? RX : TX;
1320
1321 } while (hwep->dir != direction);
1322
1323 hwep->ep.desc = NULL;
1324
1325 spin_unlock_irqrestore(hwep->lock, flags);
1326 return retval;
1327}
1328
1329/**
1330 * ep_alloc_request: allocate a request object to use with this endpoint
1331 *
1332 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
1333 */
1334static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
1335{
1336 struct ci_hw_req *hwreq = NULL;
1337
1338 if (ep == NULL)
1339 return NULL;
1340
1341 hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
1342 if (hwreq != NULL) {
1343 INIT_LIST_HEAD(&hwreq->queue);
1344 INIT_LIST_HEAD(&hwreq->tds);
1345 }
1346
1347 return (hwreq == NULL) ? NULL : &hwreq->req;
1348}
1349
1350/**
1351 * ep_free_request: frees a request object
1352 *
1353 * Check usb_ep_free_request() at "usb_gadget.h" for details
1354 */
1355static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
1356{
1357 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1358 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1359 struct td_node *node, *tmpnode;
1360 unsigned long flags;
1361
1362 if (ep == NULL || req == NULL) {
1363 return;
1364 } else if (!list_empty(&hwreq->queue)) {
1365 dev_err(hwep->ci->dev, "freeing queued request\n");
1366 return;
1367 }
1368
1369 spin_lock_irqsave(hwep->lock, flags);
1370
1371 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1372 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1373 list_del_init(&node->td);
1374 node->ptr = NULL;
1375 kfree(node);
1376 }
1377
1378 kfree(hwreq);
1379
1380 spin_unlock_irqrestore(hwep->lock, flags);
1381}
1382
1383/**
1384 * ep_queue: queues (submits) an I/O request to an endpoint
1385 *
1386 * Check usb_ep_queue()* at usb_gadget.h" for details
1387 */
1388static int ep_queue(struct usb_ep *ep, struct usb_request *req,
1389 gfp_t __maybe_unused gfp_flags)
1390{
1391 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1392 int retval = 0;
1393 unsigned long flags;
1394
1395 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
1396 return -EINVAL;
1397
1398 spin_lock_irqsave(hwep->lock, flags);
1399 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1400 spin_unlock_irqrestore(hwep->lock, flags);
1401 return 0;
1402 }
1403 retval = _ep_queue(ep, req, gfp_flags);
1404 spin_unlock_irqrestore(hwep->lock, flags);
1405 return retval;
1406}
1407
1408/**
1409 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
1410 *
1411 * Check usb_ep_dequeue() at "usb_gadget.h" for details
1412 */
1413static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
1414{
1415 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1416 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1417 unsigned long flags;
1418 struct td_node *node, *tmpnode;
1419
1420 if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
1421 hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
1422 list_empty(&hwep->qh.queue))
1423 return -EINVAL;
1424
1425 spin_lock_irqsave(hwep->lock, flags);
1426 if (hwep->ci->gadget.speed != USB_SPEED_UNKNOWN)
1427 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1428
1429 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1430 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1431 list_del(&node->td);
1432 kfree(node);
1433 }
1434
1435 /* pop request */
1436 list_del_init(&hwreq->queue);
1437
1438 usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
1439
1440 req->status = -ECONNRESET;
1441
1442 if (hwreq->req.complete != NULL) {
1443 spin_unlock(hwep->lock);
1444 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
1445 spin_lock(hwep->lock);
1446 }
1447
1448 spin_unlock_irqrestore(hwep->lock, flags);
1449 return 0;
1450}
1451
1452/**
1453 * ep_set_halt: sets the endpoint halt feature
1454 *
1455 * Check usb_ep_set_halt() at "usb_gadget.h" for details
1456 */
1457static int ep_set_halt(struct usb_ep *ep, int value)
1458{
1459 return _ep_set_halt(ep, value, true);
1460}
1461
1462/**
1463 * ep_set_wedge: sets the halt feature and ignores clear requests
1464 *
1465 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
1466 */
1467static int ep_set_wedge(struct usb_ep *ep)
1468{
1469 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1470 unsigned long flags;
1471
1472 if (ep == NULL || hwep->ep.desc == NULL)
1473 return -EINVAL;
1474
1475 spin_lock_irqsave(hwep->lock, flags);
1476 hwep->wedge = 1;
1477 spin_unlock_irqrestore(hwep->lock, flags);
1478
1479 return usb_ep_set_halt(ep);
1480}
1481
1482/**
1483 * ep_fifo_flush: flushes contents of a fifo
1484 *
1485 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
1486 */
1487static void ep_fifo_flush(struct usb_ep *ep)
1488{
1489 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1490 unsigned long flags;
1491
1492 if (ep == NULL) {
1493 dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
1494 return;
1495 }
1496
1497 spin_lock_irqsave(hwep->lock, flags);
1498 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1499 spin_unlock_irqrestore(hwep->lock, flags);
1500 return;
1501 }
1502
1503 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1504
1505 spin_unlock_irqrestore(hwep->lock, flags);
1506}
1507
1508/**
1509 * Endpoint-specific part of the API to the USB controller hardware
1510 * Check "usb_gadget.h" for details
1511 */
1512static const struct usb_ep_ops usb_ep_ops = {
1513 .enable = ep_enable,
1514 .disable = ep_disable,
1515 .alloc_request = ep_alloc_request,
1516 .free_request = ep_free_request,
1517 .queue = ep_queue,
1518 .dequeue = ep_dequeue,
1519 .set_halt = ep_set_halt,
1520 .set_wedge = ep_set_wedge,
1521 .fifo_flush = ep_fifo_flush,
1522};
1523
1524/******************************************************************************
1525 * GADGET block
1526 *****************************************************************************/
1527static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
1528{
1529 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1530 unsigned long flags;
1531 int gadget_ready = 0;
1532
1533 spin_lock_irqsave(&ci->lock, flags);
1534 ci->vbus_active = is_active;
1535 if (ci->driver)
1536 gadget_ready = 1;
1537 spin_unlock_irqrestore(&ci->lock, flags);
1538
1539 if (ci->usb_phy)
1540 usb_phy_set_charger_state(ci->usb_phy, is_active ?
1541 USB_CHARGER_PRESENT : USB_CHARGER_ABSENT);
1542
1543 if (gadget_ready) {
1544 if (is_active) {
1545 pm_runtime_get_sync(&_gadget->dev);
1546 hw_device_reset(ci);
1547 hw_device_state(ci, ci->ep0out->qh.dma);
1548 usb_gadget_set_state(_gadget, USB_STATE_POWERED);
1549 usb_udc_vbus_handler(_gadget, true);
1550 } else {
1551 usb_udc_vbus_handler(_gadget, false);
1552 if (ci->driver)
1553 ci->driver->disconnect(&ci->gadget);
1554 hw_device_state(ci, 0);
1555 if (ci->platdata->notify_event)
1556 ci->platdata->notify_event(ci,
1557 CI_HDRC_CONTROLLER_STOPPED_EVENT);
1558 _gadget_stop_activity(&ci->gadget);
1559 pm_runtime_put_sync(&_gadget->dev);
1560 usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED);
1561 }
1562 }
1563
1564 return 0;
1565}
1566
1567static int ci_udc_wakeup(struct usb_gadget *_gadget)
1568{
1569 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1570 unsigned long flags;
1571 int ret = 0;
1572
1573 spin_lock_irqsave(&ci->lock, flags);
1574 if (ci->gadget.speed == USB_SPEED_UNKNOWN) {
1575 spin_unlock_irqrestore(&ci->lock, flags);
1576 return 0;
1577 }
1578 if (!ci->remote_wakeup) {
1579 ret = -EOPNOTSUPP;
1580 goto out;
1581 }
1582 if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
1583 ret = -EINVAL;
1584 goto out;
1585 }
1586 hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
1587out:
1588 spin_unlock_irqrestore(&ci->lock, flags);
1589 return ret;
1590}
1591
1592static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1593{
1594 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1595
1596 if (ci->usb_phy)
1597 return usb_phy_set_power(ci->usb_phy, ma);
1598 return -ENOTSUPP;
1599}
1600
1601static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on)
1602{
1603 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1604 struct ci_hw_ep *hwep = ci->ep0in;
1605 unsigned long flags;
1606
1607 spin_lock_irqsave(hwep->lock, flags);
1608 _gadget->is_selfpowered = (is_on != 0);
1609 spin_unlock_irqrestore(hwep->lock, flags);
1610
1611 return 0;
1612}
1613
1614/* Change Data+ pullup status
1615 * this func is used by usb_gadget_connect/disconnet
1616 */
1617static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
1618{
1619 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1620
1621 /*
1622 * Data+ pullup controlled by OTG state machine in OTG fsm mode;
1623 * and don't touch Data+ in host mode for dual role config.
1624 */
1625 if (ci_otg_is_fsm_mode(ci) || ci->role == CI_ROLE_HOST)
1626 return 0;
1627
1628 pm_runtime_get_sync(&ci->gadget.dev);
1629 if (is_on)
1630 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
1631 else
1632 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
1633 pm_runtime_put_sync(&ci->gadget.dev);
1634
1635 return 0;
1636}
1637
1638static int ci_udc_start(struct usb_gadget *gadget,
1639 struct usb_gadget_driver *driver);
1640static int ci_udc_stop(struct usb_gadget *gadget);
1641
1642/* Match ISOC IN from the highest endpoint */
1643static struct usb_ep *ci_udc_match_ep(struct usb_gadget *gadget,
1644 struct usb_endpoint_descriptor *desc,
1645 struct usb_ss_ep_comp_descriptor *comp_desc)
1646{
1647 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1648 struct usb_ep *ep;
1649
1650 if (usb_endpoint_xfer_isoc(desc) && usb_endpoint_dir_in(desc)) {
1651 list_for_each_entry_reverse(ep, &ci->gadget.ep_list, ep_list) {
1652 if (ep->caps.dir_in && !ep->claimed)
1653 return ep;
1654 }
1655 }
1656
1657 return NULL;
1658}
1659
1660/**
1661 * Device operations part of the API to the USB controller hardware,
1662 * which don't involve endpoints (or i/o)
1663 * Check "usb_gadget.h" for details
1664 */
1665static const struct usb_gadget_ops usb_gadget_ops = {
1666 .vbus_session = ci_udc_vbus_session,
1667 .wakeup = ci_udc_wakeup,
1668 .set_selfpowered = ci_udc_selfpowered,
1669 .pullup = ci_udc_pullup,
1670 .vbus_draw = ci_udc_vbus_draw,
1671 .udc_start = ci_udc_start,
1672 .udc_stop = ci_udc_stop,
1673 .match_ep = ci_udc_match_ep,
1674};
1675
1676static int init_eps(struct ci_hdrc *ci)
1677{
1678 int retval = 0, i, j;
1679
1680 for (i = 0; i < ci->hw_ep_max/2; i++)
1681 for (j = RX; j <= TX; j++) {
1682 int k = i + j * ci->hw_ep_max/2;
1683 struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
1684
1685 scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
1686 (j == TX) ? "in" : "out");
1687
1688 hwep->ci = ci;
1689 hwep->lock = &ci->lock;
1690 hwep->td_pool = ci->td_pool;
1691
1692 hwep->ep.name = hwep->name;
1693 hwep->ep.ops = &usb_ep_ops;
1694
1695 if (i == 0) {
1696 hwep->ep.caps.type_control = true;
1697 } else {
1698 hwep->ep.caps.type_iso = true;
1699 hwep->ep.caps.type_bulk = true;
1700 hwep->ep.caps.type_int = true;
1701 }
1702
1703 if (j == TX)
1704 hwep->ep.caps.dir_in = true;
1705 else
1706 hwep->ep.caps.dir_out = true;
1707
1708 /*
1709 * for ep0: maxP defined in desc, for other
1710 * eps, maxP is set by epautoconfig() called
1711 * by gadget layer
1712 */
1713 usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
1714
1715 INIT_LIST_HEAD(&hwep->qh.queue);
1716 hwep->qh.ptr = dma_pool_zalloc(ci->qh_pool, GFP_KERNEL,
1717 &hwep->qh.dma);
1718 if (hwep->qh.ptr == NULL)
1719 retval = -ENOMEM;
1720
1721 /*
1722 * set up shorthands for ep0 out and in endpoints,
1723 * don't add to gadget's ep_list
1724 */
1725 if (i == 0) {
1726 if (j == RX)
1727 ci->ep0out = hwep;
1728 else
1729 ci->ep0in = hwep;
1730
1731 usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
1732 continue;
1733 }
1734
1735 list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
1736 }
1737
1738 return retval;
1739}
1740
1741static void destroy_eps(struct ci_hdrc *ci)
1742{
1743 int i;
1744
1745 for (i = 0; i < ci->hw_ep_max; i++) {
1746 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1747
1748 if (hwep->pending_td)
1749 free_pending_td(hwep);
1750 dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
1751 }
1752}
1753
1754/**
1755 * ci_udc_start: register a gadget driver
1756 * @gadget: our gadget
1757 * @driver: the driver being registered
1758 *
1759 * Interrupts are enabled here.
1760 */
1761static int ci_udc_start(struct usb_gadget *gadget,
1762 struct usb_gadget_driver *driver)
1763{
1764 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1765 int retval;
1766
1767 if (driver->disconnect == NULL)
1768 return -EINVAL;
1769
1770 ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
1771 retval = usb_ep_enable(&ci->ep0out->ep);
1772 if (retval)
1773 return retval;
1774
1775 ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
1776 retval = usb_ep_enable(&ci->ep0in->ep);
1777 if (retval)
1778 return retval;
1779
1780 ci->driver = driver;
1781
1782 /* Start otg fsm for B-device */
1783 if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
1784 ci_hdrc_otg_fsm_start(ci);
1785 return retval;
1786 }
1787
1788 pm_runtime_get_sync(&ci->gadget.dev);
1789 if (ci->vbus_active) {
1790 hw_device_reset(ci);
1791 } else {
1792 usb_udc_vbus_handler(&ci->gadget, false);
1793 pm_runtime_put_sync(&ci->gadget.dev);
1794 return retval;
1795 }
1796
1797 retval = hw_device_state(ci, ci->ep0out->qh.dma);
1798 if (retval)
1799 pm_runtime_put_sync(&ci->gadget.dev);
1800
1801 return retval;
1802}
1803
1804static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci)
1805{
1806 if (!ci_otg_is_fsm_mode(ci))
1807 return;
1808
1809 mutex_lock(&ci->fsm.lock);
1810 if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
1811 ci->fsm.a_bidl_adis_tmout = 1;
1812 ci_hdrc_otg_fsm_start(ci);
1813 } else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
1814 ci->fsm.protocol = PROTO_UNDEF;
1815 ci->fsm.otg->state = OTG_STATE_UNDEFINED;
1816 }
1817 mutex_unlock(&ci->fsm.lock);
1818}
1819
1820/**
1821 * ci_udc_stop: unregister a gadget driver
1822 */
1823static int ci_udc_stop(struct usb_gadget *gadget)
1824{
1825 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1826 unsigned long flags;
1827
1828 spin_lock_irqsave(&ci->lock, flags);
1829
1830 if (ci->vbus_active) {
1831 hw_device_state(ci, 0);
1832 spin_unlock_irqrestore(&ci->lock, flags);
1833 if (ci->platdata->notify_event)
1834 ci->platdata->notify_event(ci,
1835 CI_HDRC_CONTROLLER_STOPPED_EVENT);
1836 _gadget_stop_activity(&ci->gadget);
1837 spin_lock_irqsave(&ci->lock, flags);
1838 pm_runtime_put(&ci->gadget.dev);
1839 }
1840
1841 ci->driver = NULL;
1842 spin_unlock_irqrestore(&ci->lock, flags);
1843
1844 ci_udc_stop_for_otg_fsm(ci);
1845 return 0;
1846}
1847
1848/******************************************************************************
1849 * BUS block
1850 *****************************************************************************/
1851/**
1852 * udc_irq: ci interrupt handler
1853 *
1854 * This function returns IRQ_HANDLED if the IRQ has been handled
1855 * It locks access to registers
1856 */
1857static irqreturn_t udc_irq(struct ci_hdrc *ci)
1858{
1859 irqreturn_t retval;
1860 u32 intr;
1861
1862 if (ci == NULL)
1863 return IRQ_HANDLED;
1864
1865 spin_lock(&ci->lock);
1866
1867 if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
1868 if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
1869 USBMODE_CM_DC) {
1870 spin_unlock(&ci->lock);
1871 return IRQ_NONE;
1872 }
1873 }
1874 intr = hw_test_and_clear_intr_active(ci);
1875
1876 if (intr) {
1877 /* order defines priority - do NOT change it */
1878 if (USBi_URI & intr)
1879 isr_reset_handler(ci);
1880
1881 if (USBi_PCI & intr) {
1882 ci->gadget.speed = hw_port_is_high_speed(ci) ?
1883 USB_SPEED_HIGH : USB_SPEED_FULL;
1884 if (ci->suspended) {
1885 if (ci->driver->resume) {
1886 spin_unlock(&ci->lock);
1887 ci->driver->resume(&ci->gadget);
1888 spin_lock(&ci->lock);
1889 }
1890 ci->suspended = 0;
1891 usb_gadget_set_state(&ci->gadget,
1892 ci->resume_state);
1893 }
1894 }
1895
1896 if (USBi_UI & intr)
1897 isr_tr_complete_handler(ci);
1898
1899 if ((USBi_SLI & intr) && !(ci->suspended)) {
1900 ci->suspended = 1;
1901 ci->resume_state = ci->gadget.state;
1902 if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
1903 ci->driver->suspend) {
1904 spin_unlock(&ci->lock);
1905 ci->driver->suspend(&ci->gadget);
1906 spin_lock(&ci->lock);
1907 }
1908 usb_gadget_set_state(&ci->gadget,
1909 USB_STATE_SUSPENDED);
1910 }
1911 retval = IRQ_HANDLED;
1912 } else {
1913 retval = IRQ_NONE;
1914 }
1915 spin_unlock(&ci->lock);
1916
1917 return retval;
1918}
1919
1920/**
1921 * udc_start: initialize gadget role
1922 * @ci: chipidea controller
1923 */
1924static int udc_start(struct ci_hdrc *ci)
1925{
1926 struct device *dev = ci->dev;
1927 struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps;
1928 int retval = 0;
1929
1930 ci->gadget.ops = &usb_gadget_ops;
1931 ci->gadget.speed = USB_SPEED_UNKNOWN;
1932 ci->gadget.max_speed = USB_SPEED_HIGH;
1933 ci->gadget.name = ci->platdata->name;
1934 ci->gadget.otg_caps = otg_caps;
1935
1936 if (ci->platdata->flags & CI_HDRC_REQUIRES_ALIGNED_DMA)
1937 ci->gadget.quirk_avoids_skb_reserve = 1;
1938
1939 if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support ||
1940 otg_caps->adp_support))
1941 ci->gadget.is_otg = 1;
1942
1943 INIT_LIST_HEAD(&ci->gadget.ep_list);
1944
1945 /* alloc resources */
1946 ci->qh_pool = dma_pool_create("ci_hw_qh", dev->parent,
1947 sizeof(struct ci_hw_qh),
1948 64, CI_HDRC_PAGE_SIZE);
1949 if (ci->qh_pool == NULL)
1950 return -ENOMEM;
1951
1952 ci->td_pool = dma_pool_create("ci_hw_td", dev->parent,
1953 sizeof(struct ci_hw_td),
1954 64, CI_HDRC_PAGE_SIZE);
1955 if (ci->td_pool == NULL) {
1956 retval = -ENOMEM;
1957 goto free_qh_pool;
1958 }
1959
1960 retval = init_eps(ci);
1961 if (retval)
1962 goto free_pools;
1963
1964 ci->gadget.ep0 = &ci->ep0in->ep;
1965
1966 retval = usb_add_gadget_udc(dev, &ci->gadget);
1967 if (retval)
1968 goto destroy_eps;
1969
1970 pm_runtime_no_callbacks(&ci->gadget.dev);
1971 pm_runtime_enable(&ci->gadget.dev);
1972
1973 return retval;
1974
1975destroy_eps:
1976 destroy_eps(ci);
1977free_pools:
1978 dma_pool_destroy(ci->td_pool);
1979free_qh_pool:
1980 dma_pool_destroy(ci->qh_pool);
1981 return retval;
1982}
1983
1984/**
1985 * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
1986 *
1987 * No interrupts active, the IRQ has been released
1988 */
1989void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
1990{
1991 if (!ci->roles[CI_ROLE_GADGET])
1992 return;
1993
1994 usb_del_gadget_udc(&ci->gadget);
1995
1996 destroy_eps(ci);
1997
1998 dma_pool_destroy(ci->td_pool);
1999 dma_pool_destroy(ci->qh_pool);
2000}
2001
2002static int udc_id_switch_for_device(struct ci_hdrc *ci)
2003{
2004 if (ci->platdata->pins_device)
2005 pinctrl_select_state(ci->platdata->pctl,
2006 ci->platdata->pins_device);
2007
2008 if (ci->is_otg)
2009 /* Clear and enable BSV irq */
2010 hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
2011 OTGSC_BSVIS | OTGSC_BSVIE);
2012
2013 return 0;
2014}
2015
2016static void udc_id_switch_for_host(struct ci_hdrc *ci)
2017{
2018 /*
2019 * host doesn't care B_SESSION_VALID event
2020 * so clear and disbale BSV irq
2021 */
2022 if (ci->is_otg)
2023 hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
2024
2025 ci->vbus_active = 0;
2026
2027 if (ci->platdata->pins_device && ci->platdata->pins_default)
2028 pinctrl_select_state(ci->platdata->pctl,
2029 ci->platdata->pins_default);
2030}
2031
2032/**
2033 * ci_hdrc_gadget_init - initialize device related bits
2034 * ci: the controller
2035 *
2036 * This function initializes the gadget, if the device is "device capable".
2037 */
2038int ci_hdrc_gadget_init(struct ci_hdrc *ci)
2039{
2040 struct ci_role_driver *rdrv;
2041 int ret;
2042
2043 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
2044 return -ENXIO;
2045
2046 rdrv = devm_kzalloc(ci->dev, sizeof(*rdrv), GFP_KERNEL);
2047 if (!rdrv)
2048 return -ENOMEM;
2049
2050 rdrv->start = udc_id_switch_for_device;
2051 rdrv->stop = udc_id_switch_for_host;
2052 rdrv->irq = udc_irq;
2053 rdrv->name = "gadget";
2054
2055 ret = udc_start(ci);
2056 if (!ret)
2057 ci->roles[CI_ROLE_GADGET] = rdrv;
2058
2059 return ret;
2060}