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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * udc.c - ChipIdea UDC driver
4 *
5 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
6 *
7 * Author: David Lopo
8 */
9
10#include <linux/delay.h>
11#include <linux/device.h>
12#include <linux/dmapool.h>
13#include <linux/err.h>
14#include <linux/irqreturn.h>
15#include <linux/kernel.h>
16#include <linux/slab.h>
17#include <linux/pm_runtime.h>
18#include <linux/pinctrl/consumer.h>
19#include <linux/usb/ch9.h>
20#include <linux/usb/gadget.h>
21#include <linux/usb/otg-fsm.h>
22#include <linux/usb/chipidea.h>
23
24#include "ci.h"
25#include "udc.h"
26#include "bits.h"
27#include "otg.h"
28#include "otg_fsm.h"
29#include "trace.h"
30
31/* control endpoint description */
32static const struct usb_endpoint_descriptor
33ctrl_endpt_out_desc = {
34 .bLength = USB_DT_ENDPOINT_SIZE,
35 .bDescriptorType = USB_DT_ENDPOINT,
36
37 .bEndpointAddress = USB_DIR_OUT,
38 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
39 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
40};
41
42static const struct usb_endpoint_descriptor
43ctrl_endpt_in_desc = {
44 .bLength = USB_DT_ENDPOINT_SIZE,
45 .bDescriptorType = USB_DT_ENDPOINT,
46
47 .bEndpointAddress = USB_DIR_IN,
48 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
49 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
50};
51
52static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
53 struct td_node *node);
54/**
55 * hw_ep_bit: calculates the bit number
56 * @num: endpoint number
57 * @dir: endpoint direction
58 *
59 * This function returns bit number
60 */
61static inline int hw_ep_bit(int num, int dir)
62{
63 return num + ((dir == TX) ? 16 : 0);
64}
65
66static inline int ep_to_bit(struct ci_hdrc *ci, int n)
67{
68 int fill = 16 - ci->hw_ep_max / 2;
69
70 if (n >= ci->hw_ep_max / 2)
71 n += fill;
72
73 return n;
74}
75
76/**
77 * hw_device_state: enables/disables interrupts (execute without interruption)
78 * @ci: the controller
79 * @dma: 0 => disable, !0 => enable and set dma engine
80 *
81 * This function returns an error code
82 */
83static int hw_device_state(struct ci_hdrc *ci, u32 dma)
84{
85 if (dma) {
86 hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
87 /* interrupt, error, port change, reset, sleep/suspend */
88 hw_write(ci, OP_USBINTR, ~0,
89 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
90 } else {
91 hw_write(ci, OP_USBINTR, ~0, 0);
92 }
93 return 0;
94}
95
96/**
97 * hw_ep_flush: flush endpoint fifo (execute without interruption)
98 * @ci: the controller
99 * @num: endpoint number
100 * @dir: endpoint direction
101 *
102 * This function returns an error code
103 */
104static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
105{
106 int n = hw_ep_bit(num, dir);
107
108 do {
109 /* flush any pending transfer */
110 hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
111 while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
112 cpu_relax();
113 } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
114
115 return 0;
116}
117
118/**
119 * hw_ep_disable: disables endpoint (execute without interruption)
120 * @ci: the controller
121 * @num: endpoint number
122 * @dir: endpoint direction
123 *
124 * This function returns an error code
125 */
126static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
127{
128 hw_write(ci, OP_ENDPTCTRL + num,
129 (dir == TX) ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
130 return 0;
131}
132
133/**
134 * hw_ep_enable: enables endpoint (execute without interruption)
135 * @ci: the controller
136 * @num: endpoint number
137 * @dir: endpoint direction
138 * @type: endpoint type
139 *
140 * This function returns an error code
141 */
142static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
143{
144 u32 mask, data;
145
146 if (dir == TX) {
147 mask = ENDPTCTRL_TXT; /* type */
148 data = type << __ffs(mask);
149
150 mask |= ENDPTCTRL_TXS; /* unstall */
151 mask |= ENDPTCTRL_TXR; /* reset data toggle */
152 data |= ENDPTCTRL_TXR;
153 mask |= ENDPTCTRL_TXE; /* enable */
154 data |= ENDPTCTRL_TXE;
155 } else {
156 mask = ENDPTCTRL_RXT; /* type */
157 data = type << __ffs(mask);
158
159 mask |= ENDPTCTRL_RXS; /* unstall */
160 mask |= ENDPTCTRL_RXR; /* reset data toggle */
161 data |= ENDPTCTRL_RXR;
162 mask |= ENDPTCTRL_RXE; /* enable */
163 data |= ENDPTCTRL_RXE;
164 }
165 hw_write(ci, OP_ENDPTCTRL + num, mask, data);
166 return 0;
167}
168
169/**
170 * hw_ep_get_halt: return endpoint halt status
171 * @ci: the controller
172 * @num: endpoint number
173 * @dir: endpoint direction
174 *
175 * This function returns 1 if endpoint halted
176 */
177static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
178{
179 u32 mask = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
180
181 return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
182}
183
184/**
185 * hw_ep_prime: primes endpoint (execute without interruption)
186 * @ci: the controller
187 * @num: endpoint number
188 * @dir: endpoint direction
189 * @is_ctrl: true if control endpoint
190 *
191 * This function returns an error code
192 */
193static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
194{
195 int n = hw_ep_bit(num, dir);
196
197 /* Synchronize before ep prime */
198 wmb();
199
200 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
201 return -EAGAIN;
202
203 hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
204
205 while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
206 cpu_relax();
207 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
208 return -EAGAIN;
209
210 /* status shoult be tested according with manual but it doesn't work */
211 return 0;
212}
213
214/**
215 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
216 * without interruption)
217 * @ci: the controller
218 * @num: endpoint number
219 * @dir: endpoint direction
220 * @value: true => stall, false => unstall
221 *
222 * This function returns an error code
223 */
224static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
225{
226 if (value != 0 && value != 1)
227 return -EINVAL;
228
229 do {
230 enum ci_hw_regs reg = OP_ENDPTCTRL + num;
231 u32 mask_xs = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
232 u32 mask_xr = (dir == TX) ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
233
234 /* data toggle - reserved for EP0 but it's in ESS */
235 hw_write(ci, reg, mask_xs|mask_xr,
236 value ? mask_xs : mask_xr);
237 } while (value != hw_ep_get_halt(ci, num, dir));
238
239 return 0;
240}
241
242/**
243 * hw_port_is_high_speed: test if port is high speed
244 * @ci: the controller
245 *
246 * This function returns true if high speed port
247 */
248static int hw_port_is_high_speed(struct ci_hdrc *ci)
249{
250 return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
251 hw_read(ci, OP_PORTSC, PORTSC_HSP);
252}
253
254/**
255 * hw_test_and_clear_complete: test & clear complete status (execute without
256 * interruption)
257 * @ci: the controller
258 * @n: endpoint number
259 *
260 * This function returns complete status
261 */
262static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
263{
264 n = ep_to_bit(ci, n);
265 return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
266}
267
268/**
269 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
270 * without interruption)
271 * @ci: the controller
272 *
273 * This function returns active interrutps
274 */
275static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
276{
277 u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
278
279 hw_write(ci, OP_USBSTS, ~0, reg);
280 return reg;
281}
282
283/**
284 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
285 * interruption)
286 * @ci: the controller
287 *
288 * This function returns guard value
289 */
290static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
291{
292 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
293}
294
295/**
296 * hw_test_and_set_setup_guard: test & set setup guard (execute without
297 * interruption)
298 * @ci: the controller
299 *
300 * This function returns guard value
301 */
302static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
303{
304 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
305}
306
307/**
308 * hw_usb_set_address: configures USB address (execute without interruption)
309 * @ci: the controller
310 * @value: new USB address
311 *
312 * This function explicitly sets the address, without the "USBADRA" (advance)
313 * feature, which is not supported by older versions of the controller.
314 */
315static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
316{
317 hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
318 value << __ffs(DEVICEADDR_USBADR));
319}
320
321/**
322 * hw_usb_reset: restart device after a bus reset (execute without
323 * interruption)
324 * @ci: the controller
325 *
326 * This function returns an error code
327 */
328static int hw_usb_reset(struct ci_hdrc *ci)
329{
330 hw_usb_set_address(ci, 0);
331
332 /* ESS flushes only at end?!? */
333 hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
334
335 /* clear setup token semaphores */
336 hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
337
338 /* clear complete status */
339 hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
340
341 /* wait until all bits cleared */
342 while (hw_read(ci, OP_ENDPTPRIME, ~0))
343 udelay(10); /* not RTOS friendly */
344
345 /* reset all endpoints ? */
346
347 /* reset internal status and wait for further instructions
348 no need to verify the port reset status (ESS does it) */
349
350 return 0;
351}
352
353/******************************************************************************
354 * UTIL block
355 *****************************************************************************/
356
357static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
358 unsigned int length, struct scatterlist *s)
359{
360 int i;
361 u32 temp;
362 struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
363 GFP_ATOMIC);
364
365 if (node == NULL)
366 return -ENOMEM;
367
368 node->ptr = dma_pool_zalloc(hwep->td_pool, GFP_ATOMIC, &node->dma);
369 if (node->ptr == NULL) {
370 kfree(node);
371 return -ENOMEM;
372 }
373
374 node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
375 node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
376 node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
377 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
378 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
379
380 if (hwreq->req.length == 0
381 || hwreq->req.length % hwep->ep.maxpacket)
382 mul++;
383 node->ptr->token |= cpu_to_le32(mul << __ffs(TD_MULTO));
384 }
385
386 if (s) {
387 temp = (u32) (sg_dma_address(s) + hwreq->req.actual);
388 node->td_remaining_size = CI_MAX_BUF_SIZE - length;
389 } else {
390 temp = (u32) (hwreq->req.dma + hwreq->req.actual);
391 }
392
393 if (length) {
394 node->ptr->page[0] = cpu_to_le32(temp);
395 for (i = 1; i < TD_PAGE_COUNT; i++) {
396 u32 page = temp + i * CI_HDRC_PAGE_SIZE;
397 page &= ~TD_RESERVED_MASK;
398 node->ptr->page[i] = cpu_to_le32(page);
399 }
400 }
401
402 hwreq->req.actual += length;
403
404 if (!list_empty(&hwreq->tds)) {
405 /* get the last entry */
406 lastnode = list_entry(hwreq->tds.prev,
407 struct td_node, td);
408 lastnode->ptr->next = cpu_to_le32(node->dma);
409 }
410
411 INIT_LIST_HEAD(&node->td);
412 list_add_tail(&node->td, &hwreq->tds);
413
414 return 0;
415}
416
417/**
418 * _usb_addr: calculates endpoint address from direction & number
419 * @ep: endpoint
420 */
421static inline u8 _usb_addr(struct ci_hw_ep *ep)
422{
423 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
424}
425
426static int prepare_td_for_non_sg(struct ci_hw_ep *hwep,
427 struct ci_hw_req *hwreq)
428{
429 unsigned int rest = hwreq->req.length;
430 int pages = TD_PAGE_COUNT;
431 int ret = 0;
432
433 if (rest == 0) {
434 ret = add_td_to_list(hwep, hwreq, 0, NULL);
435 if (ret < 0)
436 return ret;
437 }
438
439 /*
440 * The first buffer could be not page aligned.
441 * In that case we have to span into one extra td.
442 */
443 if (hwreq->req.dma % PAGE_SIZE)
444 pages--;
445
446 while (rest > 0) {
447 unsigned int count = min(hwreq->req.length - hwreq->req.actual,
448 (unsigned int)(pages * CI_HDRC_PAGE_SIZE));
449
450 ret = add_td_to_list(hwep, hwreq, count, NULL);
451 if (ret < 0)
452 return ret;
453
454 rest -= count;
455 }
456
457 if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX
458 && (hwreq->req.length % hwep->ep.maxpacket == 0)) {
459 ret = add_td_to_list(hwep, hwreq, 0, NULL);
460 if (ret < 0)
461 return ret;
462 }
463
464 return ret;
465}
466
467static int prepare_td_per_sg(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
468 struct scatterlist *s)
469{
470 unsigned int rest = sg_dma_len(s);
471 int ret = 0;
472
473 hwreq->req.actual = 0;
474 while (rest > 0) {
475 unsigned int count = min_t(unsigned int, rest,
476 CI_MAX_BUF_SIZE);
477
478 ret = add_td_to_list(hwep, hwreq, count, s);
479 if (ret < 0)
480 return ret;
481
482 rest -= count;
483 }
484
485 return ret;
486}
487
488static void ci_add_buffer_entry(struct td_node *node, struct scatterlist *s)
489{
490 int empty_td_slot_index = (CI_MAX_BUF_SIZE - node->td_remaining_size)
491 / CI_HDRC_PAGE_SIZE;
492 int i;
493 u32 token;
494
495 token = le32_to_cpu(node->ptr->token) + (sg_dma_len(s) << __ffs(TD_TOTAL_BYTES));
496 node->ptr->token = cpu_to_le32(token);
497
498 for (i = empty_td_slot_index; i < TD_PAGE_COUNT; i++) {
499 u32 page = (u32) sg_dma_address(s) +
500 (i - empty_td_slot_index) * CI_HDRC_PAGE_SIZE;
501
502 page &= ~TD_RESERVED_MASK;
503 node->ptr->page[i] = cpu_to_le32(page);
504 }
505}
506
507static int prepare_td_for_sg(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
508{
509 struct usb_request *req = &hwreq->req;
510 struct scatterlist *s = req->sg;
511 int ret = 0, i = 0;
512 struct td_node *node = NULL;
513
514 if (!s || req->zero || req->length == 0) {
515 dev_err(hwep->ci->dev, "not supported operation for sg\n");
516 return -EINVAL;
517 }
518
519 while (i++ < req->num_mapped_sgs) {
520 if (sg_dma_address(s) % PAGE_SIZE) {
521 dev_err(hwep->ci->dev, "not page aligned sg buffer\n");
522 return -EINVAL;
523 }
524
525 if (node && (node->td_remaining_size >= sg_dma_len(s))) {
526 ci_add_buffer_entry(node, s);
527 node->td_remaining_size -= sg_dma_len(s);
528 } else {
529 ret = prepare_td_per_sg(hwep, hwreq, s);
530 if (ret)
531 return ret;
532
533 node = list_entry(hwreq->tds.prev,
534 struct td_node, td);
535 }
536
537 s = sg_next(s);
538 }
539
540 return ret;
541}
542
543/**
544 * _hardware_enqueue: configures a request at hardware level
545 * @hwep: endpoint
546 * @hwreq: request
547 *
548 * This function returns an error code
549 */
550static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
551{
552 struct ci_hdrc *ci = hwep->ci;
553 int ret = 0;
554 struct td_node *firstnode, *lastnode;
555
556 /* don't queue twice */
557 if (hwreq->req.status == -EALREADY)
558 return -EALREADY;
559
560 hwreq->req.status = -EALREADY;
561
562 ret = usb_gadget_map_request_by_dev(ci->dev->parent,
563 &hwreq->req, hwep->dir);
564 if (ret)
565 return ret;
566
567 if (hwreq->req.num_mapped_sgs)
568 ret = prepare_td_for_sg(hwep, hwreq);
569 else
570 ret = prepare_td_for_non_sg(hwep, hwreq);
571
572 if (ret)
573 return ret;
574
575 lastnode = list_entry(hwreq->tds.prev,
576 struct td_node, td);
577
578 lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
579 if (!hwreq->req.no_interrupt)
580 lastnode->ptr->token |= cpu_to_le32(TD_IOC);
581
582 list_for_each_entry_safe(firstnode, lastnode, &hwreq->tds, td)
583 trace_ci_prepare_td(hwep, hwreq, firstnode);
584
585 firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
586
587 wmb();
588
589 hwreq->req.actual = 0;
590 if (!list_empty(&hwep->qh.queue)) {
591 struct ci_hw_req *hwreqprev;
592 int n = hw_ep_bit(hwep->num, hwep->dir);
593 int tmp_stat;
594 struct td_node *prevlastnode;
595 u32 next = firstnode->dma & TD_ADDR_MASK;
596
597 hwreqprev = list_entry(hwep->qh.queue.prev,
598 struct ci_hw_req, queue);
599 prevlastnode = list_entry(hwreqprev->tds.prev,
600 struct td_node, td);
601
602 prevlastnode->ptr->next = cpu_to_le32(next);
603 wmb();
604
605 if (ci->rev == CI_REVISION_22) {
606 if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
607 reprime_dtd(ci, hwep, prevlastnode);
608 }
609
610 if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
611 goto done;
612 do {
613 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
614 tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
615 } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
616 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
617 if (tmp_stat)
618 goto done;
619 }
620
621 /* QH configuration */
622 hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
623 hwep->qh.ptr->td.token &=
624 cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
625
626 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
627 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
628
629 if (hwreq->req.length == 0
630 || hwreq->req.length % hwep->ep.maxpacket)
631 mul++;
632 hwep->qh.ptr->cap |= cpu_to_le32(mul << __ffs(QH_MULT));
633 }
634
635 ret = hw_ep_prime(ci, hwep->num, hwep->dir,
636 hwep->type == USB_ENDPOINT_XFER_CONTROL);
637done:
638 return ret;
639}
640
641/**
642 * free_pending_td: remove a pending request for the endpoint
643 * @hwep: endpoint
644 */
645static void free_pending_td(struct ci_hw_ep *hwep)
646{
647 struct td_node *pending = hwep->pending_td;
648
649 dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
650 hwep->pending_td = NULL;
651 kfree(pending);
652}
653
654static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
655 struct td_node *node)
656{
657 hwep->qh.ptr->td.next = cpu_to_le32(node->dma);
658 hwep->qh.ptr->td.token &=
659 cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
660
661 return hw_ep_prime(ci, hwep->num, hwep->dir,
662 hwep->type == USB_ENDPOINT_XFER_CONTROL);
663}
664
665/**
666 * _hardware_dequeue: handles a request at hardware level
667 * @hwep: endpoint
668 * @hwreq: request
669 *
670 * This function returns an error code
671 */
672static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
673{
674 u32 tmptoken;
675 struct td_node *node, *tmpnode;
676 unsigned remaining_length;
677 unsigned actual = hwreq->req.length;
678 struct ci_hdrc *ci = hwep->ci;
679
680 if (hwreq->req.status != -EALREADY)
681 return -EINVAL;
682
683 hwreq->req.status = 0;
684
685 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
686 tmptoken = le32_to_cpu(node->ptr->token);
687 trace_ci_complete_td(hwep, hwreq, node);
688 if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
689 int n = hw_ep_bit(hwep->num, hwep->dir);
690
691 if (ci->rev == CI_REVISION_24)
692 if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
693 reprime_dtd(ci, hwep, node);
694 hwreq->req.status = -EALREADY;
695 return -EBUSY;
696 }
697
698 remaining_length = (tmptoken & TD_TOTAL_BYTES);
699 remaining_length >>= __ffs(TD_TOTAL_BYTES);
700 actual -= remaining_length;
701
702 hwreq->req.status = tmptoken & TD_STATUS;
703 if ((TD_STATUS_HALTED & hwreq->req.status)) {
704 hwreq->req.status = -EPIPE;
705 break;
706 } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
707 hwreq->req.status = -EPROTO;
708 break;
709 } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
710 hwreq->req.status = -EILSEQ;
711 break;
712 }
713
714 if (remaining_length) {
715 if (hwep->dir == TX) {
716 hwreq->req.status = -EPROTO;
717 break;
718 }
719 }
720 /*
721 * As the hardware could still address the freed td
722 * which will run the udc unusable, the cleanup of the
723 * td has to be delayed by one.
724 */
725 if (hwep->pending_td)
726 free_pending_td(hwep);
727
728 hwep->pending_td = node;
729 list_del_init(&node->td);
730 }
731
732 usb_gadget_unmap_request_by_dev(hwep->ci->dev->parent,
733 &hwreq->req, hwep->dir);
734
735 hwreq->req.actual += actual;
736
737 if (hwreq->req.status)
738 return hwreq->req.status;
739
740 return hwreq->req.actual;
741}
742
743/**
744 * _ep_nuke: dequeues all endpoint requests
745 * @hwep: endpoint
746 *
747 * This function returns an error code
748 * Caller must hold lock
749 */
750static int _ep_nuke(struct ci_hw_ep *hwep)
751__releases(hwep->lock)
752__acquires(hwep->lock)
753{
754 struct td_node *node, *tmpnode;
755 if (hwep == NULL)
756 return -EINVAL;
757
758 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
759
760 while (!list_empty(&hwep->qh.queue)) {
761
762 /* pop oldest request */
763 struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
764 struct ci_hw_req, queue);
765
766 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
767 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
768 list_del_init(&node->td);
769 node->ptr = NULL;
770 kfree(node);
771 }
772
773 list_del_init(&hwreq->queue);
774 hwreq->req.status = -ESHUTDOWN;
775
776 if (hwreq->req.complete != NULL) {
777 spin_unlock(hwep->lock);
778 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
779 spin_lock(hwep->lock);
780 }
781 }
782
783 if (hwep->pending_td)
784 free_pending_td(hwep);
785
786 return 0;
787}
788
789static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer)
790{
791 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
792 int direction, retval = 0;
793 unsigned long flags;
794
795 if (ep == NULL || hwep->ep.desc == NULL)
796 return -EINVAL;
797
798 if (usb_endpoint_xfer_isoc(hwep->ep.desc))
799 return -EOPNOTSUPP;
800
801 spin_lock_irqsave(hwep->lock, flags);
802
803 if (value && hwep->dir == TX && check_transfer &&
804 !list_empty(&hwep->qh.queue) &&
805 !usb_endpoint_xfer_control(hwep->ep.desc)) {
806 spin_unlock_irqrestore(hwep->lock, flags);
807 return -EAGAIN;
808 }
809
810 direction = hwep->dir;
811 do {
812 retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
813
814 if (!value)
815 hwep->wedge = 0;
816
817 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
818 hwep->dir = (hwep->dir == TX) ? RX : TX;
819
820 } while (hwep->dir != direction);
821
822 spin_unlock_irqrestore(hwep->lock, flags);
823 return retval;
824}
825
826
827/**
828 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
829 * @gadget: gadget
830 *
831 * This function returns an error code
832 */
833static int _gadget_stop_activity(struct usb_gadget *gadget)
834{
835 struct usb_ep *ep;
836 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
837 unsigned long flags;
838
839 /* flush all endpoints */
840 gadget_for_each_ep(ep, gadget) {
841 usb_ep_fifo_flush(ep);
842 }
843 usb_ep_fifo_flush(&ci->ep0out->ep);
844 usb_ep_fifo_flush(&ci->ep0in->ep);
845
846 /* make sure to disable all endpoints */
847 gadget_for_each_ep(ep, gadget) {
848 usb_ep_disable(ep);
849 }
850
851 if (ci->status != NULL) {
852 usb_ep_free_request(&ci->ep0in->ep, ci->status);
853 ci->status = NULL;
854 }
855
856 spin_lock_irqsave(&ci->lock, flags);
857 ci->gadget.speed = USB_SPEED_UNKNOWN;
858 ci->remote_wakeup = 0;
859 ci->suspended = 0;
860 spin_unlock_irqrestore(&ci->lock, flags);
861
862 return 0;
863}
864
865/******************************************************************************
866 * ISR block
867 *****************************************************************************/
868/**
869 * isr_reset_handler: USB reset interrupt handler
870 * @ci: UDC device
871 *
872 * This function resets USB engine after a bus reset occurred
873 */
874static void isr_reset_handler(struct ci_hdrc *ci)
875__releases(ci->lock)
876__acquires(ci->lock)
877{
878 int retval;
879
880 spin_unlock(&ci->lock);
881 if (ci->gadget.speed != USB_SPEED_UNKNOWN)
882 usb_gadget_udc_reset(&ci->gadget, ci->driver);
883
884 retval = _gadget_stop_activity(&ci->gadget);
885 if (retval)
886 goto done;
887
888 retval = hw_usb_reset(ci);
889 if (retval)
890 goto done;
891
892 ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
893 if (ci->status == NULL)
894 retval = -ENOMEM;
895
896done:
897 spin_lock(&ci->lock);
898
899 if (retval)
900 dev_err(ci->dev, "error: %i\n", retval);
901}
902
903/**
904 * isr_get_status_complete: get_status request complete function
905 * @ep: endpoint
906 * @req: request handled
907 *
908 * Caller must release lock
909 */
910static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
911{
912 if (ep == NULL || req == NULL)
913 return;
914
915 kfree(req->buf);
916 usb_ep_free_request(ep, req);
917}
918
919/**
920 * _ep_queue: queues (submits) an I/O request to an endpoint
921 * @ep: endpoint
922 * @req: request
923 * @gfp_flags: GFP flags (not used)
924 *
925 * Caller must hold lock
926 * This function returns an error code
927 */
928static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
929 gfp_t __maybe_unused gfp_flags)
930{
931 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
932 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
933 struct ci_hdrc *ci = hwep->ci;
934 int retval = 0;
935
936 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
937 return -EINVAL;
938
939 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
940 if (req->length)
941 hwep = (ci->ep0_dir == RX) ?
942 ci->ep0out : ci->ep0in;
943 if (!list_empty(&hwep->qh.queue)) {
944 _ep_nuke(hwep);
945 dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
946 _usb_addr(hwep));
947 }
948 }
949
950 if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
951 hwreq->req.length > hwep->ep.mult * hwep->ep.maxpacket) {
952 dev_err(hwep->ci->dev, "request length too big for isochronous\n");
953 return -EMSGSIZE;
954 }
955
956 /* first nuke then test link, e.g. previous status has not sent */
957 if (!list_empty(&hwreq->queue)) {
958 dev_err(hwep->ci->dev, "request already in queue\n");
959 return -EBUSY;
960 }
961
962 /* push request */
963 hwreq->req.status = -EINPROGRESS;
964 hwreq->req.actual = 0;
965
966 retval = _hardware_enqueue(hwep, hwreq);
967
968 if (retval == -EALREADY)
969 retval = 0;
970 if (!retval)
971 list_add_tail(&hwreq->queue, &hwep->qh.queue);
972
973 return retval;
974}
975
976/**
977 * isr_get_status_response: get_status request response
978 * @ci: ci struct
979 * @setup: setup request packet
980 *
981 * This function returns an error code
982 */
983static int isr_get_status_response(struct ci_hdrc *ci,
984 struct usb_ctrlrequest *setup)
985__releases(hwep->lock)
986__acquires(hwep->lock)
987{
988 struct ci_hw_ep *hwep = ci->ep0in;
989 struct usb_request *req = NULL;
990 gfp_t gfp_flags = GFP_ATOMIC;
991 int dir, num, retval;
992
993 if (hwep == NULL || setup == NULL)
994 return -EINVAL;
995
996 spin_unlock(hwep->lock);
997 req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
998 spin_lock(hwep->lock);
999 if (req == NULL)
1000 return -ENOMEM;
1001
1002 req->complete = isr_get_status_complete;
1003 req->length = 2;
1004 req->buf = kzalloc(req->length, gfp_flags);
1005 if (req->buf == NULL) {
1006 retval = -ENOMEM;
1007 goto err_free_req;
1008 }
1009
1010 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
1011 *(u16 *)req->buf = (ci->remote_wakeup << 1) |
1012 ci->gadget.is_selfpowered;
1013 } else if ((setup->bRequestType & USB_RECIP_MASK) \
1014 == USB_RECIP_ENDPOINT) {
1015 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
1016 TX : RX;
1017 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
1018 *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
1019 }
1020 /* else do nothing; reserved for future use */
1021
1022 retval = _ep_queue(&hwep->ep, req, gfp_flags);
1023 if (retval)
1024 goto err_free_buf;
1025
1026 return 0;
1027
1028 err_free_buf:
1029 kfree(req->buf);
1030 err_free_req:
1031 spin_unlock(hwep->lock);
1032 usb_ep_free_request(&hwep->ep, req);
1033 spin_lock(hwep->lock);
1034 return retval;
1035}
1036
1037/**
1038 * isr_setup_status_complete: setup_status request complete function
1039 * @ep: endpoint
1040 * @req: request handled
1041 *
1042 * Caller must release lock. Put the port in test mode if test mode
1043 * feature is selected.
1044 */
1045static void
1046isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
1047{
1048 struct ci_hdrc *ci = req->context;
1049 unsigned long flags;
1050
1051 if (req->status < 0)
1052 return;
1053
1054 if (ci->setaddr) {
1055 hw_usb_set_address(ci, ci->address);
1056 ci->setaddr = false;
1057 if (ci->address)
1058 usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS);
1059 }
1060
1061 spin_lock_irqsave(&ci->lock, flags);
1062 if (ci->test_mode)
1063 hw_port_test_set(ci, ci->test_mode);
1064 spin_unlock_irqrestore(&ci->lock, flags);
1065}
1066
1067/**
1068 * isr_setup_status_phase: queues the status phase of a setup transation
1069 * @ci: ci struct
1070 *
1071 * This function returns an error code
1072 */
1073static int isr_setup_status_phase(struct ci_hdrc *ci)
1074{
1075 struct ci_hw_ep *hwep;
1076
1077 /*
1078 * Unexpected USB controller behavior, caused by bad signal integrity
1079 * or ground reference problems, can lead to isr_setup_status_phase
1080 * being called with ci->status equal to NULL.
1081 * If this situation occurs, you should review your USB hardware design.
1082 */
1083 if (WARN_ON_ONCE(!ci->status))
1084 return -EPIPE;
1085
1086 hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
1087 ci->status->context = ci;
1088 ci->status->complete = isr_setup_status_complete;
1089
1090 return _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
1091}
1092
1093/**
1094 * isr_tr_complete_low: transaction complete low level handler
1095 * @hwep: endpoint
1096 *
1097 * This function returns an error code
1098 * Caller must hold lock
1099 */
1100static int isr_tr_complete_low(struct ci_hw_ep *hwep)
1101__releases(hwep->lock)
1102__acquires(hwep->lock)
1103{
1104 struct ci_hw_req *hwreq, *hwreqtemp;
1105 struct ci_hw_ep *hweptemp = hwep;
1106 int retval = 0;
1107
1108 list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
1109 queue) {
1110 retval = _hardware_dequeue(hwep, hwreq);
1111 if (retval < 0)
1112 break;
1113 list_del_init(&hwreq->queue);
1114 if (hwreq->req.complete != NULL) {
1115 spin_unlock(hwep->lock);
1116 if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
1117 hwreq->req.length)
1118 hweptemp = hwep->ci->ep0in;
1119 usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req);
1120 spin_lock(hwep->lock);
1121 }
1122 }
1123
1124 if (retval == -EBUSY)
1125 retval = 0;
1126
1127 return retval;
1128}
1129
1130static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
1131{
1132 dev_warn(&ci->gadget.dev,
1133 "connect the device to an alternate port if you want HNP\n");
1134 return isr_setup_status_phase(ci);
1135}
1136
1137/**
1138 * isr_setup_packet_handler: setup packet handler
1139 * @ci: UDC descriptor
1140 *
1141 * This function handles setup packet
1142 */
1143static void isr_setup_packet_handler(struct ci_hdrc *ci)
1144__releases(ci->lock)
1145__acquires(ci->lock)
1146{
1147 struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
1148 struct usb_ctrlrequest req;
1149 int type, num, dir, err = -EINVAL;
1150 u8 tmode = 0;
1151
1152 /*
1153 * Flush data and handshake transactions of previous
1154 * setup packet.
1155 */
1156 _ep_nuke(ci->ep0out);
1157 _ep_nuke(ci->ep0in);
1158
1159 /* read_setup_packet */
1160 do {
1161 hw_test_and_set_setup_guard(ci);
1162 memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
1163 } while (!hw_test_and_clear_setup_guard(ci));
1164
1165 type = req.bRequestType;
1166
1167 ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
1168
1169 switch (req.bRequest) {
1170 case USB_REQ_CLEAR_FEATURE:
1171 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1172 le16_to_cpu(req.wValue) ==
1173 USB_ENDPOINT_HALT) {
1174 if (req.wLength != 0)
1175 break;
1176 num = le16_to_cpu(req.wIndex);
1177 dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1178 num &= USB_ENDPOINT_NUMBER_MASK;
1179 if (dir == TX)
1180 num += ci->hw_ep_max / 2;
1181 if (!ci->ci_hw_ep[num].wedge) {
1182 spin_unlock(&ci->lock);
1183 err = usb_ep_clear_halt(
1184 &ci->ci_hw_ep[num].ep);
1185 spin_lock(&ci->lock);
1186 if (err)
1187 break;
1188 }
1189 err = isr_setup_status_phase(ci);
1190 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
1191 le16_to_cpu(req.wValue) ==
1192 USB_DEVICE_REMOTE_WAKEUP) {
1193 if (req.wLength != 0)
1194 break;
1195 ci->remote_wakeup = 0;
1196 err = isr_setup_status_phase(ci);
1197 } else {
1198 goto delegate;
1199 }
1200 break;
1201 case USB_REQ_GET_STATUS:
1202 if ((type != (USB_DIR_IN|USB_RECIP_DEVICE) ||
1203 le16_to_cpu(req.wIndex) == OTG_STS_SELECTOR) &&
1204 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
1205 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
1206 goto delegate;
1207 if (le16_to_cpu(req.wLength) != 2 ||
1208 le16_to_cpu(req.wValue) != 0)
1209 break;
1210 err = isr_get_status_response(ci, &req);
1211 break;
1212 case USB_REQ_SET_ADDRESS:
1213 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
1214 goto delegate;
1215 if (le16_to_cpu(req.wLength) != 0 ||
1216 le16_to_cpu(req.wIndex) != 0)
1217 break;
1218 ci->address = (u8)le16_to_cpu(req.wValue);
1219 ci->setaddr = true;
1220 err = isr_setup_status_phase(ci);
1221 break;
1222 case USB_REQ_SET_FEATURE:
1223 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1224 le16_to_cpu(req.wValue) ==
1225 USB_ENDPOINT_HALT) {
1226 if (req.wLength != 0)
1227 break;
1228 num = le16_to_cpu(req.wIndex);
1229 dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1230 num &= USB_ENDPOINT_NUMBER_MASK;
1231 if (dir == TX)
1232 num += ci->hw_ep_max / 2;
1233
1234 spin_unlock(&ci->lock);
1235 err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false);
1236 spin_lock(&ci->lock);
1237 if (!err)
1238 isr_setup_status_phase(ci);
1239 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
1240 if (req.wLength != 0)
1241 break;
1242 switch (le16_to_cpu(req.wValue)) {
1243 case USB_DEVICE_REMOTE_WAKEUP:
1244 ci->remote_wakeup = 1;
1245 err = isr_setup_status_phase(ci);
1246 break;
1247 case USB_DEVICE_TEST_MODE:
1248 tmode = le16_to_cpu(req.wIndex) >> 8;
1249 switch (tmode) {
1250 case USB_TEST_J:
1251 case USB_TEST_K:
1252 case USB_TEST_SE0_NAK:
1253 case USB_TEST_PACKET:
1254 case USB_TEST_FORCE_ENABLE:
1255 ci->test_mode = tmode;
1256 err = isr_setup_status_phase(
1257 ci);
1258 break;
1259 default:
1260 break;
1261 }
1262 break;
1263 case USB_DEVICE_B_HNP_ENABLE:
1264 if (ci_otg_is_fsm_mode(ci)) {
1265 ci->gadget.b_hnp_enable = 1;
1266 err = isr_setup_status_phase(
1267 ci);
1268 }
1269 break;
1270 case USB_DEVICE_A_ALT_HNP_SUPPORT:
1271 if (ci_otg_is_fsm_mode(ci))
1272 err = otg_a_alt_hnp_support(ci);
1273 break;
1274 case USB_DEVICE_A_HNP_SUPPORT:
1275 if (ci_otg_is_fsm_mode(ci)) {
1276 ci->gadget.a_hnp_support = 1;
1277 err = isr_setup_status_phase(
1278 ci);
1279 }
1280 break;
1281 default:
1282 goto delegate;
1283 }
1284 } else {
1285 goto delegate;
1286 }
1287 break;
1288 default:
1289delegate:
1290 if (req.wLength == 0) /* no data phase */
1291 ci->ep0_dir = TX;
1292
1293 spin_unlock(&ci->lock);
1294 err = ci->driver->setup(&ci->gadget, &req);
1295 spin_lock(&ci->lock);
1296 break;
1297 }
1298
1299 if (err < 0) {
1300 spin_unlock(&ci->lock);
1301 if (_ep_set_halt(&hwep->ep, 1, false))
1302 dev_err(ci->dev, "error: _ep_set_halt\n");
1303 spin_lock(&ci->lock);
1304 }
1305}
1306
1307/**
1308 * isr_tr_complete_handler: transaction complete interrupt handler
1309 * @ci: UDC descriptor
1310 *
1311 * This function handles traffic events
1312 */
1313static void isr_tr_complete_handler(struct ci_hdrc *ci)
1314__releases(ci->lock)
1315__acquires(ci->lock)
1316{
1317 unsigned i;
1318 int err;
1319
1320 for (i = 0; i < ci->hw_ep_max; i++) {
1321 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1322
1323 if (hwep->ep.desc == NULL)
1324 continue; /* not configured */
1325
1326 if (hw_test_and_clear_complete(ci, i)) {
1327 err = isr_tr_complete_low(hwep);
1328 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1329 if (err > 0) /* needs status phase */
1330 err = isr_setup_status_phase(ci);
1331 if (err < 0) {
1332 spin_unlock(&ci->lock);
1333 if (_ep_set_halt(&hwep->ep, 1, false))
1334 dev_err(ci->dev,
1335 "error: _ep_set_halt\n");
1336 spin_lock(&ci->lock);
1337 }
1338 }
1339 }
1340
1341 /* Only handle setup packet below */
1342 if (i == 0 &&
1343 hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
1344 isr_setup_packet_handler(ci);
1345 }
1346}
1347
1348/******************************************************************************
1349 * ENDPT block
1350 *****************************************************************************/
1351/*
1352 * ep_enable: configure endpoint, making it usable
1353 *
1354 * Check usb_ep_enable() at "usb_gadget.h" for details
1355 */
1356static int ep_enable(struct usb_ep *ep,
1357 const struct usb_endpoint_descriptor *desc)
1358{
1359 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1360 int retval = 0;
1361 unsigned long flags;
1362 u32 cap = 0;
1363
1364 if (ep == NULL || desc == NULL)
1365 return -EINVAL;
1366
1367 spin_lock_irqsave(hwep->lock, flags);
1368
1369 /* only internal SW should enable ctrl endpts */
1370
1371 if (!list_empty(&hwep->qh.queue)) {
1372 dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
1373 spin_unlock_irqrestore(hwep->lock, flags);
1374 return -EBUSY;
1375 }
1376
1377 hwep->ep.desc = desc;
1378
1379 hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
1380 hwep->num = usb_endpoint_num(desc);
1381 hwep->type = usb_endpoint_type(desc);
1382
1383 hwep->ep.maxpacket = usb_endpoint_maxp(desc);
1384 hwep->ep.mult = usb_endpoint_maxp_mult(desc);
1385
1386 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1387 cap |= QH_IOS;
1388
1389 cap |= QH_ZLT;
1390 cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
1391 /*
1392 * For ISO-TX, we set mult at QH as the largest value, and use
1393 * MultO at TD as real mult value.
1394 */
1395 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
1396 cap |= 3 << __ffs(QH_MULT);
1397
1398 hwep->qh.ptr->cap = cpu_to_le32(cap);
1399
1400 hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
1401
1402 if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1403 dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
1404 retval = -EINVAL;
1405 }
1406
1407 /*
1408 * Enable endpoints in the HW other than ep0 as ep0
1409 * is always enabled
1410 */
1411 if (hwep->num)
1412 retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
1413 hwep->type);
1414
1415 spin_unlock_irqrestore(hwep->lock, flags);
1416 return retval;
1417}
1418
1419/*
1420 * ep_disable: endpoint is no longer usable
1421 *
1422 * Check usb_ep_disable() at "usb_gadget.h" for details
1423 */
1424static int ep_disable(struct usb_ep *ep)
1425{
1426 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1427 int direction, retval = 0;
1428 unsigned long flags;
1429
1430 if (ep == NULL)
1431 return -EINVAL;
1432 else if (hwep->ep.desc == NULL)
1433 return -EBUSY;
1434
1435 spin_lock_irqsave(hwep->lock, flags);
1436 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1437 spin_unlock_irqrestore(hwep->lock, flags);
1438 return 0;
1439 }
1440
1441 /* only internal SW should disable ctrl endpts */
1442
1443 direction = hwep->dir;
1444 do {
1445 retval |= _ep_nuke(hwep);
1446 retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
1447
1448 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1449 hwep->dir = (hwep->dir == TX) ? RX : TX;
1450
1451 } while (hwep->dir != direction);
1452
1453 hwep->ep.desc = NULL;
1454
1455 spin_unlock_irqrestore(hwep->lock, flags);
1456 return retval;
1457}
1458
1459/*
1460 * ep_alloc_request: allocate a request object to use with this endpoint
1461 *
1462 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
1463 */
1464static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
1465{
1466 struct ci_hw_req *hwreq = NULL;
1467
1468 if (ep == NULL)
1469 return NULL;
1470
1471 hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
1472 if (hwreq != NULL) {
1473 INIT_LIST_HEAD(&hwreq->queue);
1474 INIT_LIST_HEAD(&hwreq->tds);
1475 }
1476
1477 return (hwreq == NULL) ? NULL : &hwreq->req;
1478}
1479
1480/*
1481 * ep_free_request: frees a request object
1482 *
1483 * Check usb_ep_free_request() at "usb_gadget.h" for details
1484 */
1485static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
1486{
1487 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1488 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1489 struct td_node *node, *tmpnode;
1490 unsigned long flags;
1491
1492 if (ep == NULL || req == NULL) {
1493 return;
1494 } else if (!list_empty(&hwreq->queue)) {
1495 dev_err(hwep->ci->dev, "freeing queued request\n");
1496 return;
1497 }
1498
1499 spin_lock_irqsave(hwep->lock, flags);
1500
1501 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1502 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1503 list_del_init(&node->td);
1504 node->ptr = NULL;
1505 kfree(node);
1506 }
1507
1508 kfree(hwreq);
1509
1510 spin_unlock_irqrestore(hwep->lock, flags);
1511}
1512
1513/*
1514 * ep_queue: queues (submits) an I/O request to an endpoint
1515 *
1516 * Check usb_ep_queue()* at usb_gadget.h" for details
1517 */
1518static int ep_queue(struct usb_ep *ep, struct usb_request *req,
1519 gfp_t __maybe_unused gfp_flags)
1520{
1521 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1522 int retval = 0;
1523 unsigned long flags;
1524
1525 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
1526 return -EINVAL;
1527
1528 spin_lock_irqsave(hwep->lock, flags);
1529 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1530 spin_unlock_irqrestore(hwep->lock, flags);
1531 return 0;
1532 }
1533 retval = _ep_queue(ep, req, gfp_flags);
1534 spin_unlock_irqrestore(hwep->lock, flags);
1535 return retval;
1536}
1537
1538/*
1539 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
1540 *
1541 * Check usb_ep_dequeue() at "usb_gadget.h" for details
1542 */
1543static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
1544{
1545 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1546 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1547 unsigned long flags;
1548 struct td_node *node, *tmpnode;
1549
1550 if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
1551 hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
1552 list_empty(&hwep->qh.queue))
1553 return -EINVAL;
1554
1555 spin_lock_irqsave(hwep->lock, flags);
1556 if (hwep->ci->gadget.speed != USB_SPEED_UNKNOWN)
1557 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1558
1559 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1560 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1561 list_del(&node->td);
1562 kfree(node);
1563 }
1564
1565 /* pop request */
1566 list_del_init(&hwreq->queue);
1567
1568 usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
1569
1570 req->status = -ECONNRESET;
1571
1572 if (hwreq->req.complete != NULL) {
1573 spin_unlock(hwep->lock);
1574 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
1575 spin_lock(hwep->lock);
1576 }
1577
1578 spin_unlock_irqrestore(hwep->lock, flags);
1579 return 0;
1580}
1581
1582/*
1583 * ep_set_halt: sets the endpoint halt feature
1584 *
1585 * Check usb_ep_set_halt() at "usb_gadget.h" for details
1586 */
1587static int ep_set_halt(struct usb_ep *ep, int value)
1588{
1589 return _ep_set_halt(ep, value, true);
1590}
1591
1592/*
1593 * ep_set_wedge: sets the halt feature and ignores clear requests
1594 *
1595 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
1596 */
1597static int ep_set_wedge(struct usb_ep *ep)
1598{
1599 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1600 unsigned long flags;
1601
1602 if (ep == NULL || hwep->ep.desc == NULL)
1603 return -EINVAL;
1604
1605 spin_lock_irqsave(hwep->lock, flags);
1606 hwep->wedge = 1;
1607 spin_unlock_irqrestore(hwep->lock, flags);
1608
1609 return usb_ep_set_halt(ep);
1610}
1611
1612/*
1613 * ep_fifo_flush: flushes contents of a fifo
1614 *
1615 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
1616 */
1617static void ep_fifo_flush(struct usb_ep *ep)
1618{
1619 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1620 unsigned long flags;
1621
1622 if (ep == NULL) {
1623 dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
1624 return;
1625 }
1626
1627 spin_lock_irqsave(hwep->lock, flags);
1628 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1629 spin_unlock_irqrestore(hwep->lock, flags);
1630 return;
1631 }
1632
1633 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1634
1635 spin_unlock_irqrestore(hwep->lock, flags);
1636}
1637
1638/*
1639 * Endpoint-specific part of the API to the USB controller hardware
1640 * Check "usb_gadget.h" for details
1641 */
1642static const struct usb_ep_ops usb_ep_ops = {
1643 .enable = ep_enable,
1644 .disable = ep_disable,
1645 .alloc_request = ep_alloc_request,
1646 .free_request = ep_free_request,
1647 .queue = ep_queue,
1648 .dequeue = ep_dequeue,
1649 .set_halt = ep_set_halt,
1650 .set_wedge = ep_set_wedge,
1651 .fifo_flush = ep_fifo_flush,
1652};
1653
1654/******************************************************************************
1655 * GADGET block
1656 *****************************************************************************/
1657
1658static int ci_udc_get_frame(struct usb_gadget *_gadget)
1659{
1660 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1661 unsigned long flags;
1662 int ret;
1663
1664 spin_lock_irqsave(&ci->lock, flags);
1665 ret = hw_read(ci, OP_FRINDEX, 0x3fff);
1666 spin_unlock_irqrestore(&ci->lock, flags);
1667 return ret >> 3;
1668}
1669
1670/*
1671 * ci_hdrc_gadget_connect: caller makes sure gadget driver is binded
1672 */
1673static void ci_hdrc_gadget_connect(struct usb_gadget *_gadget, int is_active)
1674{
1675 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1676
1677 if (is_active) {
1678 pm_runtime_get_sync(ci->dev);
1679 hw_device_reset(ci);
1680 spin_lock_irq(&ci->lock);
1681 if (ci->driver) {
1682 hw_device_state(ci, ci->ep0out->qh.dma);
1683 usb_gadget_set_state(_gadget, USB_STATE_POWERED);
1684 spin_unlock_irq(&ci->lock);
1685 usb_udc_vbus_handler(_gadget, true);
1686 } else {
1687 spin_unlock_irq(&ci->lock);
1688 }
1689 } else {
1690 usb_udc_vbus_handler(_gadget, false);
1691 if (ci->driver)
1692 ci->driver->disconnect(&ci->gadget);
1693 hw_device_state(ci, 0);
1694 if (ci->platdata->notify_event)
1695 ci->platdata->notify_event(ci,
1696 CI_HDRC_CONTROLLER_STOPPED_EVENT);
1697 _gadget_stop_activity(&ci->gadget);
1698 pm_runtime_put_sync(ci->dev);
1699 usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED);
1700 }
1701}
1702
1703static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
1704{
1705 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1706 unsigned long flags;
1707 int ret = 0;
1708
1709 spin_lock_irqsave(&ci->lock, flags);
1710 ci->vbus_active = is_active;
1711 spin_unlock_irqrestore(&ci->lock, flags);
1712
1713 if (ci->usb_phy)
1714 usb_phy_set_charger_state(ci->usb_phy, is_active ?
1715 USB_CHARGER_PRESENT : USB_CHARGER_ABSENT);
1716
1717 if (ci->platdata->notify_event)
1718 ret = ci->platdata->notify_event(ci,
1719 CI_HDRC_CONTROLLER_VBUS_EVENT);
1720
1721 if (ci->driver)
1722 ci_hdrc_gadget_connect(_gadget, is_active);
1723
1724 return ret;
1725}
1726
1727static int ci_udc_wakeup(struct usb_gadget *_gadget)
1728{
1729 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1730 unsigned long flags;
1731 int ret = 0;
1732
1733 spin_lock_irqsave(&ci->lock, flags);
1734 if (ci->gadget.speed == USB_SPEED_UNKNOWN) {
1735 spin_unlock_irqrestore(&ci->lock, flags);
1736 return 0;
1737 }
1738 if (!ci->remote_wakeup) {
1739 ret = -EOPNOTSUPP;
1740 goto out;
1741 }
1742 if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
1743 ret = -EINVAL;
1744 goto out;
1745 }
1746 hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
1747out:
1748 spin_unlock_irqrestore(&ci->lock, flags);
1749 return ret;
1750}
1751
1752static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1753{
1754 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1755
1756 if (ci->usb_phy)
1757 return usb_phy_set_power(ci->usb_phy, ma);
1758 return -ENOTSUPP;
1759}
1760
1761static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on)
1762{
1763 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1764 struct ci_hw_ep *hwep = ci->ep0in;
1765 unsigned long flags;
1766
1767 spin_lock_irqsave(hwep->lock, flags);
1768 _gadget->is_selfpowered = (is_on != 0);
1769 spin_unlock_irqrestore(hwep->lock, flags);
1770
1771 return 0;
1772}
1773
1774/* Change Data+ pullup status
1775 * this func is used by usb_gadget_connect/disconnect
1776 */
1777static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
1778{
1779 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1780
1781 /*
1782 * Data+ pullup controlled by OTG state machine in OTG fsm mode;
1783 * and don't touch Data+ in host mode for dual role config.
1784 */
1785 if (ci_otg_is_fsm_mode(ci) || ci->role == CI_ROLE_HOST)
1786 return 0;
1787
1788 pm_runtime_get_sync(ci->dev);
1789 if (is_on)
1790 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
1791 else
1792 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
1793 pm_runtime_put_sync(ci->dev);
1794
1795 return 0;
1796}
1797
1798static int ci_udc_start(struct usb_gadget *gadget,
1799 struct usb_gadget_driver *driver);
1800static int ci_udc_stop(struct usb_gadget *gadget);
1801
1802/* Match ISOC IN from the highest endpoint */
1803static struct usb_ep *ci_udc_match_ep(struct usb_gadget *gadget,
1804 struct usb_endpoint_descriptor *desc,
1805 struct usb_ss_ep_comp_descriptor *comp_desc)
1806{
1807 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1808 struct usb_ep *ep;
1809
1810 if (usb_endpoint_xfer_isoc(desc) && usb_endpoint_dir_in(desc)) {
1811 list_for_each_entry_reverse(ep, &ci->gadget.ep_list, ep_list) {
1812 if (ep->caps.dir_in && !ep->claimed)
1813 return ep;
1814 }
1815 }
1816
1817 return NULL;
1818}
1819
1820/*
1821 * Device operations part of the API to the USB controller hardware,
1822 * which don't involve endpoints (or i/o)
1823 * Check "usb_gadget.h" for details
1824 */
1825static const struct usb_gadget_ops usb_gadget_ops = {
1826 .get_frame = ci_udc_get_frame,
1827 .vbus_session = ci_udc_vbus_session,
1828 .wakeup = ci_udc_wakeup,
1829 .set_selfpowered = ci_udc_selfpowered,
1830 .pullup = ci_udc_pullup,
1831 .vbus_draw = ci_udc_vbus_draw,
1832 .udc_start = ci_udc_start,
1833 .udc_stop = ci_udc_stop,
1834 .match_ep = ci_udc_match_ep,
1835};
1836
1837static int init_eps(struct ci_hdrc *ci)
1838{
1839 int retval = 0, i, j;
1840
1841 for (i = 0; i < ci->hw_ep_max/2; i++)
1842 for (j = RX; j <= TX; j++) {
1843 int k = i + j * ci->hw_ep_max/2;
1844 struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
1845
1846 scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
1847 (j == TX) ? "in" : "out");
1848
1849 hwep->ci = ci;
1850 hwep->lock = &ci->lock;
1851 hwep->td_pool = ci->td_pool;
1852
1853 hwep->ep.name = hwep->name;
1854 hwep->ep.ops = &usb_ep_ops;
1855
1856 if (i == 0) {
1857 hwep->ep.caps.type_control = true;
1858 } else {
1859 hwep->ep.caps.type_iso = true;
1860 hwep->ep.caps.type_bulk = true;
1861 hwep->ep.caps.type_int = true;
1862 }
1863
1864 if (j == TX)
1865 hwep->ep.caps.dir_in = true;
1866 else
1867 hwep->ep.caps.dir_out = true;
1868
1869 /*
1870 * for ep0: maxP defined in desc, for other
1871 * eps, maxP is set by epautoconfig() called
1872 * by gadget layer
1873 */
1874 usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
1875
1876 INIT_LIST_HEAD(&hwep->qh.queue);
1877 hwep->qh.ptr = dma_pool_zalloc(ci->qh_pool, GFP_KERNEL,
1878 &hwep->qh.dma);
1879 if (hwep->qh.ptr == NULL)
1880 retval = -ENOMEM;
1881
1882 /*
1883 * set up shorthands for ep0 out and in endpoints,
1884 * don't add to gadget's ep_list
1885 */
1886 if (i == 0) {
1887 if (j == RX)
1888 ci->ep0out = hwep;
1889 else
1890 ci->ep0in = hwep;
1891
1892 usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
1893 continue;
1894 }
1895
1896 list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
1897 }
1898
1899 return retval;
1900}
1901
1902static void destroy_eps(struct ci_hdrc *ci)
1903{
1904 int i;
1905
1906 for (i = 0; i < ci->hw_ep_max; i++) {
1907 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1908
1909 if (hwep->pending_td)
1910 free_pending_td(hwep);
1911 dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
1912 }
1913}
1914
1915/**
1916 * ci_udc_start: register a gadget driver
1917 * @gadget: our gadget
1918 * @driver: the driver being registered
1919 *
1920 * Interrupts are enabled here.
1921 */
1922static int ci_udc_start(struct usb_gadget *gadget,
1923 struct usb_gadget_driver *driver)
1924{
1925 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1926 int retval;
1927
1928 if (driver->disconnect == NULL)
1929 return -EINVAL;
1930
1931 ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
1932 retval = usb_ep_enable(&ci->ep0out->ep);
1933 if (retval)
1934 return retval;
1935
1936 ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
1937 retval = usb_ep_enable(&ci->ep0in->ep);
1938 if (retval)
1939 return retval;
1940
1941 ci->driver = driver;
1942
1943 /* Start otg fsm for B-device */
1944 if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
1945 ci_hdrc_otg_fsm_start(ci);
1946 return retval;
1947 }
1948
1949 if (ci->vbus_active)
1950 ci_hdrc_gadget_connect(gadget, 1);
1951 else
1952 usb_udc_vbus_handler(&ci->gadget, false);
1953
1954 return retval;
1955}
1956
1957static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci)
1958{
1959 if (!ci_otg_is_fsm_mode(ci))
1960 return;
1961
1962 mutex_lock(&ci->fsm.lock);
1963 if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
1964 ci->fsm.a_bidl_adis_tmout = 1;
1965 ci_hdrc_otg_fsm_start(ci);
1966 } else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
1967 ci->fsm.protocol = PROTO_UNDEF;
1968 ci->fsm.otg->state = OTG_STATE_UNDEFINED;
1969 }
1970 mutex_unlock(&ci->fsm.lock);
1971}
1972
1973/*
1974 * ci_udc_stop: unregister a gadget driver
1975 */
1976static int ci_udc_stop(struct usb_gadget *gadget)
1977{
1978 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1979 unsigned long flags;
1980
1981 spin_lock_irqsave(&ci->lock, flags);
1982 ci->driver = NULL;
1983
1984 if (ci->vbus_active) {
1985 hw_device_state(ci, 0);
1986 spin_unlock_irqrestore(&ci->lock, flags);
1987 if (ci->platdata->notify_event)
1988 ci->platdata->notify_event(ci,
1989 CI_HDRC_CONTROLLER_STOPPED_EVENT);
1990 _gadget_stop_activity(&ci->gadget);
1991 spin_lock_irqsave(&ci->lock, flags);
1992 pm_runtime_put(ci->dev);
1993 }
1994
1995 spin_unlock_irqrestore(&ci->lock, flags);
1996
1997 ci_udc_stop_for_otg_fsm(ci);
1998 return 0;
1999}
2000
2001/******************************************************************************
2002 * BUS block
2003 *****************************************************************************/
2004/*
2005 * udc_irq: ci interrupt handler
2006 *
2007 * This function returns IRQ_HANDLED if the IRQ has been handled
2008 * It locks access to registers
2009 */
2010static irqreturn_t udc_irq(struct ci_hdrc *ci)
2011{
2012 irqreturn_t retval;
2013 u32 intr;
2014
2015 if (ci == NULL)
2016 return IRQ_HANDLED;
2017
2018 spin_lock(&ci->lock);
2019
2020 if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
2021 if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
2022 USBMODE_CM_DC) {
2023 spin_unlock(&ci->lock);
2024 return IRQ_NONE;
2025 }
2026 }
2027 intr = hw_test_and_clear_intr_active(ci);
2028
2029 if (intr) {
2030 /* order defines priority - do NOT change it */
2031 if (USBi_URI & intr)
2032 isr_reset_handler(ci);
2033
2034 if (USBi_PCI & intr) {
2035 ci->gadget.speed = hw_port_is_high_speed(ci) ?
2036 USB_SPEED_HIGH : USB_SPEED_FULL;
2037 if (ci->suspended) {
2038 if (ci->driver->resume) {
2039 spin_unlock(&ci->lock);
2040 ci->driver->resume(&ci->gadget);
2041 spin_lock(&ci->lock);
2042 }
2043 ci->suspended = 0;
2044 usb_gadget_set_state(&ci->gadget,
2045 ci->resume_state);
2046 }
2047 }
2048
2049 if (USBi_UI & intr)
2050 isr_tr_complete_handler(ci);
2051
2052 if ((USBi_SLI & intr) && !(ci->suspended)) {
2053 ci->suspended = 1;
2054 ci->resume_state = ci->gadget.state;
2055 if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
2056 ci->driver->suspend) {
2057 spin_unlock(&ci->lock);
2058 ci->driver->suspend(&ci->gadget);
2059 spin_lock(&ci->lock);
2060 }
2061 usb_gadget_set_state(&ci->gadget,
2062 USB_STATE_SUSPENDED);
2063 }
2064 retval = IRQ_HANDLED;
2065 } else {
2066 retval = IRQ_NONE;
2067 }
2068 spin_unlock(&ci->lock);
2069
2070 return retval;
2071}
2072
2073/**
2074 * udc_start: initialize gadget role
2075 * @ci: chipidea controller
2076 */
2077static int udc_start(struct ci_hdrc *ci)
2078{
2079 struct device *dev = ci->dev;
2080 struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps;
2081 int retval = 0;
2082
2083 ci->gadget.ops = &usb_gadget_ops;
2084 ci->gadget.speed = USB_SPEED_UNKNOWN;
2085 ci->gadget.max_speed = USB_SPEED_HIGH;
2086 ci->gadget.name = ci->platdata->name;
2087 ci->gadget.otg_caps = otg_caps;
2088 ci->gadget.sg_supported = 1;
2089 ci->gadget.irq = ci->irq;
2090
2091 if (ci->platdata->flags & CI_HDRC_REQUIRES_ALIGNED_DMA)
2092 ci->gadget.quirk_avoids_skb_reserve = 1;
2093
2094 if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support ||
2095 otg_caps->adp_support))
2096 ci->gadget.is_otg = 1;
2097
2098 INIT_LIST_HEAD(&ci->gadget.ep_list);
2099
2100 /* alloc resources */
2101 ci->qh_pool = dma_pool_create("ci_hw_qh", dev->parent,
2102 sizeof(struct ci_hw_qh),
2103 64, CI_HDRC_PAGE_SIZE);
2104 if (ci->qh_pool == NULL)
2105 return -ENOMEM;
2106
2107 ci->td_pool = dma_pool_create("ci_hw_td", dev->parent,
2108 sizeof(struct ci_hw_td),
2109 64, CI_HDRC_PAGE_SIZE);
2110 if (ci->td_pool == NULL) {
2111 retval = -ENOMEM;
2112 goto free_qh_pool;
2113 }
2114
2115 retval = init_eps(ci);
2116 if (retval)
2117 goto free_pools;
2118
2119 ci->gadget.ep0 = &ci->ep0in->ep;
2120
2121 retval = usb_add_gadget_udc(dev, &ci->gadget);
2122 if (retval)
2123 goto destroy_eps;
2124
2125 return retval;
2126
2127destroy_eps:
2128 destroy_eps(ci);
2129free_pools:
2130 dma_pool_destroy(ci->td_pool);
2131free_qh_pool:
2132 dma_pool_destroy(ci->qh_pool);
2133 return retval;
2134}
2135
2136/*
2137 * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
2138 *
2139 * No interrupts active, the IRQ has been released
2140 */
2141void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
2142{
2143 if (!ci->roles[CI_ROLE_GADGET])
2144 return;
2145
2146 usb_del_gadget_udc(&ci->gadget);
2147
2148 destroy_eps(ci);
2149
2150 dma_pool_destroy(ci->td_pool);
2151 dma_pool_destroy(ci->qh_pool);
2152}
2153
2154static int udc_id_switch_for_device(struct ci_hdrc *ci)
2155{
2156 if (ci->platdata->pins_device)
2157 pinctrl_select_state(ci->platdata->pctl,
2158 ci->platdata->pins_device);
2159
2160 if (ci->is_otg)
2161 /* Clear and enable BSV irq */
2162 hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
2163 OTGSC_BSVIS | OTGSC_BSVIE);
2164
2165 return 0;
2166}
2167
2168static void udc_id_switch_for_host(struct ci_hdrc *ci)
2169{
2170 /*
2171 * host doesn't care B_SESSION_VALID event
2172 * so clear and disable BSV irq
2173 */
2174 if (ci->is_otg)
2175 hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
2176
2177 ci->vbus_active = 0;
2178
2179 if (ci->platdata->pins_device && ci->platdata->pins_default)
2180 pinctrl_select_state(ci->platdata->pctl,
2181 ci->platdata->pins_default);
2182}
2183
2184#ifdef CONFIG_PM_SLEEP
2185static void udc_suspend(struct ci_hdrc *ci)
2186{
2187 /*
2188 * Set OP_ENDPTLISTADDR to be non-zero for
2189 * checking if controller resume from power lost
2190 * in non-host mode.
2191 */
2192 if (hw_read(ci, OP_ENDPTLISTADDR, ~0) == 0)
2193 hw_write(ci, OP_ENDPTLISTADDR, ~0, ~0);
2194}
2195
2196static void udc_resume(struct ci_hdrc *ci, bool power_lost)
2197{
2198 if (power_lost) {
2199 if (ci->is_otg)
2200 hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
2201 OTGSC_BSVIS | OTGSC_BSVIE);
2202 if (ci->vbus_active)
2203 usb_gadget_vbus_disconnect(&ci->gadget);
2204 }
2205
2206 /* Restore value 0 if it was set for power lost check */
2207 if (hw_read(ci, OP_ENDPTLISTADDR, ~0) == 0xFFFFFFFF)
2208 hw_write(ci, OP_ENDPTLISTADDR, ~0, 0);
2209}
2210#endif
2211
2212/**
2213 * ci_hdrc_gadget_init - initialize device related bits
2214 * @ci: the controller
2215 *
2216 * This function initializes the gadget, if the device is "device capable".
2217 */
2218int ci_hdrc_gadget_init(struct ci_hdrc *ci)
2219{
2220 struct ci_role_driver *rdrv;
2221 int ret;
2222
2223 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
2224 return -ENXIO;
2225
2226 rdrv = devm_kzalloc(ci->dev, sizeof(*rdrv), GFP_KERNEL);
2227 if (!rdrv)
2228 return -ENOMEM;
2229
2230 rdrv->start = udc_id_switch_for_device;
2231 rdrv->stop = udc_id_switch_for_host;
2232#ifdef CONFIG_PM_SLEEP
2233 rdrv->suspend = udc_suspend;
2234 rdrv->resume = udc_resume;
2235#endif
2236 rdrv->irq = udc_irq;
2237 rdrv->name = "gadget";
2238
2239 ret = udc_start(ci);
2240 if (!ret)
2241 ci->roles[CI_ROLE_GADGET] = rdrv;
2242
2243 return ret;
2244}
1/*
2 * udc.c - ChipIdea UDC driver
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/delay.h>
14#include <linux/device.h>
15#include <linux/dmapool.h>
16#include <linux/dma-mapping.h>
17#include <linux/init.h>
18#include <linux/platform_device.h>
19#include <linux/module.h>
20#include <linux/interrupt.h>
21#include <linux/io.h>
22#include <linux/irq.h>
23#include <linux/kernel.h>
24#include <linux/slab.h>
25#include <linux/pm_runtime.h>
26#include <linux/usb/ch9.h>
27#include <linux/usb/gadget.h>
28#include <linux/usb/otg.h>
29#include <linux/usb/chipidea.h>
30
31#include "ci.h"
32#include "udc.h"
33#include "bits.h"
34#include "debug.h"
35
36/* control endpoint description */
37static const struct usb_endpoint_descriptor
38ctrl_endpt_out_desc = {
39 .bLength = USB_DT_ENDPOINT_SIZE,
40 .bDescriptorType = USB_DT_ENDPOINT,
41
42 .bEndpointAddress = USB_DIR_OUT,
43 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
44 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
45};
46
47static const struct usb_endpoint_descriptor
48ctrl_endpt_in_desc = {
49 .bLength = USB_DT_ENDPOINT_SIZE,
50 .bDescriptorType = USB_DT_ENDPOINT,
51
52 .bEndpointAddress = USB_DIR_IN,
53 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
54 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
55};
56
57/**
58 * hw_ep_bit: calculates the bit number
59 * @num: endpoint number
60 * @dir: endpoint direction
61 *
62 * This function returns bit number
63 */
64static inline int hw_ep_bit(int num, int dir)
65{
66 return num + (dir ? 16 : 0);
67}
68
69static inline int ep_to_bit(struct ci13xxx *udc, int n)
70{
71 int fill = 16 - udc->hw_ep_max / 2;
72
73 if (n >= udc->hw_ep_max / 2)
74 n += fill;
75
76 return n;
77}
78
79/**
80 * hw_device_state: enables/disables interrupts (execute without interruption)
81 * @dma: 0 => disable, !0 => enable and set dma engine
82 *
83 * This function returns an error code
84 */
85static int hw_device_state(struct ci13xxx *udc, u32 dma)
86{
87 if (dma) {
88 hw_write(udc, OP_ENDPTLISTADDR, ~0, dma);
89 /* interrupt, error, port change, reset, sleep/suspend */
90 hw_write(udc, OP_USBINTR, ~0,
91 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
92 hw_write(udc, OP_USBCMD, USBCMD_RS, USBCMD_RS);
93 } else {
94 hw_write(udc, OP_USBINTR, ~0, 0);
95 }
96 return 0;
97}
98
99/**
100 * hw_ep_flush: flush endpoint fifo (execute without interruption)
101 * @num: endpoint number
102 * @dir: endpoint direction
103 *
104 * This function returns an error code
105 */
106static int hw_ep_flush(struct ci13xxx *udc, int num, int dir)
107{
108 int n = hw_ep_bit(num, dir);
109
110 do {
111 /* flush any pending transfer */
112 hw_write(udc, OP_ENDPTFLUSH, BIT(n), BIT(n));
113 while (hw_read(udc, OP_ENDPTFLUSH, BIT(n)))
114 cpu_relax();
115 } while (hw_read(udc, OP_ENDPTSTAT, BIT(n)));
116
117 return 0;
118}
119
120/**
121 * hw_ep_disable: disables endpoint (execute without interruption)
122 * @num: endpoint number
123 * @dir: endpoint direction
124 *
125 * This function returns an error code
126 */
127static int hw_ep_disable(struct ci13xxx *udc, int num, int dir)
128{
129 hw_ep_flush(udc, num, dir);
130 hw_write(udc, OP_ENDPTCTRL + num,
131 dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
132 return 0;
133}
134
135/**
136 * hw_ep_enable: enables endpoint (execute without interruption)
137 * @num: endpoint number
138 * @dir: endpoint direction
139 * @type: endpoint type
140 *
141 * This function returns an error code
142 */
143static int hw_ep_enable(struct ci13xxx *udc, int num, int dir, int type)
144{
145 u32 mask, data;
146
147 if (dir) {
148 mask = ENDPTCTRL_TXT; /* type */
149 data = type << ffs_nr(mask);
150
151 mask |= ENDPTCTRL_TXS; /* unstall */
152 mask |= ENDPTCTRL_TXR; /* reset data toggle */
153 data |= ENDPTCTRL_TXR;
154 mask |= ENDPTCTRL_TXE; /* enable */
155 data |= ENDPTCTRL_TXE;
156 } else {
157 mask = ENDPTCTRL_RXT; /* type */
158 data = type << ffs_nr(mask);
159
160 mask |= ENDPTCTRL_RXS; /* unstall */
161 mask |= ENDPTCTRL_RXR; /* reset data toggle */
162 data |= ENDPTCTRL_RXR;
163 mask |= ENDPTCTRL_RXE; /* enable */
164 data |= ENDPTCTRL_RXE;
165 }
166 hw_write(udc, OP_ENDPTCTRL + num, mask, data);
167 return 0;
168}
169
170/**
171 * hw_ep_get_halt: return endpoint halt status
172 * @num: endpoint number
173 * @dir: endpoint direction
174 *
175 * This function returns 1 if endpoint halted
176 */
177static int hw_ep_get_halt(struct ci13xxx *udc, int num, int dir)
178{
179 u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
180
181 return hw_read(udc, OP_ENDPTCTRL + num, mask) ? 1 : 0;
182}
183
184/**
185 * hw_test_and_clear_setup_status: test & clear setup status (execute without
186 * interruption)
187 * @n: endpoint number
188 *
189 * This function returns setup status
190 */
191static int hw_test_and_clear_setup_status(struct ci13xxx *udc, int n)
192{
193 n = ep_to_bit(udc, n);
194 return hw_test_and_clear(udc, OP_ENDPTSETUPSTAT, BIT(n));
195}
196
197/**
198 * hw_ep_prime: primes endpoint (execute without interruption)
199 * @num: endpoint number
200 * @dir: endpoint direction
201 * @is_ctrl: true if control endpoint
202 *
203 * This function returns an error code
204 */
205static int hw_ep_prime(struct ci13xxx *udc, int num, int dir, int is_ctrl)
206{
207 int n = hw_ep_bit(num, dir);
208
209 if (is_ctrl && dir == RX && hw_read(udc, OP_ENDPTSETUPSTAT, BIT(num)))
210 return -EAGAIN;
211
212 hw_write(udc, OP_ENDPTPRIME, BIT(n), BIT(n));
213
214 while (hw_read(udc, OP_ENDPTPRIME, BIT(n)))
215 cpu_relax();
216 if (is_ctrl && dir == RX && hw_read(udc, OP_ENDPTSETUPSTAT, BIT(num)))
217 return -EAGAIN;
218
219 /* status shoult be tested according with manual but it doesn't work */
220 return 0;
221}
222
223/**
224 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
225 * without interruption)
226 * @num: endpoint number
227 * @dir: endpoint direction
228 * @value: true => stall, false => unstall
229 *
230 * This function returns an error code
231 */
232static int hw_ep_set_halt(struct ci13xxx *udc, int num, int dir, int value)
233{
234 if (value != 0 && value != 1)
235 return -EINVAL;
236
237 do {
238 enum ci13xxx_regs reg = OP_ENDPTCTRL + num;
239 u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
240 u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
241
242 /* data toggle - reserved for EP0 but it's in ESS */
243 hw_write(udc, reg, mask_xs|mask_xr,
244 value ? mask_xs : mask_xr);
245 } while (value != hw_ep_get_halt(udc, num, dir));
246
247 return 0;
248}
249
250/**
251 * hw_is_port_high_speed: test if port is high speed
252 *
253 * This function returns true if high speed port
254 */
255static int hw_port_is_high_speed(struct ci13xxx *udc)
256{
257 return udc->hw_bank.lpm ? hw_read(udc, OP_DEVLC, DEVLC_PSPD) :
258 hw_read(udc, OP_PORTSC, PORTSC_HSP);
259}
260
261/**
262 * hw_read_intr_enable: returns interrupt enable register
263 *
264 * This function returns register data
265 */
266static u32 hw_read_intr_enable(struct ci13xxx *udc)
267{
268 return hw_read(udc, OP_USBINTR, ~0);
269}
270
271/**
272 * hw_read_intr_status: returns interrupt status register
273 *
274 * This function returns register data
275 */
276static u32 hw_read_intr_status(struct ci13xxx *udc)
277{
278 return hw_read(udc, OP_USBSTS, ~0);
279}
280
281/**
282 * hw_test_and_clear_complete: test & clear complete status (execute without
283 * interruption)
284 * @n: endpoint number
285 *
286 * This function returns complete status
287 */
288static int hw_test_and_clear_complete(struct ci13xxx *udc, int n)
289{
290 n = ep_to_bit(udc, n);
291 return hw_test_and_clear(udc, OP_ENDPTCOMPLETE, BIT(n));
292}
293
294/**
295 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
296 * without interruption)
297 *
298 * This function returns active interrutps
299 */
300static u32 hw_test_and_clear_intr_active(struct ci13xxx *udc)
301{
302 u32 reg = hw_read_intr_status(udc) & hw_read_intr_enable(udc);
303
304 hw_write(udc, OP_USBSTS, ~0, reg);
305 return reg;
306}
307
308/**
309 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
310 * interruption)
311 *
312 * This function returns guard value
313 */
314static int hw_test_and_clear_setup_guard(struct ci13xxx *udc)
315{
316 return hw_test_and_write(udc, OP_USBCMD, USBCMD_SUTW, 0);
317}
318
319/**
320 * hw_test_and_set_setup_guard: test & set setup guard (execute without
321 * interruption)
322 *
323 * This function returns guard value
324 */
325static int hw_test_and_set_setup_guard(struct ci13xxx *udc)
326{
327 return hw_test_and_write(udc, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
328}
329
330/**
331 * hw_usb_set_address: configures USB address (execute without interruption)
332 * @value: new USB address
333 *
334 * This function explicitly sets the address, without the "USBADRA" (advance)
335 * feature, which is not supported by older versions of the controller.
336 */
337static void hw_usb_set_address(struct ci13xxx *udc, u8 value)
338{
339 hw_write(udc, OP_DEVICEADDR, DEVICEADDR_USBADR,
340 value << ffs_nr(DEVICEADDR_USBADR));
341}
342
343/**
344 * hw_usb_reset: restart device after a bus reset (execute without
345 * interruption)
346 *
347 * This function returns an error code
348 */
349static int hw_usb_reset(struct ci13xxx *udc)
350{
351 hw_usb_set_address(udc, 0);
352
353 /* ESS flushes only at end?!? */
354 hw_write(udc, OP_ENDPTFLUSH, ~0, ~0);
355
356 /* clear setup token semaphores */
357 hw_write(udc, OP_ENDPTSETUPSTAT, 0, 0);
358
359 /* clear complete status */
360 hw_write(udc, OP_ENDPTCOMPLETE, 0, 0);
361
362 /* wait until all bits cleared */
363 while (hw_read(udc, OP_ENDPTPRIME, ~0))
364 udelay(10); /* not RTOS friendly */
365
366 /* reset all endpoints ? */
367
368 /* reset internal status and wait for further instructions
369 no need to verify the port reset status (ESS does it) */
370
371 return 0;
372}
373
374/******************************************************************************
375 * UTIL block
376 *****************************************************************************/
377/**
378 * _usb_addr: calculates endpoint address from direction & number
379 * @ep: endpoint
380 */
381static inline u8 _usb_addr(struct ci13xxx_ep *ep)
382{
383 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
384}
385
386/**
387 * _hardware_queue: configures a request at hardware level
388 * @gadget: gadget
389 * @mEp: endpoint
390 *
391 * This function returns an error code
392 */
393static int _hardware_enqueue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
394{
395 struct ci13xxx *udc = mEp->udc;
396 unsigned i;
397 int ret = 0;
398 unsigned length = mReq->req.length;
399
400 /* don't queue twice */
401 if (mReq->req.status == -EALREADY)
402 return -EALREADY;
403
404 mReq->req.status = -EALREADY;
405
406 if (mReq->req.zero && length && (length % mEp->ep.maxpacket == 0)) {
407 mReq->zptr = dma_pool_alloc(mEp->td_pool, GFP_ATOMIC,
408 &mReq->zdma);
409 if (mReq->zptr == NULL)
410 return -ENOMEM;
411
412 memset(mReq->zptr, 0, sizeof(*mReq->zptr));
413 mReq->zptr->next = TD_TERMINATE;
414 mReq->zptr->token = TD_STATUS_ACTIVE;
415 if (!mReq->req.no_interrupt)
416 mReq->zptr->token |= TD_IOC;
417 }
418 ret = usb_gadget_map_request(&udc->gadget, &mReq->req, mEp->dir);
419 if (ret)
420 return ret;
421
422 /*
423 * TD configuration
424 * TODO - handle requests which spawns into several TDs
425 */
426 memset(mReq->ptr, 0, sizeof(*mReq->ptr));
427 mReq->ptr->token = length << ffs_nr(TD_TOTAL_BYTES);
428 mReq->ptr->token &= TD_TOTAL_BYTES;
429 mReq->ptr->token |= TD_STATUS_ACTIVE;
430 if (mReq->zptr) {
431 mReq->ptr->next = mReq->zdma;
432 } else {
433 mReq->ptr->next = TD_TERMINATE;
434 if (!mReq->req.no_interrupt)
435 mReq->ptr->token |= TD_IOC;
436 }
437 mReq->ptr->page[0] = mReq->req.dma;
438 for (i = 1; i < 5; i++)
439 mReq->ptr->page[i] =
440 (mReq->req.dma + i * CI13XXX_PAGE_SIZE) & ~TD_RESERVED_MASK;
441
442 if (!list_empty(&mEp->qh.queue)) {
443 struct ci13xxx_req *mReqPrev;
444 int n = hw_ep_bit(mEp->num, mEp->dir);
445 int tmp_stat;
446
447 mReqPrev = list_entry(mEp->qh.queue.prev,
448 struct ci13xxx_req, queue);
449 if (mReqPrev->zptr)
450 mReqPrev->zptr->next = mReq->dma & TD_ADDR_MASK;
451 else
452 mReqPrev->ptr->next = mReq->dma & TD_ADDR_MASK;
453 wmb();
454 if (hw_read(udc, OP_ENDPTPRIME, BIT(n)))
455 goto done;
456 do {
457 hw_write(udc, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
458 tmp_stat = hw_read(udc, OP_ENDPTSTAT, BIT(n));
459 } while (!hw_read(udc, OP_USBCMD, USBCMD_ATDTW));
460 hw_write(udc, OP_USBCMD, USBCMD_ATDTW, 0);
461 if (tmp_stat)
462 goto done;
463 }
464
465 /* QH configuration */
466 mEp->qh.ptr->td.next = mReq->dma; /* TERMINATE = 0 */
467 mEp->qh.ptr->td.token &= ~TD_STATUS; /* clear status */
468 mEp->qh.ptr->cap |= QH_ZLT;
469
470 wmb(); /* synchronize before ep prime */
471
472 ret = hw_ep_prime(udc, mEp->num, mEp->dir,
473 mEp->type == USB_ENDPOINT_XFER_CONTROL);
474done:
475 return ret;
476}
477
478/**
479 * _hardware_dequeue: handles a request at hardware level
480 * @gadget: gadget
481 * @mEp: endpoint
482 *
483 * This function returns an error code
484 */
485static int _hardware_dequeue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
486{
487 if (mReq->req.status != -EALREADY)
488 return -EINVAL;
489
490 if ((TD_STATUS_ACTIVE & mReq->ptr->token) != 0)
491 return -EBUSY;
492
493 if (mReq->zptr) {
494 if ((TD_STATUS_ACTIVE & mReq->zptr->token) != 0)
495 return -EBUSY;
496 dma_pool_free(mEp->td_pool, mReq->zptr, mReq->zdma);
497 mReq->zptr = NULL;
498 }
499
500 mReq->req.status = 0;
501
502 usb_gadget_unmap_request(&mEp->udc->gadget, &mReq->req, mEp->dir);
503
504 mReq->req.status = mReq->ptr->token & TD_STATUS;
505 if ((TD_STATUS_HALTED & mReq->req.status) != 0)
506 mReq->req.status = -1;
507 else if ((TD_STATUS_DT_ERR & mReq->req.status) != 0)
508 mReq->req.status = -1;
509 else if ((TD_STATUS_TR_ERR & mReq->req.status) != 0)
510 mReq->req.status = -1;
511
512 mReq->req.actual = mReq->ptr->token & TD_TOTAL_BYTES;
513 mReq->req.actual >>= ffs_nr(TD_TOTAL_BYTES);
514 mReq->req.actual = mReq->req.length - mReq->req.actual;
515 mReq->req.actual = mReq->req.status ? 0 : mReq->req.actual;
516
517 return mReq->req.actual;
518}
519
520/**
521 * _ep_nuke: dequeues all endpoint requests
522 * @mEp: endpoint
523 *
524 * This function returns an error code
525 * Caller must hold lock
526 */
527static int _ep_nuke(struct ci13xxx_ep *mEp)
528__releases(mEp->lock)
529__acquires(mEp->lock)
530{
531 if (mEp == NULL)
532 return -EINVAL;
533
534 hw_ep_flush(mEp->udc, mEp->num, mEp->dir);
535
536 while (!list_empty(&mEp->qh.queue)) {
537
538 /* pop oldest request */
539 struct ci13xxx_req *mReq = \
540 list_entry(mEp->qh.queue.next,
541 struct ci13xxx_req, queue);
542 list_del_init(&mReq->queue);
543 mReq->req.status = -ESHUTDOWN;
544
545 if (mReq->req.complete != NULL) {
546 spin_unlock(mEp->lock);
547 mReq->req.complete(&mEp->ep, &mReq->req);
548 spin_lock(mEp->lock);
549 }
550 }
551 return 0;
552}
553
554/**
555 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
556 * @gadget: gadget
557 *
558 * This function returns an error code
559 */
560static int _gadget_stop_activity(struct usb_gadget *gadget)
561{
562 struct usb_ep *ep;
563 struct ci13xxx *udc = container_of(gadget, struct ci13xxx, gadget);
564 unsigned long flags;
565
566 spin_lock_irqsave(&udc->lock, flags);
567 udc->gadget.speed = USB_SPEED_UNKNOWN;
568 udc->remote_wakeup = 0;
569 udc->suspended = 0;
570 spin_unlock_irqrestore(&udc->lock, flags);
571
572 /* flush all endpoints */
573 gadget_for_each_ep(ep, gadget) {
574 usb_ep_fifo_flush(ep);
575 }
576 usb_ep_fifo_flush(&udc->ep0out->ep);
577 usb_ep_fifo_flush(&udc->ep0in->ep);
578
579 if (udc->driver)
580 udc->driver->disconnect(gadget);
581
582 /* make sure to disable all endpoints */
583 gadget_for_each_ep(ep, gadget) {
584 usb_ep_disable(ep);
585 }
586
587 if (udc->status != NULL) {
588 usb_ep_free_request(&udc->ep0in->ep, udc->status);
589 udc->status = NULL;
590 }
591
592 return 0;
593}
594
595/******************************************************************************
596 * ISR block
597 *****************************************************************************/
598/**
599 * isr_reset_handler: USB reset interrupt handler
600 * @udc: UDC device
601 *
602 * This function resets USB engine after a bus reset occurred
603 */
604static void isr_reset_handler(struct ci13xxx *udc)
605__releases(udc->lock)
606__acquires(udc->lock)
607{
608 int retval;
609
610 dbg_event(0xFF, "BUS RST", 0);
611
612 spin_unlock(&udc->lock);
613 retval = _gadget_stop_activity(&udc->gadget);
614 if (retval)
615 goto done;
616
617 retval = hw_usb_reset(udc);
618 if (retval)
619 goto done;
620
621 udc->status = usb_ep_alloc_request(&udc->ep0in->ep, GFP_ATOMIC);
622 if (udc->status == NULL)
623 retval = -ENOMEM;
624
625done:
626 spin_lock(&udc->lock);
627
628 if (retval)
629 dev_err(udc->dev, "error: %i\n", retval);
630}
631
632/**
633 * isr_get_status_complete: get_status request complete function
634 * @ep: endpoint
635 * @req: request handled
636 *
637 * Caller must release lock
638 */
639static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
640{
641 if (ep == NULL || req == NULL)
642 return;
643
644 kfree(req->buf);
645 usb_ep_free_request(ep, req);
646}
647
648/**
649 * isr_get_status_response: get_status request response
650 * @udc: udc struct
651 * @setup: setup request packet
652 *
653 * This function returns an error code
654 */
655static int isr_get_status_response(struct ci13xxx *udc,
656 struct usb_ctrlrequest *setup)
657__releases(mEp->lock)
658__acquires(mEp->lock)
659{
660 struct ci13xxx_ep *mEp = udc->ep0in;
661 struct usb_request *req = NULL;
662 gfp_t gfp_flags = GFP_ATOMIC;
663 int dir, num, retval;
664
665 if (mEp == NULL || setup == NULL)
666 return -EINVAL;
667
668 spin_unlock(mEp->lock);
669 req = usb_ep_alloc_request(&mEp->ep, gfp_flags);
670 spin_lock(mEp->lock);
671 if (req == NULL)
672 return -ENOMEM;
673
674 req->complete = isr_get_status_complete;
675 req->length = 2;
676 req->buf = kzalloc(req->length, gfp_flags);
677 if (req->buf == NULL) {
678 retval = -ENOMEM;
679 goto err_free_req;
680 }
681
682 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
683 /* Assume that device is bus powered for now. */
684 *(u16 *)req->buf = udc->remote_wakeup << 1;
685 retval = 0;
686 } else if ((setup->bRequestType & USB_RECIP_MASK) \
687 == USB_RECIP_ENDPOINT) {
688 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
689 TX : RX;
690 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
691 *(u16 *)req->buf = hw_ep_get_halt(udc, num, dir);
692 }
693 /* else do nothing; reserved for future use */
694
695 spin_unlock(mEp->lock);
696 retval = usb_ep_queue(&mEp->ep, req, gfp_flags);
697 spin_lock(mEp->lock);
698 if (retval)
699 goto err_free_buf;
700
701 return 0;
702
703 err_free_buf:
704 kfree(req->buf);
705 err_free_req:
706 spin_unlock(mEp->lock);
707 usb_ep_free_request(&mEp->ep, req);
708 spin_lock(mEp->lock);
709 return retval;
710}
711
712/**
713 * isr_setup_status_complete: setup_status request complete function
714 * @ep: endpoint
715 * @req: request handled
716 *
717 * Caller must release lock. Put the port in test mode if test mode
718 * feature is selected.
719 */
720static void
721isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
722{
723 struct ci13xxx *udc = req->context;
724 unsigned long flags;
725
726 if (udc->setaddr) {
727 hw_usb_set_address(udc, udc->address);
728 udc->setaddr = false;
729 }
730
731 spin_lock_irqsave(&udc->lock, flags);
732 if (udc->test_mode)
733 hw_port_test_set(udc, udc->test_mode);
734 spin_unlock_irqrestore(&udc->lock, flags);
735}
736
737/**
738 * isr_setup_status_phase: queues the status phase of a setup transation
739 * @udc: udc struct
740 *
741 * This function returns an error code
742 */
743static int isr_setup_status_phase(struct ci13xxx *udc)
744__releases(mEp->lock)
745__acquires(mEp->lock)
746{
747 int retval;
748 struct ci13xxx_ep *mEp;
749
750 mEp = (udc->ep0_dir == TX) ? udc->ep0out : udc->ep0in;
751 udc->status->context = udc;
752 udc->status->complete = isr_setup_status_complete;
753
754 spin_unlock(mEp->lock);
755 retval = usb_ep_queue(&mEp->ep, udc->status, GFP_ATOMIC);
756 spin_lock(mEp->lock);
757
758 return retval;
759}
760
761/**
762 * isr_tr_complete_low: transaction complete low level handler
763 * @mEp: endpoint
764 *
765 * This function returns an error code
766 * Caller must hold lock
767 */
768static int isr_tr_complete_low(struct ci13xxx_ep *mEp)
769__releases(mEp->lock)
770__acquires(mEp->lock)
771{
772 struct ci13xxx_req *mReq, *mReqTemp;
773 struct ci13xxx_ep *mEpTemp = mEp;
774 int retval = 0;
775
776 list_for_each_entry_safe(mReq, mReqTemp, &mEp->qh.queue,
777 queue) {
778 retval = _hardware_dequeue(mEp, mReq);
779 if (retval < 0)
780 break;
781 list_del_init(&mReq->queue);
782 dbg_done(_usb_addr(mEp), mReq->ptr->token, retval);
783 if (mReq->req.complete != NULL) {
784 spin_unlock(mEp->lock);
785 if ((mEp->type == USB_ENDPOINT_XFER_CONTROL) &&
786 mReq->req.length)
787 mEpTemp = mEp->udc->ep0in;
788 mReq->req.complete(&mEpTemp->ep, &mReq->req);
789 spin_lock(mEp->lock);
790 }
791 }
792
793 if (retval == -EBUSY)
794 retval = 0;
795 if (retval < 0)
796 dbg_event(_usb_addr(mEp), "DONE", retval);
797
798 return retval;
799}
800
801/**
802 * isr_tr_complete_handler: transaction complete interrupt handler
803 * @udc: UDC descriptor
804 *
805 * This function handles traffic events
806 */
807static void isr_tr_complete_handler(struct ci13xxx *udc)
808__releases(udc->lock)
809__acquires(udc->lock)
810{
811 unsigned i;
812 u8 tmode = 0;
813
814 for (i = 0; i < udc->hw_ep_max; i++) {
815 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i];
816 int type, num, dir, err = -EINVAL;
817 struct usb_ctrlrequest req;
818
819 if (mEp->ep.desc == NULL)
820 continue; /* not configured */
821
822 if (hw_test_and_clear_complete(udc, i)) {
823 err = isr_tr_complete_low(mEp);
824 if (mEp->type == USB_ENDPOINT_XFER_CONTROL) {
825 if (err > 0) /* needs status phase */
826 err = isr_setup_status_phase(udc);
827 if (err < 0) {
828 dbg_event(_usb_addr(mEp),
829 "ERROR", err);
830 spin_unlock(&udc->lock);
831 if (usb_ep_set_halt(&mEp->ep))
832 dev_err(udc->dev,
833 "error: ep_set_halt\n");
834 spin_lock(&udc->lock);
835 }
836 }
837 }
838
839 if (mEp->type != USB_ENDPOINT_XFER_CONTROL ||
840 !hw_test_and_clear_setup_status(udc, i))
841 continue;
842
843 if (i != 0) {
844 dev_warn(udc->dev, "ctrl traffic at endpoint %d\n", i);
845 continue;
846 }
847
848 /*
849 * Flush data and handshake transactions of previous
850 * setup packet.
851 */
852 _ep_nuke(udc->ep0out);
853 _ep_nuke(udc->ep0in);
854
855 /* read_setup_packet */
856 do {
857 hw_test_and_set_setup_guard(udc);
858 memcpy(&req, &mEp->qh.ptr->setup, sizeof(req));
859 } while (!hw_test_and_clear_setup_guard(udc));
860
861 type = req.bRequestType;
862
863 udc->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
864
865 dbg_setup(_usb_addr(mEp), &req);
866
867 switch (req.bRequest) {
868 case USB_REQ_CLEAR_FEATURE:
869 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
870 le16_to_cpu(req.wValue) ==
871 USB_ENDPOINT_HALT) {
872 if (req.wLength != 0)
873 break;
874 num = le16_to_cpu(req.wIndex);
875 dir = num & USB_ENDPOINT_DIR_MASK;
876 num &= USB_ENDPOINT_NUMBER_MASK;
877 if (dir) /* TX */
878 num += udc->hw_ep_max/2;
879 if (!udc->ci13xxx_ep[num].wedge) {
880 spin_unlock(&udc->lock);
881 err = usb_ep_clear_halt(
882 &udc->ci13xxx_ep[num].ep);
883 spin_lock(&udc->lock);
884 if (err)
885 break;
886 }
887 err = isr_setup_status_phase(udc);
888 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
889 le16_to_cpu(req.wValue) ==
890 USB_DEVICE_REMOTE_WAKEUP) {
891 if (req.wLength != 0)
892 break;
893 udc->remote_wakeup = 0;
894 err = isr_setup_status_phase(udc);
895 } else {
896 goto delegate;
897 }
898 break;
899 case USB_REQ_GET_STATUS:
900 if (type != (USB_DIR_IN|USB_RECIP_DEVICE) &&
901 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
902 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
903 goto delegate;
904 if (le16_to_cpu(req.wLength) != 2 ||
905 le16_to_cpu(req.wValue) != 0)
906 break;
907 err = isr_get_status_response(udc, &req);
908 break;
909 case USB_REQ_SET_ADDRESS:
910 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
911 goto delegate;
912 if (le16_to_cpu(req.wLength) != 0 ||
913 le16_to_cpu(req.wIndex) != 0)
914 break;
915 udc->address = (u8)le16_to_cpu(req.wValue);
916 udc->setaddr = true;
917 err = isr_setup_status_phase(udc);
918 break;
919 case USB_REQ_SET_FEATURE:
920 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
921 le16_to_cpu(req.wValue) ==
922 USB_ENDPOINT_HALT) {
923 if (req.wLength != 0)
924 break;
925 num = le16_to_cpu(req.wIndex);
926 dir = num & USB_ENDPOINT_DIR_MASK;
927 num &= USB_ENDPOINT_NUMBER_MASK;
928 if (dir) /* TX */
929 num += udc->hw_ep_max/2;
930
931 spin_unlock(&udc->lock);
932 err = usb_ep_set_halt(&udc->ci13xxx_ep[num].ep);
933 spin_lock(&udc->lock);
934 if (!err)
935 isr_setup_status_phase(udc);
936 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
937 if (req.wLength != 0)
938 break;
939 switch (le16_to_cpu(req.wValue)) {
940 case USB_DEVICE_REMOTE_WAKEUP:
941 udc->remote_wakeup = 1;
942 err = isr_setup_status_phase(udc);
943 break;
944 case USB_DEVICE_TEST_MODE:
945 tmode = le16_to_cpu(req.wIndex) >> 8;
946 switch (tmode) {
947 case TEST_J:
948 case TEST_K:
949 case TEST_SE0_NAK:
950 case TEST_PACKET:
951 case TEST_FORCE_EN:
952 udc->test_mode = tmode;
953 err = isr_setup_status_phase(
954 udc);
955 break;
956 default:
957 break;
958 }
959 default:
960 goto delegate;
961 }
962 } else {
963 goto delegate;
964 }
965 break;
966 default:
967delegate:
968 if (req.wLength == 0) /* no data phase */
969 udc->ep0_dir = TX;
970
971 spin_unlock(&udc->lock);
972 err = udc->driver->setup(&udc->gadget, &req);
973 spin_lock(&udc->lock);
974 break;
975 }
976
977 if (err < 0) {
978 dbg_event(_usb_addr(mEp), "ERROR", err);
979
980 spin_unlock(&udc->lock);
981 if (usb_ep_set_halt(&mEp->ep))
982 dev_err(udc->dev, "error: ep_set_halt\n");
983 spin_lock(&udc->lock);
984 }
985 }
986}
987
988/******************************************************************************
989 * ENDPT block
990 *****************************************************************************/
991/**
992 * ep_enable: configure endpoint, making it usable
993 *
994 * Check usb_ep_enable() at "usb_gadget.h" for details
995 */
996static int ep_enable(struct usb_ep *ep,
997 const struct usb_endpoint_descriptor *desc)
998{
999 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1000 int retval = 0;
1001 unsigned long flags;
1002
1003 if (ep == NULL || desc == NULL)
1004 return -EINVAL;
1005
1006 spin_lock_irqsave(mEp->lock, flags);
1007
1008 /* only internal SW should enable ctrl endpts */
1009
1010 mEp->ep.desc = desc;
1011
1012 if (!list_empty(&mEp->qh.queue))
1013 dev_warn(mEp->udc->dev, "enabling a non-empty endpoint!\n");
1014
1015 mEp->dir = usb_endpoint_dir_in(desc) ? TX : RX;
1016 mEp->num = usb_endpoint_num(desc);
1017 mEp->type = usb_endpoint_type(desc);
1018
1019 mEp->ep.maxpacket = usb_endpoint_maxp(desc);
1020
1021 dbg_event(_usb_addr(mEp), "ENABLE", 0);
1022
1023 mEp->qh.ptr->cap = 0;
1024
1025 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
1026 mEp->qh.ptr->cap |= QH_IOS;
1027 else if (mEp->type == USB_ENDPOINT_XFER_ISOC)
1028 mEp->qh.ptr->cap &= ~QH_MULT;
1029 else
1030 mEp->qh.ptr->cap &= ~QH_ZLT;
1031
1032 mEp->qh.ptr->cap |=
1033 (mEp->ep.maxpacket << ffs_nr(QH_MAX_PKT)) & QH_MAX_PKT;
1034 mEp->qh.ptr->td.next |= TD_TERMINATE; /* needed? */
1035
1036 /*
1037 * Enable endpoints in the HW other than ep0 as ep0
1038 * is always enabled
1039 */
1040 if (mEp->num)
1041 retval |= hw_ep_enable(mEp->udc, mEp->num, mEp->dir, mEp->type);
1042
1043 spin_unlock_irqrestore(mEp->lock, flags);
1044 return retval;
1045}
1046
1047/**
1048 * ep_disable: endpoint is no longer usable
1049 *
1050 * Check usb_ep_disable() at "usb_gadget.h" for details
1051 */
1052static int ep_disable(struct usb_ep *ep)
1053{
1054 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1055 int direction, retval = 0;
1056 unsigned long flags;
1057
1058 if (ep == NULL)
1059 return -EINVAL;
1060 else if (mEp->ep.desc == NULL)
1061 return -EBUSY;
1062
1063 spin_lock_irqsave(mEp->lock, flags);
1064
1065 /* only internal SW should disable ctrl endpts */
1066
1067 direction = mEp->dir;
1068 do {
1069 dbg_event(_usb_addr(mEp), "DISABLE", 0);
1070
1071 retval |= _ep_nuke(mEp);
1072 retval |= hw_ep_disable(mEp->udc, mEp->num, mEp->dir);
1073
1074 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
1075 mEp->dir = (mEp->dir == TX) ? RX : TX;
1076
1077 } while (mEp->dir != direction);
1078
1079 mEp->ep.desc = NULL;
1080
1081 spin_unlock_irqrestore(mEp->lock, flags);
1082 return retval;
1083}
1084
1085/**
1086 * ep_alloc_request: allocate a request object to use with this endpoint
1087 *
1088 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
1089 */
1090static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
1091{
1092 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1093 struct ci13xxx_req *mReq = NULL;
1094
1095 if (ep == NULL)
1096 return NULL;
1097
1098 mReq = kzalloc(sizeof(struct ci13xxx_req), gfp_flags);
1099 if (mReq != NULL) {
1100 INIT_LIST_HEAD(&mReq->queue);
1101
1102 mReq->ptr = dma_pool_alloc(mEp->td_pool, gfp_flags,
1103 &mReq->dma);
1104 if (mReq->ptr == NULL) {
1105 kfree(mReq);
1106 mReq = NULL;
1107 }
1108 }
1109
1110 dbg_event(_usb_addr(mEp), "ALLOC", mReq == NULL);
1111
1112 return (mReq == NULL) ? NULL : &mReq->req;
1113}
1114
1115/**
1116 * ep_free_request: frees a request object
1117 *
1118 * Check usb_ep_free_request() at "usb_gadget.h" for details
1119 */
1120static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
1121{
1122 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1123 struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
1124 unsigned long flags;
1125
1126 if (ep == NULL || req == NULL) {
1127 return;
1128 } else if (!list_empty(&mReq->queue)) {
1129 dev_err(mEp->udc->dev, "freeing queued request\n");
1130 return;
1131 }
1132
1133 spin_lock_irqsave(mEp->lock, flags);
1134
1135 if (mReq->ptr)
1136 dma_pool_free(mEp->td_pool, mReq->ptr, mReq->dma);
1137 kfree(mReq);
1138
1139 dbg_event(_usb_addr(mEp), "FREE", 0);
1140
1141 spin_unlock_irqrestore(mEp->lock, flags);
1142}
1143
1144/**
1145 * ep_queue: queues (submits) an I/O request to an endpoint
1146 *
1147 * Check usb_ep_queue()* at usb_gadget.h" for details
1148 */
1149static int ep_queue(struct usb_ep *ep, struct usb_request *req,
1150 gfp_t __maybe_unused gfp_flags)
1151{
1152 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1153 struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
1154 struct ci13xxx *udc = mEp->udc;
1155 int retval = 0;
1156 unsigned long flags;
1157
1158 if (ep == NULL || req == NULL || mEp->ep.desc == NULL)
1159 return -EINVAL;
1160
1161 spin_lock_irqsave(mEp->lock, flags);
1162
1163 if (mEp->type == USB_ENDPOINT_XFER_CONTROL) {
1164 if (req->length)
1165 mEp = (udc->ep0_dir == RX) ?
1166 udc->ep0out : udc->ep0in;
1167 if (!list_empty(&mEp->qh.queue)) {
1168 _ep_nuke(mEp);
1169 retval = -EOVERFLOW;
1170 dev_warn(mEp->udc->dev, "endpoint ctrl %X nuked\n",
1171 _usb_addr(mEp));
1172 }
1173 }
1174
1175 /* first nuke then test link, e.g. previous status has not sent */
1176 if (!list_empty(&mReq->queue)) {
1177 retval = -EBUSY;
1178 dev_err(mEp->udc->dev, "request already in queue\n");
1179 goto done;
1180 }
1181
1182 if (req->length > 4 * CI13XXX_PAGE_SIZE) {
1183 req->length = 4 * CI13XXX_PAGE_SIZE;
1184 retval = -EMSGSIZE;
1185 dev_warn(mEp->udc->dev, "request length truncated\n");
1186 }
1187
1188 dbg_queue(_usb_addr(mEp), req, retval);
1189
1190 /* push request */
1191 mReq->req.status = -EINPROGRESS;
1192 mReq->req.actual = 0;
1193
1194 retval = _hardware_enqueue(mEp, mReq);
1195
1196 if (retval == -EALREADY) {
1197 dbg_event(_usb_addr(mEp), "QUEUE", retval);
1198 retval = 0;
1199 }
1200 if (!retval)
1201 list_add_tail(&mReq->queue, &mEp->qh.queue);
1202
1203 done:
1204 spin_unlock_irqrestore(mEp->lock, flags);
1205 return retval;
1206}
1207
1208/**
1209 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
1210 *
1211 * Check usb_ep_dequeue() at "usb_gadget.h" for details
1212 */
1213static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
1214{
1215 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1216 struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
1217 unsigned long flags;
1218
1219 if (ep == NULL || req == NULL || mReq->req.status != -EALREADY ||
1220 mEp->ep.desc == NULL || list_empty(&mReq->queue) ||
1221 list_empty(&mEp->qh.queue))
1222 return -EINVAL;
1223
1224 spin_lock_irqsave(mEp->lock, flags);
1225
1226 dbg_event(_usb_addr(mEp), "DEQUEUE", 0);
1227
1228 hw_ep_flush(mEp->udc, mEp->num, mEp->dir);
1229
1230 /* pop request */
1231 list_del_init(&mReq->queue);
1232
1233 usb_gadget_unmap_request(&mEp->udc->gadget, req, mEp->dir);
1234
1235 req->status = -ECONNRESET;
1236
1237 if (mReq->req.complete != NULL) {
1238 spin_unlock(mEp->lock);
1239 mReq->req.complete(&mEp->ep, &mReq->req);
1240 spin_lock(mEp->lock);
1241 }
1242
1243 spin_unlock_irqrestore(mEp->lock, flags);
1244 return 0;
1245}
1246
1247/**
1248 * ep_set_halt: sets the endpoint halt feature
1249 *
1250 * Check usb_ep_set_halt() at "usb_gadget.h" for details
1251 */
1252static int ep_set_halt(struct usb_ep *ep, int value)
1253{
1254 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1255 int direction, retval = 0;
1256 unsigned long flags;
1257
1258 if (ep == NULL || mEp->ep.desc == NULL)
1259 return -EINVAL;
1260
1261 spin_lock_irqsave(mEp->lock, flags);
1262
1263#ifndef STALL_IN
1264 /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */
1265 if (value && mEp->type == USB_ENDPOINT_XFER_BULK && mEp->dir == TX &&
1266 !list_empty(&mEp->qh.queue)) {
1267 spin_unlock_irqrestore(mEp->lock, flags);
1268 return -EAGAIN;
1269 }
1270#endif
1271
1272 direction = mEp->dir;
1273 do {
1274 dbg_event(_usb_addr(mEp), "HALT", value);
1275 retval |= hw_ep_set_halt(mEp->udc, mEp->num, mEp->dir, value);
1276
1277 if (!value)
1278 mEp->wedge = 0;
1279
1280 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
1281 mEp->dir = (mEp->dir == TX) ? RX : TX;
1282
1283 } while (mEp->dir != direction);
1284
1285 spin_unlock_irqrestore(mEp->lock, flags);
1286 return retval;
1287}
1288
1289/**
1290 * ep_set_wedge: sets the halt feature and ignores clear requests
1291 *
1292 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
1293 */
1294static int ep_set_wedge(struct usb_ep *ep)
1295{
1296 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1297 unsigned long flags;
1298
1299 if (ep == NULL || mEp->ep.desc == NULL)
1300 return -EINVAL;
1301
1302 spin_lock_irqsave(mEp->lock, flags);
1303
1304 dbg_event(_usb_addr(mEp), "WEDGE", 0);
1305 mEp->wedge = 1;
1306
1307 spin_unlock_irqrestore(mEp->lock, flags);
1308
1309 return usb_ep_set_halt(ep);
1310}
1311
1312/**
1313 * ep_fifo_flush: flushes contents of a fifo
1314 *
1315 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
1316 */
1317static void ep_fifo_flush(struct usb_ep *ep)
1318{
1319 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1320 unsigned long flags;
1321
1322 if (ep == NULL) {
1323 dev_err(mEp->udc->dev, "%02X: -EINVAL\n", _usb_addr(mEp));
1324 return;
1325 }
1326
1327 spin_lock_irqsave(mEp->lock, flags);
1328
1329 dbg_event(_usb_addr(mEp), "FFLUSH", 0);
1330 hw_ep_flush(mEp->udc, mEp->num, mEp->dir);
1331
1332 spin_unlock_irqrestore(mEp->lock, flags);
1333}
1334
1335/**
1336 * Endpoint-specific part of the API to the USB controller hardware
1337 * Check "usb_gadget.h" for details
1338 */
1339static const struct usb_ep_ops usb_ep_ops = {
1340 .enable = ep_enable,
1341 .disable = ep_disable,
1342 .alloc_request = ep_alloc_request,
1343 .free_request = ep_free_request,
1344 .queue = ep_queue,
1345 .dequeue = ep_dequeue,
1346 .set_halt = ep_set_halt,
1347 .set_wedge = ep_set_wedge,
1348 .fifo_flush = ep_fifo_flush,
1349};
1350
1351/******************************************************************************
1352 * GADGET block
1353 *****************************************************************************/
1354static int ci13xxx_vbus_session(struct usb_gadget *_gadget, int is_active)
1355{
1356 struct ci13xxx *udc = container_of(_gadget, struct ci13xxx, gadget);
1357 unsigned long flags;
1358 int gadget_ready = 0;
1359
1360 if (!(udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS))
1361 return -EOPNOTSUPP;
1362
1363 spin_lock_irqsave(&udc->lock, flags);
1364 udc->vbus_active = is_active;
1365 if (udc->driver)
1366 gadget_ready = 1;
1367 spin_unlock_irqrestore(&udc->lock, flags);
1368
1369 if (gadget_ready) {
1370 if (is_active) {
1371 pm_runtime_get_sync(&_gadget->dev);
1372 hw_device_reset(udc, USBMODE_CM_DC);
1373 hw_device_state(udc, udc->ep0out->qh.dma);
1374 } else {
1375 hw_device_state(udc, 0);
1376 if (udc->udc_driver->notify_event)
1377 udc->udc_driver->notify_event(udc,
1378 CI13XXX_CONTROLLER_STOPPED_EVENT);
1379 _gadget_stop_activity(&udc->gadget);
1380 pm_runtime_put_sync(&_gadget->dev);
1381 }
1382 }
1383
1384 return 0;
1385}
1386
1387static int ci13xxx_wakeup(struct usb_gadget *_gadget)
1388{
1389 struct ci13xxx *udc = container_of(_gadget, struct ci13xxx, gadget);
1390 unsigned long flags;
1391 int ret = 0;
1392
1393 spin_lock_irqsave(&udc->lock, flags);
1394 if (!udc->remote_wakeup) {
1395 ret = -EOPNOTSUPP;
1396 goto out;
1397 }
1398 if (!hw_read(udc, OP_PORTSC, PORTSC_SUSP)) {
1399 ret = -EINVAL;
1400 goto out;
1401 }
1402 hw_write(udc, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
1403out:
1404 spin_unlock_irqrestore(&udc->lock, flags);
1405 return ret;
1406}
1407
1408static int ci13xxx_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
1409{
1410 struct ci13xxx *udc = container_of(_gadget, struct ci13xxx, gadget);
1411
1412 if (udc->transceiver)
1413 return usb_phy_set_power(udc->transceiver, mA);
1414 return -ENOTSUPP;
1415}
1416
1417/* Change Data+ pullup status
1418 * this func is used by usb_gadget_connect/disconnet
1419 */
1420static int ci13xxx_pullup(struct usb_gadget *_gadget, int is_on)
1421{
1422 struct ci13xxx *ci = container_of(_gadget, struct ci13xxx, gadget);
1423
1424 if (is_on)
1425 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
1426 else
1427 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
1428
1429 return 0;
1430}
1431
1432static int ci13xxx_start(struct usb_gadget *gadget,
1433 struct usb_gadget_driver *driver);
1434static int ci13xxx_stop(struct usb_gadget *gadget,
1435 struct usb_gadget_driver *driver);
1436/**
1437 * Device operations part of the API to the USB controller hardware,
1438 * which don't involve endpoints (or i/o)
1439 * Check "usb_gadget.h" for details
1440 */
1441static const struct usb_gadget_ops usb_gadget_ops = {
1442 .vbus_session = ci13xxx_vbus_session,
1443 .wakeup = ci13xxx_wakeup,
1444 .pullup = ci13xxx_pullup,
1445 .vbus_draw = ci13xxx_vbus_draw,
1446 .udc_start = ci13xxx_start,
1447 .udc_stop = ci13xxx_stop,
1448};
1449
1450static int init_eps(struct ci13xxx *udc)
1451{
1452 int retval = 0, i, j;
1453
1454 for (i = 0; i < udc->hw_ep_max/2; i++)
1455 for (j = RX; j <= TX; j++) {
1456 int k = i + j * udc->hw_ep_max/2;
1457 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[k];
1458
1459 scnprintf(mEp->name, sizeof(mEp->name), "ep%i%s", i,
1460 (j == TX) ? "in" : "out");
1461
1462 mEp->udc = udc;
1463 mEp->lock = &udc->lock;
1464 mEp->td_pool = udc->td_pool;
1465
1466 mEp->ep.name = mEp->name;
1467 mEp->ep.ops = &usb_ep_ops;
1468 /*
1469 * for ep0: maxP defined in desc, for other
1470 * eps, maxP is set by epautoconfig() called
1471 * by gadget layer
1472 */
1473 mEp->ep.maxpacket = (unsigned short)~0;
1474
1475 INIT_LIST_HEAD(&mEp->qh.queue);
1476 mEp->qh.ptr = dma_pool_alloc(udc->qh_pool, GFP_KERNEL,
1477 &mEp->qh.dma);
1478 if (mEp->qh.ptr == NULL)
1479 retval = -ENOMEM;
1480 else
1481 memset(mEp->qh.ptr, 0, sizeof(*mEp->qh.ptr));
1482
1483 /*
1484 * set up shorthands for ep0 out and in endpoints,
1485 * don't add to gadget's ep_list
1486 */
1487 if (i == 0) {
1488 if (j == RX)
1489 udc->ep0out = mEp;
1490 else
1491 udc->ep0in = mEp;
1492
1493 mEp->ep.maxpacket = CTRL_PAYLOAD_MAX;
1494 continue;
1495 }
1496
1497 list_add_tail(&mEp->ep.ep_list, &udc->gadget.ep_list);
1498 }
1499
1500 return retval;
1501}
1502
1503static void destroy_eps(struct ci13xxx *udc)
1504{
1505 int i;
1506
1507 for (i = 0; i < udc->hw_ep_max; i++) {
1508 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i];
1509
1510 dma_pool_free(udc->qh_pool, mEp->qh.ptr, mEp->qh.dma);
1511 }
1512}
1513
1514/**
1515 * ci13xxx_start: register a gadget driver
1516 * @gadget: our gadget
1517 * @driver: the driver being registered
1518 *
1519 * Interrupts are enabled here.
1520 */
1521static int ci13xxx_start(struct usb_gadget *gadget,
1522 struct usb_gadget_driver *driver)
1523{
1524 struct ci13xxx *udc = container_of(gadget, struct ci13xxx, gadget);
1525 unsigned long flags;
1526 int retval = -ENOMEM;
1527
1528 if (driver->disconnect == NULL)
1529 return -EINVAL;
1530
1531
1532 udc->ep0out->ep.desc = &ctrl_endpt_out_desc;
1533 retval = usb_ep_enable(&udc->ep0out->ep);
1534 if (retval)
1535 return retval;
1536
1537 udc->ep0in->ep.desc = &ctrl_endpt_in_desc;
1538 retval = usb_ep_enable(&udc->ep0in->ep);
1539 if (retval)
1540 return retval;
1541 spin_lock_irqsave(&udc->lock, flags);
1542
1543 udc->driver = driver;
1544 pm_runtime_get_sync(&udc->gadget.dev);
1545 if (udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS) {
1546 if (udc->vbus_active) {
1547 if (udc->udc_driver->flags & CI13XXX_REGS_SHARED)
1548 hw_device_reset(udc, USBMODE_CM_DC);
1549 } else {
1550 pm_runtime_put_sync(&udc->gadget.dev);
1551 goto done;
1552 }
1553 }
1554
1555 retval = hw_device_state(udc, udc->ep0out->qh.dma);
1556 if (retval)
1557 pm_runtime_put_sync(&udc->gadget.dev);
1558
1559 done:
1560 spin_unlock_irqrestore(&udc->lock, flags);
1561 return retval;
1562}
1563
1564/**
1565 * ci13xxx_stop: unregister a gadget driver
1566 */
1567static int ci13xxx_stop(struct usb_gadget *gadget,
1568 struct usb_gadget_driver *driver)
1569{
1570 struct ci13xxx *udc = container_of(gadget, struct ci13xxx, gadget);
1571 unsigned long flags;
1572
1573 spin_lock_irqsave(&udc->lock, flags);
1574
1575 if (!(udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS) ||
1576 udc->vbus_active) {
1577 hw_device_state(udc, 0);
1578 if (udc->udc_driver->notify_event)
1579 udc->udc_driver->notify_event(udc,
1580 CI13XXX_CONTROLLER_STOPPED_EVENT);
1581 udc->driver = NULL;
1582 spin_unlock_irqrestore(&udc->lock, flags);
1583 _gadget_stop_activity(&udc->gadget);
1584 spin_lock_irqsave(&udc->lock, flags);
1585 pm_runtime_put(&udc->gadget.dev);
1586 }
1587
1588 spin_unlock_irqrestore(&udc->lock, flags);
1589
1590 return 0;
1591}
1592
1593/******************************************************************************
1594 * BUS block
1595 *****************************************************************************/
1596/**
1597 * udc_irq: udc interrupt handler
1598 *
1599 * This function returns IRQ_HANDLED if the IRQ has been handled
1600 * It locks access to registers
1601 */
1602static irqreturn_t udc_irq(struct ci13xxx *udc)
1603{
1604 irqreturn_t retval;
1605 u32 intr;
1606
1607 if (udc == NULL)
1608 return IRQ_HANDLED;
1609
1610 spin_lock(&udc->lock);
1611
1612 if (udc->udc_driver->flags & CI13XXX_REGS_SHARED) {
1613 if (hw_read(udc, OP_USBMODE, USBMODE_CM) !=
1614 USBMODE_CM_DC) {
1615 spin_unlock(&udc->lock);
1616 return IRQ_NONE;
1617 }
1618 }
1619 intr = hw_test_and_clear_intr_active(udc);
1620 dbg_interrupt(intr);
1621
1622 if (intr) {
1623 /* order defines priority - do NOT change it */
1624 if (USBi_URI & intr)
1625 isr_reset_handler(udc);
1626
1627 if (USBi_PCI & intr) {
1628 udc->gadget.speed = hw_port_is_high_speed(udc) ?
1629 USB_SPEED_HIGH : USB_SPEED_FULL;
1630 if (udc->suspended && udc->driver->resume) {
1631 spin_unlock(&udc->lock);
1632 udc->driver->resume(&udc->gadget);
1633 spin_lock(&udc->lock);
1634 udc->suspended = 0;
1635 }
1636 }
1637
1638 if (USBi_UI & intr)
1639 isr_tr_complete_handler(udc);
1640
1641 if (USBi_SLI & intr) {
1642 if (udc->gadget.speed != USB_SPEED_UNKNOWN &&
1643 udc->driver->suspend) {
1644 udc->suspended = 1;
1645 spin_unlock(&udc->lock);
1646 udc->driver->suspend(&udc->gadget);
1647 spin_lock(&udc->lock);
1648 }
1649 }
1650 retval = IRQ_HANDLED;
1651 } else {
1652 retval = IRQ_NONE;
1653 }
1654 spin_unlock(&udc->lock);
1655
1656 return retval;
1657}
1658
1659/**
1660 * udc_release: driver release function
1661 * @dev: device
1662 *
1663 * Currently does nothing
1664 */
1665static void udc_release(struct device *dev)
1666{
1667}
1668
1669/**
1670 * udc_start: initialize gadget role
1671 * @udc: chipidea controller
1672 */
1673static int udc_start(struct ci13xxx *udc)
1674{
1675 struct device *dev = udc->dev;
1676 int retval = 0;
1677
1678 if (!udc)
1679 return -EINVAL;
1680
1681 spin_lock_init(&udc->lock);
1682
1683 udc->gadget.ops = &usb_gadget_ops;
1684 udc->gadget.speed = USB_SPEED_UNKNOWN;
1685 udc->gadget.max_speed = USB_SPEED_HIGH;
1686 udc->gadget.is_otg = 0;
1687 udc->gadget.name = udc->udc_driver->name;
1688
1689 INIT_LIST_HEAD(&udc->gadget.ep_list);
1690
1691 dev_set_name(&udc->gadget.dev, "gadget");
1692 udc->gadget.dev.dma_mask = dev->dma_mask;
1693 udc->gadget.dev.coherent_dma_mask = dev->coherent_dma_mask;
1694 udc->gadget.dev.parent = dev;
1695 udc->gadget.dev.release = udc_release;
1696
1697 /* alloc resources */
1698 udc->qh_pool = dma_pool_create("ci13xxx_qh", dev,
1699 sizeof(struct ci13xxx_qh),
1700 64, CI13XXX_PAGE_SIZE);
1701 if (udc->qh_pool == NULL)
1702 return -ENOMEM;
1703
1704 udc->td_pool = dma_pool_create("ci13xxx_td", dev,
1705 sizeof(struct ci13xxx_td),
1706 64, CI13XXX_PAGE_SIZE);
1707 if (udc->td_pool == NULL) {
1708 retval = -ENOMEM;
1709 goto free_qh_pool;
1710 }
1711
1712 retval = init_eps(udc);
1713 if (retval)
1714 goto free_pools;
1715
1716 udc->gadget.ep0 = &udc->ep0in->ep;
1717
1718 udc->transceiver = usb_get_transceiver();
1719
1720 if (udc->udc_driver->flags & CI13XXX_REQUIRE_TRANSCEIVER) {
1721 if (udc->transceiver == NULL) {
1722 retval = -ENODEV;
1723 goto destroy_eps;
1724 }
1725 }
1726
1727 if (!(udc->udc_driver->flags & CI13XXX_REGS_SHARED)) {
1728 retval = hw_device_reset(udc, USBMODE_CM_DC);
1729 if (retval)
1730 goto put_transceiver;
1731 }
1732
1733 retval = device_register(&udc->gadget.dev);
1734 if (retval) {
1735 put_device(&udc->gadget.dev);
1736 goto put_transceiver;
1737 }
1738
1739 retval = dbg_create_files(&udc->gadget.dev);
1740 if (retval)
1741 goto unreg_device;
1742
1743 if (udc->transceiver) {
1744 retval = otg_set_peripheral(udc->transceiver->otg,
1745 &udc->gadget);
1746 if (retval)
1747 goto remove_dbg;
1748 }
1749
1750 retval = usb_add_gadget_udc(dev, &udc->gadget);
1751 if (retval)
1752 goto remove_trans;
1753
1754 pm_runtime_no_callbacks(&udc->gadget.dev);
1755 pm_runtime_enable(&udc->gadget.dev);
1756
1757 return retval;
1758
1759remove_trans:
1760 if (udc->transceiver) {
1761 otg_set_peripheral(udc->transceiver->otg, NULL);
1762 usb_put_transceiver(udc->transceiver);
1763 }
1764
1765 dev_err(dev, "error = %i\n", retval);
1766remove_dbg:
1767 dbg_remove_files(&udc->gadget.dev);
1768unreg_device:
1769 device_unregister(&udc->gadget.dev);
1770put_transceiver:
1771 if (udc->transceiver)
1772 usb_put_transceiver(udc->transceiver);
1773destroy_eps:
1774 destroy_eps(udc);
1775free_pools:
1776 dma_pool_destroy(udc->td_pool);
1777free_qh_pool:
1778 dma_pool_destroy(udc->qh_pool);
1779 return retval;
1780}
1781
1782/**
1783 * udc_remove: parent remove must call this to remove UDC
1784 *
1785 * No interrupts active, the IRQ has been released
1786 */
1787static void udc_stop(struct ci13xxx *udc)
1788{
1789 if (udc == NULL)
1790 return;
1791
1792 usb_del_gadget_udc(&udc->gadget);
1793
1794 destroy_eps(udc);
1795
1796 dma_pool_destroy(udc->td_pool);
1797 dma_pool_destroy(udc->qh_pool);
1798
1799 if (udc->transceiver) {
1800 otg_set_peripheral(udc->transceiver->otg, NULL);
1801 usb_put_transceiver(udc->transceiver);
1802 }
1803 dbg_remove_files(&udc->gadget.dev);
1804 device_unregister(&udc->gadget.dev);
1805 /* my kobject is dynamic, I swear! */
1806 memset(&udc->gadget, 0, sizeof(udc->gadget));
1807}
1808
1809/**
1810 * ci_hdrc_gadget_init - initialize device related bits
1811 * ci: the controller
1812 *
1813 * This function enables the gadget role, if the device is "device capable".
1814 */
1815int ci_hdrc_gadget_init(struct ci13xxx *ci)
1816{
1817 struct ci_role_driver *rdrv;
1818
1819 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
1820 return -ENXIO;
1821
1822 rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
1823 if (!rdrv)
1824 return -ENOMEM;
1825
1826 rdrv->start = udc_start;
1827 rdrv->stop = udc_stop;
1828 rdrv->irq = udc_irq;
1829 rdrv->name = "gadget";
1830 ci->roles[CI_ROLE_GADGET] = rdrv;
1831
1832 return 0;
1833}