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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Synopsys DesignWare I2C adapter driver (slave only).
4 *
5 * Based on the Synopsys DesignWare I2C adapter driver (master).
6 *
7 * Copyright (C) 2016 Synopsys Inc.
8 */
9#include <linux/delay.h>
10#include <linux/err.h>
11#include <linux/errno.h>
12#include <linux/i2c.h>
13#include <linux/interrupt.h>
14#include <linux/io.h>
15#include <linux/module.h>
16#include <linux/pm_runtime.h>
17#include <linux/regmap.h>
18
19#include "i2c-designware-core.h"
20
21static void i2c_dw_configure_fifo_slave(struct dw_i2c_dev *dev)
22{
23 /* Configure Tx/Rx FIFO threshold levels. */
24 regmap_write(dev->map, DW_IC_TX_TL, 0);
25 regmap_write(dev->map, DW_IC_RX_TL, 0);
26
27 /* Configure the I2C slave. */
28 regmap_write(dev->map, DW_IC_CON, dev->slave_cfg);
29 regmap_write(dev->map, DW_IC_INTR_MASK, DW_IC_INTR_SLAVE_MASK);
30}
31
32/**
33 * i2c_dw_init_slave() - Initialize the designware i2c slave hardware
34 * @dev: device private data
35 *
36 * This function configures and enables the I2C in slave mode.
37 * This function is called during I2C init function, and in case of timeout at
38 * run time.
39 */
40static int i2c_dw_init_slave(struct dw_i2c_dev *dev)
41{
42 int ret;
43
44 ret = i2c_dw_acquire_lock(dev);
45 if (ret)
46 return ret;
47
48 /* Disable the adapter. */
49 __i2c_dw_disable(dev);
50
51 /* Write SDA hold time if supported */
52 if (dev->sda_hold_time)
53 regmap_write(dev->map, DW_IC_SDA_HOLD, dev->sda_hold_time);
54
55 i2c_dw_configure_fifo_slave(dev);
56 i2c_dw_release_lock(dev);
57
58 return 0;
59}
60
61static int i2c_dw_reg_slave(struct i2c_client *slave)
62{
63 struct dw_i2c_dev *dev = i2c_get_adapdata(slave->adapter);
64
65 if (dev->slave)
66 return -EBUSY;
67 if (slave->flags & I2C_CLIENT_TEN)
68 return -EAFNOSUPPORT;
69 pm_runtime_get_sync(dev->dev);
70
71 /*
72 * Set slave address in the IC_SAR register,
73 * the address to which the DW_apb_i2c responds.
74 */
75 __i2c_dw_disable_nowait(dev);
76 regmap_write(dev->map, DW_IC_SAR, slave->addr);
77 dev->slave = slave;
78
79 __i2c_dw_enable(dev);
80
81 dev->status = 0;
82
83 return 0;
84}
85
86static int i2c_dw_unreg_slave(struct i2c_client *slave)
87{
88 struct dw_i2c_dev *dev = i2c_get_adapdata(slave->adapter);
89
90 regmap_write(dev->map, DW_IC_INTR_MASK, 0);
91 dev->disable(dev);
92 synchronize_irq(dev->irq);
93 dev->slave = NULL;
94 pm_runtime_put(dev->dev);
95
96 return 0;
97}
98
99static u32 i2c_dw_read_clear_intrbits_slave(struct dw_i2c_dev *dev)
100{
101 u32 stat, dummy;
102
103 /*
104 * The IC_INTR_STAT register just indicates "enabled" interrupts.
105 * The unmasked raw version of interrupt status bits is available
106 * in the IC_RAW_INTR_STAT register.
107 *
108 * That is,
109 * stat = readl(IC_INTR_STAT);
110 * equals to,
111 * stat = readl(IC_RAW_INTR_STAT) & readl(IC_INTR_MASK);
112 *
113 * The raw version might be useful for debugging purposes.
114 */
115 regmap_read(dev->map, DW_IC_INTR_STAT, &stat);
116
117 /*
118 * Do not use the IC_CLR_INTR register to clear interrupts, or
119 * you'll miss some interrupts, triggered during the period from
120 * readl(IC_INTR_STAT) to readl(IC_CLR_INTR).
121 *
122 * Instead, use the separately-prepared IC_CLR_* registers.
123 */
124 if (stat & DW_IC_INTR_TX_ABRT)
125 regmap_read(dev->map, DW_IC_CLR_TX_ABRT, &dummy);
126 if (stat & DW_IC_INTR_RX_UNDER)
127 regmap_read(dev->map, DW_IC_CLR_RX_UNDER, &dummy);
128 if (stat & DW_IC_INTR_RX_OVER)
129 regmap_read(dev->map, DW_IC_CLR_RX_OVER, &dummy);
130 if (stat & DW_IC_INTR_TX_OVER)
131 regmap_read(dev->map, DW_IC_CLR_TX_OVER, &dummy);
132 if (stat & DW_IC_INTR_RX_DONE)
133 regmap_read(dev->map, DW_IC_CLR_RX_DONE, &dummy);
134 if (stat & DW_IC_INTR_ACTIVITY)
135 regmap_read(dev->map, DW_IC_CLR_ACTIVITY, &dummy);
136 if (stat & DW_IC_INTR_STOP_DET)
137 regmap_read(dev->map, DW_IC_CLR_STOP_DET, &dummy);
138 if (stat & DW_IC_INTR_START_DET)
139 regmap_read(dev->map, DW_IC_CLR_START_DET, &dummy);
140 if (stat & DW_IC_INTR_GEN_CALL)
141 regmap_read(dev->map, DW_IC_CLR_GEN_CALL, &dummy);
142
143 return stat;
144}
145
146/*
147 * Interrupt service routine. This gets called whenever an I2C slave interrupt
148 * occurs.
149 */
150static irqreturn_t i2c_dw_isr_slave(int this_irq, void *dev_id)
151{
152 struct dw_i2c_dev *dev = dev_id;
153 u32 raw_stat, stat, enabled, tmp;
154 u8 val = 0, slave_activity;
155
156 regmap_read(dev->map, DW_IC_ENABLE, &enabled);
157 regmap_read(dev->map, DW_IC_RAW_INTR_STAT, &raw_stat);
158 regmap_read(dev->map, DW_IC_STATUS, &tmp);
159 slave_activity = ((tmp & DW_IC_STATUS_SLAVE_ACTIVITY) >> 6);
160
161 if (!enabled || !(raw_stat & ~DW_IC_INTR_ACTIVITY) || !dev->slave)
162 return IRQ_NONE;
163
164 stat = i2c_dw_read_clear_intrbits_slave(dev);
165 dev_dbg(dev->dev,
166 "%#x STATUS SLAVE_ACTIVITY=%#x : RAW_INTR_STAT=%#x : INTR_STAT=%#x\n",
167 enabled, slave_activity, raw_stat, stat);
168
169 if (stat & DW_IC_INTR_RX_FULL) {
170 if (!(dev->status & STATUS_WRITE_IN_PROGRESS)) {
171 dev->status |= STATUS_WRITE_IN_PROGRESS;
172 dev->status &= ~STATUS_READ_IN_PROGRESS;
173 i2c_slave_event(dev->slave, I2C_SLAVE_WRITE_REQUESTED,
174 &val);
175 }
176
177 do {
178 regmap_read(dev->map, DW_IC_DATA_CMD, &tmp);
179 val = tmp;
180 i2c_slave_event(dev->slave, I2C_SLAVE_WRITE_RECEIVED,
181 &val);
182 regmap_read(dev->map, DW_IC_STATUS, &tmp);
183 } while (tmp & DW_IC_STATUS_RFNE);
184 }
185
186 if (stat & DW_IC_INTR_RD_REQ) {
187 if (slave_activity) {
188 regmap_read(dev->map, DW_IC_CLR_RD_REQ, &tmp);
189
190 if (!(dev->status & STATUS_READ_IN_PROGRESS)) {
191 i2c_slave_event(dev->slave,
192 I2C_SLAVE_READ_REQUESTED,
193 &val);
194 dev->status |= STATUS_READ_IN_PROGRESS;
195 dev->status &= ~STATUS_WRITE_IN_PROGRESS;
196 } else {
197 i2c_slave_event(dev->slave,
198 I2C_SLAVE_READ_PROCESSED,
199 &val);
200 }
201 regmap_write(dev->map, DW_IC_DATA_CMD, val);
202 }
203 }
204
205 if (stat & DW_IC_INTR_STOP_DET)
206 i2c_slave_event(dev->slave, I2C_SLAVE_STOP, &val);
207
208 return IRQ_HANDLED;
209}
210
211static const struct i2c_algorithm i2c_dw_algo = {
212 .functionality = i2c_dw_func,
213 .reg_slave = i2c_dw_reg_slave,
214 .unreg_slave = i2c_dw_unreg_slave,
215};
216
217void i2c_dw_configure_slave(struct dw_i2c_dev *dev)
218{
219 dev->functionality = I2C_FUNC_SLAVE | DW_IC_DEFAULT_FUNCTIONALITY;
220
221 dev->slave_cfg = DW_IC_CON_RX_FIFO_FULL_HLD_CTRL |
222 DW_IC_CON_RESTART_EN | DW_IC_CON_STOP_DET_IFADDRESSED;
223
224 dev->mode = DW_IC_SLAVE;
225}
226EXPORT_SYMBOL_GPL(i2c_dw_configure_slave);
227
228int i2c_dw_probe_slave(struct dw_i2c_dev *dev)
229{
230 struct i2c_adapter *adap = &dev->adapter;
231 int ret;
232
233 dev->init = i2c_dw_init_slave;
234 dev->disable = i2c_dw_disable;
235
236 ret = i2c_dw_init_regmap(dev);
237 if (ret)
238 return ret;
239
240 ret = i2c_dw_set_sda_hold(dev);
241 if (ret)
242 return ret;
243
244 ret = i2c_dw_set_fifo_size(dev);
245 if (ret)
246 return ret;
247
248 ret = dev->init(dev);
249 if (ret)
250 return ret;
251
252 snprintf(adap->name, sizeof(adap->name),
253 "Synopsys DesignWare I2C Slave adapter");
254 adap->retries = 3;
255 adap->algo = &i2c_dw_algo;
256 adap->dev.parent = dev->dev;
257 i2c_set_adapdata(adap, dev);
258
259 ret = devm_request_irq(dev->dev, dev->irq, i2c_dw_isr_slave,
260 IRQF_SHARED, dev_name(dev->dev), dev);
261 if (ret) {
262 dev_err(dev->dev, "failure requesting irq %i: %d\n",
263 dev->irq, ret);
264 return ret;
265 }
266
267 ret = i2c_add_numbered_adapter(adap);
268 if (ret)
269 dev_err(dev->dev, "failure adding adapter: %d\n", ret);
270
271 return ret;
272}
273EXPORT_SYMBOL_GPL(i2c_dw_probe_slave);
274
275MODULE_AUTHOR("Luis Oliveira <lolivei@synopsys.com>");
276MODULE_DESCRIPTION("Synopsys DesignWare I2C bus slave adapter");
277MODULE_LICENSE("GPL v2");
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Synopsys DesignWare I2C adapter driver (slave only).
4 *
5 * Based on the Synopsys DesignWare I2C adapter driver (master).
6 *
7 * Copyright (C) 2016 Synopsys Inc.
8 */
9#include <linux/delay.h>
10#include <linux/err.h>
11#include <linux/errno.h>
12#include <linux/i2c.h>
13#include <linux/interrupt.h>
14#include <linux/io.h>
15#include <linux/module.h>
16#include <linux/pm_runtime.h>
17#include <linux/regmap.h>
18
19#include "i2c-designware-core.h"
20
21static void i2c_dw_configure_fifo_slave(struct dw_i2c_dev *dev)
22{
23 /* Configure Tx/Rx FIFO threshold levels. */
24 regmap_write(dev->map, DW_IC_TX_TL, 0);
25 regmap_write(dev->map, DW_IC_RX_TL, 0);
26
27 /* Configure the I2C slave. */
28 regmap_write(dev->map, DW_IC_CON, dev->slave_cfg);
29 regmap_write(dev->map, DW_IC_INTR_MASK, DW_IC_INTR_SLAVE_MASK);
30}
31
32/**
33 * i2c_dw_init_slave() - Initialize the designware i2c slave hardware
34 * @dev: device private data
35 *
36 * This function configures and enables the I2C in slave mode.
37 * This function is called during I2C init function, and in case of timeout at
38 * run time.
39 */
40static int i2c_dw_init_slave(struct dw_i2c_dev *dev)
41{
42 int ret;
43
44 ret = i2c_dw_acquire_lock(dev);
45 if (ret)
46 return ret;
47
48 /* Disable the adapter. */
49 __i2c_dw_disable(dev);
50
51 /* Write SDA hold time if supported */
52 if (dev->sda_hold_time)
53 regmap_write(dev->map, DW_IC_SDA_HOLD, dev->sda_hold_time);
54
55 i2c_dw_configure_fifo_slave(dev);
56 i2c_dw_release_lock(dev);
57
58 return 0;
59}
60
61static int i2c_dw_reg_slave(struct i2c_client *slave)
62{
63 struct dw_i2c_dev *dev = i2c_get_adapdata(slave->adapter);
64
65 if (dev->slave)
66 return -EBUSY;
67 if (slave->flags & I2C_CLIENT_TEN)
68 return -EAFNOSUPPORT;
69 pm_runtime_get_sync(dev->dev);
70
71 /*
72 * Set slave address in the IC_SAR register,
73 * the address to which the DW_apb_i2c responds.
74 */
75 __i2c_dw_disable_nowait(dev);
76 regmap_write(dev->map, DW_IC_SAR, slave->addr);
77 dev->slave = slave;
78
79 __i2c_dw_enable(dev);
80
81 dev->cmd_err = 0;
82 dev->msg_write_idx = 0;
83 dev->msg_read_idx = 0;
84 dev->msg_err = 0;
85 dev->status = STATUS_IDLE;
86 dev->abort_source = 0;
87 dev->rx_outstanding = 0;
88
89 return 0;
90}
91
92static int i2c_dw_unreg_slave(struct i2c_client *slave)
93{
94 struct dw_i2c_dev *dev = i2c_get_adapdata(slave->adapter);
95
96 dev->disable_int(dev);
97 dev->disable(dev);
98 synchronize_irq(dev->irq);
99 dev->slave = NULL;
100 pm_runtime_put(dev->dev);
101
102 return 0;
103}
104
105static u32 i2c_dw_read_clear_intrbits_slave(struct dw_i2c_dev *dev)
106{
107 u32 stat, dummy;
108
109 /*
110 * The IC_INTR_STAT register just indicates "enabled" interrupts.
111 * The unmasked raw version of interrupt status bits is available
112 * in the IC_RAW_INTR_STAT register.
113 *
114 * That is,
115 * stat = readl(IC_INTR_STAT);
116 * equals to,
117 * stat = readl(IC_RAW_INTR_STAT) & readl(IC_INTR_MASK);
118 *
119 * The raw version might be useful for debugging purposes.
120 */
121 regmap_read(dev->map, DW_IC_INTR_STAT, &stat);
122
123 /*
124 * Do not use the IC_CLR_INTR register to clear interrupts, or
125 * you'll miss some interrupts, triggered during the period from
126 * readl(IC_INTR_STAT) to readl(IC_CLR_INTR).
127 *
128 * Instead, use the separately-prepared IC_CLR_* registers.
129 */
130 if (stat & DW_IC_INTR_TX_ABRT)
131 regmap_read(dev->map, DW_IC_CLR_TX_ABRT, &dummy);
132 if (stat & DW_IC_INTR_RX_UNDER)
133 regmap_read(dev->map, DW_IC_CLR_RX_UNDER, &dummy);
134 if (stat & DW_IC_INTR_RX_OVER)
135 regmap_read(dev->map, DW_IC_CLR_RX_OVER, &dummy);
136 if (stat & DW_IC_INTR_TX_OVER)
137 regmap_read(dev->map, DW_IC_CLR_TX_OVER, &dummy);
138 if (stat & DW_IC_INTR_RX_DONE)
139 regmap_read(dev->map, DW_IC_CLR_RX_DONE, &dummy);
140 if (stat & DW_IC_INTR_ACTIVITY)
141 regmap_read(dev->map, DW_IC_CLR_ACTIVITY, &dummy);
142 if (stat & DW_IC_INTR_STOP_DET)
143 regmap_read(dev->map, DW_IC_CLR_STOP_DET, &dummy);
144 if (stat & DW_IC_INTR_START_DET)
145 regmap_read(dev->map, DW_IC_CLR_START_DET, &dummy);
146 if (stat & DW_IC_INTR_GEN_CALL)
147 regmap_read(dev->map, DW_IC_CLR_GEN_CALL, &dummy);
148
149 return stat;
150}
151
152/*
153 * Interrupt service routine. This gets called whenever an I2C slave interrupt
154 * occurs.
155 */
156
157static int i2c_dw_irq_handler_slave(struct dw_i2c_dev *dev)
158{
159 u32 raw_stat, stat, enabled, tmp;
160 u8 val = 0, slave_activity;
161
162 regmap_read(dev->map, DW_IC_ENABLE, &enabled);
163 regmap_read(dev->map, DW_IC_RAW_INTR_STAT, &raw_stat);
164 regmap_read(dev->map, DW_IC_STATUS, &tmp);
165 slave_activity = ((tmp & DW_IC_STATUS_SLAVE_ACTIVITY) >> 6);
166
167 if (!enabled || !(raw_stat & ~DW_IC_INTR_ACTIVITY) || !dev->slave)
168 return 0;
169
170 stat = i2c_dw_read_clear_intrbits_slave(dev);
171 dev_dbg(dev->dev,
172 "%#x STATUS SLAVE_ACTIVITY=%#x : RAW_INTR_STAT=%#x : INTR_STAT=%#x\n",
173 enabled, slave_activity, raw_stat, stat);
174
175 if (stat & DW_IC_INTR_RX_FULL) {
176 if (dev->status != STATUS_WRITE_IN_PROGRESS) {
177 dev->status = STATUS_WRITE_IN_PROGRESS;
178 i2c_slave_event(dev->slave, I2C_SLAVE_WRITE_REQUESTED,
179 &val);
180 }
181
182 regmap_read(dev->map, DW_IC_DATA_CMD, &tmp);
183 val = tmp;
184 if (!i2c_slave_event(dev->slave, I2C_SLAVE_WRITE_RECEIVED,
185 &val))
186 dev_vdbg(dev->dev, "Byte %X acked!", val);
187 }
188
189 if (stat & DW_IC_INTR_RD_REQ) {
190 if (slave_activity) {
191 regmap_read(dev->map, DW_IC_CLR_RD_REQ, &tmp);
192
193 dev->status = STATUS_READ_IN_PROGRESS;
194 if (!i2c_slave_event(dev->slave,
195 I2C_SLAVE_READ_REQUESTED,
196 &val))
197 regmap_write(dev->map, DW_IC_DATA_CMD, val);
198 }
199 }
200
201 if (stat & DW_IC_INTR_RX_DONE) {
202 if (!i2c_slave_event(dev->slave, I2C_SLAVE_READ_PROCESSED,
203 &val))
204 regmap_read(dev->map, DW_IC_CLR_RX_DONE, &tmp);
205 }
206
207 if (stat & DW_IC_INTR_STOP_DET) {
208 dev->status = STATUS_IDLE;
209 i2c_slave_event(dev->slave, I2C_SLAVE_STOP, &val);
210 }
211
212 return 1;
213}
214
215static irqreturn_t i2c_dw_isr_slave(int this_irq, void *dev_id)
216{
217 struct dw_i2c_dev *dev = dev_id;
218 int ret;
219
220 ret = i2c_dw_irq_handler_slave(dev);
221 if (ret > 0)
222 complete(&dev->cmd_complete);
223
224 return IRQ_RETVAL(ret);
225}
226
227static const struct i2c_algorithm i2c_dw_algo = {
228 .functionality = i2c_dw_func,
229 .reg_slave = i2c_dw_reg_slave,
230 .unreg_slave = i2c_dw_unreg_slave,
231};
232
233void i2c_dw_configure_slave(struct dw_i2c_dev *dev)
234{
235 dev->functionality = I2C_FUNC_SLAVE | DW_IC_DEFAULT_FUNCTIONALITY;
236
237 dev->slave_cfg = DW_IC_CON_RX_FIFO_FULL_HLD_CTRL |
238 DW_IC_CON_RESTART_EN | DW_IC_CON_STOP_DET_IFADDRESSED;
239
240 dev->mode = DW_IC_SLAVE;
241}
242EXPORT_SYMBOL_GPL(i2c_dw_configure_slave);
243
244int i2c_dw_probe_slave(struct dw_i2c_dev *dev)
245{
246 struct i2c_adapter *adap = &dev->adapter;
247 int ret;
248
249 init_completion(&dev->cmd_complete);
250
251 dev->init = i2c_dw_init_slave;
252 dev->disable = i2c_dw_disable;
253 dev->disable_int = i2c_dw_disable_int;
254
255 ret = i2c_dw_init_regmap(dev);
256 if (ret)
257 return ret;
258
259 ret = i2c_dw_set_sda_hold(dev);
260 if (ret)
261 return ret;
262
263 ret = i2c_dw_set_fifo_size(dev);
264 if (ret)
265 return ret;
266
267 ret = dev->init(dev);
268 if (ret)
269 return ret;
270
271 snprintf(adap->name, sizeof(adap->name),
272 "Synopsys DesignWare I2C Slave adapter");
273 adap->retries = 3;
274 adap->algo = &i2c_dw_algo;
275 adap->dev.parent = dev->dev;
276 i2c_set_adapdata(adap, dev);
277
278 ret = devm_request_irq(dev->dev, dev->irq, i2c_dw_isr_slave,
279 IRQF_SHARED, dev_name(dev->dev), dev);
280 if (ret) {
281 dev_err(dev->dev, "failure requesting irq %i: %d\n",
282 dev->irq, ret);
283 return ret;
284 }
285
286 ret = i2c_add_numbered_adapter(adap);
287 if (ret)
288 dev_err(dev->dev, "failure adding adapter: %d\n", ret);
289
290 return ret;
291}
292EXPORT_SYMBOL_GPL(i2c_dw_probe_slave);
293
294MODULE_AUTHOR("Luis Oliveira <lolivei@synopsys.com>");
295MODULE_DESCRIPTION("Synopsys DesignWare I2C bus slave adapter");
296MODULE_LICENSE("GPL v2");