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1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2003 Ralf Baechle
7 */
8#ifndef _ASM_PGTABLE_H
9#define _ASM_PGTABLE_H
10
11#include <linux/mm_types.h>
12#include <linux/mmzone.h>
13#ifdef CONFIG_32BIT
14#include <asm/pgtable-32.h>
15#endif
16#ifdef CONFIG_64BIT
17#include <asm/pgtable-64.h>
18#endif
19
20#include <asm/cmpxchg.h>
21#include <asm/io.h>
22#include <asm/pgtable-bits.h>
23#include <asm/cpu-features.h>
24
25struct mm_struct;
26struct vm_area_struct;
27
28#define PAGE_SHARED vm_get_page_prot(VM_READ|VM_WRITE|VM_SHARED)
29
30#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
31 _PAGE_GLOBAL | _page_cachable_default)
32#define PAGE_KERNEL_NC __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
33 _PAGE_GLOBAL | _CACHE_CACHABLE_NONCOHERENT)
34#define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \
35 __WRITEABLE | _PAGE_GLOBAL | _CACHE_UNCACHED)
36
37/*
38 * If _PAGE_NO_EXEC is not defined, we can't do page protection for
39 * execute, and consider it to be the same as read. Also, write
40 * permissions imply read permissions. This is the closest we can get
41 * by reasonable means..
42 */
43
44extern unsigned long _page_cachable_default;
45extern void __update_cache(unsigned long address, pte_t pte);
46
47/*
48 * ZERO_PAGE is a global shared page that is always zero; used
49 * for zero-mapped memory areas etc..
50 */
51
52extern unsigned long empty_zero_page;
53extern unsigned long zero_page_mask;
54
55#define ZERO_PAGE(vaddr) \
56 (virt_to_page((void *)(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask))))
57#define __HAVE_COLOR_ZERO_PAGE
58
59extern void paging_init(void);
60
61/*
62 * Conversion functions: convert a page and protection to a page entry,
63 * and a page entry and page directory to the page they refer to.
64 */
65#define pmd_phys(pmd) virt_to_phys((void *)pmd_val(pmd))
66
67static inline unsigned long pmd_pfn(pmd_t pmd)
68{
69 return pmd_val(pmd) >> _PFN_SHIFT;
70}
71
72#ifndef CONFIG_MIPS_HUGE_TLB_SUPPORT
73#define pmd_page(pmd) (pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT))
74#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
75
76#define pmd_page_vaddr(pmd) pmd_val(pmd)
77
78#define htw_stop() \
79do { \
80 unsigned long __flags; \
81 \
82 if (cpu_has_htw) { \
83 local_irq_save(__flags); \
84 if(!raw_current_cpu_data.htw_seq++) { \
85 write_c0_pwctl(read_c0_pwctl() & \
86 ~(1 << MIPS_PWCTL_PWEN_SHIFT)); \
87 back_to_back_c0_hazard(); \
88 } \
89 local_irq_restore(__flags); \
90 } \
91} while(0)
92
93#define htw_start() \
94do { \
95 unsigned long __flags; \
96 \
97 if (cpu_has_htw) { \
98 local_irq_save(__flags); \
99 if (!--raw_current_cpu_data.htw_seq) { \
100 write_c0_pwctl(read_c0_pwctl() | \
101 (1 << MIPS_PWCTL_PWEN_SHIFT)); \
102 back_to_back_c0_hazard(); \
103 } \
104 local_irq_restore(__flags); \
105 } \
106} while(0)
107
108static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
109 pte_t *ptep, pte_t pteval);
110
111#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
112
113#ifdef CONFIG_XPA
114# define pte_none(pte) (!(((pte).pte_high) & ~_PAGE_GLOBAL))
115#else
116# define pte_none(pte) (!(((pte).pte_low | (pte).pte_high) & ~_PAGE_GLOBAL))
117#endif
118
119#define pte_present(pte) ((pte).pte_low & _PAGE_PRESENT)
120#define pte_no_exec(pte) ((pte).pte_low & _PAGE_NO_EXEC)
121
122static inline void set_pte(pte_t *ptep, pte_t pte)
123{
124 ptep->pte_high = pte.pte_high;
125 smp_wmb();
126 ptep->pte_low = pte.pte_low;
127
128#ifdef CONFIG_XPA
129 if (pte.pte_high & _PAGE_GLOBAL) {
130#else
131 if (pte.pte_low & _PAGE_GLOBAL) {
132#endif
133 pte_t *buddy = ptep_buddy(ptep);
134 /*
135 * Make sure the buddy is global too (if it's !none,
136 * it better already be global)
137 */
138 if (pte_none(*buddy)) {
139 if (!IS_ENABLED(CONFIG_XPA))
140 buddy->pte_low |= _PAGE_GLOBAL;
141 buddy->pte_high |= _PAGE_GLOBAL;
142 }
143 }
144}
145
146static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
147{
148 pte_t null = __pte(0);
149
150 htw_stop();
151 /* Preserve global status for the pair */
152 if (IS_ENABLED(CONFIG_XPA)) {
153 if (ptep_buddy(ptep)->pte_high & _PAGE_GLOBAL)
154 null.pte_high = _PAGE_GLOBAL;
155 } else {
156 if (ptep_buddy(ptep)->pte_low & _PAGE_GLOBAL)
157 null.pte_low = null.pte_high = _PAGE_GLOBAL;
158 }
159
160 set_pte_at(mm, addr, ptep, null);
161 htw_start();
162}
163#else
164
165#define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL))
166#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
167#define pte_no_exec(pte) (pte_val(pte) & _PAGE_NO_EXEC)
168
169/*
170 * Certain architectures need to do special things when pte's
171 * within a page table are directly modified. Thus, the following
172 * hook is made available.
173 */
174static inline void set_pte(pte_t *ptep, pte_t pteval)
175{
176 *ptep = pteval;
177#if !defined(CONFIG_CPU_R3K_TLB)
178 if (pte_val(pteval) & _PAGE_GLOBAL) {
179 pte_t *buddy = ptep_buddy(ptep);
180 /*
181 * Make sure the buddy is global too (if it's !none,
182 * it better already be global)
183 */
184# if defined(CONFIG_PHYS_ADDR_T_64BIT) && !defined(CONFIG_CPU_MIPS32)
185 cmpxchg64(&buddy->pte, 0, _PAGE_GLOBAL);
186# else
187 cmpxchg(&buddy->pte, 0, _PAGE_GLOBAL);
188# endif
189 }
190#endif
191}
192
193static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
194{
195 htw_stop();
196#if !defined(CONFIG_CPU_R3K_TLB)
197 /* Preserve global status for the pair */
198 if (pte_val(*ptep_buddy(ptep)) & _PAGE_GLOBAL)
199 set_pte_at(mm, addr, ptep, __pte(_PAGE_GLOBAL));
200 else
201#endif
202 set_pte_at(mm, addr, ptep, __pte(0));
203 htw_start();
204}
205#endif
206
207static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
208 pte_t *ptep, pte_t pteval)
209{
210
211 if (!pte_present(pteval))
212 goto cache_sync_done;
213
214 if (pte_present(*ptep) && (pte_pfn(*ptep) == pte_pfn(pteval)))
215 goto cache_sync_done;
216
217 __update_cache(addr, pteval);
218cache_sync_done:
219 set_pte(ptep, pteval);
220}
221
222/*
223 * (pmds are folded into puds so this doesn't get actually called,
224 * but the define is needed for a generic inline function.)
225 */
226#define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while(0)
227
228#ifndef __PAGETABLE_PMD_FOLDED
229/*
230 * (puds are folded into pgds so this doesn't get actually called,
231 * but the define is needed for a generic inline function.)
232 */
233#define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while(0)
234#endif
235
236#define PGD_T_LOG2 (__builtin_ffs(sizeof(pgd_t)) - 1)
237#define PMD_T_LOG2 (__builtin_ffs(sizeof(pmd_t)) - 1)
238#define PTE_T_LOG2 (__builtin_ffs(sizeof(pte_t)) - 1)
239
240/*
241 * We used to declare this array with size but gcc 3.3 and older are not able
242 * to find that this expression is a constant, so the size is dropped.
243 */
244extern pgd_t swapper_pg_dir[];
245
246/*
247 * Platform specific pte_special() and pte_mkspecial() definitions
248 * are required only when ARCH_HAS_PTE_SPECIAL is enabled.
249 */
250#if defined(CONFIG_ARCH_HAS_PTE_SPECIAL)
251#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
252static inline int pte_special(pte_t pte)
253{
254 return pte.pte_low & _PAGE_SPECIAL;
255}
256
257static inline pte_t pte_mkspecial(pte_t pte)
258{
259 pte.pte_low |= _PAGE_SPECIAL;
260 return pte;
261}
262#else
263static inline int pte_special(pte_t pte)
264{
265 return pte_val(pte) & _PAGE_SPECIAL;
266}
267
268static inline pte_t pte_mkspecial(pte_t pte)
269{
270 pte_val(pte) |= _PAGE_SPECIAL;
271 return pte;
272}
273#endif
274#endif /* CONFIG_ARCH_HAS_PTE_SPECIAL */
275
276/*
277 * The following only work if pte_present() is true.
278 * Undefined behaviour if not..
279 */
280#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
281static inline int pte_write(pte_t pte) { return pte.pte_low & _PAGE_WRITE; }
282static inline int pte_dirty(pte_t pte) { return pte.pte_low & _PAGE_MODIFIED; }
283static inline int pte_young(pte_t pte) { return pte.pte_low & _PAGE_ACCESSED; }
284
285static inline pte_t pte_wrprotect(pte_t pte)
286{
287 pte.pte_low &= ~_PAGE_WRITE;
288 if (!IS_ENABLED(CONFIG_XPA))
289 pte.pte_low &= ~_PAGE_SILENT_WRITE;
290 pte.pte_high &= ~_PAGE_SILENT_WRITE;
291 return pte;
292}
293
294static inline pte_t pte_mkclean(pte_t pte)
295{
296 pte.pte_low &= ~_PAGE_MODIFIED;
297 if (!IS_ENABLED(CONFIG_XPA))
298 pte.pte_low &= ~_PAGE_SILENT_WRITE;
299 pte.pte_high &= ~_PAGE_SILENT_WRITE;
300 return pte;
301}
302
303static inline pte_t pte_mkold(pte_t pte)
304{
305 pte.pte_low &= ~_PAGE_ACCESSED;
306 if (!IS_ENABLED(CONFIG_XPA))
307 pte.pte_low &= ~_PAGE_SILENT_READ;
308 pte.pte_high &= ~_PAGE_SILENT_READ;
309 return pte;
310}
311
312static inline pte_t pte_mkwrite(pte_t pte)
313{
314 pte.pte_low |= _PAGE_WRITE;
315 if (pte.pte_low & _PAGE_MODIFIED) {
316 if (!IS_ENABLED(CONFIG_XPA))
317 pte.pte_low |= _PAGE_SILENT_WRITE;
318 pte.pte_high |= _PAGE_SILENT_WRITE;
319 }
320 return pte;
321}
322
323static inline pte_t pte_mkdirty(pte_t pte)
324{
325 pte.pte_low |= _PAGE_MODIFIED;
326 if (pte.pte_low & _PAGE_WRITE) {
327 if (!IS_ENABLED(CONFIG_XPA))
328 pte.pte_low |= _PAGE_SILENT_WRITE;
329 pte.pte_high |= _PAGE_SILENT_WRITE;
330 }
331 return pte;
332}
333
334static inline pte_t pte_mkyoung(pte_t pte)
335{
336 pte.pte_low |= _PAGE_ACCESSED;
337 if (!(pte.pte_low & _PAGE_NO_READ)) {
338 if (!IS_ENABLED(CONFIG_XPA))
339 pte.pte_low |= _PAGE_SILENT_READ;
340 pte.pte_high |= _PAGE_SILENT_READ;
341 }
342 return pte;
343}
344#else
345static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; }
346static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_MODIFIED; }
347static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
348
349static inline pte_t pte_wrprotect(pte_t pte)
350{
351 pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
352 return pte;
353}
354
355static inline pte_t pte_mkclean(pte_t pte)
356{
357 pte_val(pte) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
358 return pte;
359}
360
361static inline pte_t pte_mkold(pte_t pte)
362{
363 pte_val(pte) &= ~(_PAGE_ACCESSED | _PAGE_SILENT_READ);
364 return pte;
365}
366
367static inline pte_t pte_mkwrite(pte_t pte)
368{
369 pte_val(pte) |= _PAGE_WRITE;
370 if (pte_val(pte) & _PAGE_MODIFIED)
371 pte_val(pte) |= _PAGE_SILENT_WRITE;
372 return pte;
373}
374
375static inline pte_t pte_mkdirty(pte_t pte)
376{
377 pte_val(pte) |= _PAGE_MODIFIED | _PAGE_SOFT_DIRTY;
378 if (pte_val(pte) & _PAGE_WRITE)
379 pte_val(pte) |= _PAGE_SILENT_WRITE;
380 return pte;
381}
382
383static inline pte_t pte_mkyoung(pte_t pte)
384{
385 pte_val(pte) |= _PAGE_ACCESSED;
386 if (!(pte_val(pte) & _PAGE_NO_READ))
387 pte_val(pte) |= _PAGE_SILENT_READ;
388 return pte;
389}
390
391#define pte_sw_mkyoung pte_mkyoung
392
393#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
394static inline int pte_huge(pte_t pte) { return pte_val(pte) & _PAGE_HUGE; }
395
396static inline pte_t pte_mkhuge(pte_t pte)
397{
398 pte_val(pte) |= _PAGE_HUGE;
399 return pte;
400}
401
402#define pmd_write pmd_write
403static inline int pmd_write(pmd_t pmd)
404{
405 return !!(pmd_val(pmd) & _PAGE_WRITE);
406}
407
408static inline struct page *pmd_page(pmd_t pmd)
409{
410 if (pmd_val(pmd) & _PAGE_HUGE)
411 return pfn_to_page(pmd_pfn(pmd));
412
413 return pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT);
414}
415#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
416
417#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
418static inline bool pte_soft_dirty(pte_t pte)
419{
420 return pte_val(pte) & _PAGE_SOFT_DIRTY;
421}
422#define pte_swp_soft_dirty pte_soft_dirty
423
424static inline pte_t pte_mksoft_dirty(pte_t pte)
425{
426 pte_val(pte) |= _PAGE_SOFT_DIRTY;
427 return pte;
428}
429#define pte_swp_mksoft_dirty pte_mksoft_dirty
430
431static inline pte_t pte_clear_soft_dirty(pte_t pte)
432{
433 pte_val(pte) &= ~(_PAGE_SOFT_DIRTY);
434 return pte;
435}
436#define pte_swp_clear_soft_dirty pte_clear_soft_dirty
437
438#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
439
440#endif
441
442/*
443 * Macro to make mark a page protection value as "uncacheable". Note
444 * that "protection" is really a misnomer here as the protection value
445 * contains the memory attribute bits, dirty bits, and various other
446 * bits as well.
447 */
448#define pgprot_noncached pgprot_noncached
449
450static inline pgprot_t pgprot_noncached(pgprot_t _prot)
451{
452 unsigned long prot = pgprot_val(_prot);
453
454 prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED;
455
456 return __pgprot(prot);
457}
458
459#define pgprot_writecombine pgprot_writecombine
460
461static inline pgprot_t pgprot_writecombine(pgprot_t _prot)
462{
463 unsigned long prot = pgprot_val(_prot);
464
465 /* cpu_data[0].writecombine is already shifted by _CACHE_SHIFT */
466 prot = (prot & ~_CACHE_MASK) | cpu_data[0].writecombine;
467
468 return __pgprot(prot);
469}
470
471static inline void flush_tlb_fix_spurious_fault(struct vm_area_struct *vma,
472 unsigned long address)
473{
474}
475
476#define __HAVE_ARCH_PTE_SAME
477static inline int pte_same(pte_t pte_a, pte_t pte_b)
478{
479 return pte_val(pte_a) == pte_val(pte_b);
480}
481
482#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
483static inline int ptep_set_access_flags(struct vm_area_struct *vma,
484 unsigned long address, pte_t *ptep,
485 pte_t entry, int dirty)
486{
487 if (!pte_same(*ptep, entry))
488 set_pte_at(vma->vm_mm, address, ptep, entry);
489 /*
490 * update_mmu_cache will unconditionally execute, handling both
491 * the case that the PTE changed and the spurious fault case.
492 */
493 return true;
494}
495
496/*
497 * Conversion functions: convert a page and protection to a page entry,
498 * and a page entry and page directory to the page they refer to.
499 */
500#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
501
502#if defined(CONFIG_XPA)
503static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
504{
505 pte.pte_low &= (_PAGE_MODIFIED | _PAGE_ACCESSED | _PFNX_MASK);
506 pte.pte_high &= (_PFN_MASK | _CACHE_MASK);
507 pte.pte_low |= pgprot_val(newprot) & ~_PFNX_MASK;
508 pte.pte_high |= pgprot_val(newprot) & ~(_PFN_MASK | _CACHE_MASK);
509 return pte;
510}
511#elif defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
512static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
513{
514 pte.pte_low &= _PAGE_CHG_MASK;
515 pte.pte_high &= (_PFN_MASK | _CACHE_MASK);
516 pte.pte_low |= pgprot_val(newprot);
517 pte.pte_high |= pgprot_val(newprot) & ~(_PFN_MASK | _CACHE_MASK);
518 return pte;
519}
520#else
521static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
522{
523 pte_val(pte) &= _PAGE_CHG_MASK;
524 pte_val(pte) |= pgprot_val(newprot) & ~_PAGE_CHG_MASK;
525 if ((pte_val(pte) & _PAGE_ACCESSED) && !(pte_val(pte) & _PAGE_NO_READ))
526 pte_val(pte) |= _PAGE_SILENT_READ;
527 return pte;
528}
529#endif
530
531
532extern void __update_tlb(struct vm_area_struct *vma, unsigned long address,
533 pte_t pte);
534
535static inline void update_mmu_cache(struct vm_area_struct *vma,
536 unsigned long address, pte_t *ptep)
537{
538 pte_t pte = *ptep;
539 __update_tlb(vma, address, pte);
540}
541
542#define __HAVE_ARCH_UPDATE_MMU_TLB
543#define update_mmu_tlb update_mmu_cache
544
545static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
546 unsigned long address, pmd_t *pmdp)
547{
548 pte_t pte = *(pte_t *)pmdp;
549
550 __update_tlb(vma, address, pte);
551}
552
553/*
554 * Allow physical addresses to be fixed up to help 36-bit peripherals.
555 */
556#ifdef CONFIG_MIPS_FIXUP_BIGPHYS_ADDR
557phys_addr_t fixup_bigphys_addr(phys_addr_t addr, phys_addr_t size);
558int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long vaddr,
559 unsigned long pfn, unsigned long size, pgprot_t prot);
560#define io_remap_pfn_range io_remap_pfn_range
561#else
562#define fixup_bigphys_addr(addr, size) (addr)
563#endif /* CONFIG_MIPS_FIXUP_BIGPHYS_ADDR */
564
565#ifdef CONFIG_TRANSPARENT_HUGEPAGE
566
567/* We don't have hardware dirty/accessed bits, generic_pmdp_establish is fine.*/
568#define pmdp_establish generic_pmdp_establish
569
570#define has_transparent_hugepage has_transparent_hugepage
571extern int has_transparent_hugepage(void);
572
573static inline int pmd_trans_huge(pmd_t pmd)
574{
575 return !!(pmd_val(pmd) & _PAGE_HUGE);
576}
577
578static inline pmd_t pmd_mkhuge(pmd_t pmd)
579{
580 pmd_val(pmd) |= _PAGE_HUGE;
581
582 return pmd;
583}
584
585extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,
586 pmd_t *pmdp, pmd_t pmd);
587
588static inline pmd_t pmd_wrprotect(pmd_t pmd)
589{
590 pmd_val(pmd) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
591 return pmd;
592}
593
594static inline pmd_t pmd_mkwrite(pmd_t pmd)
595{
596 pmd_val(pmd) |= _PAGE_WRITE;
597 if (pmd_val(pmd) & _PAGE_MODIFIED)
598 pmd_val(pmd) |= _PAGE_SILENT_WRITE;
599
600 return pmd;
601}
602
603static inline int pmd_dirty(pmd_t pmd)
604{
605 return !!(pmd_val(pmd) & _PAGE_MODIFIED);
606}
607
608static inline pmd_t pmd_mkclean(pmd_t pmd)
609{
610 pmd_val(pmd) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
611 return pmd;
612}
613
614static inline pmd_t pmd_mkdirty(pmd_t pmd)
615{
616 pmd_val(pmd) |= _PAGE_MODIFIED | _PAGE_SOFT_DIRTY;
617 if (pmd_val(pmd) & _PAGE_WRITE)
618 pmd_val(pmd) |= _PAGE_SILENT_WRITE;
619
620 return pmd;
621}
622
623#define pmd_young pmd_young
624static inline int pmd_young(pmd_t pmd)
625{
626 return !!(pmd_val(pmd) & _PAGE_ACCESSED);
627}
628
629static inline pmd_t pmd_mkold(pmd_t pmd)
630{
631 pmd_val(pmd) &= ~(_PAGE_ACCESSED|_PAGE_SILENT_READ);
632
633 return pmd;
634}
635
636static inline pmd_t pmd_mkyoung(pmd_t pmd)
637{
638 pmd_val(pmd) |= _PAGE_ACCESSED;
639
640 if (!(pmd_val(pmd) & _PAGE_NO_READ))
641 pmd_val(pmd) |= _PAGE_SILENT_READ;
642
643 return pmd;
644}
645
646#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
647static inline int pmd_soft_dirty(pmd_t pmd)
648{
649 return !!(pmd_val(pmd) & _PAGE_SOFT_DIRTY);
650}
651
652static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
653{
654 pmd_val(pmd) |= _PAGE_SOFT_DIRTY;
655 return pmd;
656}
657
658static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
659{
660 pmd_val(pmd) &= ~(_PAGE_SOFT_DIRTY);
661 return pmd;
662}
663
664#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
665
666/* Extern to avoid header file madness */
667extern pmd_t mk_pmd(struct page *page, pgprot_t prot);
668
669static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
670{
671 pmd_val(pmd) = (pmd_val(pmd) & (_PAGE_CHG_MASK | _PAGE_HUGE)) |
672 (pgprot_val(newprot) & ~_PAGE_CHG_MASK);
673 return pmd;
674}
675
676static inline pmd_t pmd_mkinvalid(pmd_t pmd)
677{
678 pmd_val(pmd) &= ~(_PAGE_PRESENT | _PAGE_VALID | _PAGE_DIRTY);
679
680 return pmd;
681}
682
683/*
684 * The generic version pmdp_huge_get_and_clear uses a version of pmd_clear() with a
685 * different prototype.
686 */
687#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
688static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
689 unsigned long address, pmd_t *pmdp)
690{
691 pmd_t old = *pmdp;
692
693 pmd_clear(pmdp);
694
695 return old;
696}
697
698#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
699
700#ifdef _PAGE_HUGE
701#define pmd_leaf(pmd) ((pmd_val(pmd) & _PAGE_HUGE) != 0)
702#define pud_leaf(pud) ((pud_val(pud) & _PAGE_HUGE) != 0)
703#endif
704
705#define gup_fast_permitted(start, end) (!cpu_has_dc_aliases)
706
707/*
708 * We provide our own get_unmapped area to cope with the virtual aliasing
709 * constraints placed on us by the cache architecture.
710 */
711#define HAVE_ARCH_UNMAPPED_AREA
712#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
713
714#endif /* _ASM_PGTABLE_H */
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2003 Ralf Baechle
7 */
8#ifndef _ASM_PGTABLE_H
9#define _ASM_PGTABLE_H
10
11#include <linux/mm_types.h>
12#include <linux/mmzone.h>
13#ifdef CONFIG_32BIT
14#include <asm/pgtable-32.h>
15#endif
16#ifdef CONFIG_64BIT
17#include <asm/pgtable-64.h>
18#endif
19
20#include <asm/cmpxchg.h>
21#include <asm/io.h>
22#include <asm/pgtable-bits.h>
23#include <asm/cpu-features.h>
24
25struct mm_struct;
26struct vm_area_struct;
27
28#define PAGE_SHARED vm_get_page_prot(VM_READ|VM_WRITE|VM_SHARED)
29
30#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
31 _PAGE_GLOBAL | _page_cachable_default)
32#define PAGE_KERNEL_NC __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
33 _PAGE_GLOBAL | _CACHE_CACHABLE_NONCOHERENT)
34#define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \
35 __WRITEABLE | _PAGE_GLOBAL | _CACHE_UNCACHED)
36
37/*
38 * If _PAGE_NO_EXEC is not defined, we can't do page protection for
39 * execute, and consider it to be the same as read. Also, write
40 * permissions imply read permissions. This is the closest we can get
41 * by reasonable means..
42 */
43
44/*
45 * Dummy values to fill the table in mmap.c
46 * The real values will be generated at runtime
47 */
48#define __P000 __pgprot(0)
49#define __P001 __pgprot(0)
50#define __P010 __pgprot(0)
51#define __P011 __pgprot(0)
52#define __P100 __pgprot(0)
53#define __P101 __pgprot(0)
54#define __P110 __pgprot(0)
55#define __P111 __pgprot(0)
56
57#define __S000 __pgprot(0)
58#define __S001 __pgprot(0)
59#define __S010 __pgprot(0)
60#define __S011 __pgprot(0)
61#define __S100 __pgprot(0)
62#define __S101 __pgprot(0)
63#define __S110 __pgprot(0)
64#define __S111 __pgprot(0)
65
66extern unsigned long _page_cachable_default;
67extern void __update_cache(unsigned long address, pte_t pte);
68
69/*
70 * ZERO_PAGE is a global shared page that is always zero; used
71 * for zero-mapped memory areas etc..
72 */
73
74extern unsigned long empty_zero_page;
75extern unsigned long zero_page_mask;
76
77#define ZERO_PAGE(vaddr) \
78 (virt_to_page((void *)(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask))))
79#define __HAVE_COLOR_ZERO_PAGE
80
81extern void paging_init(void);
82
83/*
84 * Conversion functions: convert a page and protection to a page entry,
85 * and a page entry and page directory to the page they refer to.
86 */
87#define pmd_phys(pmd) virt_to_phys((void *)pmd_val(pmd))
88
89#define __pmd_page(pmd) (pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT))
90#ifndef CONFIG_TRANSPARENT_HUGEPAGE
91#define pmd_page(pmd) __pmd_page(pmd)
92#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
93
94#define pmd_page_vaddr(pmd) pmd_val(pmd)
95
96#define htw_stop() \
97do { \
98 unsigned long __flags; \
99 \
100 if (cpu_has_htw) { \
101 local_irq_save(__flags); \
102 if(!raw_current_cpu_data.htw_seq++) { \
103 write_c0_pwctl(read_c0_pwctl() & \
104 ~(1 << MIPS_PWCTL_PWEN_SHIFT)); \
105 back_to_back_c0_hazard(); \
106 } \
107 local_irq_restore(__flags); \
108 } \
109} while(0)
110
111#define htw_start() \
112do { \
113 unsigned long __flags; \
114 \
115 if (cpu_has_htw) { \
116 local_irq_save(__flags); \
117 if (!--raw_current_cpu_data.htw_seq) { \
118 write_c0_pwctl(read_c0_pwctl() | \
119 (1 << MIPS_PWCTL_PWEN_SHIFT)); \
120 back_to_back_c0_hazard(); \
121 } \
122 local_irq_restore(__flags); \
123 } \
124} while(0)
125
126static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
127 pte_t *ptep, pte_t pteval);
128
129#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
130
131#ifdef CONFIG_XPA
132# define pte_none(pte) (!(((pte).pte_high) & ~_PAGE_GLOBAL))
133#else
134# define pte_none(pte) (!(((pte).pte_low | (pte).pte_high) & ~_PAGE_GLOBAL))
135#endif
136
137#define pte_present(pte) ((pte).pte_low & _PAGE_PRESENT)
138#define pte_no_exec(pte) ((pte).pte_low & _PAGE_NO_EXEC)
139
140static inline void set_pte(pte_t *ptep, pte_t pte)
141{
142 ptep->pte_high = pte.pte_high;
143 smp_wmb();
144 ptep->pte_low = pte.pte_low;
145
146#ifdef CONFIG_XPA
147 if (pte.pte_high & _PAGE_GLOBAL) {
148#else
149 if (pte.pte_low & _PAGE_GLOBAL) {
150#endif
151 pte_t *buddy = ptep_buddy(ptep);
152 /*
153 * Make sure the buddy is global too (if it's !none,
154 * it better already be global)
155 */
156 if (pte_none(*buddy)) {
157 if (!IS_ENABLED(CONFIG_XPA))
158 buddy->pte_low |= _PAGE_GLOBAL;
159 buddy->pte_high |= _PAGE_GLOBAL;
160 }
161 }
162}
163
164static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
165{
166 pte_t null = __pte(0);
167
168 htw_stop();
169 /* Preserve global status for the pair */
170 if (IS_ENABLED(CONFIG_XPA)) {
171 if (ptep_buddy(ptep)->pte_high & _PAGE_GLOBAL)
172 null.pte_high = _PAGE_GLOBAL;
173 } else {
174 if (ptep_buddy(ptep)->pte_low & _PAGE_GLOBAL)
175 null.pte_low = null.pte_high = _PAGE_GLOBAL;
176 }
177
178 set_pte_at(mm, addr, ptep, null);
179 htw_start();
180}
181#else
182
183#define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL))
184#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
185#define pte_no_exec(pte) (pte_val(pte) & _PAGE_NO_EXEC)
186
187/*
188 * Certain architectures need to do special things when pte's
189 * within a page table are directly modified. Thus, the following
190 * hook is made available.
191 */
192static inline void set_pte(pte_t *ptep, pte_t pteval)
193{
194 *ptep = pteval;
195#if !defined(CONFIG_CPU_R3K_TLB)
196 if (pte_val(pteval) & _PAGE_GLOBAL) {
197 pte_t *buddy = ptep_buddy(ptep);
198 /*
199 * Make sure the buddy is global too (if it's !none,
200 * it better already be global)
201 */
202# if defined(CONFIG_PHYS_ADDR_T_64BIT) && !defined(CONFIG_CPU_MIPS32)
203 cmpxchg64(&buddy->pte, 0, _PAGE_GLOBAL);
204# else
205 cmpxchg(&buddy->pte, 0, _PAGE_GLOBAL);
206# endif
207 }
208#endif
209}
210
211static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
212{
213 htw_stop();
214#if !defined(CONFIG_CPU_R3K_TLB)
215 /* Preserve global status for the pair */
216 if (pte_val(*ptep_buddy(ptep)) & _PAGE_GLOBAL)
217 set_pte_at(mm, addr, ptep, __pte(_PAGE_GLOBAL));
218 else
219#endif
220 set_pte_at(mm, addr, ptep, __pte(0));
221 htw_start();
222}
223#endif
224
225static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
226 pte_t *ptep, pte_t pteval)
227{
228
229 if (!pte_present(pteval))
230 goto cache_sync_done;
231
232 if (pte_present(*ptep) && (pte_pfn(*ptep) == pte_pfn(pteval)))
233 goto cache_sync_done;
234
235 __update_cache(addr, pteval);
236cache_sync_done:
237 set_pte(ptep, pteval);
238}
239
240/*
241 * (pmds are folded into puds so this doesn't get actually called,
242 * but the define is needed for a generic inline function.)
243 */
244#define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while(0)
245
246#ifndef __PAGETABLE_PMD_FOLDED
247/*
248 * (puds are folded into pgds so this doesn't get actually called,
249 * but the define is needed for a generic inline function.)
250 */
251#define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while(0)
252#endif
253
254#define PGD_T_LOG2 (__builtin_ffs(sizeof(pgd_t)) - 1)
255#define PMD_T_LOG2 (__builtin_ffs(sizeof(pmd_t)) - 1)
256#define PTE_T_LOG2 (__builtin_ffs(sizeof(pte_t)) - 1)
257
258/*
259 * We used to declare this array with size but gcc 3.3 and older are not able
260 * to find that this expression is a constant, so the size is dropped.
261 */
262extern pgd_t swapper_pg_dir[];
263
264/*
265 * Platform specific pte_special() and pte_mkspecial() definitions
266 * are required only when ARCH_HAS_PTE_SPECIAL is enabled.
267 */
268#if defined(CONFIG_ARCH_HAS_PTE_SPECIAL)
269#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
270static inline int pte_special(pte_t pte)
271{
272 return pte.pte_low & _PAGE_SPECIAL;
273}
274
275static inline pte_t pte_mkspecial(pte_t pte)
276{
277 pte.pte_low |= _PAGE_SPECIAL;
278 return pte;
279}
280#else
281static inline int pte_special(pte_t pte)
282{
283 return pte_val(pte) & _PAGE_SPECIAL;
284}
285
286static inline pte_t pte_mkspecial(pte_t pte)
287{
288 pte_val(pte) |= _PAGE_SPECIAL;
289 return pte;
290}
291#endif
292#endif /* CONFIG_ARCH_HAS_PTE_SPECIAL */
293
294/*
295 * The following only work if pte_present() is true.
296 * Undefined behaviour if not..
297 */
298#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
299static inline int pte_write(pte_t pte) { return pte.pte_low & _PAGE_WRITE; }
300static inline int pte_dirty(pte_t pte) { return pte.pte_low & _PAGE_MODIFIED; }
301static inline int pte_young(pte_t pte) { return pte.pte_low & _PAGE_ACCESSED; }
302
303static inline pte_t pte_wrprotect(pte_t pte)
304{
305 pte.pte_low &= ~_PAGE_WRITE;
306 if (!IS_ENABLED(CONFIG_XPA))
307 pte.pte_low &= ~_PAGE_SILENT_WRITE;
308 pte.pte_high &= ~_PAGE_SILENT_WRITE;
309 return pte;
310}
311
312static inline pte_t pte_mkclean(pte_t pte)
313{
314 pte.pte_low &= ~_PAGE_MODIFIED;
315 if (!IS_ENABLED(CONFIG_XPA))
316 pte.pte_low &= ~_PAGE_SILENT_WRITE;
317 pte.pte_high &= ~_PAGE_SILENT_WRITE;
318 return pte;
319}
320
321static inline pte_t pte_mkold(pte_t pte)
322{
323 pte.pte_low &= ~_PAGE_ACCESSED;
324 if (!IS_ENABLED(CONFIG_XPA))
325 pte.pte_low &= ~_PAGE_SILENT_READ;
326 pte.pte_high &= ~_PAGE_SILENT_READ;
327 return pte;
328}
329
330static inline pte_t pte_mkwrite(pte_t pte)
331{
332 pte.pte_low |= _PAGE_WRITE;
333 if (pte.pte_low & _PAGE_MODIFIED) {
334 if (!IS_ENABLED(CONFIG_XPA))
335 pte.pte_low |= _PAGE_SILENT_WRITE;
336 pte.pte_high |= _PAGE_SILENT_WRITE;
337 }
338 return pte;
339}
340
341static inline pte_t pte_mkdirty(pte_t pte)
342{
343 pte.pte_low |= _PAGE_MODIFIED;
344 if (pte.pte_low & _PAGE_WRITE) {
345 if (!IS_ENABLED(CONFIG_XPA))
346 pte.pte_low |= _PAGE_SILENT_WRITE;
347 pte.pte_high |= _PAGE_SILENT_WRITE;
348 }
349 return pte;
350}
351
352static inline pte_t pte_mkyoung(pte_t pte)
353{
354 pte.pte_low |= _PAGE_ACCESSED;
355 if (!(pte.pte_low & _PAGE_NO_READ)) {
356 if (!IS_ENABLED(CONFIG_XPA))
357 pte.pte_low |= _PAGE_SILENT_READ;
358 pte.pte_high |= _PAGE_SILENT_READ;
359 }
360 return pte;
361}
362#else
363static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; }
364static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_MODIFIED; }
365static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
366
367static inline pte_t pte_wrprotect(pte_t pte)
368{
369 pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
370 return pte;
371}
372
373static inline pte_t pte_mkclean(pte_t pte)
374{
375 pte_val(pte) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
376 return pte;
377}
378
379static inline pte_t pte_mkold(pte_t pte)
380{
381 pte_val(pte) &= ~(_PAGE_ACCESSED | _PAGE_SILENT_READ);
382 return pte;
383}
384
385static inline pte_t pte_mkwrite(pte_t pte)
386{
387 pte_val(pte) |= _PAGE_WRITE;
388 if (pte_val(pte) & _PAGE_MODIFIED)
389 pte_val(pte) |= _PAGE_SILENT_WRITE;
390 return pte;
391}
392
393static inline pte_t pte_mkdirty(pte_t pte)
394{
395 pte_val(pte) |= _PAGE_MODIFIED | _PAGE_SOFT_DIRTY;
396 if (pte_val(pte) & _PAGE_WRITE)
397 pte_val(pte) |= _PAGE_SILENT_WRITE;
398 return pte;
399}
400
401static inline pte_t pte_mkyoung(pte_t pte)
402{
403 pte_val(pte) |= _PAGE_ACCESSED;
404 if (!(pte_val(pte) & _PAGE_NO_READ))
405 pte_val(pte) |= _PAGE_SILENT_READ;
406 return pte;
407}
408
409#define pte_sw_mkyoung pte_mkyoung
410
411#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
412static inline int pte_huge(pte_t pte) { return pte_val(pte) & _PAGE_HUGE; }
413
414static inline pte_t pte_mkhuge(pte_t pte)
415{
416 pte_val(pte) |= _PAGE_HUGE;
417 return pte;
418}
419#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
420
421#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
422static inline bool pte_soft_dirty(pte_t pte)
423{
424 return pte_val(pte) & _PAGE_SOFT_DIRTY;
425}
426#define pte_swp_soft_dirty pte_soft_dirty
427
428static inline pte_t pte_mksoft_dirty(pte_t pte)
429{
430 pte_val(pte) |= _PAGE_SOFT_DIRTY;
431 return pte;
432}
433#define pte_swp_mksoft_dirty pte_mksoft_dirty
434
435static inline pte_t pte_clear_soft_dirty(pte_t pte)
436{
437 pte_val(pte) &= ~(_PAGE_SOFT_DIRTY);
438 return pte;
439}
440#define pte_swp_clear_soft_dirty pte_clear_soft_dirty
441
442#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
443
444#endif
445
446/*
447 * Macro to make mark a page protection value as "uncacheable". Note
448 * that "protection" is really a misnomer here as the protection value
449 * contains the memory attribute bits, dirty bits, and various other
450 * bits as well.
451 */
452#define pgprot_noncached pgprot_noncached
453
454static inline pgprot_t pgprot_noncached(pgprot_t _prot)
455{
456 unsigned long prot = pgprot_val(_prot);
457
458 prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED;
459
460 return __pgprot(prot);
461}
462
463#define pgprot_writecombine pgprot_writecombine
464
465static inline pgprot_t pgprot_writecombine(pgprot_t _prot)
466{
467 unsigned long prot = pgprot_val(_prot);
468
469 /* cpu_data[0].writecombine is already shifted by _CACHE_SHIFT */
470 prot = (prot & ~_CACHE_MASK) | cpu_data[0].writecombine;
471
472 return __pgprot(prot);
473}
474
475static inline void flush_tlb_fix_spurious_fault(struct vm_area_struct *vma,
476 unsigned long address)
477{
478}
479
480#define __HAVE_ARCH_PTE_SAME
481static inline int pte_same(pte_t pte_a, pte_t pte_b)
482{
483 return pte_val(pte_a) == pte_val(pte_b);
484}
485
486#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
487static inline int ptep_set_access_flags(struct vm_area_struct *vma,
488 unsigned long address, pte_t *ptep,
489 pte_t entry, int dirty)
490{
491 if (!pte_same(*ptep, entry))
492 set_pte_at(vma->vm_mm, address, ptep, entry);
493 /*
494 * update_mmu_cache will unconditionally execute, handling both
495 * the case that the PTE changed and the spurious fault case.
496 */
497 return true;
498}
499
500/*
501 * Conversion functions: convert a page and protection to a page entry,
502 * and a page entry and page directory to the page they refer to.
503 */
504#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
505
506#if defined(CONFIG_XPA)
507static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
508{
509 pte.pte_low &= (_PAGE_MODIFIED | _PAGE_ACCESSED | _PFNX_MASK);
510 pte.pte_high &= (_PFN_MASK | _CACHE_MASK);
511 pte.pte_low |= pgprot_val(newprot) & ~_PFNX_MASK;
512 pte.pte_high |= pgprot_val(newprot) & ~(_PFN_MASK | _CACHE_MASK);
513 return pte;
514}
515#elif defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
516static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
517{
518 pte.pte_low &= _PAGE_CHG_MASK;
519 pte.pte_high &= (_PFN_MASK | _CACHE_MASK);
520 pte.pte_low |= pgprot_val(newprot);
521 pte.pte_high |= pgprot_val(newprot) & ~(_PFN_MASK | _CACHE_MASK);
522 return pte;
523}
524#else
525static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
526{
527 pte_val(pte) &= _PAGE_CHG_MASK;
528 pte_val(pte) |= pgprot_val(newprot) & ~_PAGE_CHG_MASK;
529 if ((pte_val(pte) & _PAGE_ACCESSED) && !(pte_val(pte) & _PAGE_NO_READ))
530 pte_val(pte) |= _PAGE_SILENT_READ;
531 return pte;
532}
533#endif
534
535
536extern void __update_tlb(struct vm_area_struct *vma, unsigned long address,
537 pte_t pte);
538
539static inline void update_mmu_cache(struct vm_area_struct *vma,
540 unsigned long address, pte_t *ptep)
541{
542 pte_t pte = *ptep;
543 __update_tlb(vma, address, pte);
544}
545
546#define __HAVE_ARCH_UPDATE_MMU_TLB
547#define update_mmu_tlb update_mmu_cache
548
549static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
550 unsigned long address, pmd_t *pmdp)
551{
552 pte_t pte = *(pte_t *)pmdp;
553
554 __update_tlb(vma, address, pte);
555}
556
557#define kern_addr_valid(addr) (1)
558
559/*
560 * Allow physical addresses to be fixed up to help 36-bit peripherals.
561 */
562#ifdef CONFIG_MIPS_FIXUP_BIGPHYS_ADDR
563phys_addr_t fixup_bigphys_addr(phys_addr_t addr, phys_addr_t size);
564int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long vaddr,
565 unsigned long pfn, unsigned long size, pgprot_t prot);
566#define io_remap_pfn_range io_remap_pfn_range
567#else
568#define fixup_bigphys_addr(addr, size) (addr)
569#endif /* CONFIG_MIPS_FIXUP_BIGPHYS_ADDR */
570
571#ifdef CONFIG_TRANSPARENT_HUGEPAGE
572
573/* We don't have hardware dirty/accessed bits, generic_pmdp_establish is fine.*/
574#define pmdp_establish generic_pmdp_establish
575
576#define has_transparent_hugepage has_transparent_hugepage
577extern int has_transparent_hugepage(void);
578
579static inline int pmd_trans_huge(pmd_t pmd)
580{
581 return !!(pmd_val(pmd) & _PAGE_HUGE);
582}
583
584static inline pmd_t pmd_mkhuge(pmd_t pmd)
585{
586 pmd_val(pmd) |= _PAGE_HUGE;
587
588 return pmd;
589}
590
591extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,
592 pmd_t *pmdp, pmd_t pmd);
593
594#define pmd_write pmd_write
595static inline int pmd_write(pmd_t pmd)
596{
597 return !!(pmd_val(pmd) & _PAGE_WRITE);
598}
599
600static inline pmd_t pmd_wrprotect(pmd_t pmd)
601{
602 pmd_val(pmd) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
603 return pmd;
604}
605
606static inline pmd_t pmd_mkwrite(pmd_t pmd)
607{
608 pmd_val(pmd) |= _PAGE_WRITE;
609 if (pmd_val(pmd) & _PAGE_MODIFIED)
610 pmd_val(pmd) |= _PAGE_SILENT_WRITE;
611
612 return pmd;
613}
614
615static inline int pmd_dirty(pmd_t pmd)
616{
617 return !!(pmd_val(pmd) & _PAGE_MODIFIED);
618}
619
620static inline pmd_t pmd_mkclean(pmd_t pmd)
621{
622 pmd_val(pmd) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
623 return pmd;
624}
625
626static inline pmd_t pmd_mkdirty(pmd_t pmd)
627{
628 pmd_val(pmd) |= _PAGE_MODIFIED | _PAGE_SOFT_DIRTY;
629 if (pmd_val(pmd) & _PAGE_WRITE)
630 pmd_val(pmd) |= _PAGE_SILENT_WRITE;
631
632 return pmd;
633}
634
635static inline int pmd_young(pmd_t pmd)
636{
637 return !!(pmd_val(pmd) & _PAGE_ACCESSED);
638}
639
640static inline pmd_t pmd_mkold(pmd_t pmd)
641{
642 pmd_val(pmd) &= ~(_PAGE_ACCESSED|_PAGE_SILENT_READ);
643
644 return pmd;
645}
646
647static inline pmd_t pmd_mkyoung(pmd_t pmd)
648{
649 pmd_val(pmd) |= _PAGE_ACCESSED;
650
651 if (!(pmd_val(pmd) & _PAGE_NO_READ))
652 pmd_val(pmd) |= _PAGE_SILENT_READ;
653
654 return pmd;
655}
656
657#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
658static inline int pmd_soft_dirty(pmd_t pmd)
659{
660 return !!(pmd_val(pmd) & _PAGE_SOFT_DIRTY);
661}
662
663static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
664{
665 pmd_val(pmd) |= _PAGE_SOFT_DIRTY;
666 return pmd;
667}
668
669static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
670{
671 pmd_val(pmd) &= ~(_PAGE_SOFT_DIRTY);
672 return pmd;
673}
674
675#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
676
677/* Extern to avoid header file madness */
678extern pmd_t mk_pmd(struct page *page, pgprot_t prot);
679
680static inline unsigned long pmd_pfn(pmd_t pmd)
681{
682 return pmd_val(pmd) >> _PFN_SHIFT;
683}
684
685static inline struct page *pmd_page(pmd_t pmd)
686{
687 if (pmd_trans_huge(pmd))
688 return pfn_to_page(pmd_pfn(pmd));
689
690 return pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT);
691}
692
693static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
694{
695 pmd_val(pmd) = (pmd_val(pmd) & (_PAGE_CHG_MASK | _PAGE_HUGE)) |
696 (pgprot_val(newprot) & ~_PAGE_CHG_MASK);
697 return pmd;
698}
699
700static inline pmd_t pmd_mkinvalid(pmd_t pmd)
701{
702 pmd_val(pmd) &= ~(_PAGE_PRESENT | _PAGE_VALID | _PAGE_DIRTY);
703
704 return pmd;
705}
706
707/*
708 * The generic version pmdp_huge_get_and_clear uses a version of pmd_clear() with a
709 * different prototype.
710 */
711#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
712static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
713 unsigned long address, pmd_t *pmdp)
714{
715 pmd_t old = *pmdp;
716
717 pmd_clear(pmdp);
718
719 return old;
720}
721
722#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
723
724#ifdef _PAGE_HUGE
725#define pmd_leaf(pmd) ((pmd_val(pmd) & _PAGE_HUGE) != 0)
726#define pud_leaf(pud) ((pud_val(pud) & _PAGE_HUGE) != 0)
727#endif
728
729#define gup_fast_permitted(start, end) (!cpu_has_dc_aliases)
730
731/*
732 * We provide our own get_unmapped area to cope with the virtual aliasing
733 * constraints placed on us by the cache architecture.
734 */
735#define HAVE_ARCH_UNMAPPED_AREA
736#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
737
738#endif /* _ASM_PGTABLE_H */