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v6.2
   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * Copyright IBM Corp. 2012
   4 *
   5 * Author(s):
   6 *   Jan Glauber <jang@linux.vnet.ibm.com>
   7 *
   8 * The System z PCI code is a rewrite from a prototype by
   9 * the following people (Kudoz!):
  10 *   Alexander Schmidt
  11 *   Christoph Raisch
  12 *   Hannes Hering
  13 *   Hoang-Nam Nguyen
  14 *   Jan-Bernd Themann
  15 *   Stefan Roscher
  16 *   Thomas Klein
  17 */
  18
  19#define KMSG_COMPONENT "zpci"
  20#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  21
  22#include <linux/kernel.h>
  23#include <linux/slab.h>
  24#include <linux/err.h>
  25#include <linux/export.h>
  26#include <linux/delay.h>
 
 
  27#include <linux/seq_file.h>
  28#include <linux/jump_label.h>
  29#include <linux/pci.h>
  30#include <linux/printk.h>
  31
  32#include <asm/isc.h>
  33#include <asm/airq.h>
  34#include <asm/facility.h>
  35#include <asm/pci_insn.h>
  36#include <asm/pci_clp.h>
  37#include <asm/pci_dma.h>
  38
  39#include "pci_bus.h"
  40#include "pci_iov.h"
 
 
 
 
 
  41
  42/* list of all detected zpci devices */
  43static LIST_HEAD(zpci_list);
  44static DEFINE_SPINLOCK(zpci_list_lock);
  45
  46static DECLARE_BITMAP(zpci_domain, ZPCI_DOMAIN_BITMAP_SIZE);
 
 
 
 
 
 
  47static DEFINE_SPINLOCK(zpci_domain_lock);
  48
 
 
 
 
 
 
 
 
 
 
 
  49#define ZPCI_IOMAP_ENTRIES						\
  50	min(((unsigned long) ZPCI_NR_DEVICES * PCI_STD_NUM_BARS / 2),	\
  51	    ZPCI_IOMAP_MAX_ENTRIES)
  52
  53unsigned int s390_pci_no_rid;
  54
  55static DEFINE_SPINLOCK(zpci_iomap_lock);
  56static unsigned long *zpci_iomap_bitmap;
  57struct zpci_iomap_entry *zpci_iomap_start;
  58EXPORT_SYMBOL_GPL(zpci_iomap_start);
  59
  60DEFINE_STATIC_KEY_FALSE(have_mio);
  61
  62static struct kmem_cache *zdev_fmb_cache;
  63
  64/* AEN structures that must be preserved over KVM module re-insertion */
  65union zpci_sic_iib *zpci_aipb;
  66EXPORT_SYMBOL_GPL(zpci_aipb);
  67struct airq_iv *zpci_aif_sbv;
  68EXPORT_SYMBOL_GPL(zpci_aif_sbv);
  69
  70struct zpci_dev *get_zdev_by_fid(u32 fid)
  71{
  72	struct zpci_dev *tmp, *zdev = NULL;
  73
  74	spin_lock(&zpci_list_lock);
  75	list_for_each_entry(tmp, &zpci_list, entry) {
  76		if (tmp->fid == fid) {
  77			zdev = tmp;
  78			zpci_zdev_get(zdev);
  79			break;
  80		}
  81	}
  82	spin_unlock(&zpci_list_lock);
  83	return zdev;
  84}
  85
  86void zpci_remove_reserved_devices(void)
  87{
  88	struct zpci_dev *tmp, *zdev;
  89	enum zpci_state state;
  90	LIST_HEAD(remove);
  91
  92	spin_lock(&zpci_list_lock);
  93	list_for_each_entry_safe(zdev, tmp, &zpci_list, entry) {
  94		if (zdev->state == ZPCI_FN_STATE_STANDBY &&
  95		    !clp_get_state(zdev->fid, &state) &&
  96		    state == ZPCI_FN_STATE_RESERVED)
  97			list_move_tail(&zdev->entry, &remove);
  98	}
  99	spin_unlock(&zpci_list_lock);
 100
 101	list_for_each_entry_safe(zdev, tmp, &remove, entry)
 102		zpci_device_reserved(zdev);
 103}
 104
 105int pci_domain_nr(struct pci_bus *bus)
 106{
 107	return ((struct zpci_bus *) bus->sysdata)->domain_nr;
 108}
 109EXPORT_SYMBOL_GPL(pci_domain_nr);
 110
 111int pci_proc_domain(struct pci_bus *bus)
 112{
 113	return pci_domain_nr(bus);
 114}
 115EXPORT_SYMBOL_GPL(pci_proc_domain);
 116
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 117/* Modify PCI: Register I/O address translation parameters */
 118int zpci_register_ioat(struct zpci_dev *zdev, u8 dmaas,
 119		       u64 base, u64 limit, u64 iota, u8 *status)
 120{
 121	u64 req = ZPCI_CREATE_REQ(zdev->fh, dmaas, ZPCI_MOD_FC_REG_IOAT);
 122	struct zpci_fib fib = {0};
 123	u8 cc;
 124
 125	WARN_ON_ONCE(iota & 0x3fff);
 126	fib.pba = base;
 127	fib.pal = limit;
 128	fib.iota = iota | ZPCI_IOTA_RTTO_FLAG;
 129	fib.gd = zdev->gisa;
 130	cc = zpci_mod_fc(req, &fib, status);
 131	if (cc)
 132		zpci_dbg(3, "reg ioat fid:%x, cc:%d, status:%d\n", zdev->fid, cc, *status);
 133	return cc;
 134}
 135EXPORT_SYMBOL_GPL(zpci_register_ioat);
 136
 137/* Modify PCI: Unregister I/O address translation parameters */
 138int zpci_unregister_ioat(struct zpci_dev *zdev, u8 dmaas)
 139{
 140	u64 req = ZPCI_CREATE_REQ(zdev->fh, dmaas, ZPCI_MOD_FC_DEREG_IOAT);
 141	struct zpci_fib fib = {0};
 142	u8 cc, status;
 143
 144	fib.gd = zdev->gisa;
 
 
 
 
 
 
 145
 146	cc = zpci_mod_fc(req, &fib, &status);
 147	if (cc)
 148		zpci_dbg(3, "unreg ioat fid:%x, cc:%d, status:%d\n", zdev->fid, cc, status);
 149	return cc;
 150}
 151
 152/* Modify PCI: Set PCI function measurement parameters */
 153int zpci_fmb_enable_device(struct zpci_dev *zdev)
 154{
 155	u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_SET_MEASURE);
 156	struct zpci_fib fib = {0};
 157	u8 cc, status;
 158
 159	if (zdev->fmb || sizeof(*zdev->fmb) < zdev->fmb_length)
 160		return -EINVAL;
 161
 162	zdev->fmb = kmem_cache_zalloc(zdev_fmb_cache, GFP_KERNEL);
 163	if (!zdev->fmb)
 164		return -ENOMEM;
 165	WARN_ON((u64) zdev->fmb & 0xf);
 166
 167	/* reset software counters */
 168	atomic64_set(&zdev->allocated_pages, 0);
 169	atomic64_set(&zdev->mapped_pages, 0);
 170	atomic64_set(&zdev->unmapped_pages, 0);
 171
 172	fib.fmb_addr = virt_to_phys(zdev->fmb);
 173	fib.gd = zdev->gisa;
 174	cc = zpci_mod_fc(req, &fib, &status);
 175	if (cc) {
 176		kmem_cache_free(zdev_fmb_cache, zdev->fmb);
 177		zdev->fmb = NULL;
 178	}
 179	return cc ? -EIO : 0;
 180}
 181
 182/* Modify PCI: Disable PCI function measurement */
 183int zpci_fmb_disable_device(struct zpci_dev *zdev)
 184{
 185	u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_SET_MEASURE);
 186	struct zpci_fib fib = {0};
 187	u8 cc, status;
 188
 189	if (!zdev->fmb)
 190		return -EINVAL;
 191
 192	fib.gd = zdev->gisa;
 193
 194	/* Function measurement is disabled if fmb address is zero */
 195	cc = zpci_mod_fc(req, &fib, &status);
 196	if (cc == 3) /* Function already gone. */
 197		cc = 0;
 198
 199	if (!cc) {
 200		kmem_cache_free(zdev_fmb_cache, zdev->fmb);
 201		zdev->fmb = NULL;
 202	}
 203	return cc ? -EIO : 0;
 204}
 205
 
 
 206static int zpci_cfg_load(struct zpci_dev *zdev, int offset, u32 *val, u8 len)
 207{
 208	u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
 209	u64 data;
 210	int rc;
 211
 212	rc = __zpci_load(&data, req, offset);
 213	if (!rc) {
 214		data = le64_to_cpu((__force __le64) data);
 215		data >>= (8 - len) * 8;
 216		*val = (u32) data;
 217	} else
 218		*val = 0xffffffff;
 219	return rc;
 220}
 221
 222static int zpci_cfg_store(struct zpci_dev *zdev, int offset, u32 val, u8 len)
 223{
 224	u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
 225	u64 data = val;
 226	int rc;
 227
 228	data <<= (8 - len) * 8;
 229	data = (__force u64) cpu_to_le64(data);
 230	rc = __zpci_store(data, req, offset);
 231	return rc;
 232}
 233
 
 
 
 
 234resource_size_t pcibios_align_resource(void *data, const struct resource *res,
 235				       resource_size_t size,
 236				       resource_size_t align)
 237{
 238	return 0;
 239}
 240
 241/* combine single writes by using store-block insn */
 242void __iowrite64_copy(void __iomem *to, const void *from, size_t count)
 243{
 244       zpci_memcpy_toio(to, from, count);
 245}
 246
 247static void __iomem *__ioremap(phys_addr_t addr, size_t size, pgprot_t prot)
 248{
 249	unsigned long offset, vaddr;
 250	struct vm_struct *area;
 251	phys_addr_t last_addr;
 252
 253	last_addr = addr + size - 1;
 254	if (!size || last_addr < addr)
 255		return NULL;
 256
 257	if (!static_branch_unlikely(&have_mio))
 258		return (void __iomem *) addr;
 259
 260	offset = addr & ~PAGE_MASK;
 261	addr &= PAGE_MASK;
 262	size = PAGE_ALIGN(size + offset);
 263	area = get_vm_area(size, VM_IOREMAP);
 264	if (!area)
 265		return NULL;
 266
 267	vaddr = (unsigned long) area->addr;
 268	if (ioremap_page_range(vaddr, vaddr + size, addr, prot)) {
 269		free_vm_area(area);
 270		return NULL;
 271	}
 272	return (void __iomem *) ((unsigned long) area->addr + offset);
 273}
 274
 275void __iomem *ioremap_prot(phys_addr_t addr, size_t size, unsigned long prot)
 276{
 277	return __ioremap(addr, size, __pgprot(prot));
 278}
 279EXPORT_SYMBOL(ioremap_prot);
 280
 281void __iomem *ioremap(phys_addr_t addr, size_t size)
 282{
 283	return __ioremap(addr, size, PAGE_KERNEL);
 284}
 285EXPORT_SYMBOL(ioremap);
 286
 287void __iomem *ioremap_wc(phys_addr_t addr, size_t size)
 288{
 289	return __ioremap(addr, size, pgprot_writecombine(PAGE_KERNEL));
 290}
 291EXPORT_SYMBOL(ioremap_wc);
 292
 293void __iomem *ioremap_wt(phys_addr_t addr, size_t size)
 294{
 295	return __ioremap(addr, size, pgprot_writethrough(PAGE_KERNEL));
 296}
 297EXPORT_SYMBOL(ioremap_wt);
 298
 299void iounmap(volatile void __iomem *addr)
 300{
 301	if (static_branch_likely(&have_mio))
 302		vunmap((__force void *) ((unsigned long) addr & PAGE_MASK));
 303}
 304EXPORT_SYMBOL(iounmap);
 305
 306/* Create a virtual mapping cookie for a PCI BAR */
 307static void __iomem *pci_iomap_range_fh(struct pci_dev *pdev, int bar,
 308					unsigned long offset, unsigned long max)
 
 
 309{
 310	struct zpci_dev *zdev =	to_zpci(pdev);
 311	int idx;
 312
 
 
 
 313	idx = zdev->bars[bar].map_idx;
 314	spin_lock(&zpci_iomap_lock);
 315	/* Detect overrun */
 316	WARN_ON(!++zpci_iomap_start[idx].count);
 317	zpci_iomap_start[idx].fh = zdev->fh;
 318	zpci_iomap_start[idx].bar = bar;
 319	spin_unlock(&zpci_iomap_lock);
 320
 321	return (void __iomem *) ZPCI_ADDR(idx) + offset;
 322}
 323
 324static void __iomem *pci_iomap_range_mio(struct pci_dev *pdev, int bar,
 325					 unsigned long offset,
 326					 unsigned long max)
 327{
 328	unsigned long barsize = pci_resource_len(pdev, bar);
 329	struct zpci_dev *zdev = to_zpci(pdev);
 330	void __iomem *iova;
 331
 332	iova = ioremap((unsigned long) zdev->bars[bar].mio_wt, barsize);
 333	return iova ? iova + offset : iova;
 334}
 335
 336void __iomem *pci_iomap_range(struct pci_dev *pdev, int bar,
 337			      unsigned long offset, unsigned long max)
 338{
 339	if (bar >= PCI_STD_NUM_BARS || !pci_resource_len(pdev, bar))
 340		return NULL;
 341
 342	if (static_branch_likely(&have_mio))
 343		return pci_iomap_range_mio(pdev, bar, offset, max);
 344	else
 345		return pci_iomap_range_fh(pdev, bar, offset, max);
 346}
 347EXPORT_SYMBOL(pci_iomap_range);
 348
 349void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
 350{
 351	return pci_iomap_range(dev, bar, 0, maxlen);
 352}
 353EXPORT_SYMBOL(pci_iomap);
 354
 355static void __iomem *pci_iomap_wc_range_mio(struct pci_dev *pdev, int bar,
 356					    unsigned long offset, unsigned long max)
 357{
 358	unsigned long barsize = pci_resource_len(pdev, bar);
 359	struct zpci_dev *zdev = to_zpci(pdev);
 360	void __iomem *iova;
 361
 362	iova = ioremap((unsigned long) zdev->bars[bar].mio_wb, barsize);
 363	return iova ? iova + offset : iova;
 364}
 365
 366void __iomem *pci_iomap_wc_range(struct pci_dev *pdev, int bar,
 367				 unsigned long offset, unsigned long max)
 368{
 369	if (bar >= PCI_STD_NUM_BARS || !pci_resource_len(pdev, bar))
 370		return NULL;
 371
 372	if (static_branch_likely(&have_mio))
 373		return pci_iomap_wc_range_mio(pdev, bar, offset, max);
 374	else
 375		return pci_iomap_range_fh(pdev, bar, offset, max);
 376}
 377EXPORT_SYMBOL(pci_iomap_wc_range);
 378
 379void __iomem *pci_iomap_wc(struct pci_dev *dev, int bar, unsigned long maxlen)
 380{
 381	return pci_iomap_wc_range(dev, bar, 0, maxlen);
 382}
 383EXPORT_SYMBOL(pci_iomap_wc);
 384
 385static void pci_iounmap_fh(struct pci_dev *pdev, void __iomem *addr)
 386{
 387	unsigned int idx = ZPCI_IDX(addr);
 388
 389	spin_lock(&zpci_iomap_lock);
 390	/* Detect underrun */
 391	WARN_ON(!zpci_iomap_start[idx].count);
 392	if (!--zpci_iomap_start[idx].count) {
 393		zpci_iomap_start[idx].fh = 0;
 394		zpci_iomap_start[idx].bar = 0;
 395	}
 396	spin_unlock(&zpci_iomap_lock);
 397}
 398
 399static void pci_iounmap_mio(struct pci_dev *pdev, void __iomem *addr)
 400{
 401	iounmap(addr);
 402}
 403
 404void pci_iounmap(struct pci_dev *pdev, void __iomem *addr)
 405{
 406	if (static_branch_likely(&have_mio))
 407		pci_iounmap_mio(pdev, addr);
 408	else
 409		pci_iounmap_fh(pdev, addr);
 410}
 411EXPORT_SYMBOL(pci_iounmap);
 412
 413static int pci_read(struct pci_bus *bus, unsigned int devfn, int where,
 414		    int size, u32 *val)
 415{
 416	struct zpci_dev *zdev = zdev_from_bus(bus, devfn);
 
 417
 418	return (zdev) ? zpci_cfg_load(zdev, where, val, size) : -ENODEV;
 
 
 
 
 
 419}
 420
 421static int pci_write(struct pci_bus *bus, unsigned int devfn, int where,
 422		     int size, u32 val)
 423{
 424	struct zpci_dev *zdev = zdev_from_bus(bus, devfn);
 
 425
 426	return (zdev) ? zpci_cfg_store(zdev, where, val, size) : -ENODEV;
 
 
 
 
 
 427}
 428
 429static struct pci_ops pci_root_ops = {
 430	.read = pci_read,
 431	.write = pci_write,
 432};
 433
 434static void zpci_map_resources(struct pci_dev *pdev)
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 435{
 436	struct zpci_dev *zdev = to_zpci(pdev);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 437	resource_size_t len;
 438	int i;
 439
 440	for (i = 0; i < PCI_STD_NUM_BARS; i++) {
 441		len = pci_resource_len(pdev, i);
 442		if (!len)
 443			continue;
 444
 445		if (zpci_use_mio(zdev))
 446			pdev->resource[i].start =
 447				(resource_size_t __force) zdev->bars[i].mio_wt;
 448		else
 449			pdev->resource[i].start = (resource_size_t __force)
 450				pci_iomap_range_fh(pdev, i, 0, 0);
 451		pdev->resource[i].end = pdev->resource[i].start + len - 1;
 452	}
 453
 454	zpci_iov_map_resources(pdev);
 455}
 456
 457static void zpci_unmap_resources(struct pci_dev *pdev)
 458{
 459	struct zpci_dev *zdev = to_zpci(pdev);
 460	resource_size_t len;
 461	int i;
 462
 463	if (zpci_use_mio(zdev))
 464		return;
 465
 466	for (i = 0; i < PCI_STD_NUM_BARS; i++) {
 467		len = pci_resource_len(pdev, i);
 468		if (!len)
 469			continue;
 470		pci_iounmap_fh(pdev, (void __iomem __force *)
 471			       pdev->resource[i].start);
 472	}
 473}
 474
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 475static int zpci_alloc_iomap(struct zpci_dev *zdev)
 476{
 477	unsigned long entry;
 478
 479	spin_lock(&zpci_iomap_lock);
 480	entry = find_first_zero_bit(zpci_iomap_bitmap, ZPCI_IOMAP_ENTRIES);
 481	if (entry == ZPCI_IOMAP_ENTRIES) {
 482		spin_unlock(&zpci_iomap_lock);
 483		return -ENOSPC;
 484	}
 485	set_bit(entry, zpci_iomap_bitmap);
 486	spin_unlock(&zpci_iomap_lock);
 487	return entry;
 488}
 489
 490static void zpci_free_iomap(struct zpci_dev *zdev, int entry)
 491{
 492	spin_lock(&zpci_iomap_lock);
 493	memset(&zpci_iomap_start[entry], 0, sizeof(struct zpci_iomap_entry));
 494	clear_bit(entry, zpci_iomap_bitmap);
 495	spin_unlock(&zpci_iomap_lock);
 496}
 497
 498static void zpci_do_update_iomap_fh(struct zpci_dev *zdev, u32 fh)
 499{
 500	int bar, idx;
 501
 502	spin_lock(&zpci_iomap_lock);
 503	for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
 504		if (!zdev->bars[bar].size)
 505			continue;
 506		idx = zdev->bars[bar].map_idx;
 507		if (!zpci_iomap_start[idx].count)
 508			continue;
 509		WRITE_ONCE(zpci_iomap_start[idx].fh, zdev->fh);
 510	}
 511	spin_unlock(&zpci_iomap_lock);
 512}
 513
 514void zpci_update_fh(struct zpci_dev *zdev, u32 fh)
 515{
 516	if (!fh || zdev->fh == fh)
 517		return;
 518
 519	zdev->fh = fh;
 520	if (zpci_use_mio(zdev))
 521		return;
 522	if (zdev->has_resources && zdev_enabled(zdev))
 523		zpci_do_update_iomap_fh(zdev, fh);
 524}
 525
 526static struct resource *__alloc_res(struct zpci_dev *zdev, unsigned long start,
 527				    unsigned long size, unsigned long flags)
 528{
 529	struct resource *r;
 530
 531	r = kzalloc(sizeof(*r), GFP_KERNEL);
 532	if (!r)
 533		return NULL;
 534
 535	r->start = start;
 536	r->end = r->start + size - 1;
 537	r->flags = flags;
 538	r->name = zdev->res_name;
 539
 540	if (request_resource(&iomem_resource, r)) {
 541		kfree(r);
 542		return NULL;
 543	}
 544	return r;
 545}
 546
 547int zpci_setup_bus_resources(struct zpci_dev *zdev,
 548			     struct list_head *resources)
 549{
 550	unsigned long addr, size, flags;
 551	struct resource *res;
 552	int i, entry;
 553
 554	snprintf(zdev->res_name, sizeof(zdev->res_name),
 555		 "PCI Bus %04x:%02x", zdev->uid, ZPCI_BUS_NR);
 556
 557	for (i = 0; i < PCI_STD_NUM_BARS; i++) {
 558		if (!zdev->bars[i].size)
 559			continue;
 560		entry = zpci_alloc_iomap(zdev);
 561		if (entry < 0)
 562			return entry;
 563		zdev->bars[i].map_idx = entry;
 564
 565		/* only MMIO is supported */
 566		flags = IORESOURCE_MEM;
 567		if (zdev->bars[i].val & 8)
 568			flags |= IORESOURCE_PREFETCH;
 569		if (zdev->bars[i].val & 4)
 570			flags |= IORESOURCE_MEM_64;
 571
 572		if (zpci_use_mio(zdev))
 573			addr = (unsigned long) zdev->bars[i].mio_wt;
 574		else
 575			addr = ZPCI_ADDR(entry);
 576		size = 1UL << zdev->bars[i].size;
 577
 578		res = __alloc_res(zdev, addr, size, flags);
 579		if (!res) {
 580			zpci_free_iomap(zdev, entry);
 581			return -ENOMEM;
 582		}
 583		zdev->bars[i].res = res;
 584		pci_add_resource(resources, res);
 585	}
 586	zdev->has_resources = 1;
 587
 588	return 0;
 589}
 590
 591static void zpci_cleanup_bus_resources(struct zpci_dev *zdev)
 592{
 593	int i;
 594
 595	for (i = 0; i < PCI_STD_NUM_BARS; i++) {
 596		if (!zdev->bars[i].size || !zdev->bars[i].res)
 597			continue;
 598
 599		zpci_free_iomap(zdev, zdev->bars[i].map_idx);
 600		release_resource(zdev->bars[i].res);
 601		kfree(zdev->bars[i].res);
 602	}
 603	zdev->has_resources = 0;
 604}
 605
 606int pcibios_device_add(struct pci_dev *pdev)
 607{
 608	struct zpci_dev *zdev = to_zpci(pdev);
 609	struct resource *res;
 610	int i;
 611
 612	/* The pdev has a reference to the zdev via its bus */
 613	zpci_zdev_get(zdev);
 614	if (pdev->is_physfn)
 615		pdev->no_vf_scan = 1;
 616
 617	pdev->dev.groups = zpci_attr_groups;
 618	pdev->dev.dma_ops = &s390_pci_dma_ops;
 619	zpci_map_resources(pdev);
 620
 621	for (i = 0; i < PCI_STD_NUM_BARS; i++) {
 622		res = &pdev->resource[i];
 623		if (res->parent || !res->flags)
 624			continue;
 625		pci_claim_resource(pdev, i);
 626	}
 627
 628	return 0;
 629}
 630
 631void pcibios_release_device(struct pci_dev *pdev)
 632{
 633	struct zpci_dev *zdev = to_zpci(pdev);
 634
 635	zpci_unmap_resources(pdev);
 636	zpci_zdev_put(zdev);
 637}
 638
 639int pcibios_enable_device(struct pci_dev *pdev, int mask)
 640{
 641	struct zpci_dev *zdev = to_zpci(pdev);
 642
 643	zpci_debug_init_device(zdev, dev_name(&pdev->dev));
 644	zpci_fmb_enable_device(zdev);
 645
 646	return pci_enable_resources(pdev, mask);
 647}
 648
 649void pcibios_disable_device(struct pci_dev *pdev)
 650{
 651	struct zpci_dev *zdev = to_zpci(pdev);
 652
 653	zpci_fmb_disable_device(zdev);
 654	zpci_debug_exit_device(zdev);
 655}
 656
 657static int __zpci_register_domain(int domain)
 
 658{
 659	spin_lock(&zpci_domain_lock);
 660	if (test_bit(domain, zpci_domain)) {
 661		spin_unlock(&zpci_domain_lock);
 662		pr_err("Domain %04x is already assigned\n", domain);
 663		return -EEXIST;
 664	}
 665	set_bit(domain, zpci_domain);
 666	spin_unlock(&zpci_domain_lock);
 667	return domain;
 
 
 
 
 
 
 
 
 668}
 669
 670static int __zpci_alloc_domain(void)
 671{
 672	int domain;
 
 673
 674	spin_lock(&zpci_domain_lock);
 675	/*
 676	 * We can always auto allocate domains below ZPCI_NR_DEVICES.
 677	 * There is either a free domain or we have reached the maximum in
 678	 * which case we would have bailed earlier.
 679	 */
 680	domain = find_first_zero_bit(zpci_domain, ZPCI_NR_DEVICES);
 681	set_bit(domain, zpci_domain);
 682	spin_unlock(&zpci_domain_lock);
 683	return domain;
 684}
 685
 686int zpci_alloc_domain(int domain)
 
 
 
 
 
 
 
 
 687{
 688	if (zpci_unique_uid) {
 689		if (domain)
 690			return __zpci_register_domain(domain);
 691		pr_warn("UID checking was active but no UID is provided: switching to automatic domain allocation\n");
 692		update_uid_checking(false);
 693	}
 694	return __zpci_alloc_domain();
 
 
 695}
 696
 697void zpci_free_domain(int domain)
 698{
 699	spin_lock(&zpci_domain_lock);
 700	clear_bit(domain, zpci_domain);
 701	spin_unlock(&zpci_domain_lock);
 702}
 703
 704
 705int zpci_enable_device(struct zpci_dev *zdev)
 706{
 707	u32 fh = zdev->fh;
 708	int rc = 0;
 709
 710	if (clp_enable_fh(zdev, &fh, ZPCI_NR_DMA_SPACES))
 711		rc = -EIO;
 712	else
 713		zpci_update_fh(zdev, fh);
 714	return rc;
 715}
 716EXPORT_SYMBOL_GPL(zpci_enable_device);
 717
 718int zpci_disable_device(struct zpci_dev *zdev)
 719{
 720	u32 fh = zdev->fh;
 721	int cc, rc = 0;
 722
 723	cc = clp_disable_fh(zdev, &fh);
 724	if (!cc) {
 725		zpci_update_fh(zdev, fh);
 726	} else if (cc == CLP_RC_SETPCIFN_ALRDY) {
 727		pr_info("Disabling PCI function %08x had no effect as it was already disabled\n",
 728			zdev->fid);
 729		/* Function is already disabled - update handle */
 730		rc = clp_refresh_fh(zdev->fid, &fh);
 731		if (!rc) {
 732			zpci_update_fh(zdev, fh);
 733			rc = -EINVAL;
 734		}
 735	} else {
 736		rc = -EIO;
 737	}
 738	return rc;
 739}
 740EXPORT_SYMBOL_GPL(zpci_disable_device);
 741
 742/**
 743 * zpci_hot_reset_device - perform a reset of the given zPCI function
 744 * @zdev: the slot which should be reset
 745 *
 746 * Performs a low level reset of the zPCI function. The reset is low level in
 747 * the sense that the zPCI function can be reset without detaching it from the
 748 * common PCI subsystem. The reset may be performed while under control of
 749 * either DMA or IOMMU APIs in which case the existing DMA/IOMMU translation
 750 * table is reinstated at the end of the reset.
 751 *
 752 * After the reset the functions internal state is reset to an initial state
 753 * equivalent to its state during boot when first probing a driver.
 754 * Consequently after reset the PCI function requires re-initialization via the
 755 * common PCI code including re-enabling IRQs via pci_alloc_irq_vectors()
 756 * and enabling the function via e.g.pci_enablde_device_flags().The caller
 757 * must guard against concurrent reset attempts.
 758 *
 759 * In most cases this function should not be called directly but through
 760 * pci_reset_function() or pci_reset_bus() which handle the save/restore and
 761 * locking.
 762 *
 763 * Return: 0 on success and an error value otherwise
 764 */
 765int zpci_hot_reset_device(struct zpci_dev *zdev)
 766{
 767	u8 status;
 768	int rc;
 769
 770	zpci_dbg(3, "rst fid:%x, fh:%x\n", zdev->fid, zdev->fh);
 771	if (zdev_enabled(zdev)) {
 772		/* Disables device access, DMAs and IRQs (reset state) */
 773		rc = zpci_disable_device(zdev);
 774		/*
 775		 * Due to a z/VM vs LPAR inconsistency in the error state the
 776		 * FH may indicate an enabled device but disable says the
 777		 * device is already disabled don't treat it as an error here.
 778		 */
 779		if (rc == -EINVAL)
 780			rc = 0;
 781		if (rc)
 782			return rc;
 783	}
 784
 785	rc = zpci_enable_device(zdev);
 786	if (rc)
 787		return rc;
 788
 789	if (zdev->dma_table)
 790		rc = zpci_register_ioat(zdev, 0, zdev->start_dma, zdev->end_dma,
 791					virt_to_phys(zdev->dma_table), &status);
 792	else
 793		rc = zpci_dma_init_device(zdev);
 794	if (rc) {
 795		zpci_disable_device(zdev);
 796		return rc;
 797	}
 798
 
 799	return 0;
 
 
 
 
 
 800}
 801
 802/**
 803 * zpci_create_device() - Create a new zpci_dev and add it to the zbus
 804 * @fid: Function ID of the device to be created
 805 * @fh: Current Function Handle of the device to be created
 806 * @state: Initial state after creation either Standby or Configured
 807 *
 808 * Creates a new zpci device and adds it to its, possibly newly created, zbus
 809 * as well as zpci_list.
 810 *
 811 * Returns: the zdev on success or an error pointer otherwise
 812 */
 813struct zpci_dev *zpci_create_device(u32 fid, u32 fh, enum zpci_state state)
 814{
 815	struct zpci_dev *zdev;
 816	int rc;
 817
 818	zpci_dbg(1, "add fid:%x, fh:%x, c:%d\n", fid, fh, state);
 819	zdev = kzalloc(sizeof(*zdev), GFP_KERNEL);
 820	if (!zdev)
 821		return ERR_PTR(-ENOMEM);
 822
 823	/* FID and Function Handle are the static/dynamic identifiers */
 824	zdev->fid = fid;
 825	zdev->fh = fh;
 826
 827	/* Query function properties and update zdev */
 828	rc = clp_query_pci_fn(zdev);
 829	if (rc)
 830		goto error;
 831	zdev->state =  state;
 832
 833	kref_init(&zdev->kref);
 834	mutex_init(&zdev->lock);
 835	mutex_init(&zdev->kzdev_lock);
 836
 837	rc = zpci_init_iommu(zdev);
 838	if (rc)
 839		goto error;
 840
 841	rc = zpci_bus_device_register(zdev, &pci_root_ops);
 842	if (rc)
 843		goto error_destroy_iommu;
 844
 845	spin_lock(&zpci_list_lock);
 846	list_add_tail(&zdev->entry, &zpci_list);
 847	spin_unlock(&zpci_list_lock);
 848
 849	return zdev;
 
 850
 851error_destroy_iommu:
 852	zpci_destroy_iommu(zdev);
 853error:
 854	zpci_dbg(0, "add fid:%x, rc:%d\n", fid, rc);
 855	kfree(zdev);
 856	return ERR_PTR(rc);
 857}
 
 858
 859bool zpci_is_device_configured(struct zpci_dev *zdev)
 860{
 861	enum zpci_state state = zdev->state;
 862
 863	return state != ZPCI_FN_STATE_RESERVED &&
 864		state != ZPCI_FN_STATE_STANDBY;
 865}
 866
 867/**
 868 * zpci_scan_configured_device() - Scan a freshly configured zpci_dev
 869 * @zdev: The zpci_dev to be configured
 870 * @fh: The general function handle supplied by the platform
 871 *
 872 * Given a device in the configuration state Configured, enables, scans and
 873 * adds it to the common code PCI subsystem if possible. If the PCI device is
 874 * parked because we can not yet create a PCI bus because we have not seen
 875 * function 0, it is ignored but will be scanned once function 0 appears.
 876 * If any failure occurs, the zpci_dev is left disabled.
 877 *
 878 * Return: 0 on success, or an error code otherwise
 879 */
 880int zpci_scan_configured_device(struct zpci_dev *zdev, u32 fh)
 881{
 882	int rc;
 883
 884	zpci_update_fh(zdev, fh);
 885	/* the PCI function will be scanned once function 0 appears */
 886	if (!zdev->zbus->bus)
 887		return 0;
 888
 889	/* For function 0 on a multi-function bus scan whole bus as we might
 890	 * have to pick up existing functions waiting for it to allow creating
 891	 * the PCI bus
 892	 */
 893	if (zdev->devfn == 0 && zdev->zbus->multifunction)
 894		rc = zpci_bus_scan_bus(zdev->zbus);
 895	else
 896		rc = zpci_bus_scan_device(zdev);
 897
 898	return rc;
 899}
 
 900
 901/**
 902 * zpci_deconfigure_device() - Deconfigure a zpci_dev
 903 * @zdev: The zpci_dev to configure
 904 *
 905 * Deconfigure a zPCI function that is currently configured and possibly known
 906 * to the common code PCI subsystem.
 907 * If any failure occurs the device is left as is.
 908 *
 909 * Return: 0 on success, or an error code otherwise
 910 */
 911int zpci_deconfigure_device(struct zpci_dev *zdev)
 912{
 913	int rc;
 914
 915	if (zdev->zbus->bus)
 916		zpci_bus_remove_device(zdev, false);
 
 917
 918	if (zdev->dma_table) {
 919		rc = zpci_dma_exit_device(zdev);
 920		if (rc)
 921			return rc;
 922	}
 923	if (zdev_enabled(zdev)) {
 924		rc = zpci_disable_device(zdev);
 925		if (rc)
 926			return rc;
 927	}
 928
 929	rc = sclp_pci_deconfigure(zdev->fid);
 930	zpci_dbg(3, "deconf fid:%x, rc:%d\n", zdev->fid, rc);
 931	if (rc)
 932		return rc;
 933	zdev->state = ZPCI_FN_STATE_STANDBY;
 934
 935	return 0;
 936}
 937
 938/**
 939 * zpci_device_reserved() - Mark device as resverved
 940 * @zdev: the zpci_dev that was reserved
 941 *
 942 * Handle the case that a given zPCI function was reserved by another system.
 943 * After a call to this function the zpci_dev can not be found via
 944 * get_zdev_by_fid() anymore but may still be accessible via existing
 945 * references though it will not be functional anymore.
 946 */
 947void zpci_device_reserved(struct zpci_dev *zdev)
 948{
 949	if (zdev->has_hp_slot)
 950		zpci_exit_slot(zdev);
 951	/*
 952	 * Remove device from zpci_list as it is going away. This also
 953	 * makes sure we ignore subsequent zPCI events for this device.
 954	 */
 955	spin_lock(&zpci_list_lock);
 956	list_del(&zdev->entry);
 957	spin_unlock(&zpci_list_lock);
 958	zdev->state = ZPCI_FN_STATE_RESERVED;
 959	zpci_dbg(3, "rsv fid:%x\n", zdev->fid);
 960	zpci_zdev_put(zdev);
 961}
 962
 963void zpci_release_device(struct kref *kref)
 964{
 965	struct zpci_dev *zdev = container_of(kref, struct zpci_dev, kref);
 966	int ret;
 967
 968	if (zdev->zbus->bus)
 969		zpci_bus_remove_device(zdev, false);
 970
 971	if (zdev->dma_table)
 972		zpci_dma_exit_device(zdev);
 973	if (zdev_enabled(zdev))
 974		zpci_disable_device(zdev);
 975
 976	switch (zdev->state) {
 977	case ZPCI_FN_STATE_CONFIGURED:
 978		ret = sclp_pci_deconfigure(zdev->fid);
 979		zpci_dbg(3, "deconf fid:%x, rc:%d\n", zdev->fid, ret);
 980		fallthrough;
 981	case ZPCI_FN_STATE_STANDBY:
 982		if (zdev->has_hp_slot)
 983			zpci_exit_slot(zdev);
 984		spin_lock(&zpci_list_lock);
 985		list_del(&zdev->entry);
 986		spin_unlock(&zpci_list_lock);
 987		zpci_dbg(3, "rsv fid:%x\n", zdev->fid);
 988		fallthrough;
 989	case ZPCI_FN_STATE_RESERVED:
 990		if (zdev->has_resources)
 991			zpci_cleanup_bus_resources(zdev);
 992		zpci_bus_device_unregister(zdev);
 993		zpci_destroy_iommu(zdev);
 994		fallthrough;
 995	default:
 996		break;
 997	}
 998	zpci_dbg(3, "rem fid:%x\n", zdev->fid);
 999	kfree_rcu(zdev, rcu);
1000}
1001
1002int zpci_report_error(struct pci_dev *pdev,
1003		      struct zpci_report_error_header *report)
1004{
1005	struct zpci_dev *zdev = to_zpci(pdev);
1006
1007	return sclp_pci_report(report, zdev->fh, zdev->fid);
1008}
1009EXPORT_SYMBOL(zpci_report_error);
1010
1011/**
1012 * zpci_clear_error_state() - Clears the zPCI error state of the device
1013 * @zdev: The zdev for which the zPCI error state should be reset
1014 *
1015 * Clear the zPCI error state of the device. If clearing the zPCI error state
1016 * fails the device is left in the error state. In this case it may make sense
1017 * to call zpci_io_perm_failure() on the associated pdev if it exists.
1018 *
1019 * Returns: 0 on success, -EIO otherwise
1020 */
1021int zpci_clear_error_state(struct zpci_dev *zdev)
1022{
1023	u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_RESET_ERROR);
1024	struct zpci_fib fib = {0};
1025	u8 status;
1026	int cc;
1027
1028	cc = zpci_mod_fc(req, &fib, &status);
1029	if (cc) {
1030		zpci_dbg(3, "ces fid:%x, cc:%d, status:%x\n", zdev->fid, cc, status);
1031		return -EIO;
1032	}
1033
1034	return 0;
1035}
 
1036
1037/**
1038 * zpci_reset_load_store_blocked() - Re-enables L/S from error state
1039 * @zdev: The zdev for which to unblock load/store access
1040 *
1041 * Re-enables load/store access for a PCI function in the error state while
1042 * keeping DMA blocked. In this state drivers can poke MMIO space to determine
1043 * if error recovery is possible while catching any rogue DMA access from the
1044 * device.
1045 *
1046 * Returns: 0 on success, -EIO otherwise
1047 */
1048int zpci_reset_load_store_blocked(struct zpci_dev *zdev)
1049{
1050	u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_RESET_BLOCK);
1051	struct zpci_fib fib = {0};
1052	u8 status;
1053	int cc;
1054
1055	cc = zpci_mod_fc(req, &fib, &status);
1056	if (cc) {
1057		zpci_dbg(3, "rls fid:%x, cc:%d, status:%x\n", zdev->fid, cc, status);
1058		return -EIO;
1059	}
1060
1061	return 0;
1062}
1063
1064static int zpci_mem_init(void)
1065{
1066	BUILD_BUG_ON(!is_power_of_2(__alignof__(struct zpci_fmb)) ||
1067		     __alignof__(struct zpci_fmb) < sizeof(struct zpci_fmb));
1068
1069	zdev_fmb_cache = kmem_cache_create("PCI_FMB_cache", sizeof(struct zpci_fmb),
1070					   __alignof__(struct zpci_fmb), 0, NULL);
1071	if (!zdev_fmb_cache)
1072		goto error_fmb;
1073
1074	zpci_iomap_start = kcalloc(ZPCI_IOMAP_ENTRIES,
1075				   sizeof(*zpci_iomap_start), GFP_KERNEL);
1076	if (!zpci_iomap_start)
1077		goto error_iomap;
1078
1079	zpci_iomap_bitmap = kcalloc(BITS_TO_LONGS(ZPCI_IOMAP_ENTRIES),
1080				    sizeof(*zpci_iomap_bitmap), GFP_KERNEL);
1081	if (!zpci_iomap_bitmap)
1082		goto error_iomap_bitmap;
1083
1084	if (static_branch_likely(&have_mio))
1085		clp_setup_writeback_mio();
1086
1087	return 0;
1088error_iomap_bitmap:
1089	kfree(zpci_iomap_start);
1090error_iomap:
1091	kmem_cache_destroy(zdev_fmb_cache);
1092error_fmb:
1093	return -ENOMEM;
1094}
1095
1096static void zpci_mem_exit(void)
1097{
1098	kfree(zpci_iomap_bitmap);
1099	kfree(zpci_iomap_start);
1100	kmem_cache_destroy(zdev_fmb_cache);
1101}
1102
1103static unsigned int s390_pci_probe __initdata = 1;
1104unsigned int s390_pci_force_floating __initdata;
1105static unsigned int s390_pci_initialized;
1106
1107char * __init pcibios_setup(char *str)
1108{
1109	if (!strcmp(str, "off")) {
1110		s390_pci_probe = 0;
1111		return NULL;
1112	}
1113	if (!strcmp(str, "nomio")) {
1114		S390_lowcore.machine_flags &= ~MACHINE_FLAG_PCI_MIO;
1115		return NULL;
1116	}
1117	if (!strcmp(str, "force_floating")) {
1118		s390_pci_force_floating = 1;
1119		return NULL;
1120	}
1121	if (!strcmp(str, "norid")) {
1122		s390_pci_no_rid = 1;
1123		return NULL;
1124	}
1125	return str;
1126}
1127
1128bool zpci_is_enabled(void)
1129{
1130	return s390_pci_initialized;
1131}
1132
1133static int __init pci_base_init(void)
1134{
1135	int rc;
1136
1137	if (!s390_pci_probe)
1138		return 0;
1139
1140	if (!test_facility(69) || !test_facility(71)) {
1141		pr_info("PCI is not supported because CPU facilities 69 or 71 are not available\n");
1142		return 0;
1143	}
1144
1145	if (MACHINE_HAS_PCI_MIO) {
1146		static_branch_enable(&have_mio);
1147		ctl_set_bit(2, 5);
1148	}
1149
1150	rc = zpci_debug_init();
1151	if (rc)
1152		goto out;
1153
1154	rc = zpci_mem_init();
1155	if (rc)
1156		goto out_mem;
1157
1158	rc = zpci_irq_init();
1159	if (rc)
1160		goto out_irq;
1161
1162	rc = zpci_dma_init();
1163	if (rc)
1164		goto out_dma;
1165
1166	rc = clp_scan_pci_devices();
1167	if (rc)
1168		goto out_find;
1169	zpci_bus_scan_busses();
1170
1171	s390_pci_initialized = 1;
1172	return 0;
1173
1174out_find:
1175	zpci_dma_exit();
1176out_dma:
1177	zpci_irq_exit();
1178out_irq:
1179	zpci_mem_exit();
1180out_mem:
1181	zpci_debug_exit();
1182out:
1183	return rc;
1184}
1185subsys_initcall_sync(pci_base_init);
v4.6
 
  1/*
  2 * Copyright IBM Corp. 2012
  3 *
  4 * Author(s):
  5 *   Jan Glauber <jang@linux.vnet.ibm.com>
  6 *
  7 * The System z PCI code is a rewrite from a prototype by
  8 * the following people (Kudoz!):
  9 *   Alexander Schmidt
 10 *   Christoph Raisch
 11 *   Hannes Hering
 12 *   Hoang-Nam Nguyen
 13 *   Jan-Bernd Themann
 14 *   Stefan Roscher
 15 *   Thomas Klein
 16 */
 17
 18#define KMSG_COMPONENT "zpci"
 19#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
 20
 21#include <linux/kernel.h>
 22#include <linux/slab.h>
 23#include <linux/err.h>
 24#include <linux/export.h>
 25#include <linux/delay.h>
 26#include <linux/irq.h>
 27#include <linux/kernel_stat.h>
 28#include <linux/seq_file.h>
 
 29#include <linux/pci.h>
 30#include <linux/msi.h>
 31
 32#include <asm/isc.h>
 33#include <asm/airq.h>
 34#include <asm/facility.h>
 35#include <asm/pci_insn.h>
 36#include <asm/pci_clp.h>
 37#include <asm/pci_dma.h>
 38
 39#define DEBUG				/* enable pr_debug */
 40
 41#define	SIC_IRQ_MODE_ALL		0
 42#define	SIC_IRQ_MODE_SINGLE		1
 43
 44#define ZPCI_NR_DMA_SPACES		1
 45#define ZPCI_NR_DEVICES			CONFIG_PCI_NR_FUNCTIONS
 46
 47/* list of all detected zpci devices */
 48static LIST_HEAD(zpci_list);
 49static DEFINE_SPINLOCK(zpci_list_lock);
 50
 51static struct irq_chip zpci_irq_chip = {
 52	.name = "zPCI",
 53	.irq_unmask = pci_msi_unmask_irq,
 54	.irq_mask = pci_msi_mask_irq,
 55};
 56
 57static DECLARE_BITMAP(zpci_domain, ZPCI_NR_DEVICES);
 58static DEFINE_SPINLOCK(zpci_domain_lock);
 59
 60static struct airq_iv *zpci_aisb_iv;
 61static struct airq_iv *zpci_aibv[ZPCI_NR_DEVICES];
 62
 63/* Adapter interrupt definitions */
 64static void zpci_irq_handler(struct airq_struct *airq);
 65
 66static struct airq_struct zpci_airq = {
 67	.handler = zpci_irq_handler,
 68	.isc = PCI_ISC,
 69};
 70
 71#define ZPCI_IOMAP_ENTRIES						\
 72	min(((unsigned long) CONFIG_PCI_NR_FUNCTIONS * PCI_BAR_COUNT),	\
 73	    ZPCI_IOMAP_MAX_ENTRIES)
 74
 
 
 75static DEFINE_SPINLOCK(zpci_iomap_lock);
 76static unsigned long *zpci_iomap_bitmap;
 77struct zpci_iomap_entry *zpci_iomap_start;
 78EXPORT_SYMBOL_GPL(zpci_iomap_start);
 79
 
 
 80static struct kmem_cache *zdev_fmb_cache;
 81
 
 
 
 
 
 
 82struct zpci_dev *get_zdev_by_fid(u32 fid)
 83{
 84	struct zpci_dev *tmp, *zdev = NULL;
 85
 86	spin_lock(&zpci_list_lock);
 87	list_for_each_entry(tmp, &zpci_list, entry) {
 88		if (tmp->fid == fid) {
 89			zdev = tmp;
 
 90			break;
 91		}
 92	}
 93	spin_unlock(&zpci_list_lock);
 94	return zdev;
 95}
 96
 97static struct zpci_dev *get_zdev_by_bus(struct pci_bus *bus)
 98{
 99	return (bus && bus->sysdata) ? (struct zpci_dev *) bus->sysdata : NULL;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
100}
101
102int pci_domain_nr(struct pci_bus *bus)
103{
104	return ((struct zpci_dev *) bus->sysdata)->domain;
105}
106EXPORT_SYMBOL_GPL(pci_domain_nr);
107
108int pci_proc_domain(struct pci_bus *bus)
109{
110	return pci_domain_nr(bus);
111}
112EXPORT_SYMBOL_GPL(pci_proc_domain);
113
114/* Modify PCI: Register adapter interruptions */
115static int zpci_set_airq(struct zpci_dev *zdev)
116{
117	u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_REG_INT);
118	struct zpci_fib fib = {0};
119
120	fib.isc = PCI_ISC;
121	fib.sum = 1;		/* enable summary notifications */
122	fib.noi = airq_iv_end(zdev->aibv);
123	fib.aibv = (unsigned long) zdev->aibv->vector;
124	fib.aibvo = 0;		/* each zdev has its own interrupt vector */
125	fib.aisb = (unsigned long) zpci_aisb_iv->vector + (zdev->aisb/64)*8;
126	fib.aisbo = zdev->aisb & 63;
127
128	return zpci_mod_fc(req, &fib);
129}
130
131struct mod_pci_args {
132	u64 base;
133	u64 limit;
134	u64 iota;
135	u64 fmb_addr;
136};
137
138static int mod_pci(struct zpci_dev *zdev, int fn, u8 dmaas, struct mod_pci_args *args)
139{
140	u64 req = ZPCI_CREATE_REQ(zdev->fh, dmaas, fn);
141	struct zpci_fib fib = {0};
142
143	fib.pba = args->base;
144	fib.pal = args->limit;
145	fib.iota = args->iota;
146	fib.fmb_addr = args->fmb_addr;
147
148	return zpci_mod_fc(req, &fib);
149}
150
151/* Modify PCI: Register I/O address translation parameters */
152int zpci_register_ioat(struct zpci_dev *zdev, u8 dmaas,
153		       u64 base, u64 limit, u64 iota)
154{
155	struct mod_pci_args args = { base, limit, iota, 0 };
 
 
156
157	WARN_ON_ONCE(iota & 0x3fff);
158	args.iota |= ZPCI_IOTA_RTTO_FLAG;
159	return mod_pci(zdev, ZPCI_MOD_FC_REG_IOAT, dmaas, &args);
 
 
 
 
 
 
160}
 
161
162/* Modify PCI: Unregister I/O address translation parameters */
163int zpci_unregister_ioat(struct zpci_dev *zdev, u8 dmaas)
164{
165	struct mod_pci_args args = { 0, 0, 0, 0 };
 
 
166
167	return mod_pci(zdev, ZPCI_MOD_FC_DEREG_IOAT, dmaas, &args);
168}
169
170/* Modify PCI: Unregister adapter interruptions */
171static int zpci_clear_airq(struct zpci_dev *zdev)
172{
173	struct mod_pci_args args = { 0, 0, 0, 0 };
174
175	return mod_pci(zdev, ZPCI_MOD_FC_DEREG_INT, 0, &args);
 
 
 
176}
177
178/* Modify PCI: Set PCI function measurement parameters */
179int zpci_fmb_enable_device(struct zpci_dev *zdev)
180{
181	struct mod_pci_args args = { 0, 0, 0, 0 };
 
 
182
183	if (zdev->fmb)
184		return -EINVAL;
185
186	zdev->fmb = kmem_cache_zalloc(zdev_fmb_cache, GFP_KERNEL);
187	if (!zdev->fmb)
188		return -ENOMEM;
189	WARN_ON((u64) zdev->fmb & 0xf);
190
191	/* reset software counters */
192	atomic64_set(&zdev->allocated_pages, 0);
193	atomic64_set(&zdev->mapped_pages, 0);
194	atomic64_set(&zdev->unmapped_pages, 0);
195
196	args.fmb_addr = virt_to_phys(zdev->fmb);
197	return mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args);
 
 
 
 
 
 
198}
199
200/* Modify PCI: Disable PCI function measurement */
201int zpci_fmb_disable_device(struct zpci_dev *zdev)
202{
203	struct mod_pci_args args = { 0, 0, 0, 0 };
204	int rc;
 
205
206	if (!zdev->fmb)
207		return -EINVAL;
208
 
 
209	/* Function measurement is disabled if fmb address is zero */
210	rc = mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args);
211
212	kmem_cache_free(zdev_fmb_cache, zdev->fmb);
213	zdev->fmb = NULL;
214	return rc;
 
 
 
 
215}
216
217#define ZPCI_PCIAS_CFGSPC	15
218
219static int zpci_cfg_load(struct zpci_dev *zdev, int offset, u32 *val, u8 len)
220{
221	u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
222	u64 data;
223	int rc;
224
225	rc = zpci_load(&data, req, offset);
226	if (!rc) {
227		data = data << ((8 - len) * 8);
228		data = le64_to_cpu(data);
229		*val = (u32) data;
230	} else
231		*val = 0xffffffff;
232	return rc;
233}
234
235static int zpci_cfg_store(struct zpci_dev *zdev, int offset, u32 val, u8 len)
236{
237	u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
238	u64 data = val;
239	int rc;
240
241	data = cpu_to_le64(data);
242	data = data >> ((8 - len) * 8);
243	rc = zpci_store(data, req, offset);
244	return rc;
245}
246
247void pcibios_fixup_bus(struct pci_bus *bus)
248{
249}
250
251resource_size_t pcibios_align_resource(void *data, const struct resource *res,
252				       resource_size_t size,
253				       resource_size_t align)
254{
255	return 0;
256}
257
258/* combine single writes by using store-block insn */
259void __iowrite64_copy(void __iomem *to, const void *from, size_t count)
260{
261       zpci_memcpy_toio(to, from, count);
262}
263
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
264/* Create a virtual mapping cookie for a PCI BAR */
265void __iomem *pci_iomap_range(struct pci_dev *pdev,
266			      int bar,
267			      unsigned long offset,
268			      unsigned long max)
269{
270	struct zpci_dev *zdev =	to_zpci(pdev);
271	int idx;
272
273	if (!pci_resource_len(pdev, bar))
274		return NULL;
275
276	idx = zdev->bars[bar].map_idx;
277	spin_lock(&zpci_iomap_lock);
278	/* Detect overrun */
279	WARN_ON(!++zpci_iomap_start[idx].count);
280	zpci_iomap_start[idx].fh = zdev->fh;
281	zpci_iomap_start[idx].bar = bar;
282	spin_unlock(&zpci_iomap_lock);
283
284	return (void __iomem *) ZPCI_ADDR(idx) + offset;
285}
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
286EXPORT_SYMBOL(pci_iomap_range);
287
288void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
289{
290	return pci_iomap_range(dev, bar, 0, maxlen);
291}
292EXPORT_SYMBOL(pci_iomap);
293
294void pci_iounmap(struct pci_dev *pdev, void __iomem *addr)
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
295{
296	unsigned int idx = ZPCI_IDX(addr);
297
298	spin_lock(&zpci_iomap_lock);
299	/* Detect underrun */
300	WARN_ON(!zpci_iomap_start[idx].count);
301	if (!--zpci_iomap_start[idx].count) {
302		zpci_iomap_start[idx].fh = 0;
303		zpci_iomap_start[idx].bar = 0;
304	}
305	spin_unlock(&zpci_iomap_lock);
306}
 
 
 
 
 
 
 
 
 
 
 
 
 
307EXPORT_SYMBOL(pci_iounmap);
308
309static int pci_read(struct pci_bus *bus, unsigned int devfn, int where,
310		    int size, u32 *val)
311{
312	struct zpci_dev *zdev = get_zdev_by_bus(bus);
313	int ret;
314
315	if (!zdev || devfn != ZPCI_DEVFN)
316		ret = -ENODEV;
317	else
318		ret = zpci_cfg_load(zdev, where, val, size);
319
320	return ret;
321}
322
323static int pci_write(struct pci_bus *bus, unsigned int devfn, int where,
324		     int size, u32 val)
325{
326	struct zpci_dev *zdev = get_zdev_by_bus(bus);
327	int ret;
328
329	if (!zdev || devfn != ZPCI_DEVFN)
330		ret = -ENODEV;
331	else
332		ret = zpci_cfg_store(zdev, where, val, size);
333
334	return ret;
335}
336
337static struct pci_ops pci_root_ops = {
338	.read = pci_read,
339	.write = pci_write,
340};
341
342static void zpci_irq_handler(struct airq_struct *airq)
343{
344	unsigned long si, ai;
345	struct airq_iv *aibv;
346	int irqs_on = 0;
347
348	inc_irq_stat(IRQIO_PCI);
349	for (si = 0;;) {
350		/* Scan adapter summary indicator bit vector */
351		si = airq_iv_scan(zpci_aisb_iv, si, airq_iv_end(zpci_aisb_iv));
352		if (si == -1UL) {
353			if (irqs_on++)
354				/* End of second scan with interrupts on. */
355				break;
356			/* First scan complete, reenable interrupts. */
357			zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC);
358			si = 0;
359			continue;
360		}
361
362		/* Scan the adapter interrupt vector for this device. */
363		aibv = zpci_aibv[si];
364		for (ai = 0;;) {
365			ai = airq_iv_scan(aibv, ai, airq_iv_end(aibv));
366			if (ai == -1UL)
367				break;
368			inc_irq_stat(IRQIO_MSI);
369			airq_iv_lock(aibv, ai);
370			generic_handle_irq(airq_iv_get_data(aibv, ai));
371			airq_iv_unlock(aibv, ai);
372		}
373	}
374}
375
376int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
377{
378	struct zpci_dev *zdev = to_zpci(pdev);
379	unsigned int hwirq, msi_vecs;
380	unsigned long aisb;
381	struct msi_desc *msi;
382	struct msi_msg msg;
383	int rc, irq;
384
385	if (type == PCI_CAP_ID_MSI && nvec > 1)
386		return 1;
387	msi_vecs = min_t(unsigned int, nvec, zdev->max_msi);
388
389	/* Allocate adapter summary indicator bit */
390	rc = -EIO;
391	aisb = airq_iv_alloc_bit(zpci_aisb_iv);
392	if (aisb == -1UL)
393		goto out;
394	zdev->aisb = aisb;
395
396	/* Create adapter interrupt vector */
397	rc = -ENOMEM;
398	zdev->aibv = airq_iv_create(msi_vecs, AIRQ_IV_DATA | AIRQ_IV_BITLOCK);
399	if (!zdev->aibv)
400		goto out_si;
401
402	/* Wire up shortcut pointer */
403	zpci_aibv[aisb] = zdev->aibv;
404
405	/* Request MSI interrupts */
406	hwirq = 0;
407	for_each_pci_msi_entry(msi, pdev) {
408		rc = -EIO;
409		irq = irq_alloc_desc(0);	/* Alloc irq on node 0 */
410		if (irq < 0)
411			goto out_msi;
412		rc = irq_set_msi_desc(irq, msi);
413		if (rc)
414			goto out_msi;
415		irq_set_chip_and_handler(irq, &zpci_irq_chip,
416					 handle_simple_irq);
417		msg.data = hwirq;
418		msg.address_lo = zdev->msi_addr & 0xffffffff;
419		msg.address_hi = zdev->msi_addr >> 32;
420		pci_write_msi_msg(irq, &msg);
421		airq_iv_set_data(zdev->aibv, hwirq, irq);
422		hwirq++;
423	}
424
425	/* Enable adapter interrupts */
426	rc = zpci_set_airq(zdev);
427	if (rc)
428		goto out_msi;
429
430	return (msi_vecs == nvec) ? 0 : msi_vecs;
431
432out_msi:
433	for_each_pci_msi_entry(msi, pdev) {
434		if (hwirq-- == 0)
435			break;
436		irq_set_msi_desc(msi->irq, NULL);
437		irq_free_desc(msi->irq);
438		msi->msg.address_lo = 0;
439		msi->msg.address_hi = 0;
440		msi->msg.data = 0;
441		msi->irq = 0;
442	}
443	zpci_aibv[aisb] = NULL;
444	airq_iv_release(zdev->aibv);
445out_si:
446	airq_iv_free_bit(zpci_aisb_iv, aisb);
447out:
448	return rc;
449}
450
451void arch_teardown_msi_irqs(struct pci_dev *pdev)
452{
453	struct zpci_dev *zdev = to_zpci(pdev);
454	struct msi_desc *msi;
455	int rc;
456
457	/* Disable adapter interrupts */
458	rc = zpci_clear_airq(zdev);
459	if (rc)
460		return;
461
462	/* Release MSI interrupts */
463	for_each_pci_msi_entry(msi, pdev) {
464		if (msi->msi_attrib.is_msix)
465			__pci_msix_desc_mask_irq(msi, 1);
466		else
467			__pci_msi_desc_mask_irq(msi, 1, 1);
468		irq_set_msi_desc(msi->irq, NULL);
469		irq_free_desc(msi->irq);
470		msi->msg.address_lo = 0;
471		msi->msg.address_hi = 0;
472		msi->msg.data = 0;
473		msi->irq = 0;
474	}
475
476	zpci_aibv[zdev->aisb] = NULL;
477	airq_iv_release(zdev->aibv);
478	airq_iv_free_bit(zpci_aisb_iv, zdev->aisb);
479}
480
481static void zpci_map_resources(struct pci_dev *pdev)
482{
483	resource_size_t len;
484	int i;
485
486	for (i = 0; i < PCI_BAR_COUNT; i++) {
487		len = pci_resource_len(pdev, i);
488		if (!len)
489			continue;
490		pdev->resource[i].start =
491			(resource_size_t __force) pci_iomap(pdev, i, 0);
 
 
 
 
 
492		pdev->resource[i].end = pdev->resource[i].start + len - 1;
493	}
 
 
494}
495
496static void zpci_unmap_resources(struct pci_dev *pdev)
497{
 
498	resource_size_t len;
499	int i;
500
501	for (i = 0; i < PCI_BAR_COUNT; i++) {
 
 
 
502		len = pci_resource_len(pdev, i);
503		if (!len)
504			continue;
505		pci_iounmap(pdev, (void __iomem __force *)
506			    pdev->resource[i].start);
507	}
508}
509
510static int __init zpci_irq_init(void)
511{
512	int rc;
513
514	rc = register_adapter_interrupt(&zpci_airq);
515	if (rc)
516		goto out;
517	/* Set summary to 1 to be called every time for the ISC. */
518	*zpci_airq.lsi_ptr = 1;
519
520	rc = -ENOMEM;
521	zpci_aisb_iv = airq_iv_create(ZPCI_NR_DEVICES, AIRQ_IV_ALLOC);
522	if (!zpci_aisb_iv)
523		goto out_airq;
524
525	zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC);
526	return 0;
527
528out_airq:
529	unregister_adapter_interrupt(&zpci_airq);
530out:
531	return rc;
532}
533
534static void zpci_irq_exit(void)
535{
536	airq_iv_release(zpci_aisb_iv);
537	unregister_adapter_interrupt(&zpci_airq);
538}
539
540static int zpci_alloc_iomap(struct zpci_dev *zdev)
541{
542	unsigned long entry;
543
544	spin_lock(&zpci_iomap_lock);
545	entry = find_first_zero_bit(zpci_iomap_bitmap, ZPCI_IOMAP_ENTRIES);
546	if (entry == ZPCI_IOMAP_ENTRIES) {
547		spin_unlock(&zpci_iomap_lock);
548		return -ENOSPC;
549	}
550	set_bit(entry, zpci_iomap_bitmap);
551	spin_unlock(&zpci_iomap_lock);
552	return entry;
553}
554
555static void zpci_free_iomap(struct zpci_dev *zdev, int entry)
556{
557	spin_lock(&zpci_iomap_lock);
558	memset(&zpci_iomap_start[entry], 0, sizeof(struct zpci_iomap_entry));
559	clear_bit(entry, zpci_iomap_bitmap);
560	spin_unlock(&zpci_iomap_lock);
561}
562
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
563static struct resource *__alloc_res(struct zpci_dev *zdev, unsigned long start,
564				    unsigned long size, unsigned long flags)
565{
566	struct resource *r;
567
568	r = kzalloc(sizeof(*r), GFP_KERNEL);
569	if (!r)
570		return NULL;
571
572	r->start = start;
573	r->end = r->start + size - 1;
574	r->flags = flags;
575	r->name = zdev->res_name;
576
577	if (request_resource(&iomem_resource, r)) {
578		kfree(r);
579		return NULL;
580	}
581	return r;
582}
583
584static int zpci_setup_bus_resources(struct zpci_dev *zdev,
585				    struct list_head *resources)
586{
587	unsigned long addr, size, flags;
588	struct resource *res;
589	int i, entry;
590
591	snprintf(zdev->res_name, sizeof(zdev->res_name),
592		 "PCI Bus %04x:%02x", zdev->domain, ZPCI_BUS_NR);
593
594	for (i = 0; i < PCI_BAR_COUNT; i++) {
595		if (!zdev->bars[i].size)
596			continue;
597		entry = zpci_alloc_iomap(zdev);
598		if (entry < 0)
599			return entry;
600		zdev->bars[i].map_idx = entry;
601
602		/* only MMIO is supported */
603		flags = IORESOURCE_MEM;
604		if (zdev->bars[i].val & 8)
605			flags |= IORESOURCE_PREFETCH;
606		if (zdev->bars[i].val & 4)
607			flags |= IORESOURCE_MEM_64;
608
609		addr = ZPCI_ADDR(entry);
 
 
 
610		size = 1UL << zdev->bars[i].size;
611
612		res = __alloc_res(zdev, addr, size, flags);
613		if (!res) {
614			zpci_free_iomap(zdev, entry);
615			return -ENOMEM;
616		}
617		zdev->bars[i].res = res;
618		pci_add_resource(resources, res);
619	}
 
620
621	return 0;
622}
623
624static void zpci_cleanup_bus_resources(struct zpci_dev *zdev)
625{
626	int i;
627
628	for (i = 0; i < PCI_BAR_COUNT; i++) {
629		if (!zdev->bars[i].size || !zdev->bars[i].res)
630			continue;
631
632		zpci_free_iomap(zdev, zdev->bars[i].map_idx);
633		release_resource(zdev->bars[i].res);
634		kfree(zdev->bars[i].res);
635	}
 
636}
637
638int pcibios_add_device(struct pci_dev *pdev)
639{
 
640	struct resource *res;
641	int i;
642
 
 
 
 
 
643	pdev->dev.groups = zpci_attr_groups;
644	pdev->dev.archdata.dma_ops = &s390_pci_dma_ops;
645	zpci_map_resources(pdev);
646
647	for (i = 0; i < PCI_BAR_COUNT; i++) {
648		res = &pdev->resource[i];
649		if (res->parent || !res->flags)
650			continue;
651		pci_claim_resource(pdev, i);
652	}
653
654	return 0;
655}
656
657void pcibios_release_device(struct pci_dev *pdev)
658{
 
 
659	zpci_unmap_resources(pdev);
 
660}
661
662int pcibios_enable_device(struct pci_dev *pdev, int mask)
663{
664	struct zpci_dev *zdev = to_zpci(pdev);
665
666	zpci_debug_init_device(zdev, dev_name(&pdev->dev));
667	zpci_fmb_enable_device(zdev);
668
669	return pci_enable_resources(pdev, mask);
670}
671
672void pcibios_disable_device(struct pci_dev *pdev)
673{
674	struct zpci_dev *zdev = to_zpci(pdev);
675
676	zpci_fmb_disable_device(zdev);
677	zpci_debug_exit_device(zdev);
678}
679
680#ifdef CONFIG_HIBERNATE_CALLBACKS
681static int zpci_restore(struct device *dev)
682{
683	struct pci_dev *pdev = to_pci_dev(dev);
684	struct zpci_dev *zdev = to_zpci(pdev);
685	int ret = 0;
686
687	if (zdev->state != ZPCI_FN_STATE_ONLINE)
688		goto out;
689
690	ret = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES);
691	if (ret)
692		goto out;
693
694	zpci_map_resources(pdev);
695	zpci_register_ioat(zdev, 0, zdev->start_dma, zdev->end_dma,
696			   (u64) zdev->dma_table);
697
698out:
699	return ret;
700}
701
702static int zpci_freeze(struct device *dev)
703{
704	struct pci_dev *pdev = to_pci_dev(dev);
705	struct zpci_dev *zdev = to_zpci(pdev);
706
707	if (zdev->state != ZPCI_FN_STATE_ONLINE)
708		return 0;
709
710	zpci_unregister_ioat(zdev, 0);
711	zpci_unmap_resources(pdev);
712	return clp_disable_fh(zdev);
 
 
 
 
713}
714
715struct dev_pm_ops pcibios_pm_ops = {
716	.thaw_noirq = zpci_restore,
717	.freeze_noirq = zpci_freeze,
718	.restore_noirq = zpci_restore,
719	.poweroff_noirq = zpci_freeze,
720};
721#endif /* CONFIG_HIBERNATE_CALLBACKS */
722
723static int zpci_alloc_domain(struct zpci_dev *zdev)
724{
725	spin_lock(&zpci_domain_lock);
726	zdev->domain = find_first_zero_bit(zpci_domain, ZPCI_NR_DEVICES);
727	if (zdev->domain == ZPCI_NR_DEVICES) {
728		spin_unlock(&zpci_domain_lock);
729		return -ENOSPC;
730	}
731	set_bit(zdev->domain, zpci_domain);
732	spin_unlock(&zpci_domain_lock);
733	return 0;
734}
735
736static void zpci_free_domain(struct zpci_dev *zdev)
737{
738	spin_lock(&zpci_domain_lock);
739	clear_bit(zdev->domain, zpci_domain);
740	spin_unlock(&zpci_domain_lock);
741}
742
743void pcibios_remove_bus(struct pci_bus *bus)
 
744{
745	struct zpci_dev *zdev = get_zdev_by_bus(bus);
 
746
747	zpci_exit_slot(zdev);
748	zpci_cleanup_bus_resources(zdev);
749	zpci_free_domain(zdev);
 
 
 
 
750
751	spin_lock(&zpci_list_lock);
752	list_del(&zdev->entry);
753	spin_unlock(&zpci_list_lock);
 
754
755	kfree(zdev);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
756}
 
757
758static int zpci_scan_bus(struct zpci_dev *zdev)
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
759{
760	LIST_HEAD(resources);
761	int ret;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
762
763	ret = zpci_setup_bus_resources(zdev, &resources);
764	if (ret)
765		goto error;
766
767	zdev->bus = pci_scan_root_bus(NULL, ZPCI_BUS_NR, &pci_root_ops,
768				      zdev, &resources);
769	if (!zdev->bus) {
770		ret = -EIO;
771		goto error;
 
 
 
772	}
773	zdev->bus->max_bus_speed = zdev->max_bus_speed;
774	pci_bus_add_devices(zdev->bus);
775	return 0;
776
777error:
778	zpci_cleanup_bus_resources(zdev);
779	pci_free_resource_list(&resources);
780	return ret;
781}
782
783int zpci_enable_device(struct zpci_dev *zdev)
 
 
 
 
 
 
 
 
 
 
 
784{
 
785	int rc;
786
787	rc = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
788	if (rc)
789		goto out;
790
791	rc = zpci_dma_init_device(zdev);
792	if (rc)
793		goto out_dma;
 
 
 
 
794
795	zdev->state = ZPCI_FN_STATE_ONLINE;
796	return 0;
797
798out_dma:
799	clp_disable_fh(zdev);
800out:
801	return rc;
 
 
802}
803EXPORT_SYMBOL_GPL(zpci_enable_device);
804
805int zpci_disable_device(struct zpci_dev *zdev)
806{
807	zpci_dma_exit_device(zdev);
808	return clp_disable_fh(zdev);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
809}
810EXPORT_SYMBOL_GPL(zpci_disable_device);
811
812int zpci_create_device(struct zpci_dev *zdev)
 
 
 
 
 
 
 
 
 
 
813{
814	int rc;
815
816	rc = zpci_alloc_domain(zdev);
817	if (rc)
818		goto out;
819
820	mutex_init(&zdev->lock);
821	if (zdev->state == ZPCI_FN_STATE_CONFIGURED) {
822		rc = zpci_enable_device(zdev);
 
 
 
 
823		if (rc)
824			goto out_free;
825	}
826	rc = zpci_scan_bus(zdev);
 
 
827	if (rc)
828		goto out_disable;
 
 
 
 
829
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
830	spin_lock(&zpci_list_lock);
831	list_add_tail(&zdev->entry, &zpci_list);
832	spin_unlock(&zpci_list_lock);
 
 
 
 
833
834	zpci_init_slot(zdev);
 
 
 
835
836	return 0;
 
837
838out_disable:
839	if (zdev->state == ZPCI_FN_STATE_ONLINE)
 
840		zpci_disable_device(zdev);
841out_free:
842	zpci_free_domain(zdev);
843out:
844	return rc;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
845}
 
846
847void zpci_stop_device(struct zpci_dev *zdev)
 
 
 
 
 
 
 
 
 
 
848{
849	zpci_dma_exit_device(zdev);
850	/*
851	 * Note: SCLP disables fh via set-pci-fn so don't
852	 * do that here.
853	 */
 
 
 
 
 
 
 
854}
855EXPORT_SYMBOL_GPL(zpci_stop_device);
856
857static inline int barsize(u8 size)
 
 
 
 
 
 
 
 
 
 
 
858{
859	return (size) ? (1 << size) >> 10 : 0;
 
 
 
 
 
 
 
 
 
 
 
860}
861
862static int zpci_mem_init(void)
863{
864	BUILD_BUG_ON(!is_power_of_2(__alignof__(struct zpci_fmb)) ||
865		     __alignof__(struct zpci_fmb) < sizeof(struct zpci_fmb));
866
867	zdev_fmb_cache = kmem_cache_create("PCI_FMB_cache", sizeof(struct zpci_fmb),
868					   __alignof__(struct zpci_fmb), 0, NULL);
869	if (!zdev_fmb_cache)
870		goto error_fmb;
871
872	zpci_iomap_start = kcalloc(ZPCI_IOMAP_ENTRIES,
873				   sizeof(*zpci_iomap_start), GFP_KERNEL);
874	if (!zpci_iomap_start)
875		goto error_iomap;
876
877	zpci_iomap_bitmap = kcalloc(BITS_TO_LONGS(ZPCI_IOMAP_ENTRIES),
878				    sizeof(*zpci_iomap_bitmap), GFP_KERNEL);
879	if (!zpci_iomap_bitmap)
880		goto error_iomap_bitmap;
881
 
 
 
882	return 0;
883error_iomap_bitmap:
884	kfree(zpci_iomap_start);
885error_iomap:
886	kmem_cache_destroy(zdev_fmb_cache);
887error_fmb:
888	return -ENOMEM;
889}
890
891static void zpci_mem_exit(void)
892{
893	kfree(zpci_iomap_bitmap);
894	kfree(zpci_iomap_start);
895	kmem_cache_destroy(zdev_fmb_cache);
896}
897
898static unsigned int s390_pci_probe = 1;
 
899static unsigned int s390_pci_initialized;
900
901char * __init pcibios_setup(char *str)
902{
903	if (!strcmp(str, "off")) {
904		s390_pci_probe = 0;
905		return NULL;
906	}
 
 
 
 
 
 
 
 
 
 
 
 
907	return str;
908}
909
910bool zpci_is_enabled(void)
911{
912	return s390_pci_initialized;
913}
914
915static int __init pci_base_init(void)
916{
917	int rc;
918
919	if (!s390_pci_probe)
920		return 0;
921
922	if (!test_facility(69) || !test_facility(71) || !test_facility(72))
 
923		return 0;
 
 
 
 
 
 
924
925	rc = zpci_debug_init();
926	if (rc)
927		goto out;
928
929	rc = zpci_mem_init();
930	if (rc)
931		goto out_mem;
932
933	rc = zpci_irq_init();
934	if (rc)
935		goto out_irq;
936
937	rc = zpci_dma_init();
938	if (rc)
939		goto out_dma;
940
941	rc = clp_scan_pci_devices();
942	if (rc)
943		goto out_find;
 
944
945	s390_pci_initialized = 1;
946	return 0;
947
948out_find:
949	zpci_dma_exit();
950out_dma:
951	zpci_irq_exit();
952out_irq:
953	zpci_mem_exit();
954out_mem:
955	zpci_debug_exit();
956out:
957	return rc;
958}
959subsys_initcall_sync(pci_base_init);
960
961void zpci_rescan(void)
962{
963	if (zpci_is_enabled())
964		clp_rescan_pci_devices_simple();
965}