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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright IBM Corp. 2012
4 *
5 * Author(s):
6 * Jan Glauber <jang@linux.vnet.ibm.com>
7 *
8 * The System z PCI code is a rewrite from a prototype by
9 * the following people (Kudoz!):
10 * Alexander Schmidt
11 * Christoph Raisch
12 * Hannes Hering
13 * Hoang-Nam Nguyen
14 * Jan-Bernd Themann
15 * Stefan Roscher
16 * Thomas Klein
17 */
18
19#define KMSG_COMPONENT "zpci"
20#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
21
22#include <linux/kernel.h>
23#include <linux/slab.h>
24#include <linux/err.h>
25#include <linux/export.h>
26#include <linux/delay.h>
27#include <linux/seq_file.h>
28#include <linux/jump_label.h>
29#include <linux/pci.h>
30#include <linux/printk.h>
31
32#include <asm/isc.h>
33#include <asm/airq.h>
34#include <asm/facility.h>
35#include <asm/pci_insn.h>
36#include <asm/pci_clp.h>
37#include <asm/pci_dma.h>
38
39#include "pci_bus.h"
40#include "pci_iov.h"
41
42/* list of all detected zpci devices */
43static LIST_HEAD(zpci_list);
44static DEFINE_SPINLOCK(zpci_list_lock);
45
46static DECLARE_BITMAP(zpci_domain, ZPCI_DOMAIN_BITMAP_SIZE);
47static DEFINE_SPINLOCK(zpci_domain_lock);
48
49#define ZPCI_IOMAP_ENTRIES \
50 min(((unsigned long) ZPCI_NR_DEVICES * PCI_STD_NUM_BARS / 2), \
51 ZPCI_IOMAP_MAX_ENTRIES)
52
53unsigned int s390_pci_no_rid;
54
55static DEFINE_SPINLOCK(zpci_iomap_lock);
56static unsigned long *zpci_iomap_bitmap;
57struct zpci_iomap_entry *zpci_iomap_start;
58EXPORT_SYMBOL_GPL(zpci_iomap_start);
59
60DEFINE_STATIC_KEY_FALSE(have_mio);
61
62static struct kmem_cache *zdev_fmb_cache;
63
64/* AEN structures that must be preserved over KVM module re-insertion */
65union zpci_sic_iib *zpci_aipb;
66EXPORT_SYMBOL_GPL(zpci_aipb);
67struct airq_iv *zpci_aif_sbv;
68EXPORT_SYMBOL_GPL(zpci_aif_sbv);
69
70struct zpci_dev *get_zdev_by_fid(u32 fid)
71{
72 struct zpci_dev *tmp, *zdev = NULL;
73
74 spin_lock(&zpci_list_lock);
75 list_for_each_entry(tmp, &zpci_list, entry) {
76 if (tmp->fid == fid) {
77 zdev = tmp;
78 zpci_zdev_get(zdev);
79 break;
80 }
81 }
82 spin_unlock(&zpci_list_lock);
83 return zdev;
84}
85
86void zpci_remove_reserved_devices(void)
87{
88 struct zpci_dev *tmp, *zdev;
89 enum zpci_state state;
90 LIST_HEAD(remove);
91
92 spin_lock(&zpci_list_lock);
93 list_for_each_entry_safe(zdev, tmp, &zpci_list, entry) {
94 if (zdev->state == ZPCI_FN_STATE_STANDBY &&
95 !clp_get_state(zdev->fid, &state) &&
96 state == ZPCI_FN_STATE_RESERVED)
97 list_move_tail(&zdev->entry, &remove);
98 }
99 spin_unlock(&zpci_list_lock);
100
101 list_for_each_entry_safe(zdev, tmp, &remove, entry)
102 zpci_device_reserved(zdev);
103}
104
105int pci_domain_nr(struct pci_bus *bus)
106{
107 return ((struct zpci_bus *) bus->sysdata)->domain_nr;
108}
109EXPORT_SYMBOL_GPL(pci_domain_nr);
110
111int pci_proc_domain(struct pci_bus *bus)
112{
113 return pci_domain_nr(bus);
114}
115EXPORT_SYMBOL_GPL(pci_proc_domain);
116
117/* Modify PCI: Register I/O address translation parameters */
118int zpci_register_ioat(struct zpci_dev *zdev, u8 dmaas,
119 u64 base, u64 limit, u64 iota, u8 *status)
120{
121 u64 req = ZPCI_CREATE_REQ(zdev->fh, dmaas, ZPCI_MOD_FC_REG_IOAT);
122 struct zpci_fib fib = {0};
123 u8 cc;
124
125 WARN_ON_ONCE(iota & 0x3fff);
126 fib.pba = base;
127 fib.pal = limit;
128 fib.iota = iota | ZPCI_IOTA_RTTO_FLAG;
129 fib.gd = zdev->gisa;
130 cc = zpci_mod_fc(req, &fib, status);
131 if (cc)
132 zpci_dbg(3, "reg ioat fid:%x, cc:%d, status:%d\n", zdev->fid, cc, *status);
133 return cc;
134}
135EXPORT_SYMBOL_GPL(zpci_register_ioat);
136
137/* Modify PCI: Unregister I/O address translation parameters */
138int zpci_unregister_ioat(struct zpci_dev *zdev, u8 dmaas)
139{
140 u64 req = ZPCI_CREATE_REQ(zdev->fh, dmaas, ZPCI_MOD_FC_DEREG_IOAT);
141 struct zpci_fib fib = {0};
142 u8 cc, status;
143
144 fib.gd = zdev->gisa;
145
146 cc = zpci_mod_fc(req, &fib, &status);
147 if (cc)
148 zpci_dbg(3, "unreg ioat fid:%x, cc:%d, status:%d\n", zdev->fid, cc, status);
149 return cc;
150}
151
152/* Modify PCI: Set PCI function measurement parameters */
153int zpci_fmb_enable_device(struct zpci_dev *zdev)
154{
155 u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_SET_MEASURE);
156 struct zpci_fib fib = {0};
157 u8 cc, status;
158
159 if (zdev->fmb || sizeof(*zdev->fmb) < zdev->fmb_length)
160 return -EINVAL;
161
162 zdev->fmb = kmem_cache_zalloc(zdev_fmb_cache, GFP_KERNEL);
163 if (!zdev->fmb)
164 return -ENOMEM;
165 WARN_ON((u64) zdev->fmb & 0xf);
166
167 /* reset software counters */
168 atomic64_set(&zdev->allocated_pages, 0);
169 atomic64_set(&zdev->mapped_pages, 0);
170 atomic64_set(&zdev->unmapped_pages, 0);
171
172 fib.fmb_addr = virt_to_phys(zdev->fmb);
173 fib.gd = zdev->gisa;
174 cc = zpci_mod_fc(req, &fib, &status);
175 if (cc) {
176 kmem_cache_free(zdev_fmb_cache, zdev->fmb);
177 zdev->fmb = NULL;
178 }
179 return cc ? -EIO : 0;
180}
181
182/* Modify PCI: Disable PCI function measurement */
183int zpci_fmb_disable_device(struct zpci_dev *zdev)
184{
185 u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_SET_MEASURE);
186 struct zpci_fib fib = {0};
187 u8 cc, status;
188
189 if (!zdev->fmb)
190 return -EINVAL;
191
192 fib.gd = zdev->gisa;
193
194 /* Function measurement is disabled if fmb address is zero */
195 cc = zpci_mod_fc(req, &fib, &status);
196 if (cc == 3) /* Function already gone. */
197 cc = 0;
198
199 if (!cc) {
200 kmem_cache_free(zdev_fmb_cache, zdev->fmb);
201 zdev->fmb = NULL;
202 }
203 return cc ? -EIO : 0;
204}
205
206static int zpci_cfg_load(struct zpci_dev *zdev, int offset, u32 *val, u8 len)
207{
208 u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
209 u64 data;
210 int rc;
211
212 rc = __zpci_load(&data, req, offset);
213 if (!rc) {
214 data = le64_to_cpu((__force __le64) data);
215 data >>= (8 - len) * 8;
216 *val = (u32) data;
217 } else
218 *val = 0xffffffff;
219 return rc;
220}
221
222static int zpci_cfg_store(struct zpci_dev *zdev, int offset, u32 val, u8 len)
223{
224 u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
225 u64 data = val;
226 int rc;
227
228 data <<= (8 - len) * 8;
229 data = (__force u64) cpu_to_le64(data);
230 rc = __zpci_store(data, req, offset);
231 return rc;
232}
233
234resource_size_t pcibios_align_resource(void *data, const struct resource *res,
235 resource_size_t size,
236 resource_size_t align)
237{
238 return 0;
239}
240
241/* combine single writes by using store-block insn */
242void __iowrite64_copy(void __iomem *to, const void *from, size_t count)
243{
244 zpci_memcpy_toio(to, from, count);
245}
246
247static void __iomem *__ioremap(phys_addr_t addr, size_t size, pgprot_t prot)
248{
249 unsigned long offset, vaddr;
250 struct vm_struct *area;
251 phys_addr_t last_addr;
252
253 last_addr = addr + size - 1;
254 if (!size || last_addr < addr)
255 return NULL;
256
257 if (!static_branch_unlikely(&have_mio))
258 return (void __iomem *) addr;
259
260 offset = addr & ~PAGE_MASK;
261 addr &= PAGE_MASK;
262 size = PAGE_ALIGN(size + offset);
263 area = get_vm_area(size, VM_IOREMAP);
264 if (!area)
265 return NULL;
266
267 vaddr = (unsigned long) area->addr;
268 if (ioremap_page_range(vaddr, vaddr + size, addr, prot)) {
269 free_vm_area(area);
270 return NULL;
271 }
272 return (void __iomem *) ((unsigned long) area->addr + offset);
273}
274
275void __iomem *ioremap_prot(phys_addr_t addr, size_t size, unsigned long prot)
276{
277 return __ioremap(addr, size, __pgprot(prot));
278}
279EXPORT_SYMBOL(ioremap_prot);
280
281void __iomem *ioremap(phys_addr_t addr, size_t size)
282{
283 return __ioremap(addr, size, PAGE_KERNEL);
284}
285EXPORT_SYMBOL(ioremap);
286
287void __iomem *ioremap_wc(phys_addr_t addr, size_t size)
288{
289 return __ioremap(addr, size, pgprot_writecombine(PAGE_KERNEL));
290}
291EXPORT_SYMBOL(ioremap_wc);
292
293void __iomem *ioremap_wt(phys_addr_t addr, size_t size)
294{
295 return __ioremap(addr, size, pgprot_writethrough(PAGE_KERNEL));
296}
297EXPORT_SYMBOL(ioremap_wt);
298
299void iounmap(volatile void __iomem *addr)
300{
301 if (static_branch_likely(&have_mio))
302 vunmap((__force void *) ((unsigned long) addr & PAGE_MASK));
303}
304EXPORT_SYMBOL(iounmap);
305
306/* Create a virtual mapping cookie for a PCI BAR */
307static void __iomem *pci_iomap_range_fh(struct pci_dev *pdev, int bar,
308 unsigned long offset, unsigned long max)
309{
310 struct zpci_dev *zdev = to_zpci(pdev);
311 int idx;
312
313 idx = zdev->bars[bar].map_idx;
314 spin_lock(&zpci_iomap_lock);
315 /* Detect overrun */
316 WARN_ON(!++zpci_iomap_start[idx].count);
317 zpci_iomap_start[idx].fh = zdev->fh;
318 zpci_iomap_start[idx].bar = bar;
319 spin_unlock(&zpci_iomap_lock);
320
321 return (void __iomem *) ZPCI_ADDR(idx) + offset;
322}
323
324static void __iomem *pci_iomap_range_mio(struct pci_dev *pdev, int bar,
325 unsigned long offset,
326 unsigned long max)
327{
328 unsigned long barsize = pci_resource_len(pdev, bar);
329 struct zpci_dev *zdev = to_zpci(pdev);
330 void __iomem *iova;
331
332 iova = ioremap((unsigned long) zdev->bars[bar].mio_wt, barsize);
333 return iova ? iova + offset : iova;
334}
335
336void __iomem *pci_iomap_range(struct pci_dev *pdev, int bar,
337 unsigned long offset, unsigned long max)
338{
339 if (bar >= PCI_STD_NUM_BARS || !pci_resource_len(pdev, bar))
340 return NULL;
341
342 if (static_branch_likely(&have_mio))
343 return pci_iomap_range_mio(pdev, bar, offset, max);
344 else
345 return pci_iomap_range_fh(pdev, bar, offset, max);
346}
347EXPORT_SYMBOL(pci_iomap_range);
348
349void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
350{
351 return pci_iomap_range(dev, bar, 0, maxlen);
352}
353EXPORT_SYMBOL(pci_iomap);
354
355static void __iomem *pci_iomap_wc_range_mio(struct pci_dev *pdev, int bar,
356 unsigned long offset, unsigned long max)
357{
358 unsigned long barsize = pci_resource_len(pdev, bar);
359 struct zpci_dev *zdev = to_zpci(pdev);
360 void __iomem *iova;
361
362 iova = ioremap((unsigned long) zdev->bars[bar].mio_wb, barsize);
363 return iova ? iova + offset : iova;
364}
365
366void __iomem *pci_iomap_wc_range(struct pci_dev *pdev, int bar,
367 unsigned long offset, unsigned long max)
368{
369 if (bar >= PCI_STD_NUM_BARS || !pci_resource_len(pdev, bar))
370 return NULL;
371
372 if (static_branch_likely(&have_mio))
373 return pci_iomap_wc_range_mio(pdev, bar, offset, max);
374 else
375 return pci_iomap_range_fh(pdev, bar, offset, max);
376}
377EXPORT_SYMBOL(pci_iomap_wc_range);
378
379void __iomem *pci_iomap_wc(struct pci_dev *dev, int bar, unsigned long maxlen)
380{
381 return pci_iomap_wc_range(dev, bar, 0, maxlen);
382}
383EXPORT_SYMBOL(pci_iomap_wc);
384
385static void pci_iounmap_fh(struct pci_dev *pdev, void __iomem *addr)
386{
387 unsigned int idx = ZPCI_IDX(addr);
388
389 spin_lock(&zpci_iomap_lock);
390 /* Detect underrun */
391 WARN_ON(!zpci_iomap_start[idx].count);
392 if (!--zpci_iomap_start[idx].count) {
393 zpci_iomap_start[idx].fh = 0;
394 zpci_iomap_start[idx].bar = 0;
395 }
396 spin_unlock(&zpci_iomap_lock);
397}
398
399static void pci_iounmap_mio(struct pci_dev *pdev, void __iomem *addr)
400{
401 iounmap(addr);
402}
403
404void pci_iounmap(struct pci_dev *pdev, void __iomem *addr)
405{
406 if (static_branch_likely(&have_mio))
407 pci_iounmap_mio(pdev, addr);
408 else
409 pci_iounmap_fh(pdev, addr);
410}
411EXPORT_SYMBOL(pci_iounmap);
412
413static int pci_read(struct pci_bus *bus, unsigned int devfn, int where,
414 int size, u32 *val)
415{
416 struct zpci_dev *zdev = zdev_from_bus(bus, devfn);
417
418 return (zdev) ? zpci_cfg_load(zdev, where, val, size) : -ENODEV;
419}
420
421static int pci_write(struct pci_bus *bus, unsigned int devfn, int where,
422 int size, u32 val)
423{
424 struct zpci_dev *zdev = zdev_from_bus(bus, devfn);
425
426 return (zdev) ? zpci_cfg_store(zdev, where, val, size) : -ENODEV;
427}
428
429static struct pci_ops pci_root_ops = {
430 .read = pci_read,
431 .write = pci_write,
432};
433
434static void zpci_map_resources(struct pci_dev *pdev)
435{
436 struct zpci_dev *zdev = to_zpci(pdev);
437 resource_size_t len;
438 int i;
439
440 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
441 len = pci_resource_len(pdev, i);
442 if (!len)
443 continue;
444
445 if (zpci_use_mio(zdev))
446 pdev->resource[i].start =
447 (resource_size_t __force) zdev->bars[i].mio_wt;
448 else
449 pdev->resource[i].start = (resource_size_t __force)
450 pci_iomap_range_fh(pdev, i, 0, 0);
451 pdev->resource[i].end = pdev->resource[i].start + len - 1;
452 }
453
454 zpci_iov_map_resources(pdev);
455}
456
457static void zpci_unmap_resources(struct pci_dev *pdev)
458{
459 struct zpci_dev *zdev = to_zpci(pdev);
460 resource_size_t len;
461 int i;
462
463 if (zpci_use_mio(zdev))
464 return;
465
466 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
467 len = pci_resource_len(pdev, i);
468 if (!len)
469 continue;
470 pci_iounmap_fh(pdev, (void __iomem __force *)
471 pdev->resource[i].start);
472 }
473}
474
475static int zpci_alloc_iomap(struct zpci_dev *zdev)
476{
477 unsigned long entry;
478
479 spin_lock(&zpci_iomap_lock);
480 entry = find_first_zero_bit(zpci_iomap_bitmap, ZPCI_IOMAP_ENTRIES);
481 if (entry == ZPCI_IOMAP_ENTRIES) {
482 spin_unlock(&zpci_iomap_lock);
483 return -ENOSPC;
484 }
485 set_bit(entry, zpci_iomap_bitmap);
486 spin_unlock(&zpci_iomap_lock);
487 return entry;
488}
489
490static void zpci_free_iomap(struct zpci_dev *zdev, int entry)
491{
492 spin_lock(&zpci_iomap_lock);
493 memset(&zpci_iomap_start[entry], 0, sizeof(struct zpci_iomap_entry));
494 clear_bit(entry, zpci_iomap_bitmap);
495 spin_unlock(&zpci_iomap_lock);
496}
497
498static void zpci_do_update_iomap_fh(struct zpci_dev *zdev, u32 fh)
499{
500 int bar, idx;
501
502 spin_lock(&zpci_iomap_lock);
503 for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
504 if (!zdev->bars[bar].size)
505 continue;
506 idx = zdev->bars[bar].map_idx;
507 if (!zpci_iomap_start[idx].count)
508 continue;
509 WRITE_ONCE(zpci_iomap_start[idx].fh, zdev->fh);
510 }
511 spin_unlock(&zpci_iomap_lock);
512}
513
514void zpci_update_fh(struct zpci_dev *zdev, u32 fh)
515{
516 if (!fh || zdev->fh == fh)
517 return;
518
519 zdev->fh = fh;
520 if (zpci_use_mio(zdev))
521 return;
522 if (zdev->has_resources && zdev_enabled(zdev))
523 zpci_do_update_iomap_fh(zdev, fh);
524}
525
526static struct resource *__alloc_res(struct zpci_dev *zdev, unsigned long start,
527 unsigned long size, unsigned long flags)
528{
529 struct resource *r;
530
531 r = kzalloc(sizeof(*r), GFP_KERNEL);
532 if (!r)
533 return NULL;
534
535 r->start = start;
536 r->end = r->start + size - 1;
537 r->flags = flags;
538 r->name = zdev->res_name;
539
540 if (request_resource(&iomem_resource, r)) {
541 kfree(r);
542 return NULL;
543 }
544 return r;
545}
546
547int zpci_setup_bus_resources(struct zpci_dev *zdev,
548 struct list_head *resources)
549{
550 unsigned long addr, size, flags;
551 struct resource *res;
552 int i, entry;
553
554 snprintf(zdev->res_name, sizeof(zdev->res_name),
555 "PCI Bus %04x:%02x", zdev->uid, ZPCI_BUS_NR);
556
557 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
558 if (!zdev->bars[i].size)
559 continue;
560 entry = zpci_alloc_iomap(zdev);
561 if (entry < 0)
562 return entry;
563 zdev->bars[i].map_idx = entry;
564
565 /* only MMIO is supported */
566 flags = IORESOURCE_MEM;
567 if (zdev->bars[i].val & 8)
568 flags |= IORESOURCE_PREFETCH;
569 if (zdev->bars[i].val & 4)
570 flags |= IORESOURCE_MEM_64;
571
572 if (zpci_use_mio(zdev))
573 addr = (unsigned long) zdev->bars[i].mio_wt;
574 else
575 addr = ZPCI_ADDR(entry);
576 size = 1UL << zdev->bars[i].size;
577
578 res = __alloc_res(zdev, addr, size, flags);
579 if (!res) {
580 zpci_free_iomap(zdev, entry);
581 return -ENOMEM;
582 }
583 zdev->bars[i].res = res;
584 pci_add_resource(resources, res);
585 }
586 zdev->has_resources = 1;
587
588 return 0;
589}
590
591static void zpci_cleanup_bus_resources(struct zpci_dev *zdev)
592{
593 int i;
594
595 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
596 if (!zdev->bars[i].size || !zdev->bars[i].res)
597 continue;
598
599 zpci_free_iomap(zdev, zdev->bars[i].map_idx);
600 release_resource(zdev->bars[i].res);
601 kfree(zdev->bars[i].res);
602 }
603 zdev->has_resources = 0;
604}
605
606int pcibios_device_add(struct pci_dev *pdev)
607{
608 struct zpci_dev *zdev = to_zpci(pdev);
609 struct resource *res;
610 int i;
611
612 /* The pdev has a reference to the zdev via its bus */
613 zpci_zdev_get(zdev);
614 if (pdev->is_physfn)
615 pdev->no_vf_scan = 1;
616
617 pdev->dev.groups = zpci_attr_groups;
618 pdev->dev.dma_ops = &s390_pci_dma_ops;
619 zpci_map_resources(pdev);
620
621 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
622 res = &pdev->resource[i];
623 if (res->parent || !res->flags)
624 continue;
625 pci_claim_resource(pdev, i);
626 }
627
628 return 0;
629}
630
631void pcibios_release_device(struct pci_dev *pdev)
632{
633 struct zpci_dev *zdev = to_zpci(pdev);
634
635 zpci_unmap_resources(pdev);
636 zpci_zdev_put(zdev);
637}
638
639int pcibios_enable_device(struct pci_dev *pdev, int mask)
640{
641 struct zpci_dev *zdev = to_zpci(pdev);
642
643 zpci_debug_init_device(zdev, dev_name(&pdev->dev));
644 zpci_fmb_enable_device(zdev);
645
646 return pci_enable_resources(pdev, mask);
647}
648
649void pcibios_disable_device(struct pci_dev *pdev)
650{
651 struct zpci_dev *zdev = to_zpci(pdev);
652
653 zpci_fmb_disable_device(zdev);
654 zpci_debug_exit_device(zdev);
655}
656
657static int __zpci_register_domain(int domain)
658{
659 spin_lock(&zpci_domain_lock);
660 if (test_bit(domain, zpci_domain)) {
661 spin_unlock(&zpci_domain_lock);
662 pr_err("Domain %04x is already assigned\n", domain);
663 return -EEXIST;
664 }
665 set_bit(domain, zpci_domain);
666 spin_unlock(&zpci_domain_lock);
667 return domain;
668}
669
670static int __zpci_alloc_domain(void)
671{
672 int domain;
673
674 spin_lock(&zpci_domain_lock);
675 /*
676 * We can always auto allocate domains below ZPCI_NR_DEVICES.
677 * There is either a free domain or we have reached the maximum in
678 * which case we would have bailed earlier.
679 */
680 domain = find_first_zero_bit(zpci_domain, ZPCI_NR_DEVICES);
681 set_bit(domain, zpci_domain);
682 spin_unlock(&zpci_domain_lock);
683 return domain;
684}
685
686int zpci_alloc_domain(int domain)
687{
688 if (zpci_unique_uid) {
689 if (domain)
690 return __zpci_register_domain(domain);
691 pr_warn("UID checking was active but no UID is provided: switching to automatic domain allocation\n");
692 update_uid_checking(false);
693 }
694 return __zpci_alloc_domain();
695}
696
697void zpci_free_domain(int domain)
698{
699 spin_lock(&zpci_domain_lock);
700 clear_bit(domain, zpci_domain);
701 spin_unlock(&zpci_domain_lock);
702}
703
704
705int zpci_enable_device(struct zpci_dev *zdev)
706{
707 u32 fh = zdev->fh;
708 int rc = 0;
709
710 if (clp_enable_fh(zdev, &fh, ZPCI_NR_DMA_SPACES))
711 rc = -EIO;
712 else
713 zpci_update_fh(zdev, fh);
714 return rc;
715}
716EXPORT_SYMBOL_GPL(zpci_enable_device);
717
718int zpci_disable_device(struct zpci_dev *zdev)
719{
720 u32 fh = zdev->fh;
721 int cc, rc = 0;
722
723 cc = clp_disable_fh(zdev, &fh);
724 if (!cc) {
725 zpci_update_fh(zdev, fh);
726 } else if (cc == CLP_RC_SETPCIFN_ALRDY) {
727 pr_info("Disabling PCI function %08x had no effect as it was already disabled\n",
728 zdev->fid);
729 /* Function is already disabled - update handle */
730 rc = clp_refresh_fh(zdev->fid, &fh);
731 if (!rc) {
732 zpci_update_fh(zdev, fh);
733 rc = -EINVAL;
734 }
735 } else {
736 rc = -EIO;
737 }
738 return rc;
739}
740EXPORT_SYMBOL_GPL(zpci_disable_device);
741
742/**
743 * zpci_hot_reset_device - perform a reset of the given zPCI function
744 * @zdev: the slot which should be reset
745 *
746 * Performs a low level reset of the zPCI function. The reset is low level in
747 * the sense that the zPCI function can be reset without detaching it from the
748 * common PCI subsystem. The reset may be performed while under control of
749 * either DMA or IOMMU APIs in which case the existing DMA/IOMMU translation
750 * table is reinstated at the end of the reset.
751 *
752 * After the reset the functions internal state is reset to an initial state
753 * equivalent to its state during boot when first probing a driver.
754 * Consequently after reset the PCI function requires re-initialization via the
755 * common PCI code including re-enabling IRQs via pci_alloc_irq_vectors()
756 * and enabling the function via e.g.pci_enablde_device_flags().The caller
757 * must guard against concurrent reset attempts.
758 *
759 * In most cases this function should not be called directly but through
760 * pci_reset_function() or pci_reset_bus() which handle the save/restore and
761 * locking.
762 *
763 * Return: 0 on success and an error value otherwise
764 */
765int zpci_hot_reset_device(struct zpci_dev *zdev)
766{
767 u8 status;
768 int rc;
769
770 zpci_dbg(3, "rst fid:%x, fh:%x\n", zdev->fid, zdev->fh);
771 if (zdev_enabled(zdev)) {
772 /* Disables device access, DMAs and IRQs (reset state) */
773 rc = zpci_disable_device(zdev);
774 /*
775 * Due to a z/VM vs LPAR inconsistency in the error state the
776 * FH may indicate an enabled device but disable says the
777 * device is already disabled don't treat it as an error here.
778 */
779 if (rc == -EINVAL)
780 rc = 0;
781 if (rc)
782 return rc;
783 }
784
785 rc = zpci_enable_device(zdev);
786 if (rc)
787 return rc;
788
789 if (zdev->dma_table)
790 rc = zpci_register_ioat(zdev, 0, zdev->start_dma, zdev->end_dma,
791 virt_to_phys(zdev->dma_table), &status);
792 else
793 rc = zpci_dma_init_device(zdev);
794 if (rc) {
795 zpci_disable_device(zdev);
796 return rc;
797 }
798
799 return 0;
800}
801
802/**
803 * zpci_create_device() - Create a new zpci_dev and add it to the zbus
804 * @fid: Function ID of the device to be created
805 * @fh: Current Function Handle of the device to be created
806 * @state: Initial state after creation either Standby or Configured
807 *
808 * Creates a new zpci device and adds it to its, possibly newly created, zbus
809 * as well as zpci_list.
810 *
811 * Returns: the zdev on success or an error pointer otherwise
812 */
813struct zpci_dev *zpci_create_device(u32 fid, u32 fh, enum zpci_state state)
814{
815 struct zpci_dev *zdev;
816 int rc;
817
818 zpci_dbg(1, "add fid:%x, fh:%x, c:%d\n", fid, fh, state);
819 zdev = kzalloc(sizeof(*zdev), GFP_KERNEL);
820 if (!zdev)
821 return ERR_PTR(-ENOMEM);
822
823 /* FID and Function Handle are the static/dynamic identifiers */
824 zdev->fid = fid;
825 zdev->fh = fh;
826
827 /* Query function properties and update zdev */
828 rc = clp_query_pci_fn(zdev);
829 if (rc)
830 goto error;
831 zdev->state = state;
832
833 kref_init(&zdev->kref);
834 mutex_init(&zdev->lock);
835 mutex_init(&zdev->kzdev_lock);
836
837 rc = zpci_init_iommu(zdev);
838 if (rc)
839 goto error;
840
841 rc = zpci_bus_device_register(zdev, &pci_root_ops);
842 if (rc)
843 goto error_destroy_iommu;
844
845 spin_lock(&zpci_list_lock);
846 list_add_tail(&zdev->entry, &zpci_list);
847 spin_unlock(&zpci_list_lock);
848
849 return zdev;
850
851error_destroy_iommu:
852 zpci_destroy_iommu(zdev);
853error:
854 zpci_dbg(0, "add fid:%x, rc:%d\n", fid, rc);
855 kfree(zdev);
856 return ERR_PTR(rc);
857}
858
859bool zpci_is_device_configured(struct zpci_dev *zdev)
860{
861 enum zpci_state state = zdev->state;
862
863 return state != ZPCI_FN_STATE_RESERVED &&
864 state != ZPCI_FN_STATE_STANDBY;
865}
866
867/**
868 * zpci_scan_configured_device() - Scan a freshly configured zpci_dev
869 * @zdev: The zpci_dev to be configured
870 * @fh: The general function handle supplied by the platform
871 *
872 * Given a device in the configuration state Configured, enables, scans and
873 * adds it to the common code PCI subsystem if possible. If the PCI device is
874 * parked because we can not yet create a PCI bus because we have not seen
875 * function 0, it is ignored but will be scanned once function 0 appears.
876 * If any failure occurs, the zpci_dev is left disabled.
877 *
878 * Return: 0 on success, or an error code otherwise
879 */
880int zpci_scan_configured_device(struct zpci_dev *zdev, u32 fh)
881{
882 int rc;
883
884 zpci_update_fh(zdev, fh);
885 /* the PCI function will be scanned once function 0 appears */
886 if (!zdev->zbus->bus)
887 return 0;
888
889 /* For function 0 on a multi-function bus scan whole bus as we might
890 * have to pick up existing functions waiting for it to allow creating
891 * the PCI bus
892 */
893 if (zdev->devfn == 0 && zdev->zbus->multifunction)
894 rc = zpci_bus_scan_bus(zdev->zbus);
895 else
896 rc = zpci_bus_scan_device(zdev);
897
898 return rc;
899}
900
901/**
902 * zpci_deconfigure_device() - Deconfigure a zpci_dev
903 * @zdev: The zpci_dev to configure
904 *
905 * Deconfigure a zPCI function that is currently configured and possibly known
906 * to the common code PCI subsystem.
907 * If any failure occurs the device is left as is.
908 *
909 * Return: 0 on success, or an error code otherwise
910 */
911int zpci_deconfigure_device(struct zpci_dev *zdev)
912{
913 int rc;
914
915 if (zdev->zbus->bus)
916 zpci_bus_remove_device(zdev, false);
917
918 if (zdev->dma_table) {
919 rc = zpci_dma_exit_device(zdev);
920 if (rc)
921 return rc;
922 }
923 if (zdev_enabled(zdev)) {
924 rc = zpci_disable_device(zdev);
925 if (rc)
926 return rc;
927 }
928
929 rc = sclp_pci_deconfigure(zdev->fid);
930 zpci_dbg(3, "deconf fid:%x, rc:%d\n", zdev->fid, rc);
931 if (rc)
932 return rc;
933 zdev->state = ZPCI_FN_STATE_STANDBY;
934
935 return 0;
936}
937
938/**
939 * zpci_device_reserved() - Mark device as resverved
940 * @zdev: the zpci_dev that was reserved
941 *
942 * Handle the case that a given zPCI function was reserved by another system.
943 * After a call to this function the zpci_dev can not be found via
944 * get_zdev_by_fid() anymore but may still be accessible via existing
945 * references though it will not be functional anymore.
946 */
947void zpci_device_reserved(struct zpci_dev *zdev)
948{
949 if (zdev->has_hp_slot)
950 zpci_exit_slot(zdev);
951 /*
952 * Remove device from zpci_list as it is going away. This also
953 * makes sure we ignore subsequent zPCI events for this device.
954 */
955 spin_lock(&zpci_list_lock);
956 list_del(&zdev->entry);
957 spin_unlock(&zpci_list_lock);
958 zdev->state = ZPCI_FN_STATE_RESERVED;
959 zpci_dbg(3, "rsv fid:%x\n", zdev->fid);
960 zpci_zdev_put(zdev);
961}
962
963void zpci_release_device(struct kref *kref)
964{
965 struct zpci_dev *zdev = container_of(kref, struct zpci_dev, kref);
966 int ret;
967
968 if (zdev->zbus->bus)
969 zpci_bus_remove_device(zdev, false);
970
971 if (zdev->dma_table)
972 zpci_dma_exit_device(zdev);
973 if (zdev_enabled(zdev))
974 zpci_disable_device(zdev);
975
976 switch (zdev->state) {
977 case ZPCI_FN_STATE_CONFIGURED:
978 ret = sclp_pci_deconfigure(zdev->fid);
979 zpci_dbg(3, "deconf fid:%x, rc:%d\n", zdev->fid, ret);
980 fallthrough;
981 case ZPCI_FN_STATE_STANDBY:
982 if (zdev->has_hp_slot)
983 zpci_exit_slot(zdev);
984 spin_lock(&zpci_list_lock);
985 list_del(&zdev->entry);
986 spin_unlock(&zpci_list_lock);
987 zpci_dbg(3, "rsv fid:%x\n", zdev->fid);
988 fallthrough;
989 case ZPCI_FN_STATE_RESERVED:
990 if (zdev->has_resources)
991 zpci_cleanup_bus_resources(zdev);
992 zpci_bus_device_unregister(zdev);
993 zpci_destroy_iommu(zdev);
994 fallthrough;
995 default:
996 break;
997 }
998 zpci_dbg(3, "rem fid:%x\n", zdev->fid);
999 kfree_rcu(zdev, rcu);
1000}
1001
1002int zpci_report_error(struct pci_dev *pdev,
1003 struct zpci_report_error_header *report)
1004{
1005 struct zpci_dev *zdev = to_zpci(pdev);
1006
1007 return sclp_pci_report(report, zdev->fh, zdev->fid);
1008}
1009EXPORT_SYMBOL(zpci_report_error);
1010
1011/**
1012 * zpci_clear_error_state() - Clears the zPCI error state of the device
1013 * @zdev: The zdev for which the zPCI error state should be reset
1014 *
1015 * Clear the zPCI error state of the device. If clearing the zPCI error state
1016 * fails the device is left in the error state. In this case it may make sense
1017 * to call zpci_io_perm_failure() on the associated pdev if it exists.
1018 *
1019 * Returns: 0 on success, -EIO otherwise
1020 */
1021int zpci_clear_error_state(struct zpci_dev *zdev)
1022{
1023 u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_RESET_ERROR);
1024 struct zpci_fib fib = {0};
1025 u8 status;
1026 int cc;
1027
1028 cc = zpci_mod_fc(req, &fib, &status);
1029 if (cc) {
1030 zpci_dbg(3, "ces fid:%x, cc:%d, status:%x\n", zdev->fid, cc, status);
1031 return -EIO;
1032 }
1033
1034 return 0;
1035}
1036
1037/**
1038 * zpci_reset_load_store_blocked() - Re-enables L/S from error state
1039 * @zdev: The zdev for which to unblock load/store access
1040 *
1041 * Re-enables load/store access for a PCI function in the error state while
1042 * keeping DMA blocked. In this state drivers can poke MMIO space to determine
1043 * if error recovery is possible while catching any rogue DMA access from the
1044 * device.
1045 *
1046 * Returns: 0 on success, -EIO otherwise
1047 */
1048int zpci_reset_load_store_blocked(struct zpci_dev *zdev)
1049{
1050 u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_RESET_BLOCK);
1051 struct zpci_fib fib = {0};
1052 u8 status;
1053 int cc;
1054
1055 cc = zpci_mod_fc(req, &fib, &status);
1056 if (cc) {
1057 zpci_dbg(3, "rls fid:%x, cc:%d, status:%x\n", zdev->fid, cc, status);
1058 return -EIO;
1059 }
1060
1061 return 0;
1062}
1063
1064static int zpci_mem_init(void)
1065{
1066 BUILD_BUG_ON(!is_power_of_2(__alignof__(struct zpci_fmb)) ||
1067 __alignof__(struct zpci_fmb) < sizeof(struct zpci_fmb));
1068
1069 zdev_fmb_cache = kmem_cache_create("PCI_FMB_cache", sizeof(struct zpci_fmb),
1070 __alignof__(struct zpci_fmb), 0, NULL);
1071 if (!zdev_fmb_cache)
1072 goto error_fmb;
1073
1074 zpci_iomap_start = kcalloc(ZPCI_IOMAP_ENTRIES,
1075 sizeof(*zpci_iomap_start), GFP_KERNEL);
1076 if (!zpci_iomap_start)
1077 goto error_iomap;
1078
1079 zpci_iomap_bitmap = kcalloc(BITS_TO_LONGS(ZPCI_IOMAP_ENTRIES),
1080 sizeof(*zpci_iomap_bitmap), GFP_KERNEL);
1081 if (!zpci_iomap_bitmap)
1082 goto error_iomap_bitmap;
1083
1084 if (static_branch_likely(&have_mio))
1085 clp_setup_writeback_mio();
1086
1087 return 0;
1088error_iomap_bitmap:
1089 kfree(zpci_iomap_start);
1090error_iomap:
1091 kmem_cache_destroy(zdev_fmb_cache);
1092error_fmb:
1093 return -ENOMEM;
1094}
1095
1096static void zpci_mem_exit(void)
1097{
1098 kfree(zpci_iomap_bitmap);
1099 kfree(zpci_iomap_start);
1100 kmem_cache_destroy(zdev_fmb_cache);
1101}
1102
1103static unsigned int s390_pci_probe __initdata = 1;
1104unsigned int s390_pci_force_floating __initdata;
1105static unsigned int s390_pci_initialized;
1106
1107char * __init pcibios_setup(char *str)
1108{
1109 if (!strcmp(str, "off")) {
1110 s390_pci_probe = 0;
1111 return NULL;
1112 }
1113 if (!strcmp(str, "nomio")) {
1114 S390_lowcore.machine_flags &= ~MACHINE_FLAG_PCI_MIO;
1115 return NULL;
1116 }
1117 if (!strcmp(str, "force_floating")) {
1118 s390_pci_force_floating = 1;
1119 return NULL;
1120 }
1121 if (!strcmp(str, "norid")) {
1122 s390_pci_no_rid = 1;
1123 return NULL;
1124 }
1125 return str;
1126}
1127
1128bool zpci_is_enabled(void)
1129{
1130 return s390_pci_initialized;
1131}
1132
1133static int __init pci_base_init(void)
1134{
1135 int rc;
1136
1137 if (!s390_pci_probe)
1138 return 0;
1139
1140 if (!test_facility(69) || !test_facility(71)) {
1141 pr_info("PCI is not supported because CPU facilities 69 or 71 are not available\n");
1142 return 0;
1143 }
1144
1145 if (MACHINE_HAS_PCI_MIO) {
1146 static_branch_enable(&have_mio);
1147 ctl_set_bit(2, 5);
1148 }
1149
1150 rc = zpci_debug_init();
1151 if (rc)
1152 goto out;
1153
1154 rc = zpci_mem_init();
1155 if (rc)
1156 goto out_mem;
1157
1158 rc = zpci_irq_init();
1159 if (rc)
1160 goto out_irq;
1161
1162 rc = zpci_dma_init();
1163 if (rc)
1164 goto out_dma;
1165
1166 rc = clp_scan_pci_devices();
1167 if (rc)
1168 goto out_find;
1169 zpci_bus_scan_busses();
1170
1171 s390_pci_initialized = 1;
1172 return 0;
1173
1174out_find:
1175 zpci_dma_exit();
1176out_dma:
1177 zpci_irq_exit();
1178out_irq:
1179 zpci_mem_exit();
1180out_mem:
1181 zpci_debug_exit();
1182out:
1183 return rc;
1184}
1185subsys_initcall_sync(pci_base_init);
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright IBM Corp. 2012
4 *
5 * Author(s):
6 * Jan Glauber <jang@linux.vnet.ibm.com>
7 *
8 * The System z PCI code is a rewrite from a prototype by
9 * the following people (Kudoz!):
10 * Alexander Schmidt
11 * Christoph Raisch
12 * Hannes Hering
13 * Hoang-Nam Nguyen
14 * Jan-Bernd Themann
15 * Stefan Roscher
16 * Thomas Klein
17 */
18
19#define KMSG_COMPONENT "zpci"
20#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
21
22#include <linux/kernel.h>
23#include <linux/slab.h>
24#include <linux/err.h>
25#include <linux/export.h>
26#include <linux/delay.h>
27#include <linux/seq_file.h>
28#include <linux/jump_label.h>
29#include <linux/pci.h>
30#include <linux/printk.h>
31#include <linux/lockdep.h>
32
33#include <asm/isc.h>
34#include <asm/airq.h>
35#include <asm/facility.h>
36#include <asm/pci_insn.h>
37#include <asm/pci_clp.h>
38#include <asm/pci_dma.h>
39
40#include "pci_bus.h"
41#include "pci_iov.h"
42
43/* list of all detected zpci devices */
44static LIST_HEAD(zpci_list);
45static DEFINE_SPINLOCK(zpci_list_lock);
46
47static DECLARE_BITMAP(zpci_domain, ZPCI_DOMAIN_BITMAP_SIZE);
48static DEFINE_SPINLOCK(zpci_domain_lock);
49
50#define ZPCI_IOMAP_ENTRIES \
51 min(((unsigned long) ZPCI_NR_DEVICES * PCI_STD_NUM_BARS / 2), \
52 ZPCI_IOMAP_MAX_ENTRIES)
53
54unsigned int s390_pci_no_rid;
55
56static DEFINE_SPINLOCK(zpci_iomap_lock);
57static unsigned long *zpci_iomap_bitmap;
58struct zpci_iomap_entry *zpci_iomap_start;
59EXPORT_SYMBOL_GPL(zpci_iomap_start);
60
61DEFINE_STATIC_KEY_FALSE(have_mio);
62
63static struct kmem_cache *zdev_fmb_cache;
64
65/* AEN structures that must be preserved over KVM module re-insertion */
66union zpci_sic_iib *zpci_aipb;
67EXPORT_SYMBOL_GPL(zpci_aipb);
68struct airq_iv *zpci_aif_sbv;
69EXPORT_SYMBOL_GPL(zpci_aif_sbv);
70
71struct zpci_dev *get_zdev_by_fid(u32 fid)
72{
73 struct zpci_dev *tmp, *zdev = NULL;
74
75 spin_lock(&zpci_list_lock);
76 list_for_each_entry(tmp, &zpci_list, entry) {
77 if (tmp->fid == fid) {
78 zdev = tmp;
79 zpci_zdev_get(zdev);
80 break;
81 }
82 }
83 spin_unlock(&zpci_list_lock);
84 return zdev;
85}
86
87void zpci_remove_reserved_devices(void)
88{
89 struct zpci_dev *tmp, *zdev;
90 enum zpci_state state;
91 LIST_HEAD(remove);
92
93 spin_lock(&zpci_list_lock);
94 list_for_each_entry_safe(zdev, tmp, &zpci_list, entry) {
95 if (zdev->state == ZPCI_FN_STATE_STANDBY &&
96 !clp_get_state(zdev->fid, &state) &&
97 state == ZPCI_FN_STATE_RESERVED)
98 list_move_tail(&zdev->entry, &remove);
99 }
100 spin_unlock(&zpci_list_lock);
101
102 list_for_each_entry_safe(zdev, tmp, &remove, entry)
103 zpci_device_reserved(zdev);
104}
105
106int pci_domain_nr(struct pci_bus *bus)
107{
108 return ((struct zpci_bus *) bus->sysdata)->domain_nr;
109}
110EXPORT_SYMBOL_GPL(pci_domain_nr);
111
112int pci_proc_domain(struct pci_bus *bus)
113{
114 return pci_domain_nr(bus);
115}
116EXPORT_SYMBOL_GPL(pci_proc_domain);
117
118/* Modify PCI: Register I/O address translation parameters */
119int zpci_register_ioat(struct zpci_dev *zdev, u8 dmaas,
120 u64 base, u64 limit, u64 iota, u8 *status)
121{
122 u64 req = ZPCI_CREATE_REQ(zdev->fh, dmaas, ZPCI_MOD_FC_REG_IOAT);
123 struct zpci_fib fib = {0};
124 u8 cc;
125
126 WARN_ON_ONCE(iota & 0x3fff);
127 fib.pba = base;
128 /* Work around off by one in ISM virt device */
129 if (zdev->pft == PCI_FUNC_TYPE_ISM && limit > base)
130 fib.pal = limit + (1 << 12);
131 else
132 fib.pal = limit;
133 fib.iota = iota | ZPCI_IOTA_RTTO_FLAG;
134 fib.gd = zdev->gisa;
135 cc = zpci_mod_fc(req, &fib, status);
136 if (cc)
137 zpci_dbg(3, "reg ioat fid:%x, cc:%d, status:%d\n", zdev->fid, cc, *status);
138 return cc;
139}
140EXPORT_SYMBOL_GPL(zpci_register_ioat);
141
142/* Modify PCI: Unregister I/O address translation parameters */
143int zpci_unregister_ioat(struct zpci_dev *zdev, u8 dmaas)
144{
145 u64 req = ZPCI_CREATE_REQ(zdev->fh, dmaas, ZPCI_MOD_FC_DEREG_IOAT);
146 struct zpci_fib fib = {0};
147 u8 cc, status;
148
149 fib.gd = zdev->gisa;
150
151 cc = zpci_mod_fc(req, &fib, &status);
152 if (cc)
153 zpci_dbg(3, "unreg ioat fid:%x, cc:%d, status:%d\n", zdev->fid, cc, status);
154 return cc;
155}
156
157/* Modify PCI: Set PCI function measurement parameters */
158int zpci_fmb_enable_device(struct zpci_dev *zdev)
159{
160 u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_SET_MEASURE);
161 struct zpci_iommu_ctrs *ctrs;
162 struct zpci_fib fib = {0};
163 u8 cc, status;
164
165 if (zdev->fmb || sizeof(*zdev->fmb) < zdev->fmb_length)
166 return -EINVAL;
167
168 zdev->fmb = kmem_cache_zalloc(zdev_fmb_cache, GFP_KERNEL);
169 if (!zdev->fmb)
170 return -ENOMEM;
171 WARN_ON((u64) zdev->fmb & 0xf);
172
173 /* reset software counters */
174 ctrs = zpci_get_iommu_ctrs(zdev);
175 if (ctrs) {
176 atomic64_set(&ctrs->mapped_pages, 0);
177 atomic64_set(&ctrs->unmapped_pages, 0);
178 atomic64_set(&ctrs->global_rpcits, 0);
179 atomic64_set(&ctrs->sync_map_rpcits, 0);
180 atomic64_set(&ctrs->sync_rpcits, 0);
181 }
182
183
184 fib.fmb_addr = virt_to_phys(zdev->fmb);
185 fib.gd = zdev->gisa;
186 cc = zpci_mod_fc(req, &fib, &status);
187 if (cc) {
188 kmem_cache_free(zdev_fmb_cache, zdev->fmb);
189 zdev->fmb = NULL;
190 }
191 return cc ? -EIO : 0;
192}
193
194/* Modify PCI: Disable PCI function measurement */
195int zpci_fmb_disable_device(struct zpci_dev *zdev)
196{
197 u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_SET_MEASURE);
198 struct zpci_fib fib = {0};
199 u8 cc, status;
200
201 if (!zdev->fmb)
202 return -EINVAL;
203
204 fib.gd = zdev->gisa;
205
206 /* Function measurement is disabled if fmb address is zero */
207 cc = zpci_mod_fc(req, &fib, &status);
208 if (cc == 3) /* Function already gone. */
209 cc = 0;
210
211 if (!cc) {
212 kmem_cache_free(zdev_fmb_cache, zdev->fmb);
213 zdev->fmb = NULL;
214 }
215 return cc ? -EIO : 0;
216}
217
218static int zpci_cfg_load(struct zpci_dev *zdev, int offset, u32 *val, u8 len)
219{
220 u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
221 u64 data;
222 int rc;
223
224 rc = __zpci_load(&data, req, offset);
225 if (!rc) {
226 data = le64_to_cpu((__force __le64) data);
227 data >>= (8 - len) * 8;
228 *val = (u32) data;
229 } else
230 *val = 0xffffffff;
231 return rc;
232}
233
234static int zpci_cfg_store(struct zpci_dev *zdev, int offset, u32 val, u8 len)
235{
236 u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
237 u64 data = val;
238 int rc;
239
240 data <<= (8 - len) * 8;
241 data = (__force u64) cpu_to_le64(data);
242 rc = __zpci_store(data, req, offset);
243 return rc;
244}
245
246resource_size_t pcibios_align_resource(void *data, const struct resource *res,
247 resource_size_t size,
248 resource_size_t align)
249{
250 return 0;
251}
252
253/* combine single writes by using store-block insn */
254void __iowrite64_copy(void __iomem *to, const void *from, size_t count)
255{
256 zpci_memcpy_toio(to, from, count * 8);
257}
258
259void __iomem *ioremap_prot(phys_addr_t phys_addr, size_t size,
260 unsigned long prot)
261{
262 /*
263 * When PCI MIO instructions are unavailable the "physical" address
264 * encodes a hint for accessing the PCI memory space it represents.
265 * Just pass it unchanged such that ioread/iowrite can decode it.
266 */
267 if (!static_branch_unlikely(&have_mio))
268 return (void __iomem *)phys_addr;
269
270 return generic_ioremap_prot(phys_addr, size, __pgprot(prot));
271}
272EXPORT_SYMBOL(ioremap_prot);
273
274void iounmap(volatile void __iomem *addr)
275{
276 if (static_branch_likely(&have_mio))
277 generic_iounmap(addr);
278}
279EXPORT_SYMBOL(iounmap);
280
281/* Create a virtual mapping cookie for a PCI BAR */
282static void __iomem *pci_iomap_range_fh(struct pci_dev *pdev, int bar,
283 unsigned long offset, unsigned long max)
284{
285 struct zpci_dev *zdev = to_zpci(pdev);
286 int idx;
287
288 idx = zdev->bars[bar].map_idx;
289 spin_lock(&zpci_iomap_lock);
290 /* Detect overrun */
291 WARN_ON(!++zpci_iomap_start[idx].count);
292 zpci_iomap_start[idx].fh = zdev->fh;
293 zpci_iomap_start[idx].bar = bar;
294 spin_unlock(&zpci_iomap_lock);
295
296 return (void __iomem *) ZPCI_ADDR(idx) + offset;
297}
298
299static void __iomem *pci_iomap_range_mio(struct pci_dev *pdev, int bar,
300 unsigned long offset,
301 unsigned long max)
302{
303 unsigned long barsize = pci_resource_len(pdev, bar);
304 struct zpci_dev *zdev = to_zpci(pdev);
305 void __iomem *iova;
306
307 iova = ioremap((unsigned long) zdev->bars[bar].mio_wt, barsize);
308 return iova ? iova + offset : iova;
309}
310
311void __iomem *pci_iomap_range(struct pci_dev *pdev, int bar,
312 unsigned long offset, unsigned long max)
313{
314 if (bar >= PCI_STD_NUM_BARS || !pci_resource_len(pdev, bar))
315 return NULL;
316
317 if (static_branch_likely(&have_mio))
318 return pci_iomap_range_mio(pdev, bar, offset, max);
319 else
320 return pci_iomap_range_fh(pdev, bar, offset, max);
321}
322EXPORT_SYMBOL(pci_iomap_range);
323
324void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
325{
326 return pci_iomap_range(dev, bar, 0, maxlen);
327}
328EXPORT_SYMBOL(pci_iomap);
329
330static void __iomem *pci_iomap_wc_range_mio(struct pci_dev *pdev, int bar,
331 unsigned long offset, unsigned long max)
332{
333 unsigned long barsize = pci_resource_len(pdev, bar);
334 struct zpci_dev *zdev = to_zpci(pdev);
335 void __iomem *iova;
336
337 iova = ioremap((unsigned long) zdev->bars[bar].mio_wb, barsize);
338 return iova ? iova + offset : iova;
339}
340
341void __iomem *pci_iomap_wc_range(struct pci_dev *pdev, int bar,
342 unsigned long offset, unsigned long max)
343{
344 if (bar >= PCI_STD_NUM_BARS || !pci_resource_len(pdev, bar))
345 return NULL;
346
347 if (static_branch_likely(&have_mio))
348 return pci_iomap_wc_range_mio(pdev, bar, offset, max);
349 else
350 return pci_iomap_range_fh(pdev, bar, offset, max);
351}
352EXPORT_SYMBOL(pci_iomap_wc_range);
353
354void __iomem *pci_iomap_wc(struct pci_dev *dev, int bar, unsigned long maxlen)
355{
356 return pci_iomap_wc_range(dev, bar, 0, maxlen);
357}
358EXPORT_SYMBOL(pci_iomap_wc);
359
360static void pci_iounmap_fh(struct pci_dev *pdev, void __iomem *addr)
361{
362 unsigned int idx = ZPCI_IDX(addr);
363
364 spin_lock(&zpci_iomap_lock);
365 /* Detect underrun */
366 WARN_ON(!zpci_iomap_start[idx].count);
367 if (!--zpci_iomap_start[idx].count) {
368 zpci_iomap_start[idx].fh = 0;
369 zpci_iomap_start[idx].bar = 0;
370 }
371 spin_unlock(&zpci_iomap_lock);
372}
373
374static void pci_iounmap_mio(struct pci_dev *pdev, void __iomem *addr)
375{
376 iounmap(addr);
377}
378
379void pci_iounmap(struct pci_dev *pdev, void __iomem *addr)
380{
381 if (static_branch_likely(&have_mio))
382 pci_iounmap_mio(pdev, addr);
383 else
384 pci_iounmap_fh(pdev, addr);
385}
386EXPORT_SYMBOL(pci_iounmap);
387
388static int pci_read(struct pci_bus *bus, unsigned int devfn, int where,
389 int size, u32 *val)
390{
391 struct zpci_dev *zdev = zdev_from_bus(bus, devfn);
392
393 return (zdev) ? zpci_cfg_load(zdev, where, val, size) : -ENODEV;
394}
395
396static int pci_write(struct pci_bus *bus, unsigned int devfn, int where,
397 int size, u32 val)
398{
399 struct zpci_dev *zdev = zdev_from_bus(bus, devfn);
400
401 return (zdev) ? zpci_cfg_store(zdev, where, val, size) : -ENODEV;
402}
403
404static struct pci_ops pci_root_ops = {
405 .read = pci_read,
406 .write = pci_write,
407};
408
409static void zpci_map_resources(struct pci_dev *pdev)
410{
411 struct zpci_dev *zdev = to_zpci(pdev);
412 resource_size_t len;
413 int i;
414
415 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
416 len = pci_resource_len(pdev, i);
417 if (!len)
418 continue;
419
420 if (zpci_use_mio(zdev))
421 pdev->resource[i].start =
422 (resource_size_t __force) zdev->bars[i].mio_wt;
423 else
424 pdev->resource[i].start = (resource_size_t __force)
425 pci_iomap_range_fh(pdev, i, 0, 0);
426 pdev->resource[i].end = pdev->resource[i].start + len - 1;
427 }
428
429 zpci_iov_map_resources(pdev);
430}
431
432static void zpci_unmap_resources(struct pci_dev *pdev)
433{
434 struct zpci_dev *zdev = to_zpci(pdev);
435 resource_size_t len;
436 int i;
437
438 if (zpci_use_mio(zdev))
439 return;
440
441 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
442 len = pci_resource_len(pdev, i);
443 if (!len)
444 continue;
445 pci_iounmap_fh(pdev, (void __iomem __force *)
446 pdev->resource[i].start);
447 }
448}
449
450static int zpci_alloc_iomap(struct zpci_dev *zdev)
451{
452 unsigned long entry;
453
454 spin_lock(&zpci_iomap_lock);
455 entry = find_first_zero_bit(zpci_iomap_bitmap, ZPCI_IOMAP_ENTRIES);
456 if (entry == ZPCI_IOMAP_ENTRIES) {
457 spin_unlock(&zpci_iomap_lock);
458 return -ENOSPC;
459 }
460 set_bit(entry, zpci_iomap_bitmap);
461 spin_unlock(&zpci_iomap_lock);
462 return entry;
463}
464
465static void zpci_free_iomap(struct zpci_dev *zdev, int entry)
466{
467 spin_lock(&zpci_iomap_lock);
468 memset(&zpci_iomap_start[entry], 0, sizeof(struct zpci_iomap_entry));
469 clear_bit(entry, zpci_iomap_bitmap);
470 spin_unlock(&zpci_iomap_lock);
471}
472
473static void zpci_do_update_iomap_fh(struct zpci_dev *zdev, u32 fh)
474{
475 int bar, idx;
476
477 spin_lock(&zpci_iomap_lock);
478 for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
479 if (!zdev->bars[bar].size)
480 continue;
481 idx = zdev->bars[bar].map_idx;
482 if (!zpci_iomap_start[idx].count)
483 continue;
484 WRITE_ONCE(zpci_iomap_start[idx].fh, zdev->fh);
485 }
486 spin_unlock(&zpci_iomap_lock);
487}
488
489void zpci_update_fh(struct zpci_dev *zdev, u32 fh)
490{
491 if (!fh || zdev->fh == fh)
492 return;
493
494 zdev->fh = fh;
495 if (zpci_use_mio(zdev))
496 return;
497 if (zdev->has_resources && zdev_enabled(zdev))
498 zpci_do_update_iomap_fh(zdev, fh);
499}
500
501static struct resource *__alloc_res(struct zpci_dev *zdev, unsigned long start,
502 unsigned long size, unsigned long flags)
503{
504 struct resource *r;
505
506 r = kzalloc(sizeof(*r), GFP_KERNEL);
507 if (!r)
508 return NULL;
509
510 r->start = start;
511 r->end = r->start + size - 1;
512 r->flags = flags;
513 r->name = zdev->res_name;
514
515 if (request_resource(&iomem_resource, r)) {
516 kfree(r);
517 return NULL;
518 }
519 return r;
520}
521
522int zpci_setup_bus_resources(struct zpci_dev *zdev)
523{
524 unsigned long addr, size, flags;
525 struct resource *res;
526 int i, entry;
527
528 snprintf(zdev->res_name, sizeof(zdev->res_name),
529 "PCI Bus %04x:%02x", zdev->uid, ZPCI_BUS_NR);
530
531 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
532 if (!zdev->bars[i].size)
533 continue;
534 entry = zpci_alloc_iomap(zdev);
535 if (entry < 0)
536 return entry;
537 zdev->bars[i].map_idx = entry;
538
539 /* only MMIO is supported */
540 flags = IORESOURCE_MEM;
541 if (zdev->bars[i].val & 8)
542 flags |= IORESOURCE_PREFETCH;
543 if (zdev->bars[i].val & 4)
544 flags |= IORESOURCE_MEM_64;
545
546 if (zpci_use_mio(zdev))
547 addr = (unsigned long) zdev->bars[i].mio_wt;
548 else
549 addr = ZPCI_ADDR(entry);
550 size = 1UL << zdev->bars[i].size;
551
552 res = __alloc_res(zdev, addr, size, flags);
553 if (!res) {
554 zpci_free_iomap(zdev, entry);
555 return -ENOMEM;
556 }
557 zdev->bars[i].res = res;
558 }
559 zdev->has_resources = 1;
560
561 return 0;
562}
563
564static void zpci_cleanup_bus_resources(struct zpci_dev *zdev)
565{
566 struct resource *res;
567 int i;
568
569 pci_lock_rescan_remove();
570 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
571 res = zdev->bars[i].res;
572 if (!res)
573 continue;
574
575 release_resource(res);
576 pci_bus_remove_resource(zdev->zbus->bus, res);
577 zpci_free_iomap(zdev, zdev->bars[i].map_idx);
578 zdev->bars[i].res = NULL;
579 kfree(res);
580 }
581 zdev->has_resources = 0;
582 pci_unlock_rescan_remove();
583}
584
585int pcibios_device_add(struct pci_dev *pdev)
586{
587 struct zpci_dev *zdev = to_zpci(pdev);
588 struct resource *res;
589 int i;
590
591 /* The pdev has a reference to the zdev via its bus */
592 zpci_zdev_get(zdev);
593 if (pdev->is_physfn)
594 pdev->no_vf_scan = 1;
595
596 pdev->dev.groups = zpci_attr_groups;
597 zpci_map_resources(pdev);
598
599 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
600 res = &pdev->resource[i];
601 if (res->parent || !res->flags)
602 continue;
603 pci_claim_resource(pdev, i);
604 }
605
606 return 0;
607}
608
609void pcibios_release_device(struct pci_dev *pdev)
610{
611 struct zpci_dev *zdev = to_zpci(pdev);
612
613 zpci_unmap_resources(pdev);
614 zpci_zdev_put(zdev);
615}
616
617int pcibios_enable_device(struct pci_dev *pdev, int mask)
618{
619 struct zpci_dev *zdev = to_zpci(pdev);
620
621 zpci_debug_init_device(zdev, dev_name(&pdev->dev));
622 zpci_fmb_enable_device(zdev);
623
624 return pci_enable_resources(pdev, mask);
625}
626
627void pcibios_disable_device(struct pci_dev *pdev)
628{
629 struct zpci_dev *zdev = to_zpci(pdev);
630
631 zpci_fmb_disable_device(zdev);
632 zpci_debug_exit_device(zdev);
633}
634
635static int __zpci_register_domain(int domain)
636{
637 spin_lock(&zpci_domain_lock);
638 if (test_bit(domain, zpci_domain)) {
639 spin_unlock(&zpci_domain_lock);
640 pr_err("Domain %04x is already assigned\n", domain);
641 return -EEXIST;
642 }
643 set_bit(domain, zpci_domain);
644 spin_unlock(&zpci_domain_lock);
645 return domain;
646}
647
648static int __zpci_alloc_domain(void)
649{
650 int domain;
651
652 spin_lock(&zpci_domain_lock);
653 /*
654 * We can always auto allocate domains below ZPCI_NR_DEVICES.
655 * There is either a free domain or we have reached the maximum in
656 * which case we would have bailed earlier.
657 */
658 domain = find_first_zero_bit(zpci_domain, ZPCI_NR_DEVICES);
659 set_bit(domain, zpci_domain);
660 spin_unlock(&zpci_domain_lock);
661 return domain;
662}
663
664int zpci_alloc_domain(int domain)
665{
666 if (zpci_unique_uid) {
667 if (domain)
668 return __zpci_register_domain(domain);
669 pr_warn("UID checking was active but no UID is provided: switching to automatic domain allocation\n");
670 update_uid_checking(false);
671 }
672 return __zpci_alloc_domain();
673}
674
675void zpci_free_domain(int domain)
676{
677 spin_lock(&zpci_domain_lock);
678 clear_bit(domain, zpci_domain);
679 spin_unlock(&zpci_domain_lock);
680}
681
682
683int zpci_enable_device(struct zpci_dev *zdev)
684{
685 u32 fh = zdev->fh;
686 int rc = 0;
687
688 if (clp_enable_fh(zdev, &fh, ZPCI_NR_DMA_SPACES))
689 rc = -EIO;
690 else
691 zpci_update_fh(zdev, fh);
692 return rc;
693}
694EXPORT_SYMBOL_GPL(zpci_enable_device);
695
696int zpci_disable_device(struct zpci_dev *zdev)
697{
698 u32 fh = zdev->fh;
699 int cc, rc = 0;
700
701 cc = clp_disable_fh(zdev, &fh);
702 if (!cc) {
703 zpci_update_fh(zdev, fh);
704 } else if (cc == CLP_RC_SETPCIFN_ALRDY) {
705 pr_info("Disabling PCI function %08x had no effect as it was already disabled\n",
706 zdev->fid);
707 /* Function is already disabled - update handle */
708 rc = clp_refresh_fh(zdev->fid, &fh);
709 if (!rc) {
710 zpci_update_fh(zdev, fh);
711 rc = -EINVAL;
712 }
713 } else {
714 rc = -EIO;
715 }
716 return rc;
717}
718EXPORT_SYMBOL_GPL(zpci_disable_device);
719
720/**
721 * zpci_hot_reset_device - perform a reset of the given zPCI function
722 * @zdev: the slot which should be reset
723 *
724 * Performs a low level reset of the zPCI function. The reset is low level in
725 * the sense that the zPCI function can be reset without detaching it from the
726 * common PCI subsystem. The reset may be performed while under control of
727 * either DMA or IOMMU APIs in which case the existing DMA/IOMMU translation
728 * table is reinstated at the end of the reset.
729 *
730 * After the reset the functions internal state is reset to an initial state
731 * equivalent to its state during boot when first probing a driver.
732 * Consequently after reset the PCI function requires re-initialization via the
733 * common PCI code including re-enabling IRQs via pci_alloc_irq_vectors()
734 * and enabling the function via e.g. pci_enable_device_flags(). The caller
735 * must guard against concurrent reset attempts.
736 *
737 * In most cases this function should not be called directly but through
738 * pci_reset_function() or pci_reset_bus() which handle the save/restore and
739 * locking - asserted by lockdep.
740 *
741 * Return: 0 on success and an error value otherwise
742 */
743int zpci_hot_reset_device(struct zpci_dev *zdev)
744{
745 u8 status;
746 int rc;
747
748 lockdep_assert_held(&zdev->state_lock);
749 zpci_dbg(3, "rst fid:%x, fh:%x\n", zdev->fid, zdev->fh);
750 if (zdev_enabled(zdev)) {
751 /* Disables device access, DMAs and IRQs (reset state) */
752 rc = zpci_disable_device(zdev);
753 /*
754 * Due to a z/VM vs LPAR inconsistency in the error state the
755 * FH may indicate an enabled device but disable says the
756 * device is already disabled don't treat it as an error here.
757 */
758 if (rc == -EINVAL)
759 rc = 0;
760 if (rc)
761 return rc;
762 }
763
764 rc = zpci_enable_device(zdev);
765 if (rc)
766 return rc;
767
768 if (zdev->dma_table)
769 rc = zpci_register_ioat(zdev, 0, zdev->start_dma, zdev->end_dma,
770 virt_to_phys(zdev->dma_table), &status);
771 if (rc) {
772 zpci_disable_device(zdev);
773 return rc;
774 }
775
776 return 0;
777}
778
779/**
780 * zpci_create_device() - Create a new zpci_dev and add it to the zbus
781 * @fid: Function ID of the device to be created
782 * @fh: Current Function Handle of the device to be created
783 * @state: Initial state after creation either Standby or Configured
784 *
785 * Creates a new zpci device and adds it to its, possibly newly created, zbus
786 * as well as zpci_list.
787 *
788 * Returns: the zdev on success or an error pointer otherwise
789 */
790struct zpci_dev *zpci_create_device(u32 fid, u32 fh, enum zpci_state state)
791{
792 struct zpci_dev *zdev;
793 int rc;
794
795 zpci_dbg(1, "add fid:%x, fh:%x, c:%d\n", fid, fh, state);
796 zdev = kzalloc(sizeof(*zdev), GFP_KERNEL);
797 if (!zdev)
798 return ERR_PTR(-ENOMEM);
799
800 /* FID and Function Handle are the static/dynamic identifiers */
801 zdev->fid = fid;
802 zdev->fh = fh;
803
804 /* Query function properties and update zdev */
805 rc = clp_query_pci_fn(zdev);
806 if (rc)
807 goto error;
808 zdev->state = state;
809
810 kref_init(&zdev->kref);
811 mutex_init(&zdev->state_lock);
812 mutex_init(&zdev->fmb_lock);
813 mutex_init(&zdev->kzdev_lock);
814
815 rc = zpci_init_iommu(zdev);
816 if (rc)
817 goto error;
818
819 rc = zpci_bus_device_register(zdev, &pci_root_ops);
820 if (rc)
821 goto error_destroy_iommu;
822
823 spin_lock(&zpci_list_lock);
824 list_add_tail(&zdev->entry, &zpci_list);
825 spin_unlock(&zpci_list_lock);
826
827 return zdev;
828
829error_destroy_iommu:
830 zpci_destroy_iommu(zdev);
831error:
832 zpci_dbg(0, "add fid:%x, rc:%d\n", fid, rc);
833 kfree(zdev);
834 return ERR_PTR(rc);
835}
836
837bool zpci_is_device_configured(struct zpci_dev *zdev)
838{
839 enum zpci_state state = zdev->state;
840
841 return state != ZPCI_FN_STATE_RESERVED &&
842 state != ZPCI_FN_STATE_STANDBY;
843}
844
845/**
846 * zpci_scan_configured_device() - Scan a freshly configured zpci_dev
847 * @zdev: The zpci_dev to be configured
848 * @fh: The general function handle supplied by the platform
849 *
850 * Given a device in the configuration state Configured, enables, scans and
851 * adds it to the common code PCI subsystem if possible. If any failure occurs,
852 * the zpci_dev is left disabled.
853 *
854 * Return: 0 on success, or an error code otherwise
855 */
856int zpci_scan_configured_device(struct zpci_dev *zdev, u32 fh)
857{
858 zpci_update_fh(zdev, fh);
859 return zpci_bus_scan_device(zdev);
860}
861
862/**
863 * zpci_deconfigure_device() - Deconfigure a zpci_dev
864 * @zdev: The zpci_dev to configure
865 *
866 * Deconfigure a zPCI function that is currently configured and possibly known
867 * to the common code PCI subsystem.
868 * If any failure occurs the device is left as is.
869 *
870 * Return: 0 on success, or an error code otherwise
871 */
872int zpci_deconfigure_device(struct zpci_dev *zdev)
873{
874 int rc;
875
876 lockdep_assert_held(&zdev->state_lock);
877 if (zdev->state != ZPCI_FN_STATE_CONFIGURED)
878 return 0;
879
880 if (zdev->zbus->bus)
881 zpci_bus_remove_device(zdev, false);
882
883 if (zdev_enabled(zdev)) {
884 rc = zpci_disable_device(zdev);
885 if (rc)
886 return rc;
887 }
888
889 rc = sclp_pci_deconfigure(zdev->fid);
890 zpci_dbg(3, "deconf fid:%x, rc:%d\n", zdev->fid, rc);
891 if (rc)
892 return rc;
893 zdev->state = ZPCI_FN_STATE_STANDBY;
894
895 return 0;
896}
897
898/**
899 * zpci_device_reserved() - Mark device as reserved
900 * @zdev: the zpci_dev that was reserved
901 *
902 * Handle the case that a given zPCI function was reserved by another system.
903 * After a call to this function the zpci_dev can not be found via
904 * get_zdev_by_fid() anymore but may still be accessible via existing
905 * references though it will not be functional anymore.
906 */
907void zpci_device_reserved(struct zpci_dev *zdev)
908{
909 /*
910 * Remove device from zpci_list as it is going away. This also
911 * makes sure we ignore subsequent zPCI events for this device.
912 */
913 spin_lock(&zpci_list_lock);
914 list_del(&zdev->entry);
915 spin_unlock(&zpci_list_lock);
916 zdev->state = ZPCI_FN_STATE_RESERVED;
917 zpci_dbg(3, "rsv fid:%x\n", zdev->fid);
918 zpci_zdev_put(zdev);
919}
920
921void zpci_release_device(struct kref *kref)
922{
923 struct zpci_dev *zdev = container_of(kref, struct zpci_dev, kref);
924 int ret;
925
926 if (zdev->has_hp_slot)
927 zpci_exit_slot(zdev);
928
929 if (zdev->zbus->bus)
930 zpci_bus_remove_device(zdev, false);
931
932 if (zdev_enabled(zdev))
933 zpci_disable_device(zdev);
934
935 switch (zdev->state) {
936 case ZPCI_FN_STATE_CONFIGURED:
937 ret = sclp_pci_deconfigure(zdev->fid);
938 zpci_dbg(3, "deconf fid:%x, rc:%d\n", zdev->fid, ret);
939 fallthrough;
940 case ZPCI_FN_STATE_STANDBY:
941 if (zdev->has_hp_slot)
942 zpci_exit_slot(zdev);
943 spin_lock(&zpci_list_lock);
944 list_del(&zdev->entry);
945 spin_unlock(&zpci_list_lock);
946 zpci_dbg(3, "rsv fid:%x\n", zdev->fid);
947 fallthrough;
948 case ZPCI_FN_STATE_RESERVED:
949 if (zdev->has_resources)
950 zpci_cleanup_bus_resources(zdev);
951 zpci_bus_device_unregister(zdev);
952 zpci_destroy_iommu(zdev);
953 fallthrough;
954 default:
955 break;
956 }
957 zpci_dbg(3, "rem fid:%x\n", zdev->fid);
958 kfree_rcu(zdev, rcu);
959}
960
961int zpci_report_error(struct pci_dev *pdev,
962 struct zpci_report_error_header *report)
963{
964 struct zpci_dev *zdev = to_zpci(pdev);
965
966 return sclp_pci_report(report, zdev->fh, zdev->fid);
967}
968EXPORT_SYMBOL(zpci_report_error);
969
970/**
971 * zpci_clear_error_state() - Clears the zPCI error state of the device
972 * @zdev: The zdev for which the zPCI error state should be reset
973 *
974 * Clear the zPCI error state of the device. If clearing the zPCI error state
975 * fails the device is left in the error state. In this case it may make sense
976 * to call zpci_io_perm_failure() on the associated pdev if it exists.
977 *
978 * Returns: 0 on success, -EIO otherwise
979 */
980int zpci_clear_error_state(struct zpci_dev *zdev)
981{
982 u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_RESET_ERROR);
983 struct zpci_fib fib = {0};
984 u8 status;
985 int cc;
986
987 cc = zpci_mod_fc(req, &fib, &status);
988 if (cc) {
989 zpci_dbg(3, "ces fid:%x, cc:%d, status:%x\n", zdev->fid, cc, status);
990 return -EIO;
991 }
992
993 return 0;
994}
995
996/**
997 * zpci_reset_load_store_blocked() - Re-enables L/S from error state
998 * @zdev: The zdev for which to unblock load/store access
999 *
1000 * Re-enables load/store access for a PCI function in the error state while
1001 * keeping DMA blocked. In this state drivers can poke MMIO space to determine
1002 * if error recovery is possible while catching any rogue DMA access from the
1003 * device.
1004 *
1005 * Returns: 0 on success, -EIO otherwise
1006 */
1007int zpci_reset_load_store_blocked(struct zpci_dev *zdev)
1008{
1009 u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_RESET_BLOCK);
1010 struct zpci_fib fib = {0};
1011 u8 status;
1012 int cc;
1013
1014 cc = zpci_mod_fc(req, &fib, &status);
1015 if (cc) {
1016 zpci_dbg(3, "rls fid:%x, cc:%d, status:%x\n", zdev->fid, cc, status);
1017 return -EIO;
1018 }
1019
1020 return 0;
1021}
1022
1023static int zpci_mem_init(void)
1024{
1025 BUILD_BUG_ON(!is_power_of_2(__alignof__(struct zpci_fmb)) ||
1026 __alignof__(struct zpci_fmb) < sizeof(struct zpci_fmb));
1027
1028 zdev_fmb_cache = kmem_cache_create("PCI_FMB_cache", sizeof(struct zpci_fmb),
1029 __alignof__(struct zpci_fmb), 0, NULL);
1030 if (!zdev_fmb_cache)
1031 goto error_fmb;
1032
1033 zpci_iomap_start = kcalloc(ZPCI_IOMAP_ENTRIES,
1034 sizeof(*zpci_iomap_start), GFP_KERNEL);
1035 if (!zpci_iomap_start)
1036 goto error_iomap;
1037
1038 zpci_iomap_bitmap = kcalloc(BITS_TO_LONGS(ZPCI_IOMAP_ENTRIES),
1039 sizeof(*zpci_iomap_bitmap), GFP_KERNEL);
1040 if (!zpci_iomap_bitmap)
1041 goto error_iomap_bitmap;
1042
1043 if (static_branch_likely(&have_mio))
1044 clp_setup_writeback_mio();
1045
1046 return 0;
1047error_iomap_bitmap:
1048 kfree(zpci_iomap_start);
1049error_iomap:
1050 kmem_cache_destroy(zdev_fmb_cache);
1051error_fmb:
1052 return -ENOMEM;
1053}
1054
1055static void zpci_mem_exit(void)
1056{
1057 kfree(zpci_iomap_bitmap);
1058 kfree(zpci_iomap_start);
1059 kmem_cache_destroy(zdev_fmb_cache);
1060}
1061
1062static unsigned int s390_pci_probe __initdata = 1;
1063unsigned int s390_pci_force_floating __initdata;
1064static unsigned int s390_pci_initialized;
1065
1066char * __init pcibios_setup(char *str)
1067{
1068 if (!strcmp(str, "off")) {
1069 s390_pci_probe = 0;
1070 return NULL;
1071 }
1072 if (!strcmp(str, "nomio")) {
1073 S390_lowcore.machine_flags &= ~MACHINE_FLAG_PCI_MIO;
1074 return NULL;
1075 }
1076 if (!strcmp(str, "force_floating")) {
1077 s390_pci_force_floating = 1;
1078 return NULL;
1079 }
1080 if (!strcmp(str, "norid")) {
1081 s390_pci_no_rid = 1;
1082 return NULL;
1083 }
1084 return str;
1085}
1086
1087bool zpci_is_enabled(void)
1088{
1089 return s390_pci_initialized;
1090}
1091
1092static int __init pci_base_init(void)
1093{
1094 int rc;
1095
1096 if (!s390_pci_probe)
1097 return 0;
1098
1099 if (!test_facility(69) || !test_facility(71)) {
1100 pr_info("PCI is not supported because CPU facilities 69 or 71 are not available\n");
1101 return 0;
1102 }
1103
1104 if (MACHINE_HAS_PCI_MIO) {
1105 static_branch_enable(&have_mio);
1106 system_ctl_set_bit(2, CR2_MIO_ADDRESSING_BIT);
1107 }
1108
1109 rc = zpci_debug_init();
1110 if (rc)
1111 goto out;
1112
1113 rc = zpci_mem_init();
1114 if (rc)
1115 goto out_mem;
1116
1117 rc = zpci_irq_init();
1118 if (rc)
1119 goto out_irq;
1120
1121 rc = clp_scan_pci_devices();
1122 if (rc)
1123 goto out_find;
1124 zpci_bus_scan_busses();
1125
1126 s390_pci_initialized = 1;
1127 return 0;
1128
1129out_find:
1130 zpci_irq_exit();
1131out_irq:
1132 zpci_mem_exit();
1133out_mem:
1134 zpci_debug_exit();
1135out:
1136 return rc;
1137}
1138subsys_initcall_sync(pci_base_init);