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1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 *
6 * Enhanced CPU detection and feature setting code by Mike Jagdis
7 * and Martin Mares, November 1997.
8 */
9
10.text
11#include <linux/threads.h>
12#include <linux/init.h>
13#include <linux/linkage.h>
14#include <asm/segment.h>
15#include <asm/page_types.h>
16#include <asm/pgtable_types.h>
17#include <asm/cache.h>
18#include <asm/thread_info.h>
19#include <asm/asm-offsets.h>
20#include <asm/setup.h>
21#include <asm/processor-flags.h>
22#include <asm/msr-index.h>
23#include <asm/cpufeatures.h>
24#include <asm/percpu.h>
25#include <asm/nops.h>
26#include <asm/nospec-branch.h>
27#include <asm/bootparam.h>
28#include <asm/export.h>
29#include <asm/pgtable_32.h>
30
31/* Physical address */
32#define pa(X) ((X) - __PAGE_OFFSET)
33
34/*
35 * References to members of the new_cpu_data structure.
36 */
37
38#define X86 new_cpu_data+CPUINFO_x86
39#define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor
40#define X86_MODEL new_cpu_data+CPUINFO_x86_model
41#define X86_STEPPING new_cpu_data+CPUINFO_x86_stepping
42#define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math
43#define X86_CPUID new_cpu_data+CPUINFO_cpuid_level
44#define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability
45#define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id
46
47
48#define SIZEOF_PTREGS 17*4
49
50/*
51 * Worst-case size of the kernel mapping we need to make:
52 * a relocatable kernel can live anywhere in lowmem, so we need to be able
53 * to map all of lowmem.
54 */
55KERNEL_PAGES = LOWMEM_PAGES
56
57INIT_MAP_SIZE = PAGE_TABLE_SIZE(KERNEL_PAGES) * PAGE_SIZE
58RESERVE_BRK(pagetables, INIT_MAP_SIZE)
59
60/*
61 * 32-bit kernel entrypoint; only used by the boot CPU. On entry,
62 * %esi points to the real-mode code as a 32-bit pointer.
63 * CS and DS must be 4 GB flat segments, but we don't depend on
64 * any particular GDT layout, because we load our own as soon as we
65 * can.
66 */
67__HEAD
68SYM_CODE_START(startup_32)
69 movl pa(initial_stack),%ecx
70
71/*
72 * Set segments to known values.
73 */
74 lgdt pa(boot_gdt_descr)
75 movl $(__BOOT_DS),%eax
76 movl %eax,%ds
77 movl %eax,%es
78 movl %eax,%fs
79 movl %eax,%gs
80 movl %eax,%ss
81 leal -__PAGE_OFFSET(%ecx),%esp
82
83/*
84 * Clear BSS first so that there are no surprises...
85 */
86 cld
87 xorl %eax,%eax
88 movl $pa(__bss_start),%edi
89 movl $pa(__bss_stop),%ecx
90 subl %edi,%ecx
91 shrl $2,%ecx
92 rep ; stosl
93/*
94 * Copy bootup parameters out of the way.
95 * Note: %esi still has the pointer to the real-mode data.
96 * With the kexec as boot loader, parameter segment might be loaded beyond
97 * kernel image and might not even be addressable by early boot page tables.
98 * (kexec on panic case). Hence copy out the parameters before initializing
99 * page tables.
100 */
101 movl $pa(boot_params),%edi
102 movl $(PARAM_SIZE/4),%ecx
103 cld
104 rep
105 movsl
106 movl pa(boot_params) + NEW_CL_POINTER,%esi
107 andl %esi,%esi
108 jz 1f # No command line
109 movl $pa(boot_command_line),%edi
110 movl $(COMMAND_LINE_SIZE/4),%ecx
111 rep
112 movsl
1131:
114
115#ifdef CONFIG_OLPC
116 /* save OFW's pgdir table for later use when calling into OFW */
117 movl %cr3, %eax
118 movl %eax, pa(olpc_ofw_pgd)
119#endif
120
121#ifdef CONFIG_MICROCODE
122 /* Early load ucode on BSP. */
123 call load_ucode_bsp
124#endif
125
126 /* Create early pagetables. */
127 call mk_early_pgtbl_32
128
129 /* Do early initialization of the fixmap area */
130 movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax
131#ifdef CONFIG_X86_PAE
132#define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */
133 movl %eax,pa(initial_pg_pmd+0x1000*KPMDS-8)
134#else
135 movl %eax,pa(initial_page_table+0xffc)
136#endif
137
138 jmp .Ldefault_entry
139SYM_CODE_END(startup_32)
140
141#ifdef CONFIG_HOTPLUG_CPU
142/*
143 * Boot CPU0 entry point. It's called from play_dead(). Everything has been set
144 * up already except stack. We just set up stack here. Then call
145 * start_secondary().
146 */
147SYM_FUNC_START(start_cpu0)
148 movl initial_stack, %ecx
149 movl %ecx, %esp
150 call *(initial_code)
1511: jmp 1b
152SYM_FUNC_END(start_cpu0)
153#endif
154
155/*
156 * Non-boot CPU entry point; entered from trampoline.S
157 * We can't lgdt here, because lgdt itself uses a data segment, but
158 * we know the trampoline has already loaded the boot_gdt for us.
159 *
160 * If cpu hotplug is not supported then this code can go in init section
161 * which will be freed later
162 */
163SYM_FUNC_START(startup_32_smp)
164 cld
165 movl $(__BOOT_DS),%eax
166 movl %eax,%ds
167 movl %eax,%es
168 movl %eax,%fs
169 movl %eax,%gs
170 movl pa(initial_stack),%ecx
171 movl %eax,%ss
172 leal -__PAGE_OFFSET(%ecx),%esp
173
174#ifdef CONFIG_MICROCODE
175 /* Early load ucode on AP. */
176 call load_ucode_ap
177#endif
178
179.Ldefault_entry:
180 movl $(CR0_STATE & ~X86_CR0_PG),%eax
181 movl %eax,%cr0
182
183/*
184 * We want to start out with EFLAGS unambiguously cleared. Some BIOSes leave
185 * bits like NT set. This would confuse the debugger if this code is traced. So
186 * initialize them properly now before switching to protected mode. That means
187 * DF in particular (even though we have cleared it earlier after copying the
188 * command line) because GCC expects it.
189 */
190 pushl $0
191 popfl
192
193/*
194 * New page tables may be in 4Mbyte page mode and may be using the global pages.
195 *
196 * NOTE! If we are on a 486 we may have no cr4 at all! Specifically, cr4 exists
197 * if and only if CPUID exists and has flags other than the FPU flag set.
198 */
199 movl $-1,pa(X86_CPUID) # preset CPUID level
200 movl $X86_EFLAGS_ID,%ecx
201 pushl %ecx
202 popfl # set EFLAGS=ID
203 pushfl
204 popl %eax # get EFLAGS
205 testl $X86_EFLAGS_ID,%eax # did EFLAGS.ID remained set?
206 jz .Lenable_paging # hw disallowed setting of ID bit
207 # which means no CPUID and no CR4
208
209 xorl %eax,%eax
210 cpuid
211 movl %eax,pa(X86_CPUID) # save largest std CPUID function
212
213 movl $1,%eax
214 cpuid
215 andl $~1,%edx # Ignore CPUID.FPU
216 jz .Lenable_paging # No flags or only CPUID.FPU = no CR4
217
218 movl pa(mmu_cr4_features),%eax
219 movl %eax,%cr4
220
221 testb $X86_CR4_PAE, %al # check if PAE is enabled
222 jz .Lenable_paging
223
224 /* Check if extended functions are implemented */
225 movl $0x80000000, %eax
226 cpuid
227 /* Value must be in the range 0x80000001 to 0x8000ffff */
228 subl $0x80000001, %eax
229 cmpl $(0x8000ffff-0x80000001), %eax
230 ja .Lenable_paging
231
232 /* Clear bogus XD_DISABLE bits */
233 call verify_cpu
234
235 mov $0x80000001, %eax
236 cpuid
237 /* Execute Disable bit supported? */
238 btl $(X86_FEATURE_NX & 31), %edx
239 jnc .Lenable_paging
240
241 /* Setup EFER (Extended Feature Enable Register) */
242 movl $MSR_EFER, %ecx
243 rdmsr
244
245 btsl $_EFER_NX, %eax
246 /* Make changes effective */
247 wrmsr
248
249.Lenable_paging:
250
251/*
252 * Enable paging
253 */
254 movl $pa(initial_page_table), %eax
255 movl %eax,%cr3 /* set the page table pointer.. */
256 movl $CR0_STATE,%eax
257 movl %eax,%cr0 /* ..and set paging (PG) bit */
258 ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */
2591:
260 /* Shift the stack pointer to a virtual address */
261 addl $__PAGE_OFFSET, %esp
262
263/*
264 * Check if it is 486
265 */
266 movb $4,X86 # at least 486
267 cmpl $-1,X86_CPUID
268 je .Lis486
269
270 /* get vendor info */
271 xorl %eax,%eax # call CPUID with 0 -> return vendor ID
272 cpuid
273 movl %eax,X86_CPUID # save CPUID level
274 movl %ebx,X86_VENDOR_ID # lo 4 chars
275 movl %edx,X86_VENDOR_ID+4 # next 4 chars
276 movl %ecx,X86_VENDOR_ID+8 # last 4 chars
277
278 orl %eax,%eax # do we have processor info as well?
279 je .Lis486
280
281 movl $1,%eax # Use the CPUID instruction to get CPU type
282 cpuid
283 movb %al,%cl # save reg for future use
284 andb $0x0f,%ah # mask processor family
285 movb %ah,X86
286 andb $0xf0,%al # mask model
287 shrb $4,%al
288 movb %al,X86_MODEL
289 andb $0x0f,%cl # mask mask revision
290 movb %cl,X86_STEPPING
291 movl %edx,X86_CAPABILITY
292
293.Lis486:
294 movl $0x50022,%ecx # set AM, WP, NE and MP
295 movl %cr0,%eax
296 andl $0x80000011,%eax # Save PG,PE,ET
297 orl %ecx,%eax
298 movl %eax,%cr0
299
300 lgdt early_gdt_descr
301 ljmp $(__KERNEL_CS),$1f
3021: movl $(__KERNEL_DS),%eax # reload all the segment registers
303 movl %eax,%ss # after changing gdt.
304
305 movl $(__USER_DS),%eax # DS/ES contains default USER segment
306 movl %eax,%ds
307 movl %eax,%es
308
309 movl $(__KERNEL_PERCPU), %eax
310 movl %eax,%fs # set this cpu's percpu
311
312 xorl %eax,%eax
313 movl %eax,%gs # clear possible garbage in %gs
314
315 xorl %eax,%eax # Clear LDT
316 lldt %ax
317
318 call *(initial_code)
3191: jmp 1b
320SYM_FUNC_END(startup_32_smp)
321
322#include "verify_cpu.S"
323
324__INIT
325SYM_FUNC_START(early_idt_handler_array)
326 # 36(%esp) %eflags
327 # 32(%esp) %cs
328 # 28(%esp) %eip
329 # 24(%rsp) error code
330 i = 0
331 .rept NUM_EXCEPTION_VECTORS
332 .if ((EXCEPTION_ERRCODE_MASK >> i) & 1) == 0
333 pushl $0 # Dummy error code, to make stack frame uniform
334 .endif
335 pushl $i # 20(%esp) Vector number
336 jmp early_idt_handler_common
337 i = i + 1
338 .fill early_idt_handler_array + i*EARLY_IDT_HANDLER_SIZE - ., 1, 0xcc
339 .endr
340SYM_FUNC_END(early_idt_handler_array)
341
342SYM_CODE_START_LOCAL(early_idt_handler_common)
343 /*
344 * The stack is the hardware frame, an error code or zero, and the
345 * vector number.
346 */
347 cld
348
349 incl %ss:early_recursion_flag
350
351 /* The vector number is in pt_regs->gs */
352
353 cld
354 pushl %fs /* pt_regs->fs (__fsh varies by model) */
355 pushl %es /* pt_regs->es (__esh varies by model) */
356 pushl %ds /* pt_regs->ds (__dsh varies by model) */
357 pushl %eax /* pt_regs->ax */
358 pushl %ebp /* pt_regs->bp */
359 pushl %edi /* pt_regs->di */
360 pushl %esi /* pt_regs->si */
361 pushl %edx /* pt_regs->dx */
362 pushl %ecx /* pt_regs->cx */
363 pushl %ebx /* pt_regs->bx */
364
365 /* Fix up DS and ES */
366 movl $(__KERNEL_DS), %ecx
367 movl %ecx, %ds
368 movl %ecx, %es
369
370 /* Load the vector number into EDX */
371 movl PT_GS(%esp), %edx
372
373 /* Load GS into pt_regs->gs (and maybe clobber __gsh) */
374 movw %gs, PT_GS(%esp)
375
376 movl %esp, %eax /* args are pt_regs (EAX), trapnr (EDX) */
377 call early_fixup_exception
378
379 popl %ebx /* pt_regs->bx */
380 popl %ecx /* pt_regs->cx */
381 popl %edx /* pt_regs->dx */
382 popl %esi /* pt_regs->si */
383 popl %edi /* pt_regs->di */
384 popl %ebp /* pt_regs->bp */
385 popl %eax /* pt_regs->ax */
386 popl %ds /* pt_regs->ds (always ignores __dsh) */
387 popl %es /* pt_regs->es (always ignores __esh) */
388 popl %fs /* pt_regs->fs (always ignores __fsh) */
389 popl %gs /* pt_regs->gs (always ignores __gsh) */
390 decl %ss:early_recursion_flag
391 addl $4, %esp /* pop pt_regs->orig_ax */
392 iret
393SYM_CODE_END(early_idt_handler_common)
394
395/* This is the default interrupt "handler" :-) */
396SYM_FUNC_START(early_ignore_irq)
397 cld
398#ifdef CONFIG_PRINTK
399 pushl %eax
400 pushl %ecx
401 pushl %edx
402 pushl %es
403 pushl %ds
404 movl $(__KERNEL_DS),%eax
405 movl %eax,%ds
406 movl %eax,%es
407 cmpl $2,early_recursion_flag
408 je hlt_loop
409 incl early_recursion_flag
410 pushl 16(%esp)
411 pushl 24(%esp)
412 pushl 32(%esp)
413 pushl 40(%esp)
414 pushl $int_msg
415 call _printk
416
417 call dump_stack
418
419 addl $(5*4),%esp
420 popl %ds
421 popl %es
422 popl %edx
423 popl %ecx
424 popl %eax
425#endif
426 iret
427
428hlt_loop:
429 hlt
430 jmp hlt_loop
431SYM_FUNC_END(early_ignore_irq)
432
433__INITDATA
434 .align 4
435SYM_DATA(early_recursion_flag, .long 0)
436
437__REFDATA
438 .align 4
439SYM_DATA(initial_code, .long i386_start_kernel)
440
441#ifdef CONFIG_PAGE_TABLE_ISOLATION
442#define PGD_ALIGN (2 * PAGE_SIZE)
443#define PTI_USER_PGD_FILL 1024
444#else
445#define PGD_ALIGN (PAGE_SIZE)
446#define PTI_USER_PGD_FILL 0
447#endif
448/*
449 * BSS section
450 */
451__PAGE_ALIGNED_BSS
452 .align PGD_ALIGN
453#ifdef CONFIG_X86_PAE
454.globl initial_pg_pmd
455initial_pg_pmd:
456 .fill 1024*KPMDS,4,0
457#else
458.globl initial_page_table
459initial_page_table:
460 .fill 1024,4,0
461#endif
462 .align PGD_ALIGN
463initial_pg_fixmap:
464 .fill 1024,4,0
465.globl swapper_pg_dir
466 .align PGD_ALIGN
467swapper_pg_dir:
468 .fill 1024,4,0
469 .fill PTI_USER_PGD_FILL,4,0
470.globl empty_zero_page
471empty_zero_page:
472 .fill 4096,1,0
473EXPORT_SYMBOL(empty_zero_page)
474
475/*
476 * This starts the data section.
477 */
478#ifdef CONFIG_X86_PAE
479__PAGE_ALIGNED_DATA
480 /* Page-aligned for the benefit of paravirt? */
481 .align PGD_ALIGN
482SYM_DATA_START(initial_page_table)
483 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 /* low identity map */
484# if KPMDS == 3
485 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
486 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0
487 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x2000),0
488# elif KPMDS == 2
489 .long 0,0
490 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
491 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0
492# elif KPMDS == 1
493 .long 0,0
494 .long 0,0
495 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
496# else
497# error "Kernel PMDs should be 1, 2 or 3"
498# endif
499 .align PAGE_SIZE /* needs to be page-sized too */
500
501#ifdef CONFIG_PAGE_TABLE_ISOLATION
502 /*
503 * PTI needs another page so sync_initial_pagetable() works correctly
504 * and does not scribble over the data which is placed behind the
505 * actual initial_page_table. See clone_pgd_range().
506 */
507 .fill 1024, 4, 0
508#endif
509
510SYM_DATA_END(initial_page_table)
511#endif
512
513.data
514.balign 4
515/*
516 * The SIZEOF_PTREGS gap is a convention which helps the in-kernel unwinder
517 * reliably detect the end of the stack.
518 */
519SYM_DATA(initial_stack,
520 .long init_thread_union + THREAD_SIZE -
521 SIZEOF_PTREGS - TOP_OF_KERNEL_STACK_PADDING)
522
523__INITRODATA
524int_msg:
525 .asciz "Unknown interrupt or fault at: %p %p %p\n"
526
527#include "../../x86/xen/xen-head.S"
528
529/*
530 * The IDT and GDT 'descriptors' are a strange 48-bit object
531 * only used by the lidt and lgdt instructions. They are not
532 * like usual segment descriptors - they consist of a 16-bit
533 * segment size, and 32-bit linear address value:
534 */
535
536 .data
537 ALIGN
538# early boot GDT descriptor (must use 1:1 address mapping)
539 .word 0 # 32 bit align gdt_desc.address
540SYM_DATA_START_LOCAL(boot_gdt_descr)
541 .word __BOOT_DS+7
542 .long boot_gdt - __PAGE_OFFSET
543SYM_DATA_END(boot_gdt_descr)
544
545# boot GDT descriptor (later on used by CPU#0):
546 .word 0 # 32 bit align gdt_desc.address
547SYM_DATA_START(early_gdt_descr)
548 .word GDT_ENTRIES*8-1
549 .long gdt_page /* Overwritten for secondary CPUs */
550SYM_DATA_END(early_gdt_descr)
551
552/*
553 * The boot_gdt must mirror the equivalent in setup.S and is
554 * used only for booting.
555 */
556 .align L1_CACHE_BYTES
557SYM_DATA_START(boot_gdt)
558 .fill GDT_ENTRY_BOOT_CS,8,0
559 .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */
560 .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */
561SYM_DATA_END(boot_gdt)
1/*
2 *
3 * Copyright (C) 1991, 1992 Linus Torvalds
4 *
5 * Enhanced CPU detection and feature setting code by Mike Jagdis
6 * and Martin Mares, November 1997.
7 */
8
9.text
10#include <linux/threads.h>
11#include <linux/init.h>
12#include <linux/linkage.h>
13#include <asm/segment.h>
14#include <asm/page_types.h>
15#include <asm/pgtable_types.h>
16#include <asm/cache.h>
17#include <asm/thread_info.h>
18#include <asm/asm-offsets.h>
19#include <asm/setup.h>
20#include <asm/processor-flags.h>
21#include <asm/msr-index.h>
22#include <asm/cpufeatures.h>
23#include <asm/percpu.h>
24#include <asm/nops.h>
25#include <asm/bootparam.h>
26
27/* Physical address */
28#define pa(X) ((X) - __PAGE_OFFSET)
29
30/*
31 * References to members of the new_cpu_data structure.
32 */
33
34#define X86 new_cpu_data+CPUINFO_x86
35#define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor
36#define X86_MODEL new_cpu_data+CPUINFO_x86_model
37#define X86_MASK new_cpu_data+CPUINFO_x86_mask
38#define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math
39#define X86_CPUID new_cpu_data+CPUINFO_cpuid_level
40#define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability
41#define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id
42
43/*
44 * This is how much memory in addition to the memory covered up to
45 * and including _end we need mapped initially.
46 * We need:
47 * (KERNEL_IMAGE_SIZE/4096) / 1024 pages (worst case, non PAE)
48 * (KERNEL_IMAGE_SIZE/4096) / 512 + 4 pages (worst case for PAE)
49 *
50 * Modulo rounding, each megabyte assigned here requires a kilobyte of
51 * memory, which is currently unreclaimed.
52 *
53 * This should be a multiple of a page.
54 *
55 * KERNEL_IMAGE_SIZE should be greater than pa(_end)
56 * and small than max_low_pfn, otherwise will waste some page table entries
57 */
58
59#if PTRS_PER_PMD > 1
60#define PAGE_TABLE_SIZE(pages) (((pages) / PTRS_PER_PMD) + PTRS_PER_PGD)
61#else
62#define PAGE_TABLE_SIZE(pages) ((pages) / PTRS_PER_PGD)
63#endif
64
65/*
66 * Number of possible pages in the lowmem region.
67 *
68 * We shift 2 by 31 instead of 1 by 32 to the left in order to avoid a
69 * gas warning about overflowing shift count when gas has been compiled
70 * with only a host target support using a 32-bit type for internal
71 * representation.
72 */
73LOWMEM_PAGES = (((2<<31) - __PAGE_OFFSET) >> PAGE_SHIFT)
74
75/* Enough space to fit pagetables for the low memory linear map */
76MAPPING_BEYOND_END = PAGE_TABLE_SIZE(LOWMEM_PAGES) << PAGE_SHIFT
77
78/*
79 * Worst-case size of the kernel mapping we need to make:
80 * a relocatable kernel can live anywhere in lowmem, so we need to be able
81 * to map all of lowmem.
82 */
83KERNEL_PAGES = LOWMEM_PAGES
84
85INIT_MAP_SIZE = PAGE_TABLE_SIZE(KERNEL_PAGES) * PAGE_SIZE
86RESERVE_BRK(pagetables, INIT_MAP_SIZE)
87
88/*
89 * 32-bit kernel entrypoint; only used by the boot CPU. On entry,
90 * %esi points to the real-mode code as a 32-bit pointer.
91 * CS and DS must be 4 GB flat segments, but we don't depend on
92 * any particular GDT layout, because we load our own as soon as we
93 * can.
94 */
95__HEAD
96ENTRY(startup_32)
97 movl pa(stack_start),%ecx
98
99 /* test KEEP_SEGMENTS flag to see if the bootloader is asking
100 us to not reload segments */
101 testb $KEEP_SEGMENTS, BP_loadflags(%esi)
102 jnz 2f
103
104/*
105 * Set segments to known values.
106 */
107 lgdt pa(boot_gdt_descr)
108 movl $(__BOOT_DS),%eax
109 movl %eax,%ds
110 movl %eax,%es
111 movl %eax,%fs
112 movl %eax,%gs
113 movl %eax,%ss
1142:
115 leal -__PAGE_OFFSET(%ecx),%esp
116
117/*
118 * Clear BSS first so that there are no surprises...
119 */
120 cld
121 xorl %eax,%eax
122 movl $pa(__bss_start),%edi
123 movl $pa(__bss_stop),%ecx
124 subl %edi,%ecx
125 shrl $2,%ecx
126 rep ; stosl
127/*
128 * Copy bootup parameters out of the way.
129 * Note: %esi still has the pointer to the real-mode data.
130 * With the kexec as boot loader, parameter segment might be loaded beyond
131 * kernel image and might not even be addressable by early boot page tables.
132 * (kexec on panic case). Hence copy out the parameters before initializing
133 * page tables.
134 */
135 movl $pa(boot_params),%edi
136 movl $(PARAM_SIZE/4),%ecx
137 cld
138 rep
139 movsl
140 movl pa(boot_params) + NEW_CL_POINTER,%esi
141 andl %esi,%esi
142 jz 1f # No command line
143 movl $pa(boot_command_line),%edi
144 movl $(COMMAND_LINE_SIZE/4),%ecx
145 rep
146 movsl
1471:
148
149#ifdef CONFIG_OLPC
150 /* save OFW's pgdir table for later use when calling into OFW */
151 movl %cr3, %eax
152 movl %eax, pa(olpc_ofw_pgd)
153#endif
154
155#ifdef CONFIG_MICROCODE
156 /* Early load ucode on BSP. */
157 call load_ucode_bsp
158#endif
159
160/*
161 * Initialize page tables. This creates a PDE and a set of page
162 * tables, which are located immediately beyond __brk_base. The variable
163 * _brk_end is set up to point to the first "safe" location.
164 * Mappings are created both at virtual address 0 (identity mapping)
165 * and PAGE_OFFSET for up to _end.
166 */
167#ifdef CONFIG_X86_PAE
168
169 /*
170 * In PAE mode initial_page_table is statically defined to contain
171 * enough entries to cover the VMSPLIT option (that is the top 1, 2 or 3
172 * entries). The identity mapping is handled by pointing two PGD entries
173 * to the first kernel PMD.
174 *
175 * Note the upper half of each PMD or PTE are always zero at this stage.
176 */
177
178#define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */
179
180 xorl %ebx,%ebx /* %ebx is kept at zero */
181
182 movl $pa(__brk_base), %edi
183 movl $pa(initial_pg_pmd), %edx
184 movl $PTE_IDENT_ATTR, %eax
18510:
186 leal PDE_IDENT_ATTR(%edi),%ecx /* Create PMD entry */
187 movl %ecx,(%edx) /* Store PMD entry */
188 /* Upper half already zero */
189 addl $8,%edx
190 movl $512,%ecx
19111:
192 stosl
193 xchgl %eax,%ebx
194 stosl
195 xchgl %eax,%ebx
196 addl $0x1000,%eax
197 loop 11b
198
199 /*
200 * End condition: we must map up to the end + MAPPING_BEYOND_END.
201 */
202 movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
203 cmpl %ebp,%eax
204 jb 10b
2051:
206 addl $__PAGE_OFFSET, %edi
207 movl %edi, pa(_brk_end)
208 shrl $12, %eax
209 movl %eax, pa(max_pfn_mapped)
210
211 /* Do early initialization of the fixmap area */
212 movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax
213 movl %eax,pa(initial_pg_pmd+0x1000*KPMDS-8)
214#else /* Not PAE */
215
216page_pde_offset = (__PAGE_OFFSET >> 20);
217
218 movl $pa(__brk_base), %edi
219 movl $pa(initial_page_table), %edx
220 movl $PTE_IDENT_ATTR, %eax
22110:
222 leal PDE_IDENT_ATTR(%edi),%ecx /* Create PDE entry */
223 movl %ecx,(%edx) /* Store identity PDE entry */
224 movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */
225 addl $4,%edx
226 movl $1024, %ecx
22711:
228 stosl
229 addl $0x1000,%eax
230 loop 11b
231 /*
232 * End condition: we must map up to the end + MAPPING_BEYOND_END.
233 */
234 movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
235 cmpl %ebp,%eax
236 jb 10b
237 addl $__PAGE_OFFSET, %edi
238 movl %edi, pa(_brk_end)
239 shrl $12, %eax
240 movl %eax, pa(max_pfn_mapped)
241
242 /* Do early initialization of the fixmap area */
243 movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax
244 movl %eax,pa(initial_page_table+0xffc)
245#endif
246
247#ifdef CONFIG_PARAVIRT
248 /* This is can only trip for a broken bootloader... */
249 cmpw $0x207, pa(boot_params + BP_version)
250 jb default_entry
251
252 /* Paravirt-compatible boot parameters. Look to see what architecture
253 we're booting under. */
254 movl pa(boot_params + BP_hardware_subarch), %eax
255 cmpl $num_subarch_entries, %eax
256 jae bad_subarch
257
258 movl pa(subarch_entries)(,%eax,4), %eax
259 subl $__PAGE_OFFSET, %eax
260 jmp *%eax
261
262bad_subarch:
263WEAK(lguest_entry)
264WEAK(xen_entry)
265 /* Unknown implementation; there's really
266 nothing we can do at this point. */
267 ud2a
268
269 __INITDATA
270
271subarch_entries:
272 .long default_entry /* normal x86/PC */
273 .long lguest_entry /* lguest hypervisor */
274 .long xen_entry /* Xen hypervisor */
275 .long default_entry /* Moorestown MID */
276num_subarch_entries = (. - subarch_entries) / 4
277.previous
278#else
279 jmp default_entry
280#endif /* CONFIG_PARAVIRT */
281
282#ifdef CONFIG_HOTPLUG_CPU
283/*
284 * Boot CPU0 entry point. It's called from play_dead(). Everything has been set
285 * up already except stack. We just set up stack here. Then call
286 * start_secondary().
287 */
288ENTRY(start_cpu0)
289 movl stack_start, %ecx
290 movl %ecx, %esp
291 jmp *(initial_code)
292ENDPROC(start_cpu0)
293#endif
294
295/*
296 * Non-boot CPU entry point; entered from trampoline.S
297 * We can't lgdt here, because lgdt itself uses a data segment, but
298 * we know the trampoline has already loaded the boot_gdt for us.
299 *
300 * If cpu hotplug is not supported then this code can go in init section
301 * which will be freed later
302 */
303ENTRY(startup_32_smp)
304 cld
305 movl $(__BOOT_DS),%eax
306 movl %eax,%ds
307 movl %eax,%es
308 movl %eax,%fs
309 movl %eax,%gs
310 movl pa(stack_start),%ecx
311 movl %eax,%ss
312 leal -__PAGE_OFFSET(%ecx),%esp
313
314#ifdef CONFIG_MICROCODE
315 /* Early load ucode on AP. */
316 call load_ucode_ap
317#endif
318
319default_entry:
320#define CR0_STATE (X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | \
321 X86_CR0_NE | X86_CR0_WP | X86_CR0_AM | \
322 X86_CR0_PG)
323 movl $(CR0_STATE & ~X86_CR0_PG),%eax
324 movl %eax,%cr0
325
326/*
327 * We want to start out with EFLAGS unambiguously cleared. Some BIOSes leave
328 * bits like NT set. This would confuse the debugger if this code is traced. So
329 * initialize them properly now before switching to protected mode. That means
330 * DF in particular (even though we have cleared it earlier after copying the
331 * command line) because GCC expects it.
332 */
333 pushl $0
334 popfl
335
336/*
337 * New page tables may be in 4Mbyte page mode and may be using the global pages.
338 *
339 * NOTE! If we are on a 486 we may have no cr4 at all! Specifically, cr4 exists
340 * if and only if CPUID exists and has flags other than the FPU flag set.
341 */
342 movl $-1,pa(X86_CPUID) # preset CPUID level
343 movl $X86_EFLAGS_ID,%ecx
344 pushl %ecx
345 popfl # set EFLAGS=ID
346 pushfl
347 popl %eax # get EFLAGS
348 testl $X86_EFLAGS_ID,%eax # did EFLAGS.ID remained set?
349 jz enable_paging # hw disallowed setting of ID bit
350 # which means no CPUID and no CR4
351
352 xorl %eax,%eax
353 cpuid
354 movl %eax,pa(X86_CPUID) # save largest std CPUID function
355
356 movl $1,%eax
357 cpuid
358 andl $~1,%edx # Ignore CPUID.FPU
359 jz enable_paging # No flags or only CPUID.FPU = no CR4
360
361 movl pa(mmu_cr4_features),%eax
362 movl %eax,%cr4
363
364 testb $X86_CR4_PAE, %al # check if PAE is enabled
365 jz enable_paging
366
367 /* Check if extended functions are implemented */
368 movl $0x80000000, %eax
369 cpuid
370 /* Value must be in the range 0x80000001 to 0x8000ffff */
371 subl $0x80000001, %eax
372 cmpl $(0x8000ffff-0x80000001), %eax
373 ja enable_paging
374
375 /* Clear bogus XD_DISABLE bits */
376 call verify_cpu
377
378 mov $0x80000001, %eax
379 cpuid
380 /* Execute Disable bit supported? */
381 btl $(X86_FEATURE_NX & 31), %edx
382 jnc enable_paging
383
384 /* Setup EFER (Extended Feature Enable Register) */
385 movl $MSR_EFER, %ecx
386 rdmsr
387
388 btsl $_EFER_NX, %eax
389 /* Make changes effective */
390 wrmsr
391
392enable_paging:
393
394/*
395 * Enable paging
396 */
397 movl $pa(initial_page_table), %eax
398 movl %eax,%cr3 /* set the page table pointer.. */
399 movl $CR0_STATE,%eax
400 movl %eax,%cr0 /* ..and set paging (PG) bit */
401 ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */
4021:
403 /* Shift the stack pointer to a virtual address */
404 addl $__PAGE_OFFSET, %esp
405
406/*
407 * start system 32-bit setup. We need to re-do some of the things done
408 * in 16-bit mode for the "real" operations.
409 */
410 movl setup_once_ref,%eax
411 andl %eax,%eax
412 jz 1f # Did we do this already?
413 call *%eax
4141:
415
416/*
417 * Check if it is 486
418 */
419 movb $4,X86 # at least 486
420 cmpl $-1,X86_CPUID
421 je is486
422
423 /* get vendor info */
424 xorl %eax,%eax # call CPUID with 0 -> return vendor ID
425 cpuid
426 movl %eax,X86_CPUID # save CPUID level
427 movl %ebx,X86_VENDOR_ID # lo 4 chars
428 movl %edx,X86_VENDOR_ID+4 # next 4 chars
429 movl %ecx,X86_VENDOR_ID+8 # last 4 chars
430
431 orl %eax,%eax # do we have processor info as well?
432 je is486
433
434 movl $1,%eax # Use the CPUID instruction to get CPU type
435 cpuid
436 movb %al,%cl # save reg for future use
437 andb $0x0f,%ah # mask processor family
438 movb %ah,X86
439 andb $0xf0,%al # mask model
440 shrb $4,%al
441 movb %al,X86_MODEL
442 andb $0x0f,%cl # mask mask revision
443 movb %cl,X86_MASK
444 movl %edx,X86_CAPABILITY
445
446is486:
447 movl $0x50022,%ecx # set AM, WP, NE and MP
448 movl %cr0,%eax
449 andl $0x80000011,%eax # Save PG,PE,ET
450 orl %ecx,%eax
451 movl %eax,%cr0
452
453 lgdt early_gdt_descr
454 lidt idt_descr
455 ljmp $(__KERNEL_CS),$1f
4561: movl $(__KERNEL_DS),%eax # reload all the segment registers
457 movl %eax,%ss # after changing gdt.
458
459 movl $(__USER_DS),%eax # DS/ES contains default USER segment
460 movl %eax,%ds
461 movl %eax,%es
462
463 movl $(__KERNEL_PERCPU), %eax
464 movl %eax,%fs # set this cpu's percpu
465
466 movl $(__KERNEL_STACK_CANARY),%eax
467 movl %eax,%gs
468
469 xorl %eax,%eax # Clear LDT
470 lldt %ax
471
472 pushl $0 # fake return address for unwinder
473 jmp *(initial_code)
474
475#include "verify_cpu.S"
476
477/*
478 * setup_once
479 *
480 * The setup work we only want to run on the BSP.
481 *
482 * Warning: %esi is live across this function.
483 */
484__INIT
485setup_once:
486 /*
487 * Set up a idt with 256 interrupt gates that push zero if there
488 * is no error code and then jump to early_idt_handler_common.
489 * It doesn't actually load the idt - that needs to be done on
490 * each CPU. Interrupts are enabled elsewhere, when we can be
491 * relatively sure everything is ok.
492 */
493
494 movl $idt_table,%edi
495 movl $early_idt_handler_array,%eax
496 movl $NUM_EXCEPTION_VECTORS,%ecx
4971:
498 movl %eax,(%edi)
499 movl %eax,4(%edi)
500 /* interrupt gate, dpl=0, present */
501 movl $(0x8E000000 + __KERNEL_CS),2(%edi)
502 addl $EARLY_IDT_HANDLER_SIZE,%eax
503 addl $8,%edi
504 loop 1b
505
506 movl $256 - NUM_EXCEPTION_VECTORS,%ecx
507 movl $ignore_int,%edx
508 movl $(__KERNEL_CS << 16),%eax
509 movw %dx,%ax /* selector = 0x0010 = cs */
510 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
5112:
512 movl %eax,(%edi)
513 movl %edx,4(%edi)
514 addl $8,%edi
515 loop 2b
516
517#ifdef CONFIG_CC_STACKPROTECTOR
518 /*
519 * Configure the stack canary. The linker can't handle this by
520 * relocation. Manually set base address in stack canary
521 * segment descriptor.
522 */
523 movl $gdt_page,%eax
524 movl $stack_canary,%ecx
525 movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax)
526 shrl $16, %ecx
527 movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax)
528 movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax)
529#endif
530
531 andl $0,setup_once_ref /* Once is enough, thanks */
532 ret
533
534ENTRY(early_idt_handler_array)
535 # 36(%esp) %eflags
536 # 32(%esp) %cs
537 # 28(%esp) %eip
538 # 24(%rsp) error code
539 i = 0
540 .rept NUM_EXCEPTION_VECTORS
541 .ifeq (EXCEPTION_ERRCODE_MASK >> i) & 1
542 pushl $0 # Dummy error code, to make stack frame uniform
543 .endif
544 pushl $i # 20(%esp) Vector number
545 jmp early_idt_handler_common
546 i = i + 1
547 .fill early_idt_handler_array + i*EARLY_IDT_HANDLER_SIZE - ., 1, 0xcc
548 .endr
549ENDPROC(early_idt_handler_array)
550
551early_idt_handler_common:
552 /*
553 * The stack is the hardware frame, an error code or zero, and the
554 * vector number.
555 */
556 cld
557
558 cmpl $2,(%esp) # X86_TRAP_NMI
559 je .Lis_nmi # Ignore NMI
560
561 cmpl $2,%ss:early_recursion_flag
562 je hlt_loop
563 incl %ss:early_recursion_flag
564
565 push %eax # 16(%esp)
566 push %ecx # 12(%esp)
567 push %edx # 8(%esp)
568 push %ds # 4(%esp)
569 push %es # 0(%esp)
570 movl $(__KERNEL_DS),%eax
571 movl %eax,%ds
572 movl %eax,%es
573
574 cmpl $(__KERNEL_CS),32(%esp)
575 jne 10f
576
577 leal 28(%esp),%eax # Pointer to %eip
578 call early_fixup_exception
579 andl %eax,%eax
580 jnz ex_entry /* found an exception entry */
581
58210:
583#ifdef CONFIG_PRINTK
584 xorl %eax,%eax
585 movw %ax,2(%esp) /* clean up the segment values on some cpus */
586 movw %ax,6(%esp)
587 movw %ax,34(%esp)
588 leal 40(%esp),%eax
589 pushl %eax /* %esp before the exception */
590 pushl %ebx
591 pushl %ebp
592 pushl %esi
593 pushl %edi
594 movl %cr2,%eax
595 pushl %eax
596 pushl (20+6*4)(%esp) /* trapno */
597 pushl $fault_msg
598 call printk
599#endif
600 call dump_stack
601hlt_loop:
602 hlt
603 jmp hlt_loop
604
605ex_entry:
606 pop %es
607 pop %ds
608 pop %edx
609 pop %ecx
610 pop %eax
611 decl %ss:early_recursion_flag
612.Lis_nmi:
613 addl $8,%esp /* drop vector number and error code */
614 iret
615ENDPROC(early_idt_handler_common)
616
617/* This is the default interrupt "handler" :-) */
618 ALIGN
619ignore_int:
620 cld
621#ifdef CONFIG_PRINTK
622 pushl %eax
623 pushl %ecx
624 pushl %edx
625 pushl %es
626 pushl %ds
627 movl $(__KERNEL_DS),%eax
628 movl %eax,%ds
629 movl %eax,%es
630 cmpl $2,early_recursion_flag
631 je hlt_loop
632 incl early_recursion_flag
633 pushl 16(%esp)
634 pushl 24(%esp)
635 pushl 32(%esp)
636 pushl 40(%esp)
637 pushl $int_msg
638 call printk
639
640 call dump_stack
641
642 addl $(5*4),%esp
643 popl %ds
644 popl %es
645 popl %edx
646 popl %ecx
647 popl %eax
648#endif
649 iret
650ENDPROC(ignore_int)
651__INITDATA
652 .align 4
653early_recursion_flag:
654 .long 0
655
656__REFDATA
657 .align 4
658ENTRY(initial_code)
659 .long i386_start_kernel
660ENTRY(setup_once_ref)
661 .long setup_once
662
663/*
664 * BSS section
665 */
666__PAGE_ALIGNED_BSS
667 .align PAGE_SIZE
668#ifdef CONFIG_X86_PAE
669initial_pg_pmd:
670 .fill 1024*KPMDS,4,0
671#else
672ENTRY(initial_page_table)
673 .fill 1024,4,0
674#endif
675initial_pg_fixmap:
676 .fill 1024,4,0
677ENTRY(empty_zero_page)
678 .fill 4096,1,0
679ENTRY(swapper_pg_dir)
680 .fill 1024,4,0
681
682/*
683 * This starts the data section.
684 */
685#ifdef CONFIG_X86_PAE
686__PAGE_ALIGNED_DATA
687 /* Page-aligned for the benefit of paravirt? */
688 .align PAGE_SIZE
689ENTRY(initial_page_table)
690 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 /* low identity map */
691# if KPMDS == 3
692 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
693 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0
694 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x2000),0
695# elif KPMDS == 2
696 .long 0,0
697 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
698 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0
699# elif KPMDS == 1
700 .long 0,0
701 .long 0,0
702 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
703# else
704# error "Kernel PMDs should be 1, 2 or 3"
705# endif
706 .align PAGE_SIZE /* needs to be page-sized too */
707#endif
708
709.data
710.balign 4
711ENTRY(stack_start)
712 .long init_thread_union+THREAD_SIZE
713
714__INITRODATA
715int_msg:
716 .asciz "Unknown interrupt or fault at: %p %p %p\n"
717
718fault_msg:
719/* fault info: */
720 .ascii "BUG: Int %d: CR2 %p\n"
721/* regs pushed in early_idt_handler: */
722 .ascii " EDI %p ESI %p EBP %p EBX %p\n"
723 .ascii " ESP %p ES %p DS %p\n"
724 .ascii " EDX %p ECX %p EAX %p\n"
725/* fault frame: */
726 .ascii " vec %p err %p EIP %p CS %p flg %p\n"
727 .ascii "Stack: %p %p %p %p %p %p %p %p\n"
728 .ascii " %p %p %p %p %p %p %p %p\n"
729 .asciz " %p %p %p %p %p %p %p %p\n"
730
731#include "../../x86/xen/xen-head.S"
732
733/*
734 * The IDT and GDT 'descriptors' are a strange 48-bit object
735 * only used by the lidt and lgdt instructions. They are not
736 * like usual segment descriptors - they consist of a 16-bit
737 * segment size, and 32-bit linear address value:
738 */
739
740 .data
741.globl boot_gdt_descr
742.globl idt_descr
743
744 ALIGN
745# early boot GDT descriptor (must use 1:1 address mapping)
746 .word 0 # 32 bit align gdt_desc.address
747boot_gdt_descr:
748 .word __BOOT_DS+7
749 .long boot_gdt - __PAGE_OFFSET
750
751 .word 0 # 32-bit align idt_desc.address
752idt_descr:
753 .word IDT_ENTRIES*8-1 # idt contains 256 entries
754 .long idt_table
755
756# boot GDT descriptor (later on used by CPU#0):
757 .word 0 # 32 bit align gdt_desc.address
758ENTRY(early_gdt_descr)
759 .word GDT_ENTRIES*8-1
760 .long gdt_page /* Overwritten for secondary CPUs */
761
762/*
763 * The boot_gdt must mirror the equivalent in setup.S and is
764 * used only for booting.
765 */
766 .align L1_CACHE_BYTES
767ENTRY(boot_gdt)
768 .fill GDT_ENTRY_BOOT_CS,8,0
769 .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */
770 .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */