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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC
4 *
5 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
6 */
7
8#include <dt-bindings/pinctrl/at91.h>
9#include <dt-bindings/interrupt-controller/irq.h>
10#include <dt-bindings/gpio/gpio.h>
11#include <dt-bindings/clock/at91.h>
12#include <dt-bindings/mfd/at91-usart.h>
13
14/ {
15 #address-cells = <1>;
16 #size-cells = <1>;
17 model = "Atmel AT91SAM9261 family SoC";
18 compatible = "atmel,at91sam9261";
19 interrupt-parent = <&aic>;
20
21 aliases {
22 serial0 = &dbgu;
23 serial1 = &usart0;
24 serial2 = &usart1;
25 serial3 = &usart2;
26 gpio0 = &pioA;
27 gpio1 = &pioB;
28 gpio2 = &pioC;
29 tcb0 = &tcb0;
30 i2c0 = &i2c0;
31 ssc0 = &ssc0;
32 ssc1 = &ssc1;
33 ssc2 = &ssc2;
34 };
35
36 cpus {
37 #address-cells = <1>;
38 #size-cells = <0>;
39
40 cpu@0 {
41 compatible = "arm,arm926ej-s";
42 device_type = "cpu";
43 reg = <0>;
44 };
45 };
46
47 memory@20000000 {
48 device_type = "memory";
49 reg = <0x20000000 0x08000000>;
50 };
51
52 clocks {
53 main_xtal: main_xtal {
54 compatible = "fixed-clock";
55 #clock-cells = <0>;
56 clock-frequency = <0>;
57 };
58
59 slow_xtal: slow_xtal {
60 compatible = "fixed-clock";
61 #clock-cells = <0>;
62 clock-frequency = <0>;
63 };
64 };
65
66 sram: sram@300000 {
67 compatible = "mmio-sram";
68 reg = <0x00300000 0x28000>;
69 #address-cells = <1>;
70 #size-cells = <1>;
71 ranges = <0 0x00300000 0x28000>;
72 };
73
74 ahb {
75 compatible = "simple-bus";
76 #address-cells = <1>;
77 #size-cells = <1>;
78 ranges;
79
80 usb0: ohci@500000 {
81 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
82 reg = <0x00500000 0x100000>;
83 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
84 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_SYSTEM 16>, <&pmc PMC_TYPE_SYSTEM 6>;
85 clock-names = "ohci_clk", "hclk", "uhpck";
86 status = "disabled";
87 };
88
89 fb0: fb@600000 {
90 compatible = "atmel,at91sam9261-lcdc";
91 reg = <0x00600000 0x1000>;
92 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
93 pinctrl-names = "default";
94 pinctrl-0 = <&pinctrl_fb>;
95 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_SYSTEM 17>;
96 clock-names = "lcdc_clk", "hclk";
97 status = "disabled";
98 };
99
100 ebi: ebi@10000000 {
101 compatible = "atmel,at91sam9261-ebi";
102 #address-cells = <2>;
103 #size-cells = <1>;
104 atmel,smc = <&smc>;
105 atmel,matrix = <&matrix>;
106 reg = <0x10000000 0x80000000>;
107 ranges = <0x0 0x0 0x10000000 0x10000000
108 0x1 0x0 0x20000000 0x10000000
109 0x2 0x0 0x30000000 0x10000000
110 0x3 0x0 0x40000000 0x10000000
111 0x4 0x0 0x50000000 0x10000000
112 0x5 0x0 0x60000000 0x10000000
113 0x6 0x0 0x70000000 0x10000000
114 0x7 0x0 0x80000000 0x10000000>;
115 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
116 status = "disabled";
117
118 nand_controller: nand-controller {
119 compatible = "atmel,at91sam9261-nand-controller";
120 #address-cells = <2>;
121 #size-cells = <1>;
122 ranges;
123 status = "disabled";
124 };
125 };
126
127 apb {
128 compatible = "simple-bus";
129 #address-cells = <1>;
130 #size-cells = <1>;
131 ranges;
132
133 tcb0: timer@fffa0000 {
134 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
135 #address-cells = <1>;
136 #size-cells = <0>;
137 reg = <0xfffa0000 0x100>;
138 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>,
139 <18 IRQ_TYPE_LEVEL_HIGH 0>,
140 <19 IRQ_TYPE_LEVEL_HIGH 0>;
141 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&slow_xtal>;
142 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
143 };
144
145 usb1: gadget@fffa4000 {
146 compatible = "atmel,at91sam9261-udc";
147 reg = <0xfffa4000 0x4000>;
148 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
149 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>, <&pmc PMC_TYPE_SYSTEM 7>;
150 clock-names = "pclk", "hclk";
151 atmel,matrix = <&matrix>;
152 status = "disabled";
153 };
154
155 mmc0: mmc@fffa8000 {
156 compatible = "atmel,hsmci";
157 reg = <0xfffa8000 0x600>;
158 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
159 pinctrl-names = "default";
160 pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>;
161 #address-cells = <1>;
162 #size-cells = <0>;
163 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
164 clock-names = "mci_clk";
165 status = "disabled";
166 };
167
168 i2c0: i2c@fffac000 {
169 compatible = "atmel,at91sam9261-i2c";
170 pinctrl-names = "default";
171 pinctrl-0 = <&pinctrl_i2c_twi>;
172 reg = <0xfffac000 0x100>;
173 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
174 #address-cells = <1>;
175 #size-cells = <0>;
176 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
177 status = "disabled";
178 };
179
180 usart0: serial@fffb0000 {
181 compatible = "atmel,at91sam9260-usart";
182 reg = <0xfffb0000 0x200>;
183 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
184 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
185 atmel,use-dma-rx;
186 atmel,use-dma-tx;
187 pinctrl-names = "default";
188 pinctrl-0 = <&pinctrl_usart0>;
189 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
190 clock-names = "usart";
191 status = "disabled";
192 };
193
194 usart1: serial@fffb4000 {
195 compatible = "atmel,at91sam9260-usart";
196 reg = <0xfffb4000 0x200>;
197 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
198 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
199 atmel,use-dma-rx;
200 atmel,use-dma-tx;
201 pinctrl-names = "default";
202 pinctrl-0 = <&pinctrl_usart1>;
203 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
204 clock-names = "usart";
205 status = "disabled";
206 };
207
208 usart2: serial@fffb8000{
209 compatible = "atmel,at91sam9260-usart";
210 reg = <0xfffb8000 0x200>;
211 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
212 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
213 atmel,use-dma-rx;
214 atmel,use-dma-tx;
215 pinctrl-names = "default";
216 pinctrl-0 = <&pinctrl_usart2>;
217 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
218 clock-names = "usart";
219 status = "disabled";
220 };
221
222 ssc0: ssc@fffbc000 {
223 compatible = "atmel,at91rm9200-ssc";
224 reg = <0xfffbc000 0x4000>;
225 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
226 pinctrl-names = "default";
227 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
228 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
229 clock-names = "pclk";
230 status = "disabled";
231 };
232
233 ssc1: ssc@fffc0000 {
234 compatible = "atmel,at91rm9200-ssc";
235 reg = <0xfffc0000 0x4000>;
236 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
237 pinctrl-names = "default";
238 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
239 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
240 clock-names = "pclk";
241 status = "disabled";
242 };
243
244 ssc2: ssc@fffc4000 {
245 compatible = "atmel,at91rm9200-ssc";
246 reg = <0xfffc4000 0x4000>;
247 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
248 pinctrl-names = "default";
249 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
250 clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
251 clock-names = "pclk";
252 status = "disabled";
253 };
254
255 spi0: spi@fffc8000 {
256 #address-cells = <1>;
257 #size-cells = <0>;
258 compatible = "atmel,at91rm9200-spi";
259 reg = <0xfffc8000 0x200>;
260 cs-gpios = <0>, <0>, <0>, <0>;
261 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
262 pinctrl-names = "default";
263 pinctrl-0 = <&pinctrl_spi0>;
264 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
265 clock-names = "spi_clk";
266 status = "disabled";
267 };
268
269 spi1: spi@fffcc000 {
270 #address-cells = <1>;
271 #size-cells = <0>;
272 compatible = "atmel,at91rm9200-spi";
273 reg = <0xfffcc000 0x200>;
274 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
275 pinctrl-names = "default";
276 pinctrl-0 = <&pinctrl_spi1>;
277 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
278 clock-names = "spi_clk";
279 status = "disabled";
280 };
281
282 ramc: ramc@ffffea00 {
283 compatible = "atmel,at91sam9260-sdramc";
284 reg = <0xffffea00 0x200>;
285 };
286
287 smc: smc@ffffec00 {
288 compatible = "atmel,at91sam9260-smc", "syscon";
289 reg = <0xffffec00 0x200>;
290 };
291
292 matrix: matrix@ffffee00 {
293 compatible = "atmel,at91sam9261-matrix", "syscon";
294 reg = <0xffffee00 0x200>;
295 };
296
297 aic: interrupt-controller@fffff000 {
298 #interrupt-cells = <3>;
299 compatible = "atmel,at91rm9200-aic";
300 interrupt-controller;
301 reg = <0xfffff000 0x200>;
302 atmel,external-irqs = <29 30 31>;
303 };
304
305 dbgu: serial@fffff200 {
306 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
307 reg = <0xfffff200 0x200>;
308 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
309 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
310 pinctrl-names = "default";
311 pinctrl-0 = <&pinctrl_dbgu>;
312 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
313 clock-names = "usart";
314 status = "disabled";
315 };
316
317 pinctrl@fffff400 {
318 #address-cells = <1>;
319 #size-cells = <1>;
320 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
321 ranges = <0xfffff400 0xfffff400 0x600>;
322
323 atmel,mux-mask =
324 /* A B */
325 <0xffffffff 0xfffffff7>, /* pioA */
326 <0xffffffff 0xfffffff4>, /* pioB */
327 <0xffffffff 0xffffff07>; /* pioC */
328
329 /* shared pinctrl settings */
330 dbgu {
331 pinctrl_dbgu: dbgu-0 {
332 atmel,pins =
333 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
334 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
335 };
336 };
337
338 usart0 {
339 pinctrl_usart0: usart0-0 {
340 atmel,pins =
341 <AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
342 <AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
343 };
344
345 pinctrl_usart0_rts: usart0_rts-0 {
346 atmel,pins =
347 <AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
348 };
349
350 pinctrl_usart0_cts: usart0_cts-0 {
351 atmel,pins =
352 <AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
353 };
354 };
355
356 usart1 {
357 pinctrl_usart1: usart1-0 {
358 atmel,pins =
359 <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
360 <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
361 };
362
363 pinctrl_usart1_rts: usart1_rts-0 {
364 atmel,pins =
365 <AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
366 };
367
368 pinctrl_usart1_cts: usart1_cts-0 {
369 atmel,pins =
370 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
371 };
372 };
373
374 usart2 {
375 pinctrl_usart2: usart2-0 {
376 atmel,pins =
377 <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
378 <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
379 };
380
381 pinctrl_usart2_rts: usart2_rts-0 {
382 atmel,pins =
383 <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
384 };
385
386 pinctrl_usart2_cts: usart2_cts-0 {
387 atmel,pins =
388 <AT91_PIOA 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
389 };
390 };
391
392 nand {
393 pinctrl_nand_rb: nand-rb-0 {
394 atmel,pins =
395 <AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
396 };
397
398 pinctrl_nand_cs: nand-cs-0 {
399 atmel,pins =
400 <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
401 };
402 };
403
404 mmc0 {
405 pinctrl_mmc0_clk: mmc0_clk-0 {
406 atmel,pins =
407 <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
408 };
409
410 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
411 atmel,pins =
412 <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
413 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
414 };
415
416 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
417 atmel,pins =
418 <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
419 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
420 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
421 };
422 };
423
424 ssc0 {
425 pinctrl_ssc0_tx: ssc0_tx-0 {
426 atmel,pins =
427 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>,
428 <AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>,
429 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
430 };
431
432 pinctrl_ssc0_rx: ssc0_rx-0 {
433 atmel,pins =
434 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>,
435 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
436 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
437 };
438 };
439
440 ssc1 {
441 pinctrl_ssc1_tx: ssc1_tx-0 {
442 atmel,pins =
443 <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
444 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
445 <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
446 };
447
448 pinctrl_ssc1_rx: ssc1_rx-0 {
449 atmel,pins =
450 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
451 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
452 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
453 };
454 };
455
456 ssc2 {
457 pinctrl_ssc2_tx: ssc2_tx-0 {
458 atmel,pins =
459 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
460 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
461 <AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
462 };
463
464 pinctrl_ssc2_rx: ssc2_rx-0 {
465 atmel,pins =
466 <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>,
467 <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
468 <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
469 };
470 };
471
472 spi0 {
473 pinctrl_spi0: spi0-0 {
474 atmel,pins =
475 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
476 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
477 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
478 };
479 };
480
481 spi1 {
482 pinctrl_spi1: spi1-0 {
483 atmel,pins =
484 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>,
485 <AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>,
486 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
487 };
488 };
489
490 tcb0 {
491 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
492 atmel,pins = <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
493 };
494
495 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
496 atmel,pins = <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
497 };
498
499 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
500 atmel,pins = <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
501 };
502
503 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
504 atmel,pins = <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
505 };
506
507 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
508 atmel,pins = <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
509 };
510
511 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
512 atmel,pins = <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;
513 };
514
515 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
516 atmel,pins = <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
517 };
518
519 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
520 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
521 };
522
523 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
524 atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;
525 };
526 };
527
528 i2c0 {
529 pinctrl_i2c_bitbang: i2c-0-bitbang {
530 atmel,pins =
531 <AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
532 <AT91_PIOA 8 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
533 };
534 pinctrl_i2c_twi: i2c-0-twi {
535 atmel,pins =
536 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
537 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
538 };
539 };
540
541 fb {
542 pinctrl_fb: fb-0 {
543 atmel,pins =
544 <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
545 <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
546 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
547 <AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
548 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>,
549 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
550 <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>,
551 <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>,
552 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE>,
553 <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
554 <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
555 <AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
556 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
557 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
558 <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE>,
559 <AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
560 <AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
561 <AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
562 <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
563 <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>,
564 <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
565 };
566 };
567
568 pioA: gpio@fffff400 {
569 compatible = "atmel,at91rm9200-gpio";
570 reg = <0xfffff400 0x200>;
571 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
572 #gpio-cells = <2>;
573 gpio-controller;
574 interrupt-controller;
575 #interrupt-cells = <2>;
576 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
577 };
578
579 pioB: gpio@fffff600 {
580 compatible = "atmel,at91rm9200-gpio";
581 reg = <0xfffff600 0x200>;
582 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
583 #gpio-cells = <2>;
584 gpio-controller;
585 interrupt-controller;
586 #interrupt-cells = <2>;
587 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
588 };
589
590 pioC: gpio@fffff800 {
591 compatible = "atmel,at91rm9200-gpio";
592 reg = <0xfffff800 0x200>;
593 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
594 #gpio-cells = <2>;
595 gpio-controller;
596 interrupt-controller;
597 #interrupt-cells = <2>;
598 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
599 };
600 };
601
602 pmc: pmc@fffffc00 {
603 compatible = "atmel,at91sam9261-pmc", "syscon";
604 reg = <0xfffffc00 0x100>;
605 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
606 #clock-cells = <2>;
607 clocks = <&slow_xtal>, <&main_xtal>;
608 clock-names = "slow_xtal", "main_xtal";
609 };
610
611 reset-controller@fffffd00 {
612 compatible = "atmel,at91sam9260-rstc";
613 reg = <0xfffffd00 0x10>;
614 clocks = <&slow_xtal>;
615 };
616
617 shdwc@fffffd10 {
618 compatible = "atmel,at91sam9260-shdwc";
619 reg = <0xfffffd10 0x10>;
620 clocks = <&slow_xtal>;
621 };
622
623 pit: timer@fffffd30 {
624 compatible = "atmel,at91sam9260-pit";
625 reg = <0xfffffd30 0xf>;
626 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
627 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
628 };
629
630 rtc@fffffd20 {
631 compatible = "atmel,at91sam9260-rtt";
632 reg = <0xfffffd20 0x10>;
633 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
634 clocks = <&slow_xtal>;
635 status = "disabled";
636 };
637
638 watchdog@fffffd40 {
639 compatible = "atmel,at91sam9260-wdt";
640 reg = <0xfffffd40 0x10>;
641 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
642 clocks = <&slow_xtal>;
643 status = "disabled";
644 };
645
646 gpbr: syscon@fffffd50 {
647 compatible = "atmel,at91sam9260-gpbr", "syscon";
648 reg = <0xfffffd50 0x10>;
649 status = "disabled";
650 };
651 };
652 };
653
654 i2c-gpio-0 {
655 compatible = "i2c-gpio";
656 pinctrl-names = "default";
657 pinctrl-0 = <&pinctrl_i2c_bitbang>;
658 gpios = <&pioA 7 GPIO_ACTIVE_HIGH>, /* sda */
659 <&pioA 8 GPIO_ACTIVE_HIGH>; /* scl */
660 i2c-gpio,sda-open-drain;
661 i2c-gpio,scl-open-drain;
662 i2c-gpio,delay-us = <2>; /* ~100 kHz */
663 #address-cells = <1>;
664 #size-cells = <0>;
665 status = "disabled";
666 };
667};
1/*
2 * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC
3 *
4 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
5 *
6 * Licensed under GPLv2 only.
7 */
8
9#include "skeleton.dtsi"
10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/clock/at91.h>
14
15/ {
16 model = "Atmel AT91SAM9261 family SoC";
17 compatible = "atmel,at91sam9261";
18 interrupt-parent = <&aic>;
19
20 aliases {
21 serial0 = &dbgu;
22 serial1 = &usart0;
23 serial2 = &usart1;
24 serial3 = &usart2;
25 gpio0 = &pioA;
26 gpio1 = &pioB;
27 gpio2 = &pioC;
28 tcb0 = &tcb0;
29 i2c0 = &i2c0;
30 ssc0 = &ssc0;
31 ssc1 = &ssc1;
32 ssc2 = &ssc2;
33 };
34
35 cpus {
36 #address-cells = <0>;
37 #size-cells = <0>;
38
39 cpu {
40 compatible = "arm,arm926ej-s";
41 device_type = "cpu";
42 };
43 };
44
45 memory {
46 reg = <0x20000000 0x08000000>;
47 };
48
49 clocks {
50 main_xtal: main_xtal {
51 compatible = "fixed-clock";
52 #clock-cells = <0>;
53 clock-frequency = <0>;
54 };
55
56 slow_xtal: slow_xtal {
57 compatible = "fixed-clock";
58 #clock-cells = <0>;
59 clock-frequency = <0>;
60 };
61 };
62
63 sram: sram@300000 {
64 compatible = "mmio-sram";
65 reg = <0x00300000 0x28000>;
66 };
67
68 ahb {
69 compatible = "simple-bus";
70 #address-cells = <1>;
71 #size-cells = <1>;
72 ranges;
73
74 usb0: ohci@500000 {
75 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
76 reg = <0x00500000 0x100000>;
77 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
78 clocks = <&ohci_clk>, <&hclk0>, <&uhpck>;
79 clock-names = "ohci_clk", "hclk", "uhpck";
80 status = "disabled";
81 };
82
83 fb0: fb@600000 {
84 compatible = "atmel,at91sam9261-lcdc";
85 reg = <0x00600000 0x1000>;
86 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
87 pinctrl-names = "default";
88 pinctrl-0 = <&pinctrl_fb>;
89 clocks = <&lcd_clk>, <&hclk1>;
90 clock-names = "lcdc_clk", "hclk";
91 status = "disabled";
92 };
93
94 ebi: ebi@10000000 {
95 compatible = "atmel,at91sam9261-ebi";
96 #address-cells = <2>;
97 #size-cells = <1>;
98 atmel,smc = <&smc>;
99 atmel,matrix = <&matrix>;
100 reg = <0x10000000 0x80000000>;
101 ranges = <0x0 0x0 0x10000000 0x10000000
102 0x1 0x0 0x20000000 0x10000000
103 0x2 0x0 0x30000000 0x10000000
104 0x3 0x0 0x40000000 0x10000000
105 0x4 0x0 0x50000000 0x10000000
106 0x5 0x0 0x60000000 0x10000000
107 0x6 0x0 0x70000000 0x10000000
108 0x7 0x0 0x80000000 0x10000000>;
109 clocks = <&mck>;
110 status = "disabled";
111
112 nand_controller: nand-controller {
113 compatible = "atmel,at91sam9261-nand-controller";
114 #address-cells = <2>;
115 #size-cells = <1>;
116 ranges;
117 status = "disabled";
118 };
119 };
120
121 apb {
122 compatible = "simple-bus";
123 #address-cells = <1>;
124 #size-cells = <1>;
125 ranges;
126
127 tcb0: timer@fffa0000 {
128 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
129 #address-cells = <1>;
130 #size-cells = <0>;
131 reg = <0xfffa0000 0x100>;
132 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>,
133 <18 IRQ_TYPE_LEVEL_HIGH 0>,
134 <19 IRQ_TYPE_LEVEL_HIGH 0>;
135 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&slow_xtal>;
136 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
137 };
138
139 usb1: gadget@fffa4000 {
140 compatible = "atmel,at91sam9261-udc";
141 reg = <0xfffa4000 0x4000>;
142 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
143 clocks = <&udc_clk>, <&udpck>;
144 clock-names = "pclk", "hclk";
145 atmel,matrix = <&matrix>;
146 status = "disabled";
147 };
148
149 mmc0: mmc@fffa8000 {
150 compatible = "atmel,hsmci";
151 reg = <0xfffa8000 0x600>;
152 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
153 pinctrl-names = "default";
154 pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>;
155 #address-cells = <1>;
156 #size-cells = <0>;
157 clocks = <&mci0_clk>;
158 clock-names = "mci_clk";
159 status = "disabled";
160 };
161
162 i2c0: i2c@fffac000 {
163 compatible = "atmel,at91sam9261-i2c";
164 pinctrl-names = "default";
165 pinctrl-0 = <&pinctrl_i2c_twi>;
166 reg = <0xfffac000 0x100>;
167 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
168 #address-cells = <1>;
169 #size-cells = <0>;
170 clocks = <&twi0_clk>;
171 status = "disabled";
172 };
173
174 usart0: serial@fffb0000 {
175 compatible = "atmel,at91sam9260-usart";
176 reg = <0xfffb0000 0x200>;
177 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
178 atmel,use-dma-rx;
179 atmel,use-dma-tx;
180 pinctrl-names = "default";
181 pinctrl-0 = <&pinctrl_usart0>;
182 clocks = <&usart0_clk>;
183 clock-names = "usart";
184 status = "disabled";
185 };
186
187 usart1: serial@fffb4000 {
188 compatible = "atmel,at91sam9260-usart";
189 reg = <0xfffb4000 0x200>;
190 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
191 atmel,use-dma-rx;
192 atmel,use-dma-tx;
193 pinctrl-names = "default";
194 pinctrl-0 = <&pinctrl_usart1>;
195 clocks = <&usart1_clk>;
196 clock-names = "usart";
197 status = "disabled";
198 };
199
200 usart2: serial@fffb8000{
201 compatible = "atmel,at91sam9260-usart";
202 reg = <0xfffb8000 0x200>;
203 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
204 atmel,use-dma-rx;
205 atmel,use-dma-tx;
206 pinctrl-names = "default";
207 pinctrl-0 = <&pinctrl_usart2>;
208 clocks = <&usart2_clk>;
209 clock-names = "usart";
210 status = "disabled";
211 };
212
213 ssc0: ssc@fffbc000 {
214 compatible = "atmel,at91rm9200-ssc";
215 reg = <0xfffbc000 0x4000>;
216 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
217 pinctrl-names = "default";
218 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
219 clocks = <&ssc0_clk>;
220 clock-names = "pclk";
221 status = "disabled";
222 };
223
224 ssc1: ssc@fffc0000 {
225 compatible = "atmel,at91rm9200-ssc";
226 reg = <0xfffc0000 0x4000>;
227 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
228 pinctrl-names = "default";
229 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
230 clocks = <&ssc1_clk>;
231 clock-names = "pclk";
232 status = "disabled";
233 };
234
235 ssc2: ssc@fffc4000 {
236 compatible = "atmel,at91rm9200-ssc";
237 reg = <0xfffc4000 0x4000>;
238 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
239 pinctrl-names = "default";
240 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
241 clocks = <&ssc2_clk>;
242 clock-names = "pclk";
243 status = "disabled";
244 };
245
246 spi0: spi@fffc8000 {
247 #address-cells = <1>;
248 #size-cells = <0>;
249 compatible = "atmel,at91rm9200-spi";
250 reg = <0xfffc8000 0x200>;
251 cs-gpios = <0>, <0>, <0>, <0>;
252 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
253 pinctrl-names = "default";
254 pinctrl-0 = <&pinctrl_spi0>;
255 clocks = <&spi0_clk>;
256 clock-names = "spi_clk";
257 status = "disabled";
258 };
259
260 spi1: spi@fffcc000 {
261 #address-cells = <1>;
262 #size-cells = <0>;
263 compatible = "atmel,at91rm9200-spi";
264 reg = <0xfffcc000 0x200>;
265 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
266 pinctrl-names = "default";
267 pinctrl-0 = <&pinctrl_spi1>;
268 clocks = <&spi1_clk>;
269 clock-names = "spi_clk";
270 status = "disabled";
271 };
272
273 ramc: ramc@ffffea00 {
274 compatible = "atmel,at91sam9260-sdramc";
275 reg = <0xffffea00 0x200>;
276 };
277
278 smc: smc@ffffec00 {
279 compatible = "atmel,at91sam9260-smc", "syscon";
280 reg = <0xffffec00 0x200>;
281 };
282
283 matrix: matrix@ffffee00 {
284 compatible = "atmel,at91sam9261-matrix", "syscon";
285 reg = <0xffffee00 0x200>;
286 };
287
288 aic: interrupt-controller@fffff000 {
289 #interrupt-cells = <3>;
290 compatible = "atmel,at91rm9200-aic";
291 interrupt-controller;
292 reg = <0xfffff000 0x200>;
293 atmel,external-irqs = <29 30 31>;
294 };
295
296 dbgu: serial@fffff200 {
297 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
298 reg = <0xfffff200 0x200>;
299 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
300 pinctrl-names = "default";
301 pinctrl-0 = <&pinctrl_dbgu>;
302 clocks = <&mck>;
303 clock-names = "usart";
304 status = "disabled";
305 };
306
307 pinctrl@fffff400 {
308 #address-cells = <1>;
309 #size-cells = <1>;
310 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
311 ranges = <0xfffff400 0xfffff400 0x600>;
312
313 atmel,mux-mask =
314 /* A B */
315 <0xffffffff 0xfffffff7>, /* pioA */
316 <0xffffffff 0xfffffff4>, /* pioB */
317 <0xffffffff 0xffffff07>; /* pioC */
318
319 /* shared pinctrl settings */
320 dbgu {
321 pinctrl_dbgu: dbgu-0 {
322 atmel,pins =
323 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
324 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
325 };
326 };
327
328 usart0 {
329 pinctrl_usart0: usart0-0 {
330 atmel,pins =
331 <AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE>,
332 <AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
333 };
334
335 pinctrl_usart0_rts: usart0_rts-0 {
336 atmel,pins =
337 <AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
338 };
339
340 pinctrl_usart0_cts: usart0_cts-0 {
341 atmel,pins =
342 <AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
343 };
344 };
345
346 usart1 {
347 pinctrl_usart1: usart1-0 {
348 atmel,pins =
349 <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE>,
350 <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
351 };
352
353 pinctrl_usart1_rts: usart1_rts-0 {
354 atmel,pins =
355 <AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
356 };
357
358 pinctrl_usart1_cts: usart1_cts-0 {
359 atmel,pins =
360 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
361 };
362 };
363
364 usart2 {
365 pinctrl_usart2: usart2-0 {
366 atmel,pins =
367 <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE>,
368 <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
369 };
370
371 pinctrl_usart2_rts: usart2_rts-0 {
372 atmel,pins =
373 <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
374 };
375
376 pinctrl_usart2_cts: usart2_cts-0 {
377 atmel,pins =
378 <AT91_PIOA 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
379 };
380 };
381
382 nand {
383 pinctrl_nand_rb: nand-rb-0 {
384 atmel,pins =
385 <AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
386 };
387
388 pinctrl_nand_cs: nand-cs-0 {
389 atmel,pins =
390 <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
391 };
392 };
393
394 mmc0 {
395 pinctrl_mmc0_clk: mmc0_clk-0 {
396 atmel,pins =
397 <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
398 };
399
400 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
401 atmel,pins =
402 <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
403 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
404 };
405
406 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
407 atmel,pins =
408 <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
409 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
410 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
411 };
412 };
413
414 ssc0 {
415 pinctrl_ssc0_tx: ssc0_tx-0 {
416 atmel,pins =
417 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>,
418 <AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>,
419 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
420 };
421
422 pinctrl_ssc0_rx: ssc0_rx-0 {
423 atmel,pins =
424 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>,
425 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
426 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
427 };
428 };
429
430 ssc1 {
431 pinctrl_ssc1_tx: ssc1_tx-0 {
432 atmel,pins =
433 <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
434 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
435 <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
436 };
437
438 pinctrl_ssc1_rx: ssc1_rx-0 {
439 atmel,pins =
440 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
441 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
442 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
443 };
444 };
445
446 ssc2 {
447 pinctrl_ssc2_tx: ssc2_tx-0 {
448 atmel,pins =
449 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
450 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
451 <AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
452 };
453
454 pinctrl_ssc2_rx: ssc2_rx-0 {
455 atmel,pins =
456 <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>,
457 <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
458 <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
459 };
460 };
461
462 spi0 {
463 pinctrl_spi0: spi0-0 {
464 atmel,pins =
465 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
466 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
467 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
468 };
469 };
470
471 spi1 {
472 pinctrl_spi1: spi1-0 {
473 atmel,pins =
474 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>,
475 <AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>,
476 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
477 };
478 };
479
480 tcb0 {
481 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
482 atmel,pins = <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
483 };
484
485 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
486 atmel,pins = <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
487 };
488
489 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
490 atmel,pins = <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
491 };
492
493 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
494 atmel,pins = <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
495 };
496
497 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
498 atmel,pins = <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
499 };
500
501 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
502 atmel,pins = <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;
503 };
504
505 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
506 atmel,pins = <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
507 };
508
509 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
510 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
511 };
512
513 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
514 atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;
515 };
516 };
517
518 i2c0 {
519 pinctrl_i2c_bitbang: i2c-0-bitbang {
520 atmel,pins =
521 <AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
522 <AT91_PIOA 8 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
523 };
524 pinctrl_i2c_twi: i2c-0-twi {
525 atmel,pins =
526 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
527 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
528 };
529 };
530
531 fb {
532 pinctrl_fb: fb-0 {
533 atmel,pins =
534 <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
535 <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
536 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
537 <AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
538 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>,
539 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
540 <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>,
541 <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>,
542 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE>,
543 <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
544 <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
545 <AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
546 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
547 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
548 <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE>,
549 <AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
550 <AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
551 <AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
552 <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
553 <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>,
554 <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
555 };
556 };
557
558 pioA: gpio@fffff400 {
559 compatible = "atmel,at91rm9200-gpio";
560 reg = <0xfffff400 0x200>;
561 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
562 #gpio-cells = <2>;
563 gpio-controller;
564 interrupt-controller;
565 #interrupt-cells = <2>;
566 clocks = <&pioA_clk>;
567 };
568
569 pioB: gpio@fffff600 {
570 compatible = "atmel,at91rm9200-gpio";
571 reg = <0xfffff600 0x200>;
572 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
573 #gpio-cells = <2>;
574 gpio-controller;
575 interrupt-controller;
576 #interrupt-cells = <2>;
577 clocks = <&pioB_clk>;
578 };
579
580 pioC: gpio@fffff800 {
581 compatible = "atmel,at91rm9200-gpio";
582 reg = <0xfffff800 0x200>;
583 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
584 #gpio-cells = <2>;
585 gpio-controller;
586 interrupt-controller;
587 #interrupt-cells = <2>;
588 clocks = <&pioC_clk>;
589 };
590 };
591
592 pmc: pmc@fffffc00 {
593 compatible = "atmel,at91rm9200-pmc", "syscon";
594 reg = <0xfffffc00 0x100>;
595 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
596 interrupt-controller;
597 #address-cells = <1>;
598 #size-cells = <0>;
599 #interrupt-cells = <1>;
600
601 main_osc: main_osc {
602 compatible = "atmel,at91rm9200-clk-main-osc";
603 #clock-cells = <0>;
604 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
605 clocks = <&main_xtal>;
606 };
607
608 main: mainck {
609 compatible = "atmel,at91rm9200-clk-main";
610 #clock-cells = <0>;
611 clocks = <&main_osc>;
612 };
613
614 plla: pllack {
615 compatible = "atmel,at91rm9200-clk-pll";
616 #clock-cells = <0>;
617 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
618 clocks = <&main>;
619 reg = <0>;
620 atmel,clk-input-range = <1000000 32000000>;
621 #atmel,pll-clk-output-range-cells = <4>;
622 atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
623 <190000000 240000000 2 1>;
624 };
625
626 pllb: pllbck {
627 compatible = "atmel,at91rm9200-clk-pll";
628 #clock-cells = <0>;
629 interrupts-extended = <&pmc AT91_PMC_LOCKB>;
630 clocks = <&main>;
631 reg = <1>;
632 atmel,clk-input-range = <1000000 5000000>;
633 #atmel,pll-clk-output-range-cells = <4>;
634 atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
635 };
636
637 mck: masterck {
638 compatible = "atmel,at91rm9200-clk-master";
639 #clock-cells = <0>;
640 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
641 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
642 atmel,clk-output-range = <0 94000000>;
643 atmel,clk-divisors = <1 2 4 0>;
644 };
645
646 usb: usbck {
647 compatible = "atmel,at91rm9200-clk-usb";
648 #clock-cells = <0>;
649 atmel,clk-divisors = <1 2 4 0>;
650 clocks = <&pllb>;
651 };
652
653 prog: progck {
654 compatible = "atmel,at91rm9200-clk-programmable";
655 #address-cells = <1>;
656 #size-cells = <0>;
657 interrupt-parent = <&pmc>;
658 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
659
660 prog0: prog0 {
661 #clock-cells = <0>;
662 reg = <0>;
663 interrupts = <AT91_PMC_PCKRDY(0)>;
664 };
665
666 prog1: prog1 {
667 #clock-cells = <0>;
668 reg = <1>;
669 interrupts = <AT91_PMC_PCKRDY(1)>;
670 };
671
672 prog2: prog2 {
673 #clock-cells = <0>;
674 reg = <2>;
675 interrupts = <AT91_PMC_PCKRDY(2)>;
676 };
677
678 prog3: prog3 {
679 #clock-cells = <0>;
680 reg = <3>;
681 interrupts = <AT91_PMC_PCKRDY(3)>;
682 };
683 };
684
685 systemck {
686 compatible = "atmel,at91rm9200-clk-system";
687 #address-cells = <1>;
688 #size-cells = <0>;
689
690 uhpck: uhpck {
691 #clock-cells = <0>;
692 reg = <6>;
693 clocks = <&usb>;
694 };
695
696 udpck: udpck {
697 #clock-cells = <0>;
698 reg = <7>;
699 clocks = <&usb>;
700 };
701
702 pck0: pck0 {
703 #clock-cells = <0>;
704 reg = <8>;
705 clocks = <&prog0>;
706 };
707
708 pck1: pck1 {
709 #clock-cells = <0>;
710 reg = <9>;
711 clocks = <&prog1>;
712 };
713
714 pck2: pck2 {
715 #clock-cells = <0>;
716 reg = <10>;
717 clocks = <&prog2>;
718 };
719
720 pck3: pck3 {
721 #clock-cells = <0>;
722 reg = <11>;
723 clocks = <&prog3>;
724 };
725
726 hclk0: hclk0 {
727 #clock-cells = <0>;
728 reg = <16>;
729 clocks = <&mck>;
730 };
731
732 hclk1: hclk1 {
733 #clock-cells = <0>;
734 reg = <17>;
735 clocks = <&mck>;
736 };
737 };
738
739 periphck {
740 compatible = "atmel,at91rm9200-clk-peripheral";
741 #address-cells = <1>;
742 #size-cells = <0>;
743 clocks = <&mck>;
744
745 pioA_clk: pioA_clk {
746 #clock-cells = <0>;
747 reg = <2>;
748 };
749
750 pioB_clk: pioB_clk {
751 #clock-cells = <0>;
752 reg = <3>;
753 };
754
755 pioC_clk: pioC_clk {
756 #clock-cells = <0>;
757 reg = <4>;
758 };
759
760 usart0_clk: usart0_clk {
761 #clock-cells = <0>;
762 reg = <6>;
763 };
764
765 usart1_clk: usart1_clk {
766 #clock-cells = <0>;
767 reg = <7>;
768 };
769
770 usart2_clk: usart2_clk {
771 #clock-cells = <0>;
772 reg = <8>;
773 };
774
775 mci0_clk: mci0_clk {
776 #clock-cells = <0>;
777 reg = <9>;
778 };
779
780 udc_clk: udc_clk {
781 #clock-cells = <0>;
782 reg = <10>;
783 };
784
785 twi0_clk: twi0_clk {
786 reg = <11>;
787 #clock-cells = <0>;
788 };
789
790 spi0_clk: spi0_clk {
791 #clock-cells = <0>;
792 reg = <12>;
793 };
794
795 spi1_clk: spi1_clk {
796 #clock-cells = <0>;
797 reg = <13>;
798 };
799
800 ssc0_clk: ssc0_clk {
801 #clock-cells = <0>;
802 reg = <14>;
803 };
804
805 ssc1_clk: ssc1_clk {
806 #clock-cells = <0>;
807 reg = <15>;
808 };
809
810 ssc2_clk: ssc2_clk {
811 #clock-cells = <0>;
812 reg = <16>;
813 };
814
815 tc0_clk: tc0_clk {
816 #clock-cells = <0>;
817 reg = <17>;
818 };
819
820 tc1_clk: tc1_clk {
821 #clock-cells = <0>;
822 reg = <18>;
823 };
824
825 tc2_clk: tc2_clk {
826 #clock-cells = <0>;
827 reg = <19>;
828 };
829
830 ohci_clk: ohci_clk {
831 #clock-cells = <0>;
832 reg = <20>;
833 };
834
835 lcd_clk: lcd_clk {
836 #clock-cells = <0>;
837 reg = <21>;
838 };
839 };
840 };
841
842 rstc@fffffd00 {
843 compatible = "atmel,at91sam9260-rstc";
844 reg = <0xfffffd00 0x10>;
845 clocks = <&slow_xtal>;
846 };
847
848 shdwc@fffffd10 {
849 compatible = "atmel,at91sam9260-shdwc";
850 reg = <0xfffffd10 0x10>;
851 clocks = <&slow_xtal>;
852 };
853
854 pit: timer@fffffd30 {
855 compatible = "atmel,at91sam9260-pit";
856 reg = <0xfffffd30 0xf>;
857 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
858 clocks = <&mck>;
859 };
860
861 rtc@fffffd20 {
862 compatible = "atmel,at91sam9260-rtt";
863 reg = <0xfffffd20 0x10>;
864 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
865 clocks = <&slow_xtal>;
866 status = "disabled";
867 };
868
869 watchdog@fffffd40 {
870 compatible = "atmel,at91sam9260-wdt";
871 reg = <0xfffffd40 0x10>;
872 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
873 clocks = <&slow_xtal>;
874 status = "disabled";
875 };
876
877 gpbr: syscon@fffffd50 {
878 compatible = "atmel,at91sam9260-gpbr", "syscon";
879 reg = <0xfffffd50 0x10>;
880 status = "disabled";
881 };
882 };
883 };
884
885 i2c-gpio-0 {
886 compatible = "i2c-gpio";
887 pinctrl-names = "default";
888 pinctrl-0 = <&pinctrl_i2c_bitbang>;
889 gpios = <&pioA 7 GPIO_ACTIVE_HIGH>, /* sda */
890 <&pioA 8 GPIO_ACTIVE_HIGH>; /* scl */
891 i2c-gpio,sda-open-drain;
892 i2c-gpio,scl-open-drain;
893 i2c-gpio,delay-us = <2>; /* ~100 kHz */
894 #address-cells = <1>;
895 #size-cells = <0>;
896 status = "disabled";
897 };
898};