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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC
4 *
5 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
6 */
7
8#include <dt-bindings/pinctrl/at91.h>
9#include <dt-bindings/interrupt-controller/irq.h>
10#include <dt-bindings/gpio/gpio.h>
11#include <dt-bindings/clock/at91.h>
12#include <dt-bindings/mfd/at91-usart.h>
13
14/ {
15 #address-cells = <1>;
16 #size-cells = <1>;
17 model = "Atmel AT91SAM9261 family SoC";
18 compatible = "atmel,at91sam9261";
19 interrupt-parent = <&aic>;
20
21 aliases {
22 serial0 = &dbgu;
23 serial1 = &usart0;
24 serial2 = &usart1;
25 serial3 = &usart2;
26 gpio0 = &pioA;
27 gpio1 = &pioB;
28 gpio2 = &pioC;
29 tcb0 = &tcb0;
30 i2c0 = &i2c0;
31 ssc0 = &ssc0;
32 ssc1 = &ssc1;
33 ssc2 = &ssc2;
34 };
35
36 cpus {
37 #address-cells = <1>;
38 #size-cells = <0>;
39
40 cpu@0 {
41 compatible = "arm,arm926ej-s";
42 device_type = "cpu";
43 reg = <0>;
44 };
45 };
46
47 memory@20000000 {
48 device_type = "memory";
49 reg = <0x20000000 0x08000000>;
50 };
51
52 clocks {
53 main_xtal: main_xtal {
54 compatible = "fixed-clock";
55 #clock-cells = <0>;
56 clock-frequency = <0>;
57 };
58
59 slow_xtal: slow_xtal {
60 compatible = "fixed-clock";
61 #clock-cells = <0>;
62 clock-frequency = <0>;
63 };
64 };
65
66 sram: sram@300000 {
67 compatible = "mmio-sram";
68 reg = <0x00300000 0x28000>;
69 #address-cells = <1>;
70 #size-cells = <1>;
71 ranges = <0 0x00300000 0x28000>;
72 };
73
74 ahb {
75 compatible = "simple-bus";
76 #address-cells = <1>;
77 #size-cells = <1>;
78 ranges;
79
80 usb0: ohci@500000 {
81 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
82 reg = <0x00500000 0x100000>;
83 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
84 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_SYSTEM 16>, <&pmc PMC_TYPE_SYSTEM 6>;
85 clock-names = "ohci_clk", "hclk", "uhpck";
86 status = "disabled";
87 };
88
89 fb0: fb@600000 {
90 compatible = "atmel,at91sam9261-lcdc";
91 reg = <0x00600000 0x1000>;
92 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
93 pinctrl-names = "default";
94 pinctrl-0 = <&pinctrl_fb>;
95 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_SYSTEM 17>;
96 clock-names = "lcdc_clk", "hclk";
97 status = "disabled";
98 };
99
100 ebi: ebi@10000000 {
101 compatible = "atmel,at91sam9261-ebi";
102 #address-cells = <2>;
103 #size-cells = <1>;
104 atmel,smc = <&smc>;
105 atmel,matrix = <&matrix>;
106 reg = <0x10000000 0x80000000>;
107 ranges = <0x0 0x0 0x10000000 0x10000000
108 0x1 0x0 0x20000000 0x10000000
109 0x2 0x0 0x30000000 0x10000000
110 0x3 0x0 0x40000000 0x10000000
111 0x4 0x0 0x50000000 0x10000000
112 0x5 0x0 0x60000000 0x10000000
113 0x6 0x0 0x70000000 0x10000000
114 0x7 0x0 0x80000000 0x10000000>;
115 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
116 status = "disabled";
117
118 nand_controller: nand-controller {
119 compatible = "atmel,at91sam9261-nand-controller";
120 #address-cells = <2>;
121 #size-cells = <1>;
122 ranges;
123 status = "disabled";
124 };
125 };
126
127 apb {
128 compatible = "simple-bus";
129 #address-cells = <1>;
130 #size-cells = <1>;
131 ranges;
132
133 tcb0: timer@fffa0000 {
134 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
135 #address-cells = <1>;
136 #size-cells = <0>;
137 reg = <0xfffa0000 0x100>;
138 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>,
139 <18 IRQ_TYPE_LEVEL_HIGH 0>,
140 <19 IRQ_TYPE_LEVEL_HIGH 0>;
141 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&slow_xtal>;
142 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
143 };
144
145 usb1: gadget@fffa4000 {
146 compatible = "atmel,at91sam9261-udc";
147 reg = <0xfffa4000 0x4000>;
148 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
149 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>, <&pmc PMC_TYPE_SYSTEM 7>;
150 clock-names = "pclk", "hclk";
151 atmel,matrix = <&matrix>;
152 status = "disabled";
153 };
154
155 mmc0: mmc@fffa8000 {
156 compatible = "atmel,hsmci";
157 reg = <0xfffa8000 0x600>;
158 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
159 pinctrl-names = "default";
160 pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>;
161 #address-cells = <1>;
162 #size-cells = <0>;
163 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
164 clock-names = "mci_clk";
165 status = "disabled";
166 };
167
168 i2c0: i2c@fffac000 {
169 compatible = "atmel,at91sam9261-i2c";
170 pinctrl-names = "default";
171 pinctrl-0 = <&pinctrl_i2c_twi>;
172 reg = <0xfffac000 0x100>;
173 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
174 #address-cells = <1>;
175 #size-cells = <0>;
176 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
177 status = "disabled";
178 };
179
180 usart0: serial@fffb0000 {
181 compatible = "atmel,at91sam9260-usart";
182 reg = <0xfffb0000 0x200>;
183 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
184 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
185 atmel,use-dma-rx;
186 atmel,use-dma-tx;
187 pinctrl-names = "default";
188 pinctrl-0 = <&pinctrl_usart0>;
189 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
190 clock-names = "usart";
191 status = "disabled";
192 };
193
194 usart1: serial@fffb4000 {
195 compatible = "atmel,at91sam9260-usart";
196 reg = <0xfffb4000 0x200>;
197 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
198 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
199 atmel,use-dma-rx;
200 atmel,use-dma-tx;
201 pinctrl-names = "default";
202 pinctrl-0 = <&pinctrl_usart1>;
203 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
204 clock-names = "usart";
205 status = "disabled";
206 };
207
208 usart2: serial@fffb8000{
209 compatible = "atmel,at91sam9260-usart";
210 reg = <0xfffb8000 0x200>;
211 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
212 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
213 atmel,use-dma-rx;
214 atmel,use-dma-tx;
215 pinctrl-names = "default";
216 pinctrl-0 = <&pinctrl_usart2>;
217 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
218 clock-names = "usart";
219 status = "disabled";
220 };
221
222 ssc0: ssc@fffbc000 {
223 compatible = "atmel,at91rm9200-ssc";
224 reg = <0xfffbc000 0x4000>;
225 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
226 pinctrl-names = "default";
227 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
228 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
229 clock-names = "pclk";
230 status = "disabled";
231 };
232
233 ssc1: ssc@fffc0000 {
234 compatible = "atmel,at91rm9200-ssc";
235 reg = <0xfffc0000 0x4000>;
236 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
237 pinctrl-names = "default";
238 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
239 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
240 clock-names = "pclk";
241 status = "disabled";
242 };
243
244 ssc2: ssc@fffc4000 {
245 compatible = "atmel,at91rm9200-ssc";
246 reg = <0xfffc4000 0x4000>;
247 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
248 pinctrl-names = "default";
249 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
250 clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
251 clock-names = "pclk";
252 status = "disabled";
253 };
254
255 spi0: spi@fffc8000 {
256 #address-cells = <1>;
257 #size-cells = <0>;
258 compatible = "atmel,at91rm9200-spi";
259 reg = <0xfffc8000 0x200>;
260 cs-gpios = <0>, <0>, <0>, <0>;
261 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
262 pinctrl-names = "default";
263 pinctrl-0 = <&pinctrl_spi0>;
264 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
265 clock-names = "spi_clk";
266 status = "disabled";
267 };
268
269 spi1: spi@fffcc000 {
270 #address-cells = <1>;
271 #size-cells = <0>;
272 compatible = "atmel,at91rm9200-spi";
273 reg = <0xfffcc000 0x200>;
274 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
275 pinctrl-names = "default";
276 pinctrl-0 = <&pinctrl_spi1>;
277 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
278 clock-names = "spi_clk";
279 status = "disabled";
280 };
281
282 ramc: ramc@ffffea00 {
283 compatible = "atmel,at91sam9260-sdramc";
284 reg = <0xffffea00 0x200>;
285 };
286
287 smc: smc@ffffec00 {
288 compatible = "atmel,at91sam9260-smc", "syscon";
289 reg = <0xffffec00 0x200>;
290 };
291
292 matrix: matrix@ffffee00 {
293 compatible = "atmel,at91sam9261-matrix", "syscon";
294 reg = <0xffffee00 0x200>;
295 };
296
297 aic: interrupt-controller@fffff000 {
298 #interrupt-cells = <3>;
299 compatible = "atmel,at91rm9200-aic";
300 interrupt-controller;
301 reg = <0xfffff000 0x200>;
302 atmel,external-irqs = <29 30 31>;
303 };
304
305 dbgu: serial@fffff200 {
306 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
307 reg = <0xfffff200 0x200>;
308 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
309 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
310 pinctrl-names = "default";
311 pinctrl-0 = <&pinctrl_dbgu>;
312 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
313 clock-names = "usart";
314 status = "disabled";
315 };
316
317 pinctrl@fffff400 {
318 #address-cells = <1>;
319 #size-cells = <1>;
320 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
321 ranges = <0xfffff400 0xfffff400 0x600>;
322
323 atmel,mux-mask =
324 /* A B */
325 <0xffffffff 0xfffffff7>, /* pioA */
326 <0xffffffff 0xfffffff4>, /* pioB */
327 <0xffffffff 0xffffff07>; /* pioC */
328
329 /* shared pinctrl settings */
330 dbgu {
331 pinctrl_dbgu: dbgu-0 {
332 atmel,pins =
333 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
334 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
335 };
336 };
337
338 usart0 {
339 pinctrl_usart0: usart0-0 {
340 atmel,pins =
341 <AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
342 <AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
343 };
344
345 pinctrl_usart0_rts: usart0_rts-0 {
346 atmel,pins =
347 <AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
348 };
349
350 pinctrl_usart0_cts: usart0_cts-0 {
351 atmel,pins =
352 <AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
353 };
354 };
355
356 usart1 {
357 pinctrl_usart1: usart1-0 {
358 atmel,pins =
359 <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
360 <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
361 };
362
363 pinctrl_usart1_rts: usart1_rts-0 {
364 atmel,pins =
365 <AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
366 };
367
368 pinctrl_usart1_cts: usart1_cts-0 {
369 atmel,pins =
370 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
371 };
372 };
373
374 usart2 {
375 pinctrl_usart2: usart2-0 {
376 atmel,pins =
377 <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
378 <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
379 };
380
381 pinctrl_usart2_rts: usart2_rts-0 {
382 atmel,pins =
383 <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
384 };
385
386 pinctrl_usart2_cts: usart2_cts-0 {
387 atmel,pins =
388 <AT91_PIOA 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
389 };
390 };
391
392 nand {
393 pinctrl_nand_rb: nand-rb-0 {
394 atmel,pins =
395 <AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
396 };
397
398 pinctrl_nand_cs: nand-cs-0 {
399 atmel,pins =
400 <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
401 };
402 };
403
404 mmc0 {
405 pinctrl_mmc0_clk: mmc0_clk-0 {
406 atmel,pins =
407 <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
408 };
409
410 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
411 atmel,pins =
412 <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
413 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
414 };
415
416 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
417 atmel,pins =
418 <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
419 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
420 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
421 };
422 };
423
424 ssc0 {
425 pinctrl_ssc0_tx: ssc0_tx-0 {
426 atmel,pins =
427 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>,
428 <AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>,
429 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
430 };
431
432 pinctrl_ssc0_rx: ssc0_rx-0 {
433 atmel,pins =
434 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>,
435 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
436 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
437 };
438 };
439
440 ssc1 {
441 pinctrl_ssc1_tx: ssc1_tx-0 {
442 atmel,pins =
443 <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
444 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
445 <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
446 };
447
448 pinctrl_ssc1_rx: ssc1_rx-0 {
449 atmel,pins =
450 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
451 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
452 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
453 };
454 };
455
456 ssc2 {
457 pinctrl_ssc2_tx: ssc2_tx-0 {
458 atmel,pins =
459 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
460 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
461 <AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
462 };
463
464 pinctrl_ssc2_rx: ssc2_rx-0 {
465 atmel,pins =
466 <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>,
467 <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
468 <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
469 };
470 };
471
472 spi0 {
473 pinctrl_spi0: spi0-0 {
474 atmel,pins =
475 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
476 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
477 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
478 };
479 };
480
481 spi1 {
482 pinctrl_spi1: spi1-0 {
483 atmel,pins =
484 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>,
485 <AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>,
486 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
487 };
488 };
489
490 tcb0 {
491 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
492 atmel,pins = <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
493 };
494
495 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
496 atmel,pins = <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
497 };
498
499 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
500 atmel,pins = <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
501 };
502
503 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
504 atmel,pins = <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
505 };
506
507 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
508 atmel,pins = <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
509 };
510
511 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
512 atmel,pins = <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;
513 };
514
515 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
516 atmel,pins = <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
517 };
518
519 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
520 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
521 };
522
523 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
524 atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;
525 };
526 };
527
528 i2c0 {
529 pinctrl_i2c_bitbang: i2c-0-bitbang {
530 atmel,pins =
531 <AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
532 <AT91_PIOA 8 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
533 };
534 pinctrl_i2c_twi: i2c-0-twi {
535 atmel,pins =
536 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
537 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
538 };
539 };
540
541 fb {
542 pinctrl_fb: fb-0 {
543 atmel,pins =
544 <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
545 <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
546 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
547 <AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
548 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>,
549 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
550 <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>,
551 <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>,
552 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE>,
553 <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
554 <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
555 <AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
556 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
557 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
558 <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE>,
559 <AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
560 <AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
561 <AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
562 <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
563 <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>,
564 <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
565 };
566 };
567
568 pioA: gpio@fffff400 {
569 compatible = "atmel,at91rm9200-gpio";
570 reg = <0xfffff400 0x200>;
571 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
572 #gpio-cells = <2>;
573 gpio-controller;
574 interrupt-controller;
575 #interrupt-cells = <2>;
576 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
577 };
578
579 pioB: gpio@fffff600 {
580 compatible = "atmel,at91rm9200-gpio";
581 reg = <0xfffff600 0x200>;
582 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
583 #gpio-cells = <2>;
584 gpio-controller;
585 interrupt-controller;
586 #interrupt-cells = <2>;
587 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
588 };
589
590 pioC: gpio@fffff800 {
591 compatible = "atmel,at91rm9200-gpio";
592 reg = <0xfffff800 0x200>;
593 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
594 #gpio-cells = <2>;
595 gpio-controller;
596 interrupt-controller;
597 #interrupt-cells = <2>;
598 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
599 };
600 };
601
602 pmc: pmc@fffffc00 {
603 compatible = "atmel,at91sam9261-pmc", "syscon";
604 reg = <0xfffffc00 0x100>;
605 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
606 #clock-cells = <2>;
607 clocks = <&slow_xtal>, <&main_xtal>;
608 clock-names = "slow_xtal", "main_xtal";
609 };
610
611 reset-controller@fffffd00 {
612 compatible = "atmel,at91sam9260-rstc";
613 reg = <0xfffffd00 0x10>;
614 clocks = <&slow_xtal>;
615 };
616
617 shdwc@fffffd10 {
618 compatible = "atmel,at91sam9260-shdwc";
619 reg = <0xfffffd10 0x10>;
620 clocks = <&slow_xtal>;
621 };
622
623 pit: timer@fffffd30 {
624 compatible = "atmel,at91sam9260-pit";
625 reg = <0xfffffd30 0xf>;
626 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
627 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
628 };
629
630 rtc@fffffd20 {
631 compatible = "atmel,at91sam9260-rtt";
632 reg = <0xfffffd20 0x10>;
633 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
634 clocks = <&slow_xtal>;
635 status = "disabled";
636 };
637
638 watchdog@fffffd40 {
639 compatible = "atmel,at91sam9260-wdt";
640 reg = <0xfffffd40 0x10>;
641 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
642 clocks = <&slow_xtal>;
643 status = "disabled";
644 };
645
646 gpbr: syscon@fffffd50 {
647 compatible = "atmel,at91sam9260-gpbr", "syscon";
648 reg = <0xfffffd50 0x10>;
649 status = "disabled";
650 };
651 };
652 };
653
654 i2c-gpio-0 {
655 compatible = "i2c-gpio";
656 pinctrl-names = "default";
657 pinctrl-0 = <&pinctrl_i2c_bitbang>;
658 gpios = <&pioA 7 GPIO_ACTIVE_HIGH>, /* sda */
659 <&pioA 8 GPIO_ACTIVE_HIGH>; /* scl */
660 i2c-gpio,sda-open-drain;
661 i2c-gpio,scl-open-drain;
662 i2c-gpio,delay-us = <2>; /* ~100 kHz */
663 #address-cells = <1>;
664 #size-cells = <0>;
665 status = "disabled";
666 };
667};
1/*
2 * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC
3 *
4 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
5 *
6 * Licensed under GPLv2 only.
7 */
8
9#include "skeleton.dtsi"
10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/clock/at91.h>
14
15/ {
16 model = "Atmel AT91SAM9261 family SoC";
17 compatible = "atmel,at91sam9261";
18 interrupt-parent = <&aic>;
19
20 aliases {
21 serial0 = &dbgu;
22 serial1 = &usart0;
23 serial2 = &usart1;
24 serial3 = &usart2;
25 gpio0 = &pioA;
26 gpio1 = &pioB;
27 gpio2 = &pioC;
28 tcb0 = &tcb0;
29 i2c0 = &i2c0;
30 ssc0 = &ssc0;
31 ssc1 = &ssc1;
32 };
33
34 cpus {
35 #address-cells = <0>;
36 #size-cells = <0>;
37
38 cpu {
39 compatible = "arm,arm926ej-s";
40 device_type = "cpu";
41 };
42 };
43
44 memory {
45 reg = <0x20000000 0x08000000>;
46 };
47
48 ahb {
49 compatible = "simple-bus";
50 #address-cells = <1>;
51 #size-cells = <1>;
52 ranges;
53
54 usb0: ohci@00500000 {
55 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
56 reg = <0x00500000 0x100000>;
57 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
58 clocks = <&usb>, <&ohci_clk>, <&hclk0>, <&uhpck>;
59 clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
60 status = "disabled";
61 };
62
63 fb0: fb@0x00600000 {
64 compatible = "atmel,at91sam9261-lcdc";
65 reg = <0x00600000 0x1000>;
66 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
67 pinctrl-names = "default";
68 pinctrl-0 = <&pinctrl_fb>;
69 clocks = <&lcd_clk>, <&hclk1>;
70 clock-names = "lcdc_clk", "hclk";
71 status = "disabled";
72 };
73
74 nand0: nand@40000000 {
75 compatible = "atmel,at91rm9200-nand";
76 #address-cells = <1>;
77 #size-cells = <1>;
78 reg = <0x40000000 0x10000000>;
79 atmel,nand-addr-offset = <22>;
80 atmel,nand-cmd-offset = <21>;
81 pinctrl-names = "default";
82 pinctrl-0 = <&pinctrl_nand>;
83
84 gpios = <&pioC 15 GPIO_ACTIVE_HIGH>,
85 <&pioC 14 GPIO_ACTIVE_HIGH>,
86 <0>;
87 status = "disabled";
88 };
89
90 apb {
91 compatible = "simple-bus";
92 #address-cells = <1>;
93 #size-cells = <1>;
94 ranges;
95
96 tcb0: timer@fffa0000 {
97 compatible = "atmel,at91rm9200-tcb";
98 reg = <0xfffa0000 0x100>;
99 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>,
100 <18 IRQ_TYPE_LEVEL_HIGH 0>,
101 <19 IRQ_TYPE_LEVEL_HIGH 0>;
102 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
103 clock-names = "t0_clk", "t1_clk", "t2_clk";
104 };
105
106 usb1: gadget@fffa4000 {
107 compatible = "atmel,at91rm9200-udc";
108 reg = <0xfffa4000 0x4000>;
109 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
110 clocks = <&usb>, <&udc_clk>, <&udpck>;
111 clock-names = "usb_clk", "udc_clk", "udpck";
112 status = "disabled";
113 };
114
115 mmc0: mmc@fffa8000 {
116 compatible = "atmel,hsmci";
117 reg = <0xfffa8000 0x600>;
118 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
119 pinctrl-names = "default";
120 pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>;
121 #address-cells = <1>;
122 #size-cells = <0>;
123 clocks = <&mci0_clk>;
124 clock-names = "mci_clk";
125 status = "disabled";
126 };
127
128 i2c0: i2c@fffac000 {
129 compatible = "atmel,at91sam9261-i2c";
130 pinctrl-names = "default";
131 pinctrl-0 = <&pinctrl_i2c_twi>;
132 reg = <0xfffac000 0x100>;
133 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
134 #address-cells = <1>;
135 #size-cells = <0>;
136 clocks = <&twi0_clk>;
137 status = "disabled";
138 };
139
140 usart0: serial@fffb0000 {
141 compatible = "atmel,at91sam9260-usart";
142 reg = <0xfffb0000 0x200>;
143 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
144 atmel,use-dma-rx;
145 atmel,use-dma-tx;
146 pinctrl-names = "default";
147 pinctrl-0 = <&pinctrl_usart0>;
148 clocks = <&usart0_clk>;
149 clock-names = "usart";
150 status = "disabled";
151 };
152
153 usart1: serial@fffb4000 {
154 compatible = "atmel,at91sam9260-usart";
155 reg = <0xfffb4000 0x200>;
156 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
157 atmel,use-dma-rx;
158 atmel,use-dma-tx;
159 pinctrl-names = "default";
160 pinctrl-0 = <&pinctrl_usart1>;
161 clocks = <&usart1_clk>;
162 clock-names = "usart";
163 status = "disabled";
164 };
165
166 usart2: serial@fffb8000{
167 compatible = "atmel,at91sam9260-usart";
168 reg = <0xfffb8000 0x200>;
169 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
170 atmel,use-dma-rx;
171 atmel,use-dma-tx;
172 pinctrl-names = "default";
173 pinctrl-0 = <&pinctrl_usart2>;
174 clocks = <&usart2_clk>;
175 clock-names = "usart";
176 status = "disabled";
177 };
178
179 ssc0: ssc@fffbc000 {
180 compatible = "atmel,at91rm9200-ssc";
181 reg = <0xfffbc000 0x4000>;
182 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
183 pinctrl-names = "default";
184 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
185 status = "disabled";
186 };
187
188 ssc1: ssc@fffc0000 {
189 compatible = "atmel,at91rm9200-ssc";
190 reg = <0xfffc0000 0x4000>;
191 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
192 pinctrl-names = "default";
193 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
194 status = "disabled";
195 };
196
197 spi0: spi@fffc8000 {
198 #address-cells = <1>;
199 #size-cells = <0>;
200 compatible = "atmel,at91rm9200-spi";
201 reg = <0xfffc8000 0x200>;
202 cs-gpios = <0>, <0>, <0>, <0>;
203 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
204 pinctrl-names = "default";
205 pinctrl-0 = <&pinctrl_spi0>;
206 clocks = <&spi0_clk>;
207 clock-names = "spi_clk";
208 status = "disabled";
209 };
210
211 spi1: spi@fffcc000 {
212 #address-cells = <1>;
213 #size-cells = <0>;
214 compatible = "atmel,at91rm9200-spi";
215 reg = <0xfffcc000 0x200>;
216 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
217 pinctrl-names = "default";
218 pinctrl-0 = <&pinctrl_spi1>;
219 clocks = <&spi1_clk>;
220 clock-names = "spi_clk";
221 status = "disabled";
222 };
223
224 ramc: ramc@ffffea00 {
225 compatible = "atmel,at91sam9260-sdramc";
226 reg = <0xffffea00 0x200>;
227 };
228
229 matrix: matrix@ffffee00 {
230 compatible = "atmel,at91sam9260-bus-matrix";
231 reg = <0xffffee00 0x200>;
232 };
233
234 aic: interrupt-controller@fffff000 {
235 #interrupt-cells = <3>;
236 compatible = "atmel,at91rm9200-aic";
237 interrupt-controller;
238 reg = <0xfffff000 0x200>;
239 atmel,external-irqs = <29 30 31>;
240 };
241
242 dbgu: serial@fffff200 {
243 compatible = "atmel,at91sam9260-usart";
244 reg = <0xfffff200 0x200>;
245 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
246 pinctrl-names = "default";
247 pinctrl-0 = <&pinctrl_dbgu>;
248 clocks = <&mck>;
249 clock-names = "usart";
250 status = "disabled";
251 };
252
253 pinctrl@fffff400 {
254 #address-cells = <1>;
255 #size-cells = <1>;
256 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
257 ranges = <0xfffff400 0xfffff400 0x600>;
258
259 atmel,mux-mask =
260 /* A B */
261 <0xffffffff 0xfffffff7>, /* pioA */
262 <0xffffffff 0xfffffff4>, /* pioB */
263 <0xffffffff 0xffffff07>; /* pioC */
264
265 /* shared pinctrl settings */
266 dbgu {
267 pinctrl_dbgu: dbgu-0 {
268 atmel,pins =
269 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
270 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
271 };
272 };
273
274 usart0 {
275 pinctrl_usart0: usart0-0 {
276 atmel,pins =
277 <AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
278 <AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
279 };
280
281 pinctrl_usart0_rts: usart0_rts-0 {
282 atmel,pins =
283 <AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
284 };
285
286 pinctrl_usart0_cts: usart0_cts-0 {
287 atmel,pins =
288 <AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
289 };
290 };
291
292 usart1 {
293 pinctrl_usart1: usart1-0 {
294 atmel,pins =
295 <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
296 <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
297 };
298
299 pinctrl_usart1_rts: usart1_rts-0 {
300 atmel,pins =
301 <AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
302 };
303
304 pinctrl_usart1_cts: usart1_cts-0 {
305 atmel,pins =
306 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
307 };
308 };
309
310 usart2 {
311 pinctrl_usart2: usart2-0 {
312 atmel,pins =
313 <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
314 <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
315 };
316
317 pinctrl_usart2_rts: usart2_rts-0 {
318 atmel,pins =
319 <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
320 };
321
322 pinctrl_usart2_cts: usart2_cts-0 {
323 atmel,pins =
324 <AT91_PIOA 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
325 };
326 };
327
328 nand {
329 pinctrl_nand: nand-0 {
330 atmel,pins =
331 <AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>,
332 <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
333 };
334 };
335
336 mmc0 {
337 pinctrl_mmc0_clk: mmc0_clk-0 {
338 atmel,pins =
339 <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
340 };
341
342 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
343 atmel,pins =
344 <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
345 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
346 };
347
348 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
349 atmel,pins =
350 <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
351 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
352 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
353 };
354 };
355
356 ssc0 {
357 pinctrl_ssc0_tx: ssc0_tx-0 {
358 atmel,pins =
359 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>,
360 <AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>,
361 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
362 };
363
364 pinctrl_ssc0_rx: ssc0_rx-0 {
365 atmel,pins =
366 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>,
367 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
368 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
369 };
370 };
371
372 ssc1 {
373 pinctrl_ssc1_tx: ssc1_tx-0 {
374 atmel,pins =
375 <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
376 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
377 <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
378 };
379
380 pinctrl_ssc1_rx: ssc1_rx-0 {
381 atmel,pins =
382 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
383 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
384 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
385 };
386 };
387
388 spi0 {
389 pinctrl_spi0: spi0-0 {
390 atmel,pins =
391 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
392 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
393 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
394 };
395 };
396
397 spi1 {
398 pinctrl_spi1: spi1-0 {
399 atmel,pins =
400 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>,
401 <AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>,
402 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
403 };
404 };
405
406 tcb0 {
407 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
408 atmel,pins = <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
409 };
410
411 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
412 atmel,pins = <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
413 };
414
415 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
416 atmel,pins = <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
417 };
418
419 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
420 atmel,pins = <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
421 };
422
423 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
424 atmel,pins = <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
425 };
426
427 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
428 atmel,pins = <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;
429 };
430
431 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
432 atmel,pins = <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
433 };
434
435 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
436 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
437 };
438
439 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
440 atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;
441 };
442 };
443
444 i2c0 {
445 pinctrl_i2c_bitbang: i2c-0-bitbang {
446 atmel,pins =
447 <AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
448 <AT91_PIOA 8 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
449 };
450 pinctrl_i2c_twi: i2c-0-twi {
451 atmel,pins =
452 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
453 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
454 };
455 };
456
457 fb {
458 pinctrl_fb: fb-0 {
459 atmel,pins =
460 <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
461 <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
462 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
463 <AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
464 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>,
465 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
466 <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>,
467 <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>,
468 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE>,
469 <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
470 <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
471 <AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
472 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
473 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
474 <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE>,
475 <AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
476 <AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
477 <AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
478 <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
479 <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>,
480 <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
481 };
482 };
483
484 pioA: gpio@fffff400 {
485 compatible = "atmel,at91rm9200-gpio";
486 reg = <0xfffff400 0x200>;
487 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
488 #gpio-cells = <2>;
489 gpio-controller;
490 interrupt-controller;
491 #interrupt-cells = <2>;
492 clocks = <&pioA_clk>;
493 };
494
495 pioB: gpio@fffff600 {
496 compatible = "atmel,at91rm9200-gpio";
497 reg = <0xfffff600 0x200>;
498 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
499 #gpio-cells = <2>;
500 gpio-controller;
501 interrupt-controller;
502 #interrupt-cells = <2>;
503 clocks = <&pioB_clk>;
504 };
505
506 pioC: gpio@fffff800 {
507 compatible = "atmel,at91rm9200-gpio";
508 reg = <0xfffff800 0x200>;
509 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
510 #gpio-cells = <2>;
511 gpio-controller;
512 interrupt-controller;
513 #interrupt-cells = <2>;
514 clocks = <&pioC_clk>;
515 };
516 };
517
518 pmc: pmc@fffffc00 {
519 compatible = "atmel,at91rm9200-pmc";
520 reg = <0xfffffc00 0x100>;
521 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
522 interrupt-controller;
523 #address-cells = <1>;
524 #size-cells = <0>;
525 #interrupt-cells = <1>;
526
527 clk32k: slck {
528 compatible = "fixed-clock";
529 #clock-cells = <0>;
530 clock-frequency = <32768>;
531 };
532
533 main: mainck {
534 compatible = "atmel,at91rm9200-clk-main";
535 #clock-cells = <0>;
536 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
537 clocks = <&clk32k>;
538 };
539
540 plla: pllack {
541 compatible = "atmel,at91rm9200-clk-pll";
542 #clock-cells = <0>;
543 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
544 clocks = <&main>;
545 reg = <0>;
546 atmel,clk-input-range = <1000000 32000000>;
547 #atmel,pll-clk-output-range-cells = <4>;
548 atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>;
549 };
550
551 pllb: pllbck {
552 compatible = "atmel,at91rm9200-clk-pll";
553 #clock-cells = <0>;
554 interrupts-extended = <&pmc AT91_PMC_LOCKB>;
555 clocks = <&main>;
556 reg = <1>;
557 atmel,clk-input-range = <1000000 32000000>;
558 #atmel,pll-clk-output-range-cells = <4>;
559 atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>;
560 };
561
562 mck: masterck {
563 compatible = "atmel,at91rm9200-clk-master";
564 #clock-cells = <0>;
565 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
566 clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
567 atmel,clk-output-range = <0 94000000>;
568 atmel,clk-divisors = <1 2 4 3>;
569 };
570
571 usb: usbck {
572 compatible = "atmel,at91rm9200-clk-usb";
573 #clock-cells = <0>;
574 atmel,clk-divisors = <1 2 4 3>;
575 clocks = <&pllb>;
576 };
577
578 systemck {
579 compatible = "atmel,at91rm9200-clk-system";
580 #address-cells = <1>;
581 #size-cells = <0>;
582
583 uhpck: uhpck {
584 #clock-cells = <0>;
585 reg = <6>;
586 clocks = <&usb>;
587 };
588
589 udpck: udpck {
590 #clock-cells = <0>;
591 reg = <7>;
592 clocks = <&usb>;
593 };
594
595 hclk0: hclk0 {
596 #clock-cells = <0>;
597 reg = <16>;
598 clocks = <&mck>;
599 };
600
601 hclk1: hclk1 {
602 #clock-cells = <0>;
603 reg = <17>;
604 clocks = <&mck>;
605 };
606 };
607
608 periphck {
609 compatible = "atmel,at91rm9200-clk-peripheral";
610 #address-cells = <1>;
611 #size-cells = <0>;
612 clocks = <&mck>;
613
614 pioA_clk: pioA_clk {
615 #clock-cells = <0>;
616 reg = <2>;
617 };
618
619 pioB_clk: pioB_clk {
620 #clock-cells = <0>;
621 reg = <3>;
622 };
623
624 pioC_clk: pioC_clk {
625 #clock-cells = <0>;
626 reg = <4>;
627 };
628
629 usart0_clk: usart0_clk {
630 #clock-cells = <0>;
631 reg = <6>;
632 };
633
634 usart1_clk: usart1_clk {
635 #clock-cells = <0>;
636 reg = <7>;
637 };
638
639 usart2_clk: usart2_clk {
640 #clock-cells = <0>;
641 reg = <8>;
642 };
643
644 mci0_clk: mci0_clk {
645 #clock-cells = <0>;
646 reg = <9>;
647 };
648
649 udc_clk: udc_clk {
650 #clock-cells = <0>;
651 reg = <10>;
652 };
653
654 twi0_clk: twi0_clk {
655 reg = <11>;
656 #clock-cells = <0>;
657 };
658
659 spi0_clk: spi0_clk {
660 #clock-cells = <0>;
661 reg = <12>;
662 };
663
664 spi1_clk: spi1_clk {
665 #clock-cells = <0>;
666 reg = <13>;
667 };
668
669 tc0_clk: tc0_clk {
670 #clock-cells = <0>;
671 reg = <17>;
672 };
673
674 tc1_clk: tc1_clk {
675 #clock-cells = <0>;
676 reg = <18>;
677 };
678
679 tc2_clk: tc2_clk {
680 #clock-cells = <0>;
681 reg = <19>;
682 };
683
684 ohci_clk: ohci_clk {
685 #clock-cells = <0>;
686 reg = <20>;
687 };
688
689 lcd_clk: lcd_clk {
690 #clock-cells = <0>;
691 reg = <21>;
692 };
693 };
694 };
695
696 rstc@fffffd00 {
697 compatible = "atmel,at91sam9260-rstc";
698 reg = <0xfffffd00 0x10>;
699 };
700
701 shdwc@fffffd10 {
702 compatible = "atmel,at91sam9260-shdwc";
703 reg = <0xfffffd10 0x10>;
704 };
705
706 pit: timer@fffffd30 {
707 compatible = "atmel,at91sam9260-pit";
708 reg = <0xfffffd30 0xf>;
709 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
710 clocks = <&mck>;
711 };
712
713 watchdog@fffffd40 {
714 compatible = "atmel,at91sam9260-wdt";
715 reg = <0xfffffd40 0x10>;
716 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
717 status = "disabled";
718 };
719 };
720 };
721
722 i2c@0 {
723 compatible = "i2c-gpio";
724 pinctrl-names = "default";
725 pinctrl-0 = <&pinctrl_i2c_bitbang>;
726 gpios = <&pioA 7 GPIO_ACTIVE_HIGH>, /* sda */
727 <&pioA 8 GPIO_ACTIVE_HIGH>; /* scl */
728 i2c-gpio,sda-open-drain;
729 i2c-gpio,scl-open-drain;
730 i2c-gpio,delay-us = <2>; /* ~100 kHz */
731 #address-cells = <1>;
732 #size-cells = <0>;
733 status = "disabled";
734 };
735};