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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * SoC core Device Tree for the ARM Integrator platforms
4 */
5
6/ {
7 #address-cells = <1>;
8 #size-cells = <1>;
9
10 memory {
11 device_type = "memory";
12 reg = <0x0 0x0>;
13 };
14
15 core-module@10000000 {
16 compatible = "arm,core-module-integrator", "syscon", "simple-mfd";
17 reg = <0x10000000 0x200>;
18 ranges = <0x0 0x10000000 0x200>;
19 #address-cells = <1>;
20 #size-cells = <1>;
21
22 /* Use core module LED to indicate CPU load */
23 led@c,0 {
24 compatible = "register-bit-led";
25 reg = <0x0c 0x04>;
26 offset = <0x0c>;
27 mask = <0x01>;
28 label = "integrator:core_module";
29 linux,default-trigger = "cpu0";
30 default-state = "on";
31 };
32 };
33
34 ebi@12000000 {
35 compatible = "arm,external-bus-interface";
36 reg = <0x12000000 0x100>;
37 };
38
39 timer@13000000 {
40 reg = <0x13000000 0x100>;
41 interrupt-parent = <&pic>;
42 interrupts = <5>;
43 };
44
45 timer@13000100 {
46 reg = <0x13000100 0x100>;
47 interrupt-parent = <&pic>;
48 interrupts = <6>;
49 };
50
51 timer@13000200 {
52 reg = <0x13000200 0x100>;
53 interrupt-parent = <&pic>;
54 interrupts = <7>;
55 };
56
57 pic@14000000 {
58 compatible = "arm,versatile-fpga-irq";
59 #interrupt-cells = <1>;
60 interrupt-controller;
61 reg = <0x14000000 0x100>;
62 clear-mask = <0xffffffff>;
63 };
64
65 flash@24000000 {
66 compatible = "arm,versatile-flash", "cfi-flash";
67 reg = <0x24000000 0x02000000>;
68 bank-width = <4>;
69 partitions {
70 compatible = "arm,arm-firmware-suite";
71 };
72 };
73
74 fpga {
75 compatible = "simple-bus";
76 #address-cells = <1>;
77 #size-cells = <1>;
78 ranges;
79 interrupt-parent = <&pic>;
80
81 /*
82 * These PrimeCells are in the same locations and using the
83 * same interrupts in all Integrators, however the silicon
84 * version deployed is different.
85 */
86 rtc@15000000 {
87 reg = <0x15000000 0x1000>;
88 interrupts = <8>;
89 };
90
91 uart@16000000 {
92 reg = <0x16000000 0x1000>;
93 interrupts = <1>;
94 };
95
96 uart@17000000 {
97 reg = <0x17000000 0x1000>;
98 interrupts = <2>;
99 };
100
101 kmi@18000000 {
102 reg = <0x18000000 0x1000>;
103 interrupts = <3>;
104 };
105
106 kmi@19000000 {
107 reg = <0x19000000 0x1000>;
108 interrupts = <4>;
109 };
110
111 syscon@1a000000 {
112 /* Debug registers mapped as syscon */
113 compatible = "syscon", "simple-mfd";
114 reg = <0x1a000000 0x10>;
115 ranges = <0x0 0x1a000000 0x10>;
116 #address-cells = <1>;
117 #size-cells = <1>;
118
119 led@4,0 {
120 compatible = "register-bit-led";
121 reg = <0x04 0x04>;
122 offset = <0x04>;
123 mask = <0x01>;
124 label = "integrator:green0";
125 linux,default-trigger = "heartbeat";
126 default-state = "on";
127 };
128 led@4,1 {
129 compatible = "register-bit-led";
130 reg = <0x04 0x04>;
131 offset = <0x04>;
132 mask = <0x02>;
133 label = "integrator:yellow";
134 default-state = "off";
135 };
136 led@4,2 {
137 compatible = "register-bit-led";
138 reg = <0x04 0x04>;
139 offset = <0x04>;
140 mask = <0x04>;
141 label = "integrator:red";
142 default-state = "off";
143 };
144 led@4,3 {
145 compatible = "register-bit-led";
146 reg = <0x04 0x04>;
147 offset = <0x04>;
148 mask = <0x08>;
149 label = "integrator:green1";
150 default-state = "off";
151 };
152 };
153 };
154};
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * SoC core Device Tree for the ARM Integrator platforms
4 */
5
6/include/ "skeleton.dtsi"
7
8/ {
9 core-module@10000000 {
10 compatible = "arm,core-module-integrator", "syscon", "simple-mfd";
11 reg = <0x10000000 0x200>;
12
13 /* Use core module LED to indicate CPU load */
14 led@c.0 {
15 compatible = "register-bit-led";
16 offset = <0x0c>;
17 mask = <0x01>;
18 label = "integrator:core_module";
19 linux,default-trigger = "cpu0";
20 default-state = "on";
21 };
22 };
23
24 ebi@12000000 {
25 compatible = "arm,external-bus-interface";
26 reg = <0x12000000 0x100>;
27 };
28
29 timer@13000000 {
30 reg = <0x13000000 0x100>;
31 interrupt-parent = <&pic>;
32 interrupts = <5>;
33 };
34
35 timer@13000100 {
36 reg = <0x13000100 0x100>;
37 interrupt-parent = <&pic>;
38 interrupts = <6>;
39 };
40
41 timer@13000200 {
42 reg = <0x13000200 0x100>;
43 interrupt-parent = <&pic>;
44 interrupts = <7>;
45 };
46
47 pic@14000000 {
48 compatible = "arm,versatile-fpga-irq";
49 #interrupt-cells = <1>;
50 interrupt-controller;
51 reg = <0x14000000 0x100>;
52 clear-mask = <0xffffffff>;
53 };
54
55 flash@24000000 {
56 compatible = "arm,versatile-flash", "cfi-flash";
57 reg = <0x24000000 0x02000000>;
58 bank-width = <4>;
59 };
60
61 fpga {
62 compatible = "simple-bus";
63 #address-cells = <1>;
64 #size-cells = <1>;
65 ranges;
66 interrupt-parent = <&pic>;
67
68 /*
69 * These PrimeCells are in the same locations and using the
70 * same interrupts in all Integrators, however the silicon
71 * version deployed is different.
72 */
73 rtc@15000000 {
74 reg = <0x15000000 0x1000>;
75 interrupts = <8>;
76 };
77
78 uart@16000000 {
79 reg = <0x16000000 0x1000>;
80 interrupts = <1>;
81 };
82
83 uart@17000000 {
84 reg = <0x17000000 0x1000>;
85 interrupts = <2>;
86 };
87
88 kmi@18000000 {
89 reg = <0x18000000 0x1000>;
90 interrupts = <3>;
91 };
92
93 kmi@19000000 {
94 reg = <0x19000000 0x1000>;
95 interrupts = <4>;
96 };
97
98 syscon {
99 /* Debug registers mapped as syscon */
100 compatible = "syscon", "simple-mfd";
101 reg = <0x1a000000 0x10>;
102
103 led@4.0 {
104 compatible = "register-bit-led";
105 offset = <0x04>;
106 mask = <0x01>;
107 label = "integrator:green0";
108 linux,default-trigger = "heartbeat";
109 default-state = "on";
110 };
111 led@4.1 {
112 compatible = "register-bit-led";
113 offset = <0x04>;
114 mask = <0x02>;
115 label = "integrator:yellow";
116 default-state = "off";
117 };
118 led@4.2 {
119 compatible = "register-bit-led";
120 offset = <0x04>;
121 mask = <0x04>;
122 label = "integrator:red";
123 default-state = "off";
124 };
125 led@4.3 {
126 compatible = "register-bit-led";
127 offset = <0x04>;
128 mask = <0x08>;
129 label = "integrator:green1";
130 default-state = "off";
131 };
132 };
133 };
134};