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1// SPDX-License-Identifier: GPL-2.0-only
2#include <linux/extable.h>
3#include <linux/uaccess.h>
4#include <linux/sched/debug.h>
5#include <linux/bitfield.h>
6#include <xen/xen.h>
7
8#include <asm/fpu/api.h>
9#include <asm/sev.h>
10#include <asm/traps.h>
11#include <asm/kdebug.h>
12#include <asm/insn-eval.h>
13#include <asm/sgx.h>
14
15static inline unsigned long *pt_regs_nr(struct pt_regs *regs, int nr)
16{
17 int reg_offset = pt_regs_offset(regs, nr);
18 static unsigned long __dummy;
19
20 if (WARN_ON_ONCE(reg_offset < 0))
21 return &__dummy;
22
23 return (unsigned long *)((unsigned long)regs + reg_offset);
24}
25
26static inline unsigned long
27ex_fixup_addr(const struct exception_table_entry *x)
28{
29 return (unsigned long)&x->fixup + x->fixup;
30}
31
32static bool ex_handler_default(const struct exception_table_entry *e,
33 struct pt_regs *regs)
34{
35 if (e->data & EX_FLAG_CLEAR_AX)
36 regs->ax = 0;
37 if (e->data & EX_FLAG_CLEAR_DX)
38 regs->dx = 0;
39
40 regs->ip = ex_fixup_addr(e);
41 return true;
42}
43
44/*
45 * This is the *very* rare case where we do a "load_unaligned_zeropad()"
46 * and it's a page crosser into a non-existent page.
47 *
48 * This happens when we optimistically load a pathname a word-at-a-time
49 * and the name is less than the full word and the next page is not
50 * mapped. Typically that only happens for CONFIG_DEBUG_PAGEALLOC.
51 *
52 * NOTE! The faulting address is always a 'mov mem,reg' type instruction
53 * of size 'long', and the exception fixup must always point to right
54 * after the instruction.
55 */
56static bool ex_handler_zeropad(const struct exception_table_entry *e,
57 struct pt_regs *regs,
58 unsigned long fault_addr)
59{
60 struct insn insn;
61 const unsigned long mask = sizeof(long) - 1;
62 unsigned long offset, addr, next_ip, len;
63 unsigned long *reg;
64
65 next_ip = ex_fixup_addr(e);
66 len = next_ip - regs->ip;
67 if (len > MAX_INSN_SIZE)
68 return false;
69
70 if (insn_decode(&insn, (void *) regs->ip, len, INSN_MODE_KERN))
71 return false;
72 if (insn.length != len)
73 return false;
74
75 if (insn.opcode.bytes[0] != 0x8b)
76 return false;
77 if (insn.opnd_bytes != sizeof(long))
78 return false;
79
80 addr = (unsigned long) insn_get_addr_ref(&insn, regs);
81 if (addr == ~0ul)
82 return false;
83
84 offset = addr & mask;
85 addr = addr & ~mask;
86 if (fault_addr != addr + sizeof(long))
87 return false;
88
89 reg = insn_get_modrm_reg_ptr(&insn, regs);
90 if (!reg)
91 return false;
92
93 *reg = *(unsigned long *)addr >> (offset * 8);
94 return ex_handler_default(e, regs);
95}
96
97static bool ex_handler_fault(const struct exception_table_entry *fixup,
98 struct pt_regs *regs, int trapnr)
99{
100 regs->ax = trapnr;
101 return ex_handler_default(fixup, regs);
102}
103
104static bool ex_handler_sgx(const struct exception_table_entry *fixup,
105 struct pt_regs *regs, int trapnr)
106{
107 regs->ax = trapnr | SGX_ENCLS_FAULT_FLAG;
108 return ex_handler_default(fixup, regs);
109}
110
111/*
112 * Handler for when we fail to restore a task's FPU state. We should never get
113 * here because the FPU state of a task using the FPU (task->thread.fpu.state)
114 * should always be valid. However, past bugs have allowed userspace to set
115 * reserved bits in the XSAVE area using PTRACE_SETREGSET or sys_rt_sigreturn().
116 * These caused XRSTOR to fail when switching to the task, leaking the FPU
117 * registers of the task previously executing on the CPU. Mitigate this class
118 * of vulnerability by restoring from the initial state (essentially, zeroing
119 * out all the FPU registers) if we can't restore from the task's FPU state.
120 */
121static bool ex_handler_fprestore(const struct exception_table_entry *fixup,
122 struct pt_regs *regs)
123{
124 regs->ip = ex_fixup_addr(fixup);
125
126 WARN_ONCE(1, "Bad FPU state detected at %pB, reinitializing FPU registers.",
127 (void *)instruction_pointer(regs));
128
129 fpu_reset_from_exception_fixup();
130 return true;
131}
132
133static bool ex_handler_uaccess(const struct exception_table_entry *fixup,
134 struct pt_regs *regs, int trapnr)
135{
136 WARN_ONCE(trapnr == X86_TRAP_GP, "General protection fault in user access. Non-canonical address?");
137 return ex_handler_default(fixup, regs);
138}
139
140static bool ex_handler_copy(const struct exception_table_entry *fixup,
141 struct pt_regs *regs, int trapnr)
142{
143 WARN_ONCE(trapnr == X86_TRAP_GP, "General protection fault in user access. Non-canonical address?");
144 return ex_handler_fault(fixup, regs, trapnr);
145}
146
147static bool ex_handler_msr(const struct exception_table_entry *fixup,
148 struct pt_regs *regs, bool wrmsr, bool safe, int reg)
149{
150 if (__ONCE_LITE_IF(!safe && wrmsr)) {
151 pr_warn("unchecked MSR access error: WRMSR to 0x%x (tried to write 0x%08x%08x) at rIP: 0x%lx (%pS)\n",
152 (unsigned int)regs->cx, (unsigned int)regs->dx,
153 (unsigned int)regs->ax, regs->ip, (void *)regs->ip);
154 show_stack_regs(regs);
155 }
156
157 if (__ONCE_LITE_IF(!safe && !wrmsr)) {
158 pr_warn("unchecked MSR access error: RDMSR from 0x%x at rIP: 0x%lx (%pS)\n",
159 (unsigned int)regs->cx, regs->ip, (void *)regs->ip);
160 show_stack_regs(regs);
161 }
162
163 if (!wrmsr) {
164 /* Pretend that the read succeeded and returned 0. */
165 regs->ax = 0;
166 regs->dx = 0;
167 }
168
169 if (safe)
170 *pt_regs_nr(regs, reg) = -EIO;
171
172 return ex_handler_default(fixup, regs);
173}
174
175static bool ex_handler_clear_fs(const struct exception_table_entry *fixup,
176 struct pt_regs *regs)
177{
178 if (static_cpu_has(X86_BUG_NULL_SEG))
179 asm volatile ("mov %0, %%fs" : : "rm" (__USER_DS));
180 asm volatile ("mov %0, %%fs" : : "rm" (0));
181 return ex_handler_default(fixup, regs);
182}
183
184static bool ex_handler_imm_reg(const struct exception_table_entry *fixup,
185 struct pt_regs *regs, int reg, int imm)
186{
187 *pt_regs_nr(regs, reg) = (long)imm;
188 return ex_handler_default(fixup, regs);
189}
190
191static bool ex_handler_ucopy_len(const struct exception_table_entry *fixup,
192 struct pt_regs *regs, int trapnr, int reg, int imm)
193{
194 regs->cx = imm * regs->cx + *pt_regs_nr(regs, reg);
195 return ex_handler_uaccess(fixup, regs, trapnr);
196}
197
198int ex_get_fixup_type(unsigned long ip)
199{
200 const struct exception_table_entry *e = search_exception_tables(ip);
201
202 return e ? FIELD_GET(EX_DATA_TYPE_MASK, e->data) : EX_TYPE_NONE;
203}
204
205int fixup_exception(struct pt_regs *regs, int trapnr, unsigned long error_code,
206 unsigned long fault_addr)
207{
208 const struct exception_table_entry *e;
209 int type, reg, imm;
210
211#ifdef CONFIG_PNPBIOS
212 if (unlikely(SEGMENT_IS_PNP_CODE(regs->cs))) {
213 extern u32 pnp_bios_fault_eip, pnp_bios_fault_esp;
214 extern u32 pnp_bios_is_utter_crap;
215 pnp_bios_is_utter_crap = 1;
216 printk(KERN_CRIT "PNPBIOS fault.. attempting recovery.\n");
217 __asm__ volatile(
218 "movl %0, %%esp\n\t"
219 "jmp *%1\n\t"
220 : : "g" (pnp_bios_fault_esp), "g" (pnp_bios_fault_eip));
221 panic("do_trap: can't hit this");
222 }
223#endif
224
225 e = search_exception_tables(regs->ip);
226 if (!e)
227 return 0;
228
229 type = FIELD_GET(EX_DATA_TYPE_MASK, e->data);
230 reg = FIELD_GET(EX_DATA_REG_MASK, e->data);
231 imm = FIELD_GET(EX_DATA_IMM_MASK, e->data);
232
233 switch (type) {
234 case EX_TYPE_DEFAULT:
235 case EX_TYPE_DEFAULT_MCE_SAFE:
236 return ex_handler_default(e, regs);
237 case EX_TYPE_FAULT:
238 case EX_TYPE_FAULT_MCE_SAFE:
239 return ex_handler_fault(e, regs, trapnr);
240 case EX_TYPE_UACCESS:
241 return ex_handler_uaccess(e, regs, trapnr);
242 case EX_TYPE_COPY:
243 return ex_handler_copy(e, regs, trapnr);
244 case EX_TYPE_CLEAR_FS:
245 return ex_handler_clear_fs(e, regs);
246 case EX_TYPE_FPU_RESTORE:
247 return ex_handler_fprestore(e, regs);
248 case EX_TYPE_BPF:
249 return ex_handler_bpf(e, regs);
250 case EX_TYPE_WRMSR:
251 return ex_handler_msr(e, regs, true, false, reg);
252 case EX_TYPE_RDMSR:
253 return ex_handler_msr(e, regs, false, false, reg);
254 case EX_TYPE_WRMSR_SAFE:
255 return ex_handler_msr(e, regs, true, true, reg);
256 case EX_TYPE_RDMSR_SAFE:
257 return ex_handler_msr(e, regs, false, true, reg);
258 case EX_TYPE_WRMSR_IN_MCE:
259 ex_handler_msr_mce(regs, true);
260 break;
261 case EX_TYPE_RDMSR_IN_MCE:
262 ex_handler_msr_mce(regs, false);
263 break;
264 case EX_TYPE_POP_REG:
265 regs->sp += sizeof(long);
266 fallthrough;
267 case EX_TYPE_IMM_REG:
268 return ex_handler_imm_reg(e, regs, reg, imm);
269 case EX_TYPE_FAULT_SGX:
270 return ex_handler_sgx(e, regs, trapnr);
271 case EX_TYPE_UCOPY_LEN:
272 return ex_handler_ucopy_len(e, regs, trapnr, reg, imm);
273 case EX_TYPE_ZEROPAD:
274 return ex_handler_zeropad(e, regs, fault_addr);
275 }
276 BUG();
277}
278
279extern unsigned int early_recursion_flag;
280
281/* Restricted version used during very early boot */
282void __init early_fixup_exception(struct pt_regs *regs, int trapnr)
283{
284 /* Ignore early NMIs. */
285 if (trapnr == X86_TRAP_NMI)
286 return;
287
288 if (early_recursion_flag > 2)
289 goto halt_loop;
290
291 /*
292 * Old CPUs leave the high bits of CS on the stack
293 * undefined. I'm not sure which CPUs do this, but at least
294 * the 486 DX works this way.
295 * Xen pv domains are not using the default __KERNEL_CS.
296 */
297 if (!xen_pv_domain() && regs->cs != __KERNEL_CS)
298 goto fail;
299
300 /*
301 * The full exception fixup machinery is available as soon as
302 * the early IDT is loaded. This means that it is the
303 * responsibility of extable users to either function correctly
304 * when handlers are invoked early or to simply avoid causing
305 * exceptions before they're ready to handle them.
306 *
307 * This is better than filtering which handlers can be used,
308 * because refusing to call a handler here is guaranteed to
309 * result in a hard-to-debug panic.
310 *
311 * Keep in mind that not all vectors actually get here. Early
312 * page faults, for example, are special.
313 */
314 if (fixup_exception(regs, trapnr, regs->orig_ax, 0))
315 return;
316
317 if (trapnr == X86_TRAP_UD) {
318 if (report_bug(regs->ip, regs) == BUG_TRAP_TYPE_WARN) {
319 /* Skip the ud2. */
320 regs->ip += LEN_UD2;
321 return;
322 }
323
324 /*
325 * If this was a BUG and report_bug returns or if this
326 * was just a normal #UD, we want to continue onward and
327 * crash.
328 */
329 }
330
331fail:
332 early_printk("PANIC: early exception 0x%02x IP %lx:%lx error %lx cr2 0x%lx\n",
333 (unsigned)trapnr, (unsigned long)regs->cs, regs->ip,
334 regs->orig_ax, read_cr2());
335
336 show_regs(regs);
337
338halt_loop:
339 while (true)
340 halt();
341}
1#include <linux/extable.h>
2#include <linux/uaccess.h>
3#include <asm/traps.h>
4#include <asm/kdebug.h>
5
6typedef bool (*ex_handler_t)(const struct exception_table_entry *,
7 struct pt_regs *, int);
8
9static inline unsigned long
10ex_fixup_addr(const struct exception_table_entry *x)
11{
12 return (unsigned long)&x->fixup + x->fixup;
13}
14static inline ex_handler_t
15ex_fixup_handler(const struct exception_table_entry *x)
16{
17 return (ex_handler_t)((unsigned long)&x->handler + x->handler);
18}
19
20bool ex_handler_default(const struct exception_table_entry *fixup,
21 struct pt_regs *regs, int trapnr)
22{
23 regs->ip = ex_fixup_addr(fixup);
24 return true;
25}
26EXPORT_SYMBOL(ex_handler_default);
27
28bool ex_handler_fault(const struct exception_table_entry *fixup,
29 struct pt_regs *regs, int trapnr)
30{
31 regs->ip = ex_fixup_addr(fixup);
32 regs->ax = trapnr;
33 return true;
34}
35EXPORT_SYMBOL_GPL(ex_handler_fault);
36
37bool ex_handler_ext(const struct exception_table_entry *fixup,
38 struct pt_regs *regs, int trapnr)
39{
40 /* Special hack for uaccess_err */
41 current->thread.uaccess_err = 1;
42 regs->ip = ex_fixup_addr(fixup);
43 return true;
44}
45EXPORT_SYMBOL(ex_handler_ext);
46
47bool ex_handler_rdmsr_unsafe(const struct exception_table_entry *fixup,
48 struct pt_regs *regs, int trapnr)
49{
50 if (pr_warn_once("unchecked MSR access error: RDMSR from 0x%x at rIP: 0x%lx (%pF)\n",
51 (unsigned int)regs->cx, regs->ip, (void *)regs->ip))
52 show_stack_regs(regs);
53
54 /* Pretend that the read succeeded and returned 0. */
55 regs->ip = ex_fixup_addr(fixup);
56 regs->ax = 0;
57 regs->dx = 0;
58 return true;
59}
60EXPORT_SYMBOL(ex_handler_rdmsr_unsafe);
61
62bool ex_handler_wrmsr_unsafe(const struct exception_table_entry *fixup,
63 struct pt_regs *regs, int trapnr)
64{
65 if (pr_warn_once("unchecked MSR access error: WRMSR to 0x%x (tried to write 0x%08x%08x) at rIP: 0x%lx (%pF)\n",
66 (unsigned int)regs->cx, (unsigned int)regs->dx,
67 (unsigned int)regs->ax, regs->ip, (void *)regs->ip))
68 show_stack_regs(regs);
69
70 /* Pretend that the write succeeded. */
71 regs->ip = ex_fixup_addr(fixup);
72 return true;
73}
74EXPORT_SYMBOL(ex_handler_wrmsr_unsafe);
75
76bool ex_handler_clear_fs(const struct exception_table_entry *fixup,
77 struct pt_regs *regs, int trapnr)
78{
79 if (static_cpu_has(X86_BUG_NULL_SEG))
80 asm volatile ("mov %0, %%fs" : : "rm" (__USER_DS));
81 asm volatile ("mov %0, %%fs" : : "rm" (0));
82 return ex_handler_default(fixup, regs, trapnr);
83}
84EXPORT_SYMBOL(ex_handler_clear_fs);
85
86bool ex_has_fault_handler(unsigned long ip)
87{
88 const struct exception_table_entry *e;
89 ex_handler_t handler;
90
91 e = search_exception_tables(ip);
92 if (!e)
93 return false;
94 handler = ex_fixup_handler(e);
95
96 return handler == ex_handler_fault;
97}
98
99int fixup_exception(struct pt_regs *regs, int trapnr)
100{
101 const struct exception_table_entry *e;
102 ex_handler_t handler;
103
104#ifdef CONFIG_PNPBIOS
105 if (unlikely(SEGMENT_IS_PNP_CODE(regs->cs))) {
106 extern u32 pnp_bios_fault_eip, pnp_bios_fault_esp;
107 extern u32 pnp_bios_is_utter_crap;
108 pnp_bios_is_utter_crap = 1;
109 printk(KERN_CRIT "PNPBIOS fault.. attempting recovery.\n");
110 __asm__ volatile(
111 "movl %0, %%esp\n\t"
112 "jmp *%1\n\t"
113 : : "g" (pnp_bios_fault_esp), "g" (pnp_bios_fault_eip));
114 panic("do_trap: can't hit this");
115 }
116#endif
117
118 e = search_exception_tables(regs->ip);
119 if (!e)
120 return 0;
121
122 handler = ex_fixup_handler(e);
123 return handler(e, regs, trapnr);
124}
125
126extern unsigned int early_recursion_flag;
127
128/* Restricted version used during very early boot */
129void __init early_fixup_exception(struct pt_regs *regs, int trapnr)
130{
131 /* Ignore early NMIs. */
132 if (trapnr == X86_TRAP_NMI)
133 return;
134
135 if (early_recursion_flag > 2)
136 goto halt_loop;
137
138 /*
139 * Old CPUs leave the high bits of CS on the stack
140 * undefined. I'm not sure which CPUs do this, but at least
141 * the 486 DX works this way.
142 */
143 if ((regs->cs & 0xFFFF) != __KERNEL_CS)
144 goto fail;
145
146 /*
147 * The full exception fixup machinery is available as soon as
148 * the early IDT is loaded. This means that it is the
149 * responsibility of extable users to either function correctly
150 * when handlers are invoked early or to simply avoid causing
151 * exceptions before they're ready to handle them.
152 *
153 * This is better than filtering which handlers can be used,
154 * because refusing to call a handler here is guaranteed to
155 * result in a hard-to-debug panic.
156 *
157 * Keep in mind that not all vectors actually get here. Early
158 * fage faults, for example, are special.
159 */
160 if (fixup_exception(regs, trapnr))
161 return;
162
163fail:
164 early_printk("PANIC: early exception 0x%02x IP %lx:%lx error %lx cr2 0x%lx\n",
165 (unsigned)trapnr, (unsigned long)regs->cs, regs->ip,
166 regs->orig_ax, read_cr2());
167
168 show_regs(regs);
169
170halt_loop:
171 while (true)
172 halt();
173}