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1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright 2013-2014 Freescale Semiconductor, Inc.
4 * Copyright 2018 NXP
5 */
6
7/dts-v1/;
8#include "ls1021a.dtsi"
9
10/ {
11 model = "LS1021A TWR Board";
12 compatible = "fsl,ls1021a-twr", "fsl,ls1021a";
13
14 aliases {
15 enet2_rgmii_phy = &rgmii_phy1;
16 enet0_sgmii_phy = &sgmii_phy2;
17 enet1_sgmii_phy = &sgmii_phy0;
18 };
19
20 sys_mclk: clock-mclk {
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
23 clock-frequency = <24576000>;
24 };
25
26 reg_3p3v: regulator {
27 compatible = "regulator-fixed";
28 regulator-name = "3P3V";
29 regulator-min-microvolt = <3300000>;
30 regulator-max-microvolt = <3300000>;
31 regulator-always-on;
32 };
33
34 sound {
35 compatible = "simple-audio-card";
36 simple-audio-card,format = "i2s";
37 simple-audio-card,widgets =
38 "Microphone", "Microphone Jack",
39 "Headphone", "Headphone Jack",
40 "Speaker", "Speaker Ext",
41 "Line", "Line In Jack";
42 simple-audio-card,routing =
43 "MIC_IN", "Microphone Jack",
44 "Microphone Jack", "Mic Bias",
45 "LINE_IN", "Line In Jack",
46 "Headphone Jack", "HP_OUT",
47 "Speaker Ext", "LINE_OUT";
48
49 simple-audio-card,cpu {
50 sound-dai = <&sai1>;
51 frame-master;
52 bitclock-master;
53 };
54
55 simple-audio-card,codec {
56 sound-dai = <&codec>;
57 frame-master;
58 bitclock-master;
59 };
60 };
61
62 panel: panel {
63 compatible = "nec,nl4827hc19-05b";
64
65 port {
66 panel_in: endpoint {
67 remote-endpoint = <&dcu_out>;
68 };
69 };
70 };
71};
72
73&dcu {
74 status = "okay";
75
76 port {
77 dcu_out: endpoint {
78 remote-endpoint = <&panel_in>;
79 };
80 };
81};
82
83&dspi1 {
84 bus-num = <0>;
85 status = "okay";
86
87 dspiflash: s25fl064k@0 {
88 #address-cells = <1>;
89 #size-cells = <1>;
90 compatible = "spansion,s25fl064k";
91 spi-max-frequency = <16000000>;
92 spi-cpol;
93 spi-cpha;
94 reg = <0>;
95 };
96};
97
98&enet0 {
99 tbi-handle = <&tbi0>;
100 phy-handle = <&sgmii_phy2>;
101 phy-connection-type = "sgmii";
102 status = "okay";
103};
104
105&enet1 {
106 tbi-handle = <&tbi1>;
107 phy-handle = <&sgmii_phy0>;
108 phy-connection-type = "sgmii";
109 status = "okay";
110};
111
112&enet2 {
113 phy-handle = <&rgmii_phy1>;
114 phy-connection-type = "rgmii-id";
115 status = "okay";
116};
117
118&i2c0 {
119 status = "okay";
120
121 ina220@40 {
122 compatible = "ti,ina220";
123 reg = <0x40>;
124 shunt-resistor = <1000>;
125 };
126
127 ina220@41 {
128 compatible = "ti,ina220";
129 reg = <0x41>;
130 shunt-resistor = <1000>;
131 };
132
133};
134
135&i2c1 {
136 status = "okay";
137 codec: sgtl5000@a {
138 #sound-dai-cells = <0>;
139 compatible = "fsl,sgtl5000";
140 reg = <0x0a>;
141 VDDA-supply = <®_3p3v>;
142 VDDIO-supply = <®_3p3v>;
143 clocks = <&sys_mclk>;
144 };
145};
146
147&ifc {
148 #address-cells = <2>;
149 #size-cells = <1>;
150 /* NOR Flash on board */
151 ranges = <0x0 0x0 0x0 0x60000000 0x08000000>;
152 status = "okay";
153
154 nor@0,0 {
155 #address-cells = <1>;
156 #size-cells = <1>;
157 compatible = "cfi-flash";
158 reg = <0x0 0x0 0x8000000>;
159 big-endian;
160 bank-width = <2>;
161 device-width = <1>;
162 };
163};
164
165&lpuart0 {
166 status = "okay";
167};
168
169&mdio0 {
170 sgmii_phy0: ethernet-phy@0 {
171 reg = <0x0>;
172 };
173 rgmii_phy1: ethernet-phy@1 {
174 reg = <0x1>;
175 };
176 sgmii_phy2: ethernet-phy@2 {
177 reg = <0x2>;
178 };
179 tbi0: tbi-phy@1f {
180 reg = <0x1f>;
181 device_type = "tbi-phy";
182 };
183};
184
185&mdio1 {
186 tbi1: tbi-phy@1f {
187 reg = <0x1f>;
188 device_type = "tbi-phy";
189 };
190};
191
192&esdhc {
193 status = "okay";
194};
195
196&qspi {
197 status = "okay";
198
199 n25q128a130: flash@0 {
200 compatible = "jedec,spi-nor";
201 #address-cells = <1>;
202 #size-cells = <1>;
203 spi-max-frequency = <50000000>;
204 reg = <0>;
205 spi-rx-bus-width = <4>;
206 spi-tx-bus-width = <4>;
207 };
208};
209
210&sai1 {
211 status = "okay";
212};
213
214&sata {
215 status = "okay";
216};
217
218&uart0 {
219 status = "okay";
220};
221
222&uart1 {
223 status = "okay";
224};
225
226&can0 {
227 status = "okay";
228};
229
230&can1 {
231 status = "okay";
232};
233
234&can2 {
235 status = "disabled";
236};
237
238&can3 {
239 status = "disabled";
240};
1/*
2 * Copyright 2013-2014 Freescale Semiconductor, Inc.
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public
20 * License along with this file; if not, write to the Free
21 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22 * MA 02110-1301 USA
23 *
24 * Or, alternatively,
25 *
26 * b) Permission is hereby granted, free of charge, to any person
27 * obtaining a copy of this software and associated documentation
28 * files (the "Software"), to deal in the Software without
29 * restriction, including without limitation the rights to use,
30 * copy, modify, merge, publish, distribute, sublicense, and/or
31 * sell copies of the Software, and to permit persons to whom the
32 * Software is furnished to do so, subject to the following
33 * conditions:
34 *
35 * The above copyright notice and this permission notice shall be
36 * included in all copies or substantial portions of the Software.
37 *
38 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
39 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
40 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
43 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
44 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45 * OTHER DEALINGS IN THE SOFTWARE.
46 */
47
48/dts-v1/;
49#include "ls1021a.dtsi"
50
51/ {
52 model = "LS1021A TWR Board";
53
54 aliases {
55 enet2_rgmii_phy = &rgmii_phy1;
56 enet0_sgmii_phy = &sgmii_phy2;
57 enet1_sgmii_phy = &sgmii_phy0;
58 };
59
60 sys_mclk: clock-mclk {
61 compatible = "fixed-clock";
62 #clock-cells = <0>;
63 clock-frequency = <24576000>;
64 };
65
66 regulators {
67 compatible = "simple-bus";
68 #address-cells = <1>;
69 #size-cells = <0>;
70
71 reg_3p3v: regulator@0 {
72 compatible = "regulator-fixed";
73 reg = <0>;
74 regulator-name = "3P3V";
75 regulator-min-microvolt = <3300000>;
76 regulator-max-microvolt = <3300000>;
77 regulator-always-on;
78 };
79 };
80
81 sound {
82 compatible = "simple-audio-card";
83 simple-audio-card,format = "i2s";
84 simple-audio-card,widgets =
85 "Microphone", "Microphone Jack",
86 "Headphone", "Headphone Jack",
87 "Speaker", "Speaker Ext",
88 "Line", "Line In Jack";
89 simple-audio-card,routing =
90 "MIC_IN", "Microphone Jack",
91 "Microphone Jack", "Mic Bias",
92 "LINE_IN", "Line In Jack",
93 "Headphone Jack", "HP_OUT",
94 "Speaker Ext", "LINE_OUT";
95
96 simple-audio-card,cpu {
97 sound-dai = <&sai1>;
98 frame-master;
99 bitclock-master;
100 };
101
102 simple-audio-card,codec {
103 sound-dai = <&codec>;
104 frame-master;
105 bitclock-master;
106 };
107 };
108
109 panel: panel {
110 compatible = "nec,nl4827hc19-05b";
111
112 port {
113 panel_in: endpoint {
114 remote-endpoint = <&dcu_out>;
115 };
116 };
117 };
118};
119
120&dcu {
121 status = "okay";
122
123 port {
124 dcu_out: endpoint {
125 remote-endpoint = <&panel_in>;
126 };
127 };
128};
129
130&dspi1 {
131 bus-num = <0>;
132 status = "okay";
133
134 dspiflash: s25fl064k@0 {
135 #address-cells = <1>;
136 #size-cells = <1>;
137 compatible = "spansion,s25fl064k";
138 spi-max-frequency = <16000000>;
139 spi-cpol;
140 spi-cpha;
141 reg = <0>;
142 };
143};
144
145&enet0 {
146 tbi-handle = <&tbi1>;
147 phy-handle = <&sgmii_phy2>;
148 phy-connection-type = "sgmii";
149 status = "okay";
150};
151
152&enet1 {
153 tbi-handle = <&tbi1>;
154 phy-handle = <&sgmii_phy0>;
155 phy-connection-type = "sgmii";
156 status = "okay";
157};
158
159&enet2 {
160 phy-handle = <&rgmii_phy1>;
161 phy-connection-type = "rgmii-id";
162 status = "okay";
163};
164
165&i2c0 {
166 status = "okay";
167
168 ina220@40 {
169 compatible = "ti,ina220";
170 reg = <0x40>;
171 shunt-resistor = <1000>;
172 };
173
174 ina220@41 {
175 compatible = "ti,ina220";
176 reg = <0x41>;
177 shunt-resistor = <1000>;
178 };
179
180};
181
182&i2c1 {
183 status = "okay";
184 codec: sgtl5000@a {
185 #sound-dai-cells = <0>;
186 compatible = "fsl,sgtl5000";
187 reg = <0x0a>;
188 VDDA-supply = <®_3p3v>;
189 VDDIO-supply = <®_3p3v>;
190 clocks = <&sys_mclk 1>;
191 };
192};
193
194&ifc {
195 #address-cells = <2>;
196 #size-cells = <1>;
197 /* NOR Flash on board */
198 ranges = <0x0 0x0 0x0 0x60000000 0x08000000>;
199 status = "okay";
200
201 nor@0,0 {
202 #address-cells = <1>;
203 #size-cells = <1>;
204 compatible = "cfi-flash";
205 reg = <0x0 0x0 0x8000000>;
206 bank-width = <2>;
207 device-width = <1>;
208 };
209};
210
211&lpuart0 {
212 status = "okay";
213};
214
215&mdio0 {
216 sgmii_phy0: ethernet-phy@0 {
217 reg = <0x0>;
218 };
219 rgmii_phy1: ethernet-phy@1 {
220 reg = <0x1>;
221 };
222 sgmii_phy2: ethernet-phy@2 {
223 reg = <0x2>;
224 };
225 tbi1: tbi-phy@1f {
226 reg = <0x1f>;
227 device_type = "tbi-phy";
228 };
229};
230
231&sai1 {
232 status = "okay";
233};
234
235&sata {
236 status = "okay";
237};
238
239&uart0 {
240 status = "okay";
241};
242
243&uart1 {
244 status = "okay";
245};