1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 *  AMD CPU Microcode Update Driver for Linux
  4 *
  5 *  This driver allows to upgrade microcode on F10h AMD
  6 *  CPUs and later.
  7 *
  8 *  Copyright (C) 2008-2011 Advanced Micro Devices Inc.
  9 *	          2013-2018 Borislav Petkov <bp@alien8.de>
 10 *
 11 *  Author: Peter Oruba <peter.oruba@amd.com>
 12 *
 13 *  Based on work by:
 14 *  Tigran Aivazian <aivazian.tigran@gmail.com>
 15 *
 16 *  early loader:
 17 *  Copyright (C) 2013 Advanced Micro Devices, Inc.
 
 18 *
 19 *  Author: Jacob Shin <jacob.shin@amd.com>
 20 *  Fixes: Borislav Petkov <bp@suse.de>
 
 
 
 21 */
 22#define pr_fmt(fmt) "microcode: " fmt
 23
 24#include <linux/earlycpio.h>
 
 25#include <linux/firmware.h>
 
 26#include <linux/uaccess.h>
 27#include <linux/vmalloc.h>
 28#include <linux/initrd.h>
 29#include <linux/kernel.h>
 
 30#include <linux/pci.h>
 31
 32#include <asm/microcode_amd.h>
 33#include <asm/microcode.h>
 34#include <asm/processor.h>
 35#include <asm/setup.h>
 36#include <asm/cpu.h>
 37#include <asm/msr.h>
 
 38
 39static struct equiv_cpu_table {
 40	unsigned int num_entries;
 41	struct equiv_cpu_entry *entry;
 42} equiv_table;
 43
 44/*
 45 * This points to the current valid container of microcode patches which we will
 46 * save from the initrd/builtin before jettisoning its contents. @mc is the
 47 * microcode patch we found to match.
 48 */
 49struct cont_desc {
 50	struct microcode_amd *mc;
 51	u32		     cpuid_1_eax;
 52	u32		     psize;
 53	u8		     *data;
 54	size_t		     size;
 55};
 56
 57static u32 ucode_new_rev;
 58static u8 amd_ucode_patch[PATCH_MAX_SIZE];
 59
 60/*
 61 * Microcode patch container file is prepended to the initrd in cpio
 62 * format. See Documentation/x86/microcode.rst
 63 */
 64static const char
 65ucode_path[] __maybe_unused = "kernel/x86/microcode/AuthenticAMD.bin";
 66
 67static u16 find_equiv_id(struct equiv_cpu_table *et, u32 sig)
 68{
 69	unsigned int i;
 70
 71	if (!et || !et->num_entries)
 72		return 0;
 73
 74	for (i = 0; i < et->num_entries; i++) {
 75		struct equiv_cpu_entry *e = &et->entry[i];
 76
 77		if (sig == e->installed_cpu)
 78			return e->equiv_cpu;
 79
 80		e++;
 81	}
 82	return 0;
 83}
 84
 85/*
 86 * Check whether there is a valid microcode container file at the beginning
 87 * of @buf of size @buf_size. Set @early to use this function in the early path.
 88 */
 89static bool verify_container(const u8 *buf, size_t buf_size, bool early)
 90{
 91	u32 cont_magic;
 92
 93	if (buf_size <= CONTAINER_HDR_SZ) {
 94		if (!early)
 95			pr_debug("Truncated microcode container header.\n");
 96
 97		return false;
 98	}
 99
100	cont_magic = *(const u32 *)buf;
101	if (cont_magic != UCODE_MAGIC) {
102		if (!early)
103			pr_debug("Invalid magic value (0x%08x).\n", cont_magic);
104
105		return false;
106	}
107
108	return true;
109}
110
111/*
112 * Check whether there is a valid, non-truncated CPU equivalence table at the
113 * beginning of @buf of size @buf_size. Set @early to use this function in the
114 * early path.
115 */
116static bool verify_equivalence_table(const u8 *buf, size_t buf_size, bool early)
117{
118	const u32 *hdr = (const u32 *)buf;
119	u32 cont_type, equiv_tbl_len;
120
121	if (!verify_container(buf, buf_size, early))
122		return false;
123
124	cont_type = hdr[1];
125	if (cont_type != UCODE_EQUIV_CPU_TABLE_TYPE) {
126		if (!early)
127			pr_debug("Wrong microcode container equivalence table type: %u.\n",
128			       cont_type);
129
130		return false;
131	}
132
133	buf_size -= CONTAINER_HDR_SZ;
134
135	equiv_tbl_len = hdr[2];
136	if (equiv_tbl_len < sizeof(struct equiv_cpu_entry) ||
137	    buf_size < equiv_tbl_len) {
138		if (!early)
139			pr_debug("Truncated equivalence table.\n");
140
141		return false;
142	}
143
144	return true;
145}
146
147/*
148 * Check whether there is a valid, non-truncated microcode patch section at the
149 * beginning of @buf of size @buf_size. Set @early to use this function in the
150 * early path.
151 *
152 * On success, @sh_psize returns the patch size according to the section header,
153 * to the caller.
154 */
155static bool
156__verify_patch_section(const u8 *buf, size_t buf_size, u32 *sh_psize, bool early)
157{
158	u32 p_type, p_size;
159	const u32 *hdr;
160
161	if (buf_size < SECTION_HDR_SIZE) {
162		if (!early)
163			pr_debug("Truncated patch section.\n");
164
165		return false;
166	}
167
168	hdr = (const u32 *)buf;
169	p_type = hdr[0];
170	p_size = hdr[1];
171
172	if (p_type != UCODE_UCODE_TYPE) {
173		if (!early)
174			pr_debug("Invalid type field (0x%x) in container file section header.\n",
175				p_type);
176
177		return false;
178	}
179
180	if (p_size < sizeof(struct microcode_header_amd)) {
181		if (!early)
182			pr_debug("Patch of size %u too short.\n", p_size);
183
184		return false;
185	}
186
187	*sh_psize = p_size;
188
189	return true;
190}
191
192/*
193 * Check whether the passed remaining file @buf_size is large enough to contain
194 * a patch of the indicated @sh_psize (and also whether this size does not
195 * exceed the per-family maximum). @sh_psize is the size read from the section
196 * header.
197 */
198static unsigned int __verify_patch_size(u8 family, u32 sh_psize, size_t buf_size)
199{
200	u32 max_size;
201
202	if (family >= 0x15)
203		return min_t(u32, sh_psize, buf_size);
204
205#define F1XH_MPB_MAX_SIZE 2048
206#define F14H_MPB_MAX_SIZE 1824
207
208	switch (family) {
209	case 0x10 ... 0x12:
210		max_size = F1XH_MPB_MAX_SIZE;
211		break;
212	case 0x14:
213		max_size = F14H_MPB_MAX_SIZE;
214		break;
215	default:
216		WARN(1, "%s: WTF family: 0x%x\n", __func__, family);
217		return 0;
218	}
219
220	if (sh_psize > min_t(u32, buf_size, max_size))
221		return 0;
222
223	return sh_psize;
224}
225
226/*
227 * Verify the patch in @buf.
228 *
229 * Returns:
230 * negative: on error
231 * positive: patch is not for this family, skip it
232 * 0: success
233 */
234static int
235verify_patch(u8 family, const u8 *buf, size_t buf_size, u32 *patch_size, bool early)
236{
237	struct microcode_header_amd *mc_hdr;
238	unsigned int ret;
239	u32 sh_psize;
240	u16 proc_id;
241	u8 patch_fam;
242
243	if (!__verify_patch_section(buf, buf_size, &sh_psize, early))
244		return -1;
245
246	/*
247	 * The section header length is not included in this indicated size
248	 * but is present in the leftover file length so we need to subtract
249	 * it before passing this value to the function below.
250	 */
251	buf_size -= SECTION_HDR_SIZE;
252
253	/*
254	 * Check if the remaining buffer is big enough to contain a patch of
255	 * size sh_psize, as the section claims.
256	 */
257	if (buf_size < sh_psize) {
258		if (!early)
259			pr_debug("Patch of size %u truncated.\n", sh_psize);
260
261		return -1;
262	}
263
264	ret = __verify_patch_size(family, sh_psize, buf_size);
265	if (!ret) {
266		if (!early)
267			pr_debug("Per-family patch size mismatch.\n");
268		return -1;
269	}
270
271	*patch_size = sh_psize;
272
273	mc_hdr	= (struct microcode_header_amd *)(buf + SECTION_HDR_SIZE);
274	if (mc_hdr->nb_dev_id || mc_hdr->sb_dev_id) {
275		if (!early)
276			pr_err("Patch-ID 0x%08x: chipset-specific code unsupported.\n", mc_hdr->patch_id);
277		return -1;
278	}
279
280	proc_id	= mc_hdr->processor_rev_id;
281	patch_fam = 0xf + (proc_id >> 12);
282	if (patch_fam != family)
283		return 1;
284
285	return 0;
286}
287
288/*
289 * This scans the ucode blob for the proper container as we can have multiple
290 * containers glued together. Returns the equivalence ID from the equivalence
291 * table or 0 if none found.
292 * Returns the amount of bytes consumed while scanning. @desc contains all the
293 * data we're going to use in later stages of the application.
294 */
295static size_t parse_container(u8 *ucode, size_t size, struct cont_desc *desc)
296{
297	struct equiv_cpu_table table;
298	size_t orig_size = size;
299	u32 *hdr = (u32 *)ucode;
300	u16 eq_id;
301	u8 *buf;
302
303	if (!verify_equivalence_table(ucode, size, true))
304		return 0;
305
306	buf = ucode;
307
308	table.entry = (struct equiv_cpu_entry *)(buf + CONTAINER_HDR_SZ);
309	table.num_entries = hdr[2] / sizeof(struct equiv_cpu_entry);
310
311	/*
312	 * Find the equivalence ID of our CPU in this table. Even if this table
313	 * doesn't contain a patch for the CPU, scan through the whole container
314	 * so that it can be skipped in case there are other containers appended.
315	 */
316	eq_id = find_equiv_id(&table, desc->cpuid_1_eax);
317
318	buf  += hdr[2] + CONTAINER_HDR_SZ;
319	size -= hdr[2] + CONTAINER_HDR_SZ;
320
321	/*
322	 * Scan through the rest of the container to find where it ends. We do
323	 * some basic sanity-checking too.
324	 */
325	while (size > 0) {
326		struct microcode_amd *mc;
327		u32 patch_size;
328		int ret;
329
330		ret = verify_patch(x86_family(desc->cpuid_1_eax), buf, size, &patch_size, true);
331		if (ret < 0) {
332			/*
333			 * Patch verification failed, skip to the next
334			 * container, if there's one:
335			 */
336			goto out;
337		} else if (ret > 0) {
338			goto skip;
339		}
340
341		mc = (struct microcode_amd *)(buf + SECTION_HDR_SIZE);
342		if (eq_id == mc->hdr.processor_rev_id) {
343			desc->psize = patch_size;
344			desc->mc = mc;
345		}
346
347skip:
348		/* Skip patch section header too: */
349		buf  += patch_size + SECTION_HDR_SIZE;
350		size -= patch_size + SECTION_HDR_SIZE;
351	}
352
353	/*
354	 * If we have found a patch (desc->mc), it means we're looking at the
355	 * container which has a patch for this CPU so return 0 to mean, @ucode
356	 * already points to the proper container. Otherwise, we return the size
357	 * we scanned so that we can advance to the next container in the
358	 * buffer.
359	 */
360	if (desc->mc) {
361		desc->data = ucode;
362		desc->size = orig_size - size;
363
364		return 0;
365	}
366
367out:
368	return orig_size - size;
369}
370
371/*
372 * Scan the ucode blob for the proper container as we can have multiple
373 * containers glued together.
374 */
375static void scan_containers(u8 *ucode, size_t size, struct cont_desc *desc)
376{
377	while (size) {
378		size_t s = parse_container(ucode, size, desc);
379		if (!s)
380			return;
381
382		/* catch wraparound */
383		if (size >= s) {
384			ucode += s;
385			size  -= s;
386		} else {
387			return;
388		}
389	}
390}
391
392static int __apply_microcode_amd(struct microcode_amd *mc)
393{
394	u32 rev, dummy;
395
396	native_wrmsrl(MSR_AMD64_PATCH_LOADER, (u64)(long)&mc->hdr.data_code);
397
398	/* verify patch application was successful */
399	native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
400	if (rev != mc->hdr.patch_id)
401		return -1;
402
403	return 0;
404}
405
406/*
407 * Early load occurs before we can vmalloc(). So we look for the microcode
408 * patch container file in initrd, traverse equivalent cpu table, look for a
409 * matching microcode patch, and update, all in initrd memory in place.
410 * When vmalloc() is available for use later -- on 64-bit during first AP load,
411 * and on 32-bit during save_microcode_in_initrd_amd() -- we can call
412 * load_microcode_amd() to save equivalent cpu table and microcode patches in
413 * kernel heap memory.
414 *
415 * Returns true if container found (sets @desc), false otherwise.
416 */
417static bool
418apply_microcode_early_amd(u32 cpuid_1_eax, void *ucode, size_t size, bool save_patch)
419{
420	struct cont_desc desc = { 0 };
421	u8 (*patch)[PATCH_MAX_SIZE];
422	struct microcode_amd *mc;
423	u32 rev, dummy, *new_rev;
424	bool ret = false;
425
426#ifdef CONFIG_X86_32
427	new_rev = (u32 *)__pa_nodebug(&ucode_new_rev);
428	patch	= (u8 (*)[PATCH_MAX_SIZE])__pa_nodebug(&amd_ucode_patch);
429#else
430	new_rev = &ucode_new_rev;
431	patch	= &amd_ucode_patch;
432#endif
433
434	desc.cpuid_1_eax = cpuid_1_eax;
435
436	scan_containers(ucode, size, &desc);
437
438	mc = desc.mc;
439	if (!mc)
440		return ret;
441
442	native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
443
444	/*
445	 * Allow application of the same revision to pick up SMT-specific
446	 * changes even if the revision of the other SMT thread is already
447	 * up-to-date.
448	 */
449	if (rev > mc->hdr.patch_id)
450		return ret;
451
452	if (!__apply_microcode_amd(mc)) {
453		*new_rev = mc->hdr.patch_id;
454		ret      = true;
455
456		if (save_patch)
457			memcpy(patch, mc, min_t(u32, desc.psize, PATCH_MAX_SIZE));
458	}
459
460	return ret;
461}
462
463static bool get_builtin_microcode(struct cpio_data *cp, unsigned int family)
464{
465	char fw_name[36] = "amd-ucode/microcode_amd.bin";
466	struct firmware fw;
467
468	if (IS_ENABLED(CONFIG_X86_32))
469		return false;
470
471	if (family >= 0x15)
472		snprintf(fw_name, sizeof(fw_name),
473			 "amd-ucode/microcode_amd_fam%.2xh.bin", family);
474
475	if (firmware_request_builtin(&fw, fw_name)) {
476		cp->size = fw.size;
477		cp->data = (void *)fw.data;
478		return true;
479	}
480
481	return false;
482}
483
484static void __load_ucode_amd(unsigned int cpuid_1_eax, struct cpio_data *ret)
485{
486	struct ucode_cpu_info *uci;
487	struct cpio_data cp;
488	const char *path;
489	bool use_pa;
490
491	if (IS_ENABLED(CONFIG_X86_32)) {
492		uci	= (struct ucode_cpu_info *)__pa_nodebug(ucode_cpu_info);
493		path	= (const char *)__pa_nodebug(ucode_path);
494		use_pa	= true;
495	} else {
496		uci     = ucode_cpu_info;
497		path	= ucode_path;
498		use_pa	= false;
499	}
500
501	if (!get_builtin_microcode(&cp, x86_family(cpuid_1_eax)))
502		cp = find_microcode_in_initrd(path, use_pa);
503
504	/* Needed in load_microcode_amd() */
505	uci->cpu_sig.sig = cpuid_1_eax;
506
507	*ret = cp;
508}
509
510void __init load_ucode_amd_bsp(unsigned int cpuid_1_eax)
511{
512	struct cpio_data cp = { };
513
514	__load_ucode_amd(cpuid_1_eax, &cp);
515	if (!(cp.data && cp.size))
516		return;
517
518	apply_microcode_early_amd(cpuid_1_eax, cp.data, cp.size, true);
519}
520
521void load_ucode_amd_ap(unsigned int cpuid_1_eax)
522{
523	struct microcode_amd *mc;
524	struct cpio_data cp;
525	u32 *new_rev, rev, dummy;
526
527	if (IS_ENABLED(CONFIG_X86_32)) {
528		mc	= (struct microcode_amd *)__pa_nodebug(amd_ucode_patch);
529		new_rev = (u32 *)__pa_nodebug(&ucode_new_rev);
530	} else {
531		mc	= (struct microcode_amd *)amd_ucode_patch;
532		new_rev = &ucode_new_rev;
533	}
534
535	native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
536
537	/*
538	 * Check whether a new patch has been saved already. Also, allow application of
539	 * the same revision in order to pick up SMT-thread-specific configuration even
540	 * if the sibling SMT thread already has an up-to-date revision.
541	 */
542	if (*new_rev && rev <= mc->hdr.patch_id) {
543		if (!__apply_microcode_amd(mc)) {
544			*new_rev = mc->hdr.patch_id;
545			return;
546		}
547	}
548
549	__load_ucode_amd(cpuid_1_eax, &cp);
550	if (!(cp.data && cp.size))
551		return;
552
553	apply_microcode_early_amd(cpuid_1_eax, cp.data, cp.size, false);
554}
555
556static enum ucode_state
557load_microcode_amd(bool save, u8 family, const u8 *data, size_t size);
558
559int __init save_microcode_in_initrd_amd(unsigned int cpuid_1_eax)
560{
561	struct cont_desc desc = { 0 };
562	enum ucode_state ret;
563	struct cpio_data cp;
564
565	cp = find_microcode_in_initrd(ucode_path, false);
566	if (!(cp.data && cp.size))
567		return -EINVAL;
568
569	desc.cpuid_1_eax = cpuid_1_eax;
570
571	scan_containers(cp.data, cp.size, &desc);
572	if (!desc.mc)
573		return -EINVAL;
574
575	ret = load_microcode_amd(true, x86_family(cpuid_1_eax), desc.data, desc.size);
576	if (ret > UCODE_UPDATED)
577		return -EINVAL;
578
579	return 0;
580}
581
582void reload_ucode_amd(void)
583{
584	struct microcode_amd *mc;
585	u32 rev, dummy __always_unused;
586
587	mc = (struct microcode_amd *)amd_ucode_patch;
588
589	rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
590
591	if (rev < mc->hdr.patch_id) {
592		if (!__apply_microcode_amd(mc)) {
593			ucode_new_rev = mc->hdr.patch_id;
594			pr_info("reload patch_level=0x%08x\n", ucode_new_rev);
595		}
596	}
597}
598static u16 __find_equiv_id(unsigned int cpu)
599{
600	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
601	return find_equiv_id(&equiv_table, uci->cpu_sig.sig);
602}
603
604/*
605 * a small, trivial cache of per-family ucode patches
606 */
607static struct ucode_patch *cache_find_patch(u16 equiv_cpu)
608{
609	struct ucode_patch *p;
610
611	list_for_each_entry(p, &microcode_cache, plist)
612		if (p->equiv_cpu == equiv_cpu)
613			return p;
614	return NULL;
615}
616
617static void update_cache(struct ucode_patch *new_patch)
618{
619	struct ucode_patch *p;
620
621	list_for_each_entry(p, &microcode_cache, plist) {
622		if (p->equiv_cpu == new_patch->equiv_cpu) {
623			if (p->patch_id >= new_patch->patch_id) {
624				/* we already have the latest patch */
625				kfree(new_patch->data);
626				kfree(new_patch);
627				return;
628			}
629
630			list_replace(&p->plist, &new_patch->plist);
631			kfree(p->data);
632			kfree(p);
633			return;
634		}
635	}
636	/* no patch found, add it */
637	list_add_tail(&new_patch->plist, &microcode_cache);
638}
639
640static void free_cache(void)
641{
642	struct ucode_patch *p, *tmp;
643
644	list_for_each_entry_safe(p, tmp, &microcode_cache, plist) {
645		__list_del(p->plist.prev, p->plist.next);
646		kfree(p->data);
647		kfree(p);
648	}
649}
650
651static struct ucode_patch *find_patch(unsigned int cpu)
652{
653	u16 equiv_id;
654
655	equiv_id = __find_equiv_id(cpu);
656	if (!equiv_id)
657		return NULL;
658
659	return cache_find_patch(equiv_id);
660}
661
662static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
663{
664	struct cpuinfo_x86 *c = &cpu_data(cpu);
665	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
666	struct ucode_patch *p;
667
668	csig->sig = cpuid_eax(0x00000001);
669	csig->rev = c->microcode;
670
671	/*
672	 * a patch could have been loaded early, set uci->mc so that
673	 * mc_bp_resume() can call apply_microcode()
674	 */
675	p = find_patch(cpu);
676	if (p && (p->patch_id == csig->rev))
677		uci->mc = p->data;
678
679	pr_info("CPU%d: patch_level=0x%08x\n", cpu, csig->rev);
680
681	return 0;
682}
683
684static enum ucode_state apply_microcode_amd(int cpu)
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
685{
686	struct cpuinfo_x86 *c = &cpu_data(cpu);
687	struct microcode_amd *mc_amd;
688	struct ucode_cpu_info *uci;
689	struct ucode_patch *p;
690	enum ucode_state ret;
691	u32 rev, dummy __always_unused;
692
693	BUG_ON(raw_smp_processor_id() != cpu);
694
695	uci = ucode_cpu_info + cpu;
696
697	p = find_patch(cpu);
698	if (!p)
699		return UCODE_NFOUND;
700
701	mc_amd  = p->data;
702	uci->mc = p->data;
703
704	rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
705
706	/* need to apply patch? */
707	if (rev >= mc_amd->hdr.patch_id) {
708		ret = UCODE_OK;
709		goto out;
 
710	}
711
712	if (__apply_microcode_amd(mc_amd)) {
713		pr_err("CPU%d: update failed for patch_level=0x%08x\n",
714			cpu, mc_amd->hdr.patch_id);
715		return UCODE_ERROR;
716	}
 
 
717
718	rev = mc_amd->hdr.patch_id;
719	ret = UCODE_UPDATED;
720
721	pr_info("CPU%d: new patch_level=0x%08x\n", cpu, rev);
722
723out:
724	uci->cpu_sig.rev = rev;
725	c->microcode	 = rev;
726
727	/* Update boot_cpu_data's revision too, if we're on the BSP: */
728	if (c->cpu_index == boot_cpu_data.cpu_index)
729		boot_cpu_data.microcode = rev;
730
731	return ret;
732}
733
734static size_t install_equiv_cpu_table(const u8 *buf, size_t buf_size)
735{
736	u32 equiv_tbl_len;
737	const u32 *hdr;
738
739	if (!verify_equivalence_table(buf, buf_size, false))
740		return 0;
741
742	hdr = (const u32 *)buf;
743	equiv_tbl_len = hdr[2];
 
744
745	equiv_table.entry = vmalloc(equiv_tbl_len);
746	if (!equiv_table.entry) {
747		pr_err("failed to allocate equivalent CPU table\n");
748		return 0;
749	}
750
751	memcpy(equiv_table.entry, buf + CONTAINER_HDR_SZ, equiv_tbl_len);
752	equiv_table.num_entries = equiv_tbl_len / sizeof(struct equiv_cpu_entry);
753
754	/* add header length */
755	return equiv_tbl_len + CONTAINER_HDR_SZ;
756}
757
758static void free_equiv_cpu_table(void)
759{
760	vfree(equiv_table.entry);
761	memset(&equiv_table, 0, sizeof(equiv_table));
762}
763
764static void cleanup(void)
765{
766	free_equiv_cpu_table();
767	free_cache();
768}
769
770/*
771 * Return a non-negative value even if some of the checks failed so that
772 * we can skip over the next patch. If we return a negative value, we
773 * signal a grave error like a memory allocation has failed and the
774 * driver cannot continue functioning normally. In such cases, we tear
775 * down everything we've used up so far and exit.
776 */
777static int verify_and_add_patch(u8 family, u8 *fw, unsigned int leftover,
778				unsigned int *patch_size)
779{
780	struct microcode_header_amd *mc_hdr;
781	struct ucode_patch *patch;
 
 
782	u16 proc_id;
783	int ret;
784
785	ret = verify_patch(family, fw, leftover, patch_size, false);
786	if (ret)
787		return ret;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
788
789	patch = kzalloc(sizeof(*patch), GFP_KERNEL);
790	if (!patch) {
791		pr_err("Patch allocation failure.\n");
792		return -EINVAL;
793	}
794
795	patch->data = kmemdup(fw + SECTION_HDR_SIZE, *patch_size, GFP_KERNEL);
796	if (!patch->data) {
797		pr_err("Patch data allocation failure.\n");
798		kfree(patch);
799		return -EINVAL;
800	}
801	patch->size = *patch_size;
802
803	mc_hdr      = (struct microcode_header_amd *)(fw + SECTION_HDR_SIZE);
804	proc_id     = mc_hdr->processor_rev_id;
805
 
 
806	INIT_LIST_HEAD(&patch->plist);
807	patch->patch_id  = mc_hdr->patch_id;
808	patch->equiv_cpu = proc_id;
809
810	pr_debug("%s: Added patch_id: 0x%08x, proc_id: 0x%04x\n",
811		 __func__, patch->patch_id, proc_id);
812
813	/* ... and add to cache. */
814	update_cache(patch);
815
816	return 0;
817}
818
819static enum ucode_state __load_microcode_amd(u8 family, const u8 *data,
820					     size_t size)
821{
 
 
822	u8 *fw = (u8 *)data;
823	size_t offset;
 
824
825	offset = install_equiv_cpu_table(data, size);
826	if (!offset)
827		return UCODE_ERROR;
828
829	fw   += offset;
830	size -= offset;
 
831
832	if (*(u32 *)fw != UCODE_UCODE_TYPE) {
833		pr_err("invalid type field in container file section header\n");
834		free_equiv_cpu_table();
835		return UCODE_ERROR;
836	}
837
838	while (size > 0) {
839		unsigned int crnt_size = 0;
840		int ret;
841
842		ret = verify_and_add_patch(family, fw, size, &crnt_size);
843		if (ret < 0)
844			return UCODE_ERROR;
845
846		fw   +=  crnt_size + SECTION_HDR_SIZE;
847		size -= (crnt_size + SECTION_HDR_SIZE);
848	}
849
850	return UCODE_OK;
851}
852
853static enum ucode_state
854load_microcode_amd(bool save, u8 family, const u8 *data, size_t size)
855{
856	struct ucode_patch *p;
857	enum ucode_state ret;
858
859	/* free old equiv table */
860	free_equiv_cpu_table();
861
862	ret = __load_microcode_amd(family, data, size);
863	if (ret != UCODE_OK) {
864		cleanup();
865		return ret;
866	}
867
868	p = find_patch(0);
869	if (!p) {
870		return ret;
871	} else {
872		if (boot_cpu_data.microcode >= p->patch_id)
873			return ret;
874
875		ret = UCODE_NEW;
876	}
877
 
878	/* save BSP's matching patch for early load */
879	if (!save)
880		return ret;
881
882	memset(amd_ucode_patch, 0, PATCH_MAX_SIZE);
883	memcpy(amd_ucode_patch, p->data, min_t(u32, p->size, PATCH_MAX_SIZE));
884
 
 
 
885	return ret;
886}
887
888/*
889 * AMD microcode firmware naming convention, up to family 15h they are in
890 * the legacy file:
891 *
892 *    amd-ucode/microcode_amd.bin
893 *
894 * This legacy file is always smaller than 2K in size.
895 *
896 * Beginning with family 15h, they are in family-specific firmware files:
897 *
898 *    amd-ucode/microcode_amd_fam15h.bin
899 *    amd-ucode/microcode_amd_fam16h.bin
900 *    ...
901 *
902 * These might be larger than 2K.
903 */
904static enum ucode_state request_microcode_amd(int cpu, struct device *device)
 
905{
906	char fw_name[36] = "amd-ucode/microcode_amd.bin";
907	struct cpuinfo_x86 *c = &cpu_data(cpu);
908	bool bsp = c->cpu_index == boot_cpu_data.cpu_index;
909	enum ucode_state ret = UCODE_NFOUND;
910	const struct firmware *fw;
911
912	/* reload ucode container only on the boot cpu */
913	if (!bsp)
914		return UCODE_OK;
915
916	if (c->x86 >= 0x15)
917		snprintf(fw_name, sizeof(fw_name), "amd-ucode/microcode_amd_fam%.2xh.bin", c->x86);
918
919	if (request_firmware_direct(&fw, (const char *)fw_name, device)) {
920		pr_debug("failed to load file %s\n", fw_name);
921		goto out;
922	}
923
924	ret = UCODE_ERROR;
925	if (!verify_container(fw->data, fw->size, false))
 
926		goto fw_release;
 
927
928	ret = load_microcode_amd(bsp, c->x86, fw->data, fw->size);
929
930 fw_release:
931	release_firmware(fw);
932
933 out:
934	return ret;
935}
936
 
 
 
 
 
 
937static void microcode_fini_cpu_amd(int cpu)
938{
939	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
940
941	uci->mc = NULL;
942}
943
944static struct microcode_ops microcode_amd_ops = {
 
945	.request_microcode_fw             = request_microcode_amd,
946	.collect_cpu_info                 = collect_cpu_info_amd,
947	.apply_microcode                  = apply_microcode_amd,
948	.microcode_fini_cpu               = microcode_fini_cpu_amd,
949};
950
951struct microcode_ops * __init init_amd_microcode(void)
952{
953	struct cpuinfo_x86 *c = &boot_cpu_data;
954
955	if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) {
956		pr_warn("AMD CPU family 0x%x not supported\n", c->x86);
957		return NULL;
958	}
959
960	if (ucode_new_rev)
961		pr_info_once("microcode updated early to new patch_level=0x%08x\n",
962			     ucode_new_rev);
963
964	return &microcode_amd_ops;
965}
966
967void __exit exit_amd_microcode(void)
968{
969	cleanup();
970}