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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * OF helpers for IOMMU
4 *
5 * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
6 */
7
8#include <linux/export.h>
9#include <linux/iommu.h>
10#include <linux/limits.h>
11#include <linux/module.h>
12#include <linux/of.h>
13#include <linux/of_address.h>
14#include <linux/of_iommu.h>
15#include <linux/of_pci.h>
16#include <linux/pci.h>
17#include <linux/slab.h>
18#include <linux/fsl/mc.h>
19
20#include "iommu-priv.h"
21
22static int of_iommu_xlate(struct device *dev,
23 struct of_phandle_args *iommu_spec)
24{
25 const struct iommu_ops *ops;
26 int ret;
27
28 if (!of_device_is_available(iommu_spec->np))
29 return -ENODEV;
30
31 ret = iommu_fwspec_init(dev, of_fwnode_handle(iommu_spec->np));
32 if (ret == -EPROBE_DEFER)
33 return driver_deferred_probe_check_state(dev);
34 if (ret)
35 return ret;
36
37 ops = iommu_ops_from_fwnode(&iommu_spec->np->fwnode);
38 if (!ops->of_xlate || !try_module_get(ops->owner))
39 return -ENODEV;
40
41 ret = ops->of_xlate(dev, iommu_spec);
42 module_put(ops->owner);
43 return ret;
44}
45
46static int of_iommu_configure_dev_id(struct device_node *master_np,
47 struct device *dev,
48 const u32 *id)
49{
50 struct of_phandle_args iommu_spec = { .args_count = 1 };
51 int err;
52
53 err = of_map_id(master_np, *id, "iommu-map",
54 "iommu-map-mask", &iommu_spec.np,
55 iommu_spec.args);
56 if (err)
57 return err;
58
59 err = of_iommu_xlate(dev, &iommu_spec);
60 of_node_put(iommu_spec.np);
61 return err;
62}
63
64static int of_iommu_configure_dev(struct device_node *master_np,
65 struct device *dev)
66{
67 struct of_phandle_args iommu_spec;
68 int err = -ENODEV, idx = 0;
69
70 while (!of_parse_phandle_with_args(master_np, "iommus",
71 "#iommu-cells",
72 idx, &iommu_spec)) {
73 err = of_iommu_xlate(dev, &iommu_spec);
74 of_node_put(iommu_spec.np);
75 idx++;
76 if (err)
77 break;
78 }
79
80 return err;
81}
82
83struct of_pci_iommu_alias_info {
84 struct device *dev;
85 struct device_node *np;
86};
87
88static int of_pci_iommu_init(struct pci_dev *pdev, u16 alias, void *data)
89{
90 struct of_pci_iommu_alias_info *info = data;
91 u32 input_id = alias;
92
93 return of_iommu_configure_dev_id(info->np, info->dev, &input_id);
94}
95
96static int of_iommu_configure_device(struct device_node *master_np,
97 struct device *dev, const u32 *id)
98{
99 return (id) ? of_iommu_configure_dev_id(master_np, dev, id) :
100 of_iommu_configure_dev(master_np, dev);
101}
102
103static void of_pci_check_device_ats(struct device *dev, struct device_node *np)
104{
105 struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
106
107 if (fwspec && of_property_read_bool(np, "ats-supported"))
108 fwspec->flags |= IOMMU_FWSPEC_PCI_RC_ATS;
109}
110
111/*
112 * Returns:
113 * 0 on success, an iommu was configured
114 * -ENODEV if the device does not have any IOMMU
115 * -EPROBEDEFER if probing should be tried again
116 * -errno fatal errors
117 */
118int of_iommu_configure(struct device *dev, struct device_node *master_np,
119 const u32 *id)
120{
121 int err;
122
123 if (!master_np)
124 return -ENODEV;
125
126 /* Serialise to make dev->iommu stable under our potential fwspec */
127 mutex_lock(&iommu_probe_device_lock);
128 if (dev_iommu_fwspec_get(dev)) {
129 mutex_unlock(&iommu_probe_device_lock);
130 return 0;
131 }
132
133 /*
134 * We don't currently walk up the tree looking for a parent IOMMU.
135 * See the `Notes:' section of
136 * Documentation/devicetree/bindings/iommu/iommu.txt
137 */
138 if (dev_is_pci(dev)) {
139 struct of_pci_iommu_alias_info info = {
140 .dev = dev,
141 .np = master_np,
142 };
143
144 pci_request_acs();
145 err = pci_for_each_dma_alias(to_pci_dev(dev),
146 of_pci_iommu_init, &info);
147 of_pci_check_device_ats(dev, master_np);
148 } else {
149 err = of_iommu_configure_device(master_np, dev, id);
150 }
151
152 if (err)
153 iommu_fwspec_free(dev);
154 mutex_unlock(&iommu_probe_device_lock);
155
156 if (!err && dev->bus)
157 err = iommu_probe_device(dev);
158
159 if (err && err != -EPROBE_DEFER)
160 dev_dbg(dev, "Adding to IOMMU failed: %d\n", err);
161
162 return err;
163}
164
165static enum iommu_resv_type __maybe_unused
166iommu_resv_region_get_type(struct device *dev,
167 struct resource *phys,
168 phys_addr_t start, size_t length)
169{
170 phys_addr_t end = start + length - 1;
171
172 /*
173 * IOMMU regions without an associated physical region cannot be
174 * mapped and are simply reservations.
175 */
176 if (phys->start >= phys->end)
177 return IOMMU_RESV_RESERVED;
178
179 /* may be IOMMU_RESV_DIRECT_RELAXABLE for certain cases */
180 if (start == phys->start && end == phys->end)
181 return IOMMU_RESV_DIRECT;
182
183 dev_warn(dev, "treating non-direct mapping [%pr] -> [%pap-%pap] as reservation\n", phys,
184 &start, &end);
185 return IOMMU_RESV_RESERVED;
186}
187
188/**
189 * of_iommu_get_resv_regions - reserved region driver helper for device tree
190 * @dev: device for which to get reserved regions
191 * @list: reserved region list
192 *
193 * IOMMU drivers can use this to implement their .get_resv_regions() callback
194 * for memory regions attached to a device tree node. See the reserved-memory
195 * device tree bindings on how to use these:
196 *
197 * Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
198 */
199void of_iommu_get_resv_regions(struct device *dev, struct list_head *list)
200{
201#if IS_ENABLED(CONFIG_OF_ADDRESS)
202 struct of_phandle_iterator it;
203 int err;
204
205 of_for_each_phandle(&it, err, dev->of_node, "memory-region", NULL, 0) {
206 const __be32 *maps, *end;
207 struct resource phys;
208 int size;
209
210 memset(&phys, 0, sizeof(phys));
211
212 /*
213 * The "reg" property is optional and can be omitted by reserved-memory regions
214 * that represent reservations in the IOVA space, which are regions that should
215 * not be mapped.
216 */
217 if (of_property_present(it.node, "reg")) {
218 err = of_address_to_resource(it.node, 0, &phys);
219 if (err < 0) {
220 dev_err(dev, "failed to parse memory region %pOF: %d\n",
221 it.node, err);
222 continue;
223 }
224 }
225
226 maps = of_get_property(it.node, "iommu-addresses", &size);
227 if (!maps)
228 continue;
229
230 end = maps + size / sizeof(__be32);
231
232 while (maps < end) {
233 struct device_node *np;
234 u32 phandle;
235
236 phandle = be32_to_cpup(maps++);
237 np = of_find_node_by_phandle(phandle);
238
239 if (np == dev->of_node) {
240 int prot = IOMMU_READ | IOMMU_WRITE;
241 struct iommu_resv_region *region;
242 enum iommu_resv_type type;
243 phys_addr_t iova;
244 size_t length;
245
246 if (of_dma_is_coherent(dev->of_node))
247 prot |= IOMMU_CACHE;
248
249 maps = of_translate_dma_region(np, maps, &iova, &length);
250 if (length == 0) {
251 dev_warn(dev, "Cannot reserve IOVA region of 0 size\n");
252 continue;
253 }
254 type = iommu_resv_region_get_type(dev, &phys, iova, length);
255
256 region = iommu_alloc_resv_region(iova, length, prot, type,
257 GFP_KERNEL);
258 if (region)
259 list_add_tail(®ion->list, list);
260 }
261 }
262 }
263#endif
264}
265EXPORT_SYMBOL(of_iommu_get_resv_regions);
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * OF helpers for IOMMU
4 *
5 * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
6 */
7
8#include <linux/export.h>
9#include <linux/iommu.h>
10#include <linux/limits.h>
11#include <linux/module.h>
12#include <linux/of.h>
13#include <linux/of_iommu.h>
14#include <linux/of_pci.h>
15#include <linux/pci.h>
16#include <linux/slab.h>
17#include <linux/fsl/mc.h>
18
19#define NO_IOMMU 1
20
21static int of_iommu_xlate(struct device *dev,
22 struct of_phandle_args *iommu_spec)
23{
24 const struct iommu_ops *ops;
25 struct fwnode_handle *fwnode = &iommu_spec->np->fwnode;
26 int ret;
27
28 ops = iommu_ops_from_fwnode(fwnode);
29 if ((ops && !ops->of_xlate) ||
30 !of_device_is_available(iommu_spec->np))
31 return NO_IOMMU;
32
33 ret = iommu_fwspec_init(dev, &iommu_spec->np->fwnode, ops);
34 if (ret)
35 return ret;
36 /*
37 * The otherwise-empty fwspec handily serves to indicate the specific
38 * IOMMU device we're waiting for, which will be useful if we ever get
39 * a proper probe-ordering dependency mechanism in future.
40 */
41 if (!ops)
42 return driver_deferred_probe_check_state(dev);
43
44 if (!try_module_get(ops->owner))
45 return -ENODEV;
46
47 ret = ops->of_xlate(dev, iommu_spec);
48 module_put(ops->owner);
49 return ret;
50}
51
52static int of_iommu_configure_dev_id(struct device_node *master_np,
53 struct device *dev,
54 const u32 *id)
55{
56 struct of_phandle_args iommu_spec = { .args_count = 1 };
57 int err;
58
59 err = of_map_id(master_np, *id, "iommu-map",
60 "iommu-map-mask", &iommu_spec.np,
61 iommu_spec.args);
62 if (err)
63 return err == -ENODEV ? NO_IOMMU : err;
64
65 err = of_iommu_xlate(dev, &iommu_spec);
66 of_node_put(iommu_spec.np);
67 return err;
68}
69
70static int of_iommu_configure_dev(struct device_node *master_np,
71 struct device *dev)
72{
73 struct of_phandle_args iommu_spec;
74 int err = NO_IOMMU, idx = 0;
75
76 while (!of_parse_phandle_with_args(master_np, "iommus",
77 "#iommu-cells",
78 idx, &iommu_spec)) {
79 err = of_iommu_xlate(dev, &iommu_spec);
80 of_node_put(iommu_spec.np);
81 idx++;
82 if (err)
83 break;
84 }
85
86 return err;
87}
88
89struct of_pci_iommu_alias_info {
90 struct device *dev;
91 struct device_node *np;
92};
93
94static int of_pci_iommu_init(struct pci_dev *pdev, u16 alias, void *data)
95{
96 struct of_pci_iommu_alias_info *info = data;
97 u32 input_id = alias;
98
99 return of_iommu_configure_dev_id(info->np, info->dev, &input_id);
100}
101
102static int of_iommu_configure_device(struct device_node *master_np,
103 struct device *dev, const u32 *id)
104{
105 return (id) ? of_iommu_configure_dev_id(master_np, dev, id) :
106 of_iommu_configure_dev(master_np, dev);
107}
108
109const struct iommu_ops *of_iommu_configure(struct device *dev,
110 struct device_node *master_np,
111 const u32 *id)
112{
113 const struct iommu_ops *ops = NULL;
114 struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
115 int err = NO_IOMMU;
116
117 if (!master_np)
118 return NULL;
119
120 if (fwspec) {
121 if (fwspec->ops)
122 return fwspec->ops;
123
124 /* In the deferred case, start again from scratch */
125 iommu_fwspec_free(dev);
126 }
127
128 /*
129 * We don't currently walk up the tree looking for a parent IOMMU.
130 * See the `Notes:' section of
131 * Documentation/devicetree/bindings/iommu/iommu.txt
132 */
133 if (dev_is_pci(dev)) {
134 struct of_pci_iommu_alias_info info = {
135 .dev = dev,
136 .np = master_np,
137 };
138
139 pci_request_acs();
140 err = pci_for_each_dma_alias(to_pci_dev(dev),
141 of_pci_iommu_init, &info);
142 } else {
143 err = of_iommu_configure_device(master_np, dev, id);
144 }
145
146 /*
147 * Two success conditions can be represented by non-negative err here:
148 * >0 : there is no IOMMU, or one was unavailable for non-fatal reasons
149 * 0 : we found an IOMMU, and dev->fwspec is initialised appropriately
150 * <0 : any actual error
151 */
152 if (!err) {
153 /* The fwspec pointer changed, read it again */
154 fwspec = dev_iommu_fwspec_get(dev);
155 ops = fwspec->ops;
156 }
157 /*
158 * If we have reason to believe the IOMMU driver missed the initial
159 * probe for dev, replay it to get things in order.
160 */
161 if (!err && dev->bus && !device_iommu_mapped(dev))
162 err = iommu_probe_device(dev);
163
164 /* Ignore all other errors apart from EPROBE_DEFER */
165 if (err == -EPROBE_DEFER) {
166 ops = ERR_PTR(err);
167 } else if (err < 0) {
168 dev_dbg(dev, "Adding to IOMMU failed: %d\n", err);
169 ops = NULL;
170 }
171
172 return ops;
173}