1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * linux/arch/arm/mach-omap1/fpga.c
  4 *
  5 * Interrupt handler for OMAP-1510 Innovator FPGA
  6 *
  7 * Copyright (C) 2001 RidgeRun, Inc.
  8 * Author: Greg Lonnon <glonnon@ridgerun.com>
  9 *
 10 * Copyright (C) 2002 MontaVista Software, Inc.
 11 *
 12 * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6
 13 * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com>
 14 */
 15
 16#include <linux/types.h>
 17#include <linux/gpio.h>
 18#include <linux/init.h>
 19#include <linux/kernel.h>
 20#include <linux/device.h>
 21#include <linux/errno.h>
 22#include <linux/io.h>
 23
 24#include <asm/irq.h>
 25#include <asm/mach/irq.h>
 26
 27#include "hardware.h"
 28#include "iomap.h"
 29#include "common.h"
 30#include "fpga.h"
 31
 32static void fpga_mask_irq(struct irq_data *d)
 33{
 34	unsigned int irq = d->irq - OMAP_FPGA_IRQ_BASE;
 35
 36	if (irq < 8)
 37		__raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO)
 38			      & ~(1 << irq)), OMAP1510_FPGA_IMR_LO);
 39	else if (irq < 16)
 40		__raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_HI)
 41			      & ~(1 << (irq - 8))), OMAP1510_FPGA_IMR_HI);
 42	else
 43		__raw_writeb((__raw_readb(INNOVATOR_FPGA_IMR2)
 44			      & ~(1 << (irq - 16))), INNOVATOR_FPGA_IMR2);
 45}
 46
 47
 48static inline u32 get_fpga_unmasked_irqs(void)
 49{
 50	return
 51		((__raw_readb(OMAP1510_FPGA_ISR_LO) &
 52		  __raw_readb(OMAP1510_FPGA_IMR_LO))) |
 53		((__raw_readb(OMAP1510_FPGA_ISR_HI) &
 54		  __raw_readb(OMAP1510_FPGA_IMR_HI)) << 8) |
 55		((__raw_readb(INNOVATOR_FPGA_ISR2) &
 56		  __raw_readb(INNOVATOR_FPGA_IMR2)) << 16);
 57}
 58
 59
 60static void fpga_ack_irq(struct irq_data *d)
 61{
 62	/* Don't need to explicitly ACK FPGA interrupts */
 63}
 64
 65static void fpga_unmask_irq(struct irq_data *d)
 66{
 67	unsigned int irq = d->irq - OMAP_FPGA_IRQ_BASE;
 68
 69	if (irq < 8)
 70		__raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO) | (1 << irq)),
 71		     OMAP1510_FPGA_IMR_LO);
 72	else if (irq < 16)
 73		__raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_HI)
 74			      | (1 << (irq - 8))), OMAP1510_FPGA_IMR_HI);
 75	else
 76		__raw_writeb((__raw_readb(INNOVATOR_FPGA_IMR2)
 77			      | (1 << (irq - 16))), INNOVATOR_FPGA_IMR2);
 78}
 79
 80static void fpga_mask_ack_irq(struct irq_data *d)
 81{
 82	fpga_mask_irq(d);
 83	fpga_ack_irq(d);
 84}
 85
 86static void innovator_fpga_IRQ_demux(struct irq_desc *desc)
 87{
 88	u32 stat;
 89	int fpga_irq;
 90
 91	stat = get_fpga_unmasked_irqs();
 92
 93	if (!stat)
 94		return;
 95
 96	for (fpga_irq = OMAP_FPGA_IRQ_BASE;
 97	     (fpga_irq < OMAP_FPGA_IRQ_END) && stat;
 98	     fpga_irq++, stat >>= 1) {
 99		if (stat & 1) {
100			generic_handle_irq(fpga_irq);
101		}
102	}
103}
104
105static struct irq_chip omap_fpga_irq_ack = {
106	.name		= "FPGA-ack",
107	.irq_ack	= fpga_mask_ack_irq,
108	.irq_mask	= fpga_mask_irq,
109	.irq_unmask	= fpga_unmask_irq,
110};
111
112
113static struct irq_chip omap_fpga_irq = {
114	.name		= "FPGA",
115	.irq_ack	= fpga_ack_irq,
116	.irq_mask	= fpga_mask_irq,
117	.irq_unmask	= fpga_unmask_irq,
118};
119
120/*
121 * All of the FPGA interrupt request inputs except for the touchscreen are
122 * edge-sensitive; the touchscreen is level-sensitive.  The edge-sensitive
123 * interrupts are acknowledged as a side-effect of reading the interrupt
124 * status register from the FPGA.  The edge-sensitive interrupt inputs
125 * cause a problem with level interrupt requests, such as Ethernet.  The
126 * problem occurs when a level interrupt request is asserted while its
127 * interrupt input is masked in the FPGA, which results in a missed
128 * interrupt.
129 *
130 * In an attempt to workaround the problem with missed interrupts, the
131 * mask_ack routine for all of the FPGA interrupts has been changed from
132 * fpga_mask_ack_irq() to fpga_ack_irq() so that the specific FPGA interrupt
133 * being serviced is left unmasked.  We can do this because the FPGA cascade
134 * interrupt is run with all interrupts masked.
135 *
136 * Limited testing indicates that this workaround appears to be effective
137 * for the smc9194 Ethernet driver used on the Innovator.  It should work
138 * on other FPGA interrupts as well, but any drivers that explicitly mask
139 * interrupts at the interrupt controller via disable_irq/enable_irq
140 * could pose a problem.
141 */
142void omap1510_fpga_init_irq(void)
143{
144	int i, res;
145
146	__raw_writeb(0, OMAP1510_FPGA_IMR_LO);
147	__raw_writeb(0, OMAP1510_FPGA_IMR_HI);
148	__raw_writeb(0, INNOVATOR_FPGA_IMR2);
149
150	for (i = OMAP_FPGA_IRQ_BASE; i < OMAP_FPGA_IRQ_END; i++) {
151
152		if (i == OMAP1510_INT_FPGA_TS) {
153			/*
154			 * The touchscreen interrupt is level-sensitive, so
155			 * we'll use the regular mask_ack routine for it.
156			 */
157			irq_set_chip(i, &omap_fpga_irq_ack);
158		}
159		else {
160			/*
161			 * All FPGA interrupts except the touchscreen are
162			 * edge-sensitive, so we won't mask them.
163			 */
164			irq_set_chip(i, &omap_fpga_irq);
165		}
166
167		irq_set_handler(i, handle_edge_irq);
168		irq_clear_status_flags(i, IRQ_NOREQUEST);
169	}
170
171	/*
172	 * The FPGA interrupt line is connected to GPIO13. Claim this pin for
173	 * the ARM.
174	 *
175	 * NOTE: For general GPIO/MPUIO access and interrupts, please see
176	 * gpio.[ch]
177	 */
178	res = gpio_request(13, "FPGA irq");
179	if (res) {
180		pr_err("%s failed to get gpio\n", __func__);
181		return;
182	}
183	gpio_direction_input(13);
184	irq_set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING);
185	irq_set_chained_handler(OMAP1510_INT_FPGA, innovator_fpga_IRQ_demux);
186}