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1// SPDX-License-Identifier: GPL-2.0
2/* Copyright (c) 2018, Intel Corporation. */
3
4/* The driver transmit and receive code */
5
6#include <linux/mm.h>
7#include <linux/netdevice.h>
8#include <linux/prefetch.h>
9#include <linux/bpf_trace.h>
10#include <net/dsfield.h>
11#include <net/mpls.h>
12#include <net/xdp.h>
13#include "ice_txrx_lib.h"
14#include "ice_lib.h"
15#include "ice.h"
16#include "ice_trace.h"
17#include "ice_dcb_lib.h"
18#include "ice_xsk.h"
19#include "ice_eswitch.h"
20
21#define ICE_RX_HDR_SIZE 256
22
23#define FDIR_DESC_RXDID 0x40
24#define ICE_FDIR_CLEAN_DELAY 10
25
26/**
27 * ice_prgm_fdir_fltr - Program a Flow Director filter
28 * @vsi: VSI to send dummy packet
29 * @fdir_desc: flow director descriptor
30 * @raw_packet: allocated buffer for flow director
31 */
32int
33ice_prgm_fdir_fltr(struct ice_vsi *vsi, struct ice_fltr_desc *fdir_desc,
34 u8 *raw_packet)
35{
36 struct ice_tx_buf *tx_buf, *first;
37 struct ice_fltr_desc *f_desc;
38 struct ice_tx_desc *tx_desc;
39 struct ice_tx_ring *tx_ring;
40 struct device *dev;
41 dma_addr_t dma;
42 u32 td_cmd;
43 u16 i;
44
45 /* VSI and Tx ring */
46 if (!vsi)
47 return -ENOENT;
48 tx_ring = vsi->tx_rings[0];
49 if (!tx_ring || !tx_ring->desc)
50 return -ENOENT;
51 dev = tx_ring->dev;
52
53 /* we are using two descriptors to add/del a filter and we can wait */
54 for (i = ICE_FDIR_CLEAN_DELAY; ICE_DESC_UNUSED(tx_ring) < 2; i--) {
55 if (!i)
56 return -EAGAIN;
57 msleep_interruptible(1);
58 }
59
60 dma = dma_map_single(dev, raw_packet, ICE_FDIR_MAX_RAW_PKT_SIZE,
61 DMA_TO_DEVICE);
62
63 if (dma_mapping_error(dev, dma))
64 return -EINVAL;
65
66 /* grab the next descriptor */
67 i = tx_ring->next_to_use;
68 first = &tx_ring->tx_buf[i];
69 f_desc = ICE_TX_FDIRDESC(tx_ring, i);
70 memcpy(f_desc, fdir_desc, sizeof(*f_desc));
71
72 i++;
73 i = (i < tx_ring->count) ? i : 0;
74 tx_desc = ICE_TX_DESC(tx_ring, i);
75 tx_buf = &tx_ring->tx_buf[i];
76
77 i++;
78 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
79
80 memset(tx_buf, 0, sizeof(*tx_buf));
81 dma_unmap_len_set(tx_buf, len, ICE_FDIR_MAX_RAW_PKT_SIZE);
82 dma_unmap_addr_set(tx_buf, dma, dma);
83
84 tx_desc->buf_addr = cpu_to_le64(dma);
85 td_cmd = ICE_TXD_LAST_DESC_CMD | ICE_TX_DESC_CMD_DUMMY |
86 ICE_TX_DESC_CMD_RE;
87
88 tx_buf->type = ICE_TX_BUF_DUMMY;
89 tx_buf->raw_buf = raw_packet;
90
91 tx_desc->cmd_type_offset_bsz =
92 ice_build_ctob(td_cmd, 0, ICE_FDIR_MAX_RAW_PKT_SIZE, 0);
93
94 /* Force memory write to complete before letting h/w know
95 * there are new descriptors to fetch.
96 */
97 wmb();
98
99 /* mark the data descriptor to be watched */
100 first->next_to_watch = tx_desc;
101
102 writel(tx_ring->next_to_use, tx_ring->tail);
103
104 return 0;
105}
106
107/**
108 * ice_unmap_and_free_tx_buf - Release a Tx buffer
109 * @ring: the ring that owns the buffer
110 * @tx_buf: the buffer to free
111 */
112static void
113ice_unmap_and_free_tx_buf(struct ice_tx_ring *ring, struct ice_tx_buf *tx_buf)
114{
115 if (dma_unmap_len(tx_buf, len))
116 dma_unmap_page(ring->dev,
117 dma_unmap_addr(tx_buf, dma),
118 dma_unmap_len(tx_buf, len),
119 DMA_TO_DEVICE);
120
121 switch (tx_buf->type) {
122 case ICE_TX_BUF_DUMMY:
123 devm_kfree(ring->dev, tx_buf->raw_buf);
124 break;
125 case ICE_TX_BUF_SKB:
126 dev_kfree_skb_any(tx_buf->skb);
127 break;
128 case ICE_TX_BUF_XDP_TX:
129 page_frag_free(tx_buf->raw_buf);
130 break;
131 case ICE_TX_BUF_XDP_XMIT:
132 xdp_return_frame(tx_buf->xdpf);
133 break;
134 }
135
136 tx_buf->next_to_watch = NULL;
137 tx_buf->type = ICE_TX_BUF_EMPTY;
138 dma_unmap_len_set(tx_buf, len, 0);
139 /* tx_buf must be completely set up in the transmit path */
140}
141
142static struct netdev_queue *txring_txq(const struct ice_tx_ring *ring)
143{
144 return netdev_get_tx_queue(ring->netdev, ring->q_index);
145}
146
147/**
148 * ice_clean_tx_ring - Free any empty Tx buffers
149 * @tx_ring: ring to be cleaned
150 */
151void ice_clean_tx_ring(struct ice_tx_ring *tx_ring)
152{
153 u32 size;
154 u16 i;
155
156 if (ice_ring_is_xdp(tx_ring) && tx_ring->xsk_pool) {
157 ice_xsk_clean_xdp_ring(tx_ring);
158 goto tx_skip_free;
159 }
160
161 /* ring already cleared, nothing to do */
162 if (!tx_ring->tx_buf)
163 return;
164
165 /* Free all the Tx ring sk_buffs */
166 for (i = 0; i < tx_ring->count; i++)
167 ice_unmap_and_free_tx_buf(tx_ring, &tx_ring->tx_buf[i]);
168
169tx_skip_free:
170 memset(tx_ring->tx_buf, 0, sizeof(*tx_ring->tx_buf) * tx_ring->count);
171
172 size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
173 PAGE_SIZE);
174 /* Zero out the descriptor ring */
175 memset(tx_ring->desc, 0, size);
176
177 tx_ring->next_to_use = 0;
178 tx_ring->next_to_clean = 0;
179
180 if (!tx_ring->netdev)
181 return;
182
183 /* cleanup Tx queue statistics */
184 netdev_tx_reset_queue(txring_txq(tx_ring));
185}
186
187/**
188 * ice_free_tx_ring - Free Tx resources per queue
189 * @tx_ring: Tx descriptor ring for a specific queue
190 *
191 * Free all transmit software resources
192 */
193void ice_free_tx_ring(struct ice_tx_ring *tx_ring)
194{
195 u32 size;
196
197 ice_clean_tx_ring(tx_ring);
198 devm_kfree(tx_ring->dev, tx_ring->tx_buf);
199 tx_ring->tx_buf = NULL;
200
201 if (tx_ring->desc) {
202 size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
203 PAGE_SIZE);
204 dmam_free_coherent(tx_ring->dev, size,
205 tx_ring->desc, tx_ring->dma);
206 tx_ring->desc = NULL;
207 }
208}
209
210/**
211 * ice_clean_tx_irq - Reclaim resources after transmit completes
212 * @tx_ring: Tx ring to clean
213 * @napi_budget: Used to determine if we are in netpoll
214 *
215 * Returns true if there's any budget left (e.g. the clean is finished)
216 */
217static bool ice_clean_tx_irq(struct ice_tx_ring *tx_ring, int napi_budget)
218{
219 unsigned int total_bytes = 0, total_pkts = 0;
220 unsigned int budget = ICE_DFLT_IRQ_WORK;
221 struct ice_vsi *vsi = tx_ring->vsi;
222 s16 i = tx_ring->next_to_clean;
223 struct ice_tx_desc *tx_desc;
224 struct ice_tx_buf *tx_buf;
225
226 /* get the bql data ready */
227 netdev_txq_bql_complete_prefetchw(txring_txq(tx_ring));
228
229 tx_buf = &tx_ring->tx_buf[i];
230 tx_desc = ICE_TX_DESC(tx_ring, i);
231 i -= tx_ring->count;
232
233 prefetch(&vsi->state);
234
235 do {
236 struct ice_tx_desc *eop_desc = tx_buf->next_to_watch;
237
238 /* if next_to_watch is not set then there is no work pending */
239 if (!eop_desc)
240 break;
241
242 /* follow the guidelines of other drivers */
243 prefetchw(&tx_buf->skb->users);
244
245 smp_rmb(); /* prevent any other reads prior to eop_desc */
246
247 ice_trace(clean_tx_irq, tx_ring, tx_desc, tx_buf);
248 /* if the descriptor isn't done, no work yet to do */
249 if (!(eop_desc->cmd_type_offset_bsz &
250 cpu_to_le64(ICE_TX_DESC_DTYPE_DESC_DONE)))
251 break;
252
253 /* clear next_to_watch to prevent false hangs */
254 tx_buf->next_to_watch = NULL;
255
256 /* update the statistics for this packet */
257 total_bytes += tx_buf->bytecount;
258 total_pkts += tx_buf->gso_segs;
259
260 /* free the skb */
261 napi_consume_skb(tx_buf->skb, napi_budget);
262
263 /* unmap skb header data */
264 dma_unmap_single(tx_ring->dev,
265 dma_unmap_addr(tx_buf, dma),
266 dma_unmap_len(tx_buf, len),
267 DMA_TO_DEVICE);
268
269 /* clear tx_buf data */
270 tx_buf->type = ICE_TX_BUF_EMPTY;
271 dma_unmap_len_set(tx_buf, len, 0);
272
273 /* unmap remaining buffers */
274 while (tx_desc != eop_desc) {
275 ice_trace(clean_tx_irq_unmap, tx_ring, tx_desc, tx_buf);
276 tx_buf++;
277 tx_desc++;
278 i++;
279 if (unlikely(!i)) {
280 i -= tx_ring->count;
281 tx_buf = tx_ring->tx_buf;
282 tx_desc = ICE_TX_DESC(tx_ring, 0);
283 }
284
285 /* unmap any remaining paged data */
286 if (dma_unmap_len(tx_buf, len)) {
287 dma_unmap_page(tx_ring->dev,
288 dma_unmap_addr(tx_buf, dma),
289 dma_unmap_len(tx_buf, len),
290 DMA_TO_DEVICE);
291 dma_unmap_len_set(tx_buf, len, 0);
292 }
293 }
294 ice_trace(clean_tx_irq_unmap_eop, tx_ring, tx_desc, tx_buf);
295
296 /* move us one more past the eop_desc for start of next pkt */
297 tx_buf++;
298 tx_desc++;
299 i++;
300 if (unlikely(!i)) {
301 i -= tx_ring->count;
302 tx_buf = tx_ring->tx_buf;
303 tx_desc = ICE_TX_DESC(tx_ring, 0);
304 }
305
306 prefetch(tx_desc);
307
308 /* update budget accounting */
309 budget--;
310 } while (likely(budget));
311
312 i += tx_ring->count;
313 tx_ring->next_to_clean = i;
314
315 ice_update_tx_ring_stats(tx_ring, total_pkts, total_bytes);
316 netdev_tx_completed_queue(txring_txq(tx_ring), total_pkts, total_bytes);
317
318#define TX_WAKE_THRESHOLD ((s16)(DESC_NEEDED * 2))
319 if (unlikely(total_pkts && netif_carrier_ok(tx_ring->netdev) &&
320 (ICE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
321 /* Make sure that anybody stopping the queue after this
322 * sees the new next_to_clean.
323 */
324 smp_mb();
325 if (netif_tx_queue_stopped(txring_txq(tx_ring)) &&
326 !test_bit(ICE_VSI_DOWN, vsi->state)) {
327 netif_tx_wake_queue(txring_txq(tx_ring));
328 ++tx_ring->ring_stats->tx_stats.restart_q;
329 }
330 }
331
332 return !!budget;
333}
334
335/**
336 * ice_setup_tx_ring - Allocate the Tx descriptors
337 * @tx_ring: the Tx ring to set up
338 *
339 * Return 0 on success, negative on error
340 */
341int ice_setup_tx_ring(struct ice_tx_ring *tx_ring)
342{
343 struct device *dev = tx_ring->dev;
344 u32 size;
345
346 if (!dev)
347 return -ENOMEM;
348
349 /* warn if we are about to overwrite the pointer */
350 WARN_ON(tx_ring->tx_buf);
351 tx_ring->tx_buf =
352 devm_kcalloc(dev, sizeof(*tx_ring->tx_buf), tx_ring->count,
353 GFP_KERNEL);
354 if (!tx_ring->tx_buf)
355 return -ENOMEM;
356
357 /* round up to nearest page */
358 size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
359 PAGE_SIZE);
360 tx_ring->desc = dmam_alloc_coherent(dev, size, &tx_ring->dma,
361 GFP_KERNEL);
362 if (!tx_ring->desc) {
363 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring, size=%d\n",
364 size);
365 goto err;
366 }
367
368 tx_ring->next_to_use = 0;
369 tx_ring->next_to_clean = 0;
370 tx_ring->ring_stats->tx_stats.prev_pkt = -1;
371 return 0;
372
373err:
374 devm_kfree(dev, tx_ring->tx_buf);
375 tx_ring->tx_buf = NULL;
376 return -ENOMEM;
377}
378
379/**
380 * ice_clean_rx_ring - Free Rx buffers
381 * @rx_ring: ring to be cleaned
382 */
383void ice_clean_rx_ring(struct ice_rx_ring *rx_ring)
384{
385 struct xdp_buff *xdp = &rx_ring->xdp;
386 struct device *dev = rx_ring->dev;
387 u32 size;
388 u16 i;
389
390 /* ring already cleared, nothing to do */
391 if (!rx_ring->rx_buf)
392 return;
393
394 if (rx_ring->xsk_pool) {
395 ice_xsk_clean_rx_ring(rx_ring);
396 goto rx_skip_free;
397 }
398
399 if (xdp->data) {
400 xdp_return_buff(xdp);
401 xdp->data = NULL;
402 }
403
404 /* Free all the Rx ring sk_buffs */
405 for (i = 0; i < rx_ring->count; i++) {
406 struct ice_rx_buf *rx_buf = &rx_ring->rx_buf[i];
407
408 if (!rx_buf->page)
409 continue;
410
411 /* Invalidate cache lines that may have been written to by
412 * device so that we avoid corrupting memory.
413 */
414 dma_sync_single_range_for_cpu(dev, rx_buf->dma,
415 rx_buf->page_offset,
416 rx_ring->rx_buf_len,
417 DMA_FROM_DEVICE);
418
419 /* free resources associated with mapping */
420 dma_unmap_page_attrs(dev, rx_buf->dma, ice_rx_pg_size(rx_ring),
421 DMA_FROM_DEVICE, ICE_RX_DMA_ATTR);
422 __page_frag_cache_drain(rx_buf->page, rx_buf->pagecnt_bias);
423
424 rx_buf->page = NULL;
425 rx_buf->page_offset = 0;
426 }
427
428rx_skip_free:
429 if (rx_ring->xsk_pool)
430 memset(rx_ring->xdp_buf, 0, array_size(rx_ring->count, sizeof(*rx_ring->xdp_buf)));
431 else
432 memset(rx_ring->rx_buf, 0, array_size(rx_ring->count, sizeof(*rx_ring->rx_buf)));
433
434 /* Zero out the descriptor ring */
435 size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
436 PAGE_SIZE);
437 memset(rx_ring->desc, 0, size);
438
439 rx_ring->next_to_alloc = 0;
440 rx_ring->next_to_clean = 0;
441 rx_ring->first_desc = 0;
442 rx_ring->next_to_use = 0;
443}
444
445/**
446 * ice_free_rx_ring - Free Rx resources
447 * @rx_ring: ring to clean the resources from
448 *
449 * Free all receive software resources
450 */
451void ice_free_rx_ring(struct ice_rx_ring *rx_ring)
452{
453 u32 size;
454
455 ice_clean_rx_ring(rx_ring);
456 if (rx_ring->vsi->type == ICE_VSI_PF)
457 if (xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
458 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
459 WRITE_ONCE(rx_ring->xdp_prog, NULL);
460 if (rx_ring->xsk_pool) {
461 kfree(rx_ring->xdp_buf);
462 rx_ring->xdp_buf = NULL;
463 } else {
464 kfree(rx_ring->rx_buf);
465 rx_ring->rx_buf = NULL;
466 }
467
468 if (rx_ring->desc) {
469 size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
470 PAGE_SIZE);
471 dmam_free_coherent(rx_ring->dev, size,
472 rx_ring->desc, rx_ring->dma);
473 rx_ring->desc = NULL;
474 }
475}
476
477/**
478 * ice_setup_rx_ring - Allocate the Rx descriptors
479 * @rx_ring: the Rx ring to set up
480 *
481 * Return 0 on success, negative on error
482 */
483int ice_setup_rx_ring(struct ice_rx_ring *rx_ring)
484{
485 struct device *dev = rx_ring->dev;
486 u32 size;
487
488 if (!dev)
489 return -ENOMEM;
490
491 /* warn if we are about to overwrite the pointer */
492 WARN_ON(rx_ring->rx_buf);
493 rx_ring->rx_buf =
494 kcalloc(rx_ring->count, sizeof(*rx_ring->rx_buf), GFP_KERNEL);
495 if (!rx_ring->rx_buf)
496 return -ENOMEM;
497
498 /* round up to nearest page */
499 size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
500 PAGE_SIZE);
501 rx_ring->desc = dmam_alloc_coherent(dev, size, &rx_ring->dma,
502 GFP_KERNEL);
503 if (!rx_ring->desc) {
504 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring, size=%d\n",
505 size);
506 goto err;
507 }
508
509 rx_ring->next_to_use = 0;
510 rx_ring->next_to_clean = 0;
511 rx_ring->first_desc = 0;
512
513 if (ice_is_xdp_ena_vsi(rx_ring->vsi))
514 WRITE_ONCE(rx_ring->xdp_prog, rx_ring->vsi->xdp_prog);
515
516 return 0;
517
518err:
519 kfree(rx_ring->rx_buf);
520 rx_ring->rx_buf = NULL;
521 return -ENOMEM;
522}
523
524/**
525 * ice_run_xdp - Executes an XDP program on initialized xdp_buff
526 * @rx_ring: Rx ring
527 * @xdp: xdp_buff used as input to the XDP program
528 * @xdp_prog: XDP program to run
529 * @xdp_ring: ring to be used for XDP_TX action
530 * @eop_desc: Last descriptor in packet to read metadata from
531 *
532 * Returns any of ICE_XDP_{PASS, CONSUMED, TX, REDIR}
533 */
534static u32
535ice_run_xdp(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp,
536 struct bpf_prog *xdp_prog, struct ice_tx_ring *xdp_ring,
537 union ice_32b_rx_flex_desc *eop_desc)
538{
539 unsigned int ret = ICE_XDP_PASS;
540 u32 act;
541
542 if (!xdp_prog)
543 goto exit;
544
545 ice_xdp_meta_set_desc(xdp, eop_desc);
546
547 act = bpf_prog_run_xdp(xdp_prog, xdp);
548 switch (act) {
549 case XDP_PASS:
550 break;
551 case XDP_TX:
552 if (static_branch_unlikely(&ice_xdp_locking_key))
553 spin_lock(&xdp_ring->tx_lock);
554 ret = __ice_xmit_xdp_ring(xdp, xdp_ring, false);
555 if (static_branch_unlikely(&ice_xdp_locking_key))
556 spin_unlock(&xdp_ring->tx_lock);
557 if (ret == ICE_XDP_CONSUMED)
558 goto out_failure;
559 break;
560 case XDP_REDIRECT:
561 if (xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog))
562 goto out_failure;
563 ret = ICE_XDP_REDIR;
564 break;
565 default:
566 bpf_warn_invalid_xdp_action(rx_ring->netdev, xdp_prog, act);
567 fallthrough;
568 case XDP_ABORTED:
569out_failure:
570 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
571 fallthrough;
572 case XDP_DROP:
573 ret = ICE_XDP_CONSUMED;
574 }
575exit:
576 return ret;
577}
578
579/**
580 * ice_xmit_xdp_ring - submit frame to XDP ring for transmission
581 * @xdpf: XDP frame that will be converted to XDP buff
582 * @xdp_ring: XDP ring for transmission
583 */
584static int ice_xmit_xdp_ring(const struct xdp_frame *xdpf,
585 struct ice_tx_ring *xdp_ring)
586{
587 struct xdp_buff xdp;
588
589 xdp.data_hard_start = (void *)xdpf;
590 xdp.data = xdpf->data;
591 xdp.data_end = xdp.data + xdpf->len;
592 xdp.frame_sz = xdpf->frame_sz;
593 xdp.flags = xdpf->flags;
594
595 return __ice_xmit_xdp_ring(&xdp, xdp_ring, true);
596}
597
598/**
599 * ice_xdp_xmit - submit packets to XDP ring for transmission
600 * @dev: netdev
601 * @n: number of XDP frames to be transmitted
602 * @frames: XDP frames to be transmitted
603 * @flags: transmit flags
604 *
605 * Returns number of frames successfully sent. Failed frames
606 * will be free'ed by XDP core.
607 * For error cases, a negative errno code is returned and no-frames
608 * are transmitted (caller must handle freeing frames).
609 */
610int
611ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
612 u32 flags)
613{
614 struct ice_netdev_priv *np = netdev_priv(dev);
615 unsigned int queue_index = smp_processor_id();
616 struct ice_vsi *vsi = np->vsi;
617 struct ice_tx_ring *xdp_ring;
618 struct ice_tx_buf *tx_buf;
619 int nxmit = 0, i;
620
621 if (test_bit(ICE_VSI_DOWN, vsi->state))
622 return -ENETDOWN;
623
624 if (!ice_is_xdp_ena_vsi(vsi))
625 return -ENXIO;
626
627 if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
628 return -EINVAL;
629
630 if (static_branch_unlikely(&ice_xdp_locking_key)) {
631 queue_index %= vsi->num_xdp_txq;
632 xdp_ring = vsi->xdp_rings[queue_index];
633 spin_lock(&xdp_ring->tx_lock);
634 } else {
635 /* Generally, should not happen */
636 if (unlikely(queue_index >= vsi->num_xdp_txq))
637 return -ENXIO;
638 xdp_ring = vsi->xdp_rings[queue_index];
639 }
640
641 tx_buf = &xdp_ring->tx_buf[xdp_ring->next_to_use];
642 for (i = 0; i < n; i++) {
643 const struct xdp_frame *xdpf = frames[i];
644 int err;
645
646 err = ice_xmit_xdp_ring(xdpf, xdp_ring);
647 if (err != ICE_XDP_TX)
648 break;
649 nxmit++;
650 }
651
652 tx_buf->rs_idx = ice_set_rs_bit(xdp_ring);
653 if (unlikely(flags & XDP_XMIT_FLUSH))
654 ice_xdp_ring_update_tail(xdp_ring);
655
656 if (static_branch_unlikely(&ice_xdp_locking_key))
657 spin_unlock(&xdp_ring->tx_lock);
658
659 return nxmit;
660}
661
662/**
663 * ice_alloc_mapped_page - recycle or make a new page
664 * @rx_ring: ring to use
665 * @bi: rx_buf struct to modify
666 *
667 * Returns true if the page was successfully allocated or
668 * reused.
669 */
670static bool
671ice_alloc_mapped_page(struct ice_rx_ring *rx_ring, struct ice_rx_buf *bi)
672{
673 struct page *page = bi->page;
674 dma_addr_t dma;
675
676 /* since we are recycling buffers we should seldom need to alloc */
677 if (likely(page))
678 return true;
679
680 /* alloc new page for storage */
681 page = dev_alloc_pages(ice_rx_pg_order(rx_ring));
682 if (unlikely(!page)) {
683 rx_ring->ring_stats->rx_stats.alloc_page_failed++;
684 return false;
685 }
686
687 /* map page for use */
688 dma = dma_map_page_attrs(rx_ring->dev, page, 0, ice_rx_pg_size(rx_ring),
689 DMA_FROM_DEVICE, ICE_RX_DMA_ATTR);
690
691 /* if mapping failed free memory back to system since
692 * there isn't much point in holding memory we can't use
693 */
694 if (dma_mapping_error(rx_ring->dev, dma)) {
695 __free_pages(page, ice_rx_pg_order(rx_ring));
696 rx_ring->ring_stats->rx_stats.alloc_page_failed++;
697 return false;
698 }
699
700 bi->dma = dma;
701 bi->page = page;
702 bi->page_offset = rx_ring->rx_offset;
703 page_ref_add(page, USHRT_MAX - 1);
704 bi->pagecnt_bias = USHRT_MAX;
705
706 return true;
707}
708
709/**
710 * ice_alloc_rx_bufs - Replace used receive buffers
711 * @rx_ring: ring to place buffers on
712 * @cleaned_count: number of buffers to replace
713 *
714 * Returns false if all allocations were successful, true if any fail. Returning
715 * true signals to the caller that we didn't replace cleaned_count buffers and
716 * there is more work to do.
717 *
718 * First, try to clean "cleaned_count" Rx buffers. Then refill the cleaned Rx
719 * buffers. Then bump tail at most one time. Grouping like this lets us avoid
720 * multiple tail writes per call.
721 */
722bool ice_alloc_rx_bufs(struct ice_rx_ring *rx_ring, unsigned int cleaned_count)
723{
724 union ice_32b_rx_flex_desc *rx_desc;
725 u16 ntu = rx_ring->next_to_use;
726 struct ice_rx_buf *bi;
727
728 /* do nothing if no valid netdev defined */
729 if ((!rx_ring->netdev && rx_ring->vsi->type != ICE_VSI_CTRL) ||
730 !cleaned_count)
731 return false;
732
733 /* get the Rx descriptor and buffer based on next_to_use */
734 rx_desc = ICE_RX_DESC(rx_ring, ntu);
735 bi = &rx_ring->rx_buf[ntu];
736
737 do {
738 /* if we fail here, we have work remaining */
739 if (!ice_alloc_mapped_page(rx_ring, bi))
740 break;
741
742 /* sync the buffer for use by the device */
743 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
744 bi->page_offset,
745 rx_ring->rx_buf_len,
746 DMA_FROM_DEVICE);
747
748 /* Refresh the desc even if buffer_addrs didn't change
749 * because each write-back erases this info.
750 */
751 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
752
753 rx_desc++;
754 bi++;
755 ntu++;
756 if (unlikely(ntu == rx_ring->count)) {
757 rx_desc = ICE_RX_DESC(rx_ring, 0);
758 bi = rx_ring->rx_buf;
759 ntu = 0;
760 }
761
762 /* clear the status bits for the next_to_use descriptor */
763 rx_desc->wb.status_error0 = 0;
764
765 cleaned_count--;
766 } while (cleaned_count);
767
768 if (rx_ring->next_to_use != ntu)
769 ice_release_rx_desc(rx_ring, ntu);
770
771 return !!cleaned_count;
772}
773
774/**
775 * ice_rx_buf_adjust_pg_offset - Prepare Rx buffer for reuse
776 * @rx_buf: Rx buffer to adjust
777 * @size: Size of adjustment
778 *
779 * Update the offset within page so that Rx buf will be ready to be reused.
780 * For systems with PAGE_SIZE < 8192 this function will flip the page offset
781 * so the second half of page assigned to Rx buffer will be used, otherwise
782 * the offset is moved by "size" bytes
783 */
784static void
785ice_rx_buf_adjust_pg_offset(struct ice_rx_buf *rx_buf, unsigned int size)
786{
787#if (PAGE_SIZE < 8192)
788 /* flip page offset to other buffer */
789 rx_buf->page_offset ^= size;
790#else
791 /* move offset up to the next cache line */
792 rx_buf->page_offset += size;
793#endif
794}
795
796/**
797 * ice_can_reuse_rx_page - Determine if page can be reused for another Rx
798 * @rx_buf: buffer containing the page
799 *
800 * If page is reusable, we have a green light for calling ice_reuse_rx_page,
801 * which will assign the current buffer to the buffer that next_to_alloc is
802 * pointing to; otherwise, the DMA mapping needs to be destroyed and
803 * page freed
804 */
805static bool
806ice_can_reuse_rx_page(struct ice_rx_buf *rx_buf)
807{
808 unsigned int pagecnt_bias = rx_buf->pagecnt_bias;
809 struct page *page = rx_buf->page;
810
811 /* avoid re-using remote and pfmemalloc pages */
812 if (!dev_page_is_reusable(page))
813 return false;
814
815 /* if we are only owner of page we can reuse it */
816 if (unlikely(rx_buf->pgcnt - pagecnt_bias > 1))
817 return false;
818#if (PAGE_SIZE >= 8192)
819#define ICE_LAST_OFFSET \
820 (SKB_WITH_OVERHEAD(PAGE_SIZE) - ICE_RXBUF_3072)
821 if (rx_buf->page_offset > ICE_LAST_OFFSET)
822 return false;
823#endif /* PAGE_SIZE >= 8192) */
824
825 /* If we have drained the page fragment pool we need to update
826 * the pagecnt_bias and page count so that we fully restock the
827 * number of references the driver holds.
828 */
829 if (unlikely(pagecnt_bias == 1)) {
830 page_ref_add(page, USHRT_MAX - 1);
831 rx_buf->pagecnt_bias = USHRT_MAX;
832 }
833
834 return true;
835}
836
837/**
838 * ice_add_xdp_frag - Add contents of Rx buffer to xdp buf as a frag
839 * @rx_ring: Rx descriptor ring to transact packets on
840 * @xdp: xdp buff to place the data into
841 * @rx_buf: buffer containing page to add
842 * @size: packet length from rx_desc
843 *
844 * This function will add the data contained in rx_buf->page to the xdp buf.
845 * It will just attach the page as a frag.
846 */
847static int
848ice_add_xdp_frag(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp,
849 struct ice_rx_buf *rx_buf, const unsigned int size)
850{
851 struct skb_shared_info *sinfo = xdp_get_shared_info_from_buff(xdp);
852
853 if (!size)
854 return 0;
855
856 if (!xdp_buff_has_frags(xdp)) {
857 sinfo->nr_frags = 0;
858 sinfo->xdp_frags_size = 0;
859 xdp_buff_set_frags_flag(xdp);
860 }
861
862 if (unlikely(sinfo->nr_frags == MAX_SKB_FRAGS))
863 return -ENOMEM;
864
865 __skb_fill_page_desc_noacc(sinfo, sinfo->nr_frags++, rx_buf->page,
866 rx_buf->page_offset, size);
867 sinfo->xdp_frags_size += size;
868 /* remember frag count before XDP prog execution; bpf_xdp_adjust_tail()
869 * can pop off frags but driver has to handle it on its own
870 */
871 rx_ring->nr_frags = sinfo->nr_frags;
872
873 if (page_is_pfmemalloc(rx_buf->page))
874 xdp_buff_set_frag_pfmemalloc(xdp);
875
876 return 0;
877}
878
879/**
880 * ice_reuse_rx_page - page flip buffer and store it back on the ring
881 * @rx_ring: Rx descriptor ring to store buffers on
882 * @old_buf: donor buffer to have page reused
883 *
884 * Synchronizes page for reuse by the adapter
885 */
886static void
887ice_reuse_rx_page(struct ice_rx_ring *rx_ring, struct ice_rx_buf *old_buf)
888{
889 u16 nta = rx_ring->next_to_alloc;
890 struct ice_rx_buf *new_buf;
891
892 new_buf = &rx_ring->rx_buf[nta];
893
894 /* update, and store next to alloc */
895 nta++;
896 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
897
898 /* Transfer page from old buffer to new buffer.
899 * Move each member individually to avoid possible store
900 * forwarding stalls and unnecessary copy of skb.
901 */
902 new_buf->dma = old_buf->dma;
903 new_buf->page = old_buf->page;
904 new_buf->page_offset = old_buf->page_offset;
905 new_buf->pagecnt_bias = old_buf->pagecnt_bias;
906}
907
908/**
909 * ice_get_rx_buf - Fetch Rx buffer and synchronize data for use
910 * @rx_ring: Rx descriptor ring to transact packets on
911 * @size: size of buffer to add to skb
912 * @ntc: index of next to clean element
913 *
914 * This function will pull an Rx buffer from the ring and synchronize it
915 * for use by the CPU.
916 */
917static struct ice_rx_buf *
918ice_get_rx_buf(struct ice_rx_ring *rx_ring, const unsigned int size,
919 const unsigned int ntc)
920{
921 struct ice_rx_buf *rx_buf;
922
923 rx_buf = &rx_ring->rx_buf[ntc];
924 prefetchw(rx_buf->page);
925
926 if (!size)
927 return rx_buf;
928 /* we are reusing so sync this buffer for CPU use */
929 dma_sync_single_range_for_cpu(rx_ring->dev, rx_buf->dma,
930 rx_buf->page_offset, size,
931 DMA_FROM_DEVICE);
932
933 /* We have pulled a buffer for use, so decrement pagecnt_bias */
934 rx_buf->pagecnt_bias--;
935
936 return rx_buf;
937}
938
939/**
940 * ice_get_pgcnts - grab page_count() for gathered fragments
941 * @rx_ring: Rx descriptor ring to store the page counts on
942 *
943 * This function is intended to be called right before running XDP
944 * program so that the page recycling mechanism will be able to take
945 * a correct decision regarding underlying pages; this is done in such
946 * way as XDP program can change the refcount of page
947 */
948static void ice_get_pgcnts(struct ice_rx_ring *rx_ring)
949{
950 u32 nr_frags = rx_ring->nr_frags + 1;
951 u32 idx = rx_ring->first_desc;
952 struct ice_rx_buf *rx_buf;
953 u32 cnt = rx_ring->count;
954
955 for (int i = 0; i < nr_frags; i++) {
956 rx_buf = &rx_ring->rx_buf[idx];
957 rx_buf->pgcnt = page_count(rx_buf->page);
958
959 if (++idx == cnt)
960 idx = 0;
961 }
962}
963
964/**
965 * ice_build_skb - Build skb around an existing buffer
966 * @rx_ring: Rx descriptor ring to transact packets on
967 * @xdp: xdp_buff pointing to the data
968 *
969 * This function builds an skb around an existing XDP buffer, taking care
970 * to set up the skb correctly and avoid any memcpy overhead. Driver has
971 * already combined frags (if any) to skb_shared_info.
972 */
973static struct sk_buff *
974ice_build_skb(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp)
975{
976 u8 metasize = xdp->data - xdp->data_meta;
977 struct skb_shared_info *sinfo = NULL;
978 unsigned int nr_frags;
979 struct sk_buff *skb;
980
981 if (unlikely(xdp_buff_has_frags(xdp))) {
982 sinfo = xdp_get_shared_info_from_buff(xdp);
983 nr_frags = sinfo->nr_frags;
984 }
985
986 /* Prefetch first cache line of first page. If xdp->data_meta
987 * is unused, this points exactly as xdp->data, otherwise we
988 * likely have a consumer accessing first few bytes of meta
989 * data, and then actual data.
990 */
991 net_prefetch(xdp->data_meta);
992 /* build an skb around the page buffer */
993 skb = napi_build_skb(xdp->data_hard_start, xdp->frame_sz);
994 if (unlikely(!skb))
995 return NULL;
996
997 /* must to record Rx queue, otherwise OS features such as
998 * symmetric queue won't work
999 */
1000 skb_record_rx_queue(skb, rx_ring->q_index);
1001
1002 /* update pointers within the skb to store the data */
1003 skb_reserve(skb, xdp->data - xdp->data_hard_start);
1004 __skb_put(skb, xdp->data_end - xdp->data);
1005 if (metasize)
1006 skb_metadata_set(skb, metasize);
1007
1008 if (unlikely(xdp_buff_has_frags(xdp)))
1009 xdp_update_skb_shared_info(skb, nr_frags,
1010 sinfo->xdp_frags_size,
1011 nr_frags * xdp->frame_sz,
1012 xdp_buff_is_frag_pfmemalloc(xdp));
1013
1014 return skb;
1015}
1016
1017/**
1018 * ice_construct_skb - Allocate skb and populate it
1019 * @rx_ring: Rx descriptor ring to transact packets on
1020 * @xdp: xdp_buff pointing to the data
1021 *
1022 * This function allocates an skb. It then populates it with the page
1023 * data from the current receive descriptor, taking care to set up the
1024 * skb correctly.
1025 */
1026static struct sk_buff *
1027ice_construct_skb(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp)
1028{
1029 unsigned int size = xdp->data_end - xdp->data;
1030 struct skb_shared_info *sinfo = NULL;
1031 struct ice_rx_buf *rx_buf;
1032 unsigned int nr_frags = 0;
1033 unsigned int headlen;
1034 struct sk_buff *skb;
1035
1036 /* prefetch first cache line of first page */
1037 net_prefetch(xdp->data);
1038
1039 if (unlikely(xdp_buff_has_frags(xdp))) {
1040 sinfo = xdp_get_shared_info_from_buff(xdp);
1041 nr_frags = sinfo->nr_frags;
1042 }
1043
1044 /* allocate a skb to store the frags */
1045 skb = napi_alloc_skb(&rx_ring->q_vector->napi, ICE_RX_HDR_SIZE);
1046 if (unlikely(!skb))
1047 return NULL;
1048
1049 rx_buf = &rx_ring->rx_buf[rx_ring->first_desc];
1050 skb_record_rx_queue(skb, rx_ring->q_index);
1051 /* Determine available headroom for copy */
1052 headlen = size;
1053 if (headlen > ICE_RX_HDR_SIZE)
1054 headlen = eth_get_headlen(skb->dev, xdp->data, ICE_RX_HDR_SIZE);
1055
1056 /* align pull length to size of long to optimize memcpy performance */
1057 memcpy(__skb_put(skb, headlen), xdp->data, ALIGN(headlen,
1058 sizeof(long)));
1059
1060 /* if we exhaust the linear part then add what is left as a frag */
1061 size -= headlen;
1062 if (size) {
1063 /* besides adding here a partial frag, we are going to add
1064 * frags from xdp_buff, make sure there is enough space for
1065 * them
1066 */
1067 if (unlikely(nr_frags >= MAX_SKB_FRAGS - 1)) {
1068 dev_kfree_skb(skb);
1069 return NULL;
1070 }
1071 skb_add_rx_frag(skb, 0, rx_buf->page,
1072 rx_buf->page_offset + headlen, size,
1073 xdp->frame_sz);
1074 } else {
1075 /* buffer is unused, restore biased page count in Rx buffer;
1076 * data was copied onto skb's linear part so there's no
1077 * need for adjusting page offset and we can reuse this buffer
1078 * as-is
1079 */
1080 rx_buf->pagecnt_bias++;
1081 }
1082
1083 if (unlikely(xdp_buff_has_frags(xdp))) {
1084 struct skb_shared_info *skinfo = skb_shinfo(skb);
1085
1086 memcpy(&skinfo->frags[skinfo->nr_frags], &sinfo->frags[0],
1087 sizeof(skb_frag_t) * nr_frags);
1088
1089 xdp_update_skb_shared_info(skb, skinfo->nr_frags + nr_frags,
1090 sinfo->xdp_frags_size,
1091 nr_frags * xdp->frame_sz,
1092 xdp_buff_is_frag_pfmemalloc(xdp));
1093 }
1094
1095 return skb;
1096}
1097
1098/**
1099 * ice_put_rx_buf - Clean up used buffer and either recycle or free
1100 * @rx_ring: Rx descriptor ring to transact packets on
1101 * @rx_buf: Rx buffer to pull data from
1102 *
1103 * This function will clean up the contents of the rx_buf. It will either
1104 * recycle the buffer or unmap it and free the associated resources.
1105 */
1106static void
1107ice_put_rx_buf(struct ice_rx_ring *rx_ring, struct ice_rx_buf *rx_buf)
1108{
1109 if (!rx_buf)
1110 return;
1111
1112 if (ice_can_reuse_rx_page(rx_buf)) {
1113 /* hand second half of page back to the ring */
1114 ice_reuse_rx_page(rx_ring, rx_buf);
1115 } else {
1116 /* we are not reusing the buffer so unmap it */
1117 dma_unmap_page_attrs(rx_ring->dev, rx_buf->dma,
1118 ice_rx_pg_size(rx_ring), DMA_FROM_DEVICE,
1119 ICE_RX_DMA_ATTR);
1120 __page_frag_cache_drain(rx_buf->page, rx_buf->pagecnt_bias);
1121 }
1122
1123 /* clear contents of buffer_info */
1124 rx_buf->page = NULL;
1125}
1126
1127/**
1128 * ice_put_rx_mbuf - ice_put_rx_buf() caller, for all frame frags
1129 * @rx_ring: Rx ring with all the auxiliary data
1130 * @xdp: XDP buffer carrying linear + frags part
1131 * @xdp_xmit: XDP_TX/XDP_REDIRECT verdict storage
1132 * @ntc: a current next_to_clean value to be stored at rx_ring
1133 * @verdict: return code from XDP program execution
1134 *
1135 * Walk through gathered fragments and satisfy internal page
1136 * recycle mechanism; we take here an action related to verdict
1137 * returned by XDP program;
1138 */
1139static void ice_put_rx_mbuf(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp,
1140 u32 *xdp_xmit, u32 ntc, u32 verdict)
1141{
1142 u32 nr_frags = rx_ring->nr_frags + 1;
1143 u32 idx = rx_ring->first_desc;
1144 u32 cnt = rx_ring->count;
1145 u32 post_xdp_frags = 1;
1146 struct ice_rx_buf *buf;
1147 int i;
1148
1149 if (unlikely(xdp_buff_has_frags(xdp)))
1150 post_xdp_frags += xdp_get_shared_info_from_buff(xdp)->nr_frags;
1151
1152 for (i = 0; i < post_xdp_frags; i++) {
1153 buf = &rx_ring->rx_buf[idx];
1154
1155 if (verdict & (ICE_XDP_TX | ICE_XDP_REDIR)) {
1156 ice_rx_buf_adjust_pg_offset(buf, xdp->frame_sz);
1157 *xdp_xmit |= verdict;
1158 } else if (verdict & ICE_XDP_CONSUMED) {
1159 buf->pagecnt_bias++;
1160 } else if (verdict == ICE_XDP_PASS) {
1161 ice_rx_buf_adjust_pg_offset(buf, xdp->frame_sz);
1162 }
1163
1164 ice_put_rx_buf(rx_ring, buf);
1165
1166 if (++idx == cnt)
1167 idx = 0;
1168 }
1169 /* handle buffers that represented frags released by XDP prog;
1170 * for these we keep pagecnt_bias as-is; refcount from struct page
1171 * has been decremented within XDP prog and we do not have to increase
1172 * the biased refcnt
1173 */
1174 for (; i < nr_frags; i++) {
1175 buf = &rx_ring->rx_buf[idx];
1176 ice_put_rx_buf(rx_ring, buf);
1177 if (++idx == cnt)
1178 idx = 0;
1179 }
1180
1181 xdp->data = NULL;
1182 rx_ring->first_desc = ntc;
1183 rx_ring->nr_frags = 0;
1184}
1185
1186/**
1187 * ice_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
1188 * @rx_ring: Rx descriptor ring to transact packets on
1189 * @budget: Total limit on number of packets to process
1190 *
1191 * This function provides a "bounce buffer" approach to Rx interrupt
1192 * processing. The advantage to this is that on systems that have
1193 * expensive overhead for IOMMU access this provides a means of avoiding
1194 * it by maintaining the mapping of the page to the system.
1195 *
1196 * Returns amount of work completed
1197 */
1198int ice_clean_rx_irq(struct ice_rx_ring *rx_ring, int budget)
1199{
1200 unsigned int total_rx_bytes = 0, total_rx_pkts = 0;
1201 unsigned int offset = rx_ring->rx_offset;
1202 struct xdp_buff *xdp = &rx_ring->xdp;
1203 struct ice_tx_ring *xdp_ring = NULL;
1204 struct bpf_prog *xdp_prog = NULL;
1205 u32 ntc = rx_ring->next_to_clean;
1206 u32 cached_ntu, xdp_verdict;
1207 u32 cnt = rx_ring->count;
1208 u32 xdp_xmit = 0;
1209 bool failure;
1210
1211 xdp_prog = READ_ONCE(rx_ring->xdp_prog);
1212 if (xdp_prog) {
1213 xdp_ring = rx_ring->xdp_ring;
1214 cached_ntu = xdp_ring->next_to_use;
1215 }
1216
1217 /* start the loop to process Rx packets bounded by 'budget' */
1218 while (likely(total_rx_pkts < (unsigned int)budget)) {
1219 union ice_32b_rx_flex_desc *rx_desc;
1220 struct ice_rx_buf *rx_buf;
1221 struct sk_buff *skb;
1222 unsigned int size;
1223 u16 stat_err_bits;
1224 u16 vlan_tci;
1225
1226 /* get the Rx desc from Rx ring based on 'next_to_clean' */
1227 rx_desc = ICE_RX_DESC(rx_ring, ntc);
1228
1229 /* status_error_len will always be zero for unused descriptors
1230 * because it's cleared in cleanup, and overlaps with hdr_addr
1231 * which is always zero because packet split isn't used, if the
1232 * hardware wrote DD then it will be non-zero
1233 */
1234 stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_DD_S);
1235 if (!ice_test_staterr(rx_desc->wb.status_error0, stat_err_bits))
1236 break;
1237
1238 /* This memory barrier is needed to keep us from reading
1239 * any other fields out of the rx_desc until we know the
1240 * DD bit is set.
1241 */
1242 dma_rmb();
1243
1244 ice_trace(clean_rx_irq, rx_ring, rx_desc);
1245 if (rx_desc->wb.rxdid == FDIR_DESC_RXDID || !rx_ring->netdev) {
1246 struct ice_vsi *ctrl_vsi = rx_ring->vsi;
1247
1248 if (rx_desc->wb.rxdid == FDIR_DESC_RXDID &&
1249 ctrl_vsi->vf)
1250 ice_vc_fdir_irq_handler(ctrl_vsi, rx_desc);
1251 if (++ntc == cnt)
1252 ntc = 0;
1253 rx_ring->first_desc = ntc;
1254 continue;
1255 }
1256
1257 size = le16_to_cpu(rx_desc->wb.pkt_len) &
1258 ICE_RX_FLX_DESC_PKT_LEN_M;
1259
1260 /* retrieve a buffer from the ring */
1261 rx_buf = ice_get_rx_buf(rx_ring, size, ntc);
1262
1263 if (!xdp->data) {
1264 void *hard_start;
1265
1266 hard_start = page_address(rx_buf->page) + rx_buf->page_offset -
1267 offset;
1268 xdp_prepare_buff(xdp, hard_start, offset, size, !!offset);
1269 xdp_buff_clear_frags_flag(xdp);
1270 } else if (ice_add_xdp_frag(rx_ring, xdp, rx_buf, size)) {
1271 ice_put_rx_mbuf(rx_ring, xdp, NULL, ntc, ICE_XDP_CONSUMED);
1272 break;
1273 }
1274 if (++ntc == cnt)
1275 ntc = 0;
1276
1277 /* skip if it is NOP desc */
1278 if (ice_is_non_eop(rx_ring, rx_desc))
1279 continue;
1280
1281 ice_get_pgcnts(rx_ring);
1282 xdp_verdict = ice_run_xdp(rx_ring, xdp, xdp_prog, xdp_ring, rx_desc);
1283 if (xdp_verdict == ICE_XDP_PASS)
1284 goto construct_skb;
1285 total_rx_bytes += xdp_get_buff_len(xdp);
1286 total_rx_pkts++;
1287
1288 ice_put_rx_mbuf(rx_ring, xdp, &xdp_xmit, ntc, xdp_verdict);
1289
1290 continue;
1291construct_skb:
1292 if (likely(ice_ring_uses_build_skb(rx_ring)))
1293 skb = ice_build_skb(rx_ring, xdp);
1294 else
1295 skb = ice_construct_skb(rx_ring, xdp);
1296 /* exit if we failed to retrieve a buffer */
1297 if (!skb) {
1298 rx_ring->ring_stats->rx_stats.alloc_page_failed++;
1299 xdp_verdict = ICE_XDP_CONSUMED;
1300 }
1301 ice_put_rx_mbuf(rx_ring, xdp, &xdp_xmit, ntc, xdp_verdict);
1302
1303 if (!skb)
1304 break;
1305
1306 stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_RXE_S);
1307 if (unlikely(ice_test_staterr(rx_desc->wb.status_error0,
1308 stat_err_bits))) {
1309 dev_kfree_skb_any(skb);
1310 continue;
1311 }
1312
1313 vlan_tci = ice_get_vlan_tci(rx_desc);
1314
1315 /* pad the skb if needed, to make a valid ethernet frame */
1316 if (eth_skb_pad(skb))
1317 continue;
1318
1319 /* probably a little skewed due to removing CRC */
1320 total_rx_bytes += skb->len;
1321
1322 /* populate checksum, VLAN, and protocol */
1323 ice_process_skb_fields(rx_ring, rx_desc, skb);
1324
1325 ice_trace(clean_rx_irq_indicate, rx_ring, rx_desc, skb);
1326 /* send completed skb up the stack */
1327 ice_receive_skb(rx_ring, skb, vlan_tci);
1328
1329 /* update budget accounting */
1330 total_rx_pkts++;
1331 }
1332
1333 rx_ring->next_to_clean = ntc;
1334 /* return up to cleaned_count buffers to hardware */
1335 failure = ice_alloc_rx_bufs(rx_ring, ICE_RX_DESC_UNUSED(rx_ring));
1336
1337 if (xdp_xmit)
1338 ice_finalize_xdp_rx(xdp_ring, xdp_xmit, cached_ntu);
1339
1340 if (rx_ring->ring_stats)
1341 ice_update_rx_ring_stats(rx_ring, total_rx_pkts,
1342 total_rx_bytes);
1343
1344 /* guarantee a trip back through this routine if there was a failure */
1345 return failure ? budget : (int)total_rx_pkts;
1346}
1347
1348static void __ice_update_sample(struct ice_q_vector *q_vector,
1349 struct ice_ring_container *rc,
1350 struct dim_sample *sample,
1351 bool is_tx)
1352{
1353 u64 packets = 0, bytes = 0;
1354
1355 if (is_tx) {
1356 struct ice_tx_ring *tx_ring;
1357
1358 ice_for_each_tx_ring(tx_ring, *rc) {
1359 struct ice_ring_stats *ring_stats;
1360
1361 ring_stats = tx_ring->ring_stats;
1362 if (!ring_stats)
1363 continue;
1364 packets += ring_stats->stats.pkts;
1365 bytes += ring_stats->stats.bytes;
1366 }
1367 } else {
1368 struct ice_rx_ring *rx_ring;
1369
1370 ice_for_each_rx_ring(rx_ring, *rc) {
1371 struct ice_ring_stats *ring_stats;
1372
1373 ring_stats = rx_ring->ring_stats;
1374 if (!ring_stats)
1375 continue;
1376 packets += ring_stats->stats.pkts;
1377 bytes += ring_stats->stats.bytes;
1378 }
1379 }
1380
1381 dim_update_sample(q_vector->total_events, packets, bytes, sample);
1382 sample->comp_ctr = 0;
1383
1384 /* if dim settings get stale, like when not updated for 1
1385 * second or longer, force it to start again. This addresses the
1386 * frequent case of an idle queue being switched to by the
1387 * scheduler. The 1,000 here means 1,000 milliseconds.
1388 */
1389 if (ktime_ms_delta(sample->time, rc->dim.start_sample.time) >= 1000)
1390 rc->dim.state = DIM_START_MEASURE;
1391}
1392
1393/**
1394 * ice_net_dim - Update net DIM algorithm
1395 * @q_vector: the vector associated with the interrupt
1396 *
1397 * Create a DIM sample and notify net_dim() so that it can possibly decide
1398 * a new ITR value based on incoming packets, bytes, and interrupts.
1399 *
1400 * This function is a no-op if the ring is not configured to dynamic ITR.
1401 */
1402static void ice_net_dim(struct ice_q_vector *q_vector)
1403{
1404 struct ice_ring_container *tx = &q_vector->tx;
1405 struct ice_ring_container *rx = &q_vector->rx;
1406
1407 if (ITR_IS_DYNAMIC(tx)) {
1408 struct dim_sample dim_sample;
1409
1410 __ice_update_sample(q_vector, tx, &dim_sample, true);
1411 net_dim(&tx->dim, &dim_sample);
1412 }
1413
1414 if (ITR_IS_DYNAMIC(rx)) {
1415 struct dim_sample dim_sample;
1416
1417 __ice_update_sample(q_vector, rx, &dim_sample, false);
1418 net_dim(&rx->dim, &dim_sample);
1419 }
1420}
1421
1422/**
1423 * ice_buildreg_itr - build value for writing to the GLINT_DYN_CTL register
1424 * @itr_idx: interrupt throttling index
1425 * @itr: interrupt throttling value in usecs
1426 */
1427static u32 ice_buildreg_itr(u16 itr_idx, u16 itr)
1428{
1429 /* The ITR value is reported in microseconds, and the register value is
1430 * recorded in 2 microsecond units. For this reason we only need to
1431 * shift by the GLINT_DYN_CTL_INTERVAL_S - ICE_ITR_GRAN_S to apply this
1432 * granularity as a shift instead of division. The mask makes sure the
1433 * ITR value is never odd so we don't accidentally write into the field
1434 * prior to the ITR field.
1435 */
1436 itr &= ICE_ITR_MASK;
1437
1438 return GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
1439 (itr_idx << GLINT_DYN_CTL_ITR_INDX_S) |
1440 (itr << (GLINT_DYN_CTL_INTERVAL_S - ICE_ITR_GRAN_S));
1441}
1442
1443/**
1444 * ice_enable_interrupt - re-enable MSI-X interrupt
1445 * @q_vector: the vector associated with the interrupt to enable
1446 *
1447 * If the VSI is down, the interrupt will not be re-enabled. Also,
1448 * when enabling the interrupt always reset the wb_on_itr to false
1449 * and trigger a software interrupt to clean out internal state.
1450 */
1451static void ice_enable_interrupt(struct ice_q_vector *q_vector)
1452{
1453 struct ice_vsi *vsi = q_vector->vsi;
1454 bool wb_en = q_vector->wb_on_itr;
1455 u32 itr_val;
1456
1457 if (test_bit(ICE_DOWN, vsi->state))
1458 return;
1459
1460 /* trigger an ITR delayed software interrupt when exiting busy poll, to
1461 * make sure to catch any pending cleanups that might have been missed
1462 * due to interrupt state transition. If busy poll or poll isn't
1463 * enabled, then don't update ITR, and just enable the interrupt.
1464 */
1465 if (!wb_en) {
1466 itr_val = ice_buildreg_itr(ICE_ITR_NONE, 0);
1467 } else {
1468 q_vector->wb_on_itr = false;
1469
1470 /* do two things here with a single write. Set up the third ITR
1471 * index to be used for software interrupt moderation, and then
1472 * trigger a software interrupt with a rate limit of 20K on
1473 * software interrupts, this will help avoid high interrupt
1474 * loads due to frequently polling and exiting polling.
1475 */
1476 itr_val = ice_buildreg_itr(ICE_IDX_ITR2, ICE_ITR_20K);
1477 itr_val |= GLINT_DYN_CTL_SWINT_TRIG_M |
1478 ICE_IDX_ITR2 << GLINT_DYN_CTL_SW_ITR_INDX_S |
1479 GLINT_DYN_CTL_SW_ITR_INDX_ENA_M;
1480 }
1481 wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx), itr_val);
1482}
1483
1484/**
1485 * ice_set_wb_on_itr - set WB_ON_ITR for this q_vector
1486 * @q_vector: q_vector to set WB_ON_ITR on
1487 *
1488 * We need to tell hardware to write-back completed descriptors even when
1489 * interrupts are disabled. Descriptors will be written back on cache line
1490 * boundaries without WB_ON_ITR enabled, but if we don't enable WB_ON_ITR
1491 * descriptors may not be written back if they don't fill a cache line until
1492 * the next interrupt.
1493 *
1494 * This sets the write-back frequency to whatever was set previously for the
1495 * ITR indices. Also, set the INTENA_MSK bit to make sure hardware knows we
1496 * aren't meddling with the INTENA_M bit.
1497 */
1498static void ice_set_wb_on_itr(struct ice_q_vector *q_vector)
1499{
1500 struct ice_vsi *vsi = q_vector->vsi;
1501
1502 /* already in wb_on_itr mode no need to change it */
1503 if (q_vector->wb_on_itr)
1504 return;
1505
1506 /* use previously set ITR values for all of the ITR indices by
1507 * specifying ICE_ITR_NONE, which will vary in adaptive (AIM) mode and
1508 * be static in non-adaptive mode (user configured)
1509 */
1510 wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx),
1511 FIELD_PREP(GLINT_DYN_CTL_ITR_INDX_M, ICE_ITR_NONE) |
1512 FIELD_PREP(GLINT_DYN_CTL_INTENA_MSK_M, 1) |
1513 FIELD_PREP(GLINT_DYN_CTL_WB_ON_ITR_M, 1));
1514
1515 q_vector->wb_on_itr = true;
1516}
1517
1518/**
1519 * ice_napi_poll - NAPI polling Rx/Tx cleanup routine
1520 * @napi: napi struct with our devices info in it
1521 * @budget: amount of work driver is allowed to do this pass, in packets
1522 *
1523 * This function will clean all queues associated with a q_vector.
1524 *
1525 * Returns the amount of work done
1526 */
1527int ice_napi_poll(struct napi_struct *napi, int budget)
1528{
1529 struct ice_q_vector *q_vector =
1530 container_of(napi, struct ice_q_vector, napi);
1531 struct ice_tx_ring *tx_ring;
1532 struct ice_rx_ring *rx_ring;
1533 bool clean_complete = true;
1534 int budget_per_ring;
1535 int work_done = 0;
1536
1537 /* Since the actual Tx work is minimal, we can give the Tx a larger
1538 * budget and be more aggressive about cleaning up the Tx descriptors.
1539 */
1540 ice_for_each_tx_ring(tx_ring, q_vector->tx) {
1541 struct xsk_buff_pool *xsk_pool = READ_ONCE(tx_ring->xsk_pool);
1542 bool wd;
1543
1544 if (xsk_pool)
1545 wd = ice_xmit_zc(tx_ring, xsk_pool);
1546 else if (ice_ring_is_xdp(tx_ring))
1547 wd = true;
1548 else
1549 wd = ice_clean_tx_irq(tx_ring, budget);
1550
1551 if (!wd)
1552 clean_complete = false;
1553 }
1554
1555 /* Handle case where we are called by netpoll with a budget of 0 */
1556 if (unlikely(budget <= 0))
1557 return budget;
1558
1559 /* normally we have 1 Rx ring per q_vector */
1560 if (unlikely(q_vector->num_ring_rx > 1))
1561 /* We attempt to distribute budget to each Rx queue fairly, but
1562 * don't allow the budget to go below 1 because that would exit
1563 * polling early.
1564 */
1565 budget_per_ring = max_t(int, budget / q_vector->num_ring_rx, 1);
1566 else
1567 /* Max of 1 Rx ring in this q_vector so give it the budget */
1568 budget_per_ring = budget;
1569
1570 ice_for_each_rx_ring(rx_ring, q_vector->rx) {
1571 struct xsk_buff_pool *xsk_pool = READ_ONCE(rx_ring->xsk_pool);
1572 int cleaned;
1573
1574 /* A dedicated path for zero-copy allows making a single
1575 * comparison in the irq context instead of many inside the
1576 * ice_clean_rx_irq function and makes the codebase cleaner.
1577 */
1578 cleaned = rx_ring->xsk_pool ?
1579 ice_clean_rx_irq_zc(rx_ring, xsk_pool, budget_per_ring) :
1580 ice_clean_rx_irq(rx_ring, budget_per_ring);
1581 work_done += cleaned;
1582 /* if we clean as many as budgeted, we must not be done */
1583 if (cleaned >= budget_per_ring)
1584 clean_complete = false;
1585 }
1586
1587 /* If work not completed, return budget and polling will return */
1588 if (!clean_complete) {
1589 /* Set the writeback on ITR so partial completions of
1590 * cache-lines will still continue even if we're polling.
1591 */
1592 ice_set_wb_on_itr(q_vector);
1593 return budget;
1594 }
1595
1596 /* Exit the polling mode, but don't re-enable interrupts if stack might
1597 * poll us due to busy-polling
1598 */
1599 if (napi_complete_done(napi, work_done)) {
1600 ice_net_dim(q_vector);
1601 ice_enable_interrupt(q_vector);
1602 } else {
1603 ice_set_wb_on_itr(q_vector);
1604 }
1605
1606 return min_t(int, work_done, budget - 1);
1607}
1608
1609/**
1610 * __ice_maybe_stop_tx - 2nd level check for Tx stop conditions
1611 * @tx_ring: the ring to be checked
1612 * @size: the size buffer we want to assure is available
1613 *
1614 * Returns -EBUSY if a stop is needed, else 0
1615 */
1616static int __ice_maybe_stop_tx(struct ice_tx_ring *tx_ring, unsigned int size)
1617{
1618 netif_tx_stop_queue(txring_txq(tx_ring));
1619 /* Memory barrier before checking head and tail */
1620 smp_mb();
1621
1622 /* Check again in a case another CPU has just made room available. */
1623 if (likely(ICE_DESC_UNUSED(tx_ring) < size))
1624 return -EBUSY;
1625
1626 /* A reprieve! - use start_queue because it doesn't call schedule */
1627 netif_tx_start_queue(txring_txq(tx_ring));
1628 ++tx_ring->ring_stats->tx_stats.restart_q;
1629 return 0;
1630}
1631
1632/**
1633 * ice_maybe_stop_tx - 1st level check for Tx stop conditions
1634 * @tx_ring: the ring to be checked
1635 * @size: the size buffer we want to assure is available
1636 *
1637 * Returns 0 if stop is not needed
1638 */
1639static int ice_maybe_stop_tx(struct ice_tx_ring *tx_ring, unsigned int size)
1640{
1641 if (likely(ICE_DESC_UNUSED(tx_ring) >= size))
1642 return 0;
1643
1644 return __ice_maybe_stop_tx(tx_ring, size);
1645}
1646
1647/**
1648 * ice_tx_map - Build the Tx descriptor
1649 * @tx_ring: ring to send buffer on
1650 * @first: first buffer info buffer to use
1651 * @off: pointer to struct that holds offload parameters
1652 *
1653 * This function loops over the skb data pointed to by *first
1654 * and gets a physical address for each memory location and programs
1655 * it and the length into the transmit descriptor.
1656 */
1657static void
1658ice_tx_map(struct ice_tx_ring *tx_ring, struct ice_tx_buf *first,
1659 struct ice_tx_offload_params *off)
1660{
1661 u64 td_offset, td_tag, td_cmd;
1662 u16 i = tx_ring->next_to_use;
1663 unsigned int data_len, size;
1664 struct ice_tx_desc *tx_desc;
1665 struct ice_tx_buf *tx_buf;
1666 struct sk_buff *skb;
1667 skb_frag_t *frag;
1668 dma_addr_t dma;
1669 bool kick;
1670
1671 td_tag = off->td_l2tag1;
1672 td_cmd = off->td_cmd;
1673 td_offset = off->td_offset;
1674 skb = first->skb;
1675
1676 data_len = skb->data_len;
1677 size = skb_headlen(skb);
1678
1679 tx_desc = ICE_TX_DESC(tx_ring, i);
1680
1681 if (first->tx_flags & ICE_TX_FLAGS_HW_VLAN) {
1682 td_cmd |= (u64)ICE_TX_DESC_CMD_IL2TAG1;
1683 td_tag = first->vid;
1684 }
1685
1686 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
1687
1688 tx_buf = first;
1689
1690 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
1691 unsigned int max_data = ICE_MAX_DATA_PER_TXD_ALIGNED;
1692
1693 if (dma_mapping_error(tx_ring->dev, dma))
1694 goto dma_error;
1695
1696 /* record length, and DMA address */
1697 dma_unmap_len_set(tx_buf, len, size);
1698 dma_unmap_addr_set(tx_buf, dma, dma);
1699
1700 /* align size to end of page */
1701 max_data += -dma & (ICE_MAX_READ_REQ_SIZE - 1);
1702 tx_desc->buf_addr = cpu_to_le64(dma);
1703
1704 /* account for data chunks larger than the hardware
1705 * can handle
1706 */
1707 while (unlikely(size > ICE_MAX_DATA_PER_TXD)) {
1708 tx_desc->cmd_type_offset_bsz =
1709 ice_build_ctob(td_cmd, td_offset, max_data,
1710 td_tag);
1711
1712 tx_desc++;
1713 i++;
1714
1715 if (i == tx_ring->count) {
1716 tx_desc = ICE_TX_DESC(tx_ring, 0);
1717 i = 0;
1718 }
1719
1720 dma += max_data;
1721 size -= max_data;
1722
1723 max_data = ICE_MAX_DATA_PER_TXD_ALIGNED;
1724 tx_desc->buf_addr = cpu_to_le64(dma);
1725 }
1726
1727 if (likely(!data_len))
1728 break;
1729
1730 tx_desc->cmd_type_offset_bsz = ice_build_ctob(td_cmd, td_offset,
1731 size, td_tag);
1732
1733 tx_desc++;
1734 i++;
1735
1736 if (i == tx_ring->count) {
1737 tx_desc = ICE_TX_DESC(tx_ring, 0);
1738 i = 0;
1739 }
1740
1741 size = skb_frag_size(frag);
1742 data_len -= size;
1743
1744 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
1745 DMA_TO_DEVICE);
1746
1747 tx_buf = &tx_ring->tx_buf[i];
1748 tx_buf->type = ICE_TX_BUF_FRAG;
1749 }
1750
1751 /* record SW timestamp if HW timestamp is not available */
1752 skb_tx_timestamp(first->skb);
1753
1754 i++;
1755 if (i == tx_ring->count)
1756 i = 0;
1757
1758 /* write last descriptor with RS and EOP bits */
1759 td_cmd |= (u64)ICE_TXD_LAST_DESC_CMD;
1760 tx_desc->cmd_type_offset_bsz =
1761 ice_build_ctob(td_cmd, td_offset, size, td_tag);
1762
1763 /* Force memory writes to complete before letting h/w know there
1764 * are new descriptors to fetch.
1765 *
1766 * We also use this memory barrier to make certain all of the
1767 * status bits have been updated before next_to_watch is written.
1768 */
1769 wmb();
1770
1771 /* set next_to_watch value indicating a packet is present */
1772 first->next_to_watch = tx_desc;
1773
1774 tx_ring->next_to_use = i;
1775
1776 ice_maybe_stop_tx(tx_ring, DESC_NEEDED);
1777
1778 /* notify HW of packet */
1779 kick = __netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount,
1780 netdev_xmit_more());
1781 if (kick)
1782 /* notify HW of packet */
1783 writel(i, tx_ring->tail);
1784
1785 return;
1786
1787dma_error:
1788 /* clear DMA mappings for failed tx_buf map */
1789 for (;;) {
1790 tx_buf = &tx_ring->tx_buf[i];
1791 ice_unmap_and_free_tx_buf(tx_ring, tx_buf);
1792 if (tx_buf == first)
1793 break;
1794 if (i == 0)
1795 i = tx_ring->count;
1796 i--;
1797 }
1798
1799 tx_ring->next_to_use = i;
1800}
1801
1802/**
1803 * ice_tx_csum - Enable Tx checksum offloads
1804 * @first: pointer to the first descriptor
1805 * @off: pointer to struct that holds offload parameters
1806 *
1807 * Returns 0 or error (negative) if checksum offload can't happen, 1 otherwise.
1808 */
1809static
1810int ice_tx_csum(struct ice_tx_buf *first, struct ice_tx_offload_params *off)
1811{
1812 u32 l4_len = 0, l3_len = 0, l2_len = 0;
1813 struct sk_buff *skb = first->skb;
1814 union {
1815 struct iphdr *v4;
1816 struct ipv6hdr *v6;
1817 unsigned char *hdr;
1818 } ip;
1819 union {
1820 struct tcphdr *tcp;
1821 unsigned char *hdr;
1822 } l4;
1823 __be16 frag_off, protocol;
1824 unsigned char *exthdr;
1825 u32 offset, cmd = 0;
1826 u8 l4_proto = 0;
1827
1828 if (skb->ip_summed != CHECKSUM_PARTIAL)
1829 return 0;
1830
1831 protocol = vlan_get_protocol(skb);
1832
1833 if (eth_p_mpls(protocol)) {
1834 ip.hdr = skb_inner_network_header(skb);
1835 l4.hdr = skb_checksum_start(skb);
1836 } else {
1837 ip.hdr = skb_network_header(skb);
1838 l4.hdr = skb_transport_header(skb);
1839 }
1840
1841 /* compute outer L2 header size */
1842 l2_len = ip.hdr - skb->data;
1843 offset = (l2_len / 2) << ICE_TX_DESC_LEN_MACLEN_S;
1844
1845 /* set the tx_flags to indicate the IP protocol type. this is
1846 * required so that checksum header computation below is accurate.
1847 */
1848 if (ip.v4->version == 4)
1849 first->tx_flags |= ICE_TX_FLAGS_IPV4;
1850 else if (ip.v6->version == 6)
1851 first->tx_flags |= ICE_TX_FLAGS_IPV6;
1852
1853 if (skb->encapsulation) {
1854 bool gso_ena = false;
1855 u32 tunnel = 0;
1856
1857 /* define outer network header type */
1858 if (first->tx_flags & ICE_TX_FLAGS_IPV4) {
1859 tunnel |= (first->tx_flags & ICE_TX_FLAGS_TSO) ?
1860 ICE_TX_CTX_EIPT_IPV4 :
1861 ICE_TX_CTX_EIPT_IPV4_NO_CSUM;
1862 l4_proto = ip.v4->protocol;
1863 } else if (first->tx_flags & ICE_TX_FLAGS_IPV6) {
1864 int ret;
1865
1866 tunnel |= ICE_TX_CTX_EIPT_IPV6;
1867 exthdr = ip.hdr + sizeof(*ip.v6);
1868 l4_proto = ip.v6->nexthdr;
1869 ret = ipv6_skip_exthdr(skb, exthdr - skb->data,
1870 &l4_proto, &frag_off);
1871 if (ret < 0)
1872 return -1;
1873 }
1874
1875 /* define outer transport */
1876 switch (l4_proto) {
1877 case IPPROTO_UDP:
1878 tunnel |= ICE_TXD_CTX_UDP_TUNNELING;
1879 first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1880 break;
1881 case IPPROTO_GRE:
1882 tunnel |= ICE_TXD_CTX_GRE_TUNNELING;
1883 first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1884 break;
1885 case IPPROTO_IPIP:
1886 case IPPROTO_IPV6:
1887 first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1888 l4.hdr = skb_inner_network_header(skb);
1889 break;
1890 default:
1891 if (first->tx_flags & ICE_TX_FLAGS_TSO)
1892 return -1;
1893
1894 skb_checksum_help(skb);
1895 return 0;
1896 }
1897
1898 /* compute outer L3 header size */
1899 tunnel |= ((l4.hdr - ip.hdr) / 4) <<
1900 ICE_TXD_CTX_QW0_EIPLEN_S;
1901
1902 /* switch IP header pointer from outer to inner header */
1903 ip.hdr = skb_inner_network_header(skb);
1904
1905 /* compute tunnel header size */
1906 tunnel |= ((ip.hdr - l4.hdr) / 2) <<
1907 ICE_TXD_CTX_QW0_NATLEN_S;
1908
1909 gso_ena = skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL;
1910 /* indicate if we need to offload outer UDP header */
1911 if ((first->tx_flags & ICE_TX_FLAGS_TSO) && !gso_ena &&
1912 (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_TUNNEL_CSUM))
1913 tunnel |= ICE_TXD_CTX_QW0_L4T_CS_M;
1914
1915 /* record tunnel offload values */
1916 off->cd_tunnel_params |= tunnel;
1917
1918 /* set DTYP=1 to indicate that it's an Tx context descriptor
1919 * in IPsec tunnel mode with Tx offloads in Quad word 1
1920 */
1921 off->cd_qw1 |= (u64)ICE_TX_DESC_DTYPE_CTX;
1922
1923 /* switch L4 header pointer from outer to inner */
1924 l4.hdr = skb_inner_transport_header(skb);
1925 l4_proto = 0;
1926
1927 /* reset type as we transition from outer to inner headers */
1928 first->tx_flags &= ~(ICE_TX_FLAGS_IPV4 | ICE_TX_FLAGS_IPV6);
1929 if (ip.v4->version == 4)
1930 first->tx_flags |= ICE_TX_FLAGS_IPV4;
1931 if (ip.v6->version == 6)
1932 first->tx_flags |= ICE_TX_FLAGS_IPV6;
1933 }
1934
1935 /* Enable IP checksum offloads */
1936 if (first->tx_flags & ICE_TX_FLAGS_IPV4) {
1937 l4_proto = ip.v4->protocol;
1938 /* the stack computes the IP header already, the only time we
1939 * need the hardware to recompute it is in the case of TSO.
1940 */
1941 if (first->tx_flags & ICE_TX_FLAGS_TSO)
1942 cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM;
1943 else
1944 cmd |= ICE_TX_DESC_CMD_IIPT_IPV4;
1945
1946 } else if (first->tx_flags & ICE_TX_FLAGS_IPV6) {
1947 cmd |= ICE_TX_DESC_CMD_IIPT_IPV6;
1948 exthdr = ip.hdr + sizeof(*ip.v6);
1949 l4_proto = ip.v6->nexthdr;
1950 if (l4.hdr != exthdr)
1951 ipv6_skip_exthdr(skb, exthdr - skb->data, &l4_proto,
1952 &frag_off);
1953 } else {
1954 return -1;
1955 }
1956
1957 /* compute inner L3 header size */
1958 l3_len = l4.hdr - ip.hdr;
1959 offset |= (l3_len / 4) << ICE_TX_DESC_LEN_IPLEN_S;
1960
1961 /* Enable L4 checksum offloads */
1962 switch (l4_proto) {
1963 case IPPROTO_TCP:
1964 /* enable checksum offloads */
1965 cmd |= ICE_TX_DESC_CMD_L4T_EOFT_TCP;
1966 l4_len = l4.tcp->doff;
1967 offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1968 break;
1969 case IPPROTO_UDP:
1970 /* enable UDP checksum offload */
1971 cmd |= ICE_TX_DESC_CMD_L4T_EOFT_UDP;
1972 l4_len = (sizeof(struct udphdr) >> 2);
1973 offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1974 break;
1975 case IPPROTO_SCTP:
1976 /* enable SCTP checksum offload */
1977 cmd |= ICE_TX_DESC_CMD_L4T_EOFT_SCTP;
1978 l4_len = sizeof(struct sctphdr) >> 2;
1979 offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1980 break;
1981
1982 default:
1983 if (first->tx_flags & ICE_TX_FLAGS_TSO)
1984 return -1;
1985 skb_checksum_help(skb);
1986 return 0;
1987 }
1988
1989 off->td_cmd |= cmd;
1990 off->td_offset |= offset;
1991 return 1;
1992}
1993
1994/**
1995 * ice_tx_prepare_vlan_flags - prepare generic Tx VLAN tagging flags for HW
1996 * @tx_ring: ring to send buffer on
1997 * @first: pointer to struct ice_tx_buf
1998 *
1999 * Checks the skb and set up correspondingly several generic transmit flags
2000 * related to VLAN tagging for the HW, such as VLAN, DCB, etc.
2001 */
2002static void
2003ice_tx_prepare_vlan_flags(struct ice_tx_ring *tx_ring, struct ice_tx_buf *first)
2004{
2005 struct sk_buff *skb = first->skb;
2006
2007 /* nothing left to do, software offloaded VLAN */
2008 if (!skb_vlan_tag_present(skb) && eth_type_vlan(skb->protocol))
2009 return;
2010
2011 /* the VLAN ethertype/tpid is determined by VSI configuration and netdev
2012 * feature flags, which the driver only allows either 802.1Q or 802.1ad
2013 * VLAN offloads exclusively so we only care about the VLAN ID here
2014 */
2015 if (skb_vlan_tag_present(skb)) {
2016 first->vid = skb_vlan_tag_get(skb);
2017 if (tx_ring->flags & ICE_TX_FLAGS_RING_VLAN_L2TAG2)
2018 first->tx_flags |= ICE_TX_FLAGS_HW_OUTER_SINGLE_VLAN;
2019 else
2020 first->tx_flags |= ICE_TX_FLAGS_HW_VLAN;
2021 }
2022
2023 ice_tx_prepare_vlan_flags_dcb(tx_ring, first);
2024}
2025
2026/**
2027 * ice_tso - computes mss and TSO length to prepare for TSO
2028 * @first: pointer to struct ice_tx_buf
2029 * @off: pointer to struct that holds offload parameters
2030 *
2031 * Returns 0 or error (negative) if TSO can't happen, 1 otherwise.
2032 */
2033static
2034int ice_tso(struct ice_tx_buf *first, struct ice_tx_offload_params *off)
2035{
2036 struct sk_buff *skb = first->skb;
2037 union {
2038 struct iphdr *v4;
2039 struct ipv6hdr *v6;
2040 unsigned char *hdr;
2041 } ip;
2042 union {
2043 struct tcphdr *tcp;
2044 struct udphdr *udp;
2045 unsigned char *hdr;
2046 } l4;
2047 u64 cd_mss, cd_tso_len;
2048 __be16 protocol;
2049 u32 paylen;
2050 u8 l4_start;
2051 int err;
2052
2053 if (skb->ip_summed != CHECKSUM_PARTIAL)
2054 return 0;
2055
2056 if (!skb_is_gso(skb))
2057 return 0;
2058
2059 err = skb_cow_head(skb, 0);
2060 if (err < 0)
2061 return err;
2062
2063 protocol = vlan_get_protocol(skb);
2064
2065 if (eth_p_mpls(protocol))
2066 ip.hdr = skb_inner_network_header(skb);
2067 else
2068 ip.hdr = skb_network_header(skb);
2069 l4.hdr = skb_checksum_start(skb);
2070
2071 /* initialize outer IP header fields */
2072 if (ip.v4->version == 4) {
2073 ip.v4->tot_len = 0;
2074 ip.v4->check = 0;
2075 } else {
2076 ip.v6->payload_len = 0;
2077 }
2078
2079 if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
2080 SKB_GSO_GRE_CSUM |
2081 SKB_GSO_IPXIP4 |
2082 SKB_GSO_IPXIP6 |
2083 SKB_GSO_UDP_TUNNEL |
2084 SKB_GSO_UDP_TUNNEL_CSUM)) {
2085 if (!(skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) &&
2086 (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_TUNNEL_CSUM)) {
2087 l4.udp->len = 0;
2088
2089 /* determine offset of outer transport header */
2090 l4_start = (u8)(l4.hdr - skb->data);
2091
2092 /* remove payload length from outer checksum */
2093 paylen = skb->len - l4_start;
2094 csum_replace_by_diff(&l4.udp->check,
2095 (__force __wsum)htonl(paylen));
2096 }
2097
2098 /* reset pointers to inner headers */
2099 ip.hdr = skb_inner_network_header(skb);
2100 l4.hdr = skb_inner_transport_header(skb);
2101
2102 /* initialize inner IP header fields */
2103 if (ip.v4->version == 4) {
2104 ip.v4->tot_len = 0;
2105 ip.v4->check = 0;
2106 } else {
2107 ip.v6->payload_len = 0;
2108 }
2109 }
2110
2111 /* determine offset of transport header */
2112 l4_start = (u8)(l4.hdr - skb->data);
2113
2114 /* remove payload length from checksum */
2115 paylen = skb->len - l4_start;
2116
2117 if (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4) {
2118 csum_replace_by_diff(&l4.udp->check,
2119 (__force __wsum)htonl(paylen));
2120 /* compute length of UDP segmentation header */
2121 off->header_len = (u8)sizeof(l4.udp) + l4_start;
2122 } else {
2123 csum_replace_by_diff(&l4.tcp->check,
2124 (__force __wsum)htonl(paylen));
2125 /* compute length of TCP segmentation header */
2126 off->header_len = (u8)((l4.tcp->doff * 4) + l4_start);
2127 }
2128
2129 /* update gso_segs and bytecount */
2130 first->gso_segs = skb_shinfo(skb)->gso_segs;
2131 first->bytecount += (first->gso_segs - 1) * off->header_len;
2132
2133 cd_tso_len = skb->len - off->header_len;
2134 cd_mss = skb_shinfo(skb)->gso_size;
2135
2136 /* record cdesc_qw1 with TSO parameters */
2137 off->cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2138 (ICE_TX_CTX_DESC_TSO << ICE_TXD_CTX_QW1_CMD_S) |
2139 (cd_tso_len << ICE_TXD_CTX_QW1_TSO_LEN_S) |
2140 (cd_mss << ICE_TXD_CTX_QW1_MSS_S));
2141 first->tx_flags |= ICE_TX_FLAGS_TSO;
2142 return 1;
2143}
2144
2145/**
2146 * ice_txd_use_count - estimate the number of descriptors needed for Tx
2147 * @size: transmit request size in bytes
2148 *
2149 * Due to hardware alignment restrictions (4K alignment), we need to
2150 * assume that we can have no more than 12K of data per descriptor, even
2151 * though each descriptor can take up to 16K - 1 bytes of aligned memory.
2152 * Thus, we need to divide by 12K. But division is slow! Instead,
2153 * we decompose the operation into shifts and one relatively cheap
2154 * multiply operation.
2155 *
2156 * To divide by 12K, we first divide by 4K, then divide by 3:
2157 * To divide by 4K, shift right by 12 bits
2158 * To divide by 3, multiply by 85, then divide by 256
2159 * (Divide by 256 is done by shifting right by 8 bits)
2160 * Finally, we add one to round up. Because 256 isn't an exact multiple of
2161 * 3, we'll underestimate near each multiple of 12K. This is actually more
2162 * accurate as we have 4K - 1 of wiggle room that we can fit into the last
2163 * segment. For our purposes this is accurate out to 1M which is orders of
2164 * magnitude greater than our largest possible GSO size.
2165 *
2166 * This would then be implemented as:
2167 * return (((size >> 12) * 85) >> 8) + ICE_DESCS_FOR_SKB_DATA_PTR;
2168 *
2169 * Since multiplication and division are commutative, we can reorder
2170 * operations into:
2171 * return ((size * 85) >> 20) + ICE_DESCS_FOR_SKB_DATA_PTR;
2172 */
2173static unsigned int ice_txd_use_count(unsigned int size)
2174{
2175 return ((size * 85) >> 20) + ICE_DESCS_FOR_SKB_DATA_PTR;
2176}
2177
2178/**
2179 * ice_xmit_desc_count - calculate number of Tx descriptors needed
2180 * @skb: send buffer
2181 *
2182 * Returns number of data descriptors needed for this skb.
2183 */
2184static unsigned int ice_xmit_desc_count(struct sk_buff *skb)
2185{
2186 const skb_frag_t *frag = &skb_shinfo(skb)->frags[0];
2187 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2188 unsigned int count = 0, size = skb_headlen(skb);
2189
2190 for (;;) {
2191 count += ice_txd_use_count(size);
2192
2193 if (!nr_frags--)
2194 break;
2195
2196 size = skb_frag_size(frag++);
2197 }
2198
2199 return count;
2200}
2201
2202/**
2203 * __ice_chk_linearize - Check if there are more than 8 buffers per packet
2204 * @skb: send buffer
2205 *
2206 * Note: This HW can't DMA more than 8 buffers to build a packet on the wire
2207 * and so we need to figure out the cases where we need to linearize the skb.
2208 *
2209 * For TSO we need to count the TSO header and segment payload separately.
2210 * As such we need to check cases where we have 7 fragments or more as we
2211 * can potentially require 9 DMA transactions, 1 for the TSO header, 1 for
2212 * the segment payload in the first descriptor, and another 7 for the
2213 * fragments.
2214 */
2215static bool __ice_chk_linearize(struct sk_buff *skb)
2216{
2217 const skb_frag_t *frag, *stale;
2218 int nr_frags, sum;
2219
2220 /* no need to check if number of frags is less than 7 */
2221 nr_frags = skb_shinfo(skb)->nr_frags;
2222 if (nr_frags < (ICE_MAX_BUF_TXD - 1))
2223 return false;
2224
2225 /* We need to walk through the list and validate that each group
2226 * of 6 fragments totals at least gso_size.
2227 */
2228 nr_frags -= ICE_MAX_BUF_TXD - 2;
2229 frag = &skb_shinfo(skb)->frags[0];
2230
2231 /* Initialize size to the negative value of gso_size minus 1. We
2232 * use this as the worst case scenario in which the frag ahead
2233 * of us only provides one byte which is why we are limited to 6
2234 * descriptors for a single transmit as the header and previous
2235 * fragment are already consuming 2 descriptors.
2236 */
2237 sum = 1 - skb_shinfo(skb)->gso_size;
2238
2239 /* Add size of frags 0 through 4 to create our initial sum */
2240 sum += skb_frag_size(frag++);
2241 sum += skb_frag_size(frag++);
2242 sum += skb_frag_size(frag++);
2243 sum += skb_frag_size(frag++);
2244 sum += skb_frag_size(frag++);
2245
2246 /* Walk through fragments adding latest fragment, testing it, and
2247 * then removing stale fragments from the sum.
2248 */
2249 for (stale = &skb_shinfo(skb)->frags[0];; stale++) {
2250 int stale_size = skb_frag_size(stale);
2251
2252 sum += skb_frag_size(frag++);
2253
2254 /* The stale fragment may present us with a smaller
2255 * descriptor than the actual fragment size. To account
2256 * for that we need to remove all the data on the front and
2257 * figure out what the remainder would be in the last
2258 * descriptor associated with the fragment.
2259 */
2260 if (stale_size > ICE_MAX_DATA_PER_TXD) {
2261 int align_pad = -(skb_frag_off(stale)) &
2262 (ICE_MAX_READ_REQ_SIZE - 1);
2263
2264 sum -= align_pad;
2265 stale_size -= align_pad;
2266
2267 do {
2268 sum -= ICE_MAX_DATA_PER_TXD_ALIGNED;
2269 stale_size -= ICE_MAX_DATA_PER_TXD_ALIGNED;
2270 } while (stale_size > ICE_MAX_DATA_PER_TXD);
2271 }
2272
2273 /* if sum is negative we failed to make sufficient progress */
2274 if (sum < 0)
2275 return true;
2276
2277 if (!nr_frags--)
2278 break;
2279
2280 sum -= stale_size;
2281 }
2282
2283 return false;
2284}
2285
2286/**
2287 * ice_chk_linearize - Check if there are more than 8 fragments per packet
2288 * @skb: send buffer
2289 * @count: number of buffers used
2290 *
2291 * Note: Our HW can't scatter-gather more than 8 fragments to build
2292 * a packet on the wire and so we need to figure out the cases where we
2293 * need to linearize the skb.
2294 */
2295static bool ice_chk_linearize(struct sk_buff *skb, unsigned int count)
2296{
2297 /* Both TSO and single send will work if count is less than 8 */
2298 if (likely(count < ICE_MAX_BUF_TXD))
2299 return false;
2300
2301 if (skb_is_gso(skb))
2302 return __ice_chk_linearize(skb);
2303
2304 /* we can support up to 8 data buffers for a single send */
2305 return count != ICE_MAX_BUF_TXD;
2306}
2307
2308/**
2309 * ice_tstamp - set up context descriptor for hardware timestamp
2310 * @tx_ring: pointer to the Tx ring to send buffer on
2311 * @skb: pointer to the SKB we're sending
2312 * @first: Tx buffer
2313 * @off: Tx offload parameters
2314 */
2315static void
2316ice_tstamp(struct ice_tx_ring *tx_ring, struct sk_buff *skb,
2317 struct ice_tx_buf *first, struct ice_tx_offload_params *off)
2318{
2319 s8 idx;
2320
2321 /* only timestamp the outbound packet if the user has requested it */
2322 if (likely(!(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)))
2323 return;
2324
2325 /* Tx timestamps cannot be sampled when doing TSO */
2326 if (first->tx_flags & ICE_TX_FLAGS_TSO)
2327 return;
2328
2329 /* Grab an open timestamp slot */
2330 idx = ice_ptp_request_ts(tx_ring->tx_tstamps, skb);
2331 if (idx < 0) {
2332 tx_ring->vsi->back->ptp.tx_hwtstamp_skipped++;
2333 return;
2334 }
2335
2336 off->cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2337 (ICE_TX_CTX_DESC_TSYN << ICE_TXD_CTX_QW1_CMD_S) |
2338 ((u64)idx << ICE_TXD_CTX_QW1_TSO_LEN_S));
2339 first->tx_flags |= ICE_TX_FLAGS_TSYN;
2340}
2341
2342/**
2343 * ice_xmit_frame_ring - Sends buffer on Tx ring
2344 * @skb: send buffer
2345 * @tx_ring: ring to send buffer on
2346 *
2347 * Returns NETDEV_TX_OK if sent, else an error code
2348 */
2349static netdev_tx_t
2350ice_xmit_frame_ring(struct sk_buff *skb, struct ice_tx_ring *tx_ring)
2351{
2352 struct ice_tx_offload_params offload = { 0 };
2353 struct ice_vsi *vsi = tx_ring->vsi;
2354 struct ice_tx_buf *first;
2355 struct ethhdr *eth;
2356 unsigned int count;
2357 int tso, csum;
2358
2359 ice_trace(xmit_frame_ring, tx_ring, skb);
2360
2361 if (unlikely(ipv6_hopopt_jumbo_remove(skb)))
2362 goto out_drop;
2363
2364 count = ice_xmit_desc_count(skb);
2365 if (ice_chk_linearize(skb, count)) {
2366 if (__skb_linearize(skb))
2367 goto out_drop;
2368 count = ice_txd_use_count(skb->len);
2369 tx_ring->ring_stats->tx_stats.tx_linearize++;
2370 }
2371
2372 /* need: 1 descriptor per page * PAGE_SIZE/ICE_MAX_DATA_PER_TXD,
2373 * + 1 desc for skb_head_len/ICE_MAX_DATA_PER_TXD,
2374 * + 4 desc gap to avoid the cache line where head is,
2375 * + 1 desc for context descriptor,
2376 * otherwise try next time
2377 */
2378 if (ice_maybe_stop_tx(tx_ring, count + ICE_DESCS_PER_CACHE_LINE +
2379 ICE_DESCS_FOR_CTX_DESC)) {
2380 tx_ring->ring_stats->tx_stats.tx_busy++;
2381 return NETDEV_TX_BUSY;
2382 }
2383
2384 /* prefetch for bql data which is infrequently used */
2385 netdev_txq_bql_enqueue_prefetchw(txring_txq(tx_ring));
2386
2387 offload.tx_ring = tx_ring;
2388
2389 /* record the location of the first descriptor for this packet */
2390 first = &tx_ring->tx_buf[tx_ring->next_to_use];
2391 first->skb = skb;
2392 first->type = ICE_TX_BUF_SKB;
2393 first->bytecount = max_t(unsigned int, skb->len, ETH_ZLEN);
2394 first->gso_segs = 1;
2395 first->tx_flags = 0;
2396
2397 /* prepare the VLAN tagging flags for Tx */
2398 ice_tx_prepare_vlan_flags(tx_ring, first);
2399 if (first->tx_flags & ICE_TX_FLAGS_HW_OUTER_SINGLE_VLAN) {
2400 offload.cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2401 (ICE_TX_CTX_DESC_IL2TAG2 <<
2402 ICE_TXD_CTX_QW1_CMD_S));
2403 offload.cd_l2tag2 = first->vid;
2404 }
2405
2406 /* set up TSO offload */
2407 tso = ice_tso(first, &offload);
2408 if (tso < 0)
2409 goto out_drop;
2410
2411 /* always set up Tx checksum offload */
2412 csum = ice_tx_csum(first, &offload);
2413 if (csum < 0)
2414 goto out_drop;
2415
2416 /* allow CONTROL frames egress from main VSI if FW LLDP disabled */
2417 eth = (struct ethhdr *)skb_mac_header(skb);
2418 if (unlikely((skb->priority == TC_PRIO_CONTROL ||
2419 eth->h_proto == htons(ETH_P_LLDP)) &&
2420 vsi->type == ICE_VSI_PF &&
2421 vsi->port_info->qos_cfg.is_sw_lldp))
2422 offload.cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2423 ICE_TX_CTX_DESC_SWTCH_UPLINK <<
2424 ICE_TXD_CTX_QW1_CMD_S);
2425
2426 ice_tstamp(tx_ring, skb, first, &offload);
2427 if (ice_is_switchdev_running(vsi->back) && vsi->type != ICE_VSI_SF)
2428 ice_eswitch_set_target_vsi(skb, &offload);
2429
2430 if (offload.cd_qw1 & ICE_TX_DESC_DTYPE_CTX) {
2431 struct ice_tx_ctx_desc *cdesc;
2432 u16 i = tx_ring->next_to_use;
2433
2434 /* grab the next descriptor */
2435 cdesc = ICE_TX_CTX_DESC(tx_ring, i);
2436 i++;
2437 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
2438
2439 /* setup context descriptor */
2440 cdesc->tunneling_params = cpu_to_le32(offload.cd_tunnel_params);
2441 cdesc->l2tag2 = cpu_to_le16(offload.cd_l2tag2);
2442 cdesc->rsvd = cpu_to_le16(0);
2443 cdesc->qw1 = cpu_to_le64(offload.cd_qw1);
2444 }
2445
2446 ice_tx_map(tx_ring, first, &offload);
2447 return NETDEV_TX_OK;
2448
2449out_drop:
2450 ice_trace(xmit_frame_ring_drop, tx_ring, skb);
2451 dev_kfree_skb_any(skb);
2452 return NETDEV_TX_OK;
2453}
2454
2455/**
2456 * ice_start_xmit - Selects the correct VSI and Tx queue to send buffer
2457 * @skb: send buffer
2458 * @netdev: network interface device structure
2459 *
2460 * Returns NETDEV_TX_OK if sent, else an error code
2461 */
2462netdev_tx_t ice_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2463{
2464 struct ice_netdev_priv *np = netdev_priv(netdev);
2465 struct ice_vsi *vsi = np->vsi;
2466 struct ice_tx_ring *tx_ring;
2467
2468 tx_ring = vsi->tx_rings[skb->queue_mapping];
2469
2470 /* hardware can't handle really short frames, hardware padding works
2471 * beyond this point
2472 */
2473 if (skb_put_padto(skb, ICE_MIN_TX_LEN))
2474 return NETDEV_TX_OK;
2475
2476 return ice_xmit_frame_ring(skb, tx_ring);
2477}
2478
2479/**
2480 * ice_get_dscp_up - return the UP/TC value for a SKB
2481 * @dcbcfg: DCB config that contains DSCP to UP/TC mapping
2482 * @skb: SKB to query for info to determine UP/TC
2483 *
2484 * This function is to only be called when the PF is in L3 DSCP PFC mode
2485 */
2486static u8 ice_get_dscp_up(struct ice_dcbx_cfg *dcbcfg, struct sk_buff *skb)
2487{
2488 u8 dscp = 0;
2489
2490 if (skb->protocol == htons(ETH_P_IP))
2491 dscp = ipv4_get_dsfield(ip_hdr(skb)) >> 2;
2492 else if (skb->protocol == htons(ETH_P_IPV6))
2493 dscp = ipv6_get_dsfield(ipv6_hdr(skb)) >> 2;
2494
2495 return dcbcfg->dscp_map[dscp];
2496}
2497
2498u16
2499ice_select_queue(struct net_device *netdev, struct sk_buff *skb,
2500 struct net_device *sb_dev)
2501{
2502 struct ice_pf *pf = ice_netdev_to_pf(netdev);
2503 struct ice_dcbx_cfg *dcbcfg;
2504
2505 dcbcfg = &pf->hw.port_info->qos_cfg.local_dcbx_cfg;
2506 if (dcbcfg->pfc_mode == ICE_QOS_MODE_DSCP)
2507 skb->priority = ice_get_dscp_up(dcbcfg, skb);
2508
2509 return netdev_pick_tx(netdev, skb, sb_dev);
2510}
2511
2512/**
2513 * ice_clean_ctrl_tx_irq - interrupt handler for flow director Tx queue
2514 * @tx_ring: tx_ring to clean
2515 */
2516void ice_clean_ctrl_tx_irq(struct ice_tx_ring *tx_ring)
2517{
2518 struct ice_vsi *vsi = tx_ring->vsi;
2519 s16 i = tx_ring->next_to_clean;
2520 int budget = ICE_DFLT_IRQ_WORK;
2521 struct ice_tx_desc *tx_desc;
2522 struct ice_tx_buf *tx_buf;
2523
2524 tx_buf = &tx_ring->tx_buf[i];
2525 tx_desc = ICE_TX_DESC(tx_ring, i);
2526 i -= tx_ring->count;
2527
2528 do {
2529 struct ice_tx_desc *eop_desc = tx_buf->next_to_watch;
2530
2531 /* if next_to_watch is not set then there is no pending work */
2532 if (!eop_desc)
2533 break;
2534
2535 /* prevent any other reads prior to eop_desc */
2536 smp_rmb();
2537
2538 /* if the descriptor isn't done, no work to do */
2539 if (!(eop_desc->cmd_type_offset_bsz &
2540 cpu_to_le64(ICE_TX_DESC_DTYPE_DESC_DONE)))
2541 break;
2542
2543 /* clear next_to_watch to prevent false hangs */
2544 tx_buf->next_to_watch = NULL;
2545 tx_desc->buf_addr = 0;
2546 tx_desc->cmd_type_offset_bsz = 0;
2547
2548 /* move past filter desc */
2549 tx_buf++;
2550 tx_desc++;
2551 i++;
2552 if (unlikely(!i)) {
2553 i -= tx_ring->count;
2554 tx_buf = tx_ring->tx_buf;
2555 tx_desc = ICE_TX_DESC(tx_ring, 0);
2556 }
2557
2558 /* unmap the data header */
2559 if (dma_unmap_len(tx_buf, len))
2560 dma_unmap_single(tx_ring->dev,
2561 dma_unmap_addr(tx_buf, dma),
2562 dma_unmap_len(tx_buf, len),
2563 DMA_TO_DEVICE);
2564 if (tx_buf->type == ICE_TX_BUF_DUMMY)
2565 devm_kfree(tx_ring->dev, tx_buf->raw_buf);
2566
2567 /* clear next_to_watch to prevent false hangs */
2568 tx_buf->type = ICE_TX_BUF_EMPTY;
2569 tx_buf->tx_flags = 0;
2570 tx_buf->next_to_watch = NULL;
2571 dma_unmap_len_set(tx_buf, len, 0);
2572 tx_desc->buf_addr = 0;
2573 tx_desc->cmd_type_offset_bsz = 0;
2574
2575 /* move past eop_desc for start of next FD desc */
2576 tx_buf++;
2577 tx_desc++;
2578 i++;
2579 if (unlikely(!i)) {
2580 i -= tx_ring->count;
2581 tx_buf = tx_ring->tx_buf;
2582 tx_desc = ICE_TX_DESC(tx_ring, 0);
2583 }
2584
2585 budget--;
2586 } while (likely(budget));
2587
2588 i += tx_ring->count;
2589 tx_ring->next_to_clean = i;
2590
2591 /* re-enable interrupt if needed */
2592 ice_irq_dynamic_ena(&vsi->back->hw, vsi, vsi->q_vectors[0]);
2593}
1// SPDX-License-Identifier: GPL-2.0
2/* Copyright (c) 2018, Intel Corporation. */
3
4/* The driver transmit and receive code */
5
6#include <linux/prefetch.h>
7#include <linux/mm.h>
8#include <linux/bpf_trace.h>
9#include <net/xdp.h>
10#include "ice_txrx_lib.h"
11#include "ice_lib.h"
12#include "ice.h"
13#include "ice_trace.h"
14#include "ice_dcb_lib.h"
15#include "ice_xsk.h"
16
17#define ICE_RX_HDR_SIZE 256
18
19#define FDIR_DESC_RXDID 0x40
20#define ICE_FDIR_CLEAN_DELAY 10
21
22/**
23 * ice_prgm_fdir_fltr - Program a Flow Director filter
24 * @vsi: VSI to send dummy packet
25 * @fdir_desc: flow director descriptor
26 * @raw_packet: allocated buffer for flow director
27 */
28int
29ice_prgm_fdir_fltr(struct ice_vsi *vsi, struct ice_fltr_desc *fdir_desc,
30 u8 *raw_packet)
31{
32 struct ice_tx_buf *tx_buf, *first;
33 struct ice_fltr_desc *f_desc;
34 struct ice_tx_desc *tx_desc;
35 struct ice_ring *tx_ring;
36 struct device *dev;
37 dma_addr_t dma;
38 u32 td_cmd;
39 u16 i;
40
41 /* VSI and Tx ring */
42 if (!vsi)
43 return -ENOENT;
44 tx_ring = vsi->tx_rings[0];
45 if (!tx_ring || !tx_ring->desc)
46 return -ENOENT;
47 dev = tx_ring->dev;
48
49 /* we are using two descriptors to add/del a filter and we can wait */
50 for (i = ICE_FDIR_CLEAN_DELAY; ICE_DESC_UNUSED(tx_ring) < 2; i--) {
51 if (!i)
52 return -EAGAIN;
53 msleep_interruptible(1);
54 }
55
56 dma = dma_map_single(dev, raw_packet, ICE_FDIR_MAX_RAW_PKT_SIZE,
57 DMA_TO_DEVICE);
58
59 if (dma_mapping_error(dev, dma))
60 return -EINVAL;
61
62 /* grab the next descriptor */
63 i = tx_ring->next_to_use;
64 first = &tx_ring->tx_buf[i];
65 f_desc = ICE_TX_FDIRDESC(tx_ring, i);
66 memcpy(f_desc, fdir_desc, sizeof(*f_desc));
67
68 i++;
69 i = (i < tx_ring->count) ? i : 0;
70 tx_desc = ICE_TX_DESC(tx_ring, i);
71 tx_buf = &tx_ring->tx_buf[i];
72
73 i++;
74 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
75
76 memset(tx_buf, 0, sizeof(*tx_buf));
77 dma_unmap_len_set(tx_buf, len, ICE_FDIR_MAX_RAW_PKT_SIZE);
78 dma_unmap_addr_set(tx_buf, dma, dma);
79
80 tx_desc->buf_addr = cpu_to_le64(dma);
81 td_cmd = ICE_TXD_LAST_DESC_CMD | ICE_TX_DESC_CMD_DUMMY |
82 ICE_TX_DESC_CMD_RE;
83
84 tx_buf->tx_flags = ICE_TX_FLAGS_DUMMY_PKT;
85 tx_buf->raw_buf = raw_packet;
86
87 tx_desc->cmd_type_offset_bsz =
88 ice_build_ctob(td_cmd, 0, ICE_FDIR_MAX_RAW_PKT_SIZE, 0);
89
90 /* Force memory write to complete before letting h/w know
91 * there are new descriptors to fetch.
92 */
93 wmb();
94
95 /* mark the data descriptor to be watched */
96 first->next_to_watch = tx_desc;
97
98 writel(tx_ring->next_to_use, tx_ring->tail);
99
100 return 0;
101}
102
103/**
104 * ice_unmap_and_free_tx_buf - Release a Tx buffer
105 * @ring: the ring that owns the buffer
106 * @tx_buf: the buffer to free
107 */
108static void
109ice_unmap_and_free_tx_buf(struct ice_ring *ring, struct ice_tx_buf *tx_buf)
110{
111 if (tx_buf->skb) {
112 if (tx_buf->tx_flags & ICE_TX_FLAGS_DUMMY_PKT)
113 devm_kfree(ring->dev, tx_buf->raw_buf);
114 else if (ice_ring_is_xdp(ring))
115 page_frag_free(tx_buf->raw_buf);
116 else
117 dev_kfree_skb_any(tx_buf->skb);
118 if (dma_unmap_len(tx_buf, len))
119 dma_unmap_single(ring->dev,
120 dma_unmap_addr(tx_buf, dma),
121 dma_unmap_len(tx_buf, len),
122 DMA_TO_DEVICE);
123 } else if (dma_unmap_len(tx_buf, len)) {
124 dma_unmap_page(ring->dev,
125 dma_unmap_addr(tx_buf, dma),
126 dma_unmap_len(tx_buf, len),
127 DMA_TO_DEVICE);
128 }
129
130 tx_buf->next_to_watch = NULL;
131 tx_buf->skb = NULL;
132 dma_unmap_len_set(tx_buf, len, 0);
133 /* tx_buf must be completely set up in the transmit path */
134}
135
136static struct netdev_queue *txring_txq(const struct ice_ring *ring)
137{
138 return netdev_get_tx_queue(ring->netdev, ring->q_index);
139}
140
141/**
142 * ice_clean_tx_ring - Free any empty Tx buffers
143 * @tx_ring: ring to be cleaned
144 */
145void ice_clean_tx_ring(struct ice_ring *tx_ring)
146{
147 u16 i;
148
149 if (ice_ring_is_xdp(tx_ring) && tx_ring->xsk_pool) {
150 ice_xsk_clean_xdp_ring(tx_ring);
151 goto tx_skip_free;
152 }
153
154 /* ring already cleared, nothing to do */
155 if (!tx_ring->tx_buf)
156 return;
157
158 /* Free all the Tx ring sk_buffs */
159 for (i = 0; i < tx_ring->count; i++)
160 ice_unmap_and_free_tx_buf(tx_ring, &tx_ring->tx_buf[i]);
161
162tx_skip_free:
163 memset(tx_ring->tx_buf, 0, sizeof(*tx_ring->tx_buf) * tx_ring->count);
164
165 /* Zero out the descriptor ring */
166 memset(tx_ring->desc, 0, tx_ring->size);
167
168 tx_ring->next_to_use = 0;
169 tx_ring->next_to_clean = 0;
170
171 if (!tx_ring->netdev)
172 return;
173
174 /* cleanup Tx queue statistics */
175 netdev_tx_reset_queue(txring_txq(tx_ring));
176}
177
178/**
179 * ice_free_tx_ring - Free Tx resources per queue
180 * @tx_ring: Tx descriptor ring for a specific queue
181 *
182 * Free all transmit software resources
183 */
184void ice_free_tx_ring(struct ice_ring *tx_ring)
185{
186 ice_clean_tx_ring(tx_ring);
187 devm_kfree(tx_ring->dev, tx_ring->tx_buf);
188 tx_ring->tx_buf = NULL;
189
190 if (tx_ring->desc) {
191 dmam_free_coherent(tx_ring->dev, tx_ring->size,
192 tx_ring->desc, tx_ring->dma);
193 tx_ring->desc = NULL;
194 }
195}
196
197/**
198 * ice_clean_tx_irq - Reclaim resources after transmit completes
199 * @tx_ring: Tx ring to clean
200 * @napi_budget: Used to determine if we are in netpoll
201 *
202 * Returns true if there's any budget left (e.g. the clean is finished)
203 */
204static bool ice_clean_tx_irq(struct ice_ring *tx_ring, int napi_budget)
205{
206 unsigned int total_bytes = 0, total_pkts = 0;
207 unsigned int budget = ICE_DFLT_IRQ_WORK;
208 struct ice_vsi *vsi = tx_ring->vsi;
209 s16 i = tx_ring->next_to_clean;
210 struct ice_tx_desc *tx_desc;
211 struct ice_tx_buf *tx_buf;
212
213 tx_buf = &tx_ring->tx_buf[i];
214 tx_desc = ICE_TX_DESC(tx_ring, i);
215 i -= tx_ring->count;
216
217 prefetch(&vsi->state);
218
219 do {
220 struct ice_tx_desc *eop_desc = tx_buf->next_to_watch;
221
222 /* if next_to_watch is not set then there is no work pending */
223 if (!eop_desc)
224 break;
225
226 smp_rmb(); /* prevent any other reads prior to eop_desc */
227
228 ice_trace(clean_tx_irq, tx_ring, tx_desc, tx_buf);
229 /* if the descriptor isn't done, no work yet to do */
230 if (!(eop_desc->cmd_type_offset_bsz &
231 cpu_to_le64(ICE_TX_DESC_DTYPE_DESC_DONE)))
232 break;
233
234 /* clear next_to_watch to prevent false hangs */
235 tx_buf->next_to_watch = NULL;
236
237 /* update the statistics for this packet */
238 total_bytes += tx_buf->bytecount;
239 total_pkts += tx_buf->gso_segs;
240
241 if (ice_ring_is_xdp(tx_ring))
242 page_frag_free(tx_buf->raw_buf);
243 else
244 /* free the skb */
245 napi_consume_skb(tx_buf->skb, napi_budget);
246
247 /* unmap skb header data */
248 dma_unmap_single(tx_ring->dev,
249 dma_unmap_addr(tx_buf, dma),
250 dma_unmap_len(tx_buf, len),
251 DMA_TO_DEVICE);
252
253 /* clear tx_buf data */
254 tx_buf->skb = NULL;
255 dma_unmap_len_set(tx_buf, len, 0);
256
257 /* unmap remaining buffers */
258 while (tx_desc != eop_desc) {
259 ice_trace(clean_tx_irq_unmap, tx_ring, tx_desc, tx_buf);
260 tx_buf++;
261 tx_desc++;
262 i++;
263 if (unlikely(!i)) {
264 i -= tx_ring->count;
265 tx_buf = tx_ring->tx_buf;
266 tx_desc = ICE_TX_DESC(tx_ring, 0);
267 }
268
269 /* unmap any remaining paged data */
270 if (dma_unmap_len(tx_buf, len)) {
271 dma_unmap_page(tx_ring->dev,
272 dma_unmap_addr(tx_buf, dma),
273 dma_unmap_len(tx_buf, len),
274 DMA_TO_DEVICE);
275 dma_unmap_len_set(tx_buf, len, 0);
276 }
277 }
278 ice_trace(clean_tx_irq_unmap_eop, tx_ring, tx_desc, tx_buf);
279
280 /* move us one more past the eop_desc for start of next pkt */
281 tx_buf++;
282 tx_desc++;
283 i++;
284 if (unlikely(!i)) {
285 i -= tx_ring->count;
286 tx_buf = tx_ring->tx_buf;
287 tx_desc = ICE_TX_DESC(tx_ring, 0);
288 }
289
290 prefetch(tx_desc);
291
292 /* update budget accounting */
293 budget--;
294 } while (likely(budget));
295
296 i += tx_ring->count;
297 tx_ring->next_to_clean = i;
298
299 ice_update_tx_ring_stats(tx_ring, total_pkts, total_bytes);
300
301 if (ice_ring_is_xdp(tx_ring))
302 return !!budget;
303
304 netdev_tx_completed_queue(txring_txq(tx_ring), total_pkts,
305 total_bytes);
306
307#define TX_WAKE_THRESHOLD ((s16)(DESC_NEEDED * 2))
308 if (unlikely(total_pkts && netif_carrier_ok(tx_ring->netdev) &&
309 (ICE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
310 /* Make sure that anybody stopping the queue after this
311 * sees the new next_to_clean.
312 */
313 smp_mb();
314 if (__netif_subqueue_stopped(tx_ring->netdev,
315 tx_ring->q_index) &&
316 !test_bit(ICE_VSI_DOWN, vsi->state)) {
317 netif_wake_subqueue(tx_ring->netdev,
318 tx_ring->q_index);
319 ++tx_ring->tx_stats.restart_q;
320 }
321 }
322
323 return !!budget;
324}
325
326/**
327 * ice_setup_tx_ring - Allocate the Tx descriptors
328 * @tx_ring: the Tx ring to set up
329 *
330 * Return 0 on success, negative on error
331 */
332int ice_setup_tx_ring(struct ice_ring *tx_ring)
333{
334 struct device *dev = tx_ring->dev;
335
336 if (!dev)
337 return -ENOMEM;
338
339 /* warn if we are about to overwrite the pointer */
340 WARN_ON(tx_ring->tx_buf);
341 tx_ring->tx_buf =
342 devm_kzalloc(dev, sizeof(*tx_ring->tx_buf) * tx_ring->count,
343 GFP_KERNEL);
344 if (!tx_ring->tx_buf)
345 return -ENOMEM;
346
347 /* round up to nearest page */
348 tx_ring->size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
349 PAGE_SIZE);
350 tx_ring->desc = dmam_alloc_coherent(dev, tx_ring->size, &tx_ring->dma,
351 GFP_KERNEL);
352 if (!tx_ring->desc) {
353 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring, size=%d\n",
354 tx_ring->size);
355 goto err;
356 }
357
358 tx_ring->next_to_use = 0;
359 tx_ring->next_to_clean = 0;
360 tx_ring->tx_stats.prev_pkt = -1;
361 return 0;
362
363err:
364 devm_kfree(dev, tx_ring->tx_buf);
365 tx_ring->tx_buf = NULL;
366 return -ENOMEM;
367}
368
369/**
370 * ice_clean_rx_ring - Free Rx buffers
371 * @rx_ring: ring to be cleaned
372 */
373void ice_clean_rx_ring(struct ice_ring *rx_ring)
374{
375 struct device *dev = rx_ring->dev;
376 u16 i;
377
378 /* ring already cleared, nothing to do */
379 if (!rx_ring->rx_buf)
380 return;
381
382 if (rx_ring->skb) {
383 dev_kfree_skb(rx_ring->skb);
384 rx_ring->skb = NULL;
385 }
386
387 if (rx_ring->xsk_pool) {
388 ice_xsk_clean_rx_ring(rx_ring);
389 goto rx_skip_free;
390 }
391
392 /* Free all the Rx ring sk_buffs */
393 for (i = 0; i < rx_ring->count; i++) {
394 struct ice_rx_buf *rx_buf = &rx_ring->rx_buf[i];
395
396 if (!rx_buf->page)
397 continue;
398
399 /* Invalidate cache lines that may have been written to by
400 * device so that we avoid corrupting memory.
401 */
402 dma_sync_single_range_for_cpu(dev, rx_buf->dma,
403 rx_buf->page_offset,
404 rx_ring->rx_buf_len,
405 DMA_FROM_DEVICE);
406
407 /* free resources associated with mapping */
408 dma_unmap_page_attrs(dev, rx_buf->dma, ice_rx_pg_size(rx_ring),
409 DMA_FROM_DEVICE, ICE_RX_DMA_ATTR);
410 __page_frag_cache_drain(rx_buf->page, rx_buf->pagecnt_bias);
411
412 rx_buf->page = NULL;
413 rx_buf->page_offset = 0;
414 }
415
416rx_skip_free:
417 memset(rx_ring->rx_buf, 0, sizeof(*rx_ring->rx_buf) * rx_ring->count);
418
419 /* Zero out the descriptor ring */
420 memset(rx_ring->desc, 0, rx_ring->size);
421
422 rx_ring->next_to_alloc = 0;
423 rx_ring->next_to_clean = 0;
424 rx_ring->next_to_use = 0;
425}
426
427/**
428 * ice_free_rx_ring - Free Rx resources
429 * @rx_ring: ring to clean the resources from
430 *
431 * Free all receive software resources
432 */
433void ice_free_rx_ring(struct ice_ring *rx_ring)
434{
435 ice_clean_rx_ring(rx_ring);
436 if (rx_ring->vsi->type == ICE_VSI_PF)
437 if (xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
438 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
439 rx_ring->xdp_prog = NULL;
440 devm_kfree(rx_ring->dev, rx_ring->rx_buf);
441 rx_ring->rx_buf = NULL;
442
443 if (rx_ring->desc) {
444 dmam_free_coherent(rx_ring->dev, rx_ring->size,
445 rx_ring->desc, rx_ring->dma);
446 rx_ring->desc = NULL;
447 }
448}
449
450/**
451 * ice_setup_rx_ring - Allocate the Rx descriptors
452 * @rx_ring: the Rx ring to set up
453 *
454 * Return 0 on success, negative on error
455 */
456int ice_setup_rx_ring(struct ice_ring *rx_ring)
457{
458 struct device *dev = rx_ring->dev;
459
460 if (!dev)
461 return -ENOMEM;
462
463 /* warn if we are about to overwrite the pointer */
464 WARN_ON(rx_ring->rx_buf);
465 rx_ring->rx_buf =
466 devm_kzalloc(dev, sizeof(*rx_ring->rx_buf) * rx_ring->count,
467 GFP_KERNEL);
468 if (!rx_ring->rx_buf)
469 return -ENOMEM;
470
471 /* round up to nearest page */
472 rx_ring->size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
473 PAGE_SIZE);
474 rx_ring->desc = dmam_alloc_coherent(dev, rx_ring->size, &rx_ring->dma,
475 GFP_KERNEL);
476 if (!rx_ring->desc) {
477 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring, size=%d\n",
478 rx_ring->size);
479 goto err;
480 }
481
482 rx_ring->next_to_use = 0;
483 rx_ring->next_to_clean = 0;
484
485 if (ice_is_xdp_ena_vsi(rx_ring->vsi))
486 WRITE_ONCE(rx_ring->xdp_prog, rx_ring->vsi->xdp_prog);
487
488 if (rx_ring->vsi->type == ICE_VSI_PF &&
489 !xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
490 if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev,
491 rx_ring->q_index, rx_ring->q_vector->napi.napi_id))
492 goto err;
493 return 0;
494
495err:
496 devm_kfree(dev, rx_ring->rx_buf);
497 rx_ring->rx_buf = NULL;
498 return -ENOMEM;
499}
500
501static unsigned int
502ice_rx_frame_truesize(struct ice_ring *rx_ring, unsigned int __maybe_unused size)
503{
504 unsigned int truesize;
505
506#if (PAGE_SIZE < 8192)
507 truesize = ice_rx_pg_size(rx_ring) / 2; /* Must be power-of-2 */
508#else
509 truesize = rx_ring->rx_offset ?
510 SKB_DATA_ALIGN(rx_ring->rx_offset + size) +
511 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) :
512 SKB_DATA_ALIGN(size);
513#endif
514 return truesize;
515}
516
517/**
518 * ice_run_xdp - Executes an XDP program on initialized xdp_buff
519 * @rx_ring: Rx ring
520 * @xdp: xdp_buff used as input to the XDP program
521 * @xdp_prog: XDP program to run
522 *
523 * Returns any of ICE_XDP_{PASS, CONSUMED, TX, REDIR}
524 */
525static int
526ice_run_xdp(struct ice_ring *rx_ring, struct xdp_buff *xdp,
527 struct bpf_prog *xdp_prog)
528{
529 struct ice_ring *xdp_ring;
530 int err, result;
531 u32 act;
532
533 act = bpf_prog_run_xdp(xdp_prog, xdp);
534 switch (act) {
535 case XDP_PASS:
536 return ICE_XDP_PASS;
537 case XDP_TX:
538 xdp_ring = rx_ring->vsi->xdp_rings[smp_processor_id()];
539 result = ice_xmit_xdp_buff(xdp, xdp_ring);
540 if (result == ICE_XDP_CONSUMED)
541 goto out_failure;
542 return result;
543 case XDP_REDIRECT:
544 err = xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog);
545 if (err)
546 goto out_failure;
547 return ICE_XDP_REDIR;
548 default:
549 bpf_warn_invalid_xdp_action(act);
550 fallthrough;
551 case XDP_ABORTED:
552out_failure:
553 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
554 fallthrough;
555 case XDP_DROP:
556 return ICE_XDP_CONSUMED;
557 }
558}
559
560/**
561 * ice_xdp_xmit - submit packets to XDP ring for transmission
562 * @dev: netdev
563 * @n: number of XDP frames to be transmitted
564 * @frames: XDP frames to be transmitted
565 * @flags: transmit flags
566 *
567 * Returns number of frames successfully sent. Failed frames
568 * will be free'ed by XDP core.
569 * For error cases, a negative errno code is returned and no-frames
570 * are transmitted (caller must handle freeing frames).
571 */
572int
573ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
574 u32 flags)
575{
576 struct ice_netdev_priv *np = netdev_priv(dev);
577 unsigned int queue_index = smp_processor_id();
578 struct ice_vsi *vsi = np->vsi;
579 struct ice_ring *xdp_ring;
580 int nxmit = 0, i;
581
582 if (test_bit(ICE_VSI_DOWN, vsi->state))
583 return -ENETDOWN;
584
585 if (!ice_is_xdp_ena_vsi(vsi) || queue_index >= vsi->num_xdp_txq)
586 return -ENXIO;
587
588 if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
589 return -EINVAL;
590
591 xdp_ring = vsi->xdp_rings[queue_index];
592 for (i = 0; i < n; i++) {
593 struct xdp_frame *xdpf = frames[i];
594 int err;
595
596 err = ice_xmit_xdp_ring(xdpf->data, xdpf->len, xdp_ring);
597 if (err != ICE_XDP_TX)
598 break;
599 nxmit++;
600 }
601
602 if (unlikely(flags & XDP_XMIT_FLUSH))
603 ice_xdp_ring_update_tail(xdp_ring);
604
605 return nxmit;
606}
607
608/**
609 * ice_alloc_mapped_page - recycle or make a new page
610 * @rx_ring: ring to use
611 * @bi: rx_buf struct to modify
612 *
613 * Returns true if the page was successfully allocated or
614 * reused.
615 */
616static bool
617ice_alloc_mapped_page(struct ice_ring *rx_ring, struct ice_rx_buf *bi)
618{
619 struct page *page = bi->page;
620 dma_addr_t dma;
621
622 /* since we are recycling buffers we should seldom need to alloc */
623 if (likely(page))
624 return true;
625
626 /* alloc new page for storage */
627 page = dev_alloc_pages(ice_rx_pg_order(rx_ring));
628 if (unlikely(!page)) {
629 rx_ring->rx_stats.alloc_page_failed++;
630 return false;
631 }
632
633 /* map page for use */
634 dma = dma_map_page_attrs(rx_ring->dev, page, 0, ice_rx_pg_size(rx_ring),
635 DMA_FROM_DEVICE, ICE_RX_DMA_ATTR);
636
637 /* if mapping failed free memory back to system since
638 * there isn't much point in holding memory we can't use
639 */
640 if (dma_mapping_error(rx_ring->dev, dma)) {
641 __free_pages(page, ice_rx_pg_order(rx_ring));
642 rx_ring->rx_stats.alloc_page_failed++;
643 return false;
644 }
645
646 bi->dma = dma;
647 bi->page = page;
648 bi->page_offset = rx_ring->rx_offset;
649 page_ref_add(page, USHRT_MAX - 1);
650 bi->pagecnt_bias = USHRT_MAX;
651
652 return true;
653}
654
655/**
656 * ice_alloc_rx_bufs - Replace used receive buffers
657 * @rx_ring: ring to place buffers on
658 * @cleaned_count: number of buffers to replace
659 *
660 * Returns false if all allocations were successful, true if any fail. Returning
661 * true signals to the caller that we didn't replace cleaned_count buffers and
662 * there is more work to do.
663 *
664 * First, try to clean "cleaned_count" Rx buffers. Then refill the cleaned Rx
665 * buffers. Then bump tail at most one time. Grouping like this lets us avoid
666 * multiple tail writes per call.
667 */
668bool ice_alloc_rx_bufs(struct ice_ring *rx_ring, u16 cleaned_count)
669{
670 union ice_32b_rx_flex_desc *rx_desc;
671 u16 ntu = rx_ring->next_to_use;
672 struct ice_rx_buf *bi;
673
674 /* do nothing if no valid netdev defined */
675 if ((!rx_ring->netdev && rx_ring->vsi->type != ICE_VSI_CTRL) ||
676 !cleaned_count)
677 return false;
678
679 /* get the Rx descriptor and buffer based on next_to_use */
680 rx_desc = ICE_RX_DESC(rx_ring, ntu);
681 bi = &rx_ring->rx_buf[ntu];
682
683 do {
684 /* if we fail here, we have work remaining */
685 if (!ice_alloc_mapped_page(rx_ring, bi))
686 break;
687
688 /* sync the buffer for use by the device */
689 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
690 bi->page_offset,
691 rx_ring->rx_buf_len,
692 DMA_FROM_DEVICE);
693
694 /* Refresh the desc even if buffer_addrs didn't change
695 * because each write-back erases this info.
696 */
697 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
698
699 rx_desc++;
700 bi++;
701 ntu++;
702 if (unlikely(ntu == rx_ring->count)) {
703 rx_desc = ICE_RX_DESC(rx_ring, 0);
704 bi = rx_ring->rx_buf;
705 ntu = 0;
706 }
707
708 /* clear the status bits for the next_to_use descriptor */
709 rx_desc->wb.status_error0 = 0;
710
711 cleaned_count--;
712 } while (cleaned_count);
713
714 if (rx_ring->next_to_use != ntu)
715 ice_release_rx_desc(rx_ring, ntu);
716
717 return !!cleaned_count;
718}
719
720/**
721 * ice_rx_buf_adjust_pg_offset - Prepare Rx buffer for reuse
722 * @rx_buf: Rx buffer to adjust
723 * @size: Size of adjustment
724 *
725 * Update the offset within page so that Rx buf will be ready to be reused.
726 * For systems with PAGE_SIZE < 8192 this function will flip the page offset
727 * so the second half of page assigned to Rx buffer will be used, otherwise
728 * the offset is moved by "size" bytes
729 */
730static void
731ice_rx_buf_adjust_pg_offset(struct ice_rx_buf *rx_buf, unsigned int size)
732{
733#if (PAGE_SIZE < 8192)
734 /* flip page offset to other buffer */
735 rx_buf->page_offset ^= size;
736#else
737 /* move offset up to the next cache line */
738 rx_buf->page_offset += size;
739#endif
740}
741
742/**
743 * ice_can_reuse_rx_page - Determine if page can be reused for another Rx
744 * @rx_buf: buffer containing the page
745 * @rx_buf_pgcnt: rx_buf page refcount pre xdp_do_redirect() call
746 *
747 * If page is reusable, we have a green light for calling ice_reuse_rx_page,
748 * which will assign the current buffer to the buffer that next_to_alloc is
749 * pointing to; otherwise, the DMA mapping needs to be destroyed and
750 * page freed
751 */
752static bool
753ice_can_reuse_rx_page(struct ice_rx_buf *rx_buf, int rx_buf_pgcnt)
754{
755 unsigned int pagecnt_bias = rx_buf->pagecnt_bias;
756 struct page *page = rx_buf->page;
757
758 /* avoid re-using remote and pfmemalloc pages */
759 if (!dev_page_is_reusable(page))
760 return false;
761
762#if (PAGE_SIZE < 8192)
763 /* if we are only owner of page we can reuse it */
764 if (unlikely((rx_buf_pgcnt - pagecnt_bias) > 1))
765 return false;
766#else
767#define ICE_LAST_OFFSET \
768 (SKB_WITH_OVERHEAD(PAGE_SIZE) - ICE_RXBUF_2048)
769 if (rx_buf->page_offset > ICE_LAST_OFFSET)
770 return false;
771#endif /* PAGE_SIZE < 8192) */
772
773 /* If we have drained the page fragment pool we need to update
774 * the pagecnt_bias and page count so that we fully restock the
775 * number of references the driver holds.
776 */
777 if (unlikely(pagecnt_bias == 1)) {
778 page_ref_add(page, USHRT_MAX - 1);
779 rx_buf->pagecnt_bias = USHRT_MAX;
780 }
781
782 return true;
783}
784
785/**
786 * ice_add_rx_frag - Add contents of Rx buffer to sk_buff as a frag
787 * @rx_ring: Rx descriptor ring to transact packets on
788 * @rx_buf: buffer containing page to add
789 * @skb: sk_buff to place the data into
790 * @size: packet length from rx_desc
791 *
792 * This function will add the data contained in rx_buf->page to the skb.
793 * It will just attach the page as a frag to the skb.
794 * The function will then update the page offset.
795 */
796static void
797ice_add_rx_frag(struct ice_ring *rx_ring, struct ice_rx_buf *rx_buf,
798 struct sk_buff *skb, unsigned int size)
799{
800#if (PAGE_SIZE >= 8192)
801 unsigned int truesize = SKB_DATA_ALIGN(size + rx_ring->rx_offset);
802#else
803 unsigned int truesize = ice_rx_pg_size(rx_ring) / 2;
804#endif
805
806 if (!size)
807 return;
808 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buf->page,
809 rx_buf->page_offset, size, truesize);
810
811 /* page is being used so we must update the page offset */
812 ice_rx_buf_adjust_pg_offset(rx_buf, truesize);
813}
814
815/**
816 * ice_reuse_rx_page - page flip buffer and store it back on the ring
817 * @rx_ring: Rx descriptor ring to store buffers on
818 * @old_buf: donor buffer to have page reused
819 *
820 * Synchronizes page for reuse by the adapter
821 */
822static void
823ice_reuse_rx_page(struct ice_ring *rx_ring, struct ice_rx_buf *old_buf)
824{
825 u16 nta = rx_ring->next_to_alloc;
826 struct ice_rx_buf *new_buf;
827
828 new_buf = &rx_ring->rx_buf[nta];
829
830 /* update, and store next to alloc */
831 nta++;
832 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
833
834 /* Transfer page from old buffer to new buffer.
835 * Move each member individually to avoid possible store
836 * forwarding stalls and unnecessary copy of skb.
837 */
838 new_buf->dma = old_buf->dma;
839 new_buf->page = old_buf->page;
840 new_buf->page_offset = old_buf->page_offset;
841 new_buf->pagecnt_bias = old_buf->pagecnt_bias;
842}
843
844/**
845 * ice_get_rx_buf - Fetch Rx buffer and synchronize data for use
846 * @rx_ring: Rx descriptor ring to transact packets on
847 * @size: size of buffer to add to skb
848 * @rx_buf_pgcnt: rx_buf page refcount
849 *
850 * This function will pull an Rx buffer from the ring and synchronize it
851 * for use by the CPU.
852 */
853static struct ice_rx_buf *
854ice_get_rx_buf(struct ice_ring *rx_ring, const unsigned int size,
855 int *rx_buf_pgcnt)
856{
857 struct ice_rx_buf *rx_buf;
858
859 rx_buf = &rx_ring->rx_buf[rx_ring->next_to_clean];
860 *rx_buf_pgcnt =
861#if (PAGE_SIZE < 8192)
862 page_count(rx_buf->page);
863#else
864 0;
865#endif
866 prefetchw(rx_buf->page);
867
868 if (!size)
869 return rx_buf;
870 /* we are reusing so sync this buffer for CPU use */
871 dma_sync_single_range_for_cpu(rx_ring->dev, rx_buf->dma,
872 rx_buf->page_offset, size,
873 DMA_FROM_DEVICE);
874
875 /* We have pulled a buffer for use, so decrement pagecnt_bias */
876 rx_buf->pagecnt_bias--;
877
878 return rx_buf;
879}
880
881/**
882 * ice_build_skb - Build skb around an existing buffer
883 * @rx_ring: Rx descriptor ring to transact packets on
884 * @rx_buf: Rx buffer to pull data from
885 * @xdp: xdp_buff pointing to the data
886 *
887 * This function builds an skb around an existing Rx buffer, taking care
888 * to set up the skb correctly and avoid any memcpy overhead.
889 */
890static struct sk_buff *
891ice_build_skb(struct ice_ring *rx_ring, struct ice_rx_buf *rx_buf,
892 struct xdp_buff *xdp)
893{
894 u8 metasize = xdp->data - xdp->data_meta;
895#if (PAGE_SIZE < 8192)
896 unsigned int truesize = ice_rx_pg_size(rx_ring) / 2;
897#else
898 unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
899 SKB_DATA_ALIGN(xdp->data_end -
900 xdp->data_hard_start);
901#endif
902 struct sk_buff *skb;
903
904 /* Prefetch first cache line of first page. If xdp->data_meta
905 * is unused, this points exactly as xdp->data, otherwise we
906 * likely have a consumer accessing first few bytes of meta
907 * data, and then actual data.
908 */
909 net_prefetch(xdp->data_meta);
910 /* build an skb around the page buffer */
911 skb = build_skb(xdp->data_hard_start, truesize);
912 if (unlikely(!skb))
913 return NULL;
914
915 /* must to record Rx queue, otherwise OS features such as
916 * symmetric queue won't work
917 */
918 skb_record_rx_queue(skb, rx_ring->q_index);
919
920 /* update pointers within the skb to store the data */
921 skb_reserve(skb, xdp->data - xdp->data_hard_start);
922 __skb_put(skb, xdp->data_end - xdp->data);
923 if (metasize)
924 skb_metadata_set(skb, metasize);
925
926 /* buffer is used by skb, update page_offset */
927 ice_rx_buf_adjust_pg_offset(rx_buf, truesize);
928
929 return skb;
930}
931
932/**
933 * ice_construct_skb - Allocate skb and populate it
934 * @rx_ring: Rx descriptor ring to transact packets on
935 * @rx_buf: Rx buffer to pull data from
936 * @xdp: xdp_buff pointing to the data
937 *
938 * This function allocates an skb. It then populates it with the page
939 * data from the current receive descriptor, taking care to set up the
940 * skb correctly.
941 */
942static struct sk_buff *
943ice_construct_skb(struct ice_ring *rx_ring, struct ice_rx_buf *rx_buf,
944 struct xdp_buff *xdp)
945{
946 unsigned int size = xdp->data_end - xdp->data;
947 unsigned int headlen;
948 struct sk_buff *skb;
949
950 /* prefetch first cache line of first page */
951 net_prefetch(xdp->data);
952
953 /* allocate a skb to store the frags */
954 skb = __napi_alloc_skb(&rx_ring->q_vector->napi, ICE_RX_HDR_SIZE,
955 GFP_ATOMIC | __GFP_NOWARN);
956 if (unlikely(!skb))
957 return NULL;
958
959 skb_record_rx_queue(skb, rx_ring->q_index);
960 /* Determine available headroom for copy */
961 headlen = size;
962 if (headlen > ICE_RX_HDR_SIZE)
963 headlen = eth_get_headlen(skb->dev, xdp->data, ICE_RX_HDR_SIZE);
964
965 /* align pull length to size of long to optimize memcpy performance */
966 memcpy(__skb_put(skb, headlen), xdp->data, ALIGN(headlen,
967 sizeof(long)));
968
969 /* if we exhaust the linear part then add what is left as a frag */
970 size -= headlen;
971 if (size) {
972#if (PAGE_SIZE >= 8192)
973 unsigned int truesize = SKB_DATA_ALIGN(size);
974#else
975 unsigned int truesize = ice_rx_pg_size(rx_ring) / 2;
976#endif
977 skb_add_rx_frag(skb, 0, rx_buf->page,
978 rx_buf->page_offset + headlen, size, truesize);
979 /* buffer is used by skb, update page_offset */
980 ice_rx_buf_adjust_pg_offset(rx_buf, truesize);
981 } else {
982 /* buffer is unused, reset bias back to rx_buf; data was copied
983 * onto skb's linear part so there's no need for adjusting
984 * page offset and we can reuse this buffer as-is
985 */
986 rx_buf->pagecnt_bias++;
987 }
988
989 return skb;
990}
991
992/**
993 * ice_put_rx_buf - Clean up used buffer and either recycle or free
994 * @rx_ring: Rx descriptor ring to transact packets on
995 * @rx_buf: Rx buffer to pull data from
996 * @rx_buf_pgcnt: Rx buffer page count pre xdp_do_redirect()
997 *
998 * This function will update next_to_clean and then clean up the contents
999 * of the rx_buf. It will either recycle the buffer or unmap it and free
1000 * the associated resources.
1001 */
1002static void
1003ice_put_rx_buf(struct ice_ring *rx_ring, struct ice_rx_buf *rx_buf,
1004 int rx_buf_pgcnt)
1005{
1006 u16 ntc = rx_ring->next_to_clean + 1;
1007
1008 /* fetch, update, and store next to clean */
1009 ntc = (ntc < rx_ring->count) ? ntc : 0;
1010 rx_ring->next_to_clean = ntc;
1011
1012 if (!rx_buf)
1013 return;
1014
1015 if (ice_can_reuse_rx_page(rx_buf, rx_buf_pgcnt)) {
1016 /* hand second half of page back to the ring */
1017 ice_reuse_rx_page(rx_ring, rx_buf);
1018 } else {
1019 /* we are not reusing the buffer so unmap it */
1020 dma_unmap_page_attrs(rx_ring->dev, rx_buf->dma,
1021 ice_rx_pg_size(rx_ring), DMA_FROM_DEVICE,
1022 ICE_RX_DMA_ATTR);
1023 __page_frag_cache_drain(rx_buf->page, rx_buf->pagecnt_bias);
1024 }
1025
1026 /* clear contents of buffer_info */
1027 rx_buf->page = NULL;
1028}
1029
1030/**
1031 * ice_is_non_eop - process handling of non-EOP buffers
1032 * @rx_ring: Rx ring being processed
1033 * @rx_desc: Rx descriptor for current buffer
1034 *
1035 * If the buffer is an EOP buffer, this function exits returning false,
1036 * otherwise return true indicating that this is in fact a non-EOP buffer.
1037 */
1038static bool
1039ice_is_non_eop(struct ice_ring *rx_ring, union ice_32b_rx_flex_desc *rx_desc)
1040{
1041 /* if we are the last buffer then there is nothing else to do */
1042#define ICE_RXD_EOF BIT(ICE_RX_FLEX_DESC_STATUS0_EOF_S)
1043 if (likely(ice_test_staterr(rx_desc, ICE_RXD_EOF)))
1044 return false;
1045
1046 rx_ring->rx_stats.non_eop_descs++;
1047
1048 return true;
1049}
1050
1051/**
1052 * ice_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
1053 * @rx_ring: Rx descriptor ring to transact packets on
1054 * @budget: Total limit on number of packets to process
1055 *
1056 * This function provides a "bounce buffer" approach to Rx interrupt
1057 * processing. The advantage to this is that on systems that have
1058 * expensive overhead for IOMMU access this provides a means of avoiding
1059 * it by maintaining the mapping of the page to the system.
1060 *
1061 * Returns amount of work completed
1062 */
1063int ice_clean_rx_irq(struct ice_ring *rx_ring, int budget)
1064{
1065 unsigned int total_rx_bytes = 0, total_rx_pkts = 0, frame_sz = 0;
1066 u16 cleaned_count = ICE_DESC_UNUSED(rx_ring);
1067 unsigned int offset = rx_ring->rx_offset;
1068 unsigned int xdp_res, xdp_xmit = 0;
1069 struct sk_buff *skb = rx_ring->skb;
1070 struct bpf_prog *xdp_prog = NULL;
1071 struct xdp_buff xdp;
1072 bool failure;
1073
1074 /* Frame size depend on rx_ring setup when PAGE_SIZE=4K */
1075#if (PAGE_SIZE < 8192)
1076 frame_sz = ice_rx_frame_truesize(rx_ring, 0);
1077#endif
1078 xdp_init_buff(&xdp, frame_sz, &rx_ring->xdp_rxq);
1079
1080 /* start the loop to process Rx packets bounded by 'budget' */
1081 while (likely(total_rx_pkts < (unsigned int)budget)) {
1082 union ice_32b_rx_flex_desc *rx_desc;
1083 struct ice_rx_buf *rx_buf;
1084 unsigned char *hard_start;
1085 unsigned int size;
1086 u16 stat_err_bits;
1087 int rx_buf_pgcnt;
1088 u16 vlan_tag = 0;
1089 u16 rx_ptype;
1090
1091 /* get the Rx desc from Rx ring based on 'next_to_clean' */
1092 rx_desc = ICE_RX_DESC(rx_ring, rx_ring->next_to_clean);
1093
1094 /* status_error_len will always be zero for unused descriptors
1095 * because it's cleared in cleanup, and overlaps with hdr_addr
1096 * which is always zero because packet split isn't used, if the
1097 * hardware wrote DD then it will be non-zero
1098 */
1099 stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_DD_S);
1100 if (!ice_test_staterr(rx_desc, stat_err_bits))
1101 break;
1102
1103 /* This memory barrier is needed to keep us from reading
1104 * any other fields out of the rx_desc until we know the
1105 * DD bit is set.
1106 */
1107 dma_rmb();
1108
1109 ice_trace(clean_rx_irq, rx_ring, rx_desc);
1110 if (rx_desc->wb.rxdid == FDIR_DESC_RXDID || !rx_ring->netdev) {
1111 struct ice_vsi *ctrl_vsi = rx_ring->vsi;
1112
1113 if (rx_desc->wb.rxdid == FDIR_DESC_RXDID &&
1114 ctrl_vsi->vf_id != ICE_INVAL_VFID)
1115 ice_vc_fdir_irq_handler(ctrl_vsi, rx_desc);
1116 ice_put_rx_buf(rx_ring, NULL, 0);
1117 cleaned_count++;
1118 continue;
1119 }
1120
1121 size = le16_to_cpu(rx_desc->wb.pkt_len) &
1122 ICE_RX_FLX_DESC_PKT_LEN_M;
1123
1124 /* retrieve a buffer from the ring */
1125 rx_buf = ice_get_rx_buf(rx_ring, size, &rx_buf_pgcnt);
1126
1127 if (!size) {
1128 xdp.data = NULL;
1129 xdp.data_end = NULL;
1130 xdp.data_hard_start = NULL;
1131 xdp.data_meta = NULL;
1132 goto construct_skb;
1133 }
1134
1135 hard_start = page_address(rx_buf->page) + rx_buf->page_offset -
1136 offset;
1137 xdp_prepare_buff(&xdp, hard_start, offset, size, true);
1138#if (PAGE_SIZE > 4096)
1139 /* At larger PAGE_SIZE, frame_sz depend on len size */
1140 xdp.frame_sz = ice_rx_frame_truesize(rx_ring, size);
1141#endif
1142
1143 xdp_prog = READ_ONCE(rx_ring->xdp_prog);
1144 if (!xdp_prog)
1145 goto construct_skb;
1146
1147 xdp_res = ice_run_xdp(rx_ring, &xdp, xdp_prog);
1148 if (!xdp_res)
1149 goto construct_skb;
1150 if (xdp_res & (ICE_XDP_TX | ICE_XDP_REDIR)) {
1151 xdp_xmit |= xdp_res;
1152 ice_rx_buf_adjust_pg_offset(rx_buf, xdp.frame_sz);
1153 } else {
1154 rx_buf->pagecnt_bias++;
1155 }
1156 total_rx_bytes += size;
1157 total_rx_pkts++;
1158
1159 cleaned_count++;
1160 ice_put_rx_buf(rx_ring, rx_buf, rx_buf_pgcnt);
1161 continue;
1162construct_skb:
1163 if (skb) {
1164 ice_add_rx_frag(rx_ring, rx_buf, skb, size);
1165 } else if (likely(xdp.data)) {
1166 if (ice_ring_uses_build_skb(rx_ring))
1167 skb = ice_build_skb(rx_ring, rx_buf, &xdp);
1168 else
1169 skb = ice_construct_skb(rx_ring, rx_buf, &xdp);
1170 }
1171 /* exit if we failed to retrieve a buffer */
1172 if (!skb) {
1173 rx_ring->rx_stats.alloc_buf_failed++;
1174 if (rx_buf)
1175 rx_buf->pagecnt_bias++;
1176 break;
1177 }
1178
1179 ice_put_rx_buf(rx_ring, rx_buf, rx_buf_pgcnt);
1180 cleaned_count++;
1181
1182 /* skip if it is NOP desc */
1183 if (ice_is_non_eop(rx_ring, rx_desc))
1184 continue;
1185
1186 stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_RXE_S);
1187 if (unlikely(ice_test_staterr(rx_desc, stat_err_bits))) {
1188 dev_kfree_skb_any(skb);
1189 continue;
1190 }
1191
1192 stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_L2TAG1P_S);
1193 if (ice_test_staterr(rx_desc, stat_err_bits))
1194 vlan_tag = le16_to_cpu(rx_desc->wb.l2tag1);
1195
1196 /* pad the skb if needed, to make a valid ethernet frame */
1197 if (eth_skb_pad(skb)) {
1198 skb = NULL;
1199 continue;
1200 }
1201
1202 /* probably a little skewed due to removing CRC */
1203 total_rx_bytes += skb->len;
1204
1205 /* populate checksum, VLAN, and protocol */
1206 rx_ptype = le16_to_cpu(rx_desc->wb.ptype_flex_flags0) &
1207 ICE_RX_FLEX_DESC_PTYPE_M;
1208
1209 ice_process_skb_fields(rx_ring, rx_desc, skb, rx_ptype);
1210
1211 ice_trace(clean_rx_irq_indicate, rx_ring, rx_desc, skb);
1212 /* send completed skb up the stack */
1213 ice_receive_skb(rx_ring, skb, vlan_tag);
1214 skb = NULL;
1215
1216 /* update budget accounting */
1217 total_rx_pkts++;
1218 }
1219
1220 /* return up to cleaned_count buffers to hardware */
1221 failure = ice_alloc_rx_bufs(rx_ring, cleaned_count);
1222
1223 if (xdp_prog)
1224 ice_finalize_xdp_rx(rx_ring, xdp_xmit);
1225 rx_ring->skb = skb;
1226
1227 ice_update_rx_ring_stats(rx_ring, total_rx_pkts, total_rx_bytes);
1228
1229 /* guarantee a trip back through this routine if there was a failure */
1230 return failure ? budget : (int)total_rx_pkts;
1231}
1232
1233/**
1234 * ice_net_dim - Update net DIM algorithm
1235 * @q_vector: the vector associated with the interrupt
1236 *
1237 * Create a DIM sample and notify net_dim() so that it can possibly decide
1238 * a new ITR value based on incoming packets, bytes, and interrupts.
1239 *
1240 * This function is a no-op if the ring is not configured to dynamic ITR.
1241 */
1242static void ice_net_dim(struct ice_q_vector *q_vector)
1243{
1244 struct ice_ring_container *tx = &q_vector->tx;
1245 struct ice_ring_container *rx = &q_vector->rx;
1246
1247 if (ITR_IS_DYNAMIC(tx)) {
1248 struct dim_sample dim_sample = {};
1249 u64 packets = 0, bytes = 0;
1250 struct ice_ring *ring;
1251
1252 ice_for_each_ring(ring, q_vector->tx) {
1253 packets += ring->stats.pkts;
1254 bytes += ring->stats.bytes;
1255 }
1256
1257 dim_update_sample(q_vector->total_events, packets, bytes,
1258 &dim_sample);
1259
1260 net_dim(&tx->dim, dim_sample);
1261 }
1262
1263 if (ITR_IS_DYNAMIC(rx)) {
1264 struct dim_sample dim_sample = {};
1265 u64 packets = 0, bytes = 0;
1266 struct ice_ring *ring;
1267
1268 ice_for_each_ring(ring, q_vector->rx) {
1269 packets += ring->stats.pkts;
1270 bytes += ring->stats.bytes;
1271 }
1272
1273 dim_update_sample(q_vector->total_events, packets, bytes,
1274 &dim_sample);
1275
1276 net_dim(&rx->dim, dim_sample);
1277 }
1278}
1279
1280/**
1281 * ice_buildreg_itr - build value for writing to the GLINT_DYN_CTL register
1282 * @itr_idx: interrupt throttling index
1283 * @itr: interrupt throttling value in usecs
1284 */
1285static u32 ice_buildreg_itr(u16 itr_idx, u16 itr)
1286{
1287 /* The ITR value is reported in microseconds, and the register value is
1288 * recorded in 2 microsecond units. For this reason we only need to
1289 * shift by the GLINT_DYN_CTL_INTERVAL_S - ICE_ITR_GRAN_S to apply this
1290 * granularity as a shift instead of division. The mask makes sure the
1291 * ITR value is never odd so we don't accidentally write into the field
1292 * prior to the ITR field.
1293 */
1294 itr &= ICE_ITR_MASK;
1295
1296 return GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
1297 (itr_idx << GLINT_DYN_CTL_ITR_INDX_S) |
1298 (itr << (GLINT_DYN_CTL_INTERVAL_S - ICE_ITR_GRAN_S));
1299}
1300
1301/**
1302 * ice_update_ena_itr - Update ITR moderation and re-enable MSI-X interrupt
1303 * @q_vector: the vector associated with the interrupt to enable
1304 *
1305 * Update the net_dim() algorithm and re-enable the interrupt associated with
1306 * this vector.
1307 *
1308 * If the VSI is down, the interrupt will not be re-enabled.
1309 */
1310static void ice_update_ena_itr(struct ice_q_vector *q_vector)
1311{
1312 struct ice_vsi *vsi = q_vector->vsi;
1313 bool wb_en = q_vector->wb_on_itr;
1314 u32 itr_val;
1315
1316 if (test_bit(ICE_DOWN, vsi->state))
1317 return;
1318
1319 /* When exiting WB_ON_ITR, let ITR resume its normal
1320 * interrupts-enabled path.
1321 */
1322 if (wb_en)
1323 q_vector->wb_on_itr = false;
1324
1325 /* This will do nothing if dynamic updates are not enabled. */
1326 ice_net_dim(q_vector);
1327
1328 /* net_dim() updates ITR out-of-band using a work item */
1329 itr_val = ice_buildreg_itr(ICE_ITR_NONE, 0);
1330 /* trigger an immediate software interrupt when exiting
1331 * busy poll, to make sure to catch any pending cleanups
1332 * that might have been missed due to interrupt state
1333 * transition.
1334 */
1335 if (wb_en) {
1336 itr_val |= GLINT_DYN_CTL_SWINT_TRIG_M |
1337 GLINT_DYN_CTL_SW_ITR_INDX_M |
1338 GLINT_DYN_CTL_SW_ITR_INDX_ENA_M;
1339 }
1340 wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx), itr_val);
1341}
1342
1343/**
1344 * ice_set_wb_on_itr - set WB_ON_ITR for this q_vector
1345 * @q_vector: q_vector to set WB_ON_ITR on
1346 *
1347 * We need to tell hardware to write-back completed descriptors even when
1348 * interrupts are disabled. Descriptors will be written back on cache line
1349 * boundaries without WB_ON_ITR enabled, but if we don't enable WB_ON_ITR
1350 * descriptors may not be written back if they don't fill a cache line until
1351 * the next interrupt.
1352 *
1353 * This sets the write-back frequency to whatever was set previously for the
1354 * ITR indices. Also, set the INTENA_MSK bit to make sure hardware knows we
1355 * aren't meddling with the INTENA_M bit.
1356 */
1357static void ice_set_wb_on_itr(struct ice_q_vector *q_vector)
1358{
1359 struct ice_vsi *vsi = q_vector->vsi;
1360
1361 /* already in wb_on_itr mode no need to change it */
1362 if (q_vector->wb_on_itr)
1363 return;
1364
1365 /* use previously set ITR values for all of the ITR indices by
1366 * specifying ICE_ITR_NONE, which will vary in adaptive (AIM) mode and
1367 * be static in non-adaptive mode (user configured)
1368 */
1369 wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx),
1370 ((ICE_ITR_NONE << GLINT_DYN_CTL_ITR_INDX_S) &
1371 GLINT_DYN_CTL_ITR_INDX_M) | GLINT_DYN_CTL_INTENA_MSK_M |
1372 GLINT_DYN_CTL_WB_ON_ITR_M);
1373
1374 q_vector->wb_on_itr = true;
1375}
1376
1377/**
1378 * ice_napi_poll - NAPI polling Rx/Tx cleanup routine
1379 * @napi: napi struct with our devices info in it
1380 * @budget: amount of work driver is allowed to do this pass, in packets
1381 *
1382 * This function will clean all queues associated with a q_vector.
1383 *
1384 * Returns the amount of work done
1385 */
1386int ice_napi_poll(struct napi_struct *napi, int budget)
1387{
1388 struct ice_q_vector *q_vector =
1389 container_of(napi, struct ice_q_vector, napi);
1390 bool clean_complete = true;
1391 struct ice_ring *ring;
1392 int budget_per_ring;
1393 int work_done = 0;
1394
1395 /* Since the actual Tx work is minimal, we can give the Tx a larger
1396 * budget and be more aggressive about cleaning up the Tx descriptors.
1397 */
1398 ice_for_each_ring(ring, q_vector->tx) {
1399 bool wd = ring->xsk_pool ?
1400 ice_clean_tx_irq_zc(ring, budget) :
1401 ice_clean_tx_irq(ring, budget);
1402
1403 if (!wd)
1404 clean_complete = false;
1405 }
1406
1407 /* Handle case where we are called by netpoll with a budget of 0 */
1408 if (unlikely(budget <= 0))
1409 return budget;
1410
1411 /* normally we have 1 Rx ring per q_vector */
1412 if (unlikely(q_vector->num_ring_rx > 1))
1413 /* We attempt to distribute budget to each Rx queue fairly, but
1414 * don't allow the budget to go below 1 because that would exit
1415 * polling early.
1416 */
1417 budget_per_ring = max_t(int, budget / q_vector->num_ring_rx, 1);
1418 else
1419 /* Max of 1 Rx ring in this q_vector so give it the budget */
1420 budget_per_ring = budget;
1421
1422 ice_for_each_ring(ring, q_vector->rx) {
1423 int cleaned;
1424
1425 /* A dedicated path for zero-copy allows making a single
1426 * comparison in the irq context instead of many inside the
1427 * ice_clean_rx_irq function and makes the codebase cleaner.
1428 */
1429 cleaned = ring->xsk_pool ?
1430 ice_clean_rx_irq_zc(ring, budget_per_ring) :
1431 ice_clean_rx_irq(ring, budget_per_ring);
1432 work_done += cleaned;
1433 /* if we clean as many as budgeted, we must not be done */
1434 if (cleaned >= budget_per_ring)
1435 clean_complete = false;
1436 }
1437
1438 /* If work not completed, return budget and polling will return */
1439 if (!clean_complete) {
1440 /* Set the writeback on ITR so partial completions of
1441 * cache-lines will still continue even if we're polling.
1442 */
1443 ice_set_wb_on_itr(q_vector);
1444 return budget;
1445 }
1446
1447 /* Exit the polling mode, but don't re-enable interrupts if stack might
1448 * poll us due to busy-polling
1449 */
1450 if (likely(napi_complete_done(napi, work_done)))
1451 ice_update_ena_itr(q_vector);
1452 else
1453 ice_set_wb_on_itr(q_vector);
1454
1455 return min_t(int, work_done, budget - 1);
1456}
1457
1458/**
1459 * __ice_maybe_stop_tx - 2nd level check for Tx stop conditions
1460 * @tx_ring: the ring to be checked
1461 * @size: the size buffer we want to assure is available
1462 *
1463 * Returns -EBUSY if a stop is needed, else 0
1464 */
1465static int __ice_maybe_stop_tx(struct ice_ring *tx_ring, unsigned int size)
1466{
1467 netif_stop_subqueue(tx_ring->netdev, tx_ring->q_index);
1468 /* Memory barrier before checking head and tail */
1469 smp_mb();
1470
1471 /* Check again in a case another CPU has just made room available. */
1472 if (likely(ICE_DESC_UNUSED(tx_ring) < size))
1473 return -EBUSY;
1474
1475 /* A reprieve! - use start_subqueue because it doesn't call schedule */
1476 netif_start_subqueue(tx_ring->netdev, tx_ring->q_index);
1477 ++tx_ring->tx_stats.restart_q;
1478 return 0;
1479}
1480
1481/**
1482 * ice_maybe_stop_tx - 1st level check for Tx stop conditions
1483 * @tx_ring: the ring to be checked
1484 * @size: the size buffer we want to assure is available
1485 *
1486 * Returns 0 if stop is not needed
1487 */
1488static int ice_maybe_stop_tx(struct ice_ring *tx_ring, unsigned int size)
1489{
1490 if (likely(ICE_DESC_UNUSED(tx_ring) >= size))
1491 return 0;
1492
1493 return __ice_maybe_stop_tx(tx_ring, size);
1494}
1495
1496/**
1497 * ice_tx_map - Build the Tx descriptor
1498 * @tx_ring: ring to send buffer on
1499 * @first: first buffer info buffer to use
1500 * @off: pointer to struct that holds offload parameters
1501 *
1502 * This function loops over the skb data pointed to by *first
1503 * and gets a physical address for each memory location and programs
1504 * it and the length into the transmit descriptor.
1505 */
1506static void
1507ice_tx_map(struct ice_ring *tx_ring, struct ice_tx_buf *first,
1508 struct ice_tx_offload_params *off)
1509{
1510 u64 td_offset, td_tag, td_cmd;
1511 u16 i = tx_ring->next_to_use;
1512 unsigned int data_len, size;
1513 struct ice_tx_desc *tx_desc;
1514 struct ice_tx_buf *tx_buf;
1515 struct sk_buff *skb;
1516 skb_frag_t *frag;
1517 dma_addr_t dma;
1518
1519 td_tag = off->td_l2tag1;
1520 td_cmd = off->td_cmd;
1521 td_offset = off->td_offset;
1522 skb = first->skb;
1523
1524 data_len = skb->data_len;
1525 size = skb_headlen(skb);
1526
1527 tx_desc = ICE_TX_DESC(tx_ring, i);
1528
1529 if (first->tx_flags & ICE_TX_FLAGS_HW_VLAN) {
1530 td_cmd |= (u64)ICE_TX_DESC_CMD_IL2TAG1;
1531 td_tag = (first->tx_flags & ICE_TX_FLAGS_VLAN_M) >>
1532 ICE_TX_FLAGS_VLAN_S;
1533 }
1534
1535 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
1536
1537 tx_buf = first;
1538
1539 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
1540 unsigned int max_data = ICE_MAX_DATA_PER_TXD_ALIGNED;
1541
1542 if (dma_mapping_error(tx_ring->dev, dma))
1543 goto dma_error;
1544
1545 /* record length, and DMA address */
1546 dma_unmap_len_set(tx_buf, len, size);
1547 dma_unmap_addr_set(tx_buf, dma, dma);
1548
1549 /* align size to end of page */
1550 max_data += -dma & (ICE_MAX_READ_REQ_SIZE - 1);
1551 tx_desc->buf_addr = cpu_to_le64(dma);
1552
1553 /* account for data chunks larger than the hardware
1554 * can handle
1555 */
1556 while (unlikely(size > ICE_MAX_DATA_PER_TXD)) {
1557 tx_desc->cmd_type_offset_bsz =
1558 ice_build_ctob(td_cmd, td_offset, max_data,
1559 td_tag);
1560
1561 tx_desc++;
1562 i++;
1563
1564 if (i == tx_ring->count) {
1565 tx_desc = ICE_TX_DESC(tx_ring, 0);
1566 i = 0;
1567 }
1568
1569 dma += max_data;
1570 size -= max_data;
1571
1572 max_data = ICE_MAX_DATA_PER_TXD_ALIGNED;
1573 tx_desc->buf_addr = cpu_to_le64(dma);
1574 }
1575
1576 if (likely(!data_len))
1577 break;
1578
1579 tx_desc->cmd_type_offset_bsz = ice_build_ctob(td_cmd, td_offset,
1580 size, td_tag);
1581
1582 tx_desc++;
1583 i++;
1584
1585 if (i == tx_ring->count) {
1586 tx_desc = ICE_TX_DESC(tx_ring, 0);
1587 i = 0;
1588 }
1589
1590 size = skb_frag_size(frag);
1591 data_len -= size;
1592
1593 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
1594 DMA_TO_DEVICE);
1595
1596 tx_buf = &tx_ring->tx_buf[i];
1597 }
1598
1599 /* record bytecount for BQL */
1600 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
1601
1602 /* record SW timestamp if HW timestamp is not available */
1603 skb_tx_timestamp(first->skb);
1604
1605 i++;
1606 if (i == tx_ring->count)
1607 i = 0;
1608
1609 /* write last descriptor with RS and EOP bits */
1610 td_cmd |= (u64)ICE_TXD_LAST_DESC_CMD;
1611 tx_desc->cmd_type_offset_bsz =
1612 ice_build_ctob(td_cmd, td_offset, size, td_tag);
1613
1614 /* Force memory writes to complete before letting h/w know there
1615 * are new descriptors to fetch.
1616 *
1617 * We also use this memory barrier to make certain all of the
1618 * status bits have been updated before next_to_watch is written.
1619 */
1620 wmb();
1621
1622 /* set next_to_watch value indicating a packet is present */
1623 first->next_to_watch = tx_desc;
1624
1625 tx_ring->next_to_use = i;
1626
1627 ice_maybe_stop_tx(tx_ring, DESC_NEEDED);
1628
1629 /* notify HW of packet */
1630 if (netif_xmit_stopped(txring_txq(tx_ring)) || !netdev_xmit_more())
1631 writel(i, tx_ring->tail);
1632
1633 return;
1634
1635dma_error:
1636 /* clear DMA mappings for failed tx_buf map */
1637 for (;;) {
1638 tx_buf = &tx_ring->tx_buf[i];
1639 ice_unmap_and_free_tx_buf(tx_ring, tx_buf);
1640 if (tx_buf == first)
1641 break;
1642 if (i == 0)
1643 i = tx_ring->count;
1644 i--;
1645 }
1646
1647 tx_ring->next_to_use = i;
1648}
1649
1650/**
1651 * ice_tx_csum - Enable Tx checksum offloads
1652 * @first: pointer to the first descriptor
1653 * @off: pointer to struct that holds offload parameters
1654 *
1655 * Returns 0 or error (negative) if checksum offload can't happen, 1 otherwise.
1656 */
1657static
1658int ice_tx_csum(struct ice_tx_buf *first, struct ice_tx_offload_params *off)
1659{
1660 u32 l4_len = 0, l3_len = 0, l2_len = 0;
1661 struct sk_buff *skb = first->skb;
1662 union {
1663 struct iphdr *v4;
1664 struct ipv6hdr *v6;
1665 unsigned char *hdr;
1666 } ip;
1667 union {
1668 struct tcphdr *tcp;
1669 unsigned char *hdr;
1670 } l4;
1671 __be16 frag_off, protocol;
1672 unsigned char *exthdr;
1673 u32 offset, cmd = 0;
1674 u8 l4_proto = 0;
1675
1676 if (skb->ip_summed != CHECKSUM_PARTIAL)
1677 return 0;
1678
1679 ip.hdr = skb_network_header(skb);
1680 l4.hdr = skb_transport_header(skb);
1681
1682 /* compute outer L2 header size */
1683 l2_len = ip.hdr - skb->data;
1684 offset = (l2_len / 2) << ICE_TX_DESC_LEN_MACLEN_S;
1685
1686 protocol = vlan_get_protocol(skb);
1687
1688 if (protocol == htons(ETH_P_IP))
1689 first->tx_flags |= ICE_TX_FLAGS_IPV4;
1690 else if (protocol == htons(ETH_P_IPV6))
1691 first->tx_flags |= ICE_TX_FLAGS_IPV6;
1692
1693 if (skb->encapsulation) {
1694 bool gso_ena = false;
1695 u32 tunnel = 0;
1696
1697 /* define outer network header type */
1698 if (first->tx_flags & ICE_TX_FLAGS_IPV4) {
1699 tunnel |= (first->tx_flags & ICE_TX_FLAGS_TSO) ?
1700 ICE_TX_CTX_EIPT_IPV4 :
1701 ICE_TX_CTX_EIPT_IPV4_NO_CSUM;
1702 l4_proto = ip.v4->protocol;
1703 } else if (first->tx_flags & ICE_TX_FLAGS_IPV6) {
1704 int ret;
1705
1706 tunnel |= ICE_TX_CTX_EIPT_IPV6;
1707 exthdr = ip.hdr + sizeof(*ip.v6);
1708 l4_proto = ip.v6->nexthdr;
1709 ret = ipv6_skip_exthdr(skb, exthdr - skb->data,
1710 &l4_proto, &frag_off);
1711 if (ret < 0)
1712 return -1;
1713 }
1714
1715 /* define outer transport */
1716 switch (l4_proto) {
1717 case IPPROTO_UDP:
1718 tunnel |= ICE_TXD_CTX_UDP_TUNNELING;
1719 first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1720 break;
1721 case IPPROTO_GRE:
1722 tunnel |= ICE_TXD_CTX_GRE_TUNNELING;
1723 first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1724 break;
1725 case IPPROTO_IPIP:
1726 case IPPROTO_IPV6:
1727 first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1728 l4.hdr = skb_inner_network_header(skb);
1729 break;
1730 default:
1731 if (first->tx_flags & ICE_TX_FLAGS_TSO)
1732 return -1;
1733
1734 skb_checksum_help(skb);
1735 return 0;
1736 }
1737
1738 /* compute outer L3 header size */
1739 tunnel |= ((l4.hdr - ip.hdr) / 4) <<
1740 ICE_TXD_CTX_QW0_EIPLEN_S;
1741
1742 /* switch IP header pointer from outer to inner header */
1743 ip.hdr = skb_inner_network_header(skb);
1744
1745 /* compute tunnel header size */
1746 tunnel |= ((ip.hdr - l4.hdr) / 2) <<
1747 ICE_TXD_CTX_QW0_NATLEN_S;
1748
1749 gso_ena = skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL;
1750 /* indicate if we need to offload outer UDP header */
1751 if ((first->tx_flags & ICE_TX_FLAGS_TSO) && !gso_ena &&
1752 (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_TUNNEL_CSUM))
1753 tunnel |= ICE_TXD_CTX_QW0_L4T_CS_M;
1754
1755 /* record tunnel offload values */
1756 off->cd_tunnel_params |= tunnel;
1757
1758 /* set DTYP=1 to indicate that it's an Tx context descriptor
1759 * in IPsec tunnel mode with Tx offloads in Quad word 1
1760 */
1761 off->cd_qw1 |= (u64)ICE_TX_DESC_DTYPE_CTX;
1762
1763 /* switch L4 header pointer from outer to inner */
1764 l4.hdr = skb_inner_transport_header(skb);
1765 l4_proto = 0;
1766
1767 /* reset type as we transition from outer to inner headers */
1768 first->tx_flags &= ~(ICE_TX_FLAGS_IPV4 | ICE_TX_FLAGS_IPV6);
1769 if (ip.v4->version == 4)
1770 first->tx_flags |= ICE_TX_FLAGS_IPV4;
1771 if (ip.v6->version == 6)
1772 first->tx_flags |= ICE_TX_FLAGS_IPV6;
1773 }
1774
1775 /* Enable IP checksum offloads */
1776 if (first->tx_flags & ICE_TX_FLAGS_IPV4) {
1777 l4_proto = ip.v4->protocol;
1778 /* the stack computes the IP header already, the only time we
1779 * need the hardware to recompute it is in the case of TSO.
1780 */
1781 if (first->tx_flags & ICE_TX_FLAGS_TSO)
1782 cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM;
1783 else
1784 cmd |= ICE_TX_DESC_CMD_IIPT_IPV4;
1785
1786 } else if (first->tx_flags & ICE_TX_FLAGS_IPV6) {
1787 cmd |= ICE_TX_DESC_CMD_IIPT_IPV6;
1788 exthdr = ip.hdr + sizeof(*ip.v6);
1789 l4_proto = ip.v6->nexthdr;
1790 if (l4.hdr != exthdr)
1791 ipv6_skip_exthdr(skb, exthdr - skb->data, &l4_proto,
1792 &frag_off);
1793 } else {
1794 return -1;
1795 }
1796
1797 /* compute inner L3 header size */
1798 l3_len = l4.hdr - ip.hdr;
1799 offset |= (l3_len / 4) << ICE_TX_DESC_LEN_IPLEN_S;
1800
1801 /* Enable L4 checksum offloads */
1802 switch (l4_proto) {
1803 case IPPROTO_TCP:
1804 /* enable checksum offloads */
1805 cmd |= ICE_TX_DESC_CMD_L4T_EOFT_TCP;
1806 l4_len = l4.tcp->doff;
1807 offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1808 break;
1809 case IPPROTO_UDP:
1810 /* enable UDP checksum offload */
1811 cmd |= ICE_TX_DESC_CMD_L4T_EOFT_UDP;
1812 l4_len = (sizeof(struct udphdr) >> 2);
1813 offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1814 break;
1815 case IPPROTO_SCTP:
1816 /* enable SCTP checksum offload */
1817 cmd |= ICE_TX_DESC_CMD_L4T_EOFT_SCTP;
1818 l4_len = sizeof(struct sctphdr) >> 2;
1819 offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1820 break;
1821
1822 default:
1823 if (first->tx_flags & ICE_TX_FLAGS_TSO)
1824 return -1;
1825 skb_checksum_help(skb);
1826 return 0;
1827 }
1828
1829 off->td_cmd |= cmd;
1830 off->td_offset |= offset;
1831 return 1;
1832}
1833
1834/**
1835 * ice_tx_prepare_vlan_flags - prepare generic Tx VLAN tagging flags for HW
1836 * @tx_ring: ring to send buffer on
1837 * @first: pointer to struct ice_tx_buf
1838 *
1839 * Checks the skb and set up correspondingly several generic transmit flags
1840 * related to VLAN tagging for the HW, such as VLAN, DCB, etc.
1841 */
1842static void
1843ice_tx_prepare_vlan_flags(struct ice_ring *tx_ring, struct ice_tx_buf *first)
1844{
1845 struct sk_buff *skb = first->skb;
1846
1847 /* nothing left to do, software offloaded VLAN */
1848 if (!skb_vlan_tag_present(skb) && eth_type_vlan(skb->protocol))
1849 return;
1850
1851 /* currently, we always assume 802.1Q for VLAN insertion as VLAN
1852 * insertion for 802.1AD is not supported
1853 */
1854 if (skb_vlan_tag_present(skb)) {
1855 first->tx_flags |= skb_vlan_tag_get(skb) << ICE_TX_FLAGS_VLAN_S;
1856 first->tx_flags |= ICE_TX_FLAGS_HW_VLAN;
1857 }
1858
1859 ice_tx_prepare_vlan_flags_dcb(tx_ring, first);
1860}
1861
1862/**
1863 * ice_tso - computes mss and TSO length to prepare for TSO
1864 * @first: pointer to struct ice_tx_buf
1865 * @off: pointer to struct that holds offload parameters
1866 *
1867 * Returns 0 or error (negative) if TSO can't happen, 1 otherwise.
1868 */
1869static
1870int ice_tso(struct ice_tx_buf *first, struct ice_tx_offload_params *off)
1871{
1872 struct sk_buff *skb = first->skb;
1873 union {
1874 struct iphdr *v4;
1875 struct ipv6hdr *v6;
1876 unsigned char *hdr;
1877 } ip;
1878 union {
1879 struct tcphdr *tcp;
1880 struct udphdr *udp;
1881 unsigned char *hdr;
1882 } l4;
1883 u64 cd_mss, cd_tso_len;
1884 u32 paylen;
1885 u8 l4_start;
1886 int err;
1887
1888 if (skb->ip_summed != CHECKSUM_PARTIAL)
1889 return 0;
1890
1891 if (!skb_is_gso(skb))
1892 return 0;
1893
1894 err = skb_cow_head(skb, 0);
1895 if (err < 0)
1896 return err;
1897
1898 /* cppcheck-suppress unreadVariable */
1899 ip.hdr = skb_network_header(skb);
1900 l4.hdr = skb_transport_header(skb);
1901
1902 /* initialize outer IP header fields */
1903 if (ip.v4->version == 4) {
1904 ip.v4->tot_len = 0;
1905 ip.v4->check = 0;
1906 } else {
1907 ip.v6->payload_len = 0;
1908 }
1909
1910 if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
1911 SKB_GSO_GRE_CSUM |
1912 SKB_GSO_IPXIP4 |
1913 SKB_GSO_IPXIP6 |
1914 SKB_GSO_UDP_TUNNEL |
1915 SKB_GSO_UDP_TUNNEL_CSUM)) {
1916 if (!(skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) &&
1917 (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_TUNNEL_CSUM)) {
1918 l4.udp->len = 0;
1919
1920 /* determine offset of outer transport header */
1921 l4_start = (u8)(l4.hdr - skb->data);
1922
1923 /* remove payload length from outer checksum */
1924 paylen = skb->len - l4_start;
1925 csum_replace_by_diff(&l4.udp->check,
1926 (__force __wsum)htonl(paylen));
1927 }
1928
1929 /* reset pointers to inner headers */
1930
1931 /* cppcheck-suppress unreadVariable */
1932 ip.hdr = skb_inner_network_header(skb);
1933 l4.hdr = skb_inner_transport_header(skb);
1934
1935 /* initialize inner IP header fields */
1936 if (ip.v4->version == 4) {
1937 ip.v4->tot_len = 0;
1938 ip.v4->check = 0;
1939 } else {
1940 ip.v6->payload_len = 0;
1941 }
1942 }
1943
1944 /* determine offset of transport header */
1945 l4_start = (u8)(l4.hdr - skb->data);
1946
1947 /* remove payload length from checksum */
1948 paylen = skb->len - l4_start;
1949
1950 if (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4) {
1951 csum_replace_by_diff(&l4.udp->check,
1952 (__force __wsum)htonl(paylen));
1953 /* compute length of UDP segmentation header */
1954 off->header_len = (u8)sizeof(l4.udp) + l4_start;
1955 } else {
1956 csum_replace_by_diff(&l4.tcp->check,
1957 (__force __wsum)htonl(paylen));
1958 /* compute length of TCP segmentation header */
1959 off->header_len = (u8)((l4.tcp->doff * 4) + l4_start);
1960 }
1961
1962 /* update gso_segs and bytecount */
1963 first->gso_segs = skb_shinfo(skb)->gso_segs;
1964 first->bytecount += (first->gso_segs - 1) * off->header_len;
1965
1966 cd_tso_len = skb->len - off->header_len;
1967 cd_mss = skb_shinfo(skb)->gso_size;
1968
1969 /* record cdesc_qw1 with TSO parameters */
1970 off->cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
1971 (ICE_TX_CTX_DESC_TSO << ICE_TXD_CTX_QW1_CMD_S) |
1972 (cd_tso_len << ICE_TXD_CTX_QW1_TSO_LEN_S) |
1973 (cd_mss << ICE_TXD_CTX_QW1_MSS_S));
1974 first->tx_flags |= ICE_TX_FLAGS_TSO;
1975 return 1;
1976}
1977
1978/**
1979 * ice_txd_use_count - estimate the number of descriptors needed for Tx
1980 * @size: transmit request size in bytes
1981 *
1982 * Due to hardware alignment restrictions (4K alignment), we need to
1983 * assume that we can have no more than 12K of data per descriptor, even
1984 * though each descriptor can take up to 16K - 1 bytes of aligned memory.
1985 * Thus, we need to divide by 12K. But division is slow! Instead,
1986 * we decompose the operation into shifts and one relatively cheap
1987 * multiply operation.
1988 *
1989 * To divide by 12K, we first divide by 4K, then divide by 3:
1990 * To divide by 4K, shift right by 12 bits
1991 * To divide by 3, multiply by 85, then divide by 256
1992 * (Divide by 256 is done by shifting right by 8 bits)
1993 * Finally, we add one to round up. Because 256 isn't an exact multiple of
1994 * 3, we'll underestimate near each multiple of 12K. This is actually more
1995 * accurate as we have 4K - 1 of wiggle room that we can fit into the last
1996 * segment. For our purposes this is accurate out to 1M which is orders of
1997 * magnitude greater than our largest possible GSO size.
1998 *
1999 * This would then be implemented as:
2000 * return (((size >> 12) * 85) >> 8) + ICE_DESCS_FOR_SKB_DATA_PTR;
2001 *
2002 * Since multiplication and division are commutative, we can reorder
2003 * operations into:
2004 * return ((size * 85) >> 20) + ICE_DESCS_FOR_SKB_DATA_PTR;
2005 */
2006static unsigned int ice_txd_use_count(unsigned int size)
2007{
2008 return ((size * 85) >> 20) + ICE_DESCS_FOR_SKB_DATA_PTR;
2009}
2010
2011/**
2012 * ice_xmit_desc_count - calculate number of Tx descriptors needed
2013 * @skb: send buffer
2014 *
2015 * Returns number of data descriptors needed for this skb.
2016 */
2017static unsigned int ice_xmit_desc_count(struct sk_buff *skb)
2018{
2019 const skb_frag_t *frag = &skb_shinfo(skb)->frags[0];
2020 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2021 unsigned int count = 0, size = skb_headlen(skb);
2022
2023 for (;;) {
2024 count += ice_txd_use_count(size);
2025
2026 if (!nr_frags--)
2027 break;
2028
2029 size = skb_frag_size(frag++);
2030 }
2031
2032 return count;
2033}
2034
2035/**
2036 * __ice_chk_linearize - Check if there are more than 8 buffers per packet
2037 * @skb: send buffer
2038 *
2039 * Note: This HW can't DMA more than 8 buffers to build a packet on the wire
2040 * and so we need to figure out the cases where we need to linearize the skb.
2041 *
2042 * For TSO we need to count the TSO header and segment payload separately.
2043 * As such we need to check cases where we have 7 fragments or more as we
2044 * can potentially require 9 DMA transactions, 1 for the TSO header, 1 for
2045 * the segment payload in the first descriptor, and another 7 for the
2046 * fragments.
2047 */
2048static bool __ice_chk_linearize(struct sk_buff *skb)
2049{
2050 const skb_frag_t *frag, *stale;
2051 int nr_frags, sum;
2052
2053 /* no need to check if number of frags is less than 7 */
2054 nr_frags = skb_shinfo(skb)->nr_frags;
2055 if (nr_frags < (ICE_MAX_BUF_TXD - 1))
2056 return false;
2057
2058 /* We need to walk through the list and validate that each group
2059 * of 6 fragments totals at least gso_size.
2060 */
2061 nr_frags -= ICE_MAX_BUF_TXD - 2;
2062 frag = &skb_shinfo(skb)->frags[0];
2063
2064 /* Initialize size to the negative value of gso_size minus 1. We
2065 * use this as the worst case scenario in which the frag ahead
2066 * of us only provides one byte which is why we are limited to 6
2067 * descriptors for a single transmit as the header and previous
2068 * fragment are already consuming 2 descriptors.
2069 */
2070 sum = 1 - skb_shinfo(skb)->gso_size;
2071
2072 /* Add size of frags 0 through 4 to create our initial sum */
2073 sum += skb_frag_size(frag++);
2074 sum += skb_frag_size(frag++);
2075 sum += skb_frag_size(frag++);
2076 sum += skb_frag_size(frag++);
2077 sum += skb_frag_size(frag++);
2078
2079 /* Walk through fragments adding latest fragment, testing it, and
2080 * then removing stale fragments from the sum.
2081 */
2082 for (stale = &skb_shinfo(skb)->frags[0];; stale++) {
2083 int stale_size = skb_frag_size(stale);
2084
2085 sum += skb_frag_size(frag++);
2086
2087 /* The stale fragment may present us with a smaller
2088 * descriptor than the actual fragment size. To account
2089 * for that we need to remove all the data on the front and
2090 * figure out what the remainder would be in the last
2091 * descriptor associated with the fragment.
2092 */
2093 if (stale_size > ICE_MAX_DATA_PER_TXD) {
2094 int align_pad = -(skb_frag_off(stale)) &
2095 (ICE_MAX_READ_REQ_SIZE - 1);
2096
2097 sum -= align_pad;
2098 stale_size -= align_pad;
2099
2100 do {
2101 sum -= ICE_MAX_DATA_PER_TXD_ALIGNED;
2102 stale_size -= ICE_MAX_DATA_PER_TXD_ALIGNED;
2103 } while (stale_size > ICE_MAX_DATA_PER_TXD);
2104 }
2105
2106 /* if sum is negative we failed to make sufficient progress */
2107 if (sum < 0)
2108 return true;
2109
2110 if (!nr_frags--)
2111 break;
2112
2113 sum -= stale_size;
2114 }
2115
2116 return false;
2117}
2118
2119/**
2120 * ice_chk_linearize - Check if there are more than 8 fragments per packet
2121 * @skb: send buffer
2122 * @count: number of buffers used
2123 *
2124 * Note: Our HW can't scatter-gather more than 8 fragments to build
2125 * a packet on the wire and so we need to figure out the cases where we
2126 * need to linearize the skb.
2127 */
2128static bool ice_chk_linearize(struct sk_buff *skb, unsigned int count)
2129{
2130 /* Both TSO and single send will work if count is less than 8 */
2131 if (likely(count < ICE_MAX_BUF_TXD))
2132 return false;
2133
2134 if (skb_is_gso(skb))
2135 return __ice_chk_linearize(skb);
2136
2137 /* we can support up to 8 data buffers for a single send */
2138 return count != ICE_MAX_BUF_TXD;
2139}
2140
2141/**
2142 * ice_tstamp - set up context descriptor for hardware timestamp
2143 * @tx_ring: pointer to the Tx ring to send buffer on
2144 * @skb: pointer to the SKB we're sending
2145 * @first: Tx buffer
2146 * @off: Tx offload parameters
2147 */
2148static void
2149ice_tstamp(struct ice_ring *tx_ring, struct sk_buff *skb,
2150 struct ice_tx_buf *first, struct ice_tx_offload_params *off)
2151{
2152 s8 idx;
2153
2154 /* only timestamp the outbound packet if the user has requested it */
2155 if (likely(!(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)))
2156 return;
2157
2158 if (!tx_ring->ptp_tx)
2159 return;
2160
2161 /* Tx timestamps cannot be sampled when doing TSO */
2162 if (first->tx_flags & ICE_TX_FLAGS_TSO)
2163 return;
2164
2165 /* Grab an open timestamp slot */
2166 idx = ice_ptp_request_ts(tx_ring->tx_tstamps, skb);
2167 if (idx < 0)
2168 return;
2169
2170 off->cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2171 (ICE_TX_CTX_DESC_TSYN << ICE_TXD_CTX_QW1_CMD_S) |
2172 ((u64)idx << ICE_TXD_CTX_QW1_TSO_LEN_S));
2173 first->tx_flags |= ICE_TX_FLAGS_TSYN;
2174}
2175
2176/**
2177 * ice_xmit_frame_ring - Sends buffer on Tx ring
2178 * @skb: send buffer
2179 * @tx_ring: ring to send buffer on
2180 *
2181 * Returns NETDEV_TX_OK if sent, else an error code
2182 */
2183static netdev_tx_t
2184ice_xmit_frame_ring(struct sk_buff *skb, struct ice_ring *tx_ring)
2185{
2186 struct ice_tx_offload_params offload = { 0 };
2187 struct ice_vsi *vsi = tx_ring->vsi;
2188 struct ice_tx_buf *first;
2189 struct ethhdr *eth;
2190 unsigned int count;
2191 int tso, csum;
2192
2193 ice_trace(xmit_frame_ring, tx_ring, skb);
2194
2195 count = ice_xmit_desc_count(skb);
2196 if (ice_chk_linearize(skb, count)) {
2197 if (__skb_linearize(skb))
2198 goto out_drop;
2199 count = ice_txd_use_count(skb->len);
2200 tx_ring->tx_stats.tx_linearize++;
2201 }
2202
2203 /* need: 1 descriptor per page * PAGE_SIZE/ICE_MAX_DATA_PER_TXD,
2204 * + 1 desc for skb_head_len/ICE_MAX_DATA_PER_TXD,
2205 * + 4 desc gap to avoid the cache line where head is,
2206 * + 1 desc for context descriptor,
2207 * otherwise try next time
2208 */
2209 if (ice_maybe_stop_tx(tx_ring, count + ICE_DESCS_PER_CACHE_LINE +
2210 ICE_DESCS_FOR_CTX_DESC)) {
2211 tx_ring->tx_stats.tx_busy++;
2212 return NETDEV_TX_BUSY;
2213 }
2214
2215 offload.tx_ring = tx_ring;
2216
2217 /* record the location of the first descriptor for this packet */
2218 first = &tx_ring->tx_buf[tx_ring->next_to_use];
2219 first->skb = skb;
2220 first->bytecount = max_t(unsigned int, skb->len, ETH_ZLEN);
2221 first->gso_segs = 1;
2222 first->tx_flags = 0;
2223
2224 /* prepare the VLAN tagging flags for Tx */
2225 ice_tx_prepare_vlan_flags(tx_ring, first);
2226
2227 /* set up TSO offload */
2228 tso = ice_tso(first, &offload);
2229 if (tso < 0)
2230 goto out_drop;
2231
2232 /* always set up Tx checksum offload */
2233 csum = ice_tx_csum(first, &offload);
2234 if (csum < 0)
2235 goto out_drop;
2236
2237 /* allow CONTROL frames egress from main VSI if FW LLDP disabled */
2238 eth = (struct ethhdr *)skb_mac_header(skb);
2239 if (unlikely((skb->priority == TC_PRIO_CONTROL ||
2240 eth->h_proto == htons(ETH_P_LLDP)) &&
2241 vsi->type == ICE_VSI_PF &&
2242 vsi->port_info->qos_cfg.is_sw_lldp))
2243 offload.cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2244 ICE_TX_CTX_DESC_SWTCH_UPLINK <<
2245 ICE_TXD_CTX_QW1_CMD_S);
2246
2247 ice_tstamp(tx_ring, skb, first, &offload);
2248
2249 if (offload.cd_qw1 & ICE_TX_DESC_DTYPE_CTX) {
2250 struct ice_tx_ctx_desc *cdesc;
2251 u16 i = tx_ring->next_to_use;
2252
2253 /* grab the next descriptor */
2254 cdesc = ICE_TX_CTX_DESC(tx_ring, i);
2255 i++;
2256 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
2257
2258 /* setup context descriptor */
2259 cdesc->tunneling_params = cpu_to_le32(offload.cd_tunnel_params);
2260 cdesc->l2tag2 = cpu_to_le16(offload.cd_l2tag2);
2261 cdesc->rsvd = cpu_to_le16(0);
2262 cdesc->qw1 = cpu_to_le64(offload.cd_qw1);
2263 }
2264
2265 ice_tx_map(tx_ring, first, &offload);
2266 return NETDEV_TX_OK;
2267
2268out_drop:
2269 ice_trace(xmit_frame_ring_drop, tx_ring, skb);
2270 dev_kfree_skb_any(skb);
2271 return NETDEV_TX_OK;
2272}
2273
2274/**
2275 * ice_start_xmit - Selects the correct VSI and Tx queue to send buffer
2276 * @skb: send buffer
2277 * @netdev: network interface device structure
2278 *
2279 * Returns NETDEV_TX_OK if sent, else an error code
2280 */
2281netdev_tx_t ice_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2282{
2283 struct ice_netdev_priv *np = netdev_priv(netdev);
2284 struct ice_vsi *vsi = np->vsi;
2285 struct ice_ring *tx_ring;
2286
2287 tx_ring = vsi->tx_rings[skb->queue_mapping];
2288
2289 /* hardware can't handle really short frames, hardware padding works
2290 * beyond this point
2291 */
2292 if (skb_put_padto(skb, ICE_MIN_TX_LEN))
2293 return NETDEV_TX_OK;
2294
2295 return ice_xmit_frame_ring(skb, tx_ring);
2296}
2297
2298/**
2299 * ice_clean_ctrl_tx_irq - interrupt handler for flow director Tx queue
2300 * @tx_ring: tx_ring to clean
2301 */
2302void ice_clean_ctrl_tx_irq(struct ice_ring *tx_ring)
2303{
2304 struct ice_vsi *vsi = tx_ring->vsi;
2305 s16 i = tx_ring->next_to_clean;
2306 int budget = ICE_DFLT_IRQ_WORK;
2307 struct ice_tx_desc *tx_desc;
2308 struct ice_tx_buf *tx_buf;
2309
2310 tx_buf = &tx_ring->tx_buf[i];
2311 tx_desc = ICE_TX_DESC(tx_ring, i);
2312 i -= tx_ring->count;
2313
2314 do {
2315 struct ice_tx_desc *eop_desc = tx_buf->next_to_watch;
2316
2317 /* if next_to_watch is not set then there is no pending work */
2318 if (!eop_desc)
2319 break;
2320
2321 /* prevent any other reads prior to eop_desc */
2322 smp_rmb();
2323
2324 /* if the descriptor isn't done, no work to do */
2325 if (!(eop_desc->cmd_type_offset_bsz &
2326 cpu_to_le64(ICE_TX_DESC_DTYPE_DESC_DONE)))
2327 break;
2328
2329 /* clear next_to_watch to prevent false hangs */
2330 tx_buf->next_to_watch = NULL;
2331 tx_desc->buf_addr = 0;
2332 tx_desc->cmd_type_offset_bsz = 0;
2333
2334 /* move past filter desc */
2335 tx_buf++;
2336 tx_desc++;
2337 i++;
2338 if (unlikely(!i)) {
2339 i -= tx_ring->count;
2340 tx_buf = tx_ring->tx_buf;
2341 tx_desc = ICE_TX_DESC(tx_ring, 0);
2342 }
2343
2344 /* unmap the data header */
2345 if (dma_unmap_len(tx_buf, len))
2346 dma_unmap_single(tx_ring->dev,
2347 dma_unmap_addr(tx_buf, dma),
2348 dma_unmap_len(tx_buf, len),
2349 DMA_TO_DEVICE);
2350 if (tx_buf->tx_flags & ICE_TX_FLAGS_DUMMY_PKT)
2351 devm_kfree(tx_ring->dev, tx_buf->raw_buf);
2352
2353 /* clear next_to_watch to prevent false hangs */
2354 tx_buf->raw_buf = NULL;
2355 tx_buf->tx_flags = 0;
2356 tx_buf->next_to_watch = NULL;
2357 dma_unmap_len_set(tx_buf, len, 0);
2358 tx_desc->buf_addr = 0;
2359 tx_desc->cmd_type_offset_bsz = 0;
2360
2361 /* move past eop_desc for start of next FD desc */
2362 tx_buf++;
2363 tx_desc++;
2364 i++;
2365 if (unlikely(!i)) {
2366 i -= tx_ring->count;
2367 tx_buf = tx_ring->tx_buf;
2368 tx_desc = ICE_TX_DESC(tx_ring, 0);
2369 }
2370
2371 budget--;
2372 } while (likely(budget));
2373
2374 i += tx_ring->count;
2375 tx_ring->next_to_clean = i;
2376
2377 /* re-enable interrupt if needed */
2378 ice_irq_dynamic_ena(&vsi->back->hw, vsi, vsi->q_vectors[0]);
2379}