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1// SPDX-License-Identifier: GPL-2.0
2//
3// Audio driver for AK4458 DAC
4//
5// Copyright (C) 2016 Asahi Kasei Microdevices Corporation
6// Copyright 2018 NXP
7
8#include <linux/delay.h>
9#include <linux/gpio/consumer.h>
10#include <linux/i2c.h>
11#include <linux/module.h>
12#include <linux/of.h>
13#include <linux/pm_runtime.h>
14#include <linux/regulator/consumer.h>
15#include <linux/reset.h>
16#include <linux/slab.h>
17#include <sound/initval.h>
18#include <sound/pcm_params.h>
19#include <sound/soc.h>
20#include <sound/soc-dapm.h>
21#include <sound/tlv.h>
22
23#include "ak4458.h"
24
25#define AK4458_NUM_SUPPLIES 2
26static const char *ak4458_supply_names[AK4458_NUM_SUPPLIES] = {
27 "DVDD",
28 "AVDD",
29};
30
31enum ak4458_type {
32 AK4458 = 0,
33 AK4497 = 1,
34};
35
36struct ak4458_drvdata {
37 struct snd_soc_dai_driver *dai_drv;
38 const struct snd_soc_component_driver *comp_drv;
39 enum ak4458_type type;
40};
41
42/* AK4458 Codec Private Data */
43struct ak4458_priv {
44 struct regulator_bulk_data supplies[AK4458_NUM_SUPPLIES];
45 const struct ak4458_drvdata *drvdata;
46 struct device *dev;
47 struct regmap *regmap;
48 struct reset_control *reset;
49 struct gpio_desc *mute_gpiod;
50 int digfil; /* SSLOW, SD, SLOW bits */
51 int fs; /* sampling rate */
52 int fmt;
53 int slots;
54 int slot_width;
55 u32 dsd_path; /* For ak4497 */
56};
57
58static const struct reg_default ak4458_reg_defaults[] = {
59 { 0x00, 0x0C }, /* 0x00 AK4458_00_CONTROL1 */
60 { 0x01, 0x22 }, /* 0x01 AK4458_01_CONTROL2 */
61 { 0x02, 0x00 }, /* 0x02 AK4458_02_CONTROL3 */
62 { 0x03, 0xFF }, /* 0x03 AK4458_03_LCHATT */
63 { 0x04, 0xFF }, /* 0x04 AK4458_04_RCHATT */
64 { 0x05, 0x00 }, /* 0x05 AK4458_05_CONTROL4 */
65 { 0x06, 0x00 }, /* 0x06 AK4458_06_DSD1 */
66 { 0x07, 0x03 }, /* 0x07 AK4458_07_CONTROL5 */
67 { 0x08, 0x00 }, /* 0x08 AK4458_08_SOUND_CONTROL */
68 { 0x09, 0x00 }, /* 0x09 AK4458_09_DSD2 */
69 { 0x0A, 0x0D }, /* 0x0A AK4458_0A_CONTROL6 */
70 { 0x0B, 0x0C }, /* 0x0B AK4458_0B_CONTROL7 */
71 { 0x0C, 0x00 }, /* 0x0C AK4458_0C_CONTROL8 */
72 { 0x0D, 0x00 }, /* 0x0D AK4458_0D_CONTROL9 */
73 { 0x0E, 0x50 }, /* 0x0E AK4458_0E_CONTROL10 */
74 { 0x0F, 0xFF }, /* 0x0F AK4458_0F_L2CHATT */
75 { 0x10, 0xFF }, /* 0x10 AK4458_10_R2CHATT */
76 { 0x11, 0xFF }, /* 0x11 AK4458_11_L3CHATT */
77 { 0x12, 0xFF }, /* 0x12 AK4458_12_R3CHATT */
78 { 0x13, 0xFF }, /* 0x13 AK4458_13_L4CHATT */
79 { 0x14, 0xFF }, /* 0x14 AK4458_14_R4CHATT */
80};
81
82/*
83 * Volume control:
84 * from -127 to 0 dB in 0.5 dB steps (mute instead of -127.5 dB)
85 */
86static DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
87
88/*
89 * DEM1 bit DEM0 bit Mode
90 * 0 0 44.1kHz
91 * 0 1 OFF (default)
92 * 1 0 48kHz
93 * 1 1 32kHz
94 */
95static const char * const ak4458_dem_select_texts[] = {
96 "44.1kHz", "OFF", "48kHz", "32kHz"
97};
98
99/*
100 * SSLOW, SD, SLOW bits Digital Filter Setting
101 * 0, 0, 0 : Sharp Roll-Off Filter
102 * 0, 0, 1 : Slow Roll-Off Filter
103 * 0, 1, 0 : Short delay Sharp Roll-Off Filter
104 * 0, 1, 1 : Short delay Slow Roll-Off Filter
105 * 1, *, * : Super Slow Roll-Off Filter
106 */
107static const char * const ak4458_digfil_select_texts[] = {
108 "Sharp Roll-Off Filter",
109 "Slow Roll-Off Filter",
110 "Short delay Sharp Roll-Off Filter",
111 "Short delay Slow Roll-Off Filter",
112 "Super Slow Roll-Off Filter"
113};
114
115/*
116 * DZFB: Inverting Enable of DZF
117 * 0: DZF goes H at Zero Detection
118 * 1: DZF goes L at Zero Detection
119 */
120static const char * const ak4458_dzfb_select_texts[] = {"H", "L"};
121
122/*
123 * SC1-0 bits: Sound Mode Setting
124 * 0 0 : Sound Mode 0
125 * 0 1 : Sound Mode 1
126 * 1 0 : Sound Mode 2
127 * 1 1 : Reserved
128 */
129static const char * const ak4458_sc_select_texts[] = {
130 "Sound Mode 0", "Sound Mode 1", "Sound Mode 2"
131};
132
133/* FIR2-0 bits: FIR Filter Mode Setting */
134static const char * const ak4458_fir_select_texts[] = {
135 "Mode 0", "Mode 1", "Mode 2", "Mode 3",
136 "Mode 4", "Mode 5", "Mode 6", "Mode 7",
137};
138
139/* ATS1-0 bits Attenuation Speed */
140static const char * const ak4458_ats_select_texts[] = {
141 "4080/fs", "2040/fs", "510/fs", "255/fs",
142};
143
144/* DIF2 bit Audio Interface Format Setting(BICK fs) */
145static const char * const ak4458_dif_select_texts[] = {"32fs,48fs", "64fs",};
146
147static const struct soc_enum ak4458_dac1_dem_enum =
148 SOC_ENUM_SINGLE(AK4458_01_CONTROL2, 1,
149 ARRAY_SIZE(ak4458_dem_select_texts),
150 ak4458_dem_select_texts);
151static const struct soc_enum ak4458_dac2_dem_enum =
152 SOC_ENUM_SINGLE(AK4458_0A_CONTROL6, 0,
153 ARRAY_SIZE(ak4458_dem_select_texts),
154 ak4458_dem_select_texts);
155static const struct soc_enum ak4458_dac3_dem_enum =
156 SOC_ENUM_SINGLE(AK4458_0E_CONTROL10, 4,
157 ARRAY_SIZE(ak4458_dem_select_texts),
158 ak4458_dem_select_texts);
159static const struct soc_enum ak4458_dac4_dem_enum =
160 SOC_ENUM_SINGLE(AK4458_0E_CONTROL10, 6,
161 ARRAY_SIZE(ak4458_dem_select_texts),
162 ak4458_dem_select_texts);
163static const struct soc_enum ak4458_digfil_enum =
164 SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(ak4458_digfil_select_texts),
165 ak4458_digfil_select_texts);
166static const struct soc_enum ak4458_dzfb_enum =
167 SOC_ENUM_SINGLE(AK4458_02_CONTROL3, 2,
168 ARRAY_SIZE(ak4458_dzfb_select_texts),
169 ak4458_dzfb_select_texts);
170static const struct soc_enum ak4458_sm_enum =
171 SOC_ENUM_SINGLE(AK4458_08_SOUND_CONTROL, 0,
172 ARRAY_SIZE(ak4458_sc_select_texts),
173 ak4458_sc_select_texts);
174static const struct soc_enum ak4458_fir_enum =
175 SOC_ENUM_SINGLE(AK4458_0C_CONTROL8, 0,
176 ARRAY_SIZE(ak4458_fir_select_texts),
177 ak4458_fir_select_texts);
178static const struct soc_enum ak4458_ats_enum =
179 SOC_ENUM_SINGLE(AK4458_0B_CONTROL7, 6,
180 ARRAY_SIZE(ak4458_ats_select_texts),
181 ak4458_ats_select_texts);
182static const struct soc_enum ak4458_dif_enum =
183 SOC_ENUM_SINGLE(AK4458_00_CONTROL1, 3,
184 ARRAY_SIZE(ak4458_dif_select_texts),
185 ak4458_dif_select_texts);
186
187static int get_digfil(struct snd_kcontrol *kcontrol,
188 struct snd_ctl_elem_value *ucontrol)
189{
190 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
191 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
192
193 ucontrol->value.enumerated.item[0] = ak4458->digfil;
194
195 return 0;
196}
197
198static int set_digfil(struct snd_kcontrol *kcontrol,
199 struct snd_ctl_elem_value *ucontrol)
200{
201 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
202 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
203 int num;
204
205 num = ucontrol->value.enumerated.item[0];
206 if (num > 4)
207 return -EINVAL;
208
209 ak4458->digfil = num;
210
211 /* write SD bit */
212 snd_soc_component_update_bits(component, AK4458_01_CONTROL2,
213 AK4458_SD_MASK,
214 ((ak4458->digfil & 0x02) << 4));
215
216 /* write SLOW bit */
217 snd_soc_component_update_bits(component, AK4458_02_CONTROL3,
218 AK4458_SLOW_MASK,
219 (ak4458->digfil & 0x01));
220
221 /* write SSLOW bit */
222 snd_soc_component_update_bits(component, AK4458_05_CONTROL4,
223 AK4458_SSLOW_MASK,
224 ((ak4458->digfil & 0x04) >> 2));
225
226 return 0;
227}
228
229static const struct snd_kcontrol_new ak4458_snd_controls[] = {
230 SOC_DOUBLE_R_TLV("DAC1 Playback Volume", AK4458_03_LCHATT,
231 AK4458_04_RCHATT, 0, 0xFF, 0, dac_tlv),
232 SOC_DOUBLE_R_TLV("DAC2 Playback Volume", AK4458_0F_L2CHATT,
233 AK4458_10_R2CHATT, 0, 0xFF, 0, dac_tlv),
234 SOC_DOUBLE_R_TLV("DAC3 Playback Volume", AK4458_11_L3CHATT,
235 AK4458_12_R3CHATT, 0, 0xFF, 0, dac_tlv),
236 SOC_DOUBLE_R_TLV("DAC4 Playback Volume", AK4458_13_L4CHATT,
237 AK4458_14_R4CHATT, 0, 0xFF, 0, dac_tlv),
238 SOC_ENUM("AK4458 De-emphasis Response DAC1", ak4458_dac1_dem_enum),
239 SOC_ENUM("AK4458 De-emphasis Response DAC2", ak4458_dac2_dem_enum),
240 SOC_ENUM("AK4458 De-emphasis Response DAC3", ak4458_dac3_dem_enum),
241 SOC_ENUM("AK4458 De-emphasis Response DAC4", ak4458_dac4_dem_enum),
242 SOC_ENUM_EXT("AK4458 Digital Filter Setting", ak4458_digfil_enum,
243 get_digfil, set_digfil),
244 SOC_ENUM("AK4458 Inverting Enable of DZFB", ak4458_dzfb_enum),
245 SOC_ENUM("AK4458 Sound Mode", ak4458_sm_enum),
246 SOC_ENUM("AK4458 FIR Filter Mode Setting", ak4458_fir_enum),
247 SOC_ENUM("AK4458 Attenuation transition Time Setting",
248 ak4458_ats_enum),
249 SOC_ENUM("AK4458 BICK fs Setting", ak4458_dif_enum),
250};
251
252/* ak4458 dapm widgets */
253static const struct snd_soc_dapm_widget ak4458_dapm_widgets[] = {
254 SND_SOC_DAPM_DAC("AK4458 DAC1", NULL, AK4458_0A_CONTROL6, 2, 0),/*pw*/
255 SND_SOC_DAPM_AIF_IN("AK4458 SDTI", "Playback", 0, SND_SOC_NOPM, 0, 0),
256 SND_SOC_DAPM_OUTPUT("AK4458 AOUTA"),
257
258 SND_SOC_DAPM_DAC("AK4458 DAC2", NULL, AK4458_0A_CONTROL6, 3, 0),/*pw*/
259 SND_SOC_DAPM_OUTPUT("AK4458 AOUTB"),
260
261 SND_SOC_DAPM_DAC("AK4458 DAC3", NULL, AK4458_0B_CONTROL7, 2, 0),/*pw*/
262 SND_SOC_DAPM_OUTPUT("AK4458 AOUTC"),
263
264 SND_SOC_DAPM_DAC("AK4458 DAC4", NULL, AK4458_0B_CONTROL7, 3, 0),/*pw*/
265 SND_SOC_DAPM_OUTPUT("AK4458 AOUTD"),
266};
267
268static const struct snd_soc_dapm_route ak4458_intercon[] = {
269 {"AK4458 DAC1", NULL, "AK4458 SDTI"},
270 {"AK4458 AOUTA", NULL, "AK4458 DAC1"},
271
272 {"AK4458 DAC2", NULL, "AK4458 SDTI"},
273 {"AK4458 AOUTB", NULL, "AK4458 DAC2"},
274
275 {"AK4458 DAC3", NULL, "AK4458 SDTI"},
276 {"AK4458 AOUTC", NULL, "AK4458 DAC3"},
277
278 {"AK4458 DAC4", NULL, "AK4458 SDTI"},
279 {"AK4458 AOUTD", NULL, "AK4458 DAC4"},
280};
281
282/* ak4497 controls */
283static const struct snd_kcontrol_new ak4497_snd_controls[] = {
284 SOC_DOUBLE_R_TLV("DAC Playback Volume", AK4458_03_LCHATT,
285 AK4458_04_RCHATT, 0, 0xFF, 0, dac_tlv),
286 SOC_ENUM("AK4497 De-emphasis Response DAC", ak4458_dac1_dem_enum),
287 SOC_ENUM_EXT("AK4497 Digital Filter Setting", ak4458_digfil_enum,
288 get_digfil, set_digfil),
289 SOC_ENUM("AK4497 Inverting Enable of DZFB", ak4458_dzfb_enum),
290 SOC_ENUM("AK4497 Sound Mode", ak4458_sm_enum),
291 SOC_ENUM("AK4497 Attenuation transition Time Setting",
292 ak4458_ats_enum),
293};
294
295/* ak4497 dapm widgets */
296static const struct snd_soc_dapm_widget ak4497_dapm_widgets[] = {
297 SND_SOC_DAPM_DAC("AK4497 DAC", NULL, AK4458_0A_CONTROL6, 2, 0),
298 SND_SOC_DAPM_AIF_IN("AK4497 SDTI", "Playback", 0, SND_SOC_NOPM, 0, 0),
299 SND_SOC_DAPM_OUTPUT("AK4497 AOUT"),
300};
301
302/* ak4497 dapm routes */
303static const struct snd_soc_dapm_route ak4497_intercon[] = {
304 {"AK4497 DAC", NULL, "AK4497 SDTI"},
305 {"AK4497 AOUT", NULL, "AK4497 DAC"},
306
307};
308
309static int ak4458_get_tdm_mode(struct ak4458_priv *ak4458)
310{
311 switch (ak4458->slots * ak4458->slot_width) {
312 case 128:
313 return 1;
314 case 256:
315 return 2;
316 case 512:
317 return 3;
318 default:
319 return 0;
320 }
321}
322
323static int ak4458_rstn_control(struct snd_soc_component *component, int bit)
324{
325 int ret;
326
327 if (bit)
328 ret = snd_soc_component_update_bits(component,
329 AK4458_00_CONTROL1,
330 AK4458_RSTN_MASK,
331 0x1);
332 else
333 ret = snd_soc_component_update_bits(component,
334 AK4458_00_CONTROL1,
335 AK4458_RSTN_MASK,
336 0x0);
337 if (ret < 0)
338 return ret;
339
340 return 0;
341}
342
343static int ak4458_hw_params(struct snd_pcm_substream *substream,
344 struct snd_pcm_hw_params *params,
345 struct snd_soc_dai *dai)
346{
347 struct snd_soc_component *component = dai->component;
348 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
349 int pcm_width = max(params_physical_width(params), ak4458->slot_width);
350 u8 format, dsdsel0, dsdsel1, dchn;
351 int nfs1, dsd_bclk, ret, channels, channels_max;
352
353 nfs1 = params_rate(params);
354 ak4458->fs = nfs1;
355
356 /* calculate bit clock */
357 channels = params_channels(params);
358 channels_max = dai->driver->playback.channels_max;
359
360 switch (params_format(params)) {
361 case SNDRV_PCM_FORMAT_DSD_U8:
362 case SNDRV_PCM_FORMAT_DSD_U16_LE:
363 case SNDRV_PCM_FORMAT_DSD_U16_BE:
364 case SNDRV_PCM_FORMAT_DSD_U32_LE:
365 case SNDRV_PCM_FORMAT_DSD_U32_BE:
366 dsd_bclk = nfs1 * params_physical_width(params);
367 switch (dsd_bclk) {
368 case 2822400:
369 dsdsel0 = 0;
370 dsdsel1 = 0;
371 break;
372 case 5644800:
373 dsdsel0 = 1;
374 dsdsel1 = 0;
375 break;
376 case 11289600:
377 dsdsel0 = 0;
378 dsdsel1 = 1;
379 break;
380 case 22579200:
381 if (ak4458->drvdata->type == AK4497) {
382 dsdsel0 = 1;
383 dsdsel1 = 1;
384 } else {
385 dev_err(dai->dev, "DSD512 not supported.\n");
386 return -EINVAL;
387 }
388 break;
389 default:
390 dev_err(dai->dev, "Unsupported dsd bclk.\n");
391 return -EINVAL;
392 }
393
394 snd_soc_component_update_bits(component, AK4458_06_DSD1,
395 AK4458_DSDSEL_MASK, dsdsel0);
396 snd_soc_component_update_bits(component, AK4458_09_DSD2,
397 AK4458_DSDSEL_MASK, dsdsel1);
398 break;
399 }
400
401 /* Master Clock Frequency Auto Setting Mode Enable */
402 snd_soc_component_update_bits(component, AK4458_00_CONTROL1, 0x80, 0x80);
403
404 switch (pcm_width) {
405 case 16:
406 if (ak4458->fmt == SND_SOC_DAIFMT_I2S)
407 format = AK4458_DIF_24BIT_I2S;
408 else
409 format = AK4458_DIF_16BIT_LSB;
410 break;
411 case 32:
412 switch (ak4458->fmt) {
413 case SND_SOC_DAIFMT_I2S:
414 format = AK4458_DIF_32BIT_I2S;
415 break;
416 case SND_SOC_DAIFMT_LEFT_J:
417 format = AK4458_DIF_32BIT_MSB;
418 break;
419 case SND_SOC_DAIFMT_RIGHT_J:
420 format = AK4458_DIF_32BIT_LSB;
421 break;
422 case SND_SOC_DAIFMT_DSP_B:
423 format = AK4458_DIF_32BIT_MSB;
424 break;
425 case SND_SOC_DAIFMT_PDM:
426 format = AK4458_DIF_32BIT_MSB;
427 break;
428 default:
429 return -EINVAL;
430 }
431 break;
432 default:
433 return -EINVAL;
434 }
435
436 snd_soc_component_update_bits(component, AK4458_00_CONTROL1,
437 AK4458_DIF_MASK, format);
438
439 /*
440 * Enable/disable Daisy Chain if in TDM mode and the number of played
441 * channels is bigger than the maximum supported number of channels
442 */
443 dchn = ak4458_get_tdm_mode(ak4458) &&
444 (ak4458->fmt == SND_SOC_DAIFMT_DSP_B) &&
445 (channels > channels_max) ? AK4458_DCHAIN_MASK : 0;
446
447 snd_soc_component_update_bits(component, AK4458_0B_CONTROL7,
448 AK4458_DCHAIN_MASK, dchn);
449
450 if (ak4458->drvdata->type == AK4497) {
451 ret = snd_soc_component_update_bits(component, AK4458_09_DSD2,
452 0x4, (ak4458->dsd_path << 2));
453 if (ret < 0)
454 return ret;
455 }
456
457 ret = ak4458_rstn_control(component, 0);
458 if (ret)
459 return ret;
460
461 ret = ak4458_rstn_control(component, 1);
462 if (ret)
463 return ret;
464
465 return 0;
466}
467
468static int ak4458_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
469{
470 struct snd_soc_component *component = dai->component;
471 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
472 int ret;
473
474 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
475 case SND_SOC_DAIFMT_CBC_CFC: /* Consumer Mode */
476 break;
477 case SND_SOC_DAIFMT_CBP_CFP: /* Provider Mode is not supported */
478 case SND_SOC_DAIFMT_CBC_CFP:
479 case SND_SOC_DAIFMT_CBP_CFC:
480 default:
481 dev_err(component->dev, "Clock provider mode unsupported\n");
482 return -EINVAL;
483 }
484
485 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
486 case SND_SOC_DAIFMT_I2S:
487 case SND_SOC_DAIFMT_LEFT_J:
488 case SND_SOC_DAIFMT_RIGHT_J:
489 case SND_SOC_DAIFMT_DSP_B:
490 case SND_SOC_DAIFMT_PDM:
491 ak4458->fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
492 break;
493 default:
494 dev_err(component->dev, "Audio format 0x%02X unsupported\n",
495 fmt & SND_SOC_DAIFMT_FORMAT_MASK);
496 return -EINVAL;
497 }
498
499 /* DSD mode */
500 snd_soc_component_update_bits(component, AK4458_02_CONTROL3,
501 AK4458_DP_MASK,
502 ak4458->fmt == SND_SOC_DAIFMT_PDM ?
503 AK4458_DP_MASK : 0);
504
505 ret = ak4458_rstn_control(component, 0);
506 if (ret)
507 return ret;
508
509 ret = ak4458_rstn_control(component, 1);
510 if (ret)
511 return ret;
512
513 return 0;
514}
515
516static const int att_speed[] = { 4080, 2040, 510, 255 };
517
518static int ak4458_set_dai_mute(struct snd_soc_dai *dai, int mute, int direction)
519{
520 struct snd_soc_component *component = dai->component;
521 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
522 int nfs, ndt, reg;
523 int ats;
524
525 nfs = ak4458->fs;
526
527 reg = snd_soc_component_read(component, AK4458_0B_CONTROL7);
528 ats = (reg & AK4458_ATS_MASK) >> AK4458_ATS_SHIFT;
529
530 ndt = att_speed[ats] / (nfs / 1000);
531
532 if (mute) {
533 snd_soc_component_update_bits(component, AK4458_01_CONTROL2, 0x01, 1);
534 mdelay(ndt);
535 if (ak4458->mute_gpiod)
536 gpiod_set_value_cansleep(ak4458->mute_gpiod, 1);
537 } else {
538 if (ak4458->mute_gpiod)
539 gpiod_set_value_cansleep(ak4458->mute_gpiod, 0);
540 snd_soc_component_update_bits(component, AK4458_01_CONTROL2, 0x01, 0);
541 mdelay(ndt);
542 }
543
544 return 0;
545}
546
547static int ak4458_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
548 unsigned int rx_mask, int slots, int slot_width)
549{
550 struct snd_soc_component *component = dai->component;
551 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
552 int mode;
553
554 ak4458->slots = slots;
555 ak4458->slot_width = slot_width;
556
557 mode = ak4458_get_tdm_mode(ak4458) << AK4458_MODE_SHIFT;
558
559 snd_soc_component_update_bits(component, AK4458_0A_CONTROL6,
560 AK4458_MODE_MASK,
561 mode);
562
563 return 0;
564}
565
566#define AK4458_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
567 SNDRV_PCM_FMTBIT_S24_LE |\
568 SNDRV_PCM_FMTBIT_S32_LE |\
569 SNDRV_PCM_FMTBIT_DSD_U8 |\
570 SNDRV_PCM_FMTBIT_DSD_U16_LE |\
571 SNDRV_PCM_FMTBIT_DSD_U32_LE)
572
573static const unsigned int ak4458_rates[] = {
574 8000, 11025, 16000, 22050,
575 32000, 44100, 48000, 88200,
576 96000, 176400, 192000, 352800,
577 384000, 705600, 768000, 1411200,
578 2822400,
579};
580
581static const struct snd_pcm_hw_constraint_list ak4458_rate_constraints = {
582 .count = ARRAY_SIZE(ak4458_rates),
583 .list = ak4458_rates,
584};
585
586static int ak4458_startup(struct snd_pcm_substream *substream,
587 struct snd_soc_dai *dai)
588{
589 int ret;
590
591 ret = snd_pcm_hw_constraint_list(substream->runtime, 0,
592 SNDRV_PCM_HW_PARAM_RATE,
593 &ak4458_rate_constraints);
594
595 return ret;
596}
597
598static const struct snd_soc_dai_ops ak4458_dai_ops = {
599 .startup = ak4458_startup,
600 .hw_params = ak4458_hw_params,
601 .set_fmt = ak4458_set_dai_fmt,
602 .mute_stream = ak4458_set_dai_mute,
603 .set_tdm_slot = ak4458_set_tdm_slot,
604 .no_capture_mute = 1,
605};
606
607static struct snd_soc_dai_driver ak4458_dai = {
608 .name = "ak4458-aif",
609 .playback = {
610 .stream_name = "Playback",
611 .channels_min = 1,
612 .channels_max = 8,
613 .rates = SNDRV_PCM_RATE_KNOT,
614 .formats = AK4458_FORMATS,
615 },
616 .ops = &ak4458_dai_ops,
617};
618
619static struct snd_soc_dai_driver ak4497_dai = {
620 .name = "ak4497-aif",
621 .playback = {
622 .stream_name = "Playback",
623 .channels_min = 1,
624 .channels_max = 2,
625 .rates = SNDRV_PCM_RATE_KNOT,
626 .formats = AK4458_FORMATS,
627 },
628 .ops = &ak4458_dai_ops,
629};
630
631static void ak4458_reset(struct ak4458_priv *ak4458, bool active)
632{
633 if (!IS_ERR_OR_NULL(ak4458->reset)) {
634 if (active)
635 reset_control_assert(ak4458->reset);
636 else
637 reset_control_deassert(ak4458->reset);
638 usleep_range(1000, 2000);
639 }
640}
641
642#ifdef CONFIG_PM
643static int __maybe_unused ak4458_runtime_suspend(struct device *dev)
644{
645 struct ak4458_priv *ak4458 = dev_get_drvdata(dev);
646
647 regcache_cache_only(ak4458->regmap, true);
648
649 ak4458_reset(ak4458, true);
650
651 if (ak4458->mute_gpiod)
652 gpiod_set_value_cansleep(ak4458->mute_gpiod, 0);
653
654 regulator_bulk_disable(ARRAY_SIZE(ak4458->supplies),
655 ak4458->supplies);
656 return 0;
657}
658
659static int __maybe_unused ak4458_runtime_resume(struct device *dev)
660{
661 struct ak4458_priv *ak4458 = dev_get_drvdata(dev);
662 int ret;
663
664 ret = regulator_bulk_enable(ARRAY_SIZE(ak4458->supplies),
665 ak4458->supplies);
666 if (ret != 0) {
667 dev_err(ak4458->dev, "Failed to enable supplies: %d\n", ret);
668 return ret;
669 }
670
671 if (ak4458->mute_gpiod)
672 gpiod_set_value_cansleep(ak4458->mute_gpiod, 1);
673
674 ak4458_reset(ak4458, false);
675
676 regcache_cache_only(ak4458->regmap, false);
677 regcache_mark_dirty(ak4458->regmap);
678
679 return regcache_sync(ak4458->regmap);
680}
681#endif /* CONFIG_PM */
682
683static const struct snd_soc_component_driver soc_codec_dev_ak4458 = {
684 .controls = ak4458_snd_controls,
685 .num_controls = ARRAY_SIZE(ak4458_snd_controls),
686 .dapm_widgets = ak4458_dapm_widgets,
687 .num_dapm_widgets = ARRAY_SIZE(ak4458_dapm_widgets),
688 .dapm_routes = ak4458_intercon,
689 .num_dapm_routes = ARRAY_SIZE(ak4458_intercon),
690 .idle_bias_on = 1,
691 .use_pmdown_time = 1,
692 .endianness = 1,
693};
694
695static const struct snd_soc_component_driver soc_codec_dev_ak4497 = {
696 .controls = ak4497_snd_controls,
697 .num_controls = ARRAY_SIZE(ak4497_snd_controls),
698 .dapm_widgets = ak4497_dapm_widgets,
699 .num_dapm_widgets = ARRAY_SIZE(ak4497_dapm_widgets),
700 .dapm_routes = ak4497_intercon,
701 .num_dapm_routes = ARRAY_SIZE(ak4497_intercon),
702 .idle_bias_on = 1,
703 .use_pmdown_time = 1,
704 .endianness = 1,
705};
706
707static const struct regmap_config ak4458_regmap = {
708 .reg_bits = 8,
709 .val_bits = 8,
710
711 .max_register = AK4458_14_R4CHATT,
712 .reg_defaults = ak4458_reg_defaults,
713 .num_reg_defaults = ARRAY_SIZE(ak4458_reg_defaults),
714 .cache_type = REGCACHE_RBTREE,
715};
716
717static const struct ak4458_drvdata ak4458_drvdata = {
718 .dai_drv = &ak4458_dai,
719 .comp_drv = &soc_codec_dev_ak4458,
720 .type = AK4458,
721};
722
723static const struct ak4458_drvdata ak4497_drvdata = {
724 .dai_drv = &ak4497_dai,
725 .comp_drv = &soc_codec_dev_ak4497,
726 .type = AK4497,
727};
728
729static const struct dev_pm_ops ak4458_pm = {
730 SET_RUNTIME_PM_OPS(ak4458_runtime_suspend, ak4458_runtime_resume, NULL)
731 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
732 pm_runtime_force_resume)
733};
734
735static int ak4458_i2c_probe(struct i2c_client *i2c)
736{
737 struct ak4458_priv *ak4458;
738 int ret, i;
739
740 ak4458 = devm_kzalloc(&i2c->dev, sizeof(*ak4458), GFP_KERNEL);
741 if (!ak4458)
742 return -ENOMEM;
743
744 ak4458->regmap = devm_regmap_init_i2c(i2c, &ak4458_regmap);
745 if (IS_ERR(ak4458->regmap))
746 return PTR_ERR(ak4458->regmap);
747
748 i2c_set_clientdata(i2c, ak4458);
749 ak4458->dev = &i2c->dev;
750
751 ak4458->drvdata = of_device_get_match_data(&i2c->dev);
752
753 ak4458->reset = devm_reset_control_get_optional_shared(ak4458->dev, NULL);
754 if (IS_ERR(ak4458->reset))
755 return PTR_ERR(ak4458->reset);
756
757 ak4458->mute_gpiod = devm_gpiod_get_optional(ak4458->dev, "mute",
758 GPIOD_OUT_LOW);
759 if (IS_ERR(ak4458->mute_gpiod))
760 return PTR_ERR(ak4458->mute_gpiod);
761
762 /* Optional property for ak4497 */
763 of_property_read_u32(i2c->dev.of_node, "dsd-path", &ak4458->dsd_path);
764
765 for (i = 0; i < ARRAY_SIZE(ak4458->supplies); i++)
766 ak4458->supplies[i].supply = ak4458_supply_names[i];
767
768 ret = devm_regulator_bulk_get(ak4458->dev, ARRAY_SIZE(ak4458->supplies),
769 ak4458->supplies);
770 if (ret != 0) {
771 dev_err(ak4458->dev, "Failed to request supplies: %d\n", ret);
772 return ret;
773 }
774
775 ret = devm_snd_soc_register_component(ak4458->dev,
776 ak4458->drvdata->comp_drv,
777 ak4458->drvdata->dai_drv, 1);
778 if (ret < 0) {
779 dev_err(ak4458->dev, "Failed to register CODEC: %d\n", ret);
780 return ret;
781 }
782
783 pm_runtime_enable(&i2c->dev);
784 regcache_cache_only(ak4458->regmap, true);
785 ak4458_reset(ak4458, false);
786
787 return 0;
788}
789
790static void ak4458_i2c_remove(struct i2c_client *i2c)
791{
792 struct ak4458_priv *ak4458 = i2c_get_clientdata(i2c);
793
794 ak4458_reset(ak4458, true);
795 pm_runtime_disable(&i2c->dev);
796}
797
798static const struct of_device_id ak4458_of_match[] = {
799 { .compatible = "asahi-kasei,ak4458", .data = &ak4458_drvdata},
800 { .compatible = "asahi-kasei,ak4497", .data = &ak4497_drvdata},
801 { },
802};
803MODULE_DEVICE_TABLE(of, ak4458_of_match);
804
805static struct i2c_driver ak4458_i2c_driver = {
806 .driver = {
807 .name = "ak4458",
808 .pm = &ak4458_pm,
809 .of_match_table = ak4458_of_match,
810 },
811 .probe = ak4458_i2c_probe,
812 .remove = ak4458_i2c_remove,
813};
814
815module_i2c_driver(ak4458_i2c_driver);
816
817MODULE_AUTHOR("Junichi Wakasugi <wakasugi.jb@om.asahi-kasei.co.jp>");
818MODULE_AUTHOR("Mihai Serban <mihai.serban@nxp.com>");
819MODULE_DESCRIPTION("ASoC AK4458 DAC driver");
820MODULE_LICENSE("GPL v2");
1// SPDX-License-Identifier: GPL-2.0
2//
3// Audio driver for AK4458 DAC
4//
5// Copyright (C) 2016 Asahi Kasei Microdevices Corporation
6// Copyright 2018 NXP
7
8#include <linux/delay.h>
9#include <linux/gpio/consumer.h>
10#include <linux/i2c.h>
11#include <linux/module.h>
12#include <linux/of_device.h>
13#include <linux/of_gpio.h>
14#include <linux/pm_runtime.h>
15#include <linux/slab.h>
16#include <sound/initval.h>
17#include <sound/pcm_params.h>
18#include <sound/soc.h>
19#include <sound/soc-dapm.h>
20#include <sound/tlv.h>
21
22#include "ak4458.h"
23
24/* AK4458 Codec Private Data */
25struct ak4458_priv {
26 struct device *dev;
27 struct regmap *regmap;
28 struct gpio_desc *reset_gpiod;
29 struct gpio_desc *mute_gpiod;
30 int digfil; /* SSLOW, SD, SLOW bits */
31 int fs; /* sampling rate */
32 int fmt;
33 int slots;
34 int slot_width;
35};
36
37static const struct reg_default ak4458_reg_defaults[] = {
38 { 0x00, 0x0C }, /* 0x00 AK4458_00_CONTROL1 */
39 { 0x01, 0x22 }, /* 0x01 AK4458_01_CONTROL2 */
40 { 0x02, 0x00 }, /* 0x02 AK4458_02_CONTROL3 */
41 { 0x03, 0xFF }, /* 0x03 AK4458_03_LCHATT */
42 { 0x04, 0xFF }, /* 0x04 AK4458_04_RCHATT */
43 { 0x05, 0x00 }, /* 0x05 AK4458_05_CONTROL4 */
44 { 0x06, 0x00 }, /* 0x06 AK4458_06_DSD1 */
45 { 0x07, 0x03 }, /* 0x07 AK4458_07_CONTROL5 */
46 { 0x08, 0x00 }, /* 0x08 AK4458_08_SOUND_CONTROL */
47 { 0x09, 0x00 }, /* 0x09 AK4458_09_DSD2 */
48 { 0x0A, 0x0D }, /* 0x0A AK4458_0A_CONTROL6 */
49 { 0x0B, 0x0C }, /* 0x0B AK4458_0B_CONTROL7 */
50 { 0x0C, 0x00 }, /* 0x0C AK4458_0C_CONTROL8 */
51 { 0x0D, 0x00 }, /* 0x0D AK4458_0D_CONTROL9 */
52 { 0x0E, 0x50 }, /* 0x0E AK4458_0E_CONTROL10 */
53 { 0x0F, 0xFF }, /* 0x0F AK4458_0F_L2CHATT */
54 { 0x10, 0xFF }, /* 0x10 AK4458_10_R2CHATT */
55 { 0x11, 0xFF }, /* 0x11 AK4458_11_L3CHATT */
56 { 0x12, 0xFF }, /* 0x12 AK4458_12_R3CHATT */
57 { 0x13, 0xFF }, /* 0x13 AK4458_13_L4CHATT */
58 { 0x14, 0xFF }, /* 0x14 AK4458_14_R4CHATT */
59};
60
61/*
62 * Volume control:
63 * from -127 to 0 dB in 0.5 dB steps (mute instead of -127.5 dB)
64 */
65static DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
66
67/*
68 * DEM1 bit DEM0 bit Mode
69 * 0 0 44.1kHz
70 * 0 1 OFF (default)
71 * 1 0 48kHz
72 * 1 1 32kHz
73 */
74static const char * const ak4458_dem_select_texts[] = {
75 "44.1kHz", "OFF", "48kHz", "32kHz"
76};
77
78/*
79 * SSLOW, SD, SLOW bits Digital Filter Setting
80 * 0, 0, 0 : Sharp Roll-Off Filter
81 * 0, 0, 1 : Slow Roll-Off Filter
82 * 0, 1, 0 : Short delay Sharp Roll-Off Filter
83 * 0, 1, 1 : Short delay Slow Roll-Off Filter
84 * 1, *, * : Super Slow Roll-Off Filter
85 */
86static const char * const ak4458_digfil_select_texts[] = {
87 "Sharp Roll-Off Filter",
88 "Slow Roll-Off Filter",
89 "Short delay Sharp Roll-Off Filter",
90 "Short delay Slow Roll-Off Filter",
91 "Super Slow Roll-Off Filter"
92};
93
94/*
95 * DZFB: Inverting Enable of DZF
96 * 0: DZF goes H at Zero Detection
97 * 1: DZF goes L at Zero Detection
98 */
99static const char * const ak4458_dzfb_select_texts[] = {"H", "L"};
100
101/*
102 * SC1-0 bits: Sound Mode Setting
103 * 0 0 : Sound Mode 0
104 * 0 1 : Sound Mode 1
105 * 1 0 : Sound Mode 2
106 * 1 1 : Reserved
107 */
108static const char * const ak4458_sc_select_texts[] = {
109 "Sound Mode 0", "Sound Mode 1", "Sound Mode 2"
110};
111
112/* FIR2-0 bits: FIR Filter Mode Setting */
113static const char * const ak4458_fir_select_texts[] = {
114 "Mode 0", "Mode 1", "Mode 2", "Mode 3",
115 "Mode 4", "Mode 5", "Mode 6", "Mode 7",
116};
117
118/* ATS1-0 bits Attenuation Speed */
119static const char * const ak4458_ats_select_texts[] = {
120 "4080/fs", "2040/fs", "510/fs", "255/fs",
121};
122
123/* DIF2 bit Audio Interface Format Setting(BICK fs) */
124static const char * const ak4458_dif_select_texts[] = {"32fs,48fs", "64fs",};
125
126static const struct soc_enum ak4458_dac1_dem_enum =
127 SOC_ENUM_SINGLE(AK4458_01_CONTROL2, 1,
128 ARRAY_SIZE(ak4458_dem_select_texts),
129 ak4458_dem_select_texts);
130static const struct soc_enum ak4458_dac2_dem_enum =
131 SOC_ENUM_SINGLE(AK4458_0A_CONTROL6, 0,
132 ARRAY_SIZE(ak4458_dem_select_texts),
133 ak4458_dem_select_texts);
134static const struct soc_enum ak4458_dac3_dem_enum =
135 SOC_ENUM_SINGLE(AK4458_0E_CONTROL10, 4,
136 ARRAY_SIZE(ak4458_dem_select_texts),
137 ak4458_dem_select_texts);
138static const struct soc_enum ak4458_dac4_dem_enum =
139 SOC_ENUM_SINGLE(AK4458_0E_CONTROL10, 6,
140 ARRAY_SIZE(ak4458_dem_select_texts),
141 ak4458_dem_select_texts);
142static const struct soc_enum ak4458_digfil_enum =
143 SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(ak4458_digfil_select_texts),
144 ak4458_digfil_select_texts);
145static const struct soc_enum ak4458_dzfb_enum =
146 SOC_ENUM_SINGLE(AK4458_02_CONTROL3, 2,
147 ARRAY_SIZE(ak4458_dzfb_select_texts),
148 ak4458_dzfb_select_texts);
149static const struct soc_enum ak4458_sm_enum =
150 SOC_ENUM_SINGLE(AK4458_08_SOUND_CONTROL, 0,
151 ARRAY_SIZE(ak4458_sc_select_texts),
152 ak4458_sc_select_texts);
153static const struct soc_enum ak4458_fir_enum =
154 SOC_ENUM_SINGLE(AK4458_0C_CONTROL8, 0,
155 ARRAY_SIZE(ak4458_fir_select_texts),
156 ak4458_fir_select_texts);
157static const struct soc_enum ak4458_ats_enum =
158 SOC_ENUM_SINGLE(AK4458_0B_CONTROL7, 6,
159 ARRAY_SIZE(ak4458_ats_select_texts),
160 ak4458_ats_select_texts);
161static const struct soc_enum ak4458_dif_enum =
162 SOC_ENUM_SINGLE(AK4458_00_CONTROL1, 3,
163 ARRAY_SIZE(ak4458_dif_select_texts),
164 ak4458_dif_select_texts);
165
166static int get_digfil(struct snd_kcontrol *kcontrol,
167 struct snd_ctl_elem_value *ucontrol)
168{
169 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
170 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
171
172 ucontrol->value.enumerated.item[0] = ak4458->digfil;
173
174 return 0;
175}
176
177static int set_digfil(struct snd_kcontrol *kcontrol,
178 struct snd_ctl_elem_value *ucontrol)
179{
180 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
181 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
182 int num;
183
184 num = ucontrol->value.enumerated.item[0];
185 if (num > 4)
186 return -EINVAL;
187
188 ak4458->digfil = num;
189
190 /* write SD bit */
191 snd_soc_component_update_bits(component, AK4458_01_CONTROL2,
192 AK4458_SD_MASK,
193 ((ak4458->digfil & 0x02) << 4));
194
195 /* write SLOW bit */
196 snd_soc_component_update_bits(component, AK4458_02_CONTROL3,
197 AK4458_SLOW_MASK,
198 (ak4458->digfil & 0x01));
199
200 /* write SSLOW bit */
201 snd_soc_component_update_bits(component, AK4458_05_CONTROL4,
202 AK4458_SSLOW_MASK,
203 ((ak4458->digfil & 0x04) >> 2));
204
205 return 0;
206}
207
208static const struct snd_kcontrol_new ak4458_snd_controls[] = {
209 SOC_DOUBLE_R_TLV("DAC1 Playback Volume", AK4458_03_LCHATT,
210 AK4458_04_RCHATT, 0, 0xFF, 0, dac_tlv),
211 SOC_DOUBLE_R_TLV("DAC2 Playback Volume", AK4458_0F_L2CHATT,
212 AK4458_10_R2CHATT, 0, 0xFF, 0, dac_tlv),
213 SOC_DOUBLE_R_TLV("DAC3 Playback Volume", AK4458_11_L3CHATT,
214 AK4458_12_R3CHATT, 0, 0xFF, 0, dac_tlv),
215 SOC_DOUBLE_R_TLV("DAC4 Playback Volume", AK4458_13_L4CHATT,
216 AK4458_14_R4CHATT, 0, 0xFF, 0, dac_tlv),
217 SOC_ENUM("AK4458 De-emphasis Response DAC1", ak4458_dac1_dem_enum),
218 SOC_ENUM("AK4458 De-emphasis Response DAC2", ak4458_dac2_dem_enum),
219 SOC_ENUM("AK4458 De-emphasis Response DAC3", ak4458_dac3_dem_enum),
220 SOC_ENUM("AK4458 De-emphasis Response DAC4", ak4458_dac4_dem_enum),
221 SOC_ENUM_EXT("AK4458 Digital Filter Setting", ak4458_digfil_enum,
222 get_digfil, set_digfil),
223 SOC_ENUM("AK4458 Inverting Enable of DZFB", ak4458_dzfb_enum),
224 SOC_ENUM("AK4458 Sound Mode", ak4458_sm_enum),
225 SOC_ENUM("AK4458 FIR Filter Mode Setting", ak4458_fir_enum),
226 SOC_ENUM("AK4458 Attenuation transition Time Setting",
227 ak4458_ats_enum),
228 SOC_ENUM("AK4458 BICK fs Setting", ak4458_dif_enum),
229};
230
231/* ak4458 dapm widgets */
232static const struct snd_soc_dapm_widget ak4458_dapm_widgets[] = {
233 SND_SOC_DAPM_DAC("AK4458 DAC1", NULL, AK4458_0A_CONTROL6, 2, 0),/*pw*/
234 SND_SOC_DAPM_AIF_IN("AK4458 SDTI", "Playback", 0, SND_SOC_NOPM, 0, 0),
235 SND_SOC_DAPM_OUTPUT("AK4458 AOUTA"),
236
237 SND_SOC_DAPM_DAC("AK4458 DAC2", NULL, AK4458_0A_CONTROL6, 3, 0),/*pw*/
238 SND_SOC_DAPM_OUTPUT("AK4458 AOUTB"),
239
240 SND_SOC_DAPM_DAC("AK4458 DAC3", NULL, AK4458_0B_CONTROL7, 2, 0),/*pw*/
241 SND_SOC_DAPM_OUTPUT("AK4458 AOUTC"),
242
243 SND_SOC_DAPM_DAC("AK4458 DAC4", NULL, AK4458_0B_CONTROL7, 3, 0),/*pw*/
244 SND_SOC_DAPM_OUTPUT("AK4458 AOUTD"),
245};
246
247static const struct snd_soc_dapm_route ak4458_intercon[] = {
248 {"AK4458 DAC1", NULL, "AK4458 SDTI"},
249 {"AK4458 AOUTA", NULL, "AK4458 DAC1"},
250
251 {"AK4458 DAC2", NULL, "AK4458 SDTI"},
252 {"AK4458 AOUTB", NULL, "AK4458 DAC2"},
253
254 {"AK4458 DAC3", NULL, "AK4458 SDTI"},
255 {"AK4458 AOUTC", NULL, "AK4458 DAC3"},
256
257 {"AK4458 DAC4", NULL, "AK4458 SDTI"},
258 {"AK4458 AOUTD", NULL, "AK4458 DAC4"},
259};
260
261static int ak4458_rstn_control(struct snd_soc_component *component, int bit)
262{
263 int ret;
264
265 if (bit)
266 ret = snd_soc_component_update_bits(component,
267 AK4458_00_CONTROL1,
268 AK4458_RSTN_MASK,
269 0x1);
270 else
271 ret = snd_soc_component_update_bits(component,
272 AK4458_00_CONTROL1,
273 AK4458_RSTN_MASK,
274 0x0);
275 return ret;
276}
277
278static int ak4458_hw_params(struct snd_pcm_substream *substream,
279 struct snd_pcm_hw_params *params,
280 struct snd_soc_dai *dai)
281{
282 struct snd_soc_component *component = dai->component;
283 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
284 int pcm_width = max(params_physical_width(params), ak4458->slot_width);
285 int nfs1;
286 u8 format;
287
288 nfs1 = params_rate(params);
289 ak4458->fs = nfs1;
290
291 /* Master Clock Frequency Auto Setting Mode Enable */
292 snd_soc_component_update_bits(component, AK4458_00_CONTROL1, 0x80, 0x80);
293
294 switch (pcm_width) {
295 case 16:
296 if (ak4458->fmt == SND_SOC_DAIFMT_I2S)
297 format = AK4458_DIF_24BIT_I2S;
298 else
299 format = AK4458_DIF_16BIT_LSB;
300 break;
301 case 32:
302 switch (ak4458->fmt) {
303 case SND_SOC_DAIFMT_I2S:
304 format = AK4458_DIF_32BIT_I2S;
305 break;
306 case SND_SOC_DAIFMT_LEFT_J:
307 format = AK4458_DIF_32BIT_MSB;
308 break;
309 case SND_SOC_DAIFMT_RIGHT_J:
310 format = AK4458_DIF_32BIT_LSB;
311 break;
312 case SND_SOC_DAIFMT_DSP_B:
313 format = AK4458_DIF_32BIT_MSB;
314 break;
315 default:
316 return -EINVAL;
317 }
318 break;
319 default:
320 return -EINVAL;
321 }
322
323 snd_soc_component_update_bits(component, AK4458_00_CONTROL1,
324 AK4458_DIF_MASK, format);
325
326 ak4458_rstn_control(component, 0);
327 ak4458_rstn_control(component, 1);
328
329 return 0;
330}
331
332static int ak4458_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
333{
334 struct snd_soc_component *component = dai->component;
335 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
336
337 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
338 case SND_SOC_DAIFMT_CBS_CFS: /* Slave Mode */
339 break;
340 case SND_SOC_DAIFMT_CBM_CFM: /* Master Mode is not supported */
341 case SND_SOC_DAIFMT_CBS_CFM:
342 case SND_SOC_DAIFMT_CBM_CFS:
343 default:
344 dev_err(component->dev, "Master mode unsupported\n");
345 return -EINVAL;
346 }
347
348 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
349 case SND_SOC_DAIFMT_I2S:
350 case SND_SOC_DAIFMT_LEFT_J:
351 case SND_SOC_DAIFMT_RIGHT_J:
352 case SND_SOC_DAIFMT_DSP_B:
353 ak4458->fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
354 break;
355 default:
356 dev_err(component->dev, "Audio format 0x%02X unsupported\n",
357 fmt & SND_SOC_DAIFMT_FORMAT_MASK);
358 return -EINVAL;
359 }
360
361 ak4458_rstn_control(component, 0);
362 ak4458_rstn_control(component, 1);
363
364 return 0;
365}
366
367static const int att_speed[] = { 4080, 2040, 510, 255 };
368
369static int ak4458_set_dai_mute(struct snd_soc_dai *dai, int mute)
370{
371 struct snd_soc_component *component = dai->component;
372 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
373 int nfs, ndt, ret, reg;
374 int ats;
375
376 nfs = ak4458->fs;
377
378 reg = snd_soc_component_read32(component, AK4458_0B_CONTROL7);
379 ats = (reg & AK4458_ATS_MASK) >> AK4458_ATS_SHIFT;
380
381 ndt = att_speed[ats] / (nfs / 1000);
382
383 if (mute) {
384 ret = snd_soc_component_update_bits(component, AK4458_01_CONTROL2, 0x01, 1);
385 mdelay(ndt);
386 if (ak4458->mute_gpiod)
387 gpiod_set_value_cansleep(ak4458->mute_gpiod, 1);
388 } else {
389 if (ak4458->mute_gpiod)
390 gpiod_set_value_cansleep(ak4458->mute_gpiod, 0);
391 ret = snd_soc_component_update_bits(component, AK4458_01_CONTROL2, 0x01, 0);
392 mdelay(ndt);
393 }
394
395 return 0;
396}
397
398static int ak4458_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
399 unsigned int rx_mask, int slots, int slot_width)
400{
401 struct snd_soc_component *component = dai->component;
402 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
403 int mode;
404
405 ak4458->slots = slots;
406 ak4458->slot_width = slot_width;
407
408 switch (slots * slot_width) {
409 case 128:
410 mode = AK4458_MODE_TDM128;
411 break;
412 case 256:
413 mode = AK4458_MODE_TDM256;
414 break;
415 case 512:
416 mode = AK4458_MODE_TDM512;
417 break;
418 default:
419 mode = AK4458_MODE_NORMAL;
420 break;
421 }
422
423 snd_soc_component_update_bits(component, AK4458_0A_CONTROL6,
424 AK4458_MODE_MASK,
425 mode);
426
427 return 0;
428}
429
430#define AK4458_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
431 SNDRV_PCM_FMTBIT_S24_LE |\
432 SNDRV_PCM_FMTBIT_S32_LE)
433
434static const unsigned int ak4458_rates[] = {
435 8000, 11025, 16000, 22050,
436 32000, 44100, 48000, 88200,
437 96000, 176400, 192000, 352800,
438 384000, 705600, 768000, 1411200,
439 2822400,
440};
441
442static const struct snd_pcm_hw_constraint_list ak4458_rate_constraints = {
443 .count = ARRAY_SIZE(ak4458_rates),
444 .list = ak4458_rates,
445};
446
447static int ak4458_startup(struct snd_pcm_substream *substream,
448 struct snd_soc_dai *dai)
449{
450 int ret;
451
452 ret = snd_pcm_hw_constraint_list(substream->runtime, 0,
453 SNDRV_PCM_HW_PARAM_RATE,
454 &ak4458_rate_constraints);
455
456 return ret;
457}
458
459static struct snd_soc_dai_ops ak4458_dai_ops = {
460 .startup = ak4458_startup,
461 .hw_params = ak4458_hw_params,
462 .set_fmt = ak4458_set_dai_fmt,
463 .digital_mute = ak4458_set_dai_mute,
464 .set_tdm_slot = ak4458_set_tdm_slot,
465};
466
467static struct snd_soc_dai_driver ak4458_dai = {
468 .name = "ak4458-aif",
469 .playback = {
470 .stream_name = "Playback",
471 .channels_min = 1,
472 .channels_max = 8,
473 .rates = SNDRV_PCM_RATE_KNOT,
474 .formats = AK4458_FORMATS,
475 },
476 .ops = &ak4458_dai_ops,
477};
478
479static void ak4458_power_off(struct ak4458_priv *ak4458)
480{
481 if (ak4458->reset_gpiod) {
482 gpiod_set_value_cansleep(ak4458->reset_gpiod, 0);
483 usleep_range(1000, 2000);
484 }
485}
486
487static void ak4458_power_on(struct ak4458_priv *ak4458)
488{
489 if (ak4458->reset_gpiod) {
490 gpiod_set_value_cansleep(ak4458->reset_gpiod, 1);
491 usleep_range(1000, 2000);
492 }
493}
494
495static void ak4458_init(struct snd_soc_component *component)
496{
497 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
498
499 /* External Mute ON */
500 if (ak4458->mute_gpiod)
501 gpiod_set_value_cansleep(ak4458->mute_gpiod, 1);
502
503 ak4458_power_on(ak4458);
504
505 snd_soc_component_update_bits(component, AK4458_00_CONTROL1,
506 0x80, 0x80); /* ACKS bit = 1; 10000000 */
507
508 ak4458_rstn_control(component, 1);
509}
510
511static int ak4458_probe(struct snd_soc_component *component)
512{
513 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
514
515 ak4458_init(component);
516
517 ak4458->fs = 48000;
518
519 return 0;
520}
521
522static void ak4458_remove(struct snd_soc_component *component)
523{
524 struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
525
526 ak4458_power_off(ak4458);
527}
528
529#ifdef CONFIG_PM
530static int __maybe_unused ak4458_runtime_suspend(struct device *dev)
531{
532 struct ak4458_priv *ak4458 = dev_get_drvdata(dev);
533
534 regcache_cache_only(ak4458->regmap, true);
535
536 ak4458_power_off(ak4458);
537
538 if (ak4458->mute_gpiod)
539 gpiod_set_value_cansleep(ak4458->mute_gpiod, 0);
540
541 return 0;
542}
543
544static int __maybe_unused ak4458_runtime_resume(struct device *dev)
545{
546 struct ak4458_priv *ak4458 = dev_get_drvdata(dev);
547
548 if (ak4458->mute_gpiod)
549 gpiod_set_value_cansleep(ak4458->mute_gpiod, 1);
550
551 ak4458_power_off(ak4458);
552 ak4458_power_on(ak4458);
553
554 regcache_cache_only(ak4458->regmap, false);
555 regcache_mark_dirty(ak4458->regmap);
556
557 return regcache_sync(ak4458->regmap);
558}
559#endif /* CONFIG_PM */
560
561struct snd_soc_component_driver soc_codec_dev_ak4458 = {
562 .probe = ak4458_probe,
563 .remove = ak4458_remove,
564 .controls = ak4458_snd_controls,
565 .num_controls = ARRAY_SIZE(ak4458_snd_controls),
566 .dapm_widgets = ak4458_dapm_widgets,
567 .num_dapm_widgets = ARRAY_SIZE(ak4458_dapm_widgets),
568 .dapm_routes = ak4458_intercon,
569 .num_dapm_routes = ARRAY_SIZE(ak4458_intercon),
570 .idle_bias_on = 1,
571 .use_pmdown_time = 1,
572 .endianness = 1,
573 .non_legacy_dai_naming = 1,
574};
575
576static const struct regmap_config ak4458_regmap = {
577 .reg_bits = 8,
578 .val_bits = 8,
579
580 .max_register = AK4458_14_R4CHATT,
581 .reg_defaults = ak4458_reg_defaults,
582 .num_reg_defaults = ARRAY_SIZE(ak4458_reg_defaults),
583 .cache_type = REGCACHE_RBTREE,
584};
585
586static const struct dev_pm_ops ak4458_pm = {
587 SET_RUNTIME_PM_OPS(ak4458_runtime_suspend, ak4458_runtime_resume, NULL)
588 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
589 pm_runtime_force_resume)
590};
591
592static int ak4458_i2c_probe(struct i2c_client *i2c)
593{
594 struct ak4458_priv *ak4458;
595 int ret;
596
597 ak4458 = devm_kzalloc(&i2c->dev, sizeof(*ak4458), GFP_KERNEL);
598 if (!ak4458)
599 return -ENOMEM;
600
601 ak4458->regmap = devm_regmap_init_i2c(i2c, &ak4458_regmap);
602 if (IS_ERR(ak4458->regmap))
603 return PTR_ERR(ak4458->regmap);
604
605 i2c_set_clientdata(i2c, ak4458);
606 ak4458->dev = &i2c->dev;
607
608 ak4458->reset_gpiod = devm_gpiod_get_optional(ak4458->dev, "reset",
609 GPIOD_OUT_LOW);
610 if (IS_ERR(ak4458->reset_gpiod))
611 return PTR_ERR(ak4458->reset_gpiod);
612
613 ak4458->mute_gpiod = devm_gpiod_get_optional(ak4458->dev, "mute",
614 GPIOD_OUT_LOW);
615 if (IS_ERR(ak4458->mute_gpiod))
616 return PTR_ERR(ak4458->mute_gpiod);
617
618 ret = devm_snd_soc_register_component(ak4458->dev, &soc_codec_dev_ak4458,
619 &ak4458_dai, 1);
620 if (ret < 0) {
621 dev_err(ak4458->dev, "Failed to register CODEC: %d\n", ret);
622 return ret;
623 }
624
625 pm_runtime_enable(&i2c->dev);
626
627 return 0;
628}
629
630static int ak4458_i2c_remove(struct i2c_client *i2c)
631{
632 pm_runtime_disable(&i2c->dev);
633
634 return 0;
635}
636
637static const struct of_device_id ak4458_of_match[] = {
638 { .compatible = "asahi-kasei,ak4458", },
639 { },
640};
641
642static struct i2c_driver ak4458_i2c_driver = {
643 .driver = {
644 .name = "ak4458",
645 .pm = &ak4458_pm,
646 .of_match_table = ak4458_of_match,
647 },
648 .probe_new = ak4458_i2c_probe,
649 .remove = ak4458_i2c_remove,
650};
651
652module_i2c_driver(ak4458_i2c_driver);
653
654MODULE_AUTHOR("Junichi Wakasugi <wakasugi.jb@om.asahi-kasei.co.jp>");
655MODULE_AUTHOR("Mihai Serban <mihai.serban@nxp.com>");
656MODULE_DESCRIPTION("ASoC AK4458 DAC driver");
657MODULE_LICENSE("GPL v2");