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v6.13.7
  1// SPDX-License-Identifier: GPL-2.0
  2//
  3// Audio driver for AK4458 DAC
  4//
  5// Copyright (C) 2016 Asahi Kasei Microdevices Corporation
  6// Copyright 2018 NXP
  7
  8#include <linux/delay.h>
  9#include <linux/gpio/consumer.h>
 10#include <linux/i2c.h>
 11#include <linux/module.h>
 12#include <linux/of.h>
 
 13#include <linux/pm_runtime.h>
 14#include <linux/regulator/consumer.h>
 15#include <linux/reset.h>
 16#include <linux/slab.h>
 17#include <sound/initval.h>
 18#include <sound/pcm_params.h>
 19#include <sound/soc.h>
 20#include <sound/soc-dapm.h>
 21#include <sound/tlv.h>
 22
 23#include "ak4458.h"
 24
 25#define AK4458_NUM_SUPPLIES 2
 26static const char *ak4458_supply_names[AK4458_NUM_SUPPLIES] = {
 27	"DVDD",
 28	"AVDD",
 29};
 30
 31enum ak4458_type {
 32	AK4458 = 0,
 33	AK4497 = 1,
 34};
 35
 36struct ak4458_drvdata {
 37	struct snd_soc_dai_driver *dai_drv;
 38	const struct snd_soc_component_driver *comp_drv;
 39	enum ak4458_type type;
 40};
 41
 42/* AK4458 Codec Private Data */
 43struct ak4458_priv {
 44	struct regulator_bulk_data supplies[AK4458_NUM_SUPPLIES];
 45	const struct ak4458_drvdata *drvdata;
 46	struct device *dev;
 47	struct regmap *regmap;
 
 48	struct reset_control *reset;
 49	struct gpio_desc *mute_gpiod;
 50	int digfil;	/* SSLOW, SD, SLOW bits */
 51	int fs;		/* sampling rate */
 52	int fmt;
 53	int slots;
 54	int slot_width;
 55	u32 dsd_path;    /* For ak4497 */
 56};
 57
 58static const struct reg_default ak4458_reg_defaults[] = {
 59	{ 0x00, 0x0C },	/*	0x00	AK4458_00_CONTROL1	*/
 60	{ 0x01, 0x22 },	/*	0x01	AK4458_01_CONTROL2	*/
 61	{ 0x02, 0x00 },	/*	0x02	AK4458_02_CONTROL3	*/
 62	{ 0x03, 0xFF },	/*	0x03	AK4458_03_LCHATT	*/
 63	{ 0x04, 0xFF },	/*	0x04	AK4458_04_RCHATT	*/
 64	{ 0x05, 0x00 },	/*	0x05	AK4458_05_CONTROL4	*/
 65	{ 0x06, 0x00 },	/*	0x06	AK4458_06_DSD1		*/
 66	{ 0x07, 0x03 },	/*	0x07	AK4458_07_CONTROL5	*/
 67	{ 0x08, 0x00 },	/*	0x08	AK4458_08_SOUND_CONTROL	*/
 68	{ 0x09, 0x00 },	/*	0x09	AK4458_09_DSD2		*/
 69	{ 0x0A, 0x0D },	/*	0x0A	AK4458_0A_CONTROL6	*/
 70	{ 0x0B, 0x0C },	/*	0x0B	AK4458_0B_CONTROL7	*/
 71	{ 0x0C, 0x00 },	/*	0x0C	AK4458_0C_CONTROL8	*/
 72	{ 0x0D, 0x00 },	/*	0x0D	AK4458_0D_CONTROL9	*/
 73	{ 0x0E, 0x50 },	/*	0x0E	AK4458_0E_CONTROL10	*/
 74	{ 0x0F, 0xFF },	/*	0x0F	AK4458_0F_L2CHATT	*/
 75	{ 0x10, 0xFF },	/*	0x10	AK4458_10_R2CHATT	*/
 76	{ 0x11, 0xFF },	/*	0x11	AK4458_11_L3CHATT	*/
 77	{ 0x12, 0xFF },	/*	0x12	AK4458_12_R3CHATT	*/
 78	{ 0x13, 0xFF },	/*	0x13	AK4458_13_L4CHATT	*/
 79	{ 0x14, 0xFF },	/*	0x14	AK4458_14_R4CHATT	*/
 80};
 81
 82/*
 83 * Volume control:
 84 * from -127 to 0 dB in 0.5 dB steps (mute instead of -127.5 dB)
 85 */
 86static DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
 87
 88/*
 89 * DEM1 bit DEM0 bit Mode
 90 * 0 0 44.1kHz
 91 * 0 1 OFF (default)
 92 * 1 0 48kHz
 93 * 1 1 32kHz
 94 */
 95static const char * const ak4458_dem_select_texts[] = {
 96	"44.1kHz", "OFF", "48kHz", "32kHz"
 97};
 98
 99/*
100 * SSLOW, SD, SLOW bits Digital Filter Setting
101 * 0, 0, 0 : Sharp Roll-Off Filter
102 * 0, 0, 1 : Slow Roll-Off Filter
103 * 0, 1, 0 : Short delay Sharp Roll-Off Filter
104 * 0, 1, 1 : Short delay Slow Roll-Off Filter
105 * 1, *, * : Super Slow Roll-Off Filter
106 */
107static const char * const ak4458_digfil_select_texts[] = {
108	"Sharp Roll-Off Filter",
109	"Slow Roll-Off Filter",
110	"Short delay Sharp Roll-Off Filter",
111	"Short delay Slow Roll-Off Filter",
112	"Super Slow Roll-Off Filter"
113};
114
115/*
116 * DZFB: Inverting Enable of DZF
117 * 0: DZF goes H at Zero Detection
118 * 1: DZF goes L at Zero Detection
119 */
120static const char * const ak4458_dzfb_select_texts[] = {"H", "L"};
121
122/*
123 * SC1-0 bits: Sound Mode Setting
124 * 0 0 : Sound Mode 0
125 * 0 1 : Sound Mode 1
126 * 1 0 : Sound Mode 2
127 * 1 1 : Reserved
128 */
129static const char * const ak4458_sc_select_texts[] = {
130	"Sound Mode 0", "Sound Mode 1", "Sound Mode 2"
131};
132
133/* FIR2-0 bits: FIR Filter Mode Setting */
134static const char * const ak4458_fir_select_texts[] = {
135	"Mode 0", "Mode 1", "Mode 2", "Mode 3",
136	"Mode 4", "Mode 5", "Mode 6", "Mode 7",
137};
138
139/* ATS1-0 bits Attenuation Speed */
140static const char * const ak4458_ats_select_texts[] = {
141	"4080/fs", "2040/fs", "510/fs", "255/fs",
142};
143
144/* DIF2 bit Audio Interface Format Setting(BICK fs) */
145static const char * const ak4458_dif_select_texts[] = {"32fs,48fs", "64fs",};
146
147static const struct soc_enum ak4458_dac1_dem_enum =
148	SOC_ENUM_SINGLE(AK4458_01_CONTROL2, 1,
149			ARRAY_SIZE(ak4458_dem_select_texts),
150			ak4458_dem_select_texts);
151static const struct soc_enum ak4458_dac2_dem_enum =
152	SOC_ENUM_SINGLE(AK4458_0A_CONTROL6, 0,
153			ARRAY_SIZE(ak4458_dem_select_texts),
154			ak4458_dem_select_texts);
155static const struct soc_enum ak4458_dac3_dem_enum =
156	SOC_ENUM_SINGLE(AK4458_0E_CONTROL10, 4,
157			ARRAY_SIZE(ak4458_dem_select_texts),
158			ak4458_dem_select_texts);
159static const struct soc_enum ak4458_dac4_dem_enum =
160	SOC_ENUM_SINGLE(AK4458_0E_CONTROL10, 6,
161			ARRAY_SIZE(ak4458_dem_select_texts),
162			ak4458_dem_select_texts);
163static const struct soc_enum ak4458_digfil_enum =
164	SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(ak4458_digfil_select_texts),
165			    ak4458_digfil_select_texts);
166static const struct soc_enum ak4458_dzfb_enum =
167	SOC_ENUM_SINGLE(AK4458_02_CONTROL3, 2,
168			ARRAY_SIZE(ak4458_dzfb_select_texts),
169			ak4458_dzfb_select_texts);
170static const struct soc_enum ak4458_sm_enum =
171	SOC_ENUM_SINGLE(AK4458_08_SOUND_CONTROL, 0,
172			ARRAY_SIZE(ak4458_sc_select_texts),
173			ak4458_sc_select_texts);
174static const struct soc_enum ak4458_fir_enum =
175	SOC_ENUM_SINGLE(AK4458_0C_CONTROL8, 0,
176			ARRAY_SIZE(ak4458_fir_select_texts),
177			ak4458_fir_select_texts);
178static const struct soc_enum ak4458_ats_enum =
179	SOC_ENUM_SINGLE(AK4458_0B_CONTROL7, 6,
180			ARRAY_SIZE(ak4458_ats_select_texts),
181			ak4458_ats_select_texts);
182static const struct soc_enum ak4458_dif_enum =
183	SOC_ENUM_SINGLE(AK4458_00_CONTROL1, 3,
184			ARRAY_SIZE(ak4458_dif_select_texts),
185			ak4458_dif_select_texts);
186
187static int get_digfil(struct snd_kcontrol *kcontrol,
188		      struct snd_ctl_elem_value *ucontrol)
189{
190	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
191	struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
192
193	ucontrol->value.enumerated.item[0] = ak4458->digfil;
194
195	return 0;
196}
197
198static int set_digfil(struct snd_kcontrol *kcontrol,
199		      struct snd_ctl_elem_value *ucontrol)
200{
201	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
202	struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
203	int num;
204
205	num = ucontrol->value.enumerated.item[0];
206	if (num > 4)
207		return -EINVAL;
208
209	ak4458->digfil = num;
210
211	/* write SD bit */
212	snd_soc_component_update_bits(component, AK4458_01_CONTROL2,
213			    AK4458_SD_MASK,
214			    ((ak4458->digfil & 0x02) << 4));
215
216	/* write SLOW bit */
217	snd_soc_component_update_bits(component, AK4458_02_CONTROL3,
218			    AK4458_SLOW_MASK,
219			    (ak4458->digfil & 0x01));
220
221	/* write SSLOW bit */
222	snd_soc_component_update_bits(component, AK4458_05_CONTROL4,
223			    AK4458_SSLOW_MASK,
224			    ((ak4458->digfil & 0x04) >> 2));
225
226	return 0;
227}
228
229static const struct snd_kcontrol_new ak4458_snd_controls[] = {
230	SOC_DOUBLE_R_TLV("DAC1 Playback Volume", AK4458_03_LCHATT,
231			 AK4458_04_RCHATT, 0, 0xFF, 0, dac_tlv),
232	SOC_DOUBLE_R_TLV("DAC2 Playback Volume", AK4458_0F_L2CHATT,
233			 AK4458_10_R2CHATT, 0, 0xFF, 0, dac_tlv),
234	SOC_DOUBLE_R_TLV("DAC3 Playback Volume", AK4458_11_L3CHATT,
235			 AK4458_12_R3CHATT, 0, 0xFF, 0, dac_tlv),
236	SOC_DOUBLE_R_TLV("DAC4 Playback Volume", AK4458_13_L4CHATT,
237			 AK4458_14_R4CHATT, 0, 0xFF, 0, dac_tlv),
238	SOC_ENUM("AK4458 De-emphasis Response DAC1", ak4458_dac1_dem_enum),
239	SOC_ENUM("AK4458 De-emphasis Response DAC2", ak4458_dac2_dem_enum),
240	SOC_ENUM("AK4458 De-emphasis Response DAC3", ak4458_dac3_dem_enum),
241	SOC_ENUM("AK4458 De-emphasis Response DAC4", ak4458_dac4_dem_enum),
242	SOC_ENUM_EXT("AK4458 Digital Filter Setting", ak4458_digfil_enum,
243		     get_digfil, set_digfil),
244	SOC_ENUM("AK4458 Inverting Enable of DZFB", ak4458_dzfb_enum),
245	SOC_ENUM("AK4458 Sound Mode", ak4458_sm_enum),
246	SOC_ENUM("AK4458 FIR Filter Mode Setting", ak4458_fir_enum),
247	SOC_ENUM("AK4458 Attenuation transition Time Setting",
248		 ak4458_ats_enum),
249	SOC_ENUM("AK4458 BICK fs Setting", ak4458_dif_enum),
250};
251
252/* ak4458 dapm widgets */
253static const struct snd_soc_dapm_widget ak4458_dapm_widgets[] = {
254	SND_SOC_DAPM_DAC("AK4458 DAC1", NULL, AK4458_0A_CONTROL6, 2, 0),/*pw*/
255	SND_SOC_DAPM_AIF_IN("AK4458 SDTI", "Playback", 0, SND_SOC_NOPM, 0, 0),
256	SND_SOC_DAPM_OUTPUT("AK4458 AOUTA"),
257
258	SND_SOC_DAPM_DAC("AK4458 DAC2", NULL, AK4458_0A_CONTROL6, 3, 0),/*pw*/
259	SND_SOC_DAPM_OUTPUT("AK4458 AOUTB"),
260
261	SND_SOC_DAPM_DAC("AK4458 DAC3", NULL, AK4458_0B_CONTROL7, 2, 0),/*pw*/
262	SND_SOC_DAPM_OUTPUT("AK4458 AOUTC"),
263
264	SND_SOC_DAPM_DAC("AK4458 DAC4", NULL, AK4458_0B_CONTROL7, 3, 0),/*pw*/
265	SND_SOC_DAPM_OUTPUT("AK4458 AOUTD"),
266};
267
268static const struct snd_soc_dapm_route ak4458_intercon[] = {
269	{"AK4458 DAC1",		NULL,	"AK4458 SDTI"},
270	{"AK4458 AOUTA",	NULL,	"AK4458 DAC1"},
271
272	{"AK4458 DAC2",		NULL,	"AK4458 SDTI"},
273	{"AK4458 AOUTB",	NULL,	"AK4458 DAC2"},
274
275	{"AK4458 DAC3",		NULL,	"AK4458 SDTI"},
276	{"AK4458 AOUTC",	NULL,	"AK4458 DAC3"},
277
278	{"AK4458 DAC4",		NULL,	"AK4458 SDTI"},
279	{"AK4458 AOUTD",	NULL,	"AK4458 DAC4"},
280};
281
282/* ak4497 controls */
283static const struct snd_kcontrol_new ak4497_snd_controls[] = {
284	SOC_DOUBLE_R_TLV("DAC Playback Volume", AK4458_03_LCHATT,
285			 AK4458_04_RCHATT, 0, 0xFF, 0, dac_tlv),
286	SOC_ENUM("AK4497 De-emphasis Response DAC", ak4458_dac1_dem_enum),
287	SOC_ENUM_EXT("AK4497 Digital Filter Setting", ak4458_digfil_enum,
288		     get_digfil, set_digfil),
289	SOC_ENUM("AK4497 Inverting Enable of DZFB", ak4458_dzfb_enum),
290	SOC_ENUM("AK4497 Sound Mode", ak4458_sm_enum),
291	SOC_ENUM("AK4497 Attenuation transition Time Setting",
292		 ak4458_ats_enum),
293};
294
295/* ak4497 dapm widgets */
296static const struct snd_soc_dapm_widget ak4497_dapm_widgets[] = {
297	SND_SOC_DAPM_DAC("AK4497 DAC", NULL, AK4458_0A_CONTROL6, 2, 0),
298	SND_SOC_DAPM_AIF_IN("AK4497 SDTI", "Playback", 0, SND_SOC_NOPM, 0, 0),
299	SND_SOC_DAPM_OUTPUT("AK4497 AOUT"),
300};
301
302/* ak4497 dapm routes */
303static const struct snd_soc_dapm_route ak4497_intercon[] = {
304	{"AK4497 DAC",		NULL,	"AK4497 SDTI"},
305	{"AK4497 AOUT",		NULL,	"AK4497 DAC"},
306
307};
308
309static int ak4458_get_tdm_mode(struct ak4458_priv *ak4458)
310{
311	switch (ak4458->slots * ak4458->slot_width) {
312	case 128:
313		return 1;
314	case 256:
315		return 2;
316	case 512:
317		return 3;
318	default:
319		return 0;
320	}
321}
322
323static int ak4458_rstn_control(struct snd_soc_component *component, int bit)
324{
325	int ret;
326
327	if (bit)
328		ret = snd_soc_component_update_bits(component,
329					  AK4458_00_CONTROL1,
330					  AK4458_RSTN_MASK,
331					  0x1);
332	else
333		ret = snd_soc_component_update_bits(component,
334					  AK4458_00_CONTROL1,
335					  AK4458_RSTN_MASK,
336					  0x0);
337	if (ret < 0)
338		return ret;
339
340	return 0;
341}
342
343static int ak4458_hw_params(struct snd_pcm_substream *substream,
344			    struct snd_pcm_hw_params *params,
345			    struct snd_soc_dai *dai)
346{
347	struct snd_soc_component *component = dai->component;
348	struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
349	int pcm_width = max(params_physical_width(params), ak4458->slot_width);
350	u8 format, dsdsel0, dsdsel1, dchn;
351	int nfs1, dsd_bclk, ret, channels, channels_max;
352
353	nfs1 = params_rate(params);
354	ak4458->fs = nfs1;
355
356	/* calculate bit clock */
357	channels = params_channels(params);
358	channels_max = dai->driver->playback.channels_max;
359
360	switch (params_format(params)) {
361	case SNDRV_PCM_FORMAT_DSD_U8:
362	case SNDRV_PCM_FORMAT_DSD_U16_LE:
363	case SNDRV_PCM_FORMAT_DSD_U16_BE:
364	case SNDRV_PCM_FORMAT_DSD_U32_LE:
365	case SNDRV_PCM_FORMAT_DSD_U32_BE:
366		dsd_bclk = nfs1 * params_physical_width(params);
367		switch (dsd_bclk) {
368		case 2822400:
369			dsdsel0 = 0;
370			dsdsel1 = 0;
371			break;
372		case 5644800:
373			dsdsel0 = 1;
374			dsdsel1 = 0;
375			break;
376		case 11289600:
377			dsdsel0 = 0;
378			dsdsel1 = 1;
379			break;
380		case 22579200:
381			if (ak4458->drvdata->type == AK4497) {
382				dsdsel0 = 1;
383				dsdsel1 = 1;
384			} else {
385				dev_err(dai->dev, "DSD512 not supported.\n");
386				return -EINVAL;
387			}
388			break;
389		default:
390			dev_err(dai->dev, "Unsupported dsd bclk.\n");
391			return -EINVAL;
392		}
393
394		snd_soc_component_update_bits(component, AK4458_06_DSD1,
395					      AK4458_DSDSEL_MASK, dsdsel0);
396		snd_soc_component_update_bits(component, AK4458_09_DSD2,
397					      AK4458_DSDSEL_MASK, dsdsel1);
398		break;
399	}
400
401	/* Master Clock Frequency Auto Setting Mode Enable */
402	snd_soc_component_update_bits(component, AK4458_00_CONTROL1, 0x80, 0x80);
403
404	switch (pcm_width) {
405	case 16:
406		if (ak4458->fmt == SND_SOC_DAIFMT_I2S)
407			format = AK4458_DIF_24BIT_I2S;
408		else
409			format = AK4458_DIF_16BIT_LSB;
410		break;
411	case 32:
412		switch (ak4458->fmt) {
413		case SND_SOC_DAIFMT_I2S:
414			format = AK4458_DIF_32BIT_I2S;
415			break;
416		case SND_SOC_DAIFMT_LEFT_J:
417			format = AK4458_DIF_32BIT_MSB;
418			break;
419		case SND_SOC_DAIFMT_RIGHT_J:
420			format = AK4458_DIF_32BIT_LSB;
421			break;
422		case SND_SOC_DAIFMT_DSP_B:
423			format = AK4458_DIF_32BIT_MSB;
424			break;
425		case SND_SOC_DAIFMT_PDM:
426			format = AK4458_DIF_32BIT_MSB;
427			break;
428		default:
429			return -EINVAL;
430		}
431		break;
432	default:
433		return -EINVAL;
434	}
435
436	snd_soc_component_update_bits(component, AK4458_00_CONTROL1,
437			    AK4458_DIF_MASK, format);
438
439	/*
440	 * Enable/disable Daisy Chain if in TDM mode and the number of played
441	 * channels is bigger than the maximum supported number of channels
442	 */
443	dchn = ak4458_get_tdm_mode(ak4458) &&
444		(ak4458->fmt == SND_SOC_DAIFMT_DSP_B) &&
445		(channels > channels_max) ? AK4458_DCHAIN_MASK : 0;
446
447	snd_soc_component_update_bits(component, AK4458_0B_CONTROL7,
448				      AK4458_DCHAIN_MASK, dchn);
449
450	if (ak4458->drvdata->type == AK4497) {
451		ret = snd_soc_component_update_bits(component, AK4458_09_DSD2,
452						    0x4, (ak4458->dsd_path << 2));
453		if (ret < 0)
454			return ret;
455	}
456
457	ret = ak4458_rstn_control(component, 0);
458	if (ret)
459		return ret;
460
461	ret = ak4458_rstn_control(component, 1);
462	if (ret)
463		return ret;
464
465	return 0;
466}
467
468static int ak4458_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
469{
470	struct snd_soc_component *component = dai->component;
471	struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
472	int ret;
473
474	switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
475	case SND_SOC_DAIFMT_CBC_CFC: /* Consumer Mode */
476		break;
477	case SND_SOC_DAIFMT_CBP_CFP: /* Provider Mode is not supported */
478	case SND_SOC_DAIFMT_CBC_CFP:
479	case SND_SOC_DAIFMT_CBP_CFC:
480	default:
481		dev_err(component->dev, "Clock provider mode unsupported\n");
482		return -EINVAL;
483	}
484
485	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
486	case SND_SOC_DAIFMT_I2S:
487	case SND_SOC_DAIFMT_LEFT_J:
488	case SND_SOC_DAIFMT_RIGHT_J:
489	case SND_SOC_DAIFMT_DSP_B:
490	case SND_SOC_DAIFMT_PDM:
491		ak4458->fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
492		break;
493	default:
494		dev_err(component->dev, "Audio format 0x%02X unsupported\n",
495			fmt & SND_SOC_DAIFMT_FORMAT_MASK);
496		return -EINVAL;
497	}
498
499	/* DSD mode */
500	snd_soc_component_update_bits(component, AK4458_02_CONTROL3,
501				      AK4458_DP_MASK,
502				      ak4458->fmt == SND_SOC_DAIFMT_PDM ?
503				      AK4458_DP_MASK : 0);
504
505	ret = ak4458_rstn_control(component, 0);
506	if (ret)
507		return ret;
508
509	ret = ak4458_rstn_control(component, 1);
510	if (ret)
511		return ret;
512
513	return 0;
514}
515
516static const int att_speed[] = { 4080, 2040, 510, 255 };
517
518static int ak4458_set_dai_mute(struct snd_soc_dai *dai, int mute, int direction)
519{
520	struct snd_soc_component *component = dai->component;
521	struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
522	int nfs, ndt, reg;
523	int ats;
524
525	nfs = ak4458->fs;
526
527	reg = snd_soc_component_read(component, AK4458_0B_CONTROL7);
528	ats = (reg & AK4458_ATS_MASK) >> AK4458_ATS_SHIFT;
529
530	ndt = att_speed[ats] / (nfs / 1000);
531
532	if (mute) {
533		snd_soc_component_update_bits(component, AK4458_01_CONTROL2,  0x01, 1);
534		mdelay(ndt);
535		if (ak4458->mute_gpiod)
536			gpiod_set_value_cansleep(ak4458->mute_gpiod, 1);
537	} else {
538		if (ak4458->mute_gpiod)
539			gpiod_set_value_cansleep(ak4458->mute_gpiod, 0);
540		snd_soc_component_update_bits(component, AK4458_01_CONTROL2, 0x01, 0);
541		mdelay(ndt);
542	}
543
544	return 0;
545}
546
547static int ak4458_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
548			       unsigned int rx_mask, int slots, int slot_width)
549{
550	struct snd_soc_component *component = dai->component;
551	struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
552	int mode;
553
554	ak4458->slots = slots;
555	ak4458->slot_width = slot_width;
556
557	mode = ak4458_get_tdm_mode(ak4458) << AK4458_MODE_SHIFT;
558
559	snd_soc_component_update_bits(component, AK4458_0A_CONTROL6,
560			    AK4458_MODE_MASK,
561			    mode);
562
563	return 0;
564}
565
566#define AK4458_FORMATS	(SNDRV_PCM_FMTBIT_S16_LE |\
567			 SNDRV_PCM_FMTBIT_S24_LE |\
568			 SNDRV_PCM_FMTBIT_S32_LE |\
569			 SNDRV_PCM_FMTBIT_DSD_U8 |\
570			 SNDRV_PCM_FMTBIT_DSD_U16_LE |\
571			 SNDRV_PCM_FMTBIT_DSD_U32_LE)
572
573static const unsigned int ak4458_rates[] = {
574	8000, 11025,  16000, 22050,
575	32000, 44100, 48000, 88200,
576	96000, 176400, 192000, 352800,
577	384000, 705600, 768000, 1411200,
578	2822400,
579};
580
581static const struct snd_pcm_hw_constraint_list ak4458_rate_constraints = {
582	.count = ARRAY_SIZE(ak4458_rates),
583	.list = ak4458_rates,
584};
585
586static int ak4458_startup(struct snd_pcm_substream *substream,
587			  struct snd_soc_dai *dai)
588{
589	int ret;
590
591	ret = snd_pcm_hw_constraint_list(substream->runtime, 0,
592					 SNDRV_PCM_HW_PARAM_RATE,
593					 &ak4458_rate_constraints);
594
595	return ret;
596}
597
598static const struct snd_soc_dai_ops ak4458_dai_ops = {
599	.startup        = ak4458_startup,
600	.hw_params	= ak4458_hw_params,
601	.set_fmt	= ak4458_set_dai_fmt,
602	.mute_stream	= ak4458_set_dai_mute,
603	.set_tdm_slot	= ak4458_set_tdm_slot,
604	.no_capture_mute = 1,
605};
606
607static struct snd_soc_dai_driver ak4458_dai = {
608	.name = "ak4458-aif",
609	.playback = {
610		.stream_name = "Playback",
611		.channels_min = 1,
612		.channels_max = 8,
613		.rates = SNDRV_PCM_RATE_KNOT,
614		.formats = AK4458_FORMATS,
615	},
616	.ops = &ak4458_dai_ops,
617};
618
619static struct snd_soc_dai_driver ak4497_dai = {
620	.name = "ak4497-aif",
621	.playback = {
622		.stream_name = "Playback",
623		.channels_min = 1,
624		.channels_max = 2,
625		.rates = SNDRV_PCM_RATE_KNOT,
626		.formats = AK4458_FORMATS,
627	},
628	.ops = &ak4458_dai_ops,
629};
630
631static void ak4458_reset(struct ak4458_priv *ak4458, bool active)
632{
633	if (!IS_ERR_OR_NULL(ak4458->reset)) {
 
 
 
634		if (active)
635			reset_control_assert(ak4458->reset);
636		else
637			reset_control_deassert(ak4458->reset);
638		usleep_range(1000, 2000);
639	}
640}
641
642#ifdef CONFIG_PM
643static int __maybe_unused ak4458_runtime_suspend(struct device *dev)
644{
645	struct ak4458_priv *ak4458 = dev_get_drvdata(dev);
646
647	regcache_cache_only(ak4458->regmap, true);
648
649	ak4458_reset(ak4458, true);
650
651	if (ak4458->mute_gpiod)
652		gpiod_set_value_cansleep(ak4458->mute_gpiod, 0);
653
654	regulator_bulk_disable(ARRAY_SIZE(ak4458->supplies),
655			       ak4458->supplies);
656	return 0;
657}
658
659static int __maybe_unused ak4458_runtime_resume(struct device *dev)
660{
661	struct ak4458_priv *ak4458 = dev_get_drvdata(dev);
662	int ret;
663
664	ret = regulator_bulk_enable(ARRAY_SIZE(ak4458->supplies),
665				    ak4458->supplies);
666	if (ret != 0) {
667		dev_err(ak4458->dev, "Failed to enable supplies: %d\n", ret);
668		return ret;
669	}
670
671	if (ak4458->mute_gpiod)
672		gpiod_set_value_cansleep(ak4458->mute_gpiod, 1);
673
674	ak4458_reset(ak4458, false);
675
676	regcache_cache_only(ak4458->regmap, false);
677	regcache_mark_dirty(ak4458->regmap);
678
679	return regcache_sync(ak4458->regmap);
680}
681#endif /* CONFIG_PM */
682
683static const struct snd_soc_component_driver soc_codec_dev_ak4458 = {
684	.controls		= ak4458_snd_controls,
685	.num_controls		= ARRAY_SIZE(ak4458_snd_controls),
686	.dapm_widgets		= ak4458_dapm_widgets,
687	.num_dapm_widgets	= ARRAY_SIZE(ak4458_dapm_widgets),
688	.dapm_routes		= ak4458_intercon,
689	.num_dapm_routes	= ARRAY_SIZE(ak4458_intercon),
690	.idle_bias_on		= 1,
691	.use_pmdown_time	= 1,
692	.endianness		= 1,
693};
694
695static const struct snd_soc_component_driver soc_codec_dev_ak4497 = {
696	.controls		= ak4497_snd_controls,
697	.num_controls		= ARRAY_SIZE(ak4497_snd_controls),
698	.dapm_widgets		= ak4497_dapm_widgets,
699	.num_dapm_widgets	= ARRAY_SIZE(ak4497_dapm_widgets),
700	.dapm_routes		= ak4497_intercon,
701	.num_dapm_routes	= ARRAY_SIZE(ak4497_intercon),
702	.idle_bias_on		= 1,
703	.use_pmdown_time	= 1,
704	.endianness		= 1,
705};
706
707static const struct regmap_config ak4458_regmap = {
708	.reg_bits = 8,
709	.val_bits = 8,
710
711	.max_register = AK4458_14_R4CHATT,
712	.reg_defaults = ak4458_reg_defaults,
713	.num_reg_defaults = ARRAY_SIZE(ak4458_reg_defaults),
714	.cache_type = REGCACHE_RBTREE,
715};
716
717static const struct ak4458_drvdata ak4458_drvdata = {
718	.dai_drv = &ak4458_dai,
719	.comp_drv = &soc_codec_dev_ak4458,
720	.type = AK4458,
721};
722
723static const struct ak4458_drvdata ak4497_drvdata = {
724	.dai_drv = &ak4497_dai,
725	.comp_drv = &soc_codec_dev_ak4497,
726	.type = AK4497,
727};
728
729static const struct dev_pm_ops ak4458_pm = {
730	SET_RUNTIME_PM_OPS(ak4458_runtime_suspend, ak4458_runtime_resume, NULL)
731	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
732				pm_runtime_force_resume)
733};
734
735static int ak4458_i2c_probe(struct i2c_client *i2c)
736{
737	struct ak4458_priv *ak4458;
738	int ret, i;
739
740	ak4458 = devm_kzalloc(&i2c->dev, sizeof(*ak4458), GFP_KERNEL);
741	if (!ak4458)
742		return -ENOMEM;
743
744	ak4458->regmap = devm_regmap_init_i2c(i2c, &ak4458_regmap);
745	if (IS_ERR(ak4458->regmap))
746		return PTR_ERR(ak4458->regmap);
747
748	i2c_set_clientdata(i2c, ak4458);
749	ak4458->dev = &i2c->dev;
750
751	ak4458->drvdata = of_device_get_match_data(&i2c->dev);
752
753	ak4458->reset = devm_reset_control_get_optional_shared(ak4458->dev, NULL);
754	if (IS_ERR(ak4458->reset))
755		return PTR_ERR(ak4458->reset);
 
 
 
 
 
756
757	ak4458->mute_gpiod = devm_gpiod_get_optional(ak4458->dev, "mute",
758						     GPIOD_OUT_LOW);
759	if (IS_ERR(ak4458->mute_gpiod))
760		return PTR_ERR(ak4458->mute_gpiod);
761
762	/* Optional property for ak4497 */
763	of_property_read_u32(i2c->dev.of_node, "dsd-path", &ak4458->dsd_path);
764
765	for (i = 0; i < ARRAY_SIZE(ak4458->supplies); i++)
766		ak4458->supplies[i].supply = ak4458_supply_names[i];
767
768	ret = devm_regulator_bulk_get(ak4458->dev, ARRAY_SIZE(ak4458->supplies),
769				      ak4458->supplies);
770	if (ret != 0) {
771		dev_err(ak4458->dev, "Failed to request supplies: %d\n", ret);
772		return ret;
773	}
774
775	ret = devm_snd_soc_register_component(ak4458->dev,
776					      ak4458->drvdata->comp_drv,
777					      ak4458->drvdata->dai_drv, 1);
778	if (ret < 0) {
779		dev_err(ak4458->dev, "Failed to register CODEC: %d\n", ret);
780		return ret;
781	}
782
783	pm_runtime_enable(&i2c->dev);
784	regcache_cache_only(ak4458->regmap, true);
785	ak4458_reset(ak4458, false);
786
787	return 0;
788}
789
790static void ak4458_i2c_remove(struct i2c_client *i2c)
791{
792	struct ak4458_priv *ak4458 = i2c_get_clientdata(i2c);
793
794	ak4458_reset(ak4458, true);
795	pm_runtime_disable(&i2c->dev);
796}
797
798static const struct of_device_id ak4458_of_match[] = {
799	{ .compatible = "asahi-kasei,ak4458", .data = &ak4458_drvdata},
800	{ .compatible = "asahi-kasei,ak4497", .data = &ak4497_drvdata},
801	{ },
802};
803MODULE_DEVICE_TABLE(of, ak4458_of_match);
804
805static struct i2c_driver ak4458_i2c_driver = {
806	.driver = {
807		.name = "ak4458",
808		.pm = &ak4458_pm,
809		.of_match_table = ak4458_of_match,
810		},
811	.probe = ak4458_i2c_probe,
812	.remove = ak4458_i2c_remove,
813};
814
815module_i2c_driver(ak4458_i2c_driver);
816
817MODULE_AUTHOR("Junichi Wakasugi <wakasugi.jb@om.asahi-kasei.co.jp>");
818MODULE_AUTHOR("Mihai Serban <mihai.serban@nxp.com>");
819MODULE_DESCRIPTION("ASoC AK4458 DAC driver");
820MODULE_LICENSE("GPL v2");
v6.8
  1// SPDX-License-Identifier: GPL-2.0
  2//
  3// Audio driver for AK4458 DAC
  4//
  5// Copyright (C) 2016 Asahi Kasei Microdevices Corporation
  6// Copyright 2018 NXP
  7
  8#include <linux/delay.h>
  9#include <linux/gpio/consumer.h>
 10#include <linux/i2c.h>
 11#include <linux/module.h>
 12#include <linux/of.h>
 13#include <linux/of_gpio.h>
 14#include <linux/pm_runtime.h>
 15#include <linux/regulator/consumer.h>
 16#include <linux/reset.h>
 17#include <linux/slab.h>
 18#include <sound/initval.h>
 19#include <sound/pcm_params.h>
 20#include <sound/soc.h>
 21#include <sound/soc-dapm.h>
 22#include <sound/tlv.h>
 23
 24#include "ak4458.h"
 25
 26#define AK4458_NUM_SUPPLIES 2
 27static const char *ak4458_supply_names[AK4458_NUM_SUPPLIES] = {
 28	"DVDD",
 29	"AVDD",
 30};
 31
 32enum ak4458_type {
 33	AK4458 = 0,
 34	AK4497 = 1,
 35};
 36
 37struct ak4458_drvdata {
 38	struct snd_soc_dai_driver *dai_drv;
 39	const struct snd_soc_component_driver *comp_drv;
 40	enum ak4458_type type;
 41};
 42
 43/* AK4458 Codec Private Data */
 44struct ak4458_priv {
 45	struct regulator_bulk_data supplies[AK4458_NUM_SUPPLIES];
 46	const struct ak4458_drvdata *drvdata;
 47	struct device *dev;
 48	struct regmap *regmap;
 49	struct gpio_desc *reset_gpiod;
 50	struct reset_control *reset;
 51	struct gpio_desc *mute_gpiod;
 52	int digfil;	/* SSLOW, SD, SLOW bits */
 53	int fs;		/* sampling rate */
 54	int fmt;
 55	int slots;
 56	int slot_width;
 57	u32 dsd_path;    /* For ak4497 */
 58};
 59
 60static const struct reg_default ak4458_reg_defaults[] = {
 61	{ 0x00, 0x0C },	/*	0x00	AK4458_00_CONTROL1	*/
 62	{ 0x01, 0x22 },	/*	0x01	AK4458_01_CONTROL2	*/
 63	{ 0x02, 0x00 },	/*	0x02	AK4458_02_CONTROL3	*/
 64	{ 0x03, 0xFF },	/*	0x03	AK4458_03_LCHATT	*/
 65	{ 0x04, 0xFF },	/*	0x04	AK4458_04_RCHATT	*/
 66	{ 0x05, 0x00 },	/*	0x05	AK4458_05_CONTROL4	*/
 67	{ 0x06, 0x00 },	/*	0x06	AK4458_06_DSD1		*/
 68	{ 0x07, 0x03 },	/*	0x07	AK4458_07_CONTROL5	*/
 69	{ 0x08, 0x00 },	/*	0x08	AK4458_08_SOUND_CONTROL	*/
 70	{ 0x09, 0x00 },	/*	0x09	AK4458_09_DSD2		*/
 71	{ 0x0A, 0x0D },	/*	0x0A	AK4458_0A_CONTROL6	*/
 72	{ 0x0B, 0x0C },	/*	0x0B	AK4458_0B_CONTROL7	*/
 73	{ 0x0C, 0x00 },	/*	0x0C	AK4458_0C_CONTROL8	*/
 74	{ 0x0D, 0x00 },	/*	0x0D	AK4458_0D_CONTROL9	*/
 75	{ 0x0E, 0x50 },	/*	0x0E	AK4458_0E_CONTROL10	*/
 76	{ 0x0F, 0xFF },	/*	0x0F	AK4458_0F_L2CHATT	*/
 77	{ 0x10, 0xFF },	/*	0x10	AK4458_10_R2CHATT	*/
 78	{ 0x11, 0xFF },	/*	0x11	AK4458_11_L3CHATT	*/
 79	{ 0x12, 0xFF },	/*	0x12	AK4458_12_R3CHATT	*/
 80	{ 0x13, 0xFF },	/*	0x13	AK4458_13_L4CHATT	*/
 81	{ 0x14, 0xFF },	/*	0x14	AK4458_14_R4CHATT	*/
 82};
 83
 84/*
 85 * Volume control:
 86 * from -127 to 0 dB in 0.5 dB steps (mute instead of -127.5 dB)
 87 */
 88static DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
 89
 90/*
 91 * DEM1 bit DEM0 bit Mode
 92 * 0 0 44.1kHz
 93 * 0 1 OFF (default)
 94 * 1 0 48kHz
 95 * 1 1 32kHz
 96 */
 97static const char * const ak4458_dem_select_texts[] = {
 98	"44.1kHz", "OFF", "48kHz", "32kHz"
 99};
100
101/*
102 * SSLOW, SD, SLOW bits Digital Filter Setting
103 * 0, 0, 0 : Sharp Roll-Off Filter
104 * 0, 0, 1 : Slow Roll-Off Filter
105 * 0, 1, 0 : Short delay Sharp Roll-Off Filter
106 * 0, 1, 1 : Short delay Slow Roll-Off Filter
107 * 1, *, * : Super Slow Roll-Off Filter
108 */
109static const char * const ak4458_digfil_select_texts[] = {
110	"Sharp Roll-Off Filter",
111	"Slow Roll-Off Filter",
112	"Short delay Sharp Roll-Off Filter",
113	"Short delay Slow Roll-Off Filter",
114	"Super Slow Roll-Off Filter"
115};
116
117/*
118 * DZFB: Inverting Enable of DZF
119 * 0: DZF goes H at Zero Detection
120 * 1: DZF goes L at Zero Detection
121 */
122static const char * const ak4458_dzfb_select_texts[] = {"H", "L"};
123
124/*
125 * SC1-0 bits: Sound Mode Setting
126 * 0 0 : Sound Mode 0
127 * 0 1 : Sound Mode 1
128 * 1 0 : Sound Mode 2
129 * 1 1 : Reserved
130 */
131static const char * const ak4458_sc_select_texts[] = {
132	"Sound Mode 0", "Sound Mode 1", "Sound Mode 2"
133};
134
135/* FIR2-0 bits: FIR Filter Mode Setting */
136static const char * const ak4458_fir_select_texts[] = {
137	"Mode 0", "Mode 1", "Mode 2", "Mode 3",
138	"Mode 4", "Mode 5", "Mode 6", "Mode 7",
139};
140
141/* ATS1-0 bits Attenuation Speed */
142static const char * const ak4458_ats_select_texts[] = {
143	"4080/fs", "2040/fs", "510/fs", "255/fs",
144};
145
146/* DIF2 bit Audio Interface Format Setting(BICK fs) */
147static const char * const ak4458_dif_select_texts[] = {"32fs,48fs", "64fs",};
148
149static const struct soc_enum ak4458_dac1_dem_enum =
150	SOC_ENUM_SINGLE(AK4458_01_CONTROL2, 1,
151			ARRAY_SIZE(ak4458_dem_select_texts),
152			ak4458_dem_select_texts);
153static const struct soc_enum ak4458_dac2_dem_enum =
154	SOC_ENUM_SINGLE(AK4458_0A_CONTROL6, 0,
155			ARRAY_SIZE(ak4458_dem_select_texts),
156			ak4458_dem_select_texts);
157static const struct soc_enum ak4458_dac3_dem_enum =
158	SOC_ENUM_SINGLE(AK4458_0E_CONTROL10, 4,
159			ARRAY_SIZE(ak4458_dem_select_texts),
160			ak4458_dem_select_texts);
161static const struct soc_enum ak4458_dac4_dem_enum =
162	SOC_ENUM_SINGLE(AK4458_0E_CONTROL10, 6,
163			ARRAY_SIZE(ak4458_dem_select_texts),
164			ak4458_dem_select_texts);
165static const struct soc_enum ak4458_digfil_enum =
166	SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(ak4458_digfil_select_texts),
167			    ak4458_digfil_select_texts);
168static const struct soc_enum ak4458_dzfb_enum =
169	SOC_ENUM_SINGLE(AK4458_02_CONTROL3, 2,
170			ARRAY_SIZE(ak4458_dzfb_select_texts),
171			ak4458_dzfb_select_texts);
172static const struct soc_enum ak4458_sm_enum =
173	SOC_ENUM_SINGLE(AK4458_08_SOUND_CONTROL, 0,
174			ARRAY_SIZE(ak4458_sc_select_texts),
175			ak4458_sc_select_texts);
176static const struct soc_enum ak4458_fir_enum =
177	SOC_ENUM_SINGLE(AK4458_0C_CONTROL8, 0,
178			ARRAY_SIZE(ak4458_fir_select_texts),
179			ak4458_fir_select_texts);
180static const struct soc_enum ak4458_ats_enum =
181	SOC_ENUM_SINGLE(AK4458_0B_CONTROL7, 6,
182			ARRAY_SIZE(ak4458_ats_select_texts),
183			ak4458_ats_select_texts);
184static const struct soc_enum ak4458_dif_enum =
185	SOC_ENUM_SINGLE(AK4458_00_CONTROL1, 3,
186			ARRAY_SIZE(ak4458_dif_select_texts),
187			ak4458_dif_select_texts);
188
189static int get_digfil(struct snd_kcontrol *kcontrol,
190		      struct snd_ctl_elem_value *ucontrol)
191{
192	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
193	struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
194
195	ucontrol->value.enumerated.item[0] = ak4458->digfil;
196
197	return 0;
198}
199
200static int set_digfil(struct snd_kcontrol *kcontrol,
201		      struct snd_ctl_elem_value *ucontrol)
202{
203	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
204	struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
205	int num;
206
207	num = ucontrol->value.enumerated.item[0];
208	if (num > 4)
209		return -EINVAL;
210
211	ak4458->digfil = num;
212
213	/* write SD bit */
214	snd_soc_component_update_bits(component, AK4458_01_CONTROL2,
215			    AK4458_SD_MASK,
216			    ((ak4458->digfil & 0x02) << 4));
217
218	/* write SLOW bit */
219	snd_soc_component_update_bits(component, AK4458_02_CONTROL3,
220			    AK4458_SLOW_MASK,
221			    (ak4458->digfil & 0x01));
222
223	/* write SSLOW bit */
224	snd_soc_component_update_bits(component, AK4458_05_CONTROL4,
225			    AK4458_SSLOW_MASK,
226			    ((ak4458->digfil & 0x04) >> 2));
227
228	return 0;
229}
230
231static const struct snd_kcontrol_new ak4458_snd_controls[] = {
232	SOC_DOUBLE_R_TLV("DAC1 Playback Volume", AK4458_03_LCHATT,
233			 AK4458_04_RCHATT, 0, 0xFF, 0, dac_tlv),
234	SOC_DOUBLE_R_TLV("DAC2 Playback Volume", AK4458_0F_L2CHATT,
235			 AK4458_10_R2CHATT, 0, 0xFF, 0, dac_tlv),
236	SOC_DOUBLE_R_TLV("DAC3 Playback Volume", AK4458_11_L3CHATT,
237			 AK4458_12_R3CHATT, 0, 0xFF, 0, dac_tlv),
238	SOC_DOUBLE_R_TLV("DAC4 Playback Volume", AK4458_13_L4CHATT,
239			 AK4458_14_R4CHATT, 0, 0xFF, 0, dac_tlv),
240	SOC_ENUM("AK4458 De-emphasis Response DAC1", ak4458_dac1_dem_enum),
241	SOC_ENUM("AK4458 De-emphasis Response DAC2", ak4458_dac2_dem_enum),
242	SOC_ENUM("AK4458 De-emphasis Response DAC3", ak4458_dac3_dem_enum),
243	SOC_ENUM("AK4458 De-emphasis Response DAC4", ak4458_dac4_dem_enum),
244	SOC_ENUM_EXT("AK4458 Digital Filter Setting", ak4458_digfil_enum,
245		     get_digfil, set_digfil),
246	SOC_ENUM("AK4458 Inverting Enable of DZFB", ak4458_dzfb_enum),
247	SOC_ENUM("AK4458 Sound Mode", ak4458_sm_enum),
248	SOC_ENUM("AK4458 FIR Filter Mode Setting", ak4458_fir_enum),
249	SOC_ENUM("AK4458 Attenuation transition Time Setting",
250		 ak4458_ats_enum),
251	SOC_ENUM("AK4458 BICK fs Setting", ak4458_dif_enum),
252};
253
254/* ak4458 dapm widgets */
255static const struct snd_soc_dapm_widget ak4458_dapm_widgets[] = {
256	SND_SOC_DAPM_DAC("AK4458 DAC1", NULL, AK4458_0A_CONTROL6, 2, 0),/*pw*/
257	SND_SOC_DAPM_AIF_IN("AK4458 SDTI", "Playback", 0, SND_SOC_NOPM, 0, 0),
258	SND_SOC_DAPM_OUTPUT("AK4458 AOUTA"),
259
260	SND_SOC_DAPM_DAC("AK4458 DAC2", NULL, AK4458_0A_CONTROL6, 3, 0),/*pw*/
261	SND_SOC_DAPM_OUTPUT("AK4458 AOUTB"),
262
263	SND_SOC_DAPM_DAC("AK4458 DAC3", NULL, AK4458_0B_CONTROL7, 2, 0),/*pw*/
264	SND_SOC_DAPM_OUTPUT("AK4458 AOUTC"),
265
266	SND_SOC_DAPM_DAC("AK4458 DAC4", NULL, AK4458_0B_CONTROL7, 3, 0),/*pw*/
267	SND_SOC_DAPM_OUTPUT("AK4458 AOUTD"),
268};
269
270static const struct snd_soc_dapm_route ak4458_intercon[] = {
271	{"AK4458 DAC1",		NULL,	"AK4458 SDTI"},
272	{"AK4458 AOUTA",	NULL,	"AK4458 DAC1"},
273
274	{"AK4458 DAC2",		NULL,	"AK4458 SDTI"},
275	{"AK4458 AOUTB",	NULL,	"AK4458 DAC2"},
276
277	{"AK4458 DAC3",		NULL,	"AK4458 SDTI"},
278	{"AK4458 AOUTC",	NULL,	"AK4458 DAC3"},
279
280	{"AK4458 DAC4",		NULL,	"AK4458 SDTI"},
281	{"AK4458 AOUTD",	NULL,	"AK4458 DAC4"},
282};
283
284/* ak4497 controls */
285static const struct snd_kcontrol_new ak4497_snd_controls[] = {
286	SOC_DOUBLE_R_TLV("DAC Playback Volume", AK4458_03_LCHATT,
287			 AK4458_04_RCHATT, 0, 0xFF, 0, dac_tlv),
288	SOC_ENUM("AK4497 De-emphasis Response DAC", ak4458_dac1_dem_enum),
289	SOC_ENUM_EXT("AK4497 Digital Filter Setting", ak4458_digfil_enum,
290		     get_digfil, set_digfil),
291	SOC_ENUM("AK4497 Inverting Enable of DZFB", ak4458_dzfb_enum),
292	SOC_ENUM("AK4497 Sound Mode", ak4458_sm_enum),
293	SOC_ENUM("AK4497 Attenuation transition Time Setting",
294		 ak4458_ats_enum),
295};
296
297/* ak4497 dapm widgets */
298static const struct snd_soc_dapm_widget ak4497_dapm_widgets[] = {
299	SND_SOC_DAPM_DAC("AK4497 DAC", NULL, AK4458_0A_CONTROL6, 2, 0),
300	SND_SOC_DAPM_AIF_IN("AK4497 SDTI", "Playback", 0, SND_SOC_NOPM, 0, 0),
301	SND_SOC_DAPM_OUTPUT("AK4497 AOUT"),
302};
303
304/* ak4497 dapm routes */
305static const struct snd_soc_dapm_route ak4497_intercon[] = {
306	{"AK4497 DAC",		NULL,	"AK4497 SDTI"},
307	{"AK4497 AOUT",		NULL,	"AK4497 DAC"},
308
309};
310
311static int ak4458_get_tdm_mode(struct ak4458_priv *ak4458)
312{
313	switch (ak4458->slots * ak4458->slot_width) {
314	case 128:
315		return 1;
316	case 256:
317		return 2;
318	case 512:
319		return 3;
320	default:
321		return 0;
322	}
323}
324
325static int ak4458_rstn_control(struct snd_soc_component *component, int bit)
326{
327	int ret;
328
329	if (bit)
330		ret = snd_soc_component_update_bits(component,
331					  AK4458_00_CONTROL1,
332					  AK4458_RSTN_MASK,
333					  0x1);
334	else
335		ret = snd_soc_component_update_bits(component,
336					  AK4458_00_CONTROL1,
337					  AK4458_RSTN_MASK,
338					  0x0);
339	if (ret < 0)
340		return ret;
341
342	return 0;
343}
344
345static int ak4458_hw_params(struct snd_pcm_substream *substream,
346			    struct snd_pcm_hw_params *params,
347			    struct snd_soc_dai *dai)
348{
349	struct snd_soc_component *component = dai->component;
350	struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
351	int pcm_width = max(params_physical_width(params), ak4458->slot_width);
352	u8 format, dsdsel0, dsdsel1, dchn;
353	int nfs1, dsd_bclk, ret, channels, channels_max;
354
355	nfs1 = params_rate(params);
356	ak4458->fs = nfs1;
357
358	/* calculate bit clock */
359	channels = params_channels(params);
360	channels_max = dai->driver->playback.channels_max;
361
362	switch (params_format(params)) {
363	case SNDRV_PCM_FORMAT_DSD_U8:
364	case SNDRV_PCM_FORMAT_DSD_U16_LE:
365	case SNDRV_PCM_FORMAT_DSD_U16_BE:
366	case SNDRV_PCM_FORMAT_DSD_U32_LE:
367	case SNDRV_PCM_FORMAT_DSD_U32_BE:
368		dsd_bclk = nfs1 * params_physical_width(params);
369		switch (dsd_bclk) {
370		case 2822400:
371			dsdsel0 = 0;
372			dsdsel1 = 0;
373			break;
374		case 5644800:
375			dsdsel0 = 1;
376			dsdsel1 = 0;
377			break;
378		case 11289600:
379			dsdsel0 = 0;
380			dsdsel1 = 1;
381			break;
382		case 22579200:
383			if (ak4458->drvdata->type == AK4497) {
384				dsdsel0 = 1;
385				dsdsel1 = 1;
386			} else {
387				dev_err(dai->dev, "DSD512 not supported.\n");
388				return -EINVAL;
389			}
390			break;
391		default:
392			dev_err(dai->dev, "Unsupported dsd bclk.\n");
393			return -EINVAL;
394		}
395
396		snd_soc_component_update_bits(component, AK4458_06_DSD1,
397					      AK4458_DSDSEL_MASK, dsdsel0);
398		snd_soc_component_update_bits(component, AK4458_09_DSD2,
399					      AK4458_DSDSEL_MASK, dsdsel1);
400		break;
401	}
402
403	/* Master Clock Frequency Auto Setting Mode Enable */
404	snd_soc_component_update_bits(component, AK4458_00_CONTROL1, 0x80, 0x80);
405
406	switch (pcm_width) {
407	case 16:
408		if (ak4458->fmt == SND_SOC_DAIFMT_I2S)
409			format = AK4458_DIF_24BIT_I2S;
410		else
411			format = AK4458_DIF_16BIT_LSB;
412		break;
413	case 32:
414		switch (ak4458->fmt) {
415		case SND_SOC_DAIFMT_I2S:
416			format = AK4458_DIF_32BIT_I2S;
417			break;
418		case SND_SOC_DAIFMT_LEFT_J:
419			format = AK4458_DIF_32BIT_MSB;
420			break;
421		case SND_SOC_DAIFMT_RIGHT_J:
422			format = AK4458_DIF_32BIT_LSB;
423			break;
424		case SND_SOC_DAIFMT_DSP_B:
425			format = AK4458_DIF_32BIT_MSB;
426			break;
427		case SND_SOC_DAIFMT_PDM:
428			format = AK4458_DIF_32BIT_MSB;
429			break;
430		default:
431			return -EINVAL;
432		}
433		break;
434	default:
435		return -EINVAL;
436	}
437
438	snd_soc_component_update_bits(component, AK4458_00_CONTROL1,
439			    AK4458_DIF_MASK, format);
440
441	/*
442	 * Enable/disable Daisy Chain if in TDM mode and the number of played
443	 * channels is bigger than the maximum supported number of channels
444	 */
445	dchn = ak4458_get_tdm_mode(ak4458) &&
446		(ak4458->fmt == SND_SOC_DAIFMT_DSP_B) &&
447		(channels > channels_max) ? AK4458_DCHAIN_MASK : 0;
448
449	snd_soc_component_update_bits(component, AK4458_0B_CONTROL7,
450				      AK4458_DCHAIN_MASK, dchn);
451
452	if (ak4458->drvdata->type == AK4497) {
453		ret = snd_soc_component_update_bits(component, AK4458_09_DSD2,
454						    0x4, (ak4458->dsd_path << 2));
455		if (ret < 0)
456			return ret;
457	}
458
459	ret = ak4458_rstn_control(component, 0);
460	if (ret)
461		return ret;
462
463	ret = ak4458_rstn_control(component, 1);
464	if (ret)
465		return ret;
466
467	return 0;
468}
469
470static int ak4458_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
471{
472	struct snd_soc_component *component = dai->component;
473	struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
474	int ret;
475
476	switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
477	case SND_SOC_DAIFMT_CBC_CFC: /* Consumer Mode */
478		break;
479	case SND_SOC_DAIFMT_CBP_CFP: /* Provider Mode is not supported */
480	case SND_SOC_DAIFMT_CBC_CFP:
481	case SND_SOC_DAIFMT_CBP_CFC:
482	default:
483		dev_err(component->dev, "Clock provider mode unsupported\n");
484		return -EINVAL;
485	}
486
487	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
488	case SND_SOC_DAIFMT_I2S:
489	case SND_SOC_DAIFMT_LEFT_J:
490	case SND_SOC_DAIFMT_RIGHT_J:
491	case SND_SOC_DAIFMT_DSP_B:
492	case SND_SOC_DAIFMT_PDM:
493		ak4458->fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
494		break;
495	default:
496		dev_err(component->dev, "Audio format 0x%02X unsupported\n",
497			fmt & SND_SOC_DAIFMT_FORMAT_MASK);
498		return -EINVAL;
499	}
500
501	/* DSD mode */
502	snd_soc_component_update_bits(component, AK4458_02_CONTROL3,
503				      AK4458_DP_MASK,
504				      ak4458->fmt == SND_SOC_DAIFMT_PDM ?
505				      AK4458_DP_MASK : 0);
506
507	ret = ak4458_rstn_control(component, 0);
508	if (ret)
509		return ret;
510
511	ret = ak4458_rstn_control(component, 1);
512	if (ret)
513		return ret;
514
515	return 0;
516}
517
518static const int att_speed[] = { 4080, 2040, 510, 255 };
519
520static int ak4458_set_dai_mute(struct snd_soc_dai *dai, int mute, int direction)
521{
522	struct snd_soc_component *component = dai->component;
523	struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
524	int nfs, ndt, reg;
525	int ats;
526
527	nfs = ak4458->fs;
528
529	reg = snd_soc_component_read(component, AK4458_0B_CONTROL7);
530	ats = (reg & AK4458_ATS_MASK) >> AK4458_ATS_SHIFT;
531
532	ndt = att_speed[ats] / (nfs / 1000);
533
534	if (mute) {
535		snd_soc_component_update_bits(component, AK4458_01_CONTROL2,  0x01, 1);
536		mdelay(ndt);
537		if (ak4458->mute_gpiod)
538			gpiod_set_value_cansleep(ak4458->mute_gpiod, 1);
539	} else {
540		if (ak4458->mute_gpiod)
541			gpiod_set_value_cansleep(ak4458->mute_gpiod, 0);
542		snd_soc_component_update_bits(component, AK4458_01_CONTROL2, 0x01, 0);
543		mdelay(ndt);
544	}
545
546	return 0;
547}
548
549static int ak4458_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
550			       unsigned int rx_mask, int slots, int slot_width)
551{
552	struct snd_soc_component *component = dai->component;
553	struct ak4458_priv *ak4458 = snd_soc_component_get_drvdata(component);
554	int mode;
555
556	ak4458->slots = slots;
557	ak4458->slot_width = slot_width;
558
559	mode = ak4458_get_tdm_mode(ak4458) << AK4458_MODE_SHIFT;
560
561	snd_soc_component_update_bits(component, AK4458_0A_CONTROL6,
562			    AK4458_MODE_MASK,
563			    mode);
564
565	return 0;
566}
567
568#define AK4458_FORMATS	(SNDRV_PCM_FMTBIT_S16_LE |\
569			 SNDRV_PCM_FMTBIT_S24_LE |\
570			 SNDRV_PCM_FMTBIT_S32_LE |\
571			 SNDRV_PCM_FMTBIT_DSD_U8 |\
572			 SNDRV_PCM_FMTBIT_DSD_U16_LE |\
573			 SNDRV_PCM_FMTBIT_DSD_U32_LE)
574
575static const unsigned int ak4458_rates[] = {
576	8000, 11025,  16000, 22050,
577	32000, 44100, 48000, 88200,
578	96000, 176400, 192000, 352800,
579	384000, 705600, 768000, 1411200,
580	2822400,
581};
582
583static const struct snd_pcm_hw_constraint_list ak4458_rate_constraints = {
584	.count = ARRAY_SIZE(ak4458_rates),
585	.list = ak4458_rates,
586};
587
588static int ak4458_startup(struct snd_pcm_substream *substream,
589			  struct snd_soc_dai *dai)
590{
591	int ret;
592
593	ret = snd_pcm_hw_constraint_list(substream->runtime, 0,
594					 SNDRV_PCM_HW_PARAM_RATE,
595					 &ak4458_rate_constraints);
596
597	return ret;
598}
599
600static const struct snd_soc_dai_ops ak4458_dai_ops = {
601	.startup        = ak4458_startup,
602	.hw_params	= ak4458_hw_params,
603	.set_fmt	= ak4458_set_dai_fmt,
604	.mute_stream	= ak4458_set_dai_mute,
605	.set_tdm_slot	= ak4458_set_tdm_slot,
606	.no_capture_mute = 1,
607};
608
609static struct snd_soc_dai_driver ak4458_dai = {
610	.name = "ak4458-aif",
611	.playback = {
612		.stream_name = "Playback",
613		.channels_min = 1,
614		.channels_max = 8,
615		.rates = SNDRV_PCM_RATE_KNOT,
616		.formats = AK4458_FORMATS,
617	},
618	.ops = &ak4458_dai_ops,
619};
620
621static struct snd_soc_dai_driver ak4497_dai = {
622	.name = "ak4497-aif",
623	.playback = {
624		.stream_name = "Playback",
625		.channels_min = 1,
626		.channels_max = 2,
627		.rates = SNDRV_PCM_RATE_KNOT,
628		.formats = AK4458_FORMATS,
629	},
630	.ops = &ak4458_dai_ops,
631};
632
633static void ak4458_reset(struct ak4458_priv *ak4458, bool active)
634{
635	if (ak4458->reset_gpiod) {
636		gpiod_set_value_cansleep(ak4458->reset_gpiod, active);
637		usleep_range(1000, 2000);
638	} else if (!IS_ERR_OR_NULL(ak4458->reset)) {
639		if (active)
640			reset_control_assert(ak4458->reset);
641		else
642			reset_control_deassert(ak4458->reset);
643		usleep_range(1000, 2000);
644	}
645}
646
647#ifdef CONFIG_PM
648static int __maybe_unused ak4458_runtime_suspend(struct device *dev)
649{
650	struct ak4458_priv *ak4458 = dev_get_drvdata(dev);
651
652	regcache_cache_only(ak4458->regmap, true);
653
654	ak4458_reset(ak4458, true);
655
656	if (ak4458->mute_gpiod)
657		gpiod_set_value_cansleep(ak4458->mute_gpiod, 0);
658
659	regulator_bulk_disable(ARRAY_SIZE(ak4458->supplies),
660			       ak4458->supplies);
661	return 0;
662}
663
664static int __maybe_unused ak4458_runtime_resume(struct device *dev)
665{
666	struct ak4458_priv *ak4458 = dev_get_drvdata(dev);
667	int ret;
668
669	ret = regulator_bulk_enable(ARRAY_SIZE(ak4458->supplies),
670				    ak4458->supplies);
671	if (ret != 0) {
672		dev_err(ak4458->dev, "Failed to enable supplies: %d\n", ret);
673		return ret;
674	}
675
676	if (ak4458->mute_gpiod)
677		gpiod_set_value_cansleep(ak4458->mute_gpiod, 1);
678
679	ak4458_reset(ak4458, false);
680
681	regcache_cache_only(ak4458->regmap, false);
682	regcache_mark_dirty(ak4458->regmap);
683
684	return regcache_sync(ak4458->regmap);
685}
686#endif /* CONFIG_PM */
687
688static const struct snd_soc_component_driver soc_codec_dev_ak4458 = {
689	.controls		= ak4458_snd_controls,
690	.num_controls		= ARRAY_SIZE(ak4458_snd_controls),
691	.dapm_widgets		= ak4458_dapm_widgets,
692	.num_dapm_widgets	= ARRAY_SIZE(ak4458_dapm_widgets),
693	.dapm_routes		= ak4458_intercon,
694	.num_dapm_routes	= ARRAY_SIZE(ak4458_intercon),
695	.idle_bias_on		= 1,
696	.use_pmdown_time	= 1,
697	.endianness		= 1,
698};
699
700static const struct snd_soc_component_driver soc_codec_dev_ak4497 = {
701	.controls		= ak4497_snd_controls,
702	.num_controls		= ARRAY_SIZE(ak4497_snd_controls),
703	.dapm_widgets		= ak4497_dapm_widgets,
704	.num_dapm_widgets	= ARRAY_SIZE(ak4497_dapm_widgets),
705	.dapm_routes		= ak4497_intercon,
706	.num_dapm_routes	= ARRAY_SIZE(ak4497_intercon),
707	.idle_bias_on		= 1,
708	.use_pmdown_time	= 1,
709	.endianness		= 1,
710};
711
712static const struct regmap_config ak4458_regmap = {
713	.reg_bits = 8,
714	.val_bits = 8,
715
716	.max_register = AK4458_14_R4CHATT,
717	.reg_defaults = ak4458_reg_defaults,
718	.num_reg_defaults = ARRAY_SIZE(ak4458_reg_defaults),
719	.cache_type = REGCACHE_RBTREE,
720};
721
722static const struct ak4458_drvdata ak4458_drvdata = {
723	.dai_drv = &ak4458_dai,
724	.comp_drv = &soc_codec_dev_ak4458,
725	.type = AK4458,
726};
727
728static const struct ak4458_drvdata ak4497_drvdata = {
729	.dai_drv = &ak4497_dai,
730	.comp_drv = &soc_codec_dev_ak4497,
731	.type = AK4497,
732};
733
734static const struct dev_pm_ops ak4458_pm = {
735	SET_RUNTIME_PM_OPS(ak4458_runtime_suspend, ak4458_runtime_resume, NULL)
736	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
737				pm_runtime_force_resume)
738};
739
740static int ak4458_i2c_probe(struct i2c_client *i2c)
741{
742	struct ak4458_priv *ak4458;
743	int ret, i;
744
745	ak4458 = devm_kzalloc(&i2c->dev, sizeof(*ak4458), GFP_KERNEL);
746	if (!ak4458)
747		return -ENOMEM;
748
749	ak4458->regmap = devm_regmap_init_i2c(i2c, &ak4458_regmap);
750	if (IS_ERR(ak4458->regmap))
751		return PTR_ERR(ak4458->regmap);
752
753	i2c_set_clientdata(i2c, ak4458);
754	ak4458->dev = &i2c->dev;
755
756	ak4458->drvdata = of_device_get_match_data(&i2c->dev);
757
758	ak4458->reset = devm_reset_control_get_optional_shared(ak4458->dev, NULL);
759	if (IS_ERR(ak4458->reset))
760		return PTR_ERR(ak4458->reset);
761
762	ak4458->reset_gpiod = devm_gpiod_get_optional(ak4458->dev, "reset",
763						      GPIOD_OUT_LOW);
764	if (IS_ERR(ak4458->reset_gpiod))
765		return PTR_ERR(ak4458->reset_gpiod);
766
767	ak4458->mute_gpiod = devm_gpiod_get_optional(ak4458->dev, "mute",
768						     GPIOD_OUT_LOW);
769	if (IS_ERR(ak4458->mute_gpiod))
770		return PTR_ERR(ak4458->mute_gpiod);
771
772	/* Optional property for ak4497 */
773	of_property_read_u32(i2c->dev.of_node, "dsd-path", &ak4458->dsd_path);
774
775	for (i = 0; i < ARRAY_SIZE(ak4458->supplies); i++)
776		ak4458->supplies[i].supply = ak4458_supply_names[i];
777
778	ret = devm_regulator_bulk_get(ak4458->dev, ARRAY_SIZE(ak4458->supplies),
779				      ak4458->supplies);
780	if (ret != 0) {
781		dev_err(ak4458->dev, "Failed to request supplies: %d\n", ret);
782		return ret;
783	}
784
785	ret = devm_snd_soc_register_component(ak4458->dev,
786					      ak4458->drvdata->comp_drv,
787					      ak4458->drvdata->dai_drv, 1);
788	if (ret < 0) {
789		dev_err(ak4458->dev, "Failed to register CODEC: %d\n", ret);
790		return ret;
791	}
792
793	pm_runtime_enable(&i2c->dev);
794	regcache_cache_only(ak4458->regmap, true);
795	ak4458_reset(ak4458, false);
796
797	return 0;
798}
799
800static void ak4458_i2c_remove(struct i2c_client *i2c)
801{
802	struct ak4458_priv *ak4458 = i2c_get_clientdata(i2c);
803
804	ak4458_reset(ak4458, true);
805	pm_runtime_disable(&i2c->dev);
806}
807
808static const struct of_device_id ak4458_of_match[] = {
809	{ .compatible = "asahi-kasei,ak4458", .data = &ak4458_drvdata},
810	{ .compatible = "asahi-kasei,ak4497", .data = &ak4497_drvdata},
811	{ },
812};
813MODULE_DEVICE_TABLE(of, ak4458_of_match);
814
815static struct i2c_driver ak4458_i2c_driver = {
816	.driver = {
817		.name = "ak4458",
818		.pm = &ak4458_pm,
819		.of_match_table = ak4458_of_match,
820		},
821	.probe = ak4458_i2c_probe,
822	.remove = ak4458_i2c_remove,
823};
824
825module_i2c_driver(ak4458_i2c_driver);
826
827MODULE_AUTHOR("Junichi Wakasugi <wakasugi.jb@om.asahi-kasei.co.jp>");
828MODULE_AUTHOR("Mihai Serban <mihai.serban@nxp.com>");
829MODULE_DESCRIPTION("ASoC AK4458 DAC driver");
830MODULE_LICENSE("GPL v2");