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1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2/* QLogic qede NIC Driver
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2020 Marvell International Ltd.
5 */
6
7#include <linux/types.h>
8#include <linux/netdevice.h>
9#include <linux/etherdevice.h>
10#include <linux/ethtool.h>
11#include <linux/string.h>
12#include <linux/pci.h>
13#include <linux/capability.h>
14#include <linux/vmalloc.h>
15#include <linux/phylink.h>
16
17#include "qede.h"
18#include "qede_ptp.h"
19
20#define QEDE_RQSTAT_OFFSET(stat_name) \
21 (offsetof(struct qede_rx_queue, stat_name))
22#define QEDE_RQSTAT_STRING(stat_name) (#stat_name)
23#define QEDE_RQSTAT(stat_name) \
24 {QEDE_RQSTAT_OFFSET(stat_name), QEDE_RQSTAT_STRING(stat_name)}
25
26#define QEDE_SELFTEST_POLL_COUNT 100
27#define QEDE_DUMP_VERSION 0x1
28#define QEDE_DUMP_NVM_ARG_COUNT 2
29
30static const struct {
31 u64 offset;
32 char string[ETH_GSTRING_LEN];
33} qede_rqstats_arr[] = {
34 QEDE_RQSTAT(rcv_pkts),
35 QEDE_RQSTAT(rx_hw_errors),
36 QEDE_RQSTAT(rx_alloc_errors),
37 QEDE_RQSTAT(rx_ip_frags),
38 QEDE_RQSTAT(xdp_no_pass),
39};
40
41#define QEDE_NUM_RQSTATS ARRAY_SIZE(qede_rqstats_arr)
42#define QEDE_TQSTAT_OFFSET(stat_name) \
43 (offsetof(struct qede_tx_queue, stat_name))
44#define QEDE_TQSTAT_STRING(stat_name) (#stat_name)
45#define QEDE_TQSTAT(stat_name) \
46 {QEDE_TQSTAT_OFFSET(stat_name), QEDE_TQSTAT_STRING(stat_name)}
47#define QEDE_NUM_TQSTATS ARRAY_SIZE(qede_tqstats_arr)
48static const struct {
49 u64 offset;
50 char string[ETH_GSTRING_LEN];
51} qede_tqstats_arr[] = {
52 QEDE_TQSTAT(xmit_pkts),
53 QEDE_TQSTAT(stopped_cnt),
54 QEDE_TQSTAT(tx_mem_alloc_err),
55};
56
57#define QEDE_STAT_OFFSET(stat_name, type, base) \
58 (offsetof(type, stat_name) + (base))
59#define QEDE_STAT_STRING(stat_name) (#stat_name)
60#define _QEDE_STAT(stat_name, type, base, attr) \
61 {QEDE_STAT_OFFSET(stat_name, type, base), \
62 QEDE_STAT_STRING(stat_name), \
63 attr}
64#define QEDE_STAT(stat_name) \
65 _QEDE_STAT(stat_name, struct qede_stats_common, 0, 0x0)
66#define QEDE_PF_STAT(stat_name) \
67 _QEDE_STAT(stat_name, struct qede_stats_common, 0, \
68 BIT(QEDE_STAT_PF_ONLY))
69#define QEDE_PF_BB_STAT(stat_name) \
70 _QEDE_STAT(stat_name, struct qede_stats_bb, \
71 offsetof(struct qede_stats, bb), \
72 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_BB_ONLY))
73#define QEDE_PF_AH_STAT(stat_name) \
74 _QEDE_STAT(stat_name, struct qede_stats_ah, \
75 offsetof(struct qede_stats, ah), \
76 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_AH_ONLY))
77static const struct {
78 u64 offset;
79 char string[ETH_GSTRING_LEN];
80 unsigned long attr;
81#define QEDE_STAT_PF_ONLY 0
82#define QEDE_STAT_BB_ONLY 1
83#define QEDE_STAT_AH_ONLY 2
84} qede_stats_arr[] = {
85 QEDE_STAT(rx_ucast_bytes),
86 QEDE_STAT(rx_mcast_bytes),
87 QEDE_STAT(rx_bcast_bytes),
88 QEDE_STAT(rx_ucast_pkts),
89 QEDE_STAT(rx_mcast_pkts),
90 QEDE_STAT(rx_bcast_pkts),
91
92 QEDE_STAT(tx_ucast_bytes),
93 QEDE_STAT(tx_mcast_bytes),
94 QEDE_STAT(tx_bcast_bytes),
95 QEDE_STAT(tx_ucast_pkts),
96 QEDE_STAT(tx_mcast_pkts),
97 QEDE_STAT(tx_bcast_pkts),
98
99 QEDE_PF_STAT(rx_64_byte_packets),
100 QEDE_PF_STAT(rx_65_to_127_byte_packets),
101 QEDE_PF_STAT(rx_128_to_255_byte_packets),
102 QEDE_PF_STAT(rx_256_to_511_byte_packets),
103 QEDE_PF_STAT(rx_512_to_1023_byte_packets),
104 QEDE_PF_STAT(rx_1024_to_1518_byte_packets),
105 QEDE_PF_BB_STAT(rx_1519_to_1522_byte_packets),
106 QEDE_PF_BB_STAT(rx_1519_to_2047_byte_packets),
107 QEDE_PF_BB_STAT(rx_2048_to_4095_byte_packets),
108 QEDE_PF_BB_STAT(rx_4096_to_9216_byte_packets),
109 QEDE_PF_BB_STAT(rx_9217_to_16383_byte_packets),
110 QEDE_PF_AH_STAT(rx_1519_to_max_byte_packets),
111 QEDE_PF_STAT(tx_64_byte_packets),
112 QEDE_PF_STAT(tx_65_to_127_byte_packets),
113 QEDE_PF_STAT(tx_128_to_255_byte_packets),
114 QEDE_PF_STAT(tx_256_to_511_byte_packets),
115 QEDE_PF_STAT(tx_512_to_1023_byte_packets),
116 QEDE_PF_STAT(tx_1024_to_1518_byte_packets),
117 QEDE_PF_BB_STAT(tx_1519_to_2047_byte_packets),
118 QEDE_PF_BB_STAT(tx_2048_to_4095_byte_packets),
119 QEDE_PF_BB_STAT(tx_4096_to_9216_byte_packets),
120 QEDE_PF_BB_STAT(tx_9217_to_16383_byte_packets),
121 QEDE_PF_AH_STAT(tx_1519_to_max_byte_packets),
122 QEDE_PF_STAT(rx_mac_crtl_frames),
123 QEDE_PF_STAT(tx_mac_ctrl_frames),
124 QEDE_PF_STAT(rx_pause_frames),
125 QEDE_PF_STAT(tx_pause_frames),
126 QEDE_PF_STAT(rx_pfc_frames),
127 QEDE_PF_STAT(tx_pfc_frames),
128
129 QEDE_PF_STAT(rx_crc_errors),
130 QEDE_PF_STAT(rx_align_errors),
131 QEDE_PF_STAT(rx_carrier_errors),
132 QEDE_PF_STAT(rx_oversize_packets),
133 QEDE_PF_STAT(rx_jabbers),
134 QEDE_PF_STAT(rx_undersize_packets),
135 QEDE_PF_STAT(rx_fragments),
136 QEDE_PF_BB_STAT(tx_lpi_entry_count),
137 QEDE_PF_BB_STAT(tx_total_collisions),
138 QEDE_PF_STAT(brb_truncates),
139 QEDE_PF_STAT(brb_discards),
140 QEDE_STAT(no_buff_discards),
141 QEDE_PF_STAT(mftag_filter_discards),
142 QEDE_PF_STAT(mac_filter_discards),
143 QEDE_PF_STAT(gft_filter_drop),
144 QEDE_STAT(tx_err_drop_pkts),
145 QEDE_STAT(ttl0_discard),
146 QEDE_STAT(packet_too_big_discard),
147
148 QEDE_STAT(coalesced_pkts),
149 QEDE_STAT(coalesced_events),
150 QEDE_STAT(coalesced_aborts_num),
151 QEDE_STAT(non_coalesced_pkts),
152 QEDE_STAT(coalesced_bytes),
153
154 QEDE_STAT(link_change_count),
155 QEDE_STAT(ptp_skip_txts),
156};
157
158#define QEDE_NUM_STATS ARRAY_SIZE(qede_stats_arr)
159#define QEDE_STAT_IS_PF_ONLY(i) \
160 test_bit(QEDE_STAT_PF_ONLY, &qede_stats_arr[i].attr)
161#define QEDE_STAT_IS_BB_ONLY(i) \
162 test_bit(QEDE_STAT_BB_ONLY, &qede_stats_arr[i].attr)
163#define QEDE_STAT_IS_AH_ONLY(i) \
164 test_bit(QEDE_STAT_AH_ONLY, &qede_stats_arr[i].attr)
165
166enum {
167 QEDE_PRI_FLAG_CMT,
168 QEDE_PRI_FLAG_SMART_AN_SUPPORT, /* MFW supports SmartAN */
169 QEDE_PRI_FLAG_RECOVER_ON_ERROR,
170 QEDE_PRI_FLAG_ESL_SUPPORT, /* MFW supports Enhanced System Lockdown */
171 QEDE_PRI_FLAG_ESL_ACTIVE, /* Enhanced System Lockdown Active status */
172 QEDE_PRI_FLAG_LEN,
173};
174
175static const char qede_private_arr[QEDE_PRI_FLAG_LEN][ETH_GSTRING_LEN] = {
176 "Coupled-Function",
177 "SmartAN capable",
178 "Recover on error",
179 "ESL capable",
180 "ESL active",
181};
182
183enum qede_ethtool_tests {
184 QEDE_ETHTOOL_INT_LOOPBACK,
185 QEDE_ETHTOOL_INTERRUPT_TEST,
186 QEDE_ETHTOOL_MEMORY_TEST,
187 QEDE_ETHTOOL_REGISTER_TEST,
188 QEDE_ETHTOOL_CLOCK_TEST,
189 QEDE_ETHTOOL_NVRAM_TEST,
190 QEDE_ETHTOOL_TEST_MAX
191};
192
193static const char qede_tests_str_arr[QEDE_ETHTOOL_TEST_MAX][ETH_GSTRING_LEN] = {
194 "Internal loopback (offline)",
195 "Interrupt (online)\t",
196 "Memory (online)\t\t",
197 "Register (online)\t",
198 "Clock (online)\t\t",
199 "Nvram (online)\t\t",
200};
201
202/* Forced speed capabilities maps */
203
204static const u32 qede_forced_speed_1000[] __initconst = {
205 ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
206 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
207 ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
208};
209
210static const u32 qede_forced_speed_10000[] __initconst = {
211 ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
212 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
213 ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
214 ETHTOOL_LINK_MODE_10000baseR_FEC_BIT,
215 ETHTOOL_LINK_MODE_10000baseCR_Full_BIT,
216 ETHTOOL_LINK_MODE_10000baseSR_Full_BIT,
217 ETHTOOL_LINK_MODE_10000baseLR_Full_BIT,
218 ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT,
219};
220
221static const u32 qede_forced_speed_20000[] __initconst = {
222 ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT,
223};
224
225static const u32 qede_forced_speed_25000[] __initconst = {
226 ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
227 ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
228 ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
229};
230
231static const u32 qede_forced_speed_40000[] __initconst = {
232 ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
233 ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
234 ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
235 ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
236};
237
238static const u32 qede_forced_speed_50000[] __initconst = {
239 ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
240 ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
241 ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT,
242};
243
244static const u32 qede_forced_speed_100000[] __initconst = {
245 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
246 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
247 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
248 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
249};
250
251static struct ethtool_forced_speed_map
252qede_forced_speed_maps[] __ro_after_init = {
253 ETHTOOL_FORCED_SPEED_MAP(qede_forced_speed, 1000),
254 ETHTOOL_FORCED_SPEED_MAP(qede_forced_speed, 10000),
255 ETHTOOL_FORCED_SPEED_MAP(qede_forced_speed, 20000),
256 ETHTOOL_FORCED_SPEED_MAP(qede_forced_speed, 25000),
257 ETHTOOL_FORCED_SPEED_MAP(qede_forced_speed, 40000),
258 ETHTOOL_FORCED_SPEED_MAP(qede_forced_speed, 50000),
259 ETHTOOL_FORCED_SPEED_MAP(qede_forced_speed, 100000),
260};
261
262void __init qede_forced_speed_maps_init(void)
263{
264 ethtool_forced_speed_maps_init(qede_forced_speed_maps,
265 ARRAY_SIZE(qede_forced_speed_maps));
266}
267
268/* Ethtool callbacks */
269
270static void qede_get_strings_stats_txq(struct qede_dev *edev,
271 struct qede_tx_queue *txq, u8 **buf)
272{
273 int i;
274
275 for (i = 0; i < QEDE_NUM_TQSTATS; i++)
276 if (txq->is_xdp)
277 ethtool_sprintf(buf, "%d [XDP]: %s",
278 QEDE_TXQ_XDP_TO_IDX(edev, txq),
279 qede_tqstats_arr[i].string);
280 else
281 ethtool_sprintf(buf, "%d_%d: %s", txq->index, txq->cos,
282 qede_tqstats_arr[i].string);
283}
284
285static void qede_get_strings_stats_rxq(struct qede_dev *edev,
286 struct qede_rx_queue *rxq, u8 **buf)
287{
288 int i;
289
290 for (i = 0; i < QEDE_NUM_RQSTATS; i++)
291 ethtool_sprintf(buf, "%d: %s", rxq->rxq_id,
292 qede_rqstats_arr[i].string);
293}
294
295static bool qede_is_irrelevant_stat(struct qede_dev *edev, int stat_index)
296{
297 return (IS_VF(edev) && QEDE_STAT_IS_PF_ONLY(stat_index)) ||
298 (QEDE_IS_BB(edev) && QEDE_STAT_IS_AH_ONLY(stat_index)) ||
299 (QEDE_IS_AH(edev) && QEDE_STAT_IS_BB_ONLY(stat_index));
300}
301
302static void qede_get_strings_stats(struct qede_dev *edev, u8 *buf)
303{
304 struct qede_fastpath *fp;
305 int i;
306
307 /* Account for queue statistics */
308 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
309 fp = &edev->fp_array[i];
310
311 if (fp->type & QEDE_FASTPATH_RX)
312 qede_get_strings_stats_rxq(edev, fp->rxq, &buf);
313
314 if (fp->type & QEDE_FASTPATH_XDP)
315 qede_get_strings_stats_txq(edev, fp->xdp_tx, &buf);
316
317 if (fp->type & QEDE_FASTPATH_TX) {
318 int cos;
319
320 for_each_cos_in_txq(edev, cos)
321 qede_get_strings_stats_txq(edev,
322 &fp->txq[cos], &buf);
323 }
324 }
325
326 /* Account for non-queue statistics */
327 for (i = 0; i < QEDE_NUM_STATS; i++) {
328 if (qede_is_irrelevant_stat(edev, i))
329 continue;
330 ethtool_puts(&buf, qede_stats_arr[i].string);
331 }
332}
333
334static void qede_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
335{
336 struct qede_dev *edev = netdev_priv(dev);
337 int i;
338
339 switch (stringset) {
340 case ETH_SS_STATS:
341 qede_get_strings_stats(edev, buf);
342 break;
343 case ETH_SS_PRIV_FLAGS:
344 for (i = 0; i < QEDE_PRI_FLAG_LEN; i++)
345 ethtool_puts(&buf, qede_private_arr[i]);
346 break;
347 case ETH_SS_TEST:
348 for (i = 0; i < QEDE_ETHTOOL_TEST_MAX; i++)
349 ethtool_puts(&buf, qede_tests_str_arr[i]);
350 break;
351 default:
352 DP_VERBOSE(edev, QED_MSG_DEBUG,
353 "Unsupported stringset 0x%08x\n", stringset);
354 }
355}
356
357static void qede_get_ethtool_stats_txq(struct qede_tx_queue *txq, u64 **buf)
358{
359 int i;
360
361 for (i = 0; i < QEDE_NUM_TQSTATS; i++) {
362 **buf = *((u64 *)(((void *)txq) + qede_tqstats_arr[i].offset));
363 (*buf)++;
364 }
365}
366
367static void qede_get_ethtool_stats_rxq(struct qede_rx_queue *rxq, u64 **buf)
368{
369 int i;
370
371 for (i = 0; i < QEDE_NUM_RQSTATS; i++) {
372 **buf = *((u64 *)(((void *)rxq) + qede_rqstats_arr[i].offset));
373 (*buf)++;
374 }
375}
376
377static void qede_get_ethtool_stats(struct net_device *dev,
378 struct ethtool_stats *stats, u64 *buf)
379{
380 struct qede_dev *edev = netdev_priv(dev);
381 struct qede_fastpath *fp;
382 int i;
383
384 qede_fill_by_demand_stats(edev);
385
386 /* Need to protect the access to the fastpath array */
387 __qede_lock(edev);
388
389 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
390 fp = &edev->fp_array[i];
391
392 if (fp->type & QEDE_FASTPATH_RX)
393 qede_get_ethtool_stats_rxq(fp->rxq, &buf);
394
395 if (fp->type & QEDE_FASTPATH_XDP)
396 qede_get_ethtool_stats_txq(fp->xdp_tx, &buf);
397
398 if (fp->type & QEDE_FASTPATH_TX) {
399 int cos;
400
401 for_each_cos_in_txq(edev, cos)
402 qede_get_ethtool_stats_txq(&fp->txq[cos], &buf);
403 }
404 }
405
406 spin_lock(&edev->stats_lock);
407
408 for (i = 0; i < QEDE_NUM_STATS; i++) {
409 if (qede_is_irrelevant_stat(edev, i))
410 continue;
411 *buf = *((u64 *)(((void *)&edev->stats) +
412 qede_stats_arr[i].offset));
413
414 buf++;
415 }
416
417 spin_unlock(&edev->stats_lock);
418
419 __qede_unlock(edev);
420}
421
422static int qede_get_sset_count(struct net_device *dev, int stringset)
423{
424 struct qede_dev *edev = netdev_priv(dev);
425 int num_stats = QEDE_NUM_STATS, i;
426
427 switch (stringset) {
428 case ETH_SS_STATS:
429 for (i = 0; i < QEDE_NUM_STATS; i++)
430 if (qede_is_irrelevant_stat(edev, i))
431 num_stats--;
432
433 /* Account for the Regular Tx statistics */
434 num_stats += QEDE_TSS_COUNT(edev) * QEDE_NUM_TQSTATS *
435 edev->dev_info.num_tc;
436
437 /* Account for the Regular Rx statistics */
438 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_RQSTATS;
439
440 /* Account for XDP statistics [if needed] */
441 if (edev->xdp_prog)
442 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_TQSTATS;
443 return num_stats;
444
445 case ETH_SS_PRIV_FLAGS:
446 return QEDE_PRI_FLAG_LEN;
447 case ETH_SS_TEST:
448 if (!IS_VF(edev))
449 return QEDE_ETHTOOL_TEST_MAX;
450 else
451 return 0;
452 default:
453 DP_VERBOSE(edev, QED_MSG_DEBUG,
454 "Unsupported stringset 0x%08x\n", stringset);
455 return -EINVAL;
456 }
457}
458
459static u32 qede_get_priv_flags(struct net_device *dev)
460{
461 struct qede_dev *edev = netdev_priv(dev);
462 bool esl_active;
463 u32 flags = 0;
464
465 if (edev->dev_info.common.num_hwfns > 1)
466 flags |= BIT(QEDE_PRI_FLAG_CMT);
467
468 if (edev->dev_info.common.smart_an)
469 flags |= BIT(QEDE_PRI_FLAG_SMART_AN_SUPPORT);
470
471 if (edev->err_flags & BIT(QEDE_ERR_IS_RECOVERABLE))
472 flags |= BIT(QEDE_PRI_FLAG_RECOVER_ON_ERROR);
473
474 if (edev->dev_info.common.esl)
475 flags |= BIT(QEDE_PRI_FLAG_ESL_SUPPORT);
476
477 edev->ops->common->get_esl_status(edev->cdev, &esl_active);
478
479 if (esl_active)
480 flags |= BIT(QEDE_PRI_FLAG_ESL_ACTIVE);
481
482 return flags;
483}
484
485static int qede_set_priv_flags(struct net_device *dev, u32 flags)
486{
487 struct qede_dev *edev = netdev_priv(dev);
488 u32 cflags = qede_get_priv_flags(dev);
489 u32 dflags = flags ^ cflags;
490
491 /* can only change RECOVER_ON_ERROR flag */
492 if (dflags & ~BIT(QEDE_PRI_FLAG_RECOVER_ON_ERROR))
493 return -EINVAL;
494
495 if (flags & BIT(QEDE_PRI_FLAG_RECOVER_ON_ERROR))
496 set_bit(QEDE_ERR_IS_RECOVERABLE, &edev->err_flags);
497 else
498 clear_bit(QEDE_ERR_IS_RECOVERABLE, &edev->err_flags);
499
500 return 0;
501}
502
503static int qede_get_link_ksettings(struct net_device *dev,
504 struct ethtool_link_ksettings *cmd)
505{
506 typeof(cmd->link_modes) *link_modes = &cmd->link_modes;
507 struct ethtool_link_settings *base = &cmd->base;
508 struct qede_dev *edev = netdev_priv(dev);
509 struct qed_link_output current_link;
510
511 __qede_lock(edev);
512
513 memset(¤t_link, 0, sizeof(current_link));
514 edev->ops->common->get_link(edev->cdev, ¤t_link);
515
516 linkmode_copy(link_modes->supported, current_link.supported_caps);
517 linkmode_copy(link_modes->advertising, current_link.advertised_caps);
518 linkmode_copy(link_modes->lp_advertising, current_link.lp_caps);
519
520 if ((edev->state == QEDE_STATE_OPEN) && (current_link.link_up)) {
521 base->speed = current_link.speed;
522 base->duplex = current_link.duplex;
523 } else {
524 base->speed = SPEED_UNKNOWN;
525 base->duplex = DUPLEX_UNKNOWN;
526 }
527
528 __qede_unlock(edev);
529
530 base->port = current_link.port;
531 base->autoneg = (current_link.autoneg) ? AUTONEG_ENABLE :
532 AUTONEG_DISABLE;
533
534 return 0;
535}
536
537static int qede_set_link_ksettings(struct net_device *dev,
538 const struct ethtool_link_ksettings *cmd)
539{
540 const struct ethtool_link_settings *base = &cmd->base;
541 const struct ethtool_forced_speed_map *map;
542 struct qede_dev *edev = netdev_priv(dev);
543 struct qed_link_output current_link;
544 struct qed_link_params params;
545 u32 i;
546
547 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
548 DP_INFO(edev, "Link settings are not allowed to be changed\n");
549 return -EOPNOTSUPP;
550 }
551 memset(¤t_link, 0, sizeof(current_link));
552 memset(¶ms, 0, sizeof(params));
553 edev->ops->common->get_link(edev->cdev, ¤t_link);
554
555 params.override_flags |= QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS;
556 params.override_flags |= QED_LINK_OVERRIDE_SPEED_AUTONEG;
557
558 if (base->autoneg == AUTONEG_ENABLE) {
559 if (!phylink_test(current_link.supported_caps, Autoneg)) {
560 DP_INFO(edev, "Auto negotiation is not supported\n");
561 return -EOPNOTSUPP;
562 }
563
564 params.autoneg = true;
565 params.forced_speed = 0;
566
567 linkmode_copy(params.adv_speeds, cmd->link_modes.advertising);
568 } else { /* forced speed */
569 params.override_flags |= QED_LINK_OVERRIDE_SPEED_FORCED_SPEED;
570 params.autoneg = false;
571 params.forced_speed = base->speed;
572
573 for (i = 0; i < ARRAY_SIZE(qede_forced_speed_maps); i++) {
574 map = qede_forced_speed_maps + i;
575
576 if (base->speed != map->speed ||
577 !linkmode_intersects(current_link.supported_caps,
578 map->caps))
579 continue;
580
581 linkmode_and(params.adv_speeds,
582 current_link.supported_caps, map->caps);
583 goto set_link;
584 }
585
586 DP_INFO(edev, "Unsupported speed %u\n", base->speed);
587 return -EINVAL;
588 }
589
590set_link:
591 params.link_up = true;
592 edev->ops->common->set_link(edev->cdev, ¶ms);
593
594 return 0;
595}
596
597static void qede_get_drvinfo(struct net_device *ndev,
598 struct ethtool_drvinfo *info)
599{
600 char mfw[ETHTOOL_FWVERS_LEN], storm[ETHTOOL_FWVERS_LEN];
601 struct qede_dev *edev = netdev_priv(ndev);
602 char mbi[ETHTOOL_FWVERS_LEN];
603
604 strscpy(info->driver, "qede", sizeof(info->driver));
605
606 snprintf(storm, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d",
607 edev->dev_info.common.fw_major,
608 edev->dev_info.common.fw_minor,
609 edev->dev_info.common.fw_rev,
610 edev->dev_info.common.fw_eng);
611
612 snprintf(mfw, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d",
613 (edev->dev_info.common.mfw_rev >> 24) & 0xFF,
614 (edev->dev_info.common.mfw_rev >> 16) & 0xFF,
615 (edev->dev_info.common.mfw_rev >> 8) & 0xFF,
616 edev->dev_info.common.mfw_rev & 0xFF);
617
618 if ((strlen(storm) + strlen("[storm]")) <
619 sizeof(info->version))
620 snprintf(info->version, sizeof(info->version),
621 "[storm %s]", storm);
622 else
623 snprintf(info->version, sizeof(info->version),
624 "%s", storm);
625
626 if (edev->dev_info.common.mbi_version) {
627 snprintf(mbi, ETHTOOL_FWVERS_LEN, "%d.%d.%d",
628 (edev->dev_info.common.mbi_version &
629 QED_MBI_VERSION_2_MASK) >> QED_MBI_VERSION_2_OFFSET,
630 (edev->dev_info.common.mbi_version &
631 QED_MBI_VERSION_1_MASK) >> QED_MBI_VERSION_1_OFFSET,
632 (edev->dev_info.common.mbi_version &
633 QED_MBI_VERSION_0_MASK) >> QED_MBI_VERSION_0_OFFSET);
634 snprintf(info->fw_version, sizeof(info->fw_version),
635 "mbi %s [mfw %s]", mbi, mfw);
636 } else {
637 snprintf(info->fw_version, sizeof(info->fw_version),
638 "mfw %s", mfw);
639 }
640
641 strscpy(info->bus_info, pci_name(edev->pdev), sizeof(info->bus_info));
642}
643
644static void qede_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
645{
646 struct qede_dev *edev = netdev_priv(ndev);
647
648 if (edev->dev_info.common.wol_support) {
649 wol->supported = WAKE_MAGIC;
650 wol->wolopts = edev->wol_enabled ? WAKE_MAGIC : 0;
651 }
652}
653
654static int qede_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
655{
656 struct qede_dev *edev = netdev_priv(ndev);
657 bool wol_requested;
658 int rc;
659
660 if (wol->wolopts & ~WAKE_MAGIC) {
661 DP_INFO(edev,
662 "Can't support WoL options other than magic-packet\n");
663 return -EINVAL;
664 }
665
666 wol_requested = !!(wol->wolopts & WAKE_MAGIC);
667 if (wol_requested == edev->wol_enabled)
668 return 0;
669
670 /* Need to actually change configuration */
671 if (!edev->dev_info.common.wol_support) {
672 DP_INFO(edev, "Device doesn't support WoL\n");
673 return -EINVAL;
674 }
675
676 rc = edev->ops->common->update_wol(edev->cdev, wol_requested);
677 if (!rc)
678 edev->wol_enabled = wol_requested;
679
680 return rc;
681}
682
683static u32 qede_get_msglevel(struct net_device *ndev)
684{
685 struct qede_dev *edev = netdev_priv(ndev);
686
687 return ((u32)edev->dp_level << QED_LOG_LEVEL_SHIFT) | edev->dp_module;
688}
689
690static void qede_set_msglevel(struct net_device *ndev, u32 level)
691{
692 struct qede_dev *edev = netdev_priv(ndev);
693 u32 dp_module = 0;
694 u8 dp_level = 0;
695
696 qede_config_debug(level, &dp_module, &dp_level);
697
698 edev->dp_level = dp_level;
699 edev->dp_module = dp_module;
700 edev->ops->common->update_msglvl(edev->cdev,
701 dp_module, dp_level);
702}
703
704static int qede_nway_reset(struct net_device *dev)
705{
706 struct qede_dev *edev = netdev_priv(dev);
707 struct qed_link_output current_link;
708 struct qed_link_params link_params;
709
710 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
711 DP_INFO(edev, "Link settings are not allowed to be changed\n");
712 return -EOPNOTSUPP;
713 }
714
715 if (!netif_running(dev))
716 return 0;
717
718 memset(¤t_link, 0, sizeof(current_link));
719 edev->ops->common->get_link(edev->cdev, ¤t_link);
720 if (!current_link.link_up)
721 return 0;
722
723 /* Toggle the link */
724 memset(&link_params, 0, sizeof(link_params));
725 link_params.link_up = false;
726 edev->ops->common->set_link(edev->cdev, &link_params);
727 link_params.link_up = true;
728 edev->ops->common->set_link(edev->cdev, &link_params);
729
730 return 0;
731}
732
733static u32 qede_get_link(struct net_device *dev)
734{
735 struct qede_dev *edev = netdev_priv(dev);
736 struct qed_link_output current_link;
737
738 memset(¤t_link, 0, sizeof(current_link));
739 edev->ops->common->get_link(edev->cdev, ¤t_link);
740
741 return current_link.link_up;
742}
743
744static int qede_flash_device(struct net_device *dev,
745 struct ethtool_flash *flash)
746{
747 struct qede_dev *edev = netdev_priv(dev);
748
749 return edev->ops->common->nvm_flash(edev->cdev, flash->data);
750}
751
752static int qede_get_coalesce(struct net_device *dev,
753 struct ethtool_coalesce *coal,
754 struct kernel_ethtool_coalesce *kernel_coal,
755 struct netlink_ext_ack *extack)
756{
757 void *rx_handle = NULL, *tx_handle = NULL;
758 struct qede_dev *edev = netdev_priv(dev);
759 u16 rx_coal, tx_coal, i, rc = 0;
760 struct qede_fastpath *fp;
761
762 rx_coal = QED_DEFAULT_RX_USECS;
763 tx_coal = QED_DEFAULT_TX_USECS;
764
765 memset(coal, 0, sizeof(struct ethtool_coalesce));
766
767 __qede_lock(edev);
768 if (edev->state == QEDE_STATE_OPEN) {
769 for_each_queue(i) {
770 fp = &edev->fp_array[i];
771
772 if (fp->type & QEDE_FASTPATH_RX) {
773 rx_handle = fp->rxq->handle;
774 break;
775 }
776 }
777
778 rc = edev->ops->get_coalesce(edev->cdev, &rx_coal, rx_handle);
779 if (rc) {
780 DP_INFO(edev, "Read Rx coalesce error\n");
781 goto out;
782 }
783
784 for_each_queue(i) {
785 struct qede_tx_queue *txq;
786
787 fp = &edev->fp_array[i];
788
789 /* All TX queues of given fastpath uses same
790 * coalescing value, so no need to iterate over
791 * all TCs, TC0 txq should suffice.
792 */
793 if (fp->type & QEDE_FASTPATH_TX) {
794 txq = QEDE_FP_TC0_TXQ(fp);
795 tx_handle = txq->handle;
796 break;
797 }
798 }
799
800 rc = edev->ops->get_coalesce(edev->cdev, &tx_coal, tx_handle);
801 if (rc)
802 DP_INFO(edev, "Read Tx coalesce error\n");
803 }
804
805out:
806 __qede_unlock(edev);
807
808 coal->rx_coalesce_usecs = rx_coal;
809 coal->tx_coalesce_usecs = tx_coal;
810 coal->stats_block_coalesce_usecs = edev->stats_coal_usecs;
811
812 return rc;
813}
814
815int qede_set_coalesce(struct net_device *dev, struct ethtool_coalesce *coal,
816 struct kernel_ethtool_coalesce *kernel_coal,
817 struct netlink_ext_ack *extack)
818{
819 struct qede_dev *edev = netdev_priv(dev);
820 struct qede_fastpath *fp;
821 int i, rc = 0;
822 u16 rxc, txc;
823
824 if (edev->stats_coal_usecs != coal->stats_block_coalesce_usecs) {
825 edev->stats_coal_usecs = coal->stats_block_coalesce_usecs;
826 if (edev->stats_coal_usecs) {
827 edev->stats_coal_ticks = usecs_to_jiffies(edev->stats_coal_usecs);
828 schedule_delayed_work(&edev->periodic_task, 0);
829
830 DP_INFO(edev, "Configured stats coal ticks=%lu jiffies\n",
831 edev->stats_coal_ticks);
832 } else {
833 cancel_delayed_work_sync(&edev->periodic_task);
834 }
835 }
836
837 if (!netif_running(dev)) {
838 DP_INFO(edev, "Interface is down\n");
839 return -EINVAL;
840 }
841
842 if (coal->rx_coalesce_usecs > QED_COALESCE_MAX ||
843 coal->tx_coalesce_usecs > QED_COALESCE_MAX) {
844 DP_INFO(edev,
845 "Can't support requested %s coalesce value [max supported value %d]\n",
846 coal->rx_coalesce_usecs > QED_COALESCE_MAX ? "rx" :
847 "tx", QED_COALESCE_MAX);
848 return -EINVAL;
849 }
850
851 rxc = (u16)coal->rx_coalesce_usecs;
852 txc = (u16)coal->tx_coalesce_usecs;
853 for_each_queue(i) {
854 fp = &edev->fp_array[i];
855
856 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) {
857 rc = edev->ops->common->set_coalesce(edev->cdev,
858 rxc, 0,
859 fp->rxq->handle);
860 if (rc) {
861 DP_INFO(edev,
862 "Set RX coalesce error, rc = %d\n", rc);
863 return rc;
864 }
865 edev->coal_entry[i].rxc = rxc;
866 edev->coal_entry[i].isvalid = true;
867 }
868
869 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
870 struct qede_tx_queue *txq;
871
872 /* All TX queues of given fastpath uses same
873 * coalescing value, so no need to iterate over
874 * all TCs, TC0 txq should suffice.
875 */
876 txq = QEDE_FP_TC0_TXQ(fp);
877
878 rc = edev->ops->common->set_coalesce(edev->cdev,
879 0, txc,
880 txq->handle);
881 if (rc) {
882 DP_INFO(edev,
883 "Set TX coalesce error, rc = %d\n", rc);
884 return rc;
885 }
886 edev->coal_entry[i].txc = txc;
887 edev->coal_entry[i].isvalid = true;
888 }
889 }
890
891 return rc;
892}
893
894static void qede_get_ringparam(struct net_device *dev,
895 struct ethtool_ringparam *ering,
896 struct kernel_ethtool_ringparam *kernel_ering,
897 struct netlink_ext_ack *extack)
898{
899 struct qede_dev *edev = netdev_priv(dev);
900
901 ering->rx_max_pending = NUM_RX_BDS_MAX;
902 ering->rx_pending = edev->q_num_rx_buffers;
903 ering->tx_max_pending = NUM_TX_BDS_MAX;
904 ering->tx_pending = edev->q_num_tx_buffers;
905}
906
907static int qede_set_ringparam(struct net_device *dev,
908 struct ethtool_ringparam *ering,
909 struct kernel_ethtool_ringparam *kernel_ering,
910 struct netlink_ext_ack *extack)
911{
912 struct qede_dev *edev = netdev_priv(dev);
913
914 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
915 "Set ring params command parameters: rx_pending = %d, tx_pending = %d\n",
916 ering->rx_pending, ering->tx_pending);
917
918 /* Validate legality of configuration */
919 if (ering->rx_pending > NUM_RX_BDS_MAX ||
920 ering->rx_pending < NUM_RX_BDS_MIN ||
921 ering->tx_pending > NUM_TX_BDS_MAX ||
922 ering->tx_pending < NUM_TX_BDS_MIN) {
923 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
924 "Can only support Rx Buffer size [0%08x,...,0x%08x] and Tx Buffer size [0x%08x,...,0x%08x]\n",
925 NUM_RX_BDS_MIN, NUM_RX_BDS_MAX,
926 NUM_TX_BDS_MIN, NUM_TX_BDS_MAX);
927 return -EINVAL;
928 }
929
930 /* Change ring size and re-load */
931 edev->q_num_rx_buffers = ering->rx_pending;
932 edev->q_num_tx_buffers = ering->tx_pending;
933
934 qede_reload(edev, NULL, false);
935
936 return 0;
937}
938
939static void qede_get_pauseparam(struct net_device *dev,
940 struct ethtool_pauseparam *epause)
941{
942 struct qede_dev *edev = netdev_priv(dev);
943 struct qed_link_output current_link;
944
945 memset(¤t_link, 0, sizeof(current_link));
946 edev->ops->common->get_link(edev->cdev, ¤t_link);
947
948 if (current_link.pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
949 epause->autoneg = true;
950 if (current_link.pause_config & QED_LINK_PAUSE_RX_ENABLE)
951 epause->rx_pause = true;
952 if (current_link.pause_config & QED_LINK_PAUSE_TX_ENABLE)
953 epause->tx_pause = true;
954
955 DP_VERBOSE(edev, QED_MSG_DEBUG,
956 "ethtool_pauseparam: cmd %d autoneg %d rx_pause %d tx_pause %d\n",
957 epause->cmd, epause->autoneg, epause->rx_pause,
958 epause->tx_pause);
959}
960
961static int qede_set_pauseparam(struct net_device *dev,
962 struct ethtool_pauseparam *epause)
963{
964 struct qede_dev *edev = netdev_priv(dev);
965 struct qed_link_params params;
966 struct qed_link_output current_link;
967
968 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
969 DP_INFO(edev,
970 "Pause settings are not allowed to be changed\n");
971 return -EOPNOTSUPP;
972 }
973
974 memset(¤t_link, 0, sizeof(current_link));
975 edev->ops->common->get_link(edev->cdev, ¤t_link);
976
977 memset(¶ms, 0, sizeof(params));
978 params.override_flags |= QED_LINK_OVERRIDE_PAUSE_CONFIG;
979
980 if (epause->autoneg) {
981 if (!phylink_test(current_link.supported_caps, Autoneg)) {
982 DP_INFO(edev, "autoneg not supported\n");
983 return -EINVAL;
984 }
985
986 params.pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
987 }
988
989 if (epause->rx_pause)
990 params.pause_config |= QED_LINK_PAUSE_RX_ENABLE;
991 if (epause->tx_pause)
992 params.pause_config |= QED_LINK_PAUSE_TX_ENABLE;
993
994 params.link_up = true;
995 edev->ops->common->set_link(edev->cdev, ¶ms);
996
997 return 0;
998}
999
1000static void qede_get_regs(struct net_device *ndev,
1001 struct ethtool_regs *regs, void *buffer)
1002{
1003 struct qede_dev *edev = netdev_priv(ndev);
1004
1005 regs->version = 0;
1006 memset(buffer, 0, regs->len);
1007
1008 if (edev->ops && edev->ops->common)
1009 edev->ops->common->dbg_all_data(edev->cdev, buffer);
1010}
1011
1012static int qede_get_regs_len(struct net_device *ndev)
1013{
1014 struct qede_dev *edev = netdev_priv(ndev);
1015
1016 if (edev->ops && edev->ops->common)
1017 return edev->ops->common->dbg_all_data_size(edev->cdev);
1018 else
1019 return -EINVAL;
1020}
1021
1022static void qede_update_mtu(struct qede_dev *edev,
1023 struct qede_reload_args *args)
1024{
1025 WRITE_ONCE(edev->ndev->mtu, args->u.mtu);
1026}
1027
1028/* Netdevice NDOs */
1029int qede_change_mtu(struct net_device *ndev, int new_mtu)
1030{
1031 struct qede_dev *edev = netdev_priv(ndev);
1032 struct qede_reload_args args;
1033
1034 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1035 "Configuring MTU size of %d\n", new_mtu);
1036
1037 if (new_mtu > PAGE_SIZE)
1038 ndev->features &= ~NETIF_F_GRO_HW;
1039
1040 /* Set the mtu field and re-start the interface if needed */
1041 args.u.mtu = new_mtu;
1042 args.func = &qede_update_mtu;
1043 qede_reload(edev, &args, false);
1044#if IS_ENABLED(CONFIG_QED_RDMA)
1045 qede_rdma_event_change_mtu(edev);
1046#endif
1047 edev->ops->common->update_mtu(edev->cdev, new_mtu);
1048
1049 return 0;
1050}
1051
1052static void qede_get_channels(struct net_device *dev,
1053 struct ethtool_channels *channels)
1054{
1055 struct qede_dev *edev = netdev_priv(dev);
1056
1057 channels->max_combined = QEDE_MAX_RSS_CNT(edev);
1058 channels->max_rx = QEDE_MAX_RSS_CNT(edev);
1059 channels->max_tx = QEDE_MAX_RSS_CNT(edev);
1060 channels->combined_count = QEDE_QUEUE_CNT(edev) - edev->fp_num_tx -
1061 edev->fp_num_rx;
1062 channels->tx_count = edev->fp_num_tx;
1063 channels->rx_count = edev->fp_num_rx;
1064}
1065
1066static int qede_set_channels(struct net_device *dev,
1067 struct ethtool_channels *channels)
1068{
1069 struct qede_dev *edev = netdev_priv(dev);
1070 u32 count;
1071
1072 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1073 "set-channels command parameters: rx = %d, tx = %d, other = %d, combined = %d\n",
1074 channels->rx_count, channels->tx_count,
1075 channels->other_count, channels->combined_count);
1076
1077 count = channels->rx_count + channels->tx_count +
1078 channels->combined_count;
1079
1080 /* We don't support `other' channels */
1081 if (channels->other_count) {
1082 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1083 "command parameters not supported\n");
1084 return -EINVAL;
1085 }
1086
1087 if (!(channels->combined_count || (channels->rx_count &&
1088 channels->tx_count))) {
1089 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1090 "need to request at least one transmit and one receive channel\n");
1091 return -EINVAL;
1092 }
1093
1094 if (count > QEDE_MAX_RSS_CNT(edev)) {
1095 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1096 "requested channels = %d max supported channels = %d\n",
1097 count, QEDE_MAX_RSS_CNT(edev));
1098 return -EINVAL;
1099 }
1100
1101 /* Check if there was a change in the active parameters */
1102 if ((count == QEDE_QUEUE_CNT(edev)) &&
1103 (channels->tx_count == edev->fp_num_tx) &&
1104 (channels->rx_count == edev->fp_num_rx)) {
1105 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1106 "No change in active parameters\n");
1107 return 0;
1108 }
1109
1110 /* We need the number of queues to be divisible between the hwfns */
1111 if ((count % edev->dev_info.common.num_hwfns) ||
1112 (channels->tx_count % edev->dev_info.common.num_hwfns) ||
1113 (channels->rx_count % edev->dev_info.common.num_hwfns)) {
1114 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1115 "Number of channels must be divisible by %04x\n",
1116 edev->dev_info.common.num_hwfns);
1117 return -EINVAL;
1118 }
1119
1120 /* Set number of queues and reload if necessary */
1121 edev->req_queues = count;
1122 edev->req_num_tx = channels->tx_count;
1123 edev->req_num_rx = channels->rx_count;
1124 /* Reset the indirection table if rx queue count is updated */
1125 if ((edev->req_queues - edev->req_num_tx) != QEDE_RSS_COUNT(edev)) {
1126 edev->rss_params_inited &= ~QEDE_RSS_INDIR_INITED;
1127 memset(edev->rss_ind_table, 0, sizeof(edev->rss_ind_table));
1128 }
1129
1130 qede_reload(edev, NULL, false);
1131
1132 return 0;
1133}
1134
1135static int qede_get_ts_info(struct net_device *dev,
1136 struct kernel_ethtool_ts_info *info)
1137{
1138 struct qede_dev *edev = netdev_priv(dev);
1139
1140 return qede_ptp_get_ts_info(edev, info);
1141}
1142
1143static int qede_set_phys_id(struct net_device *dev,
1144 enum ethtool_phys_id_state state)
1145{
1146 struct qede_dev *edev = netdev_priv(dev);
1147 u8 led_state = 0;
1148
1149 switch (state) {
1150 case ETHTOOL_ID_ACTIVE:
1151 return 1; /* cycle on/off once per second */
1152
1153 case ETHTOOL_ID_ON:
1154 led_state = QED_LED_MODE_ON;
1155 break;
1156
1157 case ETHTOOL_ID_OFF:
1158 led_state = QED_LED_MODE_OFF;
1159 break;
1160
1161 case ETHTOOL_ID_INACTIVE:
1162 led_state = QED_LED_MODE_RESTORE;
1163 break;
1164 }
1165
1166 edev->ops->common->set_led(edev->cdev, led_state);
1167
1168 return 0;
1169}
1170
1171static int qede_get_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)
1172{
1173 info->data = RXH_IP_SRC | RXH_IP_DST;
1174
1175 switch (info->flow_type) {
1176 case TCP_V4_FLOW:
1177 case TCP_V6_FLOW:
1178 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
1179 break;
1180 case UDP_V4_FLOW:
1181 if (edev->rss_caps & QED_RSS_IPV4_UDP)
1182 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
1183 break;
1184 case UDP_V6_FLOW:
1185 if (edev->rss_caps & QED_RSS_IPV6_UDP)
1186 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
1187 break;
1188 case IPV4_FLOW:
1189 case IPV6_FLOW:
1190 break;
1191 default:
1192 info->data = 0;
1193 break;
1194 }
1195
1196 return 0;
1197}
1198
1199static int qede_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,
1200 u32 *rule_locs)
1201{
1202 struct qede_dev *edev = netdev_priv(dev);
1203 int rc = 0;
1204
1205 switch (info->cmd) {
1206 case ETHTOOL_GRXRINGS:
1207 info->data = QEDE_RSS_COUNT(edev);
1208 break;
1209 case ETHTOOL_GRXFH:
1210 rc = qede_get_rss_flags(edev, info);
1211 break;
1212 case ETHTOOL_GRXCLSRLCNT:
1213 info->rule_cnt = qede_get_arfs_filter_count(edev);
1214 info->data = QEDE_RFS_MAX_FLTR;
1215 break;
1216 case ETHTOOL_GRXCLSRULE:
1217 rc = qede_get_cls_rule_entry(edev, info);
1218 break;
1219 case ETHTOOL_GRXCLSRLALL:
1220 rc = qede_get_cls_rule_all(edev, info, rule_locs);
1221 break;
1222 default:
1223 DP_ERR(edev, "Command parameters not supported\n");
1224 rc = -EOPNOTSUPP;
1225 }
1226
1227 return rc;
1228}
1229
1230static int qede_set_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)
1231{
1232 struct qed_update_vport_params *vport_update_params;
1233 u8 set_caps = 0, clr_caps = 0;
1234 int rc = 0;
1235
1236 DP_VERBOSE(edev, QED_MSG_DEBUG,
1237 "Set rss flags command parameters: flow type = %d, data = %llu\n",
1238 info->flow_type, info->data);
1239
1240 switch (info->flow_type) {
1241 case TCP_V4_FLOW:
1242 case TCP_V6_FLOW:
1243 /* For TCP only 4-tuple hash is supported */
1244 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST |
1245 RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1246 DP_INFO(edev, "Command parameters not supported\n");
1247 return -EINVAL;
1248 }
1249 return 0;
1250 case UDP_V4_FLOW:
1251 /* For UDP either 2-tuple hash or 4-tuple hash is supported */
1252 if (info->data == (RXH_IP_SRC | RXH_IP_DST |
1253 RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1254 set_caps = QED_RSS_IPV4_UDP;
1255 DP_VERBOSE(edev, QED_MSG_DEBUG,
1256 "UDP 4-tuple enabled\n");
1257 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) {
1258 clr_caps = QED_RSS_IPV4_UDP;
1259 DP_VERBOSE(edev, QED_MSG_DEBUG,
1260 "UDP 4-tuple disabled\n");
1261 } else {
1262 return -EINVAL;
1263 }
1264 break;
1265 case UDP_V6_FLOW:
1266 /* For UDP either 2-tuple hash or 4-tuple hash is supported */
1267 if (info->data == (RXH_IP_SRC | RXH_IP_DST |
1268 RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1269 set_caps = QED_RSS_IPV6_UDP;
1270 DP_VERBOSE(edev, QED_MSG_DEBUG,
1271 "UDP 4-tuple enabled\n");
1272 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) {
1273 clr_caps = QED_RSS_IPV6_UDP;
1274 DP_VERBOSE(edev, QED_MSG_DEBUG,
1275 "UDP 4-tuple disabled\n");
1276 } else {
1277 return -EINVAL;
1278 }
1279 break;
1280 case IPV4_FLOW:
1281 case IPV6_FLOW:
1282 /* For IP only 2-tuple hash is supported */
1283 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST)) {
1284 DP_INFO(edev, "Command parameters not supported\n");
1285 return -EINVAL;
1286 }
1287 return 0;
1288 case SCTP_V4_FLOW:
1289 case AH_ESP_V4_FLOW:
1290 case AH_V4_FLOW:
1291 case ESP_V4_FLOW:
1292 case SCTP_V6_FLOW:
1293 case AH_ESP_V6_FLOW:
1294 case AH_V6_FLOW:
1295 case ESP_V6_FLOW:
1296 case IP_USER_FLOW:
1297 case ETHER_FLOW:
1298 /* RSS is not supported for these protocols */
1299 if (info->data) {
1300 DP_INFO(edev, "Command parameters not supported\n");
1301 return -EINVAL;
1302 }
1303 return 0;
1304 default:
1305 return -EINVAL;
1306 }
1307
1308 /* No action is needed if there is no change in the rss capability */
1309 if (edev->rss_caps == ((edev->rss_caps & ~clr_caps) | set_caps))
1310 return 0;
1311
1312 /* Update internal configuration */
1313 edev->rss_caps = ((edev->rss_caps & ~clr_caps) | set_caps);
1314 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
1315
1316 /* Re-configure if possible */
1317 __qede_lock(edev);
1318 if (edev->state == QEDE_STATE_OPEN) {
1319 vport_update_params = vzalloc(sizeof(*vport_update_params));
1320 if (!vport_update_params) {
1321 __qede_unlock(edev);
1322 return -ENOMEM;
1323 }
1324 qede_fill_rss_params(edev, &vport_update_params->rss_params,
1325 &vport_update_params->update_rss_flg);
1326 rc = edev->ops->vport_update(edev->cdev, vport_update_params);
1327 vfree(vport_update_params);
1328 }
1329 __qede_unlock(edev);
1330
1331 return rc;
1332}
1333
1334static int qede_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info)
1335{
1336 struct qede_dev *edev = netdev_priv(dev);
1337 int rc;
1338
1339 switch (info->cmd) {
1340 case ETHTOOL_SRXFH:
1341 rc = qede_set_rss_flags(edev, info);
1342 break;
1343 case ETHTOOL_SRXCLSRLINS:
1344 rc = qede_add_cls_rule(edev, info);
1345 break;
1346 case ETHTOOL_SRXCLSRLDEL:
1347 rc = qede_delete_flow_filter(edev, info->fs.location);
1348 break;
1349 default:
1350 DP_INFO(edev, "Command parameters not supported\n");
1351 rc = -EOPNOTSUPP;
1352 }
1353
1354 return rc;
1355}
1356
1357static u32 qede_get_rxfh_indir_size(struct net_device *dev)
1358{
1359 return QED_RSS_IND_TABLE_SIZE;
1360}
1361
1362static u32 qede_get_rxfh_key_size(struct net_device *dev)
1363{
1364 struct qede_dev *edev = netdev_priv(dev);
1365
1366 return sizeof(edev->rss_key);
1367}
1368
1369static int qede_get_rxfh(struct net_device *dev,
1370 struct ethtool_rxfh_param *rxfh)
1371{
1372 struct qede_dev *edev = netdev_priv(dev);
1373 int i;
1374
1375 rxfh->hfunc = ETH_RSS_HASH_TOP;
1376
1377 if (!rxfh->indir)
1378 return 0;
1379
1380 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++)
1381 rxfh->indir[i] = edev->rss_ind_table[i];
1382
1383 if (rxfh->key)
1384 memcpy(rxfh->key, edev->rss_key, qede_get_rxfh_key_size(dev));
1385
1386 return 0;
1387}
1388
1389static int qede_set_rxfh(struct net_device *dev,
1390 struct ethtool_rxfh_param *rxfh,
1391 struct netlink_ext_ack *extack)
1392{
1393 struct qed_update_vport_params *vport_update_params;
1394 struct qede_dev *edev = netdev_priv(dev);
1395 int i, rc = 0;
1396
1397 if (edev->dev_info.common.num_hwfns > 1) {
1398 DP_INFO(edev,
1399 "RSS configuration is not supported for 100G devices\n");
1400 return -EOPNOTSUPP;
1401 }
1402
1403 if (rxfh->hfunc != ETH_RSS_HASH_NO_CHANGE &&
1404 rxfh->hfunc != ETH_RSS_HASH_TOP)
1405 return -EOPNOTSUPP;
1406
1407 if (!rxfh->indir && !rxfh->key)
1408 return 0;
1409
1410 if (rxfh->indir) {
1411 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++)
1412 edev->rss_ind_table[i] = rxfh->indir[i];
1413 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
1414 }
1415
1416 if (rxfh->key) {
1417 memcpy(&edev->rss_key, rxfh->key, qede_get_rxfh_key_size(dev));
1418 edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
1419 }
1420
1421 __qede_lock(edev);
1422 if (edev->state == QEDE_STATE_OPEN) {
1423 vport_update_params = vzalloc(sizeof(*vport_update_params));
1424 if (!vport_update_params) {
1425 __qede_unlock(edev);
1426 return -ENOMEM;
1427 }
1428 qede_fill_rss_params(edev, &vport_update_params->rss_params,
1429 &vport_update_params->update_rss_flg);
1430 rc = edev->ops->vport_update(edev->cdev, vport_update_params);
1431 vfree(vport_update_params);
1432 }
1433 __qede_unlock(edev);
1434
1435 return rc;
1436}
1437
1438/* This function enables the interrupt generation and the NAPI on the device */
1439static void qede_netif_start(struct qede_dev *edev)
1440{
1441 int i;
1442
1443 if (!netif_running(edev->ndev))
1444 return;
1445
1446 for_each_queue(i) {
1447 /* Update and reenable interrupts */
1448 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_ENABLE, 1);
1449 napi_enable(&edev->fp_array[i].napi);
1450 }
1451}
1452
1453/* This function disables the NAPI and the interrupt generation on the device */
1454static void qede_netif_stop(struct qede_dev *edev)
1455{
1456 int i;
1457
1458 for_each_queue(i) {
1459 napi_disable(&edev->fp_array[i].napi);
1460 /* Disable interrupts */
1461 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_DISABLE, 0);
1462 }
1463}
1464
1465static int qede_selftest_transmit_traffic(struct qede_dev *edev,
1466 struct sk_buff *skb)
1467{
1468 struct qede_tx_queue *txq = NULL;
1469 struct eth_tx_1st_bd *first_bd;
1470 dma_addr_t mapping;
1471 int i, idx;
1472 u16 val;
1473
1474 for_each_queue(i) {
1475 struct qede_fastpath *fp = &edev->fp_array[i];
1476
1477 if (fp->type & QEDE_FASTPATH_TX) {
1478 txq = QEDE_FP_TC0_TXQ(fp);
1479 break;
1480 }
1481 }
1482
1483 if (!txq) {
1484 DP_NOTICE(edev, "Tx path is not available\n");
1485 return -1;
1486 }
1487
1488 /* Fill the entry in the SW ring and the BDs in the FW ring */
1489 idx = txq->sw_tx_prod;
1490 txq->sw_tx_ring.skbs[idx].skb = skb;
1491 first_bd = qed_chain_produce(&txq->tx_pbl);
1492 memset(first_bd, 0, sizeof(*first_bd));
1493 val = 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
1494 first_bd->data.bd_flags.bitfields = val;
1495 val = skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK;
1496 val = val << ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
1497 first_bd->data.bitfields |= cpu_to_le16(val);
1498
1499 /* Map skb linear data for DMA and set in the first BD */
1500 mapping = dma_map_single(&edev->pdev->dev, skb->data,
1501 skb_headlen(skb), DMA_TO_DEVICE);
1502 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
1503 DP_NOTICE(edev, "SKB mapping failed\n");
1504 return -ENOMEM;
1505 }
1506 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
1507
1508 /* update the first BD with the actual num BDs */
1509 first_bd->data.nbds = 1;
1510 txq->sw_tx_prod = (txq->sw_tx_prod + 1) % txq->num_tx_buffers;
1511 /* 'next page' entries are counted in the producer value */
1512 val = qed_chain_get_prod_idx(&txq->tx_pbl);
1513 txq->tx_db.data.bd_prod = cpu_to_le16(val);
1514
1515 /* wmb makes sure that the BDs data is updated before updating the
1516 * producer, otherwise FW may read old data from the BDs.
1517 */
1518 wmb();
1519 barrier();
1520 writel(txq->tx_db.raw, txq->doorbell_addr);
1521
1522 for (i = 0; i < QEDE_SELFTEST_POLL_COUNT; i++) {
1523 if (qede_txq_has_work(txq))
1524 break;
1525 usleep_range(100, 200);
1526 }
1527
1528 if (!qede_txq_has_work(txq)) {
1529 DP_NOTICE(edev, "Tx completion didn't happen\n");
1530 return -1;
1531 }
1532
1533 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
1534 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
1535 BD_UNMAP_LEN(first_bd), DMA_TO_DEVICE);
1536 txq->sw_tx_cons = (txq->sw_tx_cons + 1) % txq->num_tx_buffers;
1537 txq->sw_tx_ring.skbs[idx].skb = NULL;
1538
1539 return 0;
1540}
1541
1542static int qede_selftest_receive_traffic(struct qede_dev *edev)
1543{
1544 u16 sw_rx_index, len;
1545 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1546 struct qede_rx_queue *rxq = NULL;
1547 struct sw_rx_data *sw_rx_data;
1548 union eth_rx_cqe *cqe;
1549 int i, iter, rc = 0;
1550 u8 *data_ptr;
1551
1552 for_each_queue(i) {
1553 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) {
1554 rxq = edev->fp_array[i].rxq;
1555 break;
1556 }
1557 }
1558
1559 if (!rxq) {
1560 DP_NOTICE(edev, "Rx path is not available\n");
1561 return -1;
1562 }
1563
1564 /* The packet is expected to receive on rx-queue 0 even though RSS is
1565 * enabled. This is because the queue 0 is configured as the default
1566 * queue and that the loopback traffic is not IP.
1567 */
1568 for (iter = 0; iter < QEDE_SELFTEST_POLL_COUNT; iter++) {
1569 if (!qede_has_rx_work(rxq)) {
1570 usleep_range(100, 200);
1571 continue;
1572 }
1573
1574 /* Get the CQE from the completion ring */
1575 cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring);
1576
1577 /* Get the data from the SW ring */
1578 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1579 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1580 fp_cqe = &cqe->fast_path_regular;
1581 len = le16_to_cpu(fp_cqe->len_on_first_bd);
1582 data_ptr = (u8 *)(page_address(sw_rx_data->data) +
1583 fp_cqe->placement_offset +
1584 sw_rx_data->page_offset +
1585 rxq->rx_headroom);
1586 if (ether_addr_equal(data_ptr, edev->ndev->dev_addr) &&
1587 ether_addr_equal(data_ptr + ETH_ALEN,
1588 edev->ndev->dev_addr)) {
1589 for (i = ETH_HLEN; i < len; i++)
1590 if (data_ptr[i] != (unsigned char)(i & 0xff)) {
1591 rc = -1;
1592 break;
1593 }
1594
1595 qede_recycle_rx_bd_ring(rxq, 1);
1596 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1597 break;
1598 }
1599
1600 DP_INFO(edev, "Not the transmitted packet\n");
1601 qede_recycle_rx_bd_ring(rxq, 1);
1602 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1603 }
1604
1605 if (iter == QEDE_SELFTEST_POLL_COUNT) {
1606 DP_NOTICE(edev, "Failed to receive the traffic\n");
1607 return -1;
1608 }
1609
1610 qede_update_rx_prod(edev, rxq);
1611
1612 return rc;
1613}
1614
1615static int qede_selftest_run_loopback(struct qede_dev *edev, u32 loopback_mode)
1616{
1617 struct qed_link_params link_params;
1618 struct sk_buff *skb = NULL;
1619 int rc = 0, i;
1620 u32 pkt_size;
1621 u8 *packet;
1622
1623 if (!netif_running(edev->ndev)) {
1624 DP_NOTICE(edev, "Interface is down\n");
1625 return -EINVAL;
1626 }
1627
1628 qede_netif_stop(edev);
1629
1630 /* Bring up the link in Loopback mode */
1631 memset(&link_params, 0, sizeof(link_params));
1632 link_params.link_up = true;
1633 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE;
1634 link_params.loopback_mode = loopback_mode;
1635 edev->ops->common->set_link(edev->cdev, &link_params);
1636
1637 /* Wait for loopback configuration to apply */
1638 msleep_interruptible(500);
1639
1640 /* Setting max packet size to 1.5K to avoid data being split over
1641 * multiple BDs in cases where MTU > PAGE_SIZE.
1642 */
1643 pkt_size = (((edev->ndev->mtu < ETH_DATA_LEN) ?
1644 edev->ndev->mtu : ETH_DATA_LEN) + ETH_HLEN);
1645
1646 skb = netdev_alloc_skb(edev->ndev, pkt_size);
1647 if (!skb) {
1648 DP_INFO(edev, "Can't allocate skb\n");
1649 rc = -ENOMEM;
1650 goto test_loopback_exit;
1651 }
1652 packet = skb_put(skb, pkt_size);
1653 ether_addr_copy(packet, edev->ndev->dev_addr);
1654 ether_addr_copy(packet + ETH_ALEN, edev->ndev->dev_addr);
1655 memset(packet + (2 * ETH_ALEN), 0x77, (ETH_HLEN - (2 * ETH_ALEN)));
1656 for (i = ETH_HLEN; i < pkt_size; i++)
1657 packet[i] = (unsigned char)(i & 0xff);
1658
1659 rc = qede_selftest_transmit_traffic(edev, skb);
1660 if (rc)
1661 goto test_loopback_exit;
1662
1663 rc = qede_selftest_receive_traffic(edev);
1664 if (rc)
1665 goto test_loopback_exit;
1666
1667 DP_VERBOSE(edev, NETIF_MSG_RX_STATUS, "Loopback test successful\n");
1668
1669test_loopback_exit:
1670 dev_kfree_skb(skb);
1671
1672 /* Bring up the link in Normal mode */
1673 memset(&link_params, 0, sizeof(link_params));
1674 link_params.link_up = true;
1675 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE;
1676 link_params.loopback_mode = QED_LINK_LOOPBACK_NONE;
1677 edev->ops->common->set_link(edev->cdev, &link_params);
1678
1679 /* Wait for loopback configuration to apply */
1680 msleep_interruptible(500);
1681
1682 qede_netif_start(edev);
1683
1684 return rc;
1685}
1686
1687static void qede_self_test(struct net_device *dev,
1688 struct ethtool_test *etest, u64 *buf)
1689{
1690 struct qede_dev *edev = netdev_priv(dev);
1691
1692 DP_VERBOSE(edev, QED_MSG_DEBUG,
1693 "Self-test command parameters: offline = %d, external_lb = %d\n",
1694 (etest->flags & ETH_TEST_FL_OFFLINE),
1695 (etest->flags & ETH_TEST_FL_EXTERNAL_LB) >> 2);
1696
1697 memset(buf, 0, sizeof(u64) * QEDE_ETHTOOL_TEST_MAX);
1698
1699 if (etest->flags & ETH_TEST_FL_OFFLINE) {
1700 if (qede_selftest_run_loopback(edev,
1701 QED_LINK_LOOPBACK_INT_PHY)) {
1702 buf[QEDE_ETHTOOL_INT_LOOPBACK] = 1;
1703 etest->flags |= ETH_TEST_FL_FAILED;
1704 }
1705 }
1706
1707 if (edev->ops->common->selftest->selftest_interrupt(edev->cdev)) {
1708 buf[QEDE_ETHTOOL_INTERRUPT_TEST] = 1;
1709 etest->flags |= ETH_TEST_FL_FAILED;
1710 }
1711
1712 if (edev->ops->common->selftest->selftest_memory(edev->cdev)) {
1713 buf[QEDE_ETHTOOL_MEMORY_TEST] = 1;
1714 etest->flags |= ETH_TEST_FL_FAILED;
1715 }
1716
1717 if (edev->ops->common->selftest->selftest_register(edev->cdev)) {
1718 buf[QEDE_ETHTOOL_REGISTER_TEST] = 1;
1719 etest->flags |= ETH_TEST_FL_FAILED;
1720 }
1721
1722 if (edev->ops->common->selftest->selftest_clock(edev->cdev)) {
1723 buf[QEDE_ETHTOOL_CLOCK_TEST] = 1;
1724 etest->flags |= ETH_TEST_FL_FAILED;
1725 }
1726
1727 if (edev->ops->common->selftest->selftest_nvram(edev->cdev)) {
1728 buf[QEDE_ETHTOOL_NVRAM_TEST] = 1;
1729 etest->flags |= ETH_TEST_FL_FAILED;
1730 }
1731}
1732
1733static int qede_set_tunable(struct net_device *dev,
1734 const struct ethtool_tunable *tuna,
1735 const void *data)
1736{
1737 struct qede_dev *edev = netdev_priv(dev);
1738 u32 val;
1739
1740 switch (tuna->id) {
1741 case ETHTOOL_RX_COPYBREAK:
1742 val = *(u32 *)data;
1743 if (val < QEDE_MIN_PKT_LEN || val > QEDE_RX_HDR_SIZE) {
1744 DP_VERBOSE(edev, QED_MSG_DEBUG,
1745 "Invalid rx copy break value, range is [%u, %u]",
1746 QEDE_MIN_PKT_LEN, QEDE_RX_HDR_SIZE);
1747 return -EINVAL;
1748 }
1749
1750 edev->rx_copybreak = *(u32 *)data;
1751 break;
1752 default:
1753 return -EOPNOTSUPP;
1754 }
1755
1756 return 0;
1757}
1758
1759static int qede_get_tunable(struct net_device *dev,
1760 const struct ethtool_tunable *tuna, void *data)
1761{
1762 struct qede_dev *edev = netdev_priv(dev);
1763
1764 switch (tuna->id) {
1765 case ETHTOOL_RX_COPYBREAK:
1766 *(u32 *)data = edev->rx_copybreak;
1767 break;
1768 default:
1769 return -EOPNOTSUPP;
1770 }
1771
1772 return 0;
1773}
1774
1775static int qede_get_eee(struct net_device *dev, struct ethtool_keee *edata)
1776{
1777 struct qede_dev *edev = netdev_priv(dev);
1778 struct qed_link_output current_link;
1779
1780 memset(¤t_link, 0, sizeof(current_link));
1781 edev->ops->common->get_link(edev->cdev, ¤t_link);
1782
1783 if (!current_link.eee_supported) {
1784 DP_INFO(edev, "EEE is not supported\n");
1785 return -EOPNOTSUPP;
1786 }
1787
1788 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1789 edata->advertised,
1790 current_link.eee.adv_caps & QED_EEE_1G_ADV);
1791 linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
1792 edata->advertised,
1793 current_link.eee.adv_caps & QED_EEE_10G_ADV);
1794
1795 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1796 edata->supported,
1797 current_link.sup_caps & QED_EEE_1G_ADV);
1798 linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
1799 edata->supported,
1800 current_link.sup_caps & QED_EEE_10G_ADV);
1801
1802 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1803 edata->lp_advertised,
1804 current_link.eee.lp_adv_caps & QED_EEE_1G_ADV);
1805 linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
1806 edata->lp_advertised,
1807 current_link.eee.lp_adv_caps & QED_EEE_10G_ADV);
1808
1809 edata->tx_lpi_timer = current_link.eee.tx_lpi_timer;
1810 edata->eee_enabled = current_link.eee.enable;
1811 edata->tx_lpi_enabled = current_link.eee.tx_lpi_enable;
1812 edata->eee_active = current_link.eee_active;
1813
1814 return 0;
1815}
1816
1817static int qede_set_eee(struct net_device *dev, struct ethtool_keee *edata)
1818{
1819 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = {};
1820 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = {};
1821 struct qede_dev *edev = netdev_priv(dev);
1822 struct qed_link_output current_link;
1823 struct qed_link_params params;
1824 bool unsupp;
1825
1826 if (!edev->ops->common->can_link_change(edev->cdev)) {
1827 DP_INFO(edev, "Link settings are not allowed to be changed\n");
1828 return -EOPNOTSUPP;
1829 }
1830
1831 memset(¤t_link, 0, sizeof(current_link));
1832 edev->ops->common->get_link(edev->cdev, ¤t_link);
1833
1834 if (!current_link.eee_supported) {
1835 DP_INFO(edev, "EEE is not supported\n");
1836 return -EOPNOTSUPP;
1837 }
1838
1839 memset(¶ms, 0, sizeof(params));
1840 params.override_flags |= QED_LINK_OVERRIDE_EEE_CONFIG;
1841
1842 linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
1843 supported);
1844 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1845 supported);
1846
1847 unsupp = linkmode_andnot(tmp, edata->advertised, supported);
1848 if (unsupp) {
1849 DP_VERBOSE(edev, QED_MSG_DEBUG,
1850 "Invalid advertised capabilities %*pb\n",
1851 __ETHTOOL_LINK_MODE_MASK_NBITS, edata->advertised);
1852 return -EINVAL;
1853 }
1854
1855 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1856 edata->advertised))
1857 params.eee.adv_caps = QED_EEE_1G_ADV;
1858 if (linkmode_test_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
1859 edata->advertised))
1860 params.eee.adv_caps = QED_EEE_10G_ADV;
1861
1862 params.eee.enable = edata->eee_enabled;
1863 params.eee.tx_lpi_enable = edata->tx_lpi_enabled;
1864 params.eee.tx_lpi_timer = edata->tx_lpi_timer;
1865
1866 params.link_up = true;
1867 edev->ops->common->set_link(edev->cdev, ¶ms);
1868
1869 return 0;
1870}
1871
1872static u32 qede_link_to_ethtool_fec(u32 link_fec)
1873{
1874 u32 eth_fec = 0;
1875
1876 if (link_fec & QED_FEC_MODE_NONE)
1877 eth_fec |= ETHTOOL_FEC_OFF;
1878 if (link_fec & QED_FEC_MODE_FIRECODE)
1879 eth_fec |= ETHTOOL_FEC_BASER;
1880 if (link_fec & QED_FEC_MODE_RS)
1881 eth_fec |= ETHTOOL_FEC_RS;
1882 if (link_fec & QED_FEC_MODE_AUTO)
1883 eth_fec |= ETHTOOL_FEC_AUTO;
1884 if (link_fec & QED_FEC_MODE_UNSUPPORTED)
1885 eth_fec |= ETHTOOL_FEC_NONE;
1886
1887 return eth_fec;
1888}
1889
1890static u32 qede_ethtool_to_link_fec(u32 eth_fec)
1891{
1892 u32 link_fec = 0;
1893
1894 if (eth_fec & ETHTOOL_FEC_OFF)
1895 link_fec |= QED_FEC_MODE_NONE;
1896 if (eth_fec & ETHTOOL_FEC_BASER)
1897 link_fec |= QED_FEC_MODE_FIRECODE;
1898 if (eth_fec & ETHTOOL_FEC_RS)
1899 link_fec |= QED_FEC_MODE_RS;
1900 if (eth_fec & ETHTOOL_FEC_AUTO)
1901 link_fec |= QED_FEC_MODE_AUTO;
1902 if (eth_fec & ETHTOOL_FEC_NONE)
1903 link_fec |= QED_FEC_MODE_UNSUPPORTED;
1904
1905 return link_fec;
1906}
1907
1908static int qede_get_fecparam(struct net_device *dev,
1909 struct ethtool_fecparam *fecparam)
1910{
1911 struct qede_dev *edev = netdev_priv(dev);
1912 struct qed_link_output curr_link;
1913
1914 memset(&curr_link, 0, sizeof(curr_link));
1915 edev->ops->common->get_link(edev->cdev, &curr_link);
1916
1917 fecparam->active_fec = qede_link_to_ethtool_fec(curr_link.active_fec);
1918 fecparam->fec = qede_link_to_ethtool_fec(curr_link.sup_fec);
1919
1920 return 0;
1921}
1922
1923static int qede_set_fecparam(struct net_device *dev,
1924 struct ethtool_fecparam *fecparam)
1925{
1926 struct qede_dev *edev = netdev_priv(dev);
1927 struct qed_link_params params;
1928
1929 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
1930 DP_INFO(edev, "Link settings are not allowed to be changed\n");
1931 return -EOPNOTSUPP;
1932 }
1933
1934 memset(¶ms, 0, sizeof(params));
1935 params.override_flags |= QED_LINK_OVERRIDE_FEC_CONFIG;
1936 params.fec = qede_ethtool_to_link_fec(fecparam->fec);
1937 params.link_up = true;
1938
1939 edev->ops->common->set_link(edev->cdev, ¶ms);
1940
1941 return 0;
1942}
1943
1944static int qede_get_module_info(struct net_device *dev,
1945 struct ethtool_modinfo *modinfo)
1946{
1947 struct qede_dev *edev = netdev_priv(dev);
1948 u8 buf[4];
1949 int rc;
1950
1951 /* Read first 4 bytes to find the sfp type */
1952 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf,
1953 QED_I2C_DEV_ADDR_A0, 0, 4);
1954 if (rc) {
1955 DP_ERR(edev, "Failed reading EEPROM data %d\n", rc);
1956 return rc;
1957 }
1958
1959 switch (buf[0]) {
1960 case 0x3: /* SFP, SFP+, SFP-28 */
1961 modinfo->type = ETH_MODULE_SFF_8472;
1962 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1963 break;
1964 case 0xc: /* QSFP */
1965 case 0xd: /* QSFP+ */
1966 modinfo->type = ETH_MODULE_SFF_8436;
1967 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1968 break;
1969 case 0x11: /* QSFP-28 */
1970 modinfo->type = ETH_MODULE_SFF_8636;
1971 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1972 break;
1973 default:
1974 DP_ERR(edev, "Unknown transceiver type 0x%x\n", buf[0]);
1975 return -EINVAL;
1976 }
1977
1978 return 0;
1979}
1980
1981static int qede_get_module_eeprom(struct net_device *dev,
1982 struct ethtool_eeprom *ee, u8 *data)
1983{
1984 struct qede_dev *edev = netdev_priv(dev);
1985 u32 start_addr = ee->offset, size = 0;
1986 u8 *buf = data;
1987 int rc = 0;
1988
1989 /* Read A0 section */
1990 if (ee->offset < ETH_MODULE_SFF_8079_LEN) {
1991 /* Limit transfer size to the A0 section boundary */
1992 if (ee->offset + ee->len > ETH_MODULE_SFF_8079_LEN)
1993 size = ETH_MODULE_SFF_8079_LEN - ee->offset;
1994 else
1995 size = ee->len;
1996
1997 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf,
1998 QED_I2C_DEV_ADDR_A0,
1999 start_addr, size);
2000 if (rc) {
2001 DP_ERR(edev, "Failed reading A0 section %d\n", rc);
2002 return rc;
2003 }
2004
2005 buf += size;
2006 start_addr += size;
2007 }
2008
2009 /* Read A2 section */
2010 if (start_addr >= ETH_MODULE_SFF_8079_LEN &&
2011 start_addr < ETH_MODULE_SFF_8472_LEN) {
2012 size = ee->len - size;
2013 /* Limit transfer size to the A2 section boundary */
2014 if (start_addr + size > ETH_MODULE_SFF_8472_LEN)
2015 size = ETH_MODULE_SFF_8472_LEN - start_addr;
2016 start_addr -= ETH_MODULE_SFF_8079_LEN;
2017 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf,
2018 QED_I2C_DEV_ADDR_A2,
2019 start_addr, size);
2020 if (rc) {
2021 DP_VERBOSE(edev, QED_MSG_DEBUG,
2022 "Failed reading A2 section %d\n", rc);
2023 return 0;
2024 }
2025 }
2026
2027 return rc;
2028}
2029
2030static int qede_set_dump(struct net_device *dev, struct ethtool_dump *val)
2031{
2032 struct qede_dev *edev = netdev_priv(dev);
2033 int rc = 0;
2034
2035 if (edev->dump_info.cmd == QEDE_DUMP_CMD_NONE) {
2036 if (val->flag > QEDE_DUMP_CMD_MAX) {
2037 DP_ERR(edev, "Invalid command %d\n", val->flag);
2038 return -EINVAL;
2039 }
2040 edev->dump_info.cmd = val->flag;
2041 edev->dump_info.num_args = 0;
2042 return 0;
2043 }
2044
2045 if (edev->dump_info.num_args == QEDE_DUMP_MAX_ARGS) {
2046 DP_ERR(edev, "Arg count = %d\n", edev->dump_info.num_args);
2047 return -EINVAL;
2048 }
2049
2050 switch (edev->dump_info.cmd) {
2051 case QEDE_DUMP_CMD_NVM_CFG:
2052 edev->dump_info.args[edev->dump_info.num_args] = val->flag;
2053 edev->dump_info.num_args++;
2054 break;
2055 case QEDE_DUMP_CMD_GRCDUMP:
2056 rc = edev->ops->common->set_grc_config(edev->cdev,
2057 val->flag, 1);
2058 break;
2059 default:
2060 break;
2061 }
2062
2063 return rc;
2064}
2065
2066static int qede_get_dump_flag(struct net_device *dev,
2067 struct ethtool_dump *dump)
2068{
2069 struct qede_dev *edev = netdev_priv(dev);
2070
2071 if (!edev->ops || !edev->ops->common) {
2072 DP_ERR(edev, "Edev ops not populated\n");
2073 return -EINVAL;
2074 }
2075
2076 dump->version = QEDE_DUMP_VERSION;
2077 switch (edev->dump_info.cmd) {
2078 case QEDE_DUMP_CMD_NVM_CFG:
2079 dump->flag = QEDE_DUMP_CMD_NVM_CFG;
2080 dump->len = edev->ops->common->read_nvm_cfg_len(edev->cdev,
2081 edev->dump_info.args[0]);
2082 break;
2083 case QEDE_DUMP_CMD_GRCDUMP:
2084 dump->flag = QEDE_DUMP_CMD_GRCDUMP;
2085 dump->len = edev->ops->common->dbg_all_data_size(edev->cdev);
2086 break;
2087 default:
2088 DP_ERR(edev, "Invalid cmd = %d\n", edev->dump_info.cmd);
2089 return -EINVAL;
2090 }
2091
2092 DP_VERBOSE(edev, QED_MSG_DEBUG,
2093 "dump->version = 0x%x dump->flag = %d dump->len = %d\n",
2094 dump->version, dump->flag, dump->len);
2095 return 0;
2096}
2097
2098static int qede_get_dump_data(struct net_device *dev,
2099 struct ethtool_dump *dump, void *buf)
2100{
2101 struct qede_dev *edev = netdev_priv(dev);
2102 int rc = 0;
2103
2104 if (!edev->ops || !edev->ops->common) {
2105 DP_ERR(edev, "Edev ops not populated\n");
2106 rc = -EINVAL;
2107 goto err;
2108 }
2109
2110 switch (edev->dump_info.cmd) {
2111 case QEDE_DUMP_CMD_NVM_CFG:
2112 if (edev->dump_info.num_args != QEDE_DUMP_NVM_ARG_COUNT) {
2113 DP_ERR(edev, "Arg count = %d required = %d\n",
2114 edev->dump_info.num_args,
2115 QEDE_DUMP_NVM_ARG_COUNT);
2116 rc = -EINVAL;
2117 goto err;
2118 }
2119 rc = edev->ops->common->read_nvm_cfg(edev->cdev, (u8 **)&buf,
2120 edev->dump_info.args[0],
2121 edev->dump_info.args[1]);
2122 break;
2123 case QEDE_DUMP_CMD_GRCDUMP:
2124 memset(buf, 0, dump->len);
2125 rc = edev->ops->common->dbg_all_data(edev->cdev, buf);
2126 break;
2127 default:
2128 DP_ERR(edev, "Invalid cmd = %d\n", edev->dump_info.cmd);
2129 rc = -EINVAL;
2130 break;
2131 }
2132
2133err:
2134 edev->dump_info.cmd = QEDE_DUMP_CMD_NONE;
2135 edev->dump_info.num_args = 0;
2136 memset(edev->dump_info.args, 0, sizeof(edev->dump_info.args));
2137
2138 return rc;
2139}
2140
2141int qede_set_per_coalesce(struct net_device *dev, u32 queue,
2142 struct ethtool_coalesce *coal)
2143{
2144 struct qede_dev *edev = netdev_priv(dev);
2145 struct qede_fastpath *fp;
2146 u16 rxc, txc;
2147 int rc = 0;
2148
2149 if (coal->rx_coalesce_usecs > QED_COALESCE_MAX ||
2150 coal->tx_coalesce_usecs > QED_COALESCE_MAX) {
2151 DP_INFO(edev,
2152 "Can't support requested %s coalesce value [max supported value %d]\n",
2153 coal->rx_coalesce_usecs > QED_COALESCE_MAX ? "rx"
2154 : "tx",
2155 QED_COALESCE_MAX);
2156 return -EINVAL;
2157 }
2158
2159 rxc = (u16)coal->rx_coalesce_usecs;
2160 txc = (u16)coal->tx_coalesce_usecs;
2161
2162 __qede_lock(edev);
2163 if (queue >= edev->num_queues) {
2164 DP_INFO(edev, "Invalid queue\n");
2165 rc = -EINVAL;
2166 goto out;
2167 }
2168
2169 if (edev->state != QEDE_STATE_OPEN) {
2170 rc = -EINVAL;
2171 goto out;
2172 }
2173
2174 fp = &edev->fp_array[queue];
2175
2176 if (edev->fp_array[queue].type & QEDE_FASTPATH_RX) {
2177 rc = edev->ops->common->set_coalesce(edev->cdev,
2178 rxc, 0,
2179 fp->rxq->handle);
2180 if (rc) {
2181 DP_INFO(edev,
2182 "Set RX coalesce error, rc = %d\n", rc);
2183 goto out;
2184 }
2185 edev->coal_entry[queue].rxc = rxc;
2186 edev->coal_entry[queue].isvalid = true;
2187 }
2188
2189 if (edev->fp_array[queue].type & QEDE_FASTPATH_TX) {
2190 rc = edev->ops->common->set_coalesce(edev->cdev,
2191 0, txc,
2192 fp->txq->handle);
2193 if (rc) {
2194 DP_INFO(edev,
2195 "Set TX coalesce error, rc = %d\n", rc);
2196 goto out;
2197 }
2198 edev->coal_entry[queue].txc = txc;
2199 edev->coal_entry[queue].isvalid = true;
2200 }
2201out:
2202 __qede_unlock(edev);
2203
2204 return rc;
2205}
2206
2207static int qede_get_per_coalesce(struct net_device *dev,
2208 u32 queue,
2209 struct ethtool_coalesce *coal)
2210{
2211 void *rx_handle = NULL, *tx_handle = NULL;
2212 struct qede_dev *edev = netdev_priv(dev);
2213 struct qede_fastpath *fp;
2214 u16 rx_coal, tx_coal;
2215 int rc = 0;
2216
2217 rx_coal = QED_DEFAULT_RX_USECS;
2218 tx_coal = QED_DEFAULT_TX_USECS;
2219
2220 memset(coal, 0, sizeof(struct ethtool_coalesce));
2221
2222 __qede_lock(edev);
2223 if (queue >= edev->num_queues) {
2224 DP_INFO(edev, "Invalid queue\n");
2225 rc = -EINVAL;
2226 goto out;
2227 }
2228
2229 if (edev->state != QEDE_STATE_OPEN) {
2230 rc = -EINVAL;
2231 goto out;
2232 }
2233
2234 fp = &edev->fp_array[queue];
2235
2236 if (fp->type & QEDE_FASTPATH_RX)
2237 rx_handle = fp->rxq->handle;
2238
2239 rc = edev->ops->get_coalesce(edev->cdev, &rx_coal,
2240 rx_handle);
2241 if (rc) {
2242 DP_INFO(edev, "Read Rx coalesce error\n");
2243 goto out;
2244 }
2245
2246 fp = &edev->fp_array[queue];
2247 if (fp->type & QEDE_FASTPATH_TX)
2248 tx_handle = fp->txq->handle;
2249
2250 rc = edev->ops->get_coalesce(edev->cdev, &tx_coal,
2251 tx_handle);
2252 if (rc)
2253 DP_INFO(edev, "Read Tx coalesce error\n");
2254
2255out:
2256 __qede_unlock(edev);
2257
2258 coal->rx_coalesce_usecs = rx_coal;
2259 coal->tx_coalesce_usecs = tx_coal;
2260
2261 return rc;
2262}
2263
2264static const struct ethtool_ops qede_ethtool_ops = {
2265 .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
2266 ETHTOOL_COALESCE_STATS_BLOCK_USECS,
2267 .get_link_ksettings = qede_get_link_ksettings,
2268 .set_link_ksettings = qede_set_link_ksettings,
2269 .get_drvinfo = qede_get_drvinfo,
2270 .get_regs_len = qede_get_regs_len,
2271 .get_regs = qede_get_regs,
2272 .get_wol = qede_get_wol,
2273 .set_wol = qede_set_wol,
2274 .get_msglevel = qede_get_msglevel,
2275 .set_msglevel = qede_set_msglevel,
2276 .nway_reset = qede_nway_reset,
2277 .get_link = qede_get_link,
2278 .get_coalesce = qede_get_coalesce,
2279 .set_coalesce = qede_set_coalesce,
2280 .get_ringparam = qede_get_ringparam,
2281 .set_ringparam = qede_set_ringparam,
2282 .get_pauseparam = qede_get_pauseparam,
2283 .set_pauseparam = qede_set_pauseparam,
2284 .get_strings = qede_get_strings,
2285 .set_phys_id = qede_set_phys_id,
2286 .get_ethtool_stats = qede_get_ethtool_stats,
2287 .get_priv_flags = qede_get_priv_flags,
2288 .set_priv_flags = qede_set_priv_flags,
2289 .get_sset_count = qede_get_sset_count,
2290 .get_rxnfc = qede_get_rxnfc,
2291 .set_rxnfc = qede_set_rxnfc,
2292 .get_rxfh_indir_size = qede_get_rxfh_indir_size,
2293 .get_rxfh_key_size = qede_get_rxfh_key_size,
2294 .get_rxfh = qede_get_rxfh,
2295 .set_rxfh = qede_set_rxfh,
2296 .get_ts_info = qede_get_ts_info,
2297 .get_channels = qede_get_channels,
2298 .set_channels = qede_set_channels,
2299 .self_test = qede_self_test,
2300 .get_module_info = qede_get_module_info,
2301 .get_module_eeprom = qede_get_module_eeprom,
2302 .get_eee = qede_get_eee,
2303 .set_eee = qede_set_eee,
2304 .get_fecparam = qede_get_fecparam,
2305 .set_fecparam = qede_set_fecparam,
2306 .get_tunable = qede_get_tunable,
2307 .set_tunable = qede_set_tunable,
2308 .get_per_queue_coalesce = qede_get_per_coalesce,
2309 .set_per_queue_coalesce = qede_set_per_coalesce,
2310 .flash_device = qede_flash_device,
2311 .get_dump_flag = qede_get_dump_flag,
2312 .get_dump_data = qede_get_dump_data,
2313 .set_dump = qede_set_dump,
2314};
2315
2316static const struct ethtool_ops qede_vf_ethtool_ops = {
2317 .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
2318 ETHTOOL_COALESCE_STATS_BLOCK_USECS,
2319 .get_link_ksettings = qede_get_link_ksettings,
2320 .get_drvinfo = qede_get_drvinfo,
2321 .get_msglevel = qede_get_msglevel,
2322 .set_msglevel = qede_set_msglevel,
2323 .get_link = qede_get_link,
2324 .get_coalesce = qede_get_coalesce,
2325 .set_coalesce = qede_set_coalesce,
2326 .get_ringparam = qede_get_ringparam,
2327 .set_ringparam = qede_set_ringparam,
2328 .get_strings = qede_get_strings,
2329 .get_ethtool_stats = qede_get_ethtool_stats,
2330 .get_priv_flags = qede_get_priv_flags,
2331 .get_sset_count = qede_get_sset_count,
2332 .get_rxnfc = qede_get_rxnfc,
2333 .set_rxnfc = qede_set_rxnfc,
2334 .get_rxfh_indir_size = qede_get_rxfh_indir_size,
2335 .get_rxfh_key_size = qede_get_rxfh_key_size,
2336 .get_rxfh = qede_get_rxfh,
2337 .set_rxfh = qede_set_rxfh,
2338 .get_channels = qede_get_channels,
2339 .set_channels = qede_set_channels,
2340 .get_per_queue_coalesce = qede_get_per_coalesce,
2341 .set_per_queue_coalesce = qede_set_per_coalesce,
2342 .get_tunable = qede_get_tunable,
2343 .set_tunable = qede_set_tunable,
2344};
2345
2346void qede_set_ethtool_ops(struct net_device *dev)
2347{
2348 struct qede_dev *edev = netdev_priv(dev);
2349
2350 if (IS_VF(edev))
2351 dev->ethtool_ops = &qede_vf_ethtool_ops;
2352 else
2353 dev->ethtool_ops = &qede_ethtool_ops;
2354}
1/* QLogic qede NIC Driver
2 * Copyright (c) 2015-2017 QLogic Corporation
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32#include <linux/version.h>
33#include <linux/types.h>
34#include <linux/netdevice.h>
35#include <linux/etherdevice.h>
36#include <linux/ethtool.h>
37#include <linux/string.h>
38#include <linux/pci.h>
39#include <linux/capability.h>
40#include <linux/vmalloc.h>
41#include "qede.h"
42#include "qede_ptp.h"
43
44#define QEDE_RQSTAT_OFFSET(stat_name) \
45 (offsetof(struct qede_rx_queue, stat_name))
46#define QEDE_RQSTAT_STRING(stat_name) (#stat_name)
47#define QEDE_RQSTAT(stat_name) \
48 {QEDE_RQSTAT_OFFSET(stat_name), QEDE_RQSTAT_STRING(stat_name)}
49
50#define QEDE_SELFTEST_POLL_COUNT 100
51
52static const struct {
53 u64 offset;
54 char string[ETH_GSTRING_LEN];
55} qede_rqstats_arr[] = {
56 QEDE_RQSTAT(rcv_pkts),
57 QEDE_RQSTAT(rx_hw_errors),
58 QEDE_RQSTAT(rx_alloc_errors),
59 QEDE_RQSTAT(rx_ip_frags),
60 QEDE_RQSTAT(xdp_no_pass),
61};
62
63#define QEDE_NUM_RQSTATS ARRAY_SIZE(qede_rqstats_arr)
64#define QEDE_TQSTAT_OFFSET(stat_name) \
65 (offsetof(struct qede_tx_queue, stat_name))
66#define QEDE_TQSTAT_STRING(stat_name) (#stat_name)
67#define QEDE_TQSTAT(stat_name) \
68 {QEDE_TQSTAT_OFFSET(stat_name), QEDE_TQSTAT_STRING(stat_name)}
69#define QEDE_NUM_TQSTATS ARRAY_SIZE(qede_tqstats_arr)
70static const struct {
71 u64 offset;
72 char string[ETH_GSTRING_LEN];
73} qede_tqstats_arr[] = {
74 QEDE_TQSTAT(xmit_pkts),
75 QEDE_TQSTAT(stopped_cnt),
76};
77
78#define QEDE_STAT_OFFSET(stat_name, type, base) \
79 (offsetof(type, stat_name) + (base))
80#define QEDE_STAT_STRING(stat_name) (#stat_name)
81#define _QEDE_STAT(stat_name, type, base, attr) \
82 {QEDE_STAT_OFFSET(stat_name, type, base), \
83 QEDE_STAT_STRING(stat_name), \
84 attr}
85#define QEDE_STAT(stat_name) \
86 _QEDE_STAT(stat_name, struct qede_stats_common, 0, 0x0)
87#define QEDE_PF_STAT(stat_name) \
88 _QEDE_STAT(stat_name, struct qede_stats_common, 0, \
89 BIT(QEDE_STAT_PF_ONLY))
90#define QEDE_PF_BB_STAT(stat_name) \
91 _QEDE_STAT(stat_name, struct qede_stats_bb, \
92 offsetof(struct qede_stats, bb), \
93 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_BB_ONLY))
94#define QEDE_PF_AH_STAT(stat_name) \
95 _QEDE_STAT(stat_name, struct qede_stats_ah, \
96 offsetof(struct qede_stats, ah), \
97 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_AH_ONLY))
98static const struct {
99 u64 offset;
100 char string[ETH_GSTRING_LEN];
101 unsigned long attr;
102#define QEDE_STAT_PF_ONLY 0
103#define QEDE_STAT_BB_ONLY 1
104#define QEDE_STAT_AH_ONLY 2
105} qede_stats_arr[] = {
106 QEDE_STAT(rx_ucast_bytes),
107 QEDE_STAT(rx_mcast_bytes),
108 QEDE_STAT(rx_bcast_bytes),
109 QEDE_STAT(rx_ucast_pkts),
110 QEDE_STAT(rx_mcast_pkts),
111 QEDE_STAT(rx_bcast_pkts),
112
113 QEDE_STAT(tx_ucast_bytes),
114 QEDE_STAT(tx_mcast_bytes),
115 QEDE_STAT(tx_bcast_bytes),
116 QEDE_STAT(tx_ucast_pkts),
117 QEDE_STAT(tx_mcast_pkts),
118 QEDE_STAT(tx_bcast_pkts),
119
120 QEDE_PF_STAT(rx_64_byte_packets),
121 QEDE_PF_STAT(rx_65_to_127_byte_packets),
122 QEDE_PF_STAT(rx_128_to_255_byte_packets),
123 QEDE_PF_STAT(rx_256_to_511_byte_packets),
124 QEDE_PF_STAT(rx_512_to_1023_byte_packets),
125 QEDE_PF_STAT(rx_1024_to_1518_byte_packets),
126 QEDE_PF_BB_STAT(rx_1519_to_1522_byte_packets),
127 QEDE_PF_BB_STAT(rx_1519_to_2047_byte_packets),
128 QEDE_PF_BB_STAT(rx_2048_to_4095_byte_packets),
129 QEDE_PF_BB_STAT(rx_4096_to_9216_byte_packets),
130 QEDE_PF_BB_STAT(rx_9217_to_16383_byte_packets),
131 QEDE_PF_AH_STAT(rx_1519_to_max_byte_packets),
132 QEDE_PF_STAT(tx_64_byte_packets),
133 QEDE_PF_STAT(tx_65_to_127_byte_packets),
134 QEDE_PF_STAT(tx_128_to_255_byte_packets),
135 QEDE_PF_STAT(tx_256_to_511_byte_packets),
136 QEDE_PF_STAT(tx_512_to_1023_byte_packets),
137 QEDE_PF_STAT(tx_1024_to_1518_byte_packets),
138 QEDE_PF_BB_STAT(tx_1519_to_2047_byte_packets),
139 QEDE_PF_BB_STAT(tx_2048_to_4095_byte_packets),
140 QEDE_PF_BB_STAT(tx_4096_to_9216_byte_packets),
141 QEDE_PF_BB_STAT(tx_9217_to_16383_byte_packets),
142 QEDE_PF_AH_STAT(tx_1519_to_max_byte_packets),
143 QEDE_PF_STAT(rx_mac_crtl_frames),
144 QEDE_PF_STAT(tx_mac_ctrl_frames),
145 QEDE_PF_STAT(rx_pause_frames),
146 QEDE_PF_STAT(tx_pause_frames),
147 QEDE_PF_STAT(rx_pfc_frames),
148 QEDE_PF_STAT(tx_pfc_frames),
149
150 QEDE_PF_STAT(rx_crc_errors),
151 QEDE_PF_STAT(rx_align_errors),
152 QEDE_PF_STAT(rx_carrier_errors),
153 QEDE_PF_STAT(rx_oversize_packets),
154 QEDE_PF_STAT(rx_jabbers),
155 QEDE_PF_STAT(rx_undersize_packets),
156 QEDE_PF_STAT(rx_fragments),
157 QEDE_PF_BB_STAT(tx_lpi_entry_count),
158 QEDE_PF_BB_STAT(tx_total_collisions),
159 QEDE_PF_STAT(brb_truncates),
160 QEDE_PF_STAT(brb_discards),
161 QEDE_STAT(no_buff_discards),
162 QEDE_PF_STAT(mftag_filter_discards),
163 QEDE_PF_STAT(mac_filter_discards),
164 QEDE_STAT(tx_err_drop_pkts),
165 QEDE_STAT(ttl0_discard),
166 QEDE_STAT(packet_too_big_discard),
167
168 QEDE_STAT(coalesced_pkts),
169 QEDE_STAT(coalesced_events),
170 QEDE_STAT(coalesced_aborts_num),
171 QEDE_STAT(non_coalesced_pkts),
172 QEDE_STAT(coalesced_bytes),
173};
174
175#define QEDE_NUM_STATS ARRAY_SIZE(qede_stats_arr)
176#define QEDE_STAT_IS_PF_ONLY(i) \
177 test_bit(QEDE_STAT_PF_ONLY, &qede_stats_arr[i].attr)
178#define QEDE_STAT_IS_BB_ONLY(i) \
179 test_bit(QEDE_STAT_BB_ONLY, &qede_stats_arr[i].attr)
180#define QEDE_STAT_IS_AH_ONLY(i) \
181 test_bit(QEDE_STAT_AH_ONLY, &qede_stats_arr[i].attr)
182
183enum {
184 QEDE_PRI_FLAG_CMT,
185 QEDE_PRI_FLAG_LEN,
186};
187
188static const char qede_private_arr[QEDE_PRI_FLAG_LEN][ETH_GSTRING_LEN] = {
189 "Coupled-Function",
190};
191
192enum qede_ethtool_tests {
193 QEDE_ETHTOOL_INT_LOOPBACK,
194 QEDE_ETHTOOL_INTERRUPT_TEST,
195 QEDE_ETHTOOL_MEMORY_TEST,
196 QEDE_ETHTOOL_REGISTER_TEST,
197 QEDE_ETHTOOL_CLOCK_TEST,
198 QEDE_ETHTOOL_NVRAM_TEST,
199 QEDE_ETHTOOL_TEST_MAX
200};
201
202static const char qede_tests_str_arr[QEDE_ETHTOOL_TEST_MAX][ETH_GSTRING_LEN] = {
203 "Internal loopback (offline)",
204 "Interrupt (online)\t",
205 "Memory (online)\t\t",
206 "Register (online)\t",
207 "Clock (online)\t\t",
208 "Nvram (online)\t\t",
209};
210
211static void qede_get_strings_stats_txq(struct qede_dev *edev,
212 struct qede_tx_queue *txq, u8 **buf)
213{
214 int i;
215
216 for (i = 0; i < QEDE_NUM_TQSTATS; i++) {
217 if (txq->is_xdp)
218 sprintf(*buf, "%d [XDP]: %s",
219 QEDE_TXQ_XDP_TO_IDX(edev, txq),
220 qede_tqstats_arr[i].string);
221 else
222 sprintf(*buf, "%d: %s", txq->index,
223 qede_tqstats_arr[i].string);
224 *buf += ETH_GSTRING_LEN;
225 }
226}
227
228static void qede_get_strings_stats_rxq(struct qede_dev *edev,
229 struct qede_rx_queue *rxq, u8 **buf)
230{
231 int i;
232
233 for (i = 0; i < QEDE_NUM_RQSTATS; i++) {
234 sprintf(*buf, "%d: %s", rxq->rxq_id,
235 qede_rqstats_arr[i].string);
236 *buf += ETH_GSTRING_LEN;
237 }
238}
239
240static bool qede_is_irrelevant_stat(struct qede_dev *edev, int stat_index)
241{
242 return (IS_VF(edev) && QEDE_STAT_IS_PF_ONLY(stat_index)) ||
243 (QEDE_IS_BB(edev) && QEDE_STAT_IS_AH_ONLY(stat_index)) ||
244 (QEDE_IS_AH(edev) && QEDE_STAT_IS_BB_ONLY(stat_index));
245}
246
247static void qede_get_strings_stats(struct qede_dev *edev, u8 *buf)
248{
249 struct qede_fastpath *fp;
250 int i;
251
252 /* Account for queue statistics */
253 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
254 fp = &edev->fp_array[i];
255
256 if (fp->type & QEDE_FASTPATH_RX)
257 qede_get_strings_stats_rxq(edev, fp->rxq, &buf);
258
259 if (fp->type & QEDE_FASTPATH_XDP)
260 qede_get_strings_stats_txq(edev, fp->xdp_tx, &buf);
261
262 if (fp->type & QEDE_FASTPATH_TX)
263 qede_get_strings_stats_txq(edev, fp->txq, &buf);
264 }
265
266 /* Account for non-queue statistics */
267 for (i = 0; i < QEDE_NUM_STATS; i++) {
268 if (qede_is_irrelevant_stat(edev, i))
269 continue;
270 strcpy(buf, qede_stats_arr[i].string);
271 buf += ETH_GSTRING_LEN;
272 }
273}
274
275static void qede_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
276{
277 struct qede_dev *edev = netdev_priv(dev);
278
279 switch (stringset) {
280 case ETH_SS_STATS:
281 qede_get_strings_stats(edev, buf);
282 break;
283 case ETH_SS_PRIV_FLAGS:
284 memcpy(buf, qede_private_arr,
285 ETH_GSTRING_LEN * QEDE_PRI_FLAG_LEN);
286 break;
287 case ETH_SS_TEST:
288 memcpy(buf, qede_tests_str_arr,
289 ETH_GSTRING_LEN * QEDE_ETHTOOL_TEST_MAX);
290 break;
291 default:
292 DP_VERBOSE(edev, QED_MSG_DEBUG,
293 "Unsupported stringset 0x%08x\n", stringset);
294 }
295}
296
297static void qede_get_ethtool_stats_txq(struct qede_tx_queue *txq, u64 **buf)
298{
299 int i;
300
301 for (i = 0; i < QEDE_NUM_TQSTATS; i++) {
302 **buf = *((u64 *)(((void *)txq) + qede_tqstats_arr[i].offset));
303 (*buf)++;
304 }
305}
306
307static void qede_get_ethtool_stats_rxq(struct qede_rx_queue *rxq, u64 **buf)
308{
309 int i;
310
311 for (i = 0; i < QEDE_NUM_RQSTATS; i++) {
312 **buf = *((u64 *)(((void *)rxq) + qede_rqstats_arr[i].offset));
313 (*buf)++;
314 }
315}
316
317static void qede_get_ethtool_stats(struct net_device *dev,
318 struct ethtool_stats *stats, u64 *buf)
319{
320 struct qede_dev *edev = netdev_priv(dev);
321 struct qede_fastpath *fp;
322 int i;
323
324 qede_fill_by_demand_stats(edev);
325
326 /* Need to protect the access to the fastpath array */
327 __qede_lock(edev);
328
329 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
330 fp = &edev->fp_array[i];
331
332 if (fp->type & QEDE_FASTPATH_RX)
333 qede_get_ethtool_stats_rxq(fp->rxq, &buf);
334
335 if (fp->type & QEDE_FASTPATH_XDP)
336 qede_get_ethtool_stats_txq(fp->xdp_tx, &buf);
337
338 if (fp->type & QEDE_FASTPATH_TX)
339 qede_get_ethtool_stats_txq(fp->txq, &buf);
340 }
341
342 for (i = 0; i < QEDE_NUM_STATS; i++) {
343 if (qede_is_irrelevant_stat(edev, i))
344 continue;
345 *buf = *((u64 *)(((void *)&edev->stats) +
346 qede_stats_arr[i].offset));
347
348 buf++;
349 }
350
351 __qede_unlock(edev);
352}
353
354static int qede_get_sset_count(struct net_device *dev, int stringset)
355{
356 struct qede_dev *edev = netdev_priv(dev);
357 int num_stats = QEDE_NUM_STATS, i;
358
359 switch (stringset) {
360 case ETH_SS_STATS:
361 for (i = 0; i < QEDE_NUM_STATS; i++)
362 if (qede_is_irrelevant_stat(edev, i))
363 num_stats--;
364
365 /* Account for the Regular Tx statistics */
366 num_stats += QEDE_TSS_COUNT(edev) * QEDE_NUM_TQSTATS;
367
368 /* Account for the Regular Rx statistics */
369 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_RQSTATS;
370
371 /* Account for XDP statistics [if needed] */
372 if (edev->xdp_prog)
373 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_TQSTATS;
374 return num_stats;
375
376 case ETH_SS_PRIV_FLAGS:
377 return QEDE_PRI_FLAG_LEN;
378 case ETH_SS_TEST:
379 if (!IS_VF(edev))
380 return QEDE_ETHTOOL_TEST_MAX;
381 else
382 return 0;
383 default:
384 DP_VERBOSE(edev, QED_MSG_DEBUG,
385 "Unsupported stringset 0x%08x\n", stringset);
386 return -EINVAL;
387 }
388}
389
390static u32 qede_get_priv_flags(struct net_device *dev)
391{
392 struct qede_dev *edev = netdev_priv(dev);
393
394 return (!!(edev->dev_info.common.num_hwfns > 1)) << QEDE_PRI_FLAG_CMT;
395}
396
397struct qede_link_mode_mapping {
398 u32 qed_link_mode;
399 u32 ethtool_link_mode;
400};
401
402static const struct qede_link_mode_mapping qed_lm_map[] = {
403 {QED_LM_FIBRE_BIT, ETHTOOL_LINK_MODE_FIBRE_BIT},
404 {QED_LM_Autoneg_BIT, ETHTOOL_LINK_MODE_Autoneg_BIT},
405 {QED_LM_Asym_Pause_BIT, ETHTOOL_LINK_MODE_Asym_Pause_BIT},
406 {QED_LM_Pause_BIT, ETHTOOL_LINK_MODE_Pause_BIT},
407 {QED_LM_1000baseT_Half_BIT, ETHTOOL_LINK_MODE_1000baseT_Half_BIT},
408 {QED_LM_1000baseT_Full_BIT, ETHTOOL_LINK_MODE_1000baseT_Full_BIT},
409 {QED_LM_10000baseKR_Full_BIT, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT},
410 {QED_LM_25000baseKR_Full_BIT, ETHTOOL_LINK_MODE_25000baseKR_Full_BIT},
411 {QED_LM_40000baseLR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT},
412 {QED_LM_50000baseKR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT},
413 {QED_LM_100000baseKR4_Full_BIT,
414 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT},
415};
416
417#define QEDE_DRV_TO_ETHTOOL_CAPS(caps, lk_ksettings, name) \
418{ \
419 int i; \
420 \
421 for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) { \
422 if ((caps) & (qed_lm_map[i].qed_link_mode)) \
423 __set_bit(qed_lm_map[i].ethtool_link_mode,\
424 lk_ksettings->link_modes.name); \
425 } \
426}
427
428#define QEDE_ETHTOOL_TO_DRV_CAPS(caps, lk_ksettings, name) \
429{ \
430 int i; \
431 \
432 for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) { \
433 if (test_bit(qed_lm_map[i].ethtool_link_mode, \
434 lk_ksettings->link_modes.name)) \
435 caps |= qed_lm_map[i].qed_link_mode; \
436 } \
437}
438
439static int qede_get_link_ksettings(struct net_device *dev,
440 struct ethtool_link_ksettings *cmd)
441{
442 struct ethtool_link_settings *base = &cmd->base;
443 struct qede_dev *edev = netdev_priv(dev);
444 struct qed_link_output current_link;
445
446 __qede_lock(edev);
447
448 memset(¤t_link, 0, sizeof(current_link));
449 edev->ops->common->get_link(edev->cdev, ¤t_link);
450
451 ethtool_link_ksettings_zero_link_mode(cmd, supported);
452 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.supported_caps, cmd, supported)
453
454 ethtool_link_ksettings_zero_link_mode(cmd, advertising);
455 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.advertised_caps, cmd, advertising)
456
457 ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
458 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.lp_caps, cmd, lp_advertising)
459
460 if ((edev->state == QEDE_STATE_OPEN) && (current_link.link_up)) {
461 base->speed = current_link.speed;
462 base->duplex = current_link.duplex;
463 } else {
464 base->speed = SPEED_UNKNOWN;
465 base->duplex = DUPLEX_UNKNOWN;
466 }
467
468 __qede_unlock(edev);
469
470 base->port = current_link.port;
471 base->autoneg = (current_link.autoneg) ? AUTONEG_ENABLE :
472 AUTONEG_DISABLE;
473
474 return 0;
475}
476
477static int qede_set_link_ksettings(struct net_device *dev,
478 const struct ethtool_link_ksettings *cmd)
479{
480 const struct ethtool_link_settings *base = &cmd->base;
481 struct qede_dev *edev = netdev_priv(dev);
482 struct qed_link_output current_link;
483 struct qed_link_params params;
484
485 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
486 DP_INFO(edev, "Link settings are not allowed to be changed\n");
487 return -EOPNOTSUPP;
488 }
489 memset(¤t_link, 0, sizeof(current_link));
490 memset(¶ms, 0, sizeof(params));
491 edev->ops->common->get_link(edev->cdev, ¤t_link);
492
493 params.override_flags |= QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS;
494 params.override_flags |= QED_LINK_OVERRIDE_SPEED_AUTONEG;
495 if (base->autoneg == AUTONEG_ENABLE) {
496 if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) {
497 DP_INFO(edev, "Auto negotiation is not supported\n");
498 return -EOPNOTSUPP;
499 }
500
501 params.autoneg = true;
502 params.forced_speed = 0;
503 QEDE_ETHTOOL_TO_DRV_CAPS(params.adv_speeds, cmd, advertising)
504 } else { /* forced speed */
505 params.override_flags |= QED_LINK_OVERRIDE_SPEED_FORCED_SPEED;
506 params.autoneg = false;
507 params.forced_speed = base->speed;
508 switch (base->speed) {
509 case SPEED_1000:
510 if (!(current_link.supported_caps &
511 QED_LM_1000baseT_Full_BIT)) {
512 DP_INFO(edev, "1G speed not supported\n");
513 return -EINVAL;
514 }
515 params.adv_speeds = QED_LM_1000baseT_Full_BIT;
516 break;
517 case SPEED_10000:
518 if (!(current_link.supported_caps &
519 QED_LM_10000baseKR_Full_BIT)) {
520 DP_INFO(edev, "10G speed not supported\n");
521 return -EINVAL;
522 }
523 params.adv_speeds = QED_LM_10000baseKR_Full_BIT;
524 break;
525 case SPEED_25000:
526 if (!(current_link.supported_caps &
527 QED_LM_25000baseKR_Full_BIT)) {
528 DP_INFO(edev, "25G speed not supported\n");
529 return -EINVAL;
530 }
531 params.adv_speeds = QED_LM_25000baseKR_Full_BIT;
532 break;
533 case SPEED_40000:
534 if (!(current_link.supported_caps &
535 QED_LM_40000baseLR4_Full_BIT)) {
536 DP_INFO(edev, "40G speed not supported\n");
537 return -EINVAL;
538 }
539 params.adv_speeds = QED_LM_40000baseLR4_Full_BIT;
540 break;
541 case SPEED_50000:
542 if (!(current_link.supported_caps &
543 QED_LM_50000baseKR2_Full_BIT)) {
544 DP_INFO(edev, "50G speed not supported\n");
545 return -EINVAL;
546 }
547 params.adv_speeds = QED_LM_50000baseKR2_Full_BIT;
548 break;
549 case SPEED_100000:
550 if (!(current_link.supported_caps &
551 QED_LM_100000baseKR4_Full_BIT)) {
552 DP_INFO(edev, "100G speed not supported\n");
553 return -EINVAL;
554 }
555 params.adv_speeds = QED_LM_100000baseKR4_Full_BIT;
556 break;
557 default:
558 DP_INFO(edev, "Unsupported speed %u\n", base->speed);
559 return -EINVAL;
560 }
561 }
562
563 params.link_up = true;
564 edev->ops->common->set_link(edev->cdev, ¶ms);
565
566 return 0;
567}
568
569static void qede_get_drvinfo(struct net_device *ndev,
570 struct ethtool_drvinfo *info)
571{
572 char mfw[ETHTOOL_FWVERS_LEN], storm[ETHTOOL_FWVERS_LEN];
573 struct qede_dev *edev = netdev_priv(ndev);
574
575 strlcpy(info->driver, "qede", sizeof(info->driver));
576 strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
577
578 snprintf(storm, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d",
579 edev->dev_info.common.fw_major,
580 edev->dev_info.common.fw_minor,
581 edev->dev_info.common.fw_rev,
582 edev->dev_info.common.fw_eng);
583
584 snprintf(mfw, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d",
585 (edev->dev_info.common.mfw_rev >> 24) & 0xFF,
586 (edev->dev_info.common.mfw_rev >> 16) & 0xFF,
587 (edev->dev_info.common.mfw_rev >> 8) & 0xFF,
588 edev->dev_info.common.mfw_rev & 0xFF);
589
590 if ((strlen(storm) + strlen(mfw) + strlen("mfw storm ")) <
591 sizeof(info->fw_version)) {
592 snprintf(info->fw_version, sizeof(info->fw_version),
593 "mfw %s storm %s", mfw, storm);
594 } else {
595 snprintf(info->fw_version, sizeof(info->fw_version),
596 "%s %s", mfw, storm);
597 }
598
599 strlcpy(info->bus_info, pci_name(edev->pdev), sizeof(info->bus_info));
600}
601
602static void qede_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
603{
604 struct qede_dev *edev = netdev_priv(ndev);
605
606 if (edev->dev_info.common.wol_support) {
607 wol->supported = WAKE_MAGIC;
608 wol->wolopts = edev->wol_enabled ? WAKE_MAGIC : 0;
609 }
610}
611
612static int qede_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
613{
614 struct qede_dev *edev = netdev_priv(ndev);
615 bool wol_requested;
616 int rc;
617
618 if (wol->wolopts & ~WAKE_MAGIC) {
619 DP_INFO(edev,
620 "Can't support WoL options other than magic-packet\n");
621 return -EINVAL;
622 }
623
624 wol_requested = !!(wol->wolopts & WAKE_MAGIC);
625 if (wol_requested == edev->wol_enabled)
626 return 0;
627
628 /* Need to actually change configuration */
629 if (!edev->dev_info.common.wol_support) {
630 DP_INFO(edev, "Device doesn't support WoL\n");
631 return -EINVAL;
632 }
633
634 rc = edev->ops->common->update_wol(edev->cdev, wol_requested);
635 if (!rc)
636 edev->wol_enabled = wol_requested;
637
638 return rc;
639}
640
641static u32 qede_get_msglevel(struct net_device *ndev)
642{
643 struct qede_dev *edev = netdev_priv(ndev);
644
645 return ((u32)edev->dp_level << QED_LOG_LEVEL_SHIFT) | edev->dp_module;
646}
647
648static void qede_set_msglevel(struct net_device *ndev, u32 level)
649{
650 struct qede_dev *edev = netdev_priv(ndev);
651 u32 dp_module = 0;
652 u8 dp_level = 0;
653
654 qede_config_debug(level, &dp_module, &dp_level);
655
656 edev->dp_level = dp_level;
657 edev->dp_module = dp_module;
658 edev->ops->common->update_msglvl(edev->cdev,
659 dp_module, dp_level);
660}
661
662static int qede_nway_reset(struct net_device *dev)
663{
664 struct qede_dev *edev = netdev_priv(dev);
665 struct qed_link_output current_link;
666 struct qed_link_params link_params;
667
668 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
669 DP_INFO(edev, "Link settings are not allowed to be changed\n");
670 return -EOPNOTSUPP;
671 }
672
673 if (!netif_running(dev))
674 return 0;
675
676 memset(¤t_link, 0, sizeof(current_link));
677 edev->ops->common->get_link(edev->cdev, ¤t_link);
678 if (!current_link.link_up)
679 return 0;
680
681 /* Toggle the link */
682 memset(&link_params, 0, sizeof(link_params));
683 link_params.link_up = false;
684 edev->ops->common->set_link(edev->cdev, &link_params);
685 link_params.link_up = true;
686 edev->ops->common->set_link(edev->cdev, &link_params);
687
688 return 0;
689}
690
691static u32 qede_get_link(struct net_device *dev)
692{
693 struct qede_dev *edev = netdev_priv(dev);
694 struct qed_link_output current_link;
695
696 memset(¤t_link, 0, sizeof(current_link));
697 edev->ops->common->get_link(edev->cdev, ¤t_link);
698
699 return current_link.link_up;
700}
701
702static int qede_flash_device(struct net_device *dev,
703 struct ethtool_flash *flash)
704{
705 struct qede_dev *edev = netdev_priv(dev);
706
707 return edev->ops->common->nvm_flash(edev->cdev, flash->data);
708}
709
710static int qede_get_coalesce(struct net_device *dev,
711 struct ethtool_coalesce *coal)
712{
713 void *rx_handle = NULL, *tx_handle = NULL;
714 struct qede_dev *edev = netdev_priv(dev);
715 u16 rx_coal, tx_coal, i, rc = 0;
716 struct qede_fastpath *fp;
717
718 rx_coal = QED_DEFAULT_RX_USECS;
719 tx_coal = QED_DEFAULT_TX_USECS;
720
721 memset(coal, 0, sizeof(struct ethtool_coalesce));
722
723 __qede_lock(edev);
724 if (edev->state == QEDE_STATE_OPEN) {
725 for_each_queue(i) {
726 fp = &edev->fp_array[i];
727
728 if (fp->type & QEDE_FASTPATH_RX) {
729 rx_handle = fp->rxq->handle;
730 break;
731 }
732 }
733
734 rc = edev->ops->get_coalesce(edev->cdev, &rx_coal, rx_handle);
735 if (rc) {
736 DP_INFO(edev, "Read Rx coalesce error\n");
737 goto out;
738 }
739
740 for_each_queue(i) {
741 fp = &edev->fp_array[i];
742 if (fp->type & QEDE_FASTPATH_TX) {
743 tx_handle = fp->txq->handle;
744 break;
745 }
746 }
747
748 rc = edev->ops->get_coalesce(edev->cdev, &tx_coal, tx_handle);
749 if (rc)
750 DP_INFO(edev, "Read Tx coalesce error\n");
751 }
752
753out:
754 __qede_unlock(edev);
755
756 coal->rx_coalesce_usecs = rx_coal;
757 coal->tx_coalesce_usecs = tx_coal;
758
759 return rc;
760}
761
762static int qede_set_coalesce(struct net_device *dev,
763 struct ethtool_coalesce *coal)
764{
765 struct qede_dev *edev = netdev_priv(dev);
766 struct qede_fastpath *fp;
767 int i, rc = 0;
768 u16 rxc, txc;
769
770 if (!netif_running(dev)) {
771 DP_INFO(edev, "Interface is down\n");
772 return -EINVAL;
773 }
774
775 if (coal->rx_coalesce_usecs > QED_COALESCE_MAX ||
776 coal->tx_coalesce_usecs > QED_COALESCE_MAX) {
777 DP_INFO(edev,
778 "Can't support requested %s coalesce value [max supported value %d]\n",
779 coal->rx_coalesce_usecs > QED_COALESCE_MAX ? "rx" :
780 "tx", QED_COALESCE_MAX);
781 return -EINVAL;
782 }
783
784 rxc = (u16)coal->rx_coalesce_usecs;
785 txc = (u16)coal->tx_coalesce_usecs;
786 for_each_queue(i) {
787 fp = &edev->fp_array[i];
788
789 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) {
790 rc = edev->ops->common->set_coalesce(edev->cdev,
791 rxc, 0,
792 fp->rxq->handle);
793 if (rc) {
794 DP_INFO(edev,
795 "Set RX coalesce error, rc = %d\n", rc);
796 return rc;
797 }
798 }
799
800 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
801 rc = edev->ops->common->set_coalesce(edev->cdev,
802 0, txc,
803 fp->txq->handle);
804 if (rc) {
805 DP_INFO(edev,
806 "Set TX coalesce error, rc = %d\n", rc);
807 return rc;
808 }
809 }
810 }
811
812 return rc;
813}
814
815static void qede_get_ringparam(struct net_device *dev,
816 struct ethtool_ringparam *ering)
817{
818 struct qede_dev *edev = netdev_priv(dev);
819
820 ering->rx_max_pending = NUM_RX_BDS_MAX;
821 ering->rx_pending = edev->q_num_rx_buffers;
822 ering->tx_max_pending = NUM_TX_BDS_MAX;
823 ering->tx_pending = edev->q_num_tx_buffers;
824}
825
826static int qede_set_ringparam(struct net_device *dev,
827 struct ethtool_ringparam *ering)
828{
829 struct qede_dev *edev = netdev_priv(dev);
830
831 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
832 "Set ring params command parameters: rx_pending = %d, tx_pending = %d\n",
833 ering->rx_pending, ering->tx_pending);
834
835 /* Validate legality of configuration */
836 if (ering->rx_pending > NUM_RX_BDS_MAX ||
837 ering->rx_pending < NUM_RX_BDS_MIN ||
838 ering->tx_pending > NUM_TX_BDS_MAX ||
839 ering->tx_pending < NUM_TX_BDS_MIN) {
840 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
841 "Can only support Rx Buffer size [0%08x,...,0x%08x] and Tx Buffer size [0x%08x,...,0x%08x]\n",
842 NUM_RX_BDS_MIN, NUM_RX_BDS_MAX,
843 NUM_TX_BDS_MIN, NUM_TX_BDS_MAX);
844 return -EINVAL;
845 }
846
847 /* Change ring size and re-load */
848 edev->q_num_rx_buffers = ering->rx_pending;
849 edev->q_num_tx_buffers = ering->tx_pending;
850
851 qede_reload(edev, NULL, false);
852
853 return 0;
854}
855
856static void qede_get_pauseparam(struct net_device *dev,
857 struct ethtool_pauseparam *epause)
858{
859 struct qede_dev *edev = netdev_priv(dev);
860 struct qed_link_output current_link;
861
862 memset(¤t_link, 0, sizeof(current_link));
863 edev->ops->common->get_link(edev->cdev, ¤t_link);
864
865 if (current_link.pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
866 epause->autoneg = true;
867 if (current_link.pause_config & QED_LINK_PAUSE_RX_ENABLE)
868 epause->rx_pause = true;
869 if (current_link.pause_config & QED_LINK_PAUSE_TX_ENABLE)
870 epause->tx_pause = true;
871
872 DP_VERBOSE(edev, QED_MSG_DEBUG,
873 "ethtool_pauseparam: cmd %d autoneg %d rx_pause %d tx_pause %d\n",
874 epause->cmd, epause->autoneg, epause->rx_pause,
875 epause->tx_pause);
876}
877
878static int qede_set_pauseparam(struct net_device *dev,
879 struct ethtool_pauseparam *epause)
880{
881 struct qede_dev *edev = netdev_priv(dev);
882 struct qed_link_params params;
883 struct qed_link_output current_link;
884
885 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
886 DP_INFO(edev,
887 "Pause settings are not allowed to be changed\n");
888 return -EOPNOTSUPP;
889 }
890
891 memset(¤t_link, 0, sizeof(current_link));
892 edev->ops->common->get_link(edev->cdev, ¤t_link);
893
894 memset(¶ms, 0, sizeof(params));
895 params.override_flags |= QED_LINK_OVERRIDE_PAUSE_CONFIG;
896 if (epause->autoneg) {
897 if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) {
898 DP_INFO(edev, "autoneg not supported\n");
899 return -EINVAL;
900 }
901 params.pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
902 }
903 if (epause->rx_pause)
904 params.pause_config |= QED_LINK_PAUSE_RX_ENABLE;
905 if (epause->tx_pause)
906 params.pause_config |= QED_LINK_PAUSE_TX_ENABLE;
907
908 params.link_up = true;
909 edev->ops->common->set_link(edev->cdev, ¶ms);
910
911 return 0;
912}
913
914static void qede_get_regs(struct net_device *ndev,
915 struct ethtool_regs *regs, void *buffer)
916{
917 struct qede_dev *edev = netdev_priv(ndev);
918
919 regs->version = 0;
920 memset(buffer, 0, regs->len);
921
922 if (edev->ops && edev->ops->common)
923 edev->ops->common->dbg_all_data(edev->cdev, buffer);
924}
925
926static int qede_get_regs_len(struct net_device *ndev)
927{
928 struct qede_dev *edev = netdev_priv(ndev);
929
930 if (edev->ops && edev->ops->common)
931 return edev->ops->common->dbg_all_data_size(edev->cdev);
932 else
933 return -EINVAL;
934}
935
936static void qede_update_mtu(struct qede_dev *edev,
937 struct qede_reload_args *args)
938{
939 edev->ndev->mtu = args->u.mtu;
940}
941
942/* Netdevice NDOs */
943int qede_change_mtu(struct net_device *ndev, int new_mtu)
944{
945 struct qede_dev *edev = netdev_priv(ndev);
946 struct qede_reload_args args;
947
948 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
949 "Configuring MTU size of %d\n", new_mtu);
950
951 if (new_mtu > PAGE_SIZE)
952 ndev->features &= ~NETIF_F_GRO_HW;
953
954 /* Set the mtu field and re-start the interface if needed */
955 args.u.mtu = new_mtu;
956 args.func = &qede_update_mtu;
957 qede_reload(edev, &args, false);
958
959 edev->ops->common->update_mtu(edev->cdev, new_mtu);
960
961 return 0;
962}
963
964static void qede_get_channels(struct net_device *dev,
965 struct ethtool_channels *channels)
966{
967 struct qede_dev *edev = netdev_priv(dev);
968
969 channels->max_combined = QEDE_MAX_RSS_CNT(edev);
970 channels->max_rx = QEDE_MAX_RSS_CNT(edev);
971 channels->max_tx = QEDE_MAX_RSS_CNT(edev);
972 channels->combined_count = QEDE_QUEUE_CNT(edev) - edev->fp_num_tx -
973 edev->fp_num_rx;
974 channels->tx_count = edev->fp_num_tx;
975 channels->rx_count = edev->fp_num_rx;
976}
977
978static int qede_set_channels(struct net_device *dev,
979 struct ethtool_channels *channels)
980{
981 struct qede_dev *edev = netdev_priv(dev);
982 u32 count;
983
984 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
985 "set-channels command parameters: rx = %d, tx = %d, other = %d, combined = %d\n",
986 channels->rx_count, channels->tx_count,
987 channels->other_count, channels->combined_count);
988
989 count = channels->rx_count + channels->tx_count +
990 channels->combined_count;
991
992 /* We don't support `other' channels */
993 if (channels->other_count) {
994 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
995 "command parameters not supported\n");
996 return -EINVAL;
997 }
998
999 if (!(channels->combined_count || (channels->rx_count &&
1000 channels->tx_count))) {
1001 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1002 "need to request at least one transmit and one receive channel\n");
1003 return -EINVAL;
1004 }
1005
1006 if (count > QEDE_MAX_RSS_CNT(edev)) {
1007 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1008 "requested channels = %d max supported channels = %d\n",
1009 count, QEDE_MAX_RSS_CNT(edev));
1010 return -EINVAL;
1011 }
1012
1013 /* Check if there was a change in the active parameters */
1014 if ((count == QEDE_QUEUE_CNT(edev)) &&
1015 (channels->tx_count == edev->fp_num_tx) &&
1016 (channels->rx_count == edev->fp_num_rx)) {
1017 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1018 "No change in active parameters\n");
1019 return 0;
1020 }
1021
1022 /* We need the number of queues to be divisible between the hwfns */
1023 if ((count % edev->dev_info.common.num_hwfns) ||
1024 (channels->tx_count % edev->dev_info.common.num_hwfns) ||
1025 (channels->rx_count % edev->dev_info.common.num_hwfns)) {
1026 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1027 "Number of channels must be divisible by %04x\n",
1028 edev->dev_info.common.num_hwfns);
1029 return -EINVAL;
1030 }
1031
1032 /* Set number of queues and reload if necessary */
1033 edev->req_queues = count;
1034 edev->req_num_tx = channels->tx_count;
1035 edev->req_num_rx = channels->rx_count;
1036 /* Reset the indirection table if rx queue count is updated */
1037 if ((edev->req_queues - edev->req_num_tx) != QEDE_RSS_COUNT(edev)) {
1038 edev->rss_params_inited &= ~QEDE_RSS_INDIR_INITED;
1039 memset(edev->rss_ind_table, 0, sizeof(edev->rss_ind_table));
1040 }
1041
1042 qede_reload(edev, NULL, false);
1043
1044 return 0;
1045}
1046
1047static int qede_get_ts_info(struct net_device *dev,
1048 struct ethtool_ts_info *info)
1049{
1050 struct qede_dev *edev = netdev_priv(dev);
1051
1052 return qede_ptp_get_ts_info(edev, info);
1053}
1054
1055static int qede_set_phys_id(struct net_device *dev,
1056 enum ethtool_phys_id_state state)
1057{
1058 struct qede_dev *edev = netdev_priv(dev);
1059 u8 led_state = 0;
1060
1061 switch (state) {
1062 case ETHTOOL_ID_ACTIVE:
1063 return 1; /* cycle on/off once per second */
1064
1065 case ETHTOOL_ID_ON:
1066 led_state = QED_LED_MODE_ON;
1067 break;
1068
1069 case ETHTOOL_ID_OFF:
1070 led_state = QED_LED_MODE_OFF;
1071 break;
1072
1073 case ETHTOOL_ID_INACTIVE:
1074 led_state = QED_LED_MODE_RESTORE;
1075 break;
1076 }
1077
1078 edev->ops->common->set_led(edev->cdev, led_state);
1079
1080 return 0;
1081}
1082
1083static int qede_get_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)
1084{
1085 info->data = RXH_IP_SRC | RXH_IP_DST;
1086
1087 switch (info->flow_type) {
1088 case TCP_V4_FLOW:
1089 case TCP_V6_FLOW:
1090 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
1091 break;
1092 case UDP_V4_FLOW:
1093 if (edev->rss_caps & QED_RSS_IPV4_UDP)
1094 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
1095 break;
1096 case UDP_V6_FLOW:
1097 if (edev->rss_caps & QED_RSS_IPV6_UDP)
1098 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
1099 break;
1100 case IPV4_FLOW:
1101 case IPV6_FLOW:
1102 break;
1103 default:
1104 info->data = 0;
1105 break;
1106 }
1107
1108 return 0;
1109}
1110
1111static int qede_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,
1112 u32 *rule_locs)
1113{
1114 struct qede_dev *edev = netdev_priv(dev);
1115 int rc = 0;
1116
1117 switch (info->cmd) {
1118 case ETHTOOL_GRXRINGS:
1119 info->data = QEDE_RSS_COUNT(edev);
1120 break;
1121 case ETHTOOL_GRXFH:
1122 rc = qede_get_rss_flags(edev, info);
1123 break;
1124 case ETHTOOL_GRXCLSRLCNT:
1125 info->rule_cnt = qede_get_arfs_filter_count(edev);
1126 info->data = QEDE_RFS_MAX_FLTR;
1127 break;
1128 case ETHTOOL_GRXCLSRULE:
1129 rc = qede_get_cls_rule_entry(edev, info);
1130 break;
1131 case ETHTOOL_GRXCLSRLALL:
1132 rc = qede_get_cls_rule_all(edev, info, rule_locs);
1133 break;
1134 default:
1135 DP_ERR(edev, "Command parameters not supported\n");
1136 rc = -EOPNOTSUPP;
1137 }
1138
1139 return rc;
1140}
1141
1142static int qede_set_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)
1143{
1144 struct qed_update_vport_params *vport_update_params;
1145 u8 set_caps = 0, clr_caps = 0;
1146 int rc = 0;
1147
1148 DP_VERBOSE(edev, QED_MSG_DEBUG,
1149 "Set rss flags command parameters: flow type = %d, data = %llu\n",
1150 info->flow_type, info->data);
1151
1152 switch (info->flow_type) {
1153 case TCP_V4_FLOW:
1154 case TCP_V6_FLOW:
1155 /* For TCP only 4-tuple hash is supported */
1156 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST |
1157 RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1158 DP_INFO(edev, "Command parameters not supported\n");
1159 return -EINVAL;
1160 }
1161 return 0;
1162 case UDP_V4_FLOW:
1163 /* For UDP either 2-tuple hash or 4-tuple hash is supported */
1164 if (info->data == (RXH_IP_SRC | RXH_IP_DST |
1165 RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1166 set_caps = QED_RSS_IPV4_UDP;
1167 DP_VERBOSE(edev, QED_MSG_DEBUG,
1168 "UDP 4-tuple enabled\n");
1169 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) {
1170 clr_caps = QED_RSS_IPV4_UDP;
1171 DP_VERBOSE(edev, QED_MSG_DEBUG,
1172 "UDP 4-tuple disabled\n");
1173 } else {
1174 return -EINVAL;
1175 }
1176 break;
1177 case UDP_V6_FLOW:
1178 /* For UDP either 2-tuple hash or 4-tuple hash is supported */
1179 if (info->data == (RXH_IP_SRC | RXH_IP_DST |
1180 RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1181 set_caps = QED_RSS_IPV6_UDP;
1182 DP_VERBOSE(edev, QED_MSG_DEBUG,
1183 "UDP 4-tuple enabled\n");
1184 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) {
1185 clr_caps = QED_RSS_IPV6_UDP;
1186 DP_VERBOSE(edev, QED_MSG_DEBUG,
1187 "UDP 4-tuple disabled\n");
1188 } else {
1189 return -EINVAL;
1190 }
1191 break;
1192 case IPV4_FLOW:
1193 case IPV6_FLOW:
1194 /* For IP only 2-tuple hash is supported */
1195 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST)) {
1196 DP_INFO(edev, "Command parameters not supported\n");
1197 return -EINVAL;
1198 }
1199 return 0;
1200 case SCTP_V4_FLOW:
1201 case AH_ESP_V4_FLOW:
1202 case AH_V4_FLOW:
1203 case ESP_V4_FLOW:
1204 case SCTP_V6_FLOW:
1205 case AH_ESP_V6_FLOW:
1206 case AH_V6_FLOW:
1207 case ESP_V6_FLOW:
1208 case IP_USER_FLOW:
1209 case ETHER_FLOW:
1210 /* RSS is not supported for these protocols */
1211 if (info->data) {
1212 DP_INFO(edev, "Command parameters not supported\n");
1213 return -EINVAL;
1214 }
1215 return 0;
1216 default:
1217 return -EINVAL;
1218 }
1219
1220 /* No action is needed if there is no change in the rss capability */
1221 if (edev->rss_caps == ((edev->rss_caps & ~clr_caps) | set_caps))
1222 return 0;
1223
1224 /* Update internal configuration */
1225 edev->rss_caps = ((edev->rss_caps & ~clr_caps) | set_caps);
1226 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
1227
1228 /* Re-configure if possible */
1229 __qede_lock(edev);
1230 if (edev->state == QEDE_STATE_OPEN) {
1231 vport_update_params = vzalloc(sizeof(*vport_update_params));
1232 if (!vport_update_params) {
1233 __qede_unlock(edev);
1234 return -ENOMEM;
1235 }
1236 qede_fill_rss_params(edev, &vport_update_params->rss_params,
1237 &vport_update_params->update_rss_flg);
1238 rc = edev->ops->vport_update(edev->cdev, vport_update_params);
1239 vfree(vport_update_params);
1240 }
1241 __qede_unlock(edev);
1242
1243 return rc;
1244}
1245
1246static int qede_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info)
1247{
1248 struct qede_dev *edev = netdev_priv(dev);
1249 int rc;
1250
1251 switch (info->cmd) {
1252 case ETHTOOL_SRXFH:
1253 rc = qede_set_rss_flags(edev, info);
1254 break;
1255 case ETHTOOL_SRXCLSRLINS:
1256 rc = qede_add_cls_rule(edev, info);
1257 break;
1258 case ETHTOOL_SRXCLSRLDEL:
1259 rc = qede_del_cls_rule(edev, info);
1260 break;
1261 default:
1262 DP_INFO(edev, "Command parameters not supported\n");
1263 rc = -EOPNOTSUPP;
1264 }
1265
1266 return rc;
1267}
1268
1269static u32 qede_get_rxfh_indir_size(struct net_device *dev)
1270{
1271 return QED_RSS_IND_TABLE_SIZE;
1272}
1273
1274static u32 qede_get_rxfh_key_size(struct net_device *dev)
1275{
1276 struct qede_dev *edev = netdev_priv(dev);
1277
1278 return sizeof(edev->rss_key);
1279}
1280
1281static int qede_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, u8 *hfunc)
1282{
1283 struct qede_dev *edev = netdev_priv(dev);
1284 int i;
1285
1286 if (hfunc)
1287 *hfunc = ETH_RSS_HASH_TOP;
1288
1289 if (!indir)
1290 return 0;
1291
1292 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++)
1293 indir[i] = edev->rss_ind_table[i];
1294
1295 if (key)
1296 memcpy(key, edev->rss_key, qede_get_rxfh_key_size(dev));
1297
1298 return 0;
1299}
1300
1301static int qede_set_rxfh(struct net_device *dev, const u32 *indir,
1302 const u8 *key, const u8 hfunc)
1303{
1304 struct qed_update_vport_params *vport_update_params;
1305 struct qede_dev *edev = netdev_priv(dev);
1306 int i, rc = 0;
1307
1308 if (edev->dev_info.common.num_hwfns > 1) {
1309 DP_INFO(edev,
1310 "RSS configuration is not supported for 100G devices\n");
1311 return -EOPNOTSUPP;
1312 }
1313
1314 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
1315 return -EOPNOTSUPP;
1316
1317 if (!indir && !key)
1318 return 0;
1319
1320 if (indir) {
1321 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++)
1322 edev->rss_ind_table[i] = indir[i];
1323 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
1324 }
1325
1326 if (key) {
1327 memcpy(&edev->rss_key, key, qede_get_rxfh_key_size(dev));
1328 edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
1329 }
1330
1331 __qede_lock(edev);
1332 if (edev->state == QEDE_STATE_OPEN) {
1333 vport_update_params = vzalloc(sizeof(*vport_update_params));
1334 if (!vport_update_params) {
1335 __qede_unlock(edev);
1336 return -ENOMEM;
1337 }
1338 qede_fill_rss_params(edev, &vport_update_params->rss_params,
1339 &vport_update_params->update_rss_flg);
1340 rc = edev->ops->vport_update(edev->cdev, vport_update_params);
1341 vfree(vport_update_params);
1342 }
1343 __qede_unlock(edev);
1344
1345 return rc;
1346}
1347
1348/* This function enables the interrupt generation and the NAPI on the device */
1349static void qede_netif_start(struct qede_dev *edev)
1350{
1351 int i;
1352
1353 if (!netif_running(edev->ndev))
1354 return;
1355
1356 for_each_queue(i) {
1357 /* Update and reenable interrupts */
1358 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_ENABLE, 1);
1359 napi_enable(&edev->fp_array[i].napi);
1360 }
1361}
1362
1363/* This function disables the NAPI and the interrupt generation on the device */
1364static void qede_netif_stop(struct qede_dev *edev)
1365{
1366 int i;
1367
1368 for_each_queue(i) {
1369 napi_disable(&edev->fp_array[i].napi);
1370 /* Disable interrupts */
1371 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_DISABLE, 0);
1372 }
1373}
1374
1375static int qede_selftest_transmit_traffic(struct qede_dev *edev,
1376 struct sk_buff *skb)
1377{
1378 struct qede_tx_queue *txq = NULL;
1379 struct eth_tx_1st_bd *first_bd;
1380 dma_addr_t mapping;
1381 int i, idx;
1382 u16 val;
1383
1384 for_each_queue(i) {
1385 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
1386 txq = edev->fp_array[i].txq;
1387 break;
1388 }
1389 }
1390
1391 if (!txq) {
1392 DP_NOTICE(edev, "Tx path is not available\n");
1393 return -1;
1394 }
1395
1396 /* Fill the entry in the SW ring and the BDs in the FW ring */
1397 idx = txq->sw_tx_prod;
1398 txq->sw_tx_ring.skbs[idx].skb = skb;
1399 first_bd = qed_chain_produce(&txq->tx_pbl);
1400 memset(first_bd, 0, sizeof(*first_bd));
1401 val = 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
1402 first_bd->data.bd_flags.bitfields = val;
1403 val = skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK;
1404 val = val << ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
1405 first_bd->data.bitfields |= cpu_to_le16(val);
1406
1407 /* Map skb linear data for DMA and set in the first BD */
1408 mapping = dma_map_single(&edev->pdev->dev, skb->data,
1409 skb_headlen(skb), DMA_TO_DEVICE);
1410 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
1411 DP_NOTICE(edev, "SKB mapping failed\n");
1412 return -ENOMEM;
1413 }
1414 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
1415
1416 /* update the first BD with the actual num BDs */
1417 first_bd->data.nbds = 1;
1418 txq->sw_tx_prod = (txq->sw_tx_prod + 1) % txq->num_tx_buffers;
1419 /* 'next page' entries are counted in the producer value */
1420 val = qed_chain_get_prod_idx(&txq->tx_pbl);
1421 txq->tx_db.data.bd_prod = cpu_to_le16(val);
1422
1423 /* wmb makes sure that the BDs data is updated before updating the
1424 * producer, otherwise FW may read old data from the BDs.
1425 */
1426 wmb();
1427 barrier();
1428 writel(txq->tx_db.raw, txq->doorbell_addr);
1429
1430 /* mmiowb is needed to synchronize doorbell writes from more than one
1431 * processor. It guarantees that the write arrives to the device before
1432 * the queue lock is released and another start_xmit is called (possibly
1433 * on another CPU). Without this barrier, the next doorbell can bypass
1434 * this doorbell. This is applicable to IA64/Altix systems.
1435 */
1436 mmiowb();
1437
1438 for (i = 0; i < QEDE_SELFTEST_POLL_COUNT; i++) {
1439 if (qede_txq_has_work(txq))
1440 break;
1441 usleep_range(100, 200);
1442 }
1443
1444 if (!qede_txq_has_work(txq)) {
1445 DP_NOTICE(edev, "Tx completion didn't happen\n");
1446 return -1;
1447 }
1448
1449 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
1450 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
1451 BD_UNMAP_LEN(first_bd), DMA_TO_DEVICE);
1452 txq->sw_tx_cons = (txq->sw_tx_cons + 1) % txq->num_tx_buffers;
1453 txq->sw_tx_ring.skbs[idx].skb = NULL;
1454
1455 return 0;
1456}
1457
1458static int qede_selftest_receive_traffic(struct qede_dev *edev)
1459{
1460 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, len;
1461 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1462 struct qede_rx_queue *rxq = NULL;
1463 struct sw_rx_data *sw_rx_data;
1464 union eth_rx_cqe *cqe;
1465 int i, iter, rc = 0;
1466 u8 *data_ptr;
1467
1468 for_each_queue(i) {
1469 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) {
1470 rxq = edev->fp_array[i].rxq;
1471 break;
1472 }
1473 }
1474
1475 if (!rxq) {
1476 DP_NOTICE(edev, "Rx path is not available\n");
1477 return -1;
1478 }
1479
1480 /* The packet is expected to receive on rx-queue 0 even though RSS is
1481 * enabled. This is because the queue 0 is configured as the default
1482 * queue and that the loopback traffic is not IP.
1483 */
1484 for (iter = 0; iter < QEDE_SELFTEST_POLL_COUNT; iter++) {
1485 if (!qede_has_rx_work(rxq)) {
1486 usleep_range(100, 200);
1487 continue;
1488 }
1489
1490 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1491 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1492
1493 /* Memory barrier to prevent the CPU from doing speculative
1494 * reads of CQE/BD before reading hw_comp_cons. If the CQE is
1495 * read before it is written by FW, then FW writes CQE and SB,
1496 * and then the CPU reads the hw_comp_cons, it will use an old
1497 * CQE.
1498 */
1499 rmb();
1500
1501 /* Get the CQE from the completion ring */
1502 cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring);
1503
1504 /* Get the data from the SW ring */
1505 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1506 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1507 fp_cqe = &cqe->fast_path_regular;
1508 len = le16_to_cpu(fp_cqe->len_on_first_bd);
1509 data_ptr = (u8 *)(page_address(sw_rx_data->data) +
1510 fp_cqe->placement_offset +
1511 sw_rx_data->page_offset);
1512 if (ether_addr_equal(data_ptr, edev->ndev->dev_addr) &&
1513 ether_addr_equal(data_ptr + ETH_ALEN,
1514 edev->ndev->dev_addr)) {
1515 for (i = ETH_HLEN; i < len; i++)
1516 if (data_ptr[i] != (unsigned char)(i & 0xff)) {
1517 rc = -1;
1518 break;
1519 }
1520
1521 qede_recycle_rx_bd_ring(rxq, 1);
1522 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1523 break;
1524 }
1525
1526 DP_INFO(edev, "Not the transmitted packet\n");
1527 qede_recycle_rx_bd_ring(rxq, 1);
1528 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1529 }
1530
1531 if (iter == QEDE_SELFTEST_POLL_COUNT) {
1532 DP_NOTICE(edev, "Failed to receive the traffic\n");
1533 return -1;
1534 }
1535
1536 qede_update_rx_prod(edev, rxq);
1537
1538 return rc;
1539}
1540
1541static int qede_selftest_run_loopback(struct qede_dev *edev, u32 loopback_mode)
1542{
1543 struct qed_link_params link_params;
1544 struct sk_buff *skb = NULL;
1545 int rc = 0, i;
1546 u32 pkt_size;
1547 u8 *packet;
1548
1549 if (!netif_running(edev->ndev)) {
1550 DP_NOTICE(edev, "Interface is down\n");
1551 return -EINVAL;
1552 }
1553
1554 qede_netif_stop(edev);
1555
1556 /* Bring up the link in Loopback mode */
1557 memset(&link_params, 0, sizeof(link_params));
1558 link_params.link_up = true;
1559 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE;
1560 link_params.loopback_mode = loopback_mode;
1561 edev->ops->common->set_link(edev->cdev, &link_params);
1562
1563 /* Wait for loopback configuration to apply */
1564 msleep_interruptible(500);
1565
1566 /* prepare the loopback packet */
1567 pkt_size = edev->ndev->mtu + ETH_HLEN;
1568
1569 skb = netdev_alloc_skb(edev->ndev, pkt_size);
1570 if (!skb) {
1571 DP_INFO(edev, "Can't allocate skb\n");
1572 rc = -ENOMEM;
1573 goto test_loopback_exit;
1574 }
1575 packet = skb_put(skb, pkt_size);
1576 ether_addr_copy(packet, edev->ndev->dev_addr);
1577 ether_addr_copy(packet + ETH_ALEN, edev->ndev->dev_addr);
1578 memset(packet + (2 * ETH_ALEN), 0x77, (ETH_HLEN - (2 * ETH_ALEN)));
1579 for (i = ETH_HLEN; i < pkt_size; i++)
1580 packet[i] = (unsigned char)(i & 0xff);
1581
1582 rc = qede_selftest_transmit_traffic(edev, skb);
1583 if (rc)
1584 goto test_loopback_exit;
1585
1586 rc = qede_selftest_receive_traffic(edev);
1587 if (rc)
1588 goto test_loopback_exit;
1589
1590 DP_VERBOSE(edev, NETIF_MSG_RX_STATUS, "Loopback test successful\n");
1591
1592test_loopback_exit:
1593 dev_kfree_skb(skb);
1594
1595 /* Bring up the link in Normal mode */
1596 memset(&link_params, 0, sizeof(link_params));
1597 link_params.link_up = true;
1598 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE;
1599 link_params.loopback_mode = QED_LINK_LOOPBACK_NONE;
1600 edev->ops->common->set_link(edev->cdev, &link_params);
1601
1602 /* Wait for loopback configuration to apply */
1603 msleep_interruptible(500);
1604
1605 qede_netif_start(edev);
1606
1607 return rc;
1608}
1609
1610static void qede_self_test(struct net_device *dev,
1611 struct ethtool_test *etest, u64 *buf)
1612{
1613 struct qede_dev *edev = netdev_priv(dev);
1614
1615 DP_VERBOSE(edev, QED_MSG_DEBUG,
1616 "Self-test command parameters: offline = %d, external_lb = %d\n",
1617 (etest->flags & ETH_TEST_FL_OFFLINE),
1618 (etest->flags & ETH_TEST_FL_EXTERNAL_LB) >> 2);
1619
1620 memset(buf, 0, sizeof(u64) * QEDE_ETHTOOL_TEST_MAX);
1621
1622 if (etest->flags & ETH_TEST_FL_OFFLINE) {
1623 if (qede_selftest_run_loopback(edev,
1624 QED_LINK_LOOPBACK_INT_PHY)) {
1625 buf[QEDE_ETHTOOL_INT_LOOPBACK] = 1;
1626 etest->flags |= ETH_TEST_FL_FAILED;
1627 }
1628 }
1629
1630 if (edev->ops->common->selftest->selftest_interrupt(edev->cdev)) {
1631 buf[QEDE_ETHTOOL_INTERRUPT_TEST] = 1;
1632 etest->flags |= ETH_TEST_FL_FAILED;
1633 }
1634
1635 if (edev->ops->common->selftest->selftest_memory(edev->cdev)) {
1636 buf[QEDE_ETHTOOL_MEMORY_TEST] = 1;
1637 etest->flags |= ETH_TEST_FL_FAILED;
1638 }
1639
1640 if (edev->ops->common->selftest->selftest_register(edev->cdev)) {
1641 buf[QEDE_ETHTOOL_REGISTER_TEST] = 1;
1642 etest->flags |= ETH_TEST_FL_FAILED;
1643 }
1644
1645 if (edev->ops->common->selftest->selftest_clock(edev->cdev)) {
1646 buf[QEDE_ETHTOOL_CLOCK_TEST] = 1;
1647 etest->flags |= ETH_TEST_FL_FAILED;
1648 }
1649
1650 if (edev->ops->common->selftest->selftest_nvram(edev->cdev)) {
1651 buf[QEDE_ETHTOOL_NVRAM_TEST] = 1;
1652 etest->flags |= ETH_TEST_FL_FAILED;
1653 }
1654}
1655
1656static int qede_set_tunable(struct net_device *dev,
1657 const struct ethtool_tunable *tuna,
1658 const void *data)
1659{
1660 struct qede_dev *edev = netdev_priv(dev);
1661 u32 val;
1662
1663 switch (tuna->id) {
1664 case ETHTOOL_RX_COPYBREAK:
1665 val = *(u32 *)data;
1666 if (val < QEDE_MIN_PKT_LEN || val > QEDE_RX_HDR_SIZE) {
1667 DP_VERBOSE(edev, QED_MSG_DEBUG,
1668 "Invalid rx copy break value, range is [%u, %u]",
1669 QEDE_MIN_PKT_LEN, QEDE_RX_HDR_SIZE);
1670 return -EINVAL;
1671 }
1672
1673 edev->rx_copybreak = *(u32 *)data;
1674 break;
1675 default:
1676 return -EOPNOTSUPP;
1677 }
1678
1679 return 0;
1680}
1681
1682static int qede_get_tunable(struct net_device *dev,
1683 const struct ethtool_tunable *tuna, void *data)
1684{
1685 struct qede_dev *edev = netdev_priv(dev);
1686
1687 switch (tuna->id) {
1688 case ETHTOOL_RX_COPYBREAK:
1689 *(u32 *)data = edev->rx_copybreak;
1690 break;
1691 default:
1692 return -EOPNOTSUPP;
1693 }
1694
1695 return 0;
1696}
1697
1698static int qede_get_eee(struct net_device *dev, struct ethtool_eee *edata)
1699{
1700 struct qede_dev *edev = netdev_priv(dev);
1701 struct qed_link_output current_link;
1702
1703 memset(¤t_link, 0, sizeof(current_link));
1704 edev->ops->common->get_link(edev->cdev, ¤t_link);
1705
1706 if (!current_link.eee_supported) {
1707 DP_INFO(edev, "EEE is not supported\n");
1708 return -EOPNOTSUPP;
1709 }
1710
1711 if (current_link.eee.adv_caps & QED_EEE_1G_ADV)
1712 edata->advertised = ADVERTISED_1000baseT_Full;
1713 if (current_link.eee.adv_caps & QED_EEE_10G_ADV)
1714 edata->advertised |= ADVERTISED_10000baseT_Full;
1715 if (current_link.sup_caps & QED_EEE_1G_ADV)
1716 edata->supported = ADVERTISED_1000baseT_Full;
1717 if (current_link.sup_caps & QED_EEE_10G_ADV)
1718 edata->supported |= ADVERTISED_10000baseT_Full;
1719 if (current_link.eee.lp_adv_caps & QED_EEE_1G_ADV)
1720 edata->lp_advertised = ADVERTISED_1000baseT_Full;
1721 if (current_link.eee.lp_adv_caps & QED_EEE_10G_ADV)
1722 edata->lp_advertised |= ADVERTISED_10000baseT_Full;
1723
1724 edata->tx_lpi_timer = current_link.eee.tx_lpi_timer;
1725 edata->eee_enabled = current_link.eee.enable;
1726 edata->tx_lpi_enabled = current_link.eee.tx_lpi_enable;
1727 edata->eee_active = current_link.eee_active;
1728
1729 return 0;
1730}
1731
1732static int qede_set_eee(struct net_device *dev, struct ethtool_eee *edata)
1733{
1734 struct qede_dev *edev = netdev_priv(dev);
1735 struct qed_link_output current_link;
1736 struct qed_link_params params;
1737
1738 if (!edev->ops->common->can_link_change(edev->cdev)) {
1739 DP_INFO(edev, "Link settings are not allowed to be changed\n");
1740 return -EOPNOTSUPP;
1741 }
1742
1743 memset(¤t_link, 0, sizeof(current_link));
1744 edev->ops->common->get_link(edev->cdev, ¤t_link);
1745
1746 if (!current_link.eee_supported) {
1747 DP_INFO(edev, "EEE is not supported\n");
1748 return -EOPNOTSUPP;
1749 }
1750
1751 memset(¶ms, 0, sizeof(params));
1752 params.override_flags |= QED_LINK_OVERRIDE_EEE_CONFIG;
1753
1754 if (!(edata->advertised & (ADVERTISED_1000baseT_Full |
1755 ADVERTISED_10000baseT_Full)) ||
1756 ((edata->advertised & (ADVERTISED_1000baseT_Full |
1757 ADVERTISED_10000baseT_Full)) !=
1758 edata->advertised)) {
1759 DP_VERBOSE(edev, QED_MSG_DEBUG,
1760 "Invalid advertised capabilities %d\n",
1761 edata->advertised);
1762 return -EINVAL;
1763 }
1764
1765 if (edata->advertised & ADVERTISED_1000baseT_Full)
1766 params.eee.adv_caps = QED_EEE_1G_ADV;
1767 if (edata->advertised & ADVERTISED_10000baseT_Full)
1768 params.eee.adv_caps |= QED_EEE_10G_ADV;
1769 params.eee.enable = edata->eee_enabled;
1770 params.eee.tx_lpi_enable = edata->tx_lpi_enabled;
1771 params.eee.tx_lpi_timer = edata->tx_lpi_timer;
1772
1773 params.link_up = true;
1774 edev->ops->common->set_link(edev->cdev, ¶ms);
1775
1776 return 0;
1777}
1778
1779static const struct ethtool_ops qede_ethtool_ops = {
1780 .get_link_ksettings = qede_get_link_ksettings,
1781 .set_link_ksettings = qede_set_link_ksettings,
1782 .get_drvinfo = qede_get_drvinfo,
1783 .get_regs_len = qede_get_regs_len,
1784 .get_regs = qede_get_regs,
1785 .get_wol = qede_get_wol,
1786 .set_wol = qede_set_wol,
1787 .get_msglevel = qede_get_msglevel,
1788 .set_msglevel = qede_set_msglevel,
1789 .nway_reset = qede_nway_reset,
1790 .get_link = qede_get_link,
1791 .get_coalesce = qede_get_coalesce,
1792 .set_coalesce = qede_set_coalesce,
1793 .get_ringparam = qede_get_ringparam,
1794 .set_ringparam = qede_set_ringparam,
1795 .get_pauseparam = qede_get_pauseparam,
1796 .set_pauseparam = qede_set_pauseparam,
1797 .get_strings = qede_get_strings,
1798 .set_phys_id = qede_set_phys_id,
1799 .get_ethtool_stats = qede_get_ethtool_stats,
1800 .get_priv_flags = qede_get_priv_flags,
1801 .get_sset_count = qede_get_sset_count,
1802 .get_rxnfc = qede_get_rxnfc,
1803 .set_rxnfc = qede_set_rxnfc,
1804 .get_rxfh_indir_size = qede_get_rxfh_indir_size,
1805 .get_rxfh_key_size = qede_get_rxfh_key_size,
1806 .get_rxfh = qede_get_rxfh,
1807 .set_rxfh = qede_set_rxfh,
1808 .get_ts_info = qede_get_ts_info,
1809 .get_channels = qede_get_channels,
1810 .set_channels = qede_set_channels,
1811 .self_test = qede_self_test,
1812 .get_eee = qede_get_eee,
1813 .set_eee = qede_set_eee,
1814
1815 .get_tunable = qede_get_tunable,
1816 .set_tunable = qede_set_tunable,
1817 .flash_device = qede_flash_device,
1818};
1819
1820static const struct ethtool_ops qede_vf_ethtool_ops = {
1821 .get_link_ksettings = qede_get_link_ksettings,
1822 .get_drvinfo = qede_get_drvinfo,
1823 .get_msglevel = qede_get_msglevel,
1824 .set_msglevel = qede_set_msglevel,
1825 .get_link = qede_get_link,
1826 .get_coalesce = qede_get_coalesce,
1827 .set_coalesce = qede_set_coalesce,
1828 .get_ringparam = qede_get_ringparam,
1829 .set_ringparam = qede_set_ringparam,
1830 .get_strings = qede_get_strings,
1831 .get_ethtool_stats = qede_get_ethtool_stats,
1832 .get_priv_flags = qede_get_priv_flags,
1833 .get_sset_count = qede_get_sset_count,
1834 .get_rxnfc = qede_get_rxnfc,
1835 .set_rxnfc = qede_set_rxnfc,
1836 .get_rxfh_indir_size = qede_get_rxfh_indir_size,
1837 .get_rxfh_key_size = qede_get_rxfh_key_size,
1838 .get_rxfh = qede_get_rxfh,
1839 .set_rxfh = qede_set_rxfh,
1840 .get_channels = qede_get_channels,
1841 .set_channels = qede_set_channels,
1842 .get_tunable = qede_get_tunable,
1843 .set_tunable = qede_set_tunable,
1844};
1845
1846void qede_set_ethtool_ops(struct net_device *dev)
1847{
1848 struct qede_dev *edev = netdev_priv(dev);
1849
1850 if (IS_VF(edev))
1851 dev->ethtool_ops = &qede_vf_ethtool_ops;
1852 else
1853 dev->ethtool_ops = &qede_ethtool_ops;
1854}