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1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2/* QLogic qede NIC Driver
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2020 Marvell International Ltd.
5 */
6
7#include <linux/types.h>
8#include <linux/netdevice.h>
9#include <linux/etherdevice.h>
10#include <linux/ethtool.h>
11#include <linux/string.h>
12#include <linux/pci.h>
13#include <linux/capability.h>
14#include <linux/vmalloc.h>
15#include <linux/phylink.h>
16
17#include "qede.h"
18#include "qede_ptp.h"
19
20#define QEDE_RQSTAT_OFFSET(stat_name) \
21 (offsetof(struct qede_rx_queue, stat_name))
22#define QEDE_RQSTAT_STRING(stat_name) (#stat_name)
23#define QEDE_RQSTAT(stat_name) \
24 {QEDE_RQSTAT_OFFSET(stat_name), QEDE_RQSTAT_STRING(stat_name)}
25
26#define QEDE_SELFTEST_POLL_COUNT 100
27#define QEDE_DUMP_VERSION 0x1
28#define QEDE_DUMP_NVM_ARG_COUNT 2
29
30static const struct {
31 u64 offset;
32 char string[ETH_GSTRING_LEN];
33} qede_rqstats_arr[] = {
34 QEDE_RQSTAT(rcv_pkts),
35 QEDE_RQSTAT(rx_hw_errors),
36 QEDE_RQSTAT(rx_alloc_errors),
37 QEDE_RQSTAT(rx_ip_frags),
38 QEDE_RQSTAT(xdp_no_pass),
39};
40
41#define QEDE_NUM_RQSTATS ARRAY_SIZE(qede_rqstats_arr)
42#define QEDE_TQSTAT_OFFSET(stat_name) \
43 (offsetof(struct qede_tx_queue, stat_name))
44#define QEDE_TQSTAT_STRING(stat_name) (#stat_name)
45#define QEDE_TQSTAT(stat_name) \
46 {QEDE_TQSTAT_OFFSET(stat_name), QEDE_TQSTAT_STRING(stat_name)}
47#define QEDE_NUM_TQSTATS ARRAY_SIZE(qede_tqstats_arr)
48static const struct {
49 u64 offset;
50 char string[ETH_GSTRING_LEN];
51} qede_tqstats_arr[] = {
52 QEDE_TQSTAT(xmit_pkts),
53 QEDE_TQSTAT(stopped_cnt),
54 QEDE_TQSTAT(tx_mem_alloc_err),
55};
56
57#define QEDE_STAT_OFFSET(stat_name, type, base) \
58 (offsetof(type, stat_name) + (base))
59#define QEDE_STAT_STRING(stat_name) (#stat_name)
60#define _QEDE_STAT(stat_name, type, base, attr) \
61 {QEDE_STAT_OFFSET(stat_name, type, base), \
62 QEDE_STAT_STRING(stat_name), \
63 attr}
64#define QEDE_STAT(stat_name) \
65 _QEDE_STAT(stat_name, struct qede_stats_common, 0, 0x0)
66#define QEDE_PF_STAT(stat_name) \
67 _QEDE_STAT(stat_name, struct qede_stats_common, 0, \
68 BIT(QEDE_STAT_PF_ONLY))
69#define QEDE_PF_BB_STAT(stat_name) \
70 _QEDE_STAT(stat_name, struct qede_stats_bb, \
71 offsetof(struct qede_stats, bb), \
72 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_BB_ONLY))
73#define QEDE_PF_AH_STAT(stat_name) \
74 _QEDE_STAT(stat_name, struct qede_stats_ah, \
75 offsetof(struct qede_stats, ah), \
76 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_AH_ONLY))
77static const struct {
78 u64 offset;
79 char string[ETH_GSTRING_LEN];
80 unsigned long attr;
81#define QEDE_STAT_PF_ONLY 0
82#define QEDE_STAT_BB_ONLY 1
83#define QEDE_STAT_AH_ONLY 2
84} qede_stats_arr[] = {
85 QEDE_STAT(rx_ucast_bytes),
86 QEDE_STAT(rx_mcast_bytes),
87 QEDE_STAT(rx_bcast_bytes),
88 QEDE_STAT(rx_ucast_pkts),
89 QEDE_STAT(rx_mcast_pkts),
90 QEDE_STAT(rx_bcast_pkts),
91
92 QEDE_STAT(tx_ucast_bytes),
93 QEDE_STAT(tx_mcast_bytes),
94 QEDE_STAT(tx_bcast_bytes),
95 QEDE_STAT(tx_ucast_pkts),
96 QEDE_STAT(tx_mcast_pkts),
97 QEDE_STAT(tx_bcast_pkts),
98
99 QEDE_PF_STAT(rx_64_byte_packets),
100 QEDE_PF_STAT(rx_65_to_127_byte_packets),
101 QEDE_PF_STAT(rx_128_to_255_byte_packets),
102 QEDE_PF_STAT(rx_256_to_511_byte_packets),
103 QEDE_PF_STAT(rx_512_to_1023_byte_packets),
104 QEDE_PF_STAT(rx_1024_to_1518_byte_packets),
105 QEDE_PF_BB_STAT(rx_1519_to_1522_byte_packets),
106 QEDE_PF_BB_STAT(rx_1519_to_2047_byte_packets),
107 QEDE_PF_BB_STAT(rx_2048_to_4095_byte_packets),
108 QEDE_PF_BB_STAT(rx_4096_to_9216_byte_packets),
109 QEDE_PF_BB_STAT(rx_9217_to_16383_byte_packets),
110 QEDE_PF_AH_STAT(rx_1519_to_max_byte_packets),
111 QEDE_PF_STAT(tx_64_byte_packets),
112 QEDE_PF_STAT(tx_65_to_127_byte_packets),
113 QEDE_PF_STAT(tx_128_to_255_byte_packets),
114 QEDE_PF_STAT(tx_256_to_511_byte_packets),
115 QEDE_PF_STAT(tx_512_to_1023_byte_packets),
116 QEDE_PF_STAT(tx_1024_to_1518_byte_packets),
117 QEDE_PF_BB_STAT(tx_1519_to_2047_byte_packets),
118 QEDE_PF_BB_STAT(tx_2048_to_4095_byte_packets),
119 QEDE_PF_BB_STAT(tx_4096_to_9216_byte_packets),
120 QEDE_PF_BB_STAT(tx_9217_to_16383_byte_packets),
121 QEDE_PF_AH_STAT(tx_1519_to_max_byte_packets),
122 QEDE_PF_STAT(rx_mac_crtl_frames),
123 QEDE_PF_STAT(tx_mac_ctrl_frames),
124 QEDE_PF_STAT(rx_pause_frames),
125 QEDE_PF_STAT(tx_pause_frames),
126 QEDE_PF_STAT(rx_pfc_frames),
127 QEDE_PF_STAT(tx_pfc_frames),
128
129 QEDE_PF_STAT(rx_crc_errors),
130 QEDE_PF_STAT(rx_align_errors),
131 QEDE_PF_STAT(rx_carrier_errors),
132 QEDE_PF_STAT(rx_oversize_packets),
133 QEDE_PF_STAT(rx_jabbers),
134 QEDE_PF_STAT(rx_undersize_packets),
135 QEDE_PF_STAT(rx_fragments),
136 QEDE_PF_BB_STAT(tx_lpi_entry_count),
137 QEDE_PF_BB_STAT(tx_total_collisions),
138 QEDE_PF_STAT(brb_truncates),
139 QEDE_PF_STAT(brb_discards),
140 QEDE_STAT(no_buff_discards),
141 QEDE_PF_STAT(mftag_filter_discards),
142 QEDE_PF_STAT(mac_filter_discards),
143 QEDE_PF_STAT(gft_filter_drop),
144 QEDE_STAT(tx_err_drop_pkts),
145 QEDE_STAT(ttl0_discard),
146 QEDE_STAT(packet_too_big_discard),
147
148 QEDE_STAT(coalesced_pkts),
149 QEDE_STAT(coalesced_events),
150 QEDE_STAT(coalesced_aborts_num),
151 QEDE_STAT(non_coalesced_pkts),
152 QEDE_STAT(coalesced_bytes),
153
154 QEDE_STAT(link_change_count),
155 QEDE_STAT(ptp_skip_txts),
156};
157
158#define QEDE_NUM_STATS ARRAY_SIZE(qede_stats_arr)
159#define QEDE_STAT_IS_PF_ONLY(i) \
160 test_bit(QEDE_STAT_PF_ONLY, &qede_stats_arr[i].attr)
161#define QEDE_STAT_IS_BB_ONLY(i) \
162 test_bit(QEDE_STAT_BB_ONLY, &qede_stats_arr[i].attr)
163#define QEDE_STAT_IS_AH_ONLY(i) \
164 test_bit(QEDE_STAT_AH_ONLY, &qede_stats_arr[i].attr)
165
166enum {
167 QEDE_PRI_FLAG_CMT,
168 QEDE_PRI_FLAG_SMART_AN_SUPPORT, /* MFW supports SmartAN */
169 QEDE_PRI_FLAG_RECOVER_ON_ERROR,
170 QEDE_PRI_FLAG_ESL_SUPPORT, /* MFW supports Enhanced System Lockdown */
171 QEDE_PRI_FLAG_ESL_ACTIVE, /* Enhanced System Lockdown Active status */
172 QEDE_PRI_FLAG_LEN,
173};
174
175static const char qede_private_arr[QEDE_PRI_FLAG_LEN][ETH_GSTRING_LEN] = {
176 "Coupled-Function",
177 "SmartAN capable",
178 "Recover on error",
179 "ESL capable",
180 "ESL active",
181};
182
183enum qede_ethtool_tests {
184 QEDE_ETHTOOL_INT_LOOPBACK,
185 QEDE_ETHTOOL_INTERRUPT_TEST,
186 QEDE_ETHTOOL_MEMORY_TEST,
187 QEDE_ETHTOOL_REGISTER_TEST,
188 QEDE_ETHTOOL_CLOCK_TEST,
189 QEDE_ETHTOOL_NVRAM_TEST,
190 QEDE_ETHTOOL_TEST_MAX
191};
192
193static const char qede_tests_str_arr[QEDE_ETHTOOL_TEST_MAX][ETH_GSTRING_LEN] = {
194 "Internal loopback (offline)",
195 "Interrupt (online)\t",
196 "Memory (online)\t\t",
197 "Register (online)\t",
198 "Clock (online)\t\t",
199 "Nvram (online)\t\t",
200};
201
202/* Forced speed capabilities maps */
203
204static const u32 qede_forced_speed_1000[] __initconst = {
205 ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
206 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
207 ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
208};
209
210static const u32 qede_forced_speed_10000[] __initconst = {
211 ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
212 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
213 ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
214 ETHTOOL_LINK_MODE_10000baseR_FEC_BIT,
215 ETHTOOL_LINK_MODE_10000baseCR_Full_BIT,
216 ETHTOOL_LINK_MODE_10000baseSR_Full_BIT,
217 ETHTOOL_LINK_MODE_10000baseLR_Full_BIT,
218 ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT,
219};
220
221static const u32 qede_forced_speed_20000[] __initconst = {
222 ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT,
223};
224
225static const u32 qede_forced_speed_25000[] __initconst = {
226 ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
227 ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
228 ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
229};
230
231static const u32 qede_forced_speed_40000[] __initconst = {
232 ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
233 ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
234 ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
235 ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
236};
237
238static const u32 qede_forced_speed_50000[] __initconst = {
239 ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
240 ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
241 ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT,
242};
243
244static const u32 qede_forced_speed_100000[] __initconst = {
245 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
246 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
247 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
248 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
249};
250
251static struct ethtool_forced_speed_map
252qede_forced_speed_maps[] __ro_after_init = {
253 ETHTOOL_FORCED_SPEED_MAP(qede_forced_speed, 1000),
254 ETHTOOL_FORCED_SPEED_MAP(qede_forced_speed, 10000),
255 ETHTOOL_FORCED_SPEED_MAP(qede_forced_speed, 20000),
256 ETHTOOL_FORCED_SPEED_MAP(qede_forced_speed, 25000),
257 ETHTOOL_FORCED_SPEED_MAP(qede_forced_speed, 40000),
258 ETHTOOL_FORCED_SPEED_MAP(qede_forced_speed, 50000),
259 ETHTOOL_FORCED_SPEED_MAP(qede_forced_speed, 100000),
260};
261
262void __init qede_forced_speed_maps_init(void)
263{
264 ethtool_forced_speed_maps_init(qede_forced_speed_maps,
265 ARRAY_SIZE(qede_forced_speed_maps));
266}
267
268/* Ethtool callbacks */
269
270static void qede_get_strings_stats_txq(struct qede_dev *edev,
271 struct qede_tx_queue *txq, u8 **buf)
272{
273 int i;
274
275 for (i = 0; i < QEDE_NUM_TQSTATS; i++)
276 if (txq->is_xdp)
277 ethtool_sprintf(buf, "%d [XDP]: %s",
278 QEDE_TXQ_XDP_TO_IDX(edev, txq),
279 qede_tqstats_arr[i].string);
280 else
281 ethtool_sprintf(buf, "%d_%d: %s", txq->index, txq->cos,
282 qede_tqstats_arr[i].string);
283}
284
285static void qede_get_strings_stats_rxq(struct qede_dev *edev,
286 struct qede_rx_queue *rxq, u8 **buf)
287{
288 int i;
289
290 for (i = 0; i < QEDE_NUM_RQSTATS; i++)
291 ethtool_sprintf(buf, "%d: %s", rxq->rxq_id,
292 qede_rqstats_arr[i].string);
293}
294
295static bool qede_is_irrelevant_stat(struct qede_dev *edev, int stat_index)
296{
297 return (IS_VF(edev) && QEDE_STAT_IS_PF_ONLY(stat_index)) ||
298 (QEDE_IS_BB(edev) && QEDE_STAT_IS_AH_ONLY(stat_index)) ||
299 (QEDE_IS_AH(edev) && QEDE_STAT_IS_BB_ONLY(stat_index));
300}
301
302static void qede_get_strings_stats(struct qede_dev *edev, u8 *buf)
303{
304 struct qede_fastpath *fp;
305 int i;
306
307 /* Account for queue statistics */
308 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
309 fp = &edev->fp_array[i];
310
311 if (fp->type & QEDE_FASTPATH_RX)
312 qede_get_strings_stats_rxq(edev, fp->rxq, &buf);
313
314 if (fp->type & QEDE_FASTPATH_XDP)
315 qede_get_strings_stats_txq(edev, fp->xdp_tx, &buf);
316
317 if (fp->type & QEDE_FASTPATH_TX) {
318 int cos;
319
320 for_each_cos_in_txq(edev, cos)
321 qede_get_strings_stats_txq(edev,
322 &fp->txq[cos], &buf);
323 }
324 }
325
326 /* Account for non-queue statistics */
327 for (i = 0; i < QEDE_NUM_STATS; i++) {
328 if (qede_is_irrelevant_stat(edev, i))
329 continue;
330 ethtool_puts(&buf, qede_stats_arr[i].string);
331 }
332}
333
334static void qede_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
335{
336 struct qede_dev *edev = netdev_priv(dev);
337 int i;
338
339 switch (stringset) {
340 case ETH_SS_STATS:
341 qede_get_strings_stats(edev, buf);
342 break;
343 case ETH_SS_PRIV_FLAGS:
344 for (i = 0; i < QEDE_PRI_FLAG_LEN; i++)
345 ethtool_puts(&buf, qede_private_arr[i]);
346 break;
347 case ETH_SS_TEST:
348 for (i = 0; i < QEDE_ETHTOOL_TEST_MAX; i++)
349 ethtool_puts(&buf, qede_tests_str_arr[i]);
350 break;
351 default:
352 DP_VERBOSE(edev, QED_MSG_DEBUG,
353 "Unsupported stringset 0x%08x\n", stringset);
354 }
355}
356
357static void qede_get_ethtool_stats_txq(struct qede_tx_queue *txq, u64 **buf)
358{
359 int i;
360
361 for (i = 0; i < QEDE_NUM_TQSTATS; i++) {
362 **buf = *((u64 *)(((void *)txq) + qede_tqstats_arr[i].offset));
363 (*buf)++;
364 }
365}
366
367static void qede_get_ethtool_stats_rxq(struct qede_rx_queue *rxq, u64 **buf)
368{
369 int i;
370
371 for (i = 0; i < QEDE_NUM_RQSTATS; i++) {
372 **buf = *((u64 *)(((void *)rxq) + qede_rqstats_arr[i].offset));
373 (*buf)++;
374 }
375}
376
377static void qede_get_ethtool_stats(struct net_device *dev,
378 struct ethtool_stats *stats, u64 *buf)
379{
380 struct qede_dev *edev = netdev_priv(dev);
381 struct qede_fastpath *fp;
382 int i;
383
384 qede_fill_by_demand_stats(edev);
385
386 /* Need to protect the access to the fastpath array */
387 __qede_lock(edev);
388
389 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
390 fp = &edev->fp_array[i];
391
392 if (fp->type & QEDE_FASTPATH_RX)
393 qede_get_ethtool_stats_rxq(fp->rxq, &buf);
394
395 if (fp->type & QEDE_FASTPATH_XDP)
396 qede_get_ethtool_stats_txq(fp->xdp_tx, &buf);
397
398 if (fp->type & QEDE_FASTPATH_TX) {
399 int cos;
400
401 for_each_cos_in_txq(edev, cos)
402 qede_get_ethtool_stats_txq(&fp->txq[cos], &buf);
403 }
404 }
405
406 spin_lock(&edev->stats_lock);
407
408 for (i = 0; i < QEDE_NUM_STATS; i++) {
409 if (qede_is_irrelevant_stat(edev, i))
410 continue;
411 *buf = *((u64 *)(((void *)&edev->stats) +
412 qede_stats_arr[i].offset));
413
414 buf++;
415 }
416
417 spin_unlock(&edev->stats_lock);
418
419 __qede_unlock(edev);
420}
421
422static int qede_get_sset_count(struct net_device *dev, int stringset)
423{
424 struct qede_dev *edev = netdev_priv(dev);
425 int num_stats = QEDE_NUM_STATS, i;
426
427 switch (stringset) {
428 case ETH_SS_STATS:
429 for (i = 0; i < QEDE_NUM_STATS; i++)
430 if (qede_is_irrelevant_stat(edev, i))
431 num_stats--;
432
433 /* Account for the Regular Tx statistics */
434 num_stats += QEDE_TSS_COUNT(edev) * QEDE_NUM_TQSTATS *
435 edev->dev_info.num_tc;
436
437 /* Account for the Regular Rx statistics */
438 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_RQSTATS;
439
440 /* Account for XDP statistics [if needed] */
441 if (edev->xdp_prog)
442 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_TQSTATS;
443 return num_stats;
444
445 case ETH_SS_PRIV_FLAGS:
446 return QEDE_PRI_FLAG_LEN;
447 case ETH_SS_TEST:
448 if (!IS_VF(edev))
449 return QEDE_ETHTOOL_TEST_MAX;
450 else
451 return 0;
452 default:
453 DP_VERBOSE(edev, QED_MSG_DEBUG,
454 "Unsupported stringset 0x%08x\n", stringset);
455 return -EINVAL;
456 }
457}
458
459static u32 qede_get_priv_flags(struct net_device *dev)
460{
461 struct qede_dev *edev = netdev_priv(dev);
462 bool esl_active;
463 u32 flags = 0;
464
465 if (edev->dev_info.common.num_hwfns > 1)
466 flags |= BIT(QEDE_PRI_FLAG_CMT);
467
468 if (edev->dev_info.common.smart_an)
469 flags |= BIT(QEDE_PRI_FLAG_SMART_AN_SUPPORT);
470
471 if (edev->err_flags & BIT(QEDE_ERR_IS_RECOVERABLE))
472 flags |= BIT(QEDE_PRI_FLAG_RECOVER_ON_ERROR);
473
474 if (edev->dev_info.common.esl)
475 flags |= BIT(QEDE_PRI_FLAG_ESL_SUPPORT);
476
477 edev->ops->common->get_esl_status(edev->cdev, &esl_active);
478
479 if (esl_active)
480 flags |= BIT(QEDE_PRI_FLAG_ESL_ACTIVE);
481
482 return flags;
483}
484
485static int qede_set_priv_flags(struct net_device *dev, u32 flags)
486{
487 struct qede_dev *edev = netdev_priv(dev);
488 u32 cflags = qede_get_priv_flags(dev);
489 u32 dflags = flags ^ cflags;
490
491 /* can only change RECOVER_ON_ERROR flag */
492 if (dflags & ~BIT(QEDE_PRI_FLAG_RECOVER_ON_ERROR))
493 return -EINVAL;
494
495 if (flags & BIT(QEDE_PRI_FLAG_RECOVER_ON_ERROR))
496 set_bit(QEDE_ERR_IS_RECOVERABLE, &edev->err_flags);
497 else
498 clear_bit(QEDE_ERR_IS_RECOVERABLE, &edev->err_flags);
499
500 return 0;
501}
502
503static int qede_get_link_ksettings(struct net_device *dev,
504 struct ethtool_link_ksettings *cmd)
505{
506 typeof(cmd->link_modes) *link_modes = &cmd->link_modes;
507 struct ethtool_link_settings *base = &cmd->base;
508 struct qede_dev *edev = netdev_priv(dev);
509 struct qed_link_output current_link;
510
511 __qede_lock(edev);
512
513 memset(¤t_link, 0, sizeof(current_link));
514 edev->ops->common->get_link(edev->cdev, ¤t_link);
515
516 linkmode_copy(link_modes->supported, current_link.supported_caps);
517 linkmode_copy(link_modes->advertising, current_link.advertised_caps);
518 linkmode_copy(link_modes->lp_advertising, current_link.lp_caps);
519
520 if ((edev->state == QEDE_STATE_OPEN) && (current_link.link_up)) {
521 base->speed = current_link.speed;
522 base->duplex = current_link.duplex;
523 } else {
524 base->speed = SPEED_UNKNOWN;
525 base->duplex = DUPLEX_UNKNOWN;
526 }
527
528 __qede_unlock(edev);
529
530 base->port = current_link.port;
531 base->autoneg = (current_link.autoneg) ? AUTONEG_ENABLE :
532 AUTONEG_DISABLE;
533
534 return 0;
535}
536
537static int qede_set_link_ksettings(struct net_device *dev,
538 const struct ethtool_link_ksettings *cmd)
539{
540 const struct ethtool_link_settings *base = &cmd->base;
541 const struct ethtool_forced_speed_map *map;
542 struct qede_dev *edev = netdev_priv(dev);
543 struct qed_link_output current_link;
544 struct qed_link_params params;
545 u32 i;
546
547 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
548 DP_INFO(edev, "Link settings are not allowed to be changed\n");
549 return -EOPNOTSUPP;
550 }
551 memset(¤t_link, 0, sizeof(current_link));
552 memset(¶ms, 0, sizeof(params));
553 edev->ops->common->get_link(edev->cdev, ¤t_link);
554
555 params.override_flags |= QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS;
556 params.override_flags |= QED_LINK_OVERRIDE_SPEED_AUTONEG;
557
558 if (base->autoneg == AUTONEG_ENABLE) {
559 if (!phylink_test(current_link.supported_caps, Autoneg)) {
560 DP_INFO(edev, "Auto negotiation is not supported\n");
561 return -EOPNOTSUPP;
562 }
563
564 params.autoneg = true;
565 params.forced_speed = 0;
566
567 linkmode_copy(params.adv_speeds, cmd->link_modes.advertising);
568 } else { /* forced speed */
569 params.override_flags |= QED_LINK_OVERRIDE_SPEED_FORCED_SPEED;
570 params.autoneg = false;
571 params.forced_speed = base->speed;
572
573 for (i = 0; i < ARRAY_SIZE(qede_forced_speed_maps); i++) {
574 map = qede_forced_speed_maps + i;
575
576 if (base->speed != map->speed ||
577 !linkmode_intersects(current_link.supported_caps,
578 map->caps))
579 continue;
580
581 linkmode_and(params.adv_speeds,
582 current_link.supported_caps, map->caps);
583 goto set_link;
584 }
585
586 DP_INFO(edev, "Unsupported speed %u\n", base->speed);
587 return -EINVAL;
588 }
589
590set_link:
591 params.link_up = true;
592 edev->ops->common->set_link(edev->cdev, ¶ms);
593
594 return 0;
595}
596
597static void qede_get_drvinfo(struct net_device *ndev,
598 struct ethtool_drvinfo *info)
599{
600 char mfw[ETHTOOL_FWVERS_LEN], storm[ETHTOOL_FWVERS_LEN];
601 struct qede_dev *edev = netdev_priv(ndev);
602 char mbi[ETHTOOL_FWVERS_LEN];
603
604 strscpy(info->driver, "qede", sizeof(info->driver));
605
606 snprintf(storm, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d",
607 edev->dev_info.common.fw_major,
608 edev->dev_info.common.fw_minor,
609 edev->dev_info.common.fw_rev,
610 edev->dev_info.common.fw_eng);
611
612 snprintf(mfw, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d",
613 (edev->dev_info.common.mfw_rev >> 24) & 0xFF,
614 (edev->dev_info.common.mfw_rev >> 16) & 0xFF,
615 (edev->dev_info.common.mfw_rev >> 8) & 0xFF,
616 edev->dev_info.common.mfw_rev & 0xFF);
617
618 if ((strlen(storm) + strlen("[storm]")) <
619 sizeof(info->version))
620 snprintf(info->version, sizeof(info->version),
621 "[storm %s]", storm);
622 else
623 snprintf(info->version, sizeof(info->version),
624 "%s", storm);
625
626 if (edev->dev_info.common.mbi_version) {
627 snprintf(mbi, ETHTOOL_FWVERS_LEN, "%d.%d.%d",
628 (edev->dev_info.common.mbi_version &
629 QED_MBI_VERSION_2_MASK) >> QED_MBI_VERSION_2_OFFSET,
630 (edev->dev_info.common.mbi_version &
631 QED_MBI_VERSION_1_MASK) >> QED_MBI_VERSION_1_OFFSET,
632 (edev->dev_info.common.mbi_version &
633 QED_MBI_VERSION_0_MASK) >> QED_MBI_VERSION_0_OFFSET);
634 snprintf(info->fw_version, sizeof(info->fw_version),
635 "mbi %s [mfw %s]", mbi, mfw);
636 } else {
637 snprintf(info->fw_version, sizeof(info->fw_version),
638 "mfw %s", mfw);
639 }
640
641 strscpy(info->bus_info, pci_name(edev->pdev), sizeof(info->bus_info));
642}
643
644static void qede_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
645{
646 struct qede_dev *edev = netdev_priv(ndev);
647
648 if (edev->dev_info.common.wol_support) {
649 wol->supported = WAKE_MAGIC;
650 wol->wolopts = edev->wol_enabled ? WAKE_MAGIC : 0;
651 }
652}
653
654static int qede_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
655{
656 struct qede_dev *edev = netdev_priv(ndev);
657 bool wol_requested;
658 int rc;
659
660 if (wol->wolopts & ~WAKE_MAGIC) {
661 DP_INFO(edev,
662 "Can't support WoL options other than magic-packet\n");
663 return -EINVAL;
664 }
665
666 wol_requested = !!(wol->wolopts & WAKE_MAGIC);
667 if (wol_requested == edev->wol_enabled)
668 return 0;
669
670 /* Need to actually change configuration */
671 if (!edev->dev_info.common.wol_support) {
672 DP_INFO(edev, "Device doesn't support WoL\n");
673 return -EINVAL;
674 }
675
676 rc = edev->ops->common->update_wol(edev->cdev, wol_requested);
677 if (!rc)
678 edev->wol_enabled = wol_requested;
679
680 return rc;
681}
682
683static u32 qede_get_msglevel(struct net_device *ndev)
684{
685 struct qede_dev *edev = netdev_priv(ndev);
686
687 return ((u32)edev->dp_level << QED_LOG_LEVEL_SHIFT) | edev->dp_module;
688}
689
690static void qede_set_msglevel(struct net_device *ndev, u32 level)
691{
692 struct qede_dev *edev = netdev_priv(ndev);
693 u32 dp_module = 0;
694 u8 dp_level = 0;
695
696 qede_config_debug(level, &dp_module, &dp_level);
697
698 edev->dp_level = dp_level;
699 edev->dp_module = dp_module;
700 edev->ops->common->update_msglvl(edev->cdev,
701 dp_module, dp_level);
702}
703
704static int qede_nway_reset(struct net_device *dev)
705{
706 struct qede_dev *edev = netdev_priv(dev);
707 struct qed_link_output current_link;
708 struct qed_link_params link_params;
709
710 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
711 DP_INFO(edev, "Link settings are not allowed to be changed\n");
712 return -EOPNOTSUPP;
713 }
714
715 if (!netif_running(dev))
716 return 0;
717
718 memset(¤t_link, 0, sizeof(current_link));
719 edev->ops->common->get_link(edev->cdev, ¤t_link);
720 if (!current_link.link_up)
721 return 0;
722
723 /* Toggle the link */
724 memset(&link_params, 0, sizeof(link_params));
725 link_params.link_up = false;
726 edev->ops->common->set_link(edev->cdev, &link_params);
727 link_params.link_up = true;
728 edev->ops->common->set_link(edev->cdev, &link_params);
729
730 return 0;
731}
732
733static u32 qede_get_link(struct net_device *dev)
734{
735 struct qede_dev *edev = netdev_priv(dev);
736 struct qed_link_output current_link;
737
738 memset(¤t_link, 0, sizeof(current_link));
739 edev->ops->common->get_link(edev->cdev, ¤t_link);
740
741 return current_link.link_up;
742}
743
744static int qede_flash_device(struct net_device *dev,
745 struct ethtool_flash *flash)
746{
747 struct qede_dev *edev = netdev_priv(dev);
748
749 return edev->ops->common->nvm_flash(edev->cdev, flash->data);
750}
751
752static int qede_get_coalesce(struct net_device *dev,
753 struct ethtool_coalesce *coal,
754 struct kernel_ethtool_coalesce *kernel_coal,
755 struct netlink_ext_ack *extack)
756{
757 void *rx_handle = NULL, *tx_handle = NULL;
758 struct qede_dev *edev = netdev_priv(dev);
759 u16 rx_coal, tx_coal, i, rc = 0;
760 struct qede_fastpath *fp;
761
762 rx_coal = QED_DEFAULT_RX_USECS;
763 tx_coal = QED_DEFAULT_TX_USECS;
764
765 memset(coal, 0, sizeof(struct ethtool_coalesce));
766
767 __qede_lock(edev);
768 if (edev->state == QEDE_STATE_OPEN) {
769 for_each_queue(i) {
770 fp = &edev->fp_array[i];
771
772 if (fp->type & QEDE_FASTPATH_RX) {
773 rx_handle = fp->rxq->handle;
774 break;
775 }
776 }
777
778 rc = edev->ops->get_coalesce(edev->cdev, &rx_coal, rx_handle);
779 if (rc) {
780 DP_INFO(edev, "Read Rx coalesce error\n");
781 goto out;
782 }
783
784 for_each_queue(i) {
785 struct qede_tx_queue *txq;
786
787 fp = &edev->fp_array[i];
788
789 /* All TX queues of given fastpath uses same
790 * coalescing value, so no need to iterate over
791 * all TCs, TC0 txq should suffice.
792 */
793 if (fp->type & QEDE_FASTPATH_TX) {
794 txq = QEDE_FP_TC0_TXQ(fp);
795 tx_handle = txq->handle;
796 break;
797 }
798 }
799
800 rc = edev->ops->get_coalesce(edev->cdev, &tx_coal, tx_handle);
801 if (rc)
802 DP_INFO(edev, "Read Tx coalesce error\n");
803 }
804
805out:
806 __qede_unlock(edev);
807
808 coal->rx_coalesce_usecs = rx_coal;
809 coal->tx_coalesce_usecs = tx_coal;
810 coal->stats_block_coalesce_usecs = edev->stats_coal_usecs;
811
812 return rc;
813}
814
815int qede_set_coalesce(struct net_device *dev, struct ethtool_coalesce *coal,
816 struct kernel_ethtool_coalesce *kernel_coal,
817 struct netlink_ext_ack *extack)
818{
819 struct qede_dev *edev = netdev_priv(dev);
820 struct qede_fastpath *fp;
821 int i, rc = 0;
822 u16 rxc, txc;
823
824 if (edev->stats_coal_usecs != coal->stats_block_coalesce_usecs) {
825 edev->stats_coal_usecs = coal->stats_block_coalesce_usecs;
826 if (edev->stats_coal_usecs) {
827 edev->stats_coal_ticks = usecs_to_jiffies(edev->stats_coal_usecs);
828 schedule_delayed_work(&edev->periodic_task, 0);
829
830 DP_INFO(edev, "Configured stats coal ticks=%lu jiffies\n",
831 edev->stats_coal_ticks);
832 } else {
833 cancel_delayed_work_sync(&edev->periodic_task);
834 }
835 }
836
837 if (!netif_running(dev)) {
838 DP_INFO(edev, "Interface is down\n");
839 return -EINVAL;
840 }
841
842 if (coal->rx_coalesce_usecs > QED_COALESCE_MAX ||
843 coal->tx_coalesce_usecs > QED_COALESCE_MAX) {
844 DP_INFO(edev,
845 "Can't support requested %s coalesce value [max supported value %d]\n",
846 coal->rx_coalesce_usecs > QED_COALESCE_MAX ? "rx" :
847 "tx", QED_COALESCE_MAX);
848 return -EINVAL;
849 }
850
851 rxc = (u16)coal->rx_coalesce_usecs;
852 txc = (u16)coal->tx_coalesce_usecs;
853 for_each_queue(i) {
854 fp = &edev->fp_array[i];
855
856 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) {
857 rc = edev->ops->common->set_coalesce(edev->cdev,
858 rxc, 0,
859 fp->rxq->handle);
860 if (rc) {
861 DP_INFO(edev,
862 "Set RX coalesce error, rc = %d\n", rc);
863 return rc;
864 }
865 edev->coal_entry[i].rxc = rxc;
866 edev->coal_entry[i].isvalid = true;
867 }
868
869 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
870 struct qede_tx_queue *txq;
871
872 /* All TX queues of given fastpath uses same
873 * coalescing value, so no need to iterate over
874 * all TCs, TC0 txq should suffice.
875 */
876 txq = QEDE_FP_TC0_TXQ(fp);
877
878 rc = edev->ops->common->set_coalesce(edev->cdev,
879 0, txc,
880 txq->handle);
881 if (rc) {
882 DP_INFO(edev,
883 "Set TX coalesce error, rc = %d\n", rc);
884 return rc;
885 }
886 edev->coal_entry[i].txc = txc;
887 edev->coal_entry[i].isvalid = true;
888 }
889 }
890
891 return rc;
892}
893
894static void qede_get_ringparam(struct net_device *dev,
895 struct ethtool_ringparam *ering,
896 struct kernel_ethtool_ringparam *kernel_ering,
897 struct netlink_ext_ack *extack)
898{
899 struct qede_dev *edev = netdev_priv(dev);
900
901 ering->rx_max_pending = NUM_RX_BDS_MAX;
902 ering->rx_pending = edev->q_num_rx_buffers;
903 ering->tx_max_pending = NUM_TX_BDS_MAX;
904 ering->tx_pending = edev->q_num_tx_buffers;
905}
906
907static int qede_set_ringparam(struct net_device *dev,
908 struct ethtool_ringparam *ering,
909 struct kernel_ethtool_ringparam *kernel_ering,
910 struct netlink_ext_ack *extack)
911{
912 struct qede_dev *edev = netdev_priv(dev);
913
914 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
915 "Set ring params command parameters: rx_pending = %d, tx_pending = %d\n",
916 ering->rx_pending, ering->tx_pending);
917
918 /* Validate legality of configuration */
919 if (ering->rx_pending > NUM_RX_BDS_MAX ||
920 ering->rx_pending < NUM_RX_BDS_MIN ||
921 ering->tx_pending > NUM_TX_BDS_MAX ||
922 ering->tx_pending < NUM_TX_BDS_MIN) {
923 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
924 "Can only support Rx Buffer size [0%08x,...,0x%08x] and Tx Buffer size [0x%08x,...,0x%08x]\n",
925 NUM_RX_BDS_MIN, NUM_RX_BDS_MAX,
926 NUM_TX_BDS_MIN, NUM_TX_BDS_MAX);
927 return -EINVAL;
928 }
929
930 /* Change ring size and re-load */
931 edev->q_num_rx_buffers = ering->rx_pending;
932 edev->q_num_tx_buffers = ering->tx_pending;
933
934 qede_reload(edev, NULL, false);
935
936 return 0;
937}
938
939static void qede_get_pauseparam(struct net_device *dev,
940 struct ethtool_pauseparam *epause)
941{
942 struct qede_dev *edev = netdev_priv(dev);
943 struct qed_link_output current_link;
944
945 memset(¤t_link, 0, sizeof(current_link));
946 edev->ops->common->get_link(edev->cdev, ¤t_link);
947
948 if (current_link.pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
949 epause->autoneg = true;
950 if (current_link.pause_config & QED_LINK_PAUSE_RX_ENABLE)
951 epause->rx_pause = true;
952 if (current_link.pause_config & QED_LINK_PAUSE_TX_ENABLE)
953 epause->tx_pause = true;
954
955 DP_VERBOSE(edev, QED_MSG_DEBUG,
956 "ethtool_pauseparam: cmd %d autoneg %d rx_pause %d tx_pause %d\n",
957 epause->cmd, epause->autoneg, epause->rx_pause,
958 epause->tx_pause);
959}
960
961static int qede_set_pauseparam(struct net_device *dev,
962 struct ethtool_pauseparam *epause)
963{
964 struct qede_dev *edev = netdev_priv(dev);
965 struct qed_link_params params;
966 struct qed_link_output current_link;
967
968 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
969 DP_INFO(edev,
970 "Pause settings are not allowed to be changed\n");
971 return -EOPNOTSUPP;
972 }
973
974 memset(¤t_link, 0, sizeof(current_link));
975 edev->ops->common->get_link(edev->cdev, ¤t_link);
976
977 memset(¶ms, 0, sizeof(params));
978 params.override_flags |= QED_LINK_OVERRIDE_PAUSE_CONFIG;
979
980 if (epause->autoneg) {
981 if (!phylink_test(current_link.supported_caps, Autoneg)) {
982 DP_INFO(edev, "autoneg not supported\n");
983 return -EINVAL;
984 }
985
986 params.pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
987 }
988
989 if (epause->rx_pause)
990 params.pause_config |= QED_LINK_PAUSE_RX_ENABLE;
991 if (epause->tx_pause)
992 params.pause_config |= QED_LINK_PAUSE_TX_ENABLE;
993
994 params.link_up = true;
995 edev->ops->common->set_link(edev->cdev, ¶ms);
996
997 return 0;
998}
999
1000static void qede_get_regs(struct net_device *ndev,
1001 struct ethtool_regs *regs, void *buffer)
1002{
1003 struct qede_dev *edev = netdev_priv(ndev);
1004
1005 regs->version = 0;
1006 memset(buffer, 0, regs->len);
1007
1008 if (edev->ops && edev->ops->common)
1009 edev->ops->common->dbg_all_data(edev->cdev, buffer);
1010}
1011
1012static int qede_get_regs_len(struct net_device *ndev)
1013{
1014 struct qede_dev *edev = netdev_priv(ndev);
1015
1016 if (edev->ops && edev->ops->common)
1017 return edev->ops->common->dbg_all_data_size(edev->cdev);
1018 else
1019 return -EINVAL;
1020}
1021
1022static void qede_update_mtu(struct qede_dev *edev,
1023 struct qede_reload_args *args)
1024{
1025 WRITE_ONCE(edev->ndev->mtu, args->u.mtu);
1026}
1027
1028/* Netdevice NDOs */
1029int qede_change_mtu(struct net_device *ndev, int new_mtu)
1030{
1031 struct qede_dev *edev = netdev_priv(ndev);
1032 struct qede_reload_args args;
1033
1034 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1035 "Configuring MTU size of %d\n", new_mtu);
1036
1037 if (new_mtu > PAGE_SIZE)
1038 ndev->features &= ~NETIF_F_GRO_HW;
1039
1040 /* Set the mtu field and re-start the interface if needed */
1041 args.u.mtu = new_mtu;
1042 args.func = &qede_update_mtu;
1043 qede_reload(edev, &args, false);
1044#if IS_ENABLED(CONFIG_QED_RDMA)
1045 qede_rdma_event_change_mtu(edev);
1046#endif
1047 edev->ops->common->update_mtu(edev->cdev, new_mtu);
1048
1049 return 0;
1050}
1051
1052static void qede_get_channels(struct net_device *dev,
1053 struct ethtool_channels *channels)
1054{
1055 struct qede_dev *edev = netdev_priv(dev);
1056
1057 channels->max_combined = QEDE_MAX_RSS_CNT(edev);
1058 channels->max_rx = QEDE_MAX_RSS_CNT(edev);
1059 channels->max_tx = QEDE_MAX_RSS_CNT(edev);
1060 channels->combined_count = QEDE_QUEUE_CNT(edev) - edev->fp_num_tx -
1061 edev->fp_num_rx;
1062 channels->tx_count = edev->fp_num_tx;
1063 channels->rx_count = edev->fp_num_rx;
1064}
1065
1066static int qede_set_channels(struct net_device *dev,
1067 struct ethtool_channels *channels)
1068{
1069 struct qede_dev *edev = netdev_priv(dev);
1070 u32 count;
1071
1072 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1073 "set-channels command parameters: rx = %d, tx = %d, other = %d, combined = %d\n",
1074 channels->rx_count, channels->tx_count,
1075 channels->other_count, channels->combined_count);
1076
1077 count = channels->rx_count + channels->tx_count +
1078 channels->combined_count;
1079
1080 /* We don't support `other' channels */
1081 if (channels->other_count) {
1082 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1083 "command parameters not supported\n");
1084 return -EINVAL;
1085 }
1086
1087 if (!(channels->combined_count || (channels->rx_count &&
1088 channels->tx_count))) {
1089 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1090 "need to request at least one transmit and one receive channel\n");
1091 return -EINVAL;
1092 }
1093
1094 if (count > QEDE_MAX_RSS_CNT(edev)) {
1095 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1096 "requested channels = %d max supported channels = %d\n",
1097 count, QEDE_MAX_RSS_CNT(edev));
1098 return -EINVAL;
1099 }
1100
1101 /* Check if there was a change in the active parameters */
1102 if ((count == QEDE_QUEUE_CNT(edev)) &&
1103 (channels->tx_count == edev->fp_num_tx) &&
1104 (channels->rx_count == edev->fp_num_rx)) {
1105 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1106 "No change in active parameters\n");
1107 return 0;
1108 }
1109
1110 /* We need the number of queues to be divisible between the hwfns */
1111 if ((count % edev->dev_info.common.num_hwfns) ||
1112 (channels->tx_count % edev->dev_info.common.num_hwfns) ||
1113 (channels->rx_count % edev->dev_info.common.num_hwfns)) {
1114 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1115 "Number of channels must be divisible by %04x\n",
1116 edev->dev_info.common.num_hwfns);
1117 return -EINVAL;
1118 }
1119
1120 /* Set number of queues and reload if necessary */
1121 edev->req_queues = count;
1122 edev->req_num_tx = channels->tx_count;
1123 edev->req_num_rx = channels->rx_count;
1124 /* Reset the indirection table if rx queue count is updated */
1125 if ((edev->req_queues - edev->req_num_tx) != QEDE_RSS_COUNT(edev)) {
1126 edev->rss_params_inited &= ~QEDE_RSS_INDIR_INITED;
1127 memset(edev->rss_ind_table, 0, sizeof(edev->rss_ind_table));
1128 }
1129
1130 qede_reload(edev, NULL, false);
1131
1132 return 0;
1133}
1134
1135static int qede_get_ts_info(struct net_device *dev,
1136 struct kernel_ethtool_ts_info *info)
1137{
1138 struct qede_dev *edev = netdev_priv(dev);
1139
1140 return qede_ptp_get_ts_info(edev, info);
1141}
1142
1143static int qede_set_phys_id(struct net_device *dev,
1144 enum ethtool_phys_id_state state)
1145{
1146 struct qede_dev *edev = netdev_priv(dev);
1147 u8 led_state = 0;
1148
1149 switch (state) {
1150 case ETHTOOL_ID_ACTIVE:
1151 return 1; /* cycle on/off once per second */
1152
1153 case ETHTOOL_ID_ON:
1154 led_state = QED_LED_MODE_ON;
1155 break;
1156
1157 case ETHTOOL_ID_OFF:
1158 led_state = QED_LED_MODE_OFF;
1159 break;
1160
1161 case ETHTOOL_ID_INACTIVE:
1162 led_state = QED_LED_MODE_RESTORE;
1163 break;
1164 }
1165
1166 edev->ops->common->set_led(edev->cdev, led_state);
1167
1168 return 0;
1169}
1170
1171static int qede_get_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)
1172{
1173 info->data = RXH_IP_SRC | RXH_IP_DST;
1174
1175 switch (info->flow_type) {
1176 case TCP_V4_FLOW:
1177 case TCP_V6_FLOW:
1178 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
1179 break;
1180 case UDP_V4_FLOW:
1181 if (edev->rss_caps & QED_RSS_IPV4_UDP)
1182 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
1183 break;
1184 case UDP_V6_FLOW:
1185 if (edev->rss_caps & QED_RSS_IPV6_UDP)
1186 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
1187 break;
1188 case IPV4_FLOW:
1189 case IPV6_FLOW:
1190 break;
1191 default:
1192 info->data = 0;
1193 break;
1194 }
1195
1196 return 0;
1197}
1198
1199static int qede_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,
1200 u32 *rule_locs)
1201{
1202 struct qede_dev *edev = netdev_priv(dev);
1203 int rc = 0;
1204
1205 switch (info->cmd) {
1206 case ETHTOOL_GRXRINGS:
1207 info->data = QEDE_RSS_COUNT(edev);
1208 break;
1209 case ETHTOOL_GRXFH:
1210 rc = qede_get_rss_flags(edev, info);
1211 break;
1212 case ETHTOOL_GRXCLSRLCNT:
1213 info->rule_cnt = qede_get_arfs_filter_count(edev);
1214 info->data = QEDE_RFS_MAX_FLTR;
1215 break;
1216 case ETHTOOL_GRXCLSRULE:
1217 rc = qede_get_cls_rule_entry(edev, info);
1218 break;
1219 case ETHTOOL_GRXCLSRLALL:
1220 rc = qede_get_cls_rule_all(edev, info, rule_locs);
1221 break;
1222 default:
1223 DP_ERR(edev, "Command parameters not supported\n");
1224 rc = -EOPNOTSUPP;
1225 }
1226
1227 return rc;
1228}
1229
1230static int qede_set_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)
1231{
1232 struct qed_update_vport_params *vport_update_params;
1233 u8 set_caps = 0, clr_caps = 0;
1234 int rc = 0;
1235
1236 DP_VERBOSE(edev, QED_MSG_DEBUG,
1237 "Set rss flags command parameters: flow type = %d, data = %llu\n",
1238 info->flow_type, info->data);
1239
1240 switch (info->flow_type) {
1241 case TCP_V4_FLOW:
1242 case TCP_V6_FLOW:
1243 /* For TCP only 4-tuple hash is supported */
1244 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST |
1245 RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1246 DP_INFO(edev, "Command parameters not supported\n");
1247 return -EINVAL;
1248 }
1249 return 0;
1250 case UDP_V4_FLOW:
1251 /* For UDP either 2-tuple hash or 4-tuple hash is supported */
1252 if (info->data == (RXH_IP_SRC | RXH_IP_DST |
1253 RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1254 set_caps = QED_RSS_IPV4_UDP;
1255 DP_VERBOSE(edev, QED_MSG_DEBUG,
1256 "UDP 4-tuple enabled\n");
1257 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) {
1258 clr_caps = QED_RSS_IPV4_UDP;
1259 DP_VERBOSE(edev, QED_MSG_DEBUG,
1260 "UDP 4-tuple disabled\n");
1261 } else {
1262 return -EINVAL;
1263 }
1264 break;
1265 case UDP_V6_FLOW:
1266 /* For UDP either 2-tuple hash or 4-tuple hash is supported */
1267 if (info->data == (RXH_IP_SRC | RXH_IP_DST |
1268 RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1269 set_caps = QED_RSS_IPV6_UDP;
1270 DP_VERBOSE(edev, QED_MSG_DEBUG,
1271 "UDP 4-tuple enabled\n");
1272 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) {
1273 clr_caps = QED_RSS_IPV6_UDP;
1274 DP_VERBOSE(edev, QED_MSG_DEBUG,
1275 "UDP 4-tuple disabled\n");
1276 } else {
1277 return -EINVAL;
1278 }
1279 break;
1280 case IPV4_FLOW:
1281 case IPV6_FLOW:
1282 /* For IP only 2-tuple hash is supported */
1283 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST)) {
1284 DP_INFO(edev, "Command parameters not supported\n");
1285 return -EINVAL;
1286 }
1287 return 0;
1288 case SCTP_V4_FLOW:
1289 case AH_ESP_V4_FLOW:
1290 case AH_V4_FLOW:
1291 case ESP_V4_FLOW:
1292 case SCTP_V6_FLOW:
1293 case AH_ESP_V6_FLOW:
1294 case AH_V6_FLOW:
1295 case ESP_V6_FLOW:
1296 case IP_USER_FLOW:
1297 case ETHER_FLOW:
1298 /* RSS is not supported for these protocols */
1299 if (info->data) {
1300 DP_INFO(edev, "Command parameters not supported\n");
1301 return -EINVAL;
1302 }
1303 return 0;
1304 default:
1305 return -EINVAL;
1306 }
1307
1308 /* No action is needed if there is no change in the rss capability */
1309 if (edev->rss_caps == ((edev->rss_caps & ~clr_caps) | set_caps))
1310 return 0;
1311
1312 /* Update internal configuration */
1313 edev->rss_caps = ((edev->rss_caps & ~clr_caps) | set_caps);
1314 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
1315
1316 /* Re-configure if possible */
1317 __qede_lock(edev);
1318 if (edev->state == QEDE_STATE_OPEN) {
1319 vport_update_params = vzalloc(sizeof(*vport_update_params));
1320 if (!vport_update_params) {
1321 __qede_unlock(edev);
1322 return -ENOMEM;
1323 }
1324 qede_fill_rss_params(edev, &vport_update_params->rss_params,
1325 &vport_update_params->update_rss_flg);
1326 rc = edev->ops->vport_update(edev->cdev, vport_update_params);
1327 vfree(vport_update_params);
1328 }
1329 __qede_unlock(edev);
1330
1331 return rc;
1332}
1333
1334static int qede_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info)
1335{
1336 struct qede_dev *edev = netdev_priv(dev);
1337 int rc;
1338
1339 switch (info->cmd) {
1340 case ETHTOOL_SRXFH:
1341 rc = qede_set_rss_flags(edev, info);
1342 break;
1343 case ETHTOOL_SRXCLSRLINS:
1344 rc = qede_add_cls_rule(edev, info);
1345 break;
1346 case ETHTOOL_SRXCLSRLDEL:
1347 rc = qede_delete_flow_filter(edev, info->fs.location);
1348 break;
1349 default:
1350 DP_INFO(edev, "Command parameters not supported\n");
1351 rc = -EOPNOTSUPP;
1352 }
1353
1354 return rc;
1355}
1356
1357static u32 qede_get_rxfh_indir_size(struct net_device *dev)
1358{
1359 return QED_RSS_IND_TABLE_SIZE;
1360}
1361
1362static u32 qede_get_rxfh_key_size(struct net_device *dev)
1363{
1364 struct qede_dev *edev = netdev_priv(dev);
1365
1366 return sizeof(edev->rss_key);
1367}
1368
1369static int qede_get_rxfh(struct net_device *dev,
1370 struct ethtool_rxfh_param *rxfh)
1371{
1372 struct qede_dev *edev = netdev_priv(dev);
1373 int i;
1374
1375 rxfh->hfunc = ETH_RSS_HASH_TOP;
1376
1377 if (!rxfh->indir)
1378 return 0;
1379
1380 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++)
1381 rxfh->indir[i] = edev->rss_ind_table[i];
1382
1383 if (rxfh->key)
1384 memcpy(rxfh->key, edev->rss_key, qede_get_rxfh_key_size(dev));
1385
1386 return 0;
1387}
1388
1389static int qede_set_rxfh(struct net_device *dev,
1390 struct ethtool_rxfh_param *rxfh,
1391 struct netlink_ext_ack *extack)
1392{
1393 struct qed_update_vport_params *vport_update_params;
1394 struct qede_dev *edev = netdev_priv(dev);
1395 int i, rc = 0;
1396
1397 if (edev->dev_info.common.num_hwfns > 1) {
1398 DP_INFO(edev,
1399 "RSS configuration is not supported for 100G devices\n");
1400 return -EOPNOTSUPP;
1401 }
1402
1403 if (rxfh->hfunc != ETH_RSS_HASH_NO_CHANGE &&
1404 rxfh->hfunc != ETH_RSS_HASH_TOP)
1405 return -EOPNOTSUPP;
1406
1407 if (!rxfh->indir && !rxfh->key)
1408 return 0;
1409
1410 if (rxfh->indir) {
1411 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++)
1412 edev->rss_ind_table[i] = rxfh->indir[i];
1413 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
1414 }
1415
1416 if (rxfh->key) {
1417 memcpy(&edev->rss_key, rxfh->key, qede_get_rxfh_key_size(dev));
1418 edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
1419 }
1420
1421 __qede_lock(edev);
1422 if (edev->state == QEDE_STATE_OPEN) {
1423 vport_update_params = vzalloc(sizeof(*vport_update_params));
1424 if (!vport_update_params) {
1425 __qede_unlock(edev);
1426 return -ENOMEM;
1427 }
1428 qede_fill_rss_params(edev, &vport_update_params->rss_params,
1429 &vport_update_params->update_rss_flg);
1430 rc = edev->ops->vport_update(edev->cdev, vport_update_params);
1431 vfree(vport_update_params);
1432 }
1433 __qede_unlock(edev);
1434
1435 return rc;
1436}
1437
1438/* This function enables the interrupt generation and the NAPI on the device */
1439static void qede_netif_start(struct qede_dev *edev)
1440{
1441 int i;
1442
1443 if (!netif_running(edev->ndev))
1444 return;
1445
1446 for_each_queue(i) {
1447 /* Update and reenable interrupts */
1448 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_ENABLE, 1);
1449 napi_enable(&edev->fp_array[i].napi);
1450 }
1451}
1452
1453/* This function disables the NAPI and the interrupt generation on the device */
1454static void qede_netif_stop(struct qede_dev *edev)
1455{
1456 int i;
1457
1458 for_each_queue(i) {
1459 napi_disable(&edev->fp_array[i].napi);
1460 /* Disable interrupts */
1461 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_DISABLE, 0);
1462 }
1463}
1464
1465static int qede_selftest_transmit_traffic(struct qede_dev *edev,
1466 struct sk_buff *skb)
1467{
1468 struct qede_tx_queue *txq = NULL;
1469 struct eth_tx_1st_bd *first_bd;
1470 dma_addr_t mapping;
1471 int i, idx;
1472 u16 val;
1473
1474 for_each_queue(i) {
1475 struct qede_fastpath *fp = &edev->fp_array[i];
1476
1477 if (fp->type & QEDE_FASTPATH_TX) {
1478 txq = QEDE_FP_TC0_TXQ(fp);
1479 break;
1480 }
1481 }
1482
1483 if (!txq) {
1484 DP_NOTICE(edev, "Tx path is not available\n");
1485 return -1;
1486 }
1487
1488 /* Fill the entry in the SW ring and the BDs in the FW ring */
1489 idx = txq->sw_tx_prod;
1490 txq->sw_tx_ring.skbs[idx].skb = skb;
1491 first_bd = qed_chain_produce(&txq->tx_pbl);
1492 memset(first_bd, 0, sizeof(*first_bd));
1493 val = 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
1494 first_bd->data.bd_flags.bitfields = val;
1495 val = skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK;
1496 val = val << ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
1497 first_bd->data.bitfields |= cpu_to_le16(val);
1498
1499 /* Map skb linear data for DMA and set in the first BD */
1500 mapping = dma_map_single(&edev->pdev->dev, skb->data,
1501 skb_headlen(skb), DMA_TO_DEVICE);
1502 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
1503 DP_NOTICE(edev, "SKB mapping failed\n");
1504 return -ENOMEM;
1505 }
1506 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
1507
1508 /* update the first BD with the actual num BDs */
1509 first_bd->data.nbds = 1;
1510 txq->sw_tx_prod = (txq->sw_tx_prod + 1) % txq->num_tx_buffers;
1511 /* 'next page' entries are counted in the producer value */
1512 val = qed_chain_get_prod_idx(&txq->tx_pbl);
1513 txq->tx_db.data.bd_prod = cpu_to_le16(val);
1514
1515 /* wmb makes sure that the BDs data is updated before updating the
1516 * producer, otherwise FW may read old data from the BDs.
1517 */
1518 wmb();
1519 barrier();
1520 writel(txq->tx_db.raw, txq->doorbell_addr);
1521
1522 for (i = 0; i < QEDE_SELFTEST_POLL_COUNT; i++) {
1523 if (qede_txq_has_work(txq))
1524 break;
1525 usleep_range(100, 200);
1526 }
1527
1528 if (!qede_txq_has_work(txq)) {
1529 DP_NOTICE(edev, "Tx completion didn't happen\n");
1530 return -1;
1531 }
1532
1533 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
1534 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
1535 BD_UNMAP_LEN(first_bd), DMA_TO_DEVICE);
1536 txq->sw_tx_cons = (txq->sw_tx_cons + 1) % txq->num_tx_buffers;
1537 txq->sw_tx_ring.skbs[idx].skb = NULL;
1538
1539 return 0;
1540}
1541
1542static int qede_selftest_receive_traffic(struct qede_dev *edev)
1543{
1544 u16 sw_rx_index, len;
1545 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1546 struct qede_rx_queue *rxq = NULL;
1547 struct sw_rx_data *sw_rx_data;
1548 union eth_rx_cqe *cqe;
1549 int i, iter, rc = 0;
1550 u8 *data_ptr;
1551
1552 for_each_queue(i) {
1553 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) {
1554 rxq = edev->fp_array[i].rxq;
1555 break;
1556 }
1557 }
1558
1559 if (!rxq) {
1560 DP_NOTICE(edev, "Rx path is not available\n");
1561 return -1;
1562 }
1563
1564 /* The packet is expected to receive on rx-queue 0 even though RSS is
1565 * enabled. This is because the queue 0 is configured as the default
1566 * queue and that the loopback traffic is not IP.
1567 */
1568 for (iter = 0; iter < QEDE_SELFTEST_POLL_COUNT; iter++) {
1569 if (!qede_has_rx_work(rxq)) {
1570 usleep_range(100, 200);
1571 continue;
1572 }
1573
1574 /* Get the CQE from the completion ring */
1575 cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring);
1576
1577 /* Get the data from the SW ring */
1578 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1579 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1580 fp_cqe = &cqe->fast_path_regular;
1581 len = le16_to_cpu(fp_cqe->len_on_first_bd);
1582 data_ptr = (u8 *)(page_address(sw_rx_data->data) +
1583 fp_cqe->placement_offset +
1584 sw_rx_data->page_offset +
1585 rxq->rx_headroom);
1586 if (ether_addr_equal(data_ptr, edev->ndev->dev_addr) &&
1587 ether_addr_equal(data_ptr + ETH_ALEN,
1588 edev->ndev->dev_addr)) {
1589 for (i = ETH_HLEN; i < len; i++)
1590 if (data_ptr[i] != (unsigned char)(i & 0xff)) {
1591 rc = -1;
1592 break;
1593 }
1594
1595 qede_recycle_rx_bd_ring(rxq, 1);
1596 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1597 break;
1598 }
1599
1600 DP_INFO(edev, "Not the transmitted packet\n");
1601 qede_recycle_rx_bd_ring(rxq, 1);
1602 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1603 }
1604
1605 if (iter == QEDE_SELFTEST_POLL_COUNT) {
1606 DP_NOTICE(edev, "Failed to receive the traffic\n");
1607 return -1;
1608 }
1609
1610 qede_update_rx_prod(edev, rxq);
1611
1612 return rc;
1613}
1614
1615static int qede_selftest_run_loopback(struct qede_dev *edev, u32 loopback_mode)
1616{
1617 struct qed_link_params link_params;
1618 struct sk_buff *skb = NULL;
1619 int rc = 0, i;
1620 u32 pkt_size;
1621 u8 *packet;
1622
1623 if (!netif_running(edev->ndev)) {
1624 DP_NOTICE(edev, "Interface is down\n");
1625 return -EINVAL;
1626 }
1627
1628 qede_netif_stop(edev);
1629
1630 /* Bring up the link in Loopback mode */
1631 memset(&link_params, 0, sizeof(link_params));
1632 link_params.link_up = true;
1633 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE;
1634 link_params.loopback_mode = loopback_mode;
1635 edev->ops->common->set_link(edev->cdev, &link_params);
1636
1637 /* Wait for loopback configuration to apply */
1638 msleep_interruptible(500);
1639
1640 /* Setting max packet size to 1.5K to avoid data being split over
1641 * multiple BDs in cases where MTU > PAGE_SIZE.
1642 */
1643 pkt_size = (((edev->ndev->mtu < ETH_DATA_LEN) ?
1644 edev->ndev->mtu : ETH_DATA_LEN) + ETH_HLEN);
1645
1646 skb = netdev_alloc_skb(edev->ndev, pkt_size);
1647 if (!skb) {
1648 DP_INFO(edev, "Can't allocate skb\n");
1649 rc = -ENOMEM;
1650 goto test_loopback_exit;
1651 }
1652 packet = skb_put(skb, pkt_size);
1653 ether_addr_copy(packet, edev->ndev->dev_addr);
1654 ether_addr_copy(packet + ETH_ALEN, edev->ndev->dev_addr);
1655 memset(packet + (2 * ETH_ALEN), 0x77, (ETH_HLEN - (2 * ETH_ALEN)));
1656 for (i = ETH_HLEN; i < pkt_size; i++)
1657 packet[i] = (unsigned char)(i & 0xff);
1658
1659 rc = qede_selftest_transmit_traffic(edev, skb);
1660 if (rc)
1661 goto test_loopback_exit;
1662
1663 rc = qede_selftest_receive_traffic(edev);
1664 if (rc)
1665 goto test_loopback_exit;
1666
1667 DP_VERBOSE(edev, NETIF_MSG_RX_STATUS, "Loopback test successful\n");
1668
1669test_loopback_exit:
1670 dev_kfree_skb(skb);
1671
1672 /* Bring up the link in Normal mode */
1673 memset(&link_params, 0, sizeof(link_params));
1674 link_params.link_up = true;
1675 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE;
1676 link_params.loopback_mode = QED_LINK_LOOPBACK_NONE;
1677 edev->ops->common->set_link(edev->cdev, &link_params);
1678
1679 /* Wait for loopback configuration to apply */
1680 msleep_interruptible(500);
1681
1682 qede_netif_start(edev);
1683
1684 return rc;
1685}
1686
1687static void qede_self_test(struct net_device *dev,
1688 struct ethtool_test *etest, u64 *buf)
1689{
1690 struct qede_dev *edev = netdev_priv(dev);
1691
1692 DP_VERBOSE(edev, QED_MSG_DEBUG,
1693 "Self-test command parameters: offline = %d, external_lb = %d\n",
1694 (etest->flags & ETH_TEST_FL_OFFLINE),
1695 (etest->flags & ETH_TEST_FL_EXTERNAL_LB) >> 2);
1696
1697 memset(buf, 0, sizeof(u64) * QEDE_ETHTOOL_TEST_MAX);
1698
1699 if (etest->flags & ETH_TEST_FL_OFFLINE) {
1700 if (qede_selftest_run_loopback(edev,
1701 QED_LINK_LOOPBACK_INT_PHY)) {
1702 buf[QEDE_ETHTOOL_INT_LOOPBACK] = 1;
1703 etest->flags |= ETH_TEST_FL_FAILED;
1704 }
1705 }
1706
1707 if (edev->ops->common->selftest->selftest_interrupt(edev->cdev)) {
1708 buf[QEDE_ETHTOOL_INTERRUPT_TEST] = 1;
1709 etest->flags |= ETH_TEST_FL_FAILED;
1710 }
1711
1712 if (edev->ops->common->selftest->selftest_memory(edev->cdev)) {
1713 buf[QEDE_ETHTOOL_MEMORY_TEST] = 1;
1714 etest->flags |= ETH_TEST_FL_FAILED;
1715 }
1716
1717 if (edev->ops->common->selftest->selftest_register(edev->cdev)) {
1718 buf[QEDE_ETHTOOL_REGISTER_TEST] = 1;
1719 etest->flags |= ETH_TEST_FL_FAILED;
1720 }
1721
1722 if (edev->ops->common->selftest->selftest_clock(edev->cdev)) {
1723 buf[QEDE_ETHTOOL_CLOCK_TEST] = 1;
1724 etest->flags |= ETH_TEST_FL_FAILED;
1725 }
1726
1727 if (edev->ops->common->selftest->selftest_nvram(edev->cdev)) {
1728 buf[QEDE_ETHTOOL_NVRAM_TEST] = 1;
1729 etest->flags |= ETH_TEST_FL_FAILED;
1730 }
1731}
1732
1733static int qede_set_tunable(struct net_device *dev,
1734 const struct ethtool_tunable *tuna,
1735 const void *data)
1736{
1737 struct qede_dev *edev = netdev_priv(dev);
1738 u32 val;
1739
1740 switch (tuna->id) {
1741 case ETHTOOL_RX_COPYBREAK:
1742 val = *(u32 *)data;
1743 if (val < QEDE_MIN_PKT_LEN || val > QEDE_RX_HDR_SIZE) {
1744 DP_VERBOSE(edev, QED_MSG_DEBUG,
1745 "Invalid rx copy break value, range is [%u, %u]",
1746 QEDE_MIN_PKT_LEN, QEDE_RX_HDR_SIZE);
1747 return -EINVAL;
1748 }
1749
1750 edev->rx_copybreak = *(u32 *)data;
1751 break;
1752 default:
1753 return -EOPNOTSUPP;
1754 }
1755
1756 return 0;
1757}
1758
1759static int qede_get_tunable(struct net_device *dev,
1760 const struct ethtool_tunable *tuna, void *data)
1761{
1762 struct qede_dev *edev = netdev_priv(dev);
1763
1764 switch (tuna->id) {
1765 case ETHTOOL_RX_COPYBREAK:
1766 *(u32 *)data = edev->rx_copybreak;
1767 break;
1768 default:
1769 return -EOPNOTSUPP;
1770 }
1771
1772 return 0;
1773}
1774
1775static int qede_get_eee(struct net_device *dev, struct ethtool_keee *edata)
1776{
1777 struct qede_dev *edev = netdev_priv(dev);
1778 struct qed_link_output current_link;
1779
1780 memset(¤t_link, 0, sizeof(current_link));
1781 edev->ops->common->get_link(edev->cdev, ¤t_link);
1782
1783 if (!current_link.eee_supported) {
1784 DP_INFO(edev, "EEE is not supported\n");
1785 return -EOPNOTSUPP;
1786 }
1787
1788 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1789 edata->advertised,
1790 current_link.eee.adv_caps & QED_EEE_1G_ADV);
1791 linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
1792 edata->advertised,
1793 current_link.eee.adv_caps & QED_EEE_10G_ADV);
1794
1795 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1796 edata->supported,
1797 current_link.sup_caps & QED_EEE_1G_ADV);
1798 linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
1799 edata->supported,
1800 current_link.sup_caps & QED_EEE_10G_ADV);
1801
1802 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1803 edata->lp_advertised,
1804 current_link.eee.lp_adv_caps & QED_EEE_1G_ADV);
1805 linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
1806 edata->lp_advertised,
1807 current_link.eee.lp_adv_caps & QED_EEE_10G_ADV);
1808
1809 edata->tx_lpi_timer = current_link.eee.tx_lpi_timer;
1810 edata->eee_enabled = current_link.eee.enable;
1811 edata->tx_lpi_enabled = current_link.eee.tx_lpi_enable;
1812 edata->eee_active = current_link.eee_active;
1813
1814 return 0;
1815}
1816
1817static int qede_set_eee(struct net_device *dev, struct ethtool_keee *edata)
1818{
1819 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = {};
1820 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = {};
1821 struct qede_dev *edev = netdev_priv(dev);
1822 struct qed_link_output current_link;
1823 struct qed_link_params params;
1824 bool unsupp;
1825
1826 if (!edev->ops->common->can_link_change(edev->cdev)) {
1827 DP_INFO(edev, "Link settings are not allowed to be changed\n");
1828 return -EOPNOTSUPP;
1829 }
1830
1831 memset(¤t_link, 0, sizeof(current_link));
1832 edev->ops->common->get_link(edev->cdev, ¤t_link);
1833
1834 if (!current_link.eee_supported) {
1835 DP_INFO(edev, "EEE is not supported\n");
1836 return -EOPNOTSUPP;
1837 }
1838
1839 memset(¶ms, 0, sizeof(params));
1840 params.override_flags |= QED_LINK_OVERRIDE_EEE_CONFIG;
1841
1842 linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
1843 supported);
1844 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1845 supported);
1846
1847 unsupp = linkmode_andnot(tmp, edata->advertised, supported);
1848 if (unsupp) {
1849 DP_VERBOSE(edev, QED_MSG_DEBUG,
1850 "Invalid advertised capabilities %*pb\n",
1851 __ETHTOOL_LINK_MODE_MASK_NBITS, edata->advertised);
1852 return -EINVAL;
1853 }
1854
1855 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1856 edata->advertised))
1857 params.eee.adv_caps = QED_EEE_1G_ADV;
1858 if (linkmode_test_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
1859 edata->advertised))
1860 params.eee.adv_caps = QED_EEE_10G_ADV;
1861
1862 params.eee.enable = edata->eee_enabled;
1863 params.eee.tx_lpi_enable = edata->tx_lpi_enabled;
1864 params.eee.tx_lpi_timer = edata->tx_lpi_timer;
1865
1866 params.link_up = true;
1867 edev->ops->common->set_link(edev->cdev, ¶ms);
1868
1869 return 0;
1870}
1871
1872static u32 qede_link_to_ethtool_fec(u32 link_fec)
1873{
1874 u32 eth_fec = 0;
1875
1876 if (link_fec & QED_FEC_MODE_NONE)
1877 eth_fec |= ETHTOOL_FEC_OFF;
1878 if (link_fec & QED_FEC_MODE_FIRECODE)
1879 eth_fec |= ETHTOOL_FEC_BASER;
1880 if (link_fec & QED_FEC_MODE_RS)
1881 eth_fec |= ETHTOOL_FEC_RS;
1882 if (link_fec & QED_FEC_MODE_AUTO)
1883 eth_fec |= ETHTOOL_FEC_AUTO;
1884 if (link_fec & QED_FEC_MODE_UNSUPPORTED)
1885 eth_fec |= ETHTOOL_FEC_NONE;
1886
1887 return eth_fec;
1888}
1889
1890static u32 qede_ethtool_to_link_fec(u32 eth_fec)
1891{
1892 u32 link_fec = 0;
1893
1894 if (eth_fec & ETHTOOL_FEC_OFF)
1895 link_fec |= QED_FEC_MODE_NONE;
1896 if (eth_fec & ETHTOOL_FEC_BASER)
1897 link_fec |= QED_FEC_MODE_FIRECODE;
1898 if (eth_fec & ETHTOOL_FEC_RS)
1899 link_fec |= QED_FEC_MODE_RS;
1900 if (eth_fec & ETHTOOL_FEC_AUTO)
1901 link_fec |= QED_FEC_MODE_AUTO;
1902 if (eth_fec & ETHTOOL_FEC_NONE)
1903 link_fec |= QED_FEC_MODE_UNSUPPORTED;
1904
1905 return link_fec;
1906}
1907
1908static int qede_get_fecparam(struct net_device *dev,
1909 struct ethtool_fecparam *fecparam)
1910{
1911 struct qede_dev *edev = netdev_priv(dev);
1912 struct qed_link_output curr_link;
1913
1914 memset(&curr_link, 0, sizeof(curr_link));
1915 edev->ops->common->get_link(edev->cdev, &curr_link);
1916
1917 fecparam->active_fec = qede_link_to_ethtool_fec(curr_link.active_fec);
1918 fecparam->fec = qede_link_to_ethtool_fec(curr_link.sup_fec);
1919
1920 return 0;
1921}
1922
1923static int qede_set_fecparam(struct net_device *dev,
1924 struct ethtool_fecparam *fecparam)
1925{
1926 struct qede_dev *edev = netdev_priv(dev);
1927 struct qed_link_params params;
1928
1929 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
1930 DP_INFO(edev, "Link settings are not allowed to be changed\n");
1931 return -EOPNOTSUPP;
1932 }
1933
1934 memset(¶ms, 0, sizeof(params));
1935 params.override_flags |= QED_LINK_OVERRIDE_FEC_CONFIG;
1936 params.fec = qede_ethtool_to_link_fec(fecparam->fec);
1937 params.link_up = true;
1938
1939 edev->ops->common->set_link(edev->cdev, ¶ms);
1940
1941 return 0;
1942}
1943
1944static int qede_get_module_info(struct net_device *dev,
1945 struct ethtool_modinfo *modinfo)
1946{
1947 struct qede_dev *edev = netdev_priv(dev);
1948 u8 buf[4];
1949 int rc;
1950
1951 /* Read first 4 bytes to find the sfp type */
1952 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf,
1953 QED_I2C_DEV_ADDR_A0, 0, 4);
1954 if (rc) {
1955 DP_ERR(edev, "Failed reading EEPROM data %d\n", rc);
1956 return rc;
1957 }
1958
1959 switch (buf[0]) {
1960 case 0x3: /* SFP, SFP+, SFP-28 */
1961 modinfo->type = ETH_MODULE_SFF_8472;
1962 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1963 break;
1964 case 0xc: /* QSFP */
1965 case 0xd: /* QSFP+ */
1966 modinfo->type = ETH_MODULE_SFF_8436;
1967 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1968 break;
1969 case 0x11: /* QSFP-28 */
1970 modinfo->type = ETH_MODULE_SFF_8636;
1971 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1972 break;
1973 default:
1974 DP_ERR(edev, "Unknown transceiver type 0x%x\n", buf[0]);
1975 return -EINVAL;
1976 }
1977
1978 return 0;
1979}
1980
1981static int qede_get_module_eeprom(struct net_device *dev,
1982 struct ethtool_eeprom *ee, u8 *data)
1983{
1984 struct qede_dev *edev = netdev_priv(dev);
1985 u32 start_addr = ee->offset, size = 0;
1986 u8 *buf = data;
1987 int rc = 0;
1988
1989 /* Read A0 section */
1990 if (ee->offset < ETH_MODULE_SFF_8079_LEN) {
1991 /* Limit transfer size to the A0 section boundary */
1992 if (ee->offset + ee->len > ETH_MODULE_SFF_8079_LEN)
1993 size = ETH_MODULE_SFF_8079_LEN - ee->offset;
1994 else
1995 size = ee->len;
1996
1997 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf,
1998 QED_I2C_DEV_ADDR_A0,
1999 start_addr, size);
2000 if (rc) {
2001 DP_ERR(edev, "Failed reading A0 section %d\n", rc);
2002 return rc;
2003 }
2004
2005 buf += size;
2006 start_addr += size;
2007 }
2008
2009 /* Read A2 section */
2010 if (start_addr >= ETH_MODULE_SFF_8079_LEN &&
2011 start_addr < ETH_MODULE_SFF_8472_LEN) {
2012 size = ee->len - size;
2013 /* Limit transfer size to the A2 section boundary */
2014 if (start_addr + size > ETH_MODULE_SFF_8472_LEN)
2015 size = ETH_MODULE_SFF_8472_LEN - start_addr;
2016 start_addr -= ETH_MODULE_SFF_8079_LEN;
2017 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf,
2018 QED_I2C_DEV_ADDR_A2,
2019 start_addr, size);
2020 if (rc) {
2021 DP_VERBOSE(edev, QED_MSG_DEBUG,
2022 "Failed reading A2 section %d\n", rc);
2023 return 0;
2024 }
2025 }
2026
2027 return rc;
2028}
2029
2030static int qede_set_dump(struct net_device *dev, struct ethtool_dump *val)
2031{
2032 struct qede_dev *edev = netdev_priv(dev);
2033 int rc = 0;
2034
2035 if (edev->dump_info.cmd == QEDE_DUMP_CMD_NONE) {
2036 if (val->flag > QEDE_DUMP_CMD_MAX) {
2037 DP_ERR(edev, "Invalid command %d\n", val->flag);
2038 return -EINVAL;
2039 }
2040 edev->dump_info.cmd = val->flag;
2041 edev->dump_info.num_args = 0;
2042 return 0;
2043 }
2044
2045 if (edev->dump_info.num_args == QEDE_DUMP_MAX_ARGS) {
2046 DP_ERR(edev, "Arg count = %d\n", edev->dump_info.num_args);
2047 return -EINVAL;
2048 }
2049
2050 switch (edev->dump_info.cmd) {
2051 case QEDE_DUMP_CMD_NVM_CFG:
2052 edev->dump_info.args[edev->dump_info.num_args] = val->flag;
2053 edev->dump_info.num_args++;
2054 break;
2055 case QEDE_DUMP_CMD_GRCDUMP:
2056 rc = edev->ops->common->set_grc_config(edev->cdev,
2057 val->flag, 1);
2058 break;
2059 default:
2060 break;
2061 }
2062
2063 return rc;
2064}
2065
2066static int qede_get_dump_flag(struct net_device *dev,
2067 struct ethtool_dump *dump)
2068{
2069 struct qede_dev *edev = netdev_priv(dev);
2070
2071 if (!edev->ops || !edev->ops->common) {
2072 DP_ERR(edev, "Edev ops not populated\n");
2073 return -EINVAL;
2074 }
2075
2076 dump->version = QEDE_DUMP_VERSION;
2077 switch (edev->dump_info.cmd) {
2078 case QEDE_DUMP_CMD_NVM_CFG:
2079 dump->flag = QEDE_DUMP_CMD_NVM_CFG;
2080 dump->len = edev->ops->common->read_nvm_cfg_len(edev->cdev,
2081 edev->dump_info.args[0]);
2082 break;
2083 case QEDE_DUMP_CMD_GRCDUMP:
2084 dump->flag = QEDE_DUMP_CMD_GRCDUMP;
2085 dump->len = edev->ops->common->dbg_all_data_size(edev->cdev);
2086 break;
2087 default:
2088 DP_ERR(edev, "Invalid cmd = %d\n", edev->dump_info.cmd);
2089 return -EINVAL;
2090 }
2091
2092 DP_VERBOSE(edev, QED_MSG_DEBUG,
2093 "dump->version = 0x%x dump->flag = %d dump->len = %d\n",
2094 dump->version, dump->flag, dump->len);
2095 return 0;
2096}
2097
2098static int qede_get_dump_data(struct net_device *dev,
2099 struct ethtool_dump *dump, void *buf)
2100{
2101 struct qede_dev *edev = netdev_priv(dev);
2102 int rc = 0;
2103
2104 if (!edev->ops || !edev->ops->common) {
2105 DP_ERR(edev, "Edev ops not populated\n");
2106 rc = -EINVAL;
2107 goto err;
2108 }
2109
2110 switch (edev->dump_info.cmd) {
2111 case QEDE_DUMP_CMD_NVM_CFG:
2112 if (edev->dump_info.num_args != QEDE_DUMP_NVM_ARG_COUNT) {
2113 DP_ERR(edev, "Arg count = %d required = %d\n",
2114 edev->dump_info.num_args,
2115 QEDE_DUMP_NVM_ARG_COUNT);
2116 rc = -EINVAL;
2117 goto err;
2118 }
2119 rc = edev->ops->common->read_nvm_cfg(edev->cdev, (u8 **)&buf,
2120 edev->dump_info.args[0],
2121 edev->dump_info.args[1]);
2122 break;
2123 case QEDE_DUMP_CMD_GRCDUMP:
2124 memset(buf, 0, dump->len);
2125 rc = edev->ops->common->dbg_all_data(edev->cdev, buf);
2126 break;
2127 default:
2128 DP_ERR(edev, "Invalid cmd = %d\n", edev->dump_info.cmd);
2129 rc = -EINVAL;
2130 break;
2131 }
2132
2133err:
2134 edev->dump_info.cmd = QEDE_DUMP_CMD_NONE;
2135 edev->dump_info.num_args = 0;
2136 memset(edev->dump_info.args, 0, sizeof(edev->dump_info.args));
2137
2138 return rc;
2139}
2140
2141int qede_set_per_coalesce(struct net_device *dev, u32 queue,
2142 struct ethtool_coalesce *coal)
2143{
2144 struct qede_dev *edev = netdev_priv(dev);
2145 struct qede_fastpath *fp;
2146 u16 rxc, txc;
2147 int rc = 0;
2148
2149 if (coal->rx_coalesce_usecs > QED_COALESCE_MAX ||
2150 coal->tx_coalesce_usecs > QED_COALESCE_MAX) {
2151 DP_INFO(edev,
2152 "Can't support requested %s coalesce value [max supported value %d]\n",
2153 coal->rx_coalesce_usecs > QED_COALESCE_MAX ? "rx"
2154 : "tx",
2155 QED_COALESCE_MAX);
2156 return -EINVAL;
2157 }
2158
2159 rxc = (u16)coal->rx_coalesce_usecs;
2160 txc = (u16)coal->tx_coalesce_usecs;
2161
2162 __qede_lock(edev);
2163 if (queue >= edev->num_queues) {
2164 DP_INFO(edev, "Invalid queue\n");
2165 rc = -EINVAL;
2166 goto out;
2167 }
2168
2169 if (edev->state != QEDE_STATE_OPEN) {
2170 rc = -EINVAL;
2171 goto out;
2172 }
2173
2174 fp = &edev->fp_array[queue];
2175
2176 if (edev->fp_array[queue].type & QEDE_FASTPATH_RX) {
2177 rc = edev->ops->common->set_coalesce(edev->cdev,
2178 rxc, 0,
2179 fp->rxq->handle);
2180 if (rc) {
2181 DP_INFO(edev,
2182 "Set RX coalesce error, rc = %d\n", rc);
2183 goto out;
2184 }
2185 edev->coal_entry[queue].rxc = rxc;
2186 edev->coal_entry[queue].isvalid = true;
2187 }
2188
2189 if (edev->fp_array[queue].type & QEDE_FASTPATH_TX) {
2190 rc = edev->ops->common->set_coalesce(edev->cdev,
2191 0, txc,
2192 fp->txq->handle);
2193 if (rc) {
2194 DP_INFO(edev,
2195 "Set TX coalesce error, rc = %d\n", rc);
2196 goto out;
2197 }
2198 edev->coal_entry[queue].txc = txc;
2199 edev->coal_entry[queue].isvalid = true;
2200 }
2201out:
2202 __qede_unlock(edev);
2203
2204 return rc;
2205}
2206
2207static int qede_get_per_coalesce(struct net_device *dev,
2208 u32 queue,
2209 struct ethtool_coalesce *coal)
2210{
2211 void *rx_handle = NULL, *tx_handle = NULL;
2212 struct qede_dev *edev = netdev_priv(dev);
2213 struct qede_fastpath *fp;
2214 u16 rx_coal, tx_coal;
2215 int rc = 0;
2216
2217 rx_coal = QED_DEFAULT_RX_USECS;
2218 tx_coal = QED_DEFAULT_TX_USECS;
2219
2220 memset(coal, 0, sizeof(struct ethtool_coalesce));
2221
2222 __qede_lock(edev);
2223 if (queue >= edev->num_queues) {
2224 DP_INFO(edev, "Invalid queue\n");
2225 rc = -EINVAL;
2226 goto out;
2227 }
2228
2229 if (edev->state != QEDE_STATE_OPEN) {
2230 rc = -EINVAL;
2231 goto out;
2232 }
2233
2234 fp = &edev->fp_array[queue];
2235
2236 if (fp->type & QEDE_FASTPATH_RX)
2237 rx_handle = fp->rxq->handle;
2238
2239 rc = edev->ops->get_coalesce(edev->cdev, &rx_coal,
2240 rx_handle);
2241 if (rc) {
2242 DP_INFO(edev, "Read Rx coalesce error\n");
2243 goto out;
2244 }
2245
2246 fp = &edev->fp_array[queue];
2247 if (fp->type & QEDE_FASTPATH_TX)
2248 tx_handle = fp->txq->handle;
2249
2250 rc = edev->ops->get_coalesce(edev->cdev, &tx_coal,
2251 tx_handle);
2252 if (rc)
2253 DP_INFO(edev, "Read Tx coalesce error\n");
2254
2255out:
2256 __qede_unlock(edev);
2257
2258 coal->rx_coalesce_usecs = rx_coal;
2259 coal->tx_coalesce_usecs = tx_coal;
2260
2261 return rc;
2262}
2263
2264static const struct ethtool_ops qede_ethtool_ops = {
2265 .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
2266 ETHTOOL_COALESCE_STATS_BLOCK_USECS,
2267 .get_link_ksettings = qede_get_link_ksettings,
2268 .set_link_ksettings = qede_set_link_ksettings,
2269 .get_drvinfo = qede_get_drvinfo,
2270 .get_regs_len = qede_get_regs_len,
2271 .get_regs = qede_get_regs,
2272 .get_wol = qede_get_wol,
2273 .set_wol = qede_set_wol,
2274 .get_msglevel = qede_get_msglevel,
2275 .set_msglevel = qede_set_msglevel,
2276 .nway_reset = qede_nway_reset,
2277 .get_link = qede_get_link,
2278 .get_coalesce = qede_get_coalesce,
2279 .set_coalesce = qede_set_coalesce,
2280 .get_ringparam = qede_get_ringparam,
2281 .set_ringparam = qede_set_ringparam,
2282 .get_pauseparam = qede_get_pauseparam,
2283 .set_pauseparam = qede_set_pauseparam,
2284 .get_strings = qede_get_strings,
2285 .set_phys_id = qede_set_phys_id,
2286 .get_ethtool_stats = qede_get_ethtool_stats,
2287 .get_priv_flags = qede_get_priv_flags,
2288 .set_priv_flags = qede_set_priv_flags,
2289 .get_sset_count = qede_get_sset_count,
2290 .get_rxnfc = qede_get_rxnfc,
2291 .set_rxnfc = qede_set_rxnfc,
2292 .get_rxfh_indir_size = qede_get_rxfh_indir_size,
2293 .get_rxfh_key_size = qede_get_rxfh_key_size,
2294 .get_rxfh = qede_get_rxfh,
2295 .set_rxfh = qede_set_rxfh,
2296 .get_ts_info = qede_get_ts_info,
2297 .get_channels = qede_get_channels,
2298 .set_channels = qede_set_channels,
2299 .self_test = qede_self_test,
2300 .get_module_info = qede_get_module_info,
2301 .get_module_eeprom = qede_get_module_eeprom,
2302 .get_eee = qede_get_eee,
2303 .set_eee = qede_set_eee,
2304 .get_fecparam = qede_get_fecparam,
2305 .set_fecparam = qede_set_fecparam,
2306 .get_tunable = qede_get_tunable,
2307 .set_tunable = qede_set_tunable,
2308 .get_per_queue_coalesce = qede_get_per_coalesce,
2309 .set_per_queue_coalesce = qede_set_per_coalesce,
2310 .flash_device = qede_flash_device,
2311 .get_dump_flag = qede_get_dump_flag,
2312 .get_dump_data = qede_get_dump_data,
2313 .set_dump = qede_set_dump,
2314};
2315
2316static const struct ethtool_ops qede_vf_ethtool_ops = {
2317 .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
2318 ETHTOOL_COALESCE_STATS_BLOCK_USECS,
2319 .get_link_ksettings = qede_get_link_ksettings,
2320 .get_drvinfo = qede_get_drvinfo,
2321 .get_msglevel = qede_get_msglevel,
2322 .set_msglevel = qede_set_msglevel,
2323 .get_link = qede_get_link,
2324 .get_coalesce = qede_get_coalesce,
2325 .set_coalesce = qede_set_coalesce,
2326 .get_ringparam = qede_get_ringparam,
2327 .set_ringparam = qede_set_ringparam,
2328 .get_strings = qede_get_strings,
2329 .get_ethtool_stats = qede_get_ethtool_stats,
2330 .get_priv_flags = qede_get_priv_flags,
2331 .get_sset_count = qede_get_sset_count,
2332 .get_rxnfc = qede_get_rxnfc,
2333 .set_rxnfc = qede_set_rxnfc,
2334 .get_rxfh_indir_size = qede_get_rxfh_indir_size,
2335 .get_rxfh_key_size = qede_get_rxfh_key_size,
2336 .get_rxfh = qede_get_rxfh,
2337 .set_rxfh = qede_set_rxfh,
2338 .get_channels = qede_get_channels,
2339 .set_channels = qede_set_channels,
2340 .get_per_queue_coalesce = qede_get_per_coalesce,
2341 .set_per_queue_coalesce = qede_set_per_coalesce,
2342 .get_tunable = qede_get_tunable,
2343 .set_tunable = qede_set_tunable,
2344};
2345
2346void qede_set_ethtool_ops(struct net_device *dev)
2347{
2348 struct qede_dev *edev = netdev_priv(dev);
2349
2350 if (IS_VF(edev))
2351 dev->ethtool_ops = &qede_vf_ethtool_ops;
2352 else
2353 dev->ethtool_ops = &qede_ethtool_ops;
2354}
1/* QLogic qede NIC Driver
2 * Copyright (c) 2015-2017 QLogic Corporation
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32#include <linux/version.h>
33#include <linux/types.h>
34#include <linux/netdevice.h>
35#include <linux/etherdevice.h>
36#include <linux/ethtool.h>
37#include <linux/string.h>
38#include <linux/pci.h>
39#include <linux/capability.h>
40#include <linux/vmalloc.h>
41#include "qede.h"
42#include "qede_ptp.h"
43
44#define QEDE_RQSTAT_OFFSET(stat_name) \
45 (offsetof(struct qede_rx_queue, stat_name))
46#define QEDE_RQSTAT_STRING(stat_name) (#stat_name)
47#define QEDE_RQSTAT(stat_name) \
48 {QEDE_RQSTAT_OFFSET(stat_name), QEDE_RQSTAT_STRING(stat_name)}
49
50#define QEDE_SELFTEST_POLL_COUNT 100
51#define QEDE_DUMP_VERSION 0x1
52#define QEDE_DUMP_NVM_ARG_COUNT 2
53
54static const struct {
55 u64 offset;
56 char string[ETH_GSTRING_LEN];
57} qede_rqstats_arr[] = {
58 QEDE_RQSTAT(rcv_pkts),
59 QEDE_RQSTAT(rx_hw_errors),
60 QEDE_RQSTAT(rx_alloc_errors),
61 QEDE_RQSTAT(rx_ip_frags),
62 QEDE_RQSTAT(xdp_no_pass),
63};
64
65#define QEDE_NUM_RQSTATS ARRAY_SIZE(qede_rqstats_arr)
66#define QEDE_TQSTAT_OFFSET(stat_name) \
67 (offsetof(struct qede_tx_queue, stat_name))
68#define QEDE_TQSTAT_STRING(stat_name) (#stat_name)
69#define QEDE_TQSTAT(stat_name) \
70 {QEDE_TQSTAT_OFFSET(stat_name), QEDE_TQSTAT_STRING(stat_name)}
71#define QEDE_NUM_TQSTATS ARRAY_SIZE(qede_tqstats_arr)
72static const struct {
73 u64 offset;
74 char string[ETH_GSTRING_LEN];
75} qede_tqstats_arr[] = {
76 QEDE_TQSTAT(xmit_pkts),
77 QEDE_TQSTAT(stopped_cnt),
78 QEDE_TQSTAT(tx_mem_alloc_err),
79};
80
81#define QEDE_STAT_OFFSET(stat_name, type, base) \
82 (offsetof(type, stat_name) + (base))
83#define QEDE_STAT_STRING(stat_name) (#stat_name)
84#define _QEDE_STAT(stat_name, type, base, attr) \
85 {QEDE_STAT_OFFSET(stat_name, type, base), \
86 QEDE_STAT_STRING(stat_name), \
87 attr}
88#define QEDE_STAT(stat_name) \
89 _QEDE_STAT(stat_name, struct qede_stats_common, 0, 0x0)
90#define QEDE_PF_STAT(stat_name) \
91 _QEDE_STAT(stat_name, struct qede_stats_common, 0, \
92 BIT(QEDE_STAT_PF_ONLY))
93#define QEDE_PF_BB_STAT(stat_name) \
94 _QEDE_STAT(stat_name, struct qede_stats_bb, \
95 offsetof(struct qede_stats, bb), \
96 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_BB_ONLY))
97#define QEDE_PF_AH_STAT(stat_name) \
98 _QEDE_STAT(stat_name, struct qede_stats_ah, \
99 offsetof(struct qede_stats, ah), \
100 BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_AH_ONLY))
101static const struct {
102 u64 offset;
103 char string[ETH_GSTRING_LEN];
104 unsigned long attr;
105#define QEDE_STAT_PF_ONLY 0
106#define QEDE_STAT_BB_ONLY 1
107#define QEDE_STAT_AH_ONLY 2
108} qede_stats_arr[] = {
109 QEDE_STAT(rx_ucast_bytes),
110 QEDE_STAT(rx_mcast_bytes),
111 QEDE_STAT(rx_bcast_bytes),
112 QEDE_STAT(rx_ucast_pkts),
113 QEDE_STAT(rx_mcast_pkts),
114 QEDE_STAT(rx_bcast_pkts),
115
116 QEDE_STAT(tx_ucast_bytes),
117 QEDE_STAT(tx_mcast_bytes),
118 QEDE_STAT(tx_bcast_bytes),
119 QEDE_STAT(tx_ucast_pkts),
120 QEDE_STAT(tx_mcast_pkts),
121 QEDE_STAT(tx_bcast_pkts),
122
123 QEDE_PF_STAT(rx_64_byte_packets),
124 QEDE_PF_STAT(rx_65_to_127_byte_packets),
125 QEDE_PF_STAT(rx_128_to_255_byte_packets),
126 QEDE_PF_STAT(rx_256_to_511_byte_packets),
127 QEDE_PF_STAT(rx_512_to_1023_byte_packets),
128 QEDE_PF_STAT(rx_1024_to_1518_byte_packets),
129 QEDE_PF_BB_STAT(rx_1519_to_1522_byte_packets),
130 QEDE_PF_BB_STAT(rx_1519_to_2047_byte_packets),
131 QEDE_PF_BB_STAT(rx_2048_to_4095_byte_packets),
132 QEDE_PF_BB_STAT(rx_4096_to_9216_byte_packets),
133 QEDE_PF_BB_STAT(rx_9217_to_16383_byte_packets),
134 QEDE_PF_AH_STAT(rx_1519_to_max_byte_packets),
135 QEDE_PF_STAT(tx_64_byte_packets),
136 QEDE_PF_STAT(tx_65_to_127_byte_packets),
137 QEDE_PF_STAT(tx_128_to_255_byte_packets),
138 QEDE_PF_STAT(tx_256_to_511_byte_packets),
139 QEDE_PF_STAT(tx_512_to_1023_byte_packets),
140 QEDE_PF_STAT(tx_1024_to_1518_byte_packets),
141 QEDE_PF_BB_STAT(tx_1519_to_2047_byte_packets),
142 QEDE_PF_BB_STAT(tx_2048_to_4095_byte_packets),
143 QEDE_PF_BB_STAT(tx_4096_to_9216_byte_packets),
144 QEDE_PF_BB_STAT(tx_9217_to_16383_byte_packets),
145 QEDE_PF_AH_STAT(tx_1519_to_max_byte_packets),
146 QEDE_PF_STAT(rx_mac_crtl_frames),
147 QEDE_PF_STAT(tx_mac_ctrl_frames),
148 QEDE_PF_STAT(rx_pause_frames),
149 QEDE_PF_STAT(tx_pause_frames),
150 QEDE_PF_STAT(rx_pfc_frames),
151 QEDE_PF_STAT(tx_pfc_frames),
152
153 QEDE_PF_STAT(rx_crc_errors),
154 QEDE_PF_STAT(rx_align_errors),
155 QEDE_PF_STAT(rx_carrier_errors),
156 QEDE_PF_STAT(rx_oversize_packets),
157 QEDE_PF_STAT(rx_jabbers),
158 QEDE_PF_STAT(rx_undersize_packets),
159 QEDE_PF_STAT(rx_fragments),
160 QEDE_PF_BB_STAT(tx_lpi_entry_count),
161 QEDE_PF_BB_STAT(tx_total_collisions),
162 QEDE_PF_STAT(brb_truncates),
163 QEDE_PF_STAT(brb_discards),
164 QEDE_STAT(no_buff_discards),
165 QEDE_PF_STAT(mftag_filter_discards),
166 QEDE_PF_STAT(mac_filter_discards),
167 QEDE_PF_STAT(gft_filter_drop),
168 QEDE_STAT(tx_err_drop_pkts),
169 QEDE_STAT(ttl0_discard),
170 QEDE_STAT(packet_too_big_discard),
171
172 QEDE_STAT(coalesced_pkts),
173 QEDE_STAT(coalesced_events),
174 QEDE_STAT(coalesced_aborts_num),
175 QEDE_STAT(non_coalesced_pkts),
176 QEDE_STAT(coalesced_bytes),
177
178 QEDE_STAT(link_change_count),
179 QEDE_STAT(ptp_skip_txts),
180};
181
182#define QEDE_NUM_STATS ARRAY_SIZE(qede_stats_arr)
183#define QEDE_STAT_IS_PF_ONLY(i) \
184 test_bit(QEDE_STAT_PF_ONLY, &qede_stats_arr[i].attr)
185#define QEDE_STAT_IS_BB_ONLY(i) \
186 test_bit(QEDE_STAT_BB_ONLY, &qede_stats_arr[i].attr)
187#define QEDE_STAT_IS_AH_ONLY(i) \
188 test_bit(QEDE_STAT_AH_ONLY, &qede_stats_arr[i].attr)
189
190enum {
191 QEDE_PRI_FLAG_CMT,
192 QEDE_PRI_FLAG_SMART_AN_SUPPORT, /* MFW supports SmartAN */
193 QEDE_PRI_FLAG_LEN,
194};
195
196static const char qede_private_arr[QEDE_PRI_FLAG_LEN][ETH_GSTRING_LEN] = {
197 "Coupled-Function",
198 "SmartAN capable",
199};
200
201enum qede_ethtool_tests {
202 QEDE_ETHTOOL_INT_LOOPBACK,
203 QEDE_ETHTOOL_INTERRUPT_TEST,
204 QEDE_ETHTOOL_MEMORY_TEST,
205 QEDE_ETHTOOL_REGISTER_TEST,
206 QEDE_ETHTOOL_CLOCK_TEST,
207 QEDE_ETHTOOL_NVRAM_TEST,
208 QEDE_ETHTOOL_TEST_MAX
209};
210
211static const char qede_tests_str_arr[QEDE_ETHTOOL_TEST_MAX][ETH_GSTRING_LEN] = {
212 "Internal loopback (offline)",
213 "Interrupt (online)\t",
214 "Memory (online)\t\t",
215 "Register (online)\t",
216 "Clock (online)\t\t",
217 "Nvram (online)\t\t",
218};
219
220static void qede_get_strings_stats_txq(struct qede_dev *edev,
221 struct qede_tx_queue *txq, u8 **buf)
222{
223 int i;
224
225 for (i = 0; i < QEDE_NUM_TQSTATS; i++) {
226 if (txq->is_xdp)
227 sprintf(*buf, "%d [XDP]: %s",
228 QEDE_TXQ_XDP_TO_IDX(edev, txq),
229 qede_tqstats_arr[i].string);
230 else
231 sprintf(*buf, "%d_%d: %s", txq->index, txq->cos,
232 qede_tqstats_arr[i].string);
233 *buf += ETH_GSTRING_LEN;
234 }
235}
236
237static void qede_get_strings_stats_rxq(struct qede_dev *edev,
238 struct qede_rx_queue *rxq, u8 **buf)
239{
240 int i;
241
242 for (i = 0; i < QEDE_NUM_RQSTATS; i++) {
243 sprintf(*buf, "%d: %s", rxq->rxq_id,
244 qede_rqstats_arr[i].string);
245 *buf += ETH_GSTRING_LEN;
246 }
247}
248
249static bool qede_is_irrelevant_stat(struct qede_dev *edev, int stat_index)
250{
251 return (IS_VF(edev) && QEDE_STAT_IS_PF_ONLY(stat_index)) ||
252 (QEDE_IS_BB(edev) && QEDE_STAT_IS_AH_ONLY(stat_index)) ||
253 (QEDE_IS_AH(edev) && QEDE_STAT_IS_BB_ONLY(stat_index));
254}
255
256static void qede_get_strings_stats(struct qede_dev *edev, u8 *buf)
257{
258 struct qede_fastpath *fp;
259 int i;
260
261 /* Account for queue statistics */
262 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
263 fp = &edev->fp_array[i];
264
265 if (fp->type & QEDE_FASTPATH_RX)
266 qede_get_strings_stats_rxq(edev, fp->rxq, &buf);
267
268 if (fp->type & QEDE_FASTPATH_XDP)
269 qede_get_strings_stats_txq(edev, fp->xdp_tx, &buf);
270
271 if (fp->type & QEDE_FASTPATH_TX) {
272 int cos;
273
274 for_each_cos_in_txq(edev, cos)
275 qede_get_strings_stats_txq(edev,
276 &fp->txq[cos], &buf);
277 }
278 }
279
280 /* Account for non-queue statistics */
281 for (i = 0; i < QEDE_NUM_STATS; i++) {
282 if (qede_is_irrelevant_stat(edev, i))
283 continue;
284 strcpy(buf, qede_stats_arr[i].string);
285 buf += ETH_GSTRING_LEN;
286 }
287}
288
289static void qede_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
290{
291 struct qede_dev *edev = netdev_priv(dev);
292
293 switch (stringset) {
294 case ETH_SS_STATS:
295 qede_get_strings_stats(edev, buf);
296 break;
297 case ETH_SS_PRIV_FLAGS:
298 memcpy(buf, qede_private_arr,
299 ETH_GSTRING_LEN * QEDE_PRI_FLAG_LEN);
300 break;
301 case ETH_SS_TEST:
302 memcpy(buf, qede_tests_str_arr,
303 ETH_GSTRING_LEN * QEDE_ETHTOOL_TEST_MAX);
304 break;
305 default:
306 DP_VERBOSE(edev, QED_MSG_DEBUG,
307 "Unsupported stringset 0x%08x\n", stringset);
308 }
309}
310
311static void qede_get_ethtool_stats_txq(struct qede_tx_queue *txq, u64 **buf)
312{
313 int i;
314
315 for (i = 0; i < QEDE_NUM_TQSTATS; i++) {
316 **buf = *((u64 *)(((void *)txq) + qede_tqstats_arr[i].offset));
317 (*buf)++;
318 }
319}
320
321static void qede_get_ethtool_stats_rxq(struct qede_rx_queue *rxq, u64 **buf)
322{
323 int i;
324
325 for (i = 0; i < QEDE_NUM_RQSTATS; i++) {
326 **buf = *((u64 *)(((void *)rxq) + qede_rqstats_arr[i].offset));
327 (*buf)++;
328 }
329}
330
331static void qede_get_ethtool_stats(struct net_device *dev,
332 struct ethtool_stats *stats, u64 *buf)
333{
334 struct qede_dev *edev = netdev_priv(dev);
335 struct qede_fastpath *fp;
336 int i;
337
338 qede_fill_by_demand_stats(edev);
339
340 /* Need to protect the access to the fastpath array */
341 __qede_lock(edev);
342
343 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
344 fp = &edev->fp_array[i];
345
346 if (fp->type & QEDE_FASTPATH_RX)
347 qede_get_ethtool_stats_rxq(fp->rxq, &buf);
348
349 if (fp->type & QEDE_FASTPATH_XDP)
350 qede_get_ethtool_stats_txq(fp->xdp_tx, &buf);
351
352 if (fp->type & QEDE_FASTPATH_TX) {
353 int cos;
354
355 for_each_cos_in_txq(edev, cos)
356 qede_get_ethtool_stats_txq(&fp->txq[cos], &buf);
357 }
358 }
359
360 for (i = 0; i < QEDE_NUM_STATS; i++) {
361 if (qede_is_irrelevant_stat(edev, i))
362 continue;
363 *buf = *((u64 *)(((void *)&edev->stats) +
364 qede_stats_arr[i].offset));
365
366 buf++;
367 }
368
369 __qede_unlock(edev);
370}
371
372static int qede_get_sset_count(struct net_device *dev, int stringset)
373{
374 struct qede_dev *edev = netdev_priv(dev);
375 int num_stats = QEDE_NUM_STATS, i;
376
377 switch (stringset) {
378 case ETH_SS_STATS:
379 for (i = 0; i < QEDE_NUM_STATS; i++)
380 if (qede_is_irrelevant_stat(edev, i))
381 num_stats--;
382
383 /* Account for the Regular Tx statistics */
384 num_stats += QEDE_TSS_COUNT(edev) * QEDE_NUM_TQSTATS *
385 edev->dev_info.num_tc;
386
387 /* Account for the Regular Rx statistics */
388 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_RQSTATS;
389
390 /* Account for XDP statistics [if needed] */
391 if (edev->xdp_prog)
392 num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_TQSTATS;
393 return num_stats;
394
395 case ETH_SS_PRIV_FLAGS:
396 return QEDE_PRI_FLAG_LEN;
397 case ETH_SS_TEST:
398 if (!IS_VF(edev))
399 return QEDE_ETHTOOL_TEST_MAX;
400 else
401 return 0;
402 default:
403 DP_VERBOSE(edev, QED_MSG_DEBUG,
404 "Unsupported stringset 0x%08x\n", stringset);
405 return -EINVAL;
406 }
407}
408
409static u32 qede_get_priv_flags(struct net_device *dev)
410{
411 struct qede_dev *edev = netdev_priv(dev);
412 u32 flags = 0;
413
414 if (edev->dev_info.common.num_hwfns > 1)
415 flags |= BIT(QEDE_PRI_FLAG_CMT);
416
417 if (edev->dev_info.common.smart_an)
418 flags |= BIT(QEDE_PRI_FLAG_SMART_AN_SUPPORT);
419
420 return flags;
421}
422
423struct qede_link_mode_mapping {
424 u32 qed_link_mode;
425 u32 ethtool_link_mode;
426};
427
428static const struct qede_link_mode_mapping qed_lm_map[] = {
429 {QED_LM_FIBRE_BIT, ETHTOOL_LINK_MODE_FIBRE_BIT},
430 {QED_LM_Autoneg_BIT, ETHTOOL_LINK_MODE_Autoneg_BIT},
431 {QED_LM_Asym_Pause_BIT, ETHTOOL_LINK_MODE_Asym_Pause_BIT},
432 {QED_LM_Pause_BIT, ETHTOOL_LINK_MODE_Pause_BIT},
433 {QED_LM_1000baseT_Full_BIT, ETHTOOL_LINK_MODE_1000baseT_Full_BIT},
434 {QED_LM_10000baseT_Full_BIT, ETHTOOL_LINK_MODE_10000baseT_Full_BIT},
435 {QED_LM_TP_BIT, ETHTOOL_LINK_MODE_TP_BIT},
436 {QED_LM_Backplane_BIT, ETHTOOL_LINK_MODE_Backplane_BIT},
437 {QED_LM_1000baseKX_Full_BIT, ETHTOOL_LINK_MODE_1000baseKX_Full_BIT},
438 {QED_LM_10000baseKX4_Full_BIT, ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT},
439 {QED_LM_10000baseKR_Full_BIT, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT},
440 {QED_LM_10000baseKR_Full_BIT, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT},
441 {QED_LM_10000baseR_FEC_BIT, ETHTOOL_LINK_MODE_10000baseR_FEC_BIT},
442 {QED_LM_20000baseKR2_Full_BIT, ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT},
443 {QED_LM_40000baseKR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT},
444 {QED_LM_40000baseCR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT},
445 {QED_LM_40000baseSR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT},
446 {QED_LM_40000baseLR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT},
447 {QED_LM_25000baseCR_Full_BIT, ETHTOOL_LINK_MODE_25000baseCR_Full_BIT},
448 {QED_LM_25000baseKR_Full_BIT, ETHTOOL_LINK_MODE_25000baseKR_Full_BIT},
449 {QED_LM_25000baseSR_Full_BIT, ETHTOOL_LINK_MODE_25000baseSR_Full_BIT},
450 {QED_LM_50000baseCR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT},
451 {QED_LM_50000baseKR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT},
452 {QED_LM_100000baseKR4_Full_BIT,
453 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT},
454 {QED_LM_100000baseSR4_Full_BIT,
455 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT},
456 {QED_LM_100000baseCR4_Full_BIT,
457 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT},
458 {QED_LM_100000baseLR4_ER4_Full_BIT,
459 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT},
460 {QED_LM_50000baseSR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT},
461 {QED_LM_1000baseX_Full_BIT, ETHTOOL_LINK_MODE_1000baseX_Full_BIT},
462 {QED_LM_10000baseCR_Full_BIT, ETHTOOL_LINK_MODE_10000baseCR_Full_BIT},
463 {QED_LM_10000baseSR_Full_BIT, ETHTOOL_LINK_MODE_10000baseSR_Full_BIT},
464 {QED_LM_10000baseLR_Full_BIT, ETHTOOL_LINK_MODE_10000baseLR_Full_BIT},
465 {QED_LM_10000baseLRM_Full_BIT, ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT},
466};
467
468#define QEDE_DRV_TO_ETHTOOL_CAPS(caps, lk_ksettings, name) \
469{ \
470 int i; \
471 \
472 for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) { \
473 if ((caps) & (qed_lm_map[i].qed_link_mode)) \
474 __set_bit(qed_lm_map[i].ethtool_link_mode,\
475 lk_ksettings->link_modes.name); \
476 } \
477}
478
479#define QEDE_ETHTOOL_TO_DRV_CAPS(caps, lk_ksettings, name) \
480{ \
481 int i; \
482 \
483 for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) { \
484 if (test_bit(qed_lm_map[i].ethtool_link_mode, \
485 lk_ksettings->link_modes.name)) \
486 caps |= qed_lm_map[i].qed_link_mode; \
487 } \
488}
489
490static int qede_get_link_ksettings(struct net_device *dev,
491 struct ethtool_link_ksettings *cmd)
492{
493 struct ethtool_link_settings *base = &cmd->base;
494 struct qede_dev *edev = netdev_priv(dev);
495 struct qed_link_output current_link;
496
497 __qede_lock(edev);
498
499 memset(¤t_link, 0, sizeof(current_link));
500 edev->ops->common->get_link(edev->cdev, ¤t_link);
501
502 ethtool_link_ksettings_zero_link_mode(cmd, supported);
503 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.supported_caps, cmd, supported)
504
505 ethtool_link_ksettings_zero_link_mode(cmd, advertising);
506 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.advertised_caps, cmd, advertising)
507
508 ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
509 QEDE_DRV_TO_ETHTOOL_CAPS(current_link.lp_caps, cmd, lp_advertising)
510
511 if ((edev->state == QEDE_STATE_OPEN) && (current_link.link_up)) {
512 base->speed = current_link.speed;
513 base->duplex = current_link.duplex;
514 } else {
515 base->speed = SPEED_UNKNOWN;
516 base->duplex = DUPLEX_UNKNOWN;
517 }
518
519 __qede_unlock(edev);
520
521 base->port = current_link.port;
522 base->autoneg = (current_link.autoneg) ? AUTONEG_ENABLE :
523 AUTONEG_DISABLE;
524
525 return 0;
526}
527
528static int qede_set_link_ksettings(struct net_device *dev,
529 const struct ethtool_link_ksettings *cmd)
530{
531 const struct ethtool_link_settings *base = &cmd->base;
532 struct qede_dev *edev = netdev_priv(dev);
533 struct qed_link_output current_link;
534 struct qed_link_params params;
535 u32 sup_caps;
536
537 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
538 DP_INFO(edev, "Link settings are not allowed to be changed\n");
539 return -EOPNOTSUPP;
540 }
541 memset(¤t_link, 0, sizeof(current_link));
542 memset(¶ms, 0, sizeof(params));
543 edev->ops->common->get_link(edev->cdev, ¤t_link);
544
545 params.override_flags |= QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS;
546 params.override_flags |= QED_LINK_OVERRIDE_SPEED_AUTONEG;
547 if (base->autoneg == AUTONEG_ENABLE) {
548 if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) {
549 DP_INFO(edev, "Auto negotiation is not supported\n");
550 return -EOPNOTSUPP;
551 }
552
553 params.autoneg = true;
554 params.forced_speed = 0;
555 QEDE_ETHTOOL_TO_DRV_CAPS(params.adv_speeds, cmd, advertising)
556 } else { /* forced speed */
557 params.override_flags |= QED_LINK_OVERRIDE_SPEED_FORCED_SPEED;
558 params.autoneg = false;
559 params.forced_speed = base->speed;
560 switch (base->speed) {
561 case SPEED_1000:
562 sup_caps = QED_LM_1000baseT_Full_BIT |
563 QED_LM_1000baseKX_Full_BIT |
564 QED_LM_1000baseX_Full_BIT;
565 if (!(current_link.supported_caps & sup_caps)) {
566 DP_INFO(edev, "1G speed not supported\n");
567 return -EINVAL;
568 }
569 params.adv_speeds = current_link.supported_caps &
570 sup_caps;
571 break;
572 case SPEED_10000:
573 sup_caps = QED_LM_10000baseT_Full_BIT |
574 QED_LM_10000baseKR_Full_BIT |
575 QED_LM_10000baseKX4_Full_BIT |
576 QED_LM_10000baseR_FEC_BIT |
577 QED_LM_10000baseCR_Full_BIT |
578 QED_LM_10000baseSR_Full_BIT |
579 QED_LM_10000baseLR_Full_BIT |
580 QED_LM_10000baseLRM_Full_BIT;
581 if (!(current_link.supported_caps & sup_caps)) {
582 DP_INFO(edev, "10G speed not supported\n");
583 return -EINVAL;
584 }
585 params.adv_speeds = current_link.supported_caps &
586 sup_caps;
587 break;
588 case SPEED_20000:
589 if (!(current_link.supported_caps &
590 QED_LM_20000baseKR2_Full_BIT)) {
591 DP_INFO(edev, "20G speed not supported\n");
592 return -EINVAL;
593 }
594 params.adv_speeds = QED_LM_20000baseKR2_Full_BIT;
595 break;
596 case SPEED_25000:
597 sup_caps = QED_LM_25000baseKR_Full_BIT |
598 QED_LM_25000baseCR_Full_BIT |
599 QED_LM_25000baseSR_Full_BIT;
600 if (!(current_link.supported_caps & sup_caps)) {
601 DP_INFO(edev, "25G speed not supported\n");
602 return -EINVAL;
603 }
604 params.adv_speeds = current_link.supported_caps &
605 sup_caps;
606 break;
607 case SPEED_40000:
608 sup_caps = QED_LM_40000baseLR4_Full_BIT |
609 QED_LM_40000baseKR4_Full_BIT |
610 QED_LM_40000baseCR4_Full_BIT |
611 QED_LM_40000baseSR4_Full_BIT;
612 if (!(current_link.supported_caps & sup_caps)) {
613 DP_INFO(edev, "40G speed not supported\n");
614 return -EINVAL;
615 }
616 params.adv_speeds = current_link.supported_caps &
617 sup_caps;
618 break;
619 case SPEED_50000:
620 sup_caps = QED_LM_50000baseKR2_Full_BIT |
621 QED_LM_50000baseCR2_Full_BIT |
622 QED_LM_50000baseSR2_Full_BIT;
623 if (!(current_link.supported_caps & sup_caps)) {
624 DP_INFO(edev, "50G speed not supported\n");
625 return -EINVAL;
626 }
627 params.adv_speeds = current_link.supported_caps &
628 sup_caps;
629 break;
630 case SPEED_100000:
631 sup_caps = QED_LM_100000baseKR4_Full_BIT |
632 QED_LM_100000baseSR4_Full_BIT |
633 QED_LM_100000baseCR4_Full_BIT |
634 QED_LM_100000baseLR4_ER4_Full_BIT;
635 if (!(current_link.supported_caps & sup_caps)) {
636 DP_INFO(edev, "100G speed not supported\n");
637 return -EINVAL;
638 }
639 params.adv_speeds = current_link.supported_caps &
640 sup_caps;
641 break;
642 default:
643 DP_INFO(edev, "Unsupported speed %u\n", base->speed);
644 return -EINVAL;
645 }
646 }
647
648 params.link_up = true;
649 edev->ops->common->set_link(edev->cdev, ¶ms);
650
651 return 0;
652}
653
654static void qede_get_drvinfo(struct net_device *ndev,
655 struct ethtool_drvinfo *info)
656{
657 char mfw[ETHTOOL_FWVERS_LEN], storm[ETHTOOL_FWVERS_LEN];
658 struct qede_dev *edev = netdev_priv(ndev);
659 char mbi[ETHTOOL_FWVERS_LEN];
660
661 strlcpy(info->driver, "qede", sizeof(info->driver));
662
663 snprintf(storm, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d",
664 edev->dev_info.common.fw_major,
665 edev->dev_info.common.fw_minor,
666 edev->dev_info.common.fw_rev,
667 edev->dev_info.common.fw_eng);
668
669 snprintf(mfw, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d",
670 (edev->dev_info.common.mfw_rev >> 24) & 0xFF,
671 (edev->dev_info.common.mfw_rev >> 16) & 0xFF,
672 (edev->dev_info.common.mfw_rev >> 8) & 0xFF,
673 edev->dev_info.common.mfw_rev & 0xFF);
674
675 if ((strlen(storm) + strlen(DRV_MODULE_VERSION) + strlen("[storm] ")) <
676 sizeof(info->version))
677 snprintf(info->version, sizeof(info->version),
678 "%s [storm %s]", DRV_MODULE_VERSION, storm);
679 else
680 snprintf(info->version, sizeof(info->version),
681 "%s %s", DRV_MODULE_VERSION, storm);
682
683 if (edev->dev_info.common.mbi_version) {
684 snprintf(mbi, ETHTOOL_FWVERS_LEN, "%d.%d.%d",
685 (edev->dev_info.common.mbi_version &
686 QED_MBI_VERSION_2_MASK) >> QED_MBI_VERSION_2_OFFSET,
687 (edev->dev_info.common.mbi_version &
688 QED_MBI_VERSION_1_MASK) >> QED_MBI_VERSION_1_OFFSET,
689 (edev->dev_info.common.mbi_version &
690 QED_MBI_VERSION_0_MASK) >> QED_MBI_VERSION_0_OFFSET);
691 snprintf(info->fw_version, sizeof(info->fw_version),
692 "mbi %s [mfw %s]", mbi, mfw);
693 } else {
694 snprintf(info->fw_version, sizeof(info->fw_version),
695 "mfw %s", mfw);
696 }
697
698 strlcpy(info->bus_info, pci_name(edev->pdev), sizeof(info->bus_info));
699}
700
701static void qede_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
702{
703 struct qede_dev *edev = netdev_priv(ndev);
704
705 if (edev->dev_info.common.wol_support) {
706 wol->supported = WAKE_MAGIC;
707 wol->wolopts = edev->wol_enabled ? WAKE_MAGIC : 0;
708 }
709}
710
711static int qede_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
712{
713 struct qede_dev *edev = netdev_priv(ndev);
714 bool wol_requested;
715 int rc;
716
717 if (wol->wolopts & ~WAKE_MAGIC) {
718 DP_INFO(edev,
719 "Can't support WoL options other than magic-packet\n");
720 return -EINVAL;
721 }
722
723 wol_requested = !!(wol->wolopts & WAKE_MAGIC);
724 if (wol_requested == edev->wol_enabled)
725 return 0;
726
727 /* Need to actually change configuration */
728 if (!edev->dev_info.common.wol_support) {
729 DP_INFO(edev, "Device doesn't support WoL\n");
730 return -EINVAL;
731 }
732
733 rc = edev->ops->common->update_wol(edev->cdev, wol_requested);
734 if (!rc)
735 edev->wol_enabled = wol_requested;
736
737 return rc;
738}
739
740static u32 qede_get_msglevel(struct net_device *ndev)
741{
742 struct qede_dev *edev = netdev_priv(ndev);
743
744 return ((u32)edev->dp_level << QED_LOG_LEVEL_SHIFT) | edev->dp_module;
745}
746
747static void qede_set_msglevel(struct net_device *ndev, u32 level)
748{
749 struct qede_dev *edev = netdev_priv(ndev);
750 u32 dp_module = 0;
751 u8 dp_level = 0;
752
753 qede_config_debug(level, &dp_module, &dp_level);
754
755 edev->dp_level = dp_level;
756 edev->dp_module = dp_module;
757 edev->ops->common->update_msglvl(edev->cdev,
758 dp_module, dp_level);
759}
760
761static int qede_nway_reset(struct net_device *dev)
762{
763 struct qede_dev *edev = netdev_priv(dev);
764 struct qed_link_output current_link;
765 struct qed_link_params link_params;
766
767 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
768 DP_INFO(edev, "Link settings are not allowed to be changed\n");
769 return -EOPNOTSUPP;
770 }
771
772 if (!netif_running(dev))
773 return 0;
774
775 memset(¤t_link, 0, sizeof(current_link));
776 edev->ops->common->get_link(edev->cdev, ¤t_link);
777 if (!current_link.link_up)
778 return 0;
779
780 /* Toggle the link */
781 memset(&link_params, 0, sizeof(link_params));
782 link_params.link_up = false;
783 edev->ops->common->set_link(edev->cdev, &link_params);
784 link_params.link_up = true;
785 edev->ops->common->set_link(edev->cdev, &link_params);
786
787 return 0;
788}
789
790static u32 qede_get_link(struct net_device *dev)
791{
792 struct qede_dev *edev = netdev_priv(dev);
793 struct qed_link_output current_link;
794
795 memset(¤t_link, 0, sizeof(current_link));
796 edev->ops->common->get_link(edev->cdev, ¤t_link);
797
798 return current_link.link_up;
799}
800
801static int qede_flash_device(struct net_device *dev,
802 struct ethtool_flash *flash)
803{
804 struct qede_dev *edev = netdev_priv(dev);
805
806 return edev->ops->common->nvm_flash(edev->cdev, flash->data);
807}
808
809static int qede_get_coalesce(struct net_device *dev,
810 struct ethtool_coalesce *coal)
811{
812 void *rx_handle = NULL, *tx_handle = NULL;
813 struct qede_dev *edev = netdev_priv(dev);
814 u16 rx_coal, tx_coal, i, rc = 0;
815 struct qede_fastpath *fp;
816
817 rx_coal = QED_DEFAULT_RX_USECS;
818 tx_coal = QED_DEFAULT_TX_USECS;
819
820 memset(coal, 0, sizeof(struct ethtool_coalesce));
821
822 __qede_lock(edev);
823 if (edev->state == QEDE_STATE_OPEN) {
824 for_each_queue(i) {
825 fp = &edev->fp_array[i];
826
827 if (fp->type & QEDE_FASTPATH_RX) {
828 rx_handle = fp->rxq->handle;
829 break;
830 }
831 }
832
833 rc = edev->ops->get_coalesce(edev->cdev, &rx_coal, rx_handle);
834 if (rc) {
835 DP_INFO(edev, "Read Rx coalesce error\n");
836 goto out;
837 }
838
839 for_each_queue(i) {
840 struct qede_tx_queue *txq;
841
842 fp = &edev->fp_array[i];
843
844 /* All TX queues of given fastpath uses same
845 * coalescing value, so no need to iterate over
846 * all TCs, TC0 txq should suffice.
847 */
848 if (fp->type & QEDE_FASTPATH_TX) {
849 txq = QEDE_FP_TC0_TXQ(fp);
850 tx_handle = txq->handle;
851 break;
852 }
853 }
854
855 rc = edev->ops->get_coalesce(edev->cdev, &tx_coal, tx_handle);
856 if (rc)
857 DP_INFO(edev, "Read Tx coalesce error\n");
858 }
859
860out:
861 __qede_unlock(edev);
862
863 coal->rx_coalesce_usecs = rx_coal;
864 coal->tx_coalesce_usecs = tx_coal;
865
866 return rc;
867}
868
869static int qede_set_coalesce(struct net_device *dev,
870 struct ethtool_coalesce *coal)
871{
872 struct qede_dev *edev = netdev_priv(dev);
873 struct qede_fastpath *fp;
874 int i, rc = 0;
875 u16 rxc, txc;
876
877 if (!netif_running(dev)) {
878 DP_INFO(edev, "Interface is down\n");
879 return -EINVAL;
880 }
881
882 if (coal->rx_coalesce_usecs > QED_COALESCE_MAX ||
883 coal->tx_coalesce_usecs > QED_COALESCE_MAX) {
884 DP_INFO(edev,
885 "Can't support requested %s coalesce value [max supported value %d]\n",
886 coal->rx_coalesce_usecs > QED_COALESCE_MAX ? "rx" :
887 "tx", QED_COALESCE_MAX);
888 return -EINVAL;
889 }
890
891 rxc = (u16)coal->rx_coalesce_usecs;
892 txc = (u16)coal->tx_coalesce_usecs;
893 for_each_queue(i) {
894 fp = &edev->fp_array[i];
895
896 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) {
897 rc = edev->ops->common->set_coalesce(edev->cdev,
898 rxc, 0,
899 fp->rxq->handle);
900 if (rc) {
901 DP_INFO(edev,
902 "Set RX coalesce error, rc = %d\n", rc);
903 return rc;
904 }
905 }
906
907 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
908 struct qede_tx_queue *txq;
909
910 /* All TX queues of given fastpath uses same
911 * coalescing value, so no need to iterate over
912 * all TCs, TC0 txq should suffice.
913 */
914 txq = QEDE_FP_TC0_TXQ(fp);
915
916 rc = edev->ops->common->set_coalesce(edev->cdev,
917 0, txc,
918 txq->handle);
919 if (rc) {
920 DP_INFO(edev,
921 "Set TX coalesce error, rc = %d\n", rc);
922 return rc;
923 }
924 }
925 }
926
927 return rc;
928}
929
930static void qede_get_ringparam(struct net_device *dev,
931 struct ethtool_ringparam *ering)
932{
933 struct qede_dev *edev = netdev_priv(dev);
934
935 ering->rx_max_pending = NUM_RX_BDS_MAX;
936 ering->rx_pending = edev->q_num_rx_buffers;
937 ering->tx_max_pending = NUM_TX_BDS_MAX;
938 ering->tx_pending = edev->q_num_tx_buffers;
939}
940
941static int qede_set_ringparam(struct net_device *dev,
942 struct ethtool_ringparam *ering)
943{
944 struct qede_dev *edev = netdev_priv(dev);
945
946 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
947 "Set ring params command parameters: rx_pending = %d, tx_pending = %d\n",
948 ering->rx_pending, ering->tx_pending);
949
950 /* Validate legality of configuration */
951 if (ering->rx_pending > NUM_RX_BDS_MAX ||
952 ering->rx_pending < NUM_RX_BDS_MIN ||
953 ering->tx_pending > NUM_TX_BDS_MAX ||
954 ering->tx_pending < NUM_TX_BDS_MIN) {
955 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
956 "Can only support Rx Buffer size [0%08x,...,0x%08x] and Tx Buffer size [0x%08x,...,0x%08x]\n",
957 NUM_RX_BDS_MIN, NUM_RX_BDS_MAX,
958 NUM_TX_BDS_MIN, NUM_TX_BDS_MAX);
959 return -EINVAL;
960 }
961
962 /* Change ring size and re-load */
963 edev->q_num_rx_buffers = ering->rx_pending;
964 edev->q_num_tx_buffers = ering->tx_pending;
965
966 qede_reload(edev, NULL, false);
967
968 return 0;
969}
970
971static void qede_get_pauseparam(struct net_device *dev,
972 struct ethtool_pauseparam *epause)
973{
974 struct qede_dev *edev = netdev_priv(dev);
975 struct qed_link_output current_link;
976
977 memset(¤t_link, 0, sizeof(current_link));
978 edev->ops->common->get_link(edev->cdev, ¤t_link);
979
980 if (current_link.pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
981 epause->autoneg = true;
982 if (current_link.pause_config & QED_LINK_PAUSE_RX_ENABLE)
983 epause->rx_pause = true;
984 if (current_link.pause_config & QED_LINK_PAUSE_TX_ENABLE)
985 epause->tx_pause = true;
986
987 DP_VERBOSE(edev, QED_MSG_DEBUG,
988 "ethtool_pauseparam: cmd %d autoneg %d rx_pause %d tx_pause %d\n",
989 epause->cmd, epause->autoneg, epause->rx_pause,
990 epause->tx_pause);
991}
992
993static int qede_set_pauseparam(struct net_device *dev,
994 struct ethtool_pauseparam *epause)
995{
996 struct qede_dev *edev = netdev_priv(dev);
997 struct qed_link_params params;
998 struct qed_link_output current_link;
999
1000 if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
1001 DP_INFO(edev,
1002 "Pause settings are not allowed to be changed\n");
1003 return -EOPNOTSUPP;
1004 }
1005
1006 memset(¤t_link, 0, sizeof(current_link));
1007 edev->ops->common->get_link(edev->cdev, ¤t_link);
1008
1009 memset(¶ms, 0, sizeof(params));
1010 params.override_flags |= QED_LINK_OVERRIDE_PAUSE_CONFIG;
1011 if (epause->autoneg) {
1012 if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) {
1013 DP_INFO(edev, "autoneg not supported\n");
1014 return -EINVAL;
1015 }
1016 params.pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
1017 }
1018 if (epause->rx_pause)
1019 params.pause_config |= QED_LINK_PAUSE_RX_ENABLE;
1020 if (epause->tx_pause)
1021 params.pause_config |= QED_LINK_PAUSE_TX_ENABLE;
1022
1023 params.link_up = true;
1024 edev->ops->common->set_link(edev->cdev, ¶ms);
1025
1026 return 0;
1027}
1028
1029static void qede_get_regs(struct net_device *ndev,
1030 struct ethtool_regs *regs, void *buffer)
1031{
1032 struct qede_dev *edev = netdev_priv(ndev);
1033
1034 regs->version = 0;
1035 memset(buffer, 0, regs->len);
1036
1037 if (edev->ops && edev->ops->common)
1038 edev->ops->common->dbg_all_data(edev->cdev, buffer);
1039}
1040
1041static int qede_get_regs_len(struct net_device *ndev)
1042{
1043 struct qede_dev *edev = netdev_priv(ndev);
1044
1045 if (edev->ops && edev->ops->common)
1046 return edev->ops->common->dbg_all_data_size(edev->cdev);
1047 else
1048 return -EINVAL;
1049}
1050
1051static void qede_update_mtu(struct qede_dev *edev,
1052 struct qede_reload_args *args)
1053{
1054 edev->ndev->mtu = args->u.mtu;
1055}
1056
1057/* Netdevice NDOs */
1058int qede_change_mtu(struct net_device *ndev, int new_mtu)
1059{
1060 struct qede_dev *edev = netdev_priv(ndev);
1061 struct qede_reload_args args;
1062
1063 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1064 "Configuring MTU size of %d\n", new_mtu);
1065
1066 if (new_mtu > PAGE_SIZE)
1067 ndev->features &= ~NETIF_F_GRO_HW;
1068
1069 /* Set the mtu field and re-start the interface if needed */
1070 args.u.mtu = new_mtu;
1071 args.func = &qede_update_mtu;
1072 qede_reload(edev, &args, false);
1073
1074 edev->ops->common->update_mtu(edev->cdev, new_mtu);
1075
1076 return 0;
1077}
1078
1079static void qede_get_channels(struct net_device *dev,
1080 struct ethtool_channels *channels)
1081{
1082 struct qede_dev *edev = netdev_priv(dev);
1083
1084 channels->max_combined = QEDE_MAX_RSS_CNT(edev);
1085 channels->max_rx = QEDE_MAX_RSS_CNT(edev);
1086 channels->max_tx = QEDE_MAX_RSS_CNT(edev);
1087 channels->combined_count = QEDE_QUEUE_CNT(edev) - edev->fp_num_tx -
1088 edev->fp_num_rx;
1089 channels->tx_count = edev->fp_num_tx;
1090 channels->rx_count = edev->fp_num_rx;
1091}
1092
1093static int qede_set_channels(struct net_device *dev,
1094 struct ethtool_channels *channels)
1095{
1096 struct qede_dev *edev = netdev_priv(dev);
1097 u32 count;
1098
1099 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1100 "set-channels command parameters: rx = %d, tx = %d, other = %d, combined = %d\n",
1101 channels->rx_count, channels->tx_count,
1102 channels->other_count, channels->combined_count);
1103
1104 count = channels->rx_count + channels->tx_count +
1105 channels->combined_count;
1106
1107 /* We don't support `other' channels */
1108 if (channels->other_count) {
1109 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1110 "command parameters not supported\n");
1111 return -EINVAL;
1112 }
1113
1114 if (!(channels->combined_count || (channels->rx_count &&
1115 channels->tx_count))) {
1116 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1117 "need to request at least one transmit and one receive channel\n");
1118 return -EINVAL;
1119 }
1120
1121 if (count > QEDE_MAX_RSS_CNT(edev)) {
1122 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1123 "requested channels = %d max supported channels = %d\n",
1124 count, QEDE_MAX_RSS_CNT(edev));
1125 return -EINVAL;
1126 }
1127
1128 /* Check if there was a change in the active parameters */
1129 if ((count == QEDE_QUEUE_CNT(edev)) &&
1130 (channels->tx_count == edev->fp_num_tx) &&
1131 (channels->rx_count == edev->fp_num_rx)) {
1132 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1133 "No change in active parameters\n");
1134 return 0;
1135 }
1136
1137 /* We need the number of queues to be divisible between the hwfns */
1138 if ((count % edev->dev_info.common.num_hwfns) ||
1139 (channels->tx_count % edev->dev_info.common.num_hwfns) ||
1140 (channels->rx_count % edev->dev_info.common.num_hwfns)) {
1141 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1142 "Number of channels must be divisible by %04x\n",
1143 edev->dev_info.common.num_hwfns);
1144 return -EINVAL;
1145 }
1146
1147 /* Set number of queues and reload if necessary */
1148 edev->req_queues = count;
1149 edev->req_num_tx = channels->tx_count;
1150 edev->req_num_rx = channels->rx_count;
1151 /* Reset the indirection table if rx queue count is updated */
1152 if ((edev->req_queues - edev->req_num_tx) != QEDE_RSS_COUNT(edev)) {
1153 edev->rss_params_inited &= ~QEDE_RSS_INDIR_INITED;
1154 memset(edev->rss_ind_table, 0, sizeof(edev->rss_ind_table));
1155 }
1156
1157 qede_reload(edev, NULL, false);
1158
1159 return 0;
1160}
1161
1162static int qede_get_ts_info(struct net_device *dev,
1163 struct ethtool_ts_info *info)
1164{
1165 struct qede_dev *edev = netdev_priv(dev);
1166
1167 return qede_ptp_get_ts_info(edev, info);
1168}
1169
1170static int qede_set_phys_id(struct net_device *dev,
1171 enum ethtool_phys_id_state state)
1172{
1173 struct qede_dev *edev = netdev_priv(dev);
1174 u8 led_state = 0;
1175
1176 switch (state) {
1177 case ETHTOOL_ID_ACTIVE:
1178 return 1; /* cycle on/off once per second */
1179
1180 case ETHTOOL_ID_ON:
1181 led_state = QED_LED_MODE_ON;
1182 break;
1183
1184 case ETHTOOL_ID_OFF:
1185 led_state = QED_LED_MODE_OFF;
1186 break;
1187
1188 case ETHTOOL_ID_INACTIVE:
1189 led_state = QED_LED_MODE_RESTORE;
1190 break;
1191 }
1192
1193 edev->ops->common->set_led(edev->cdev, led_state);
1194
1195 return 0;
1196}
1197
1198static int qede_get_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)
1199{
1200 info->data = RXH_IP_SRC | RXH_IP_DST;
1201
1202 switch (info->flow_type) {
1203 case TCP_V4_FLOW:
1204 case TCP_V6_FLOW:
1205 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
1206 break;
1207 case UDP_V4_FLOW:
1208 if (edev->rss_caps & QED_RSS_IPV4_UDP)
1209 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
1210 break;
1211 case UDP_V6_FLOW:
1212 if (edev->rss_caps & QED_RSS_IPV6_UDP)
1213 info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
1214 break;
1215 case IPV4_FLOW:
1216 case IPV6_FLOW:
1217 break;
1218 default:
1219 info->data = 0;
1220 break;
1221 }
1222
1223 return 0;
1224}
1225
1226static int qede_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,
1227 u32 *rule_locs)
1228{
1229 struct qede_dev *edev = netdev_priv(dev);
1230 int rc = 0;
1231
1232 switch (info->cmd) {
1233 case ETHTOOL_GRXRINGS:
1234 info->data = QEDE_RSS_COUNT(edev);
1235 break;
1236 case ETHTOOL_GRXFH:
1237 rc = qede_get_rss_flags(edev, info);
1238 break;
1239 case ETHTOOL_GRXCLSRLCNT:
1240 info->rule_cnt = qede_get_arfs_filter_count(edev);
1241 info->data = QEDE_RFS_MAX_FLTR;
1242 break;
1243 case ETHTOOL_GRXCLSRULE:
1244 rc = qede_get_cls_rule_entry(edev, info);
1245 break;
1246 case ETHTOOL_GRXCLSRLALL:
1247 rc = qede_get_cls_rule_all(edev, info, rule_locs);
1248 break;
1249 default:
1250 DP_ERR(edev, "Command parameters not supported\n");
1251 rc = -EOPNOTSUPP;
1252 }
1253
1254 return rc;
1255}
1256
1257static int qede_set_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)
1258{
1259 struct qed_update_vport_params *vport_update_params;
1260 u8 set_caps = 0, clr_caps = 0;
1261 int rc = 0;
1262
1263 DP_VERBOSE(edev, QED_MSG_DEBUG,
1264 "Set rss flags command parameters: flow type = %d, data = %llu\n",
1265 info->flow_type, info->data);
1266
1267 switch (info->flow_type) {
1268 case TCP_V4_FLOW:
1269 case TCP_V6_FLOW:
1270 /* For TCP only 4-tuple hash is supported */
1271 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST |
1272 RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1273 DP_INFO(edev, "Command parameters not supported\n");
1274 return -EINVAL;
1275 }
1276 return 0;
1277 case UDP_V4_FLOW:
1278 /* For UDP either 2-tuple hash or 4-tuple hash is supported */
1279 if (info->data == (RXH_IP_SRC | RXH_IP_DST |
1280 RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1281 set_caps = QED_RSS_IPV4_UDP;
1282 DP_VERBOSE(edev, QED_MSG_DEBUG,
1283 "UDP 4-tuple enabled\n");
1284 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) {
1285 clr_caps = QED_RSS_IPV4_UDP;
1286 DP_VERBOSE(edev, QED_MSG_DEBUG,
1287 "UDP 4-tuple disabled\n");
1288 } else {
1289 return -EINVAL;
1290 }
1291 break;
1292 case UDP_V6_FLOW:
1293 /* For UDP either 2-tuple hash or 4-tuple hash is supported */
1294 if (info->data == (RXH_IP_SRC | RXH_IP_DST |
1295 RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
1296 set_caps = QED_RSS_IPV6_UDP;
1297 DP_VERBOSE(edev, QED_MSG_DEBUG,
1298 "UDP 4-tuple enabled\n");
1299 } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) {
1300 clr_caps = QED_RSS_IPV6_UDP;
1301 DP_VERBOSE(edev, QED_MSG_DEBUG,
1302 "UDP 4-tuple disabled\n");
1303 } else {
1304 return -EINVAL;
1305 }
1306 break;
1307 case IPV4_FLOW:
1308 case IPV6_FLOW:
1309 /* For IP only 2-tuple hash is supported */
1310 if (info->data ^ (RXH_IP_SRC | RXH_IP_DST)) {
1311 DP_INFO(edev, "Command parameters not supported\n");
1312 return -EINVAL;
1313 }
1314 return 0;
1315 case SCTP_V4_FLOW:
1316 case AH_ESP_V4_FLOW:
1317 case AH_V4_FLOW:
1318 case ESP_V4_FLOW:
1319 case SCTP_V6_FLOW:
1320 case AH_ESP_V6_FLOW:
1321 case AH_V6_FLOW:
1322 case ESP_V6_FLOW:
1323 case IP_USER_FLOW:
1324 case ETHER_FLOW:
1325 /* RSS is not supported for these protocols */
1326 if (info->data) {
1327 DP_INFO(edev, "Command parameters not supported\n");
1328 return -EINVAL;
1329 }
1330 return 0;
1331 default:
1332 return -EINVAL;
1333 }
1334
1335 /* No action is needed if there is no change in the rss capability */
1336 if (edev->rss_caps == ((edev->rss_caps & ~clr_caps) | set_caps))
1337 return 0;
1338
1339 /* Update internal configuration */
1340 edev->rss_caps = ((edev->rss_caps & ~clr_caps) | set_caps);
1341 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
1342
1343 /* Re-configure if possible */
1344 __qede_lock(edev);
1345 if (edev->state == QEDE_STATE_OPEN) {
1346 vport_update_params = vzalloc(sizeof(*vport_update_params));
1347 if (!vport_update_params) {
1348 __qede_unlock(edev);
1349 return -ENOMEM;
1350 }
1351 qede_fill_rss_params(edev, &vport_update_params->rss_params,
1352 &vport_update_params->update_rss_flg);
1353 rc = edev->ops->vport_update(edev->cdev, vport_update_params);
1354 vfree(vport_update_params);
1355 }
1356 __qede_unlock(edev);
1357
1358 return rc;
1359}
1360
1361static int qede_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info)
1362{
1363 struct qede_dev *edev = netdev_priv(dev);
1364 int rc;
1365
1366 switch (info->cmd) {
1367 case ETHTOOL_SRXFH:
1368 rc = qede_set_rss_flags(edev, info);
1369 break;
1370 case ETHTOOL_SRXCLSRLINS:
1371 rc = qede_add_cls_rule(edev, info);
1372 break;
1373 case ETHTOOL_SRXCLSRLDEL:
1374 rc = qede_delete_flow_filter(edev, info->fs.location);
1375 break;
1376 default:
1377 DP_INFO(edev, "Command parameters not supported\n");
1378 rc = -EOPNOTSUPP;
1379 }
1380
1381 return rc;
1382}
1383
1384static u32 qede_get_rxfh_indir_size(struct net_device *dev)
1385{
1386 return QED_RSS_IND_TABLE_SIZE;
1387}
1388
1389static u32 qede_get_rxfh_key_size(struct net_device *dev)
1390{
1391 struct qede_dev *edev = netdev_priv(dev);
1392
1393 return sizeof(edev->rss_key);
1394}
1395
1396static int qede_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, u8 *hfunc)
1397{
1398 struct qede_dev *edev = netdev_priv(dev);
1399 int i;
1400
1401 if (hfunc)
1402 *hfunc = ETH_RSS_HASH_TOP;
1403
1404 if (!indir)
1405 return 0;
1406
1407 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++)
1408 indir[i] = edev->rss_ind_table[i];
1409
1410 if (key)
1411 memcpy(key, edev->rss_key, qede_get_rxfh_key_size(dev));
1412
1413 return 0;
1414}
1415
1416static int qede_set_rxfh(struct net_device *dev, const u32 *indir,
1417 const u8 *key, const u8 hfunc)
1418{
1419 struct qed_update_vport_params *vport_update_params;
1420 struct qede_dev *edev = netdev_priv(dev);
1421 int i, rc = 0;
1422
1423 if (edev->dev_info.common.num_hwfns > 1) {
1424 DP_INFO(edev,
1425 "RSS configuration is not supported for 100G devices\n");
1426 return -EOPNOTSUPP;
1427 }
1428
1429 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
1430 return -EOPNOTSUPP;
1431
1432 if (!indir && !key)
1433 return 0;
1434
1435 if (indir) {
1436 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++)
1437 edev->rss_ind_table[i] = indir[i];
1438 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
1439 }
1440
1441 if (key) {
1442 memcpy(&edev->rss_key, key, qede_get_rxfh_key_size(dev));
1443 edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
1444 }
1445
1446 __qede_lock(edev);
1447 if (edev->state == QEDE_STATE_OPEN) {
1448 vport_update_params = vzalloc(sizeof(*vport_update_params));
1449 if (!vport_update_params) {
1450 __qede_unlock(edev);
1451 return -ENOMEM;
1452 }
1453 qede_fill_rss_params(edev, &vport_update_params->rss_params,
1454 &vport_update_params->update_rss_flg);
1455 rc = edev->ops->vport_update(edev->cdev, vport_update_params);
1456 vfree(vport_update_params);
1457 }
1458 __qede_unlock(edev);
1459
1460 return rc;
1461}
1462
1463/* This function enables the interrupt generation and the NAPI on the device */
1464static void qede_netif_start(struct qede_dev *edev)
1465{
1466 int i;
1467
1468 if (!netif_running(edev->ndev))
1469 return;
1470
1471 for_each_queue(i) {
1472 /* Update and reenable interrupts */
1473 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_ENABLE, 1);
1474 napi_enable(&edev->fp_array[i].napi);
1475 }
1476}
1477
1478/* This function disables the NAPI and the interrupt generation on the device */
1479static void qede_netif_stop(struct qede_dev *edev)
1480{
1481 int i;
1482
1483 for_each_queue(i) {
1484 napi_disable(&edev->fp_array[i].napi);
1485 /* Disable interrupts */
1486 qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_DISABLE, 0);
1487 }
1488}
1489
1490static int qede_selftest_transmit_traffic(struct qede_dev *edev,
1491 struct sk_buff *skb)
1492{
1493 struct qede_tx_queue *txq = NULL;
1494 struct eth_tx_1st_bd *first_bd;
1495 dma_addr_t mapping;
1496 int i, idx;
1497 u16 val;
1498
1499 for_each_queue(i) {
1500 struct qede_fastpath *fp = &edev->fp_array[i];
1501
1502 if (fp->type & QEDE_FASTPATH_TX) {
1503 txq = QEDE_FP_TC0_TXQ(fp);
1504 break;
1505 }
1506 }
1507
1508 if (!txq) {
1509 DP_NOTICE(edev, "Tx path is not available\n");
1510 return -1;
1511 }
1512
1513 /* Fill the entry in the SW ring and the BDs in the FW ring */
1514 idx = txq->sw_tx_prod;
1515 txq->sw_tx_ring.skbs[idx].skb = skb;
1516 first_bd = qed_chain_produce(&txq->tx_pbl);
1517 memset(first_bd, 0, sizeof(*first_bd));
1518 val = 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
1519 first_bd->data.bd_flags.bitfields = val;
1520 val = skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK;
1521 val = val << ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
1522 first_bd->data.bitfields |= cpu_to_le16(val);
1523
1524 /* Map skb linear data for DMA and set in the first BD */
1525 mapping = dma_map_single(&edev->pdev->dev, skb->data,
1526 skb_headlen(skb), DMA_TO_DEVICE);
1527 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
1528 DP_NOTICE(edev, "SKB mapping failed\n");
1529 return -ENOMEM;
1530 }
1531 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
1532
1533 /* update the first BD with the actual num BDs */
1534 first_bd->data.nbds = 1;
1535 txq->sw_tx_prod = (txq->sw_tx_prod + 1) % txq->num_tx_buffers;
1536 /* 'next page' entries are counted in the producer value */
1537 val = qed_chain_get_prod_idx(&txq->tx_pbl);
1538 txq->tx_db.data.bd_prod = cpu_to_le16(val);
1539
1540 /* wmb makes sure that the BDs data is updated before updating the
1541 * producer, otherwise FW may read old data from the BDs.
1542 */
1543 wmb();
1544 barrier();
1545 writel(txq->tx_db.raw, txq->doorbell_addr);
1546
1547 for (i = 0; i < QEDE_SELFTEST_POLL_COUNT; i++) {
1548 if (qede_txq_has_work(txq))
1549 break;
1550 usleep_range(100, 200);
1551 }
1552
1553 if (!qede_txq_has_work(txq)) {
1554 DP_NOTICE(edev, "Tx completion didn't happen\n");
1555 return -1;
1556 }
1557
1558 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
1559 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
1560 BD_UNMAP_LEN(first_bd), DMA_TO_DEVICE);
1561 txq->sw_tx_cons = (txq->sw_tx_cons + 1) % txq->num_tx_buffers;
1562 txq->sw_tx_ring.skbs[idx].skb = NULL;
1563
1564 return 0;
1565}
1566
1567static int qede_selftest_receive_traffic(struct qede_dev *edev)
1568{
1569 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, len;
1570 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1571 struct qede_rx_queue *rxq = NULL;
1572 struct sw_rx_data *sw_rx_data;
1573 union eth_rx_cqe *cqe;
1574 int i, iter, rc = 0;
1575 u8 *data_ptr;
1576
1577 for_each_queue(i) {
1578 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) {
1579 rxq = edev->fp_array[i].rxq;
1580 break;
1581 }
1582 }
1583
1584 if (!rxq) {
1585 DP_NOTICE(edev, "Rx path is not available\n");
1586 return -1;
1587 }
1588
1589 /* The packet is expected to receive on rx-queue 0 even though RSS is
1590 * enabled. This is because the queue 0 is configured as the default
1591 * queue and that the loopback traffic is not IP.
1592 */
1593 for (iter = 0; iter < QEDE_SELFTEST_POLL_COUNT; iter++) {
1594 if (!qede_has_rx_work(rxq)) {
1595 usleep_range(100, 200);
1596 continue;
1597 }
1598
1599 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1600 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1601
1602 /* Memory barrier to prevent the CPU from doing speculative
1603 * reads of CQE/BD before reading hw_comp_cons. If the CQE is
1604 * read before it is written by FW, then FW writes CQE and SB,
1605 * and then the CPU reads the hw_comp_cons, it will use an old
1606 * CQE.
1607 */
1608 rmb();
1609
1610 /* Get the CQE from the completion ring */
1611 cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring);
1612
1613 /* Get the data from the SW ring */
1614 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1615 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1616 fp_cqe = &cqe->fast_path_regular;
1617 len = le16_to_cpu(fp_cqe->len_on_first_bd);
1618 data_ptr = (u8 *)(page_address(sw_rx_data->data) +
1619 fp_cqe->placement_offset +
1620 sw_rx_data->page_offset +
1621 rxq->rx_headroom);
1622 if (ether_addr_equal(data_ptr, edev->ndev->dev_addr) &&
1623 ether_addr_equal(data_ptr + ETH_ALEN,
1624 edev->ndev->dev_addr)) {
1625 for (i = ETH_HLEN; i < len; i++)
1626 if (data_ptr[i] != (unsigned char)(i & 0xff)) {
1627 rc = -1;
1628 break;
1629 }
1630
1631 qede_recycle_rx_bd_ring(rxq, 1);
1632 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1633 break;
1634 }
1635
1636 DP_INFO(edev, "Not the transmitted packet\n");
1637 qede_recycle_rx_bd_ring(rxq, 1);
1638 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1639 }
1640
1641 if (iter == QEDE_SELFTEST_POLL_COUNT) {
1642 DP_NOTICE(edev, "Failed to receive the traffic\n");
1643 return -1;
1644 }
1645
1646 qede_update_rx_prod(edev, rxq);
1647
1648 return rc;
1649}
1650
1651static int qede_selftest_run_loopback(struct qede_dev *edev, u32 loopback_mode)
1652{
1653 struct qed_link_params link_params;
1654 struct sk_buff *skb = NULL;
1655 int rc = 0, i;
1656 u32 pkt_size;
1657 u8 *packet;
1658
1659 if (!netif_running(edev->ndev)) {
1660 DP_NOTICE(edev, "Interface is down\n");
1661 return -EINVAL;
1662 }
1663
1664 qede_netif_stop(edev);
1665
1666 /* Bring up the link in Loopback mode */
1667 memset(&link_params, 0, sizeof(link_params));
1668 link_params.link_up = true;
1669 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE;
1670 link_params.loopback_mode = loopback_mode;
1671 edev->ops->common->set_link(edev->cdev, &link_params);
1672
1673 /* Wait for loopback configuration to apply */
1674 msleep_interruptible(500);
1675
1676 /* Setting max packet size to 1.5K to avoid data being split over
1677 * multiple BDs in cases where MTU > PAGE_SIZE.
1678 */
1679 pkt_size = (((edev->ndev->mtu < ETH_DATA_LEN) ?
1680 edev->ndev->mtu : ETH_DATA_LEN) + ETH_HLEN);
1681
1682 skb = netdev_alloc_skb(edev->ndev, pkt_size);
1683 if (!skb) {
1684 DP_INFO(edev, "Can't allocate skb\n");
1685 rc = -ENOMEM;
1686 goto test_loopback_exit;
1687 }
1688 packet = skb_put(skb, pkt_size);
1689 ether_addr_copy(packet, edev->ndev->dev_addr);
1690 ether_addr_copy(packet + ETH_ALEN, edev->ndev->dev_addr);
1691 memset(packet + (2 * ETH_ALEN), 0x77, (ETH_HLEN - (2 * ETH_ALEN)));
1692 for (i = ETH_HLEN; i < pkt_size; i++)
1693 packet[i] = (unsigned char)(i & 0xff);
1694
1695 rc = qede_selftest_transmit_traffic(edev, skb);
1696 if (rc)
1697 goto test_loopback_exit;
1698
1699 rc = qede_selftest_receive_traffic(edev);
1700 if (rc)
1701 goto test_loopback_exit;
1702
1703 DP_VERBOSE(edev, NETIF_MSG_RX_STATUS, "Loopback test successful\n");
1704
1705test_loopback_exit:
1706 dev_kfree_skb(skb);
1707
1708 /* Bring up the link in Normal mode */
1709 memset(&link_params, 0, sizeof(link_params));
1710 link_params.link_up = true;
1711 link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE;
1712 link_params.loopback_mode = QED_LINK_LOOPBACK_NONE;
1713 edev->ops->common->set_link(edev->cdev, &link_params);
1714
1715 /* Wait for loopback configuration to apply */
1716 msleep_interruptible(500);
1717
1718 qede_netif_start(edev);
1719
1720 return rc;
1721}
1722
1723static void qede_self_test(struct net_device *dev,
1724 struct ethtool_test *etest, u64 *buf)
1725{
1726 struct qede_dev *edev = netdev_priv(dev);
1727
1728 DP_VERBOSE(edev, QED_MSG_DEBUG,
1729 "Self-test command parameters: offline = %d, external_lb = %d\n",
1730 (etest->flags & ETH_TEST_FL_OFFLINE),
1731 (etest->flags & ETH_TEST_FL_EXTERNAL_LB) >> 2);
1732
1733 memset(buf, 0, sizeof(u64) * QEDE_ETHTOOL_TEST_MAX);
1734
1735 if (etest->flags & ETH_TEST_FL_OFFLINE) {
1736 if (qede_selftest_run_loopback(edev,
1737 QED_LINK_LOOPBACK_INT_PHY)) {
1738 buf[QEDE_ETHTOOL_INT_LOOPBACK] = 1;
1739 etest->flags |= ETH_TEST_FL_FAILED;
1740 }
1741 }
1742
1743 if (edev->ops->common->selftest->selftest_interrupt(edev->cdev)) {
1744 buf[QEDE_ETHTOOL_INTERRUPT_TEST] = 1;
1745 etest->flags |= ETH_TEST_FL_FAILED;
1746 }
1747
1748 if (edev->ops->common->selftest->selftest_memory(edev->cdev)) {
1749 buf[QEDE_ETHTOOL_MEMORY_TEST] = 1;
1750 etest->flags |= ETH_TEST_FL_FAILED;
1751 }
1752
1753 if (edev->ops->common->selftest->selftest_register(edev->cdev)) {
1754 buf[QEDE_ETHTOOL_REGISTER_TEST] = 1;
1755 etest->flags |= ETH_TEST_FL_FAILED;
1756 }
1757
1758 if (edev->ops->common->selftest->selftest_clock(edev->cdev)) {
1759 buf[QEDE_ETHTOOL_CLOCK_TEST] = 1;
1760 etest->flags |= ETH_TEST_FL_FAILED;
1761 }
1762
1763 if (edev->ops->common->selftest->selftest_nvram(edev->cdev)) {
1764 buf[QEDE_ETHTOOL_NVRAM_TEST] = 1;
1765 etest->flags |= ETH_TEST_FL_FAILED;
1766 }
1767}
1768
1769static int qede_set_tunable(struct net_device *dev,
1770 const struct ethtool_tunable *tuna,
1771 const void *data)
1772{
1773 struct qede_dev *edev = netdev_priv(dev);
1774 u32 val;
1775
1776 switch (tuna->id) {
1777 case ETHTOOL_RX_COPYBREAK:
1778 val = *(u32 *)data;
1779 if (val < QEDE_MIN_PKT_LEN || val > QEDE_RX_HDR_SIZE) {
1780 DP_VERBOSE(edev, QED_MSG_DEBUG,
1781 "Invalid rx copy break value, range is [%u, %u]",
1782 QEDE_MIN_PKT_LEN, QEDE_RX_HDR_SIZE);
1783 return -EINVAL;
1784 }
1785
1786 edev->rx_copybreak = *(u32 *)data;
1787 break;
1788 default:
1789 return -EOPNOTSUPP;
1790 }
1791
1792 return 0;
1793}
1794
1795static int qede_get_tunable(struct net_device *dev,
1796 const struct ethtool_tunable *tuna, void *data)
1797{
1798 struct qede_dev *edev = netdev_priv(dev);
1799
1800 switch (tuna->id) {
1801 case ETHTOOL_RX_COPYBREAK:
1802 *(u32 *)data = edev->rx_copybreak;
1803 break;
1804 default:
1805 return -EOPNOTSUPP;
1806 }
1807
1808 return 0;
1809}
1810
1811static int qede_get_eee(struct net_device *dev, struct ethtool_eee *edata)
1812{
1813 struct qede_dev *edev = netdev_priv(dev);
1814 struct qed_link_output current_link;
1815
1816 memset(¤t_link, 0, sizeof(current_link));
1817 edev->ops->common->get_link(edev->cdev, ¤t_link);
1818
1819 if (!current_link.eee_supported) {
1820 DP_INFO(edev, "EEE is not supported\n");
1821 return -EOPNOTSUPP;
1822 }
1823
1824 if (current_link.eee.adv_caps & QED_EEE_1G_ADV)
1825 edata->advertised = ADVERTISED_1000baseT_Full;
1826 if (current_link.eee.adv_caps & QED_EEE_10G_ADV)
1827 edata->advertised |= ADVERTISED_10000baseT_Full;
1828 if (current_link.sup_caps & QED_EEE_1G_ADV)
1829 edata->supported = ADVERTISED_1000baseT_Full;
1830 if (current_link.sup_caps & QED_EEE_10G_ADV)
1831 edata->supported |= ADVERTISED_10000baseT_Full;
1832 if (current_link.eee.lp_adv_caps & QED_EEE_1G_ADV)
1833 edata->lp_advertised = ADVERTISED_1000baseT_Full;
1834 if (current_link.eee.lp_adv_caps & QED_EEE_10G_ADV)
1835 edata->lp_advertised |= ADVERTISED_10000baseT_Full;
1836
1837 edata->tx_lpi_timer = current_link.eee.tx_lpi_timer;
1838 edata->eee_enabled = current_link.eee.enable;
1839 edata->tx_lpi_enabled = current_link.eee.tx_lpi_enable;
1840 edata->eee_active = current_link.eee_active;
1841
1842 return 0;
1843}
1844
1845static int qede_set_eee(struct net_device *dev, struct ethtool_eee *edata)
1846{
1847 struct qede_dev *edev = netdev_priv(dev);
1848 struct qed_link_output current_link;
1849 struct qed_link_params params;
1850
1851 if (!edev->ops->common->can_link_change(edev->cdev)) {
1852 DP_INFO(edev, "Link settings are not allowed to be changed\n");
1853 return -EOPNOTSUPP;
1854 }
1855
1856 memset(¤t_link, 0, sizeof(current_link));
1857 edev->ops->common->get_link(edev->cdev, ¤t_link);
1858
1859 if (!current_link.eee_supported) {
1860 DP_INFO(edev, "EEE is not supported\n");
1861 return -EOPNOTSUPP;
1862 }
1863
1864 memset(¶ms, 0, sizeof(params));
1865 params.override_flags |= QED_LINK_OVERRIDE_EEE_CONFIG;
1866
1867 if (!(edata->advertised & (ADVERTISED_1000baseT_Full |
1868 ADVERTISED_10000baseT_Full)) ||
1869 ((edata->advertised & (ADVERTISED_1000baseT_Full |
1870 ADVERTISED_10000baseT_Full)) !=
1871 edata->advertised)) {
1872 DP_VERBOSE(edev, QED_MSG_DEBUG,
1873 "Invalid advertised capabilities %d\n",
1874 edata->advertised);
1875 return -EINVAL;
1876 }
1877
1878 if (edata->advertised & ADVERTISED_1000baseT_Full)
1879 params.eee.adv_caps = QED_EEE_1G_ADV;
1880 if (edata->advertised & ADVERTISED_10000baseT_Full)
1881 params.eee.adv_caps |= QED_EEE_10G_ADV;
1882 params.eee.enable = edata->eee_enabled;
1883 params.eee.tx_lpi_enable = edata->tx_lpi_enabled;
1884 params.eee.tx_lpi_timer = edata->tx_lpi_timer;
1885
1886 params.link_up = true;
1887 edev->ops->common->set_link(edev->cdev, ¶ms);
1888
1889 return 0;
1890}
1891
1892static int qede_get_module_info(struct net_device *dev,
1893 struct ethtool_modinfo *modinfo)
1894{
1895 struct qede_dev *edev = netdev_priv(dev);
1896 u8 buf[4];
1897 int rc;
1898
1899 /* Read first 4 bytes to find the sfp type */
1900 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf,
1901 QED_I2C_DEV_ADDR_A0, 0, 4);
1902 if (rc) {
1903 DP_ERR(edev, "Failed reading EEPROM data %d\n", rc);
1904 return rc;
1905 }
1906
1907 switch (buf[0]) {
1908 case 0x3: /* SFP, SFP+, SFP-28 */
1909 modinfo->type = ETH_MODULE_SFF_8472;
1910 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1911 break;
1912 case 0xc: /* QSFP */
1913 case 0xd: /* QSFP+ */
1914 modinfo->type = ETH_MODULE_SFF_8436;
1915 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1916 break;
1917 case 0x11: /* QSFP-28 */
1918 modinfo->type = ETH_MODULE_SFF_8636;
1919 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1920 break;
1921 default:
1922 DP_ERR(edev, "Unknown transceiver type 0x%x\n", buf[0]);
1923 return -EINVAL;
1924 }
1925
1926 return 0;
1927}
1928
1929static int qede_get_module_eeprom(struct net_device *dev,
1930 struct ethtool_eeprom *ee, u8 *data)
1931{
1932 struct qede_dev *edev = netdev_priv(dev);
1933 u32 start_addr = ee->offset, size = 0;
1934 u8 *buf = data;
1935 int rc = 0;
1936
1937 /* Read A0 section */
1938 if (ee->offset < ETH_MODULE_SFF_8079_LEN) {
1939 /* Limit transfer size to the A0 section boundary */
1940 if (ee->offset + ee->len > ETH_MODULE_SFF_8079_LEN)
1941 size = ETH_MODULE_SFF_8079_LEN - ee->offset;
1942 else
1943 size = ee->len;
1944
1945 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf,
1946 QED_I2C_DEV_ADDR_A0,
1947 start_addr, size);
1948 if (rc) {
1949 DP_ERR(edev, "Failed reading A0 section %d\n", rc);
1950 return rc;
1951 }
1952
1953 buf += size;
1954 start_addr += size;
1955 }
1956
1957 /* Read A2 section */
1958 if (start_addr >= ETH_MODULE_SFF_8079_LEN &&
1959 start_addr < ETH_MODULE_SFF_8472_LEN) {
1960 size = ee->len - size;
1961 /* Limit transfer size to the A2 section boundary */
1962 if (start_addr + size > ETH_MODULE_SFF_8472_LEN)
1963 size = ETH_MODULE_SFF_8472_LEN - start_addr;
1964 start_addr -= ETH_MODULE_SFF_8079_LEN;
1965 rc = edev->ops->common->read_module_eeprom(edev->cdev, buf,
1966 QED_I2C_DEV_ADDR_A2,
1967 start_addr, size);
1968 if (rc) {
1969 DP_VERBOSE(edev, QED_MSG_DEBUG,
1970 "Failed reading A2 section %d\n", rc);
1971 return 0;
1972 }
1973 }
1974
1975 return rc;
1976}
1977
1978static int qede_set_dump(struct net_device *dev, struct ethtool_dump *val)
1979{
1980 struct qede_dev *edev = netdev_priv(dev);
1981 int rc = 0;
1982
1983 if (edev->dump_info.cmd == QEDE_DUMP_CMD_NONE) {
1984 if (val->flag > QEDE_DUMP_CMD_MAX) {
1985 DP_ERR(edev, "Invalid command %d\n", val->flag);
1986 return -EINVAL;
1987 }
1988 edev->dump_info.cmd = val->flag;
1989 edev->dump_info.num_args = 0;
1990 return 0;
1991 }
1992
1993 if (edev->dump_info.num_args == QEDE_DUMP_MAX_ARGS) {
1994 DP_ERR(edev, "Arg count = %d\n", edev->dump_info.num_args);
1995 return -EINVAL;
1996 }
1997
1998 switch (edev->dump_info.cmd) {
1999 case QEDE_DUMP_CMD_NVM_CFG:
2000 edev->dump_info.args[edev->dump_info.num_args] = val->flag;
2001 edev->dump_info.num_args++;
2002 break;
2003 case QEDE_DUMP_CMD_GRCDUMP:
2004 rc = edev->ops->common->set_grc_config(edev->cdev,
2005 val->flag, 1);
2006 break;
2007 default:
2008 break;
2009 }
2010
2011 return rc;
2012}
2013
2014static int qede_get_dump_flag(struct net_device *dev,
2015 struct ethtool_dump *dump)
2016{
2017 struct qede_dev *edev = netdev_priv(dev);
2018
2019 if (!edev->ops || !edev->ops->common) {
2020 DP_ERR(edev, "Edev ops not populated\n");
2021 return -EINVAL;
2022 }
2023
2024 dump->version = QEDE_DUMP_VERSION;
2025 switch (edev->dump_info.cmd) {
2026 case QEDE_DUMP_CMD_NVM_CFG:
2027 dump->flag = QEDE_DUMP_CMD_NVM_CFG;
2028 dump->len = edev->ops->common->read_nvm_cfg_len(edev->cdev,
2029 edev->dump_info.args[0]);
2030 break;
2031 case QEDE_DUMP_CMD_GRCDUMP:
2032 dump->flag = QEDE_DUMP_CMD_GRCDUMP;
2033 dump->len = edev->ops->common->dbg_all_data_size(edev->cdev);
2034 break;
2035 default:
2036 DP_ERR(edev, "Invalid cmd = %d\n", edev->dump_info.cmd);
2037 return -EINVAL;
2038 }
2039
2040 DP_VERBOSE(edev, QED_MSG_DEBUG,
2041 "dump->version = 0x%x dump->flag = %d dump->len = %d\n",
2042 dump->version, dump->flag, dump->len);
2043 return 0;
2044}
2045
2046static int qede_get_dump_data(struct net_device *dev,
2047 struct ethtool_dump *dump, void *buf)
2048{
2049 struct qede_dev *edev = netdev_priv(dev);
2050 int rc = 0;
2051
2052 if (!edev->ops || !edev->ops->common) {
2053 DP_ERR(edev, "Edev ops not populated\n");
2054 rc = -EINVAL;
2055 goto err;
2056 }
2057
2058 switch (edev->dump_info.cmd) {
2059 case QEDE_DUMP_CMD_NVM_CFG:
2060 if (edev->dump_info.num_args != QEDE_DUMP_NVM_ARG_COUNT) {
2061 DP_ERR(edev, "Arg count = %d required = %d\n",
2062 edev->dump_info.num_args,
2063 QEDE_DUMP_NVM_ARG_COUNT);
2064 rc = -EINVAL;
2065 goto err;
2066 }
2067 rc = edev->ops->common->read_nvm_cfg(edev->cdev, (u8 **)&buf,
2068 edev->dump_info.args[0],
2069 edev->dump_info.args[1]);
2070 break;
2071 case QEDE_DUMP_CMD_GRCDUMP:
2072 memset(buf, 0, dump->len);
2073 rc = edev->ops->common->dbg_all_data(edev->cdev, buf);
2074 break;
2075 default:
2076 DP_ERR(edev, "Invalid cmd = %d\n", edev->dump_info.cmd);
2077 rc = -EINVAL;
2078 break;
2079 }
2080
2081err:
2082 edev->dump_info.cmd = QEDE_DUMP_CMD_NONE;
2083 edev->dump_info.num_args = 0;
2084 memset(edev->dump_info.args, 0, sizeof(edev->dump_info.args));
2085
2086 return rc;
2087}
2088
2089static const struct ethtool_ops qede_ethtool_ops = {
2090 .get_link_ksettings = qede_get_link_ksettings,
2091 .set_link_ksettings = qede_set_link_ksettings,
2092 .get_drvinfo = qede_get_drvinfo,
2093 .get_regs_len = qede_get_regs_len,
2094 .get_regs = qede_get_regs,
2095 .get_wol = qede_get_wol,
2096 .set_wol = qede_set_wol,
2097 .get_msglevel = qede_get_msglevel,
2098 .set_msglevel = qede_set_msglevel,
2099 .nway_reset = qede_nway_reset,
2100 .get_link = qede_get_link,
2101 .get_coalesce = qede_get_coalesce,
2102 .set_coalesce = qede_set_coalesce,
2103 .get_ringparam = qede_get_ringparam,
2104 .set_ringparam = qede_set_ringparam,
2105 .get_pauseparam = qede_get_pauseparam,
2106 .set_pauseparam = qede_set_pauseparam,
2107 .get_strings = qede_get_strings,
2108 .set_phys_id = qede_set_phys_id,
2109 .get_ethtool_stats = qede_get_ethtool_stats,
2110 .get_priv_flags = qede_get_priv_flags,
2111 .get_sset_count = qede_get_sset_count,
2112 .get_rxnfc = qede_get_rxnfc,
2113 .set_rxnfc = qede_set_rxnfc,
2114 .get_rxfh_indir_size = qede_get_rxfh_indir_size,
2115 .get_rxfh_key_size = qede_get_rxfh_key_size,
2116 .get_rxfh = qede_get_rxfh,
2117 .set_rxfh = qede_set_rxfh,
2118 .get_ts_info = qede_get_ts_info,
2119 .get_channels = qede_get_channels,
2120 .set_channels = qede_set_channels,
2121 .self_test = qede_self_test,
2122 .get_module_info = qede_get_module_info,
2123 .get_module_eeprom = qede_get_module_eeprom,
2124 .get_eee = qede_get_eee,
2125 .set_eee = qede_set_eee,
2126
2127 .get_tunable = qede_get_tunable,
2128 .set_tunable = qede_set_tunable,
2129 .flash_device = qede_flash_device,
2130 .get_dump_flag = qede_get_dump_flag,
2131 .get_dump_data = qede_get_dump_data,
2132 .set_dump = qede_set_dump,
2133};
2134
2135static const struct ethtool_ops qede_vf_ethtool_ops = {
2136 .get_link_ksettings = qede_get_link_ksettings,
2137 .get_drvinfo = qede_get_drvinfo,
2138 .get_msglevel = qede_get_msglevel,
2139 .set_msglevel = qede_set_msglevel,
2140 .get_link = qede_get_link,
2141 .get_coalesce = qede_get_coalesce,
2142 .set_coalesce = qede_set_coalesce,
2143 .get_ringparam = qede_get_ringparam,
2144 .set_ringparam = qede_set_ringparam,
2145 .get_strings = qede_get_strings,
2146 .get_ethtool_stats = qede_get_ethtool_stats,
2147 .get_priv_flags = qede_get_priv_flags,
2148 .get_sset_count = qede_get_sset_count,
2149 .get_rxnfc = qede_get_rxnfc,
2150 .set_rxnfc = qede_set_rxnfc,
2151 .get_rxfh_indir_size = qede_get_rxfh_indir_size,
2152 .get_rxfh_key_size = qede_get_rxfh_key_size,
2153 .get_rxfh = qede_get_rxfh,
2154 .set_rxfh = qede_set_rxfh,
2155 .get_channels = qede_get_channels,
2156 .set_channels = qede_set_channels,
2157 .get_tunable = qede_get_tunable,
2158 .set_tunable = qede_set_tunable,
2159};
2160
2161void qede_set_ethtool_ops(struct net_device *dev)
2162{
2163 struct qede_dev *edev = netdev_priv(dev);
2164
2165 if (IS_VF(edev))
2166 dev->ethtool_ops = &qede_vf_ethtool_ops;
2167 else
2168 dev->ethtool_ops = &qede_ethtool_ops;
2169}