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v6.13.7
   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Copyright (C) 2004-2013 Synopsys, Inc. (www.synopsys.com)
   4 *
 
 
 
 
   5 * Driver for the ARC EMAC 10100 (hardware revision 5)
   6 *
   7 * Contributors:
   8 *		Amit Bhor
   9 *		Sameer Dhavale
  10 *		Vineet Gupta
  11 */
  12
  13#include <linux/crc32.h>
  14#include <linux/etherdevice.h>
  15#include <linux/interrupt.h>
  16#include <linux/io.h>
  17#include <linux/module.h>
  18#include <linux/of.h>
  19#include <linux/of_address.h>
  20#include <linux/of_irq.h>
  21#include <linux/of_mdio.h>
  22#include <linux/of_net.h>
 
  23
  24#include "emac.h"
  25
  26static void arc_emac_restart(struct net_device *ndev);
  27
  28/**
  29 * arc_emac_tx_avail - Return the number of available slots in the tx ring.
  30 * @priv: Pointer to ARC EMAC private data structure.
  31 *
  32 * returns: the number of slots available for transmission in tx the ring.
  33 */
  34static inline int arc_emac_tx_avail(struct arc_emac_priv *priv)
  35{
  36	return (priv->txbd_dirty + TX_BD_NUM - priv->txbd_curr - 1) % TX_BD_NUM;
  37}
  38
  39/**
  40 * arc_emac_adjust_link - Adjust the PHY link duplex.
  41 * @ndev:	Pointer to the net_device structure.
  42 *
  43 * This function is called to change the duplex setting after auto negotiation
  44 * is done by the PHY.
  45 */
  46static void arc_emac_adjust_link(struct net_device *ndev)
  47{
  48	struct arc_emac_priv *priv = netdev_priv(ndev);
  49	struct phy_device *phy_dev = ndev->phydev;
  50	unsigned int reg, state_changed = 0;
  51
  52	if (priv->link != phy_dev->link) {
  53		priv->link = phy_dev->link;
  54		state_changed = 1;
  55	}
  56
  57	if (priv->speed != phy_dev->speed) {
  58		priv->speed = phy_dev->speed;
  59		state_changed = 1;
  60		if (priv->set_mac_speed)
  61			priv->set_mac_speed(priv, priv->speed);
  62	}
  63
  64	if (priv->duplex != phy_dev->duplex) {
  65		reg = arc_reg_get(priv, R_CTRL);
  66
  67		if (phy_dev->duplex == DUPLEX_FULL)
  68			reg |= ENFL_MASK;
  69		else
  70			reg &= ~ENFL_MASK;
  71
  72		arc_reg_set(priv, R_CTRL, reg);
  73		priv->duplex = phy_dev->duplex;
  74		state_changed = 1;
  75	}
  76
  77	if (state_changed)
  78		phy_print_status(phy_dev);
  79}
  80
  81/**
  82 * arc_emac_get_drvinfo - Get EMAC driver information.
  83 * @ndev:	Pointer to net_device structure.
  84 * @info:	Pointer to ethtool_drvinfo structure.
  85 *
  86 * This implements ethtool command for getting the driver information.
  87 * Issue "ethtool -i ethX" under linux prompt to execute this function.
  88 */
  89static void arc_emac_get_drvinfo(struct net_device *ndev,
  90				 struct ethtool_drvinfo *info)
  91{
  92	struct arc_emac_priv *priv = netdev_priv(ndev);
  93
  94	strscpy(info->driver, priv->drv_name, sizeof(info->driver));
 
  95}
  96
  97static const struct ethtool_ops arc_emac_ethtool_ops = {
  98	.get_drvinfo	= arc_emac_get_drvinfo,
  99	.get_link	= ethtool_op_get_link,
 100	.get_link_ksettings = phy_ethtool_get_link_ksettings,
 101	.set_link_ksettings = phy_ethtool_set_link_ksettings,
 102};
 103
 104#define FIRST_OR_LAST_MASK	(FIRST_MASK | LAST_MASK)
 105
 106/**
 107 * arc_emac_tx_clean - clears processed by EMAC Tx BDs.
 108 * @ndev:	Pointer to the network device.
 109 */
 110static void arc_emac_tx_clean(struct net_device *ndev)
 111{
 112	struct arc_emac_priv *priv = netdev_priv(ndev);
 113	struct net_device_stats *stats = &ndev->stats;
 114	struct device *dev = ndev->dev.parent;
 115	unsigned int i;
 116
 117	for (i = 0; i < TX_BD_NUM; i++) {
 118		unsigned int *txbd_dirty = &priv->txbd_dirty;
 119		struct arc_emac_bd *txbd = &priv->txbd[*txbd_dirty];
 120		struct buffer_state *tx_buff = &priv->tx_buff[*txbd_dirty];
 121		struct sk_buff *skb = tx_buff->skb;
 122		unsigned int info = le32_to_cpu(txbd->info);
 123
 124		if ((info & FOR_EMAC) || !txbd->data || !skb)
 125			break;
 126
 127		if (unlikely(info & (DROP | DEFR | LTCL | UFLO))) {
 128			stats->tx_errors++;
 129			stats->tx_dropped++;
 130
 131			if (info & DEFR)
 132				stats->tx_carrier_errors++;
 133
 134			if (info & LTCL)
 135				stats->collisions++;
 136
 137			if (info & UFLO)
 138				stats->tx_fifo_errors++;
 139		} else if (likely(info & FIRST_OR_LAST_MASK)) {
 140			stats->tx_packets++;
 141			stats->tx_bytes += skb->len;
 142		}
 143
 144		dma_unmap_single(dev, dma_unmap_addr(tx_buff, addr),
 145				 dma_unmap_len(tx_buff, len), DMA_TO_DEVICE);
 146
 147		/* return the sk_buff to system */
 148		dev_consume_skb_irq(skb);
 149
 150		txbd->data = 0;
 151		txbd->info = 0;
 152		tx_buff->skb = NULL;
 153
 154		*txbd_dirty = (*txbd_dirty + 1) % TX_BD_NUM;
 155	}
 156
 157	/* Ensure that txbd_dirty is visible to tx() before checking
 158	 * for queue stopped.
 159	 */
 160	smp_mb();
 161
 162	if (netif_queue_stopped(ndev) && arc_emac_tx_avail(priv))
 163		netif_wake_queue(ndev);
 164}
 165
 166/**
 167 * arc_emac_rx - processing of Rx packets.
 168 * @ndev:	Pointer to the network device.
 169 * @budget:	How many BDs to process on 1 call.
 170 *
 171 * returns:	Number of processed BDs
 172 *
 173 * Iterate through Rx BDs and deliver received packages to upper layer.
 174 */
 175static int arc_emac_rx(struct net_device *ndev, int budget)
 176{
 177	struct arc_emac_priv *priv = netdev_priv(ndev);
 178	struct device *dev = ndev->dev.parent;
 179	unsigned int work_done;
 180
 181	for (work_done = 0; work_done < budget; work_done++) {
 182		unsigned int *last_rx_bd = &priv->last_rx_bd;
 183		struct net_device_stats *stats = &ndev->stats;
 184		struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd];
 185		struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd];
 186		unsigned int pktlen, info = le32_to_cpu(rxbd->info);
 187		struct sk_buff *skb;
 188		dma_addr_t addr;
 189
 190		if (unlikely((info & OWN_MASK) == FOR_EMAC))
 191			break;
 192
 193		/* Make a note that we saw a packet at this BD.
 194		 * So next time, driver starts from this + 1
 195		 */
 196		*last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM;
 197
 198		if (unlikely((info & FIRST_OR_LAST_MASK) !=
 199			     FIRST_OR_LAST_MASK)) {
 200			/* We pre-allocate buffers of MTU size so incoming
 201			 * packets won't be split/chained.
 202			 */
 203			if (net_ratelimit())
 204				netdev_err(ndev, "incomplete packet received\n");
 205
 206			/* Return ownership to EMAC */
 207			rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
 208			stats->rx_errors++;
 209			stats->rx_length_errors++;
 210			continue;
 211		}
 212
 213		/* Prepare the BD for next cycle. netif_receive_skb()
 214		 * only if new skb was allocated and mapped to avoid holes
 215		 * in the RX fifo.
 216		 */
 217		skb = netdev_alloc_skb_ip_align(ndev, EMAC_BUFFER_SIZE);
 218		if (unlikely(!skb)) {
 219			if (net_ratelimit())
 220				netdev_err(ndev, "cannot allocate skb\n");
 221			/* Return ownership to EMAC */
 222			rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
 223			stats->rx_errors++;
 224			stats->rx_dropped++;
 225			continue;
 226		}
 227
 228		addr = dma_map_single(dev, (void *)skb->data,
 229				      EMAC_BUFFER_SIZE, DMA_FROM_DEVICE);
 230		if (dma_mapping_error(dev, addr)) {
 231			if (net_ratelimit())
 232				netdev_err(ndev, "cannot map dma buffer\n");
 233			dev_kfree_skb(skb);
 234			/* Return ownership to EMAC */
 235			rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
 236			stats->rx_errors++;
 237			stats->rx_dropped++;
 238			continue;
 239		}
 240
 241		/* unmap previosly mapped skb */
 242		dma_unmap_single(dev, dma_unmap_addr(rx_buff, addr),
 243				 dma_unmap_len(rx_buff, len), DMA_FROM_DEVICE);
 244
 245		pktlen = info & LEN_MASK;
 246		stats->rx_packets++;
 247		stats->rx_bytes += pktlen;
 248		skb_put(rx_buff->skb, pktlen);
 249		rx_buff->skb->dev = ndev;
 250		rx_buff->skb->protocol = eth_type_trans(rx_buff->skb, ndev);
 251
 252		netif_receive_skb(rx_buff->skb);
 253
 254		rx_buff->skb = skb;
 255		dma_unmap_addr_set(rx_buff, addr, addr);
 256		dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE);
 257
 258		rxbd->data = cpu_to_le32(addr);
 259
 260		/* Make sure pointer to data buffer is set */
 261		wmb();
 262
 263		/* Return ownership to EMAC */
 264		rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
 265	}
 266
 267	return work_done;
 268}
 269
 270/**
 271 * arc_emac_rx_miss_handle - handle R_MISS register
 272 * @ndev:	Pointer to the net_device structure.
 273 */
 274static void arc_emac_rx_miss_handle(struct net_device *ndev)
 275{
 276	struct arc_emac_priv *priv = netdev_priv(ndev);
 277	struct net_device_stats *stats = &ndev->stats;
 278	unsigned int miss;
 279
 280	miss = arc_reg_get(priv, R_MISS);
 281	if (miss) {
 282		stats->rx_errors += miss;
 283		stats->rx_missed_errors += miss;
 284		priv->rx_missed_errors += miss;
 285	}
 286}
 287
 288/**
 289 * arc_emac_rx_stall_check - check RX stall
 290 * @ndev:	Pointer to the net_device structure.
 291 * @budget:	How many BDs requested to process on 1 call.
 292 * @work_done:	How many BDs processed
 293 *
 294 * Under certain conditions EMAC stop reception of incoming packets and
 295 * continuously increment R_MISS register instead of saving data into
 296 * provided buffer. This function detect that condition and restart
 297 * EMAC.
 298 */
 299static void arc_emac_rx_stall_check(struct net_device *ndev,
 300				    int budget, unsigned int work_done)
 301{
 302	struct arc_emac_priv *priv = netdev_priv(ndev);
 303	struct arc_emac_bd *rxbd;
 304
 305	if (work_done)
 306		priv->rx_missed_errors = 0;
 307
 308	if (priv->rx_missed_errors && budget) {
 309		rxbd = &priv->rxbd[priv->last_rx_bd];
 310		if (le32_to_cpu(rxbd->info) & FOR_EMAC) {
 311			arc_emac_restart(ndev);
 312			priv->rx_missed_errors = 0;
 313		}
 314	}
 315}
 316
 317/**
 318 * arc_emac_poll - NAPI poll handler.
 319 * @napi:	Pointer to napi_struct structure.
 320 * @budget:	How many BDs to process on 1 call.
 321 *
 322 * returns:	Number of processed BDs
 323 */
 324static int arc_emac_poll(struct napi_struct *napi, int budget)
 325{
 326	struct net_device *ndev = napi->dev;
 327	struct arc_emac_priv *priv = netdev_priv(ndev);
 328	unsigned int work_done;
 329
 330	arc_emac_tx_clean(ndev);
 331	arc_emac_rx_miss_handle(ndev);
 332
 333	work_done = arc_emac_rx(ndev, budget);
 334	if (work_done < budget) {
 335		napi_complete_done(napi, work_done);
 336		arc_reg_or(priv, R_ENABLE, RXINT_MASK | TXINT_MASK);
 337	}
 338
 339	arc_emac_rx_stall_check(ndev, budget, work_done);
 340
 341	return work_done;
 342}
 343
 344/**
 345 * arc_emac_intr - Global interrupt handler for EMAC.
 346 * @irq:		irq number.
 347 * @dev_instance:	device instance.
 348 *
 349 * returns: IRQ_HANDLED for all cases.
 350 *
 351 * ARC EMAC has only 1 interrupt line, and depending on bits raised in
 352 * STATUS register we may tell what is a reason for interrupt to fire.
 353 */
 354static irqreturn_t arc_emac_intr(int irq, void *dev_instance)
 355{
 356	struct net_device *ndev = dev_instance;
 357	struct arc_emac_priv *priv = netdev_priv(ndev);
 358	struct net_device_stats *stats = &ndev->stats;
 359	unsigned int status;
 360
 361	status = arc_reg_get(priv, R_STATUS);
 362	status &= ~MDIO_MASK;
 363
 364	/* Reset all flags except "MDIO complete" */
 365	arc_reg_set(priv, R_STATUS, status);
 366
 367	if (status & (RXINT_MASK | TXINT_MASK)) {
 368		if (likely(napi_schedule_prep(&priv->napi))) {
 369			arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK);
 370			__napi_schedule(&priv->napi);
 371		}
 372	}
 373
 374	if (status & ERR_MASK) {
 375		/* MSER/RXCR/RXFR/RXFL interrupt fires on corresponding
 376		 * 8-bit error counter overrun.
 377		 */
 378
 379		if (status & MSER_MASK) {
 380			stats->rx_missed_errors += 0x100;
 381			stats->rx_errors += 0x100;
 382			priv->rx_missed_errors += 0x100;
 383			napi_schedule(&priv->napi);
 384		}
 385
 386		if (status & RXCR_MASK) {
 387			stats->rx_crc_errors += 0x100;
 388			stats->rx_errors += 0x100;
 389		}
 390
 391		if (status & RXFR_MASK) {
 392			stats->rx_frame_errors += 0x100;
 393			stats->rx_errors += 0x100;
 394		}
 395
 396		if (status & RXFL_MASK) {
 397			stats->rx_over_errors += 0x100;
 398			stats->rx_errors += 0x100;
 399		}
 400	}
 401
 402	return IRQ_HANDLED;
 403}
 404
 405#ifdef CONFIG_NET_POLL_CONTROLLER
 406static void arc_emac_poll_controller(struct net_device *dev)
 407{
 408	disable_irq(dev->irq);
 409	arc_emac_intr(dev->irq, dev);
 410	enable_irq(dev->irq);
 411}
 412#endif
 413
 414/**
 415 * arc_emac_open - Open the network device.
 416 * @ndev:	Pointer to the network device.
 417 *
 418 * returns: 0, on success or non-zero error value on failure.
 419 *
 420 * This function sets the MAC address, requests and enables an IRQ
 421 * for the EMAC device and starts the Tx queue.
 422 * It also connects to the phy device.
 423 */
 424static int arc_emac_open(struct net_device *ndev)
 425{
 426	struct arc_emac_priv *priv = netdev_priv(ndev);
 427	struct phy_device *phy_dev = ndev->phydev;
 428	struct device *dev = ndev->dev.parent;
 429	int i;
 430
 431	phy_dev->autoneg = AUTONEG_ENABLE;
 432	phy_dev->speed = 0;
 433	phy_dev->duplex = 0;
 434	linkmode_and(phy_dev->advertising, phy_dev->advertising,
 435		     phy_dev->supported);
 436
 437	priv->last_rx_bd = 0;
 438
 439	/* Allocate and set buffers for Rx BD's */
 440	for (i = 0; i < RX_BD_NUM; i++) {
 441		dma_addr_t addr;
 442		unsigned int *last_rx_bd = &priv->last_rx_bd;
 443		struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd];
 444		struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd];
 445
 446		rx_buff->skb = netdev_alloc_skb_ip_align(ndev,
 447							 EMAC_BUFFER_SIZE);
 448		if (unlikely(!rx_buff->skb))
 449			return -ENOMEM;
 450
 451		addr = dma_map_single(dev, (void *)rx_buff->skb->data,
 452				      EMAC_BUFFER_SIZE, DMA_FROM_DEVICE);
 453		if (dma_mapping_error(dev, addr)) {
 454			netdev_err(ndev, "cannot dma map\n");
 455			dev_kfree_skb(rx_buff->skb);
 456			return -ENOMEM;
 457		}
 458		dma_unmap_addr_set(rx_buff, addr, addr);
 459		dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE);
 460
 461		rxbd->data = cpu_to_le32(addr);
 462
 463		/* Make sure pointer to data buffer is set */
 464		wmb();
 465
 466		/* Return ownership to EMAC */
 467		rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
 468
 469		*last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM;
 470	}
 471
 472	priv->txbd_curr = 0;
 473	priv->txbd_dirty = 0;
 474
 475	/* Clean Tx BD's */
 476	memset(priv->txbd, 0, TX_RING_SZ);
 477
 478	/* Initialize logical address filter */
 479	arc_reg_set(priv, R_LAFL, 0);
 480	arc_reg_set(priv, R_LAFH, 0);
 481
 482	/* Set BD ring pointers for device side */
 483	arc_reg_set(priv, R_RX_RING, (unsigned int)priv->rxbd_dma);
 484	arc_reg_set(priv, R_TX_RING, (unsigned int)priv->txbd_dma);
 485
 486	/* Enable interrupts */
 487	arc_reg_set(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK);
 488
 489	/* Set CONTROL */
 490	arc_reg_set(priv, R_CTRL,
 491		    (RX_BD_NUM << 24) |	/* RX BD table length */
 492		    (TX_BD_NUM << 16) |	/* TX BD table length */
 493		    TXRN_MASK | RXRN_MASK);
 494
 495	napi_enable(&priv->napi);
 496
 497	/* Enable EMAC */
 498	arc_reg_or(priv, R_CTRL, EN_MASK);
 499
 500	phy_start(ndev->phydev);
 501
 502	netif_start_queue(ndev);
 503
 504	return 0;
 505}
 506
 507/**
 508 * arc_emac_set_rx_mode - Change the receive filtering mode.
 509 * @ndev:	Pointer to the network device.
 510 *
 511 * This function enables/disables promiscuous or all-multicast mode
 512 * and updates the multicast filtering list of the network device.
 513 */
 514static void arc_emac_set_rx_mode(struct net_device *ndev)
 515{
 516	struct arc_emac_priv *priv = netdev_priv(ndev);
 517
 518	if (ndev->flags & IFF_PROMISC) {
 519		arc_reg_or(priv, R_CTRL, PROM_MASK);
 520	} else {
 521		arc_reg_clr(priv, R_CTRL, PROM_MASK);
 522
 523		if (ndev->flags & IFF_ALLMULTI) {
 524			arc_reg_set(priv, R_LAFL, ~0);
 525			arc_reg_set(priv, R_LAFH, ~0);
 526		} else if (ndev->flags & IFF_MULTICAST) {
 527			struct netdev_hw_addr *ha;
 528			unsigned int filter[2] = { 0, 0 };
 529			int bit;
 530
 531			netdev_for_each_mc_addr(ha, ndev) {
 532				bit = ether_crc_le(ETH_ALEN, ha->addr) >> 26;
 533				filter[bit >> 5] |= 1 << (bit & 31);
 534			}
 535
 536			arc_reg_set(priv, R_LAFL, filter[0]);
 537			arc_reg_set(priv, R_LAFH, filter[1]);
 538		} else {
 539			arc_reg_set(priv, R_LAFL, 0);
 540			arc_reg_set(priv, R_LAFH, 0);
 541		}
 542	}
 543}
 544
 545/**
 546 * arc_free_tx_queue - free skb from tx queue
 547 * @ndev:	Pointer to the network device.
 548 *
 549 * This function must be called while EMAC disable
 550 */
 551static void arc_free_tx_queue(struct net_device *ndev)
 552{
 553	struct arc_emac_priv *priv = netdev_priv(ndev);
 554	struct device *dev = ndev->dev.parent;
 555	unsigned int i;
 556
 557	for (i = 0; i < TX_BD_NUM; i++) {
 558		struct arc_emac_bd *txbd = &priv->txbd[i];
 559		struct buffer_state *tx_buff = &priv->tx_buff[i];
 560
 561		if (tx_buff->skb) {
 562			dma_unmap_single(dev,
 563					 dma_unmap_addr(tx_buff, addr),
 564					 dma_unmap_len(tx_buff, len),
 565					 DMA_TO_DEVICE);
 566
 567			/* return the sk_buff to system */
 568			dev_kfree_skb_irq(tx_buff->skb);
 569		}
 570
 571		txbd->info = 0;
 572		txbd->data = 0;
 573		tx_buff->skb = NULL;
 574	}
 575}
 576
 577/**
 578 * arc_free_rx_queue - free skb from rx queue
 579 * @ndev:	Pointer to the network device.
 580 *
 581 * This function must be called while EMAC disable
 582 */
 583static void arc_free_rx_queue(struct net_device *ndev)
 584{
 585	struct arc_emac_priv *priv = netdev_priv(ndev);
 586	struct device *dev = ndev->dev.parent;
 587	unsigned int i;
 588
 589	for (i = 0; i < RX_BD_NUM; i++) {
 590		struct arc_emac_bd *rxbd = &priv->rxbd[i];
 591		struct buffer_state *rx_buff = &priv->rx_buff[i];
 592
 593		if (rx_buff->skb) {
 594			dma_unmap_single(dev,
 595					 dma_unmap_addr(rx_buff, addr),
 596					 dma_unmap_len(rx_buff, len),
 597					 DMA_FROM_DEVICE);
 598
 599			/* return the sk_buff to system */
 600			dev_kfree_skb_irq(rx_buff->skb);
 601		}
 602
 603		rxbd->info = 0;
 604		rxbd->data = 0;
 605		rx_buff->skb = NULL;
 606	}
 607}
 608
 609/**
 610 * arc_emac_stop - Close the network device.
 611 * @ndev:	Pointer to the network device.
 612 *
 613 * This function stops the Tx queue, disables interrupts and frees the IRQ for
 614 * the EMAC device.
 615 * It also disconnects the PHY device associated with the EMAC device.
 616 */
 617static int arc_emac_stop(struct net_device *ndev)
 618{
 619	struct arc_emac_priv *priv = netdev_priv(ndev);
 620
 621	napi_disable(&priv->napi);
 622	netif_stop_queue(ndev);
 623
 624	phy_stop(ndev->phydev);
 625
 626	/* Disable interrupts */
 627	arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK);
 628
 629	/* Disable EMAC */
 630	arc_reg_clr(priv, R_CTRL, EN_MASK);
 631
 632	/* Return the sk_buff to system */
 633	arc_free_tx_queue(ndev);
 634	arc_free_rx_queue(ndev);
 635
 636	return 0;
 637}
 638
 639/**
 640 * arc_emac_stats - Get system network statistics.
 641 * @ndev:	Pointer to net_device structure.
 642 *
 643 * Returns the address of the device statistics structure.
 644 * Statistics are updated in interrupt handler.
 645 */
 646static struct net_device_stats *arc_emac_stats(struct net_device *ndev)
 647{
 648	struct arc_emac_priv *priv = netdev_priv(ndev);
 649	struct net_device_stats *stats = &ndev->stats;
 650	unsigned long miss, rxerr;
 651	u8 rxcrc, rxfram, rxoflow;
 652
 653	rxerr = arc_reg_get(priv, R_RXERR);
 654	miss = arc_reg_get(priv, R_MISS);
 655
 656	rxcrc = rxerr;
 657	rxfram = rxerr >> 8;
 658	rxoflow = rxerr >> 16;
 659
 660	stats->rx_errors += miss;
 661	stats->rx_errors += rxcrc + rxfram + rxoflow;
 662
 663	stats->rx_over_errors += rxoflow;
 664	stats->rx_frame_errors += rxfram;
 665	stats->rx_crc_errors += rxcrc;
 666	stats->rx_missed_errors += miss;
 667
 668	return stats;
 669}
 670
 671/**
 672 * arc_emac_tx - Starts the data transmission.
 673 * @skb:	sk_buff pointer that contains data to be Transmitted.
 674 * @ndev:	Pointer to net_device structure.
 675 *
 676 * returns: NETDEV_TX_OK, on success
 677 *		NETDEV_TX_BUSY, if any of the descriptors are not free.
 678 *
 679 * This function is invoked from upper layers to initiate transmission.
 680 */
 681static netdev_tx_t arc_emac_tx(struct sk_buff *skb, struct net_device *ndev)
 682{
 683	struct arc_emac_priv *priv = netdev_priv(ndev);
 684	unsigned int len, *txbd_curr = &priv->txbd_curr;
 685	struct net_device_stats *stats = &ndev->stats;
 686	__le32 *info = &priv->txbd[*txbd_curr].info;
 687	struct device *dev = ndev->dev.parent;
 688	dma_addr_t addr;
 689
 690	if (skb_padto(skb, ETH_ZLEN))
 691		return NETDEV_TX_OK;
 692
 693	len = max_t(unsigned int, ETH_ZLEN, skb->len);
 694
 695	if (unlikely(!arc_emac_tx_avail(priv))) {
 696		netif_stop_queue(ndev);
 697		netdev_err(ndev, "BUG! Tx Ring full when queue awake!\n");
 698		return NETDEV_TX_BUSY;
 699	}
 700
 701	addr = dma_map_single(dev, (void *)skb->data, len, DMA_TO_DEVICE);
 
 702
 703	if (unlikely(dma_mapping_error(dev, addr))) {
 704		stats->tx_dropped++;
 705		stats->tx_errors++;
 706		dev_kfree_skb_any(skb);
 707		return NETDEV_TX_OK;
 708	}
 709	dma_unmap_addr_set(&priv->tx_buff[*txbd_curr], addr, addr);
 710	dma_unmap_len_set(&priv->tx_buff[*txbd_curr], len, len);
 711
 712	priv->txbd[*txbd_curr].data = cpu_to_le32(addr);
 713
 714	/* Make sure pointer to data buffer is set */
 715	wmb();
 716
 717	skb_tx_timestamp(skb);
 718
 719	*info = cpu_to_le32(FOR_EMAC | FIRST_OR_LAST_MASK | len);
 720
 721	/* Make sure info word is set */
 722	wmb();
 723
 724	priv->tx_buff[*txbd_curr].skb = skb;
 725
 726	/* Increment index to point to the next BD */
 727	*txbd_curr = (*txbd_curr + 1) % TX_BD_NUM;
 728
 729	/* Ensure that tx_clean() sees the new txbd_curr before
 730	 * checking the queue status. This prevents an unneeded wake
 731	 * of the queue in tx_clean().
 732	 */
 733	smp_mb();
 734
 735	if (!arc_emac_tx_avail(priv)) {
 736		netif_stop_queue(ndev);
 737		/* Refresh tx_dirty */
 738		smp_mb();
 739		if (arc_emac_tx_avail(priv))
 740			netif_start_queue(ndev);
 741	}
 742
 743	arc_reg_set(priv, R_STATUS, TXPL_MASK);
 744
 745	return NETDEV_TX_OK;
 746}
 747
 748static void arc_emac_set_address_internal(struct net_device *ndev)
 749{
 750	struct arc_emac_priv *priv = netdev_priv(ndev);
 751	unsigned int addr_low, addr_hi;
 752
 753	addr_low = le32_to_cpu(*(__le32 *)&ndev->dev_addr[0]);
 754	addr_hi = le16_to_cpu(*(__le16 *)&ndev->dev_addr[4]);
 755
 756	arc_reg_set(priv, R_ADDRL, addr_low);
 757	arc_reg_set(priv, R_ADDRH, addr_hi);
 758}
 759
 760/**
 761 * arc_emac_set_address - Set the MAC address for this device.
 762 * @ndev:	Pointer to net_device structure.
 763 * @p:		6 byte Address to be written as MAC address.
 764 *
 765 * This function copies the HW address from the sockaddr structure to the
 766 * net_device structure and updates the address in HW.
 767 *
 768 * returns:	-EBUSY if the net device is busy or 0 if the address is set
 769 *		successfully.
 770 */
 771static int arc_emac_set_address(struct net_device *ndev, void *p)
 772{
 773	struct sockaddr *addr = p;
 774
 775	if (netif_running(ndev))
 776		return -EBUSY;
 777
 778	if (!is_valid_ether_addr(addr->sa_data))
 779		return -EADDRNOTAVAIL;
 780
 781	eth_hw_addr_set(ndev, addr->sa_data);
 782
 783	arc_emac_set_address_internal(ndev);
 784
 785	return 0;
 786}
 787
 
 
 
 
 
 
 
 
 
 
 
 
 788/**
 789 * arc_emac_restart - Restart EMAC
 790 * @ndev:	Pointer to net_device structure.
 791 *
 792 * This function do hardware reset of EMAC in order to restore
 793 * network packets reception.
 794 */
 795static void arc_emac_restart(struct net_device *ndev)
 796{
 797	struct arc_emac_priv *priv = netdev_priv(ndev);
 798	struct net_device_stats *stats = &ndev->stats;
 799	int i;
 800
 801	if (net_ratelimit())
 802		netdev_warn(ndev, "restarting stalled EMAC\n");
 803
 804	netif_stop_queue(ndev);
 805
 806	/* Disable interrupts */
 807	arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK);
 808
 809	/* Disable EMAC */
 810	arc_reg_clr(priv, R_CTRL, EN_MASK);
 811
 812	/* Return the sk_buff to system */
 813	arc_free_tx_queue(ndev);
 814
 815	/* Clean Tx BD's */
 816	priv->txbd_curr = 0;
 817	priv->txbd_dirty = 0;
 818	memset(priv->txbd, 0, TX_RING_SZ);
 819
 820	for (i = 0; i < RX_BD_NUM; i++) {
 821		struct arc_emac_bd *rxbd = &priv->rxbd[i];
 822		unsigned int info = le32_to_cpu(rxbd->info);
 823
 824		if (!(info & FOR_EMAC)) {
 825			stats->rx_errors++;
 826			stats->rx_dropped++;
 827		}
 828		/* Return ownership to EMAC */
 829		rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
 830	}
 831	priv->last_rx_bd = 0;
 832
 833	/* Make sure info is visible to EMAC before enable */
 834	wmb();
 835
 836	/* Enable interrupts */
 837	arc_reg_set(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK);
 838
 839	/* Enable EMAC */
 840	arc_reg_or(priv, R_CTRL, EN_MASK);
 841
 842	netif_start_queue(ndev);
 843}
 844
 845static const struct net_device_ops arc_emac_netdev_ops = {
 846	.ndo_open		= arc_emac_open,
 847	.ndo_stop		= arc_emac_stop,
 848	.ndo_start_xmit		= arc_emac_tx,
 849	.ndo_set_mac_address	= arc_emac_set_address,
 850	.ndo_get_stats		= arc_emac_stats,
 851	.ndo_set_rx_mode	= arc_emac_set_rx_mode,
 852	.ndo_eth_ioctl		= phy_do_ioctl_running,
 853#ifdef CONFIG_NET_POLL_CONTROLLER
 854	.ndo_poll_controller	= arc_emac_poll_controller,
 855#endif
 856};
 857
 858int arc_emac_probe(struct net_device *ndev, int interface)
 859{
 860	struct device *dev = ndev->dev.parent;
 861	struct resource res_regs;
 862	struct device_node *phy_node;
 863	struct phy_device *phydev = NULL;
 864	struct arc_emac_priv *priv;
 
 865	unsigned int id, clock_frequency, irq;
 866	int err;
 867
 868	/* Get PHY from device tree */
 869	phy_node = of_parse_phandle(dev->of_node, "phy", 0);
 870	if (!phy_node) {
 871		dev_err(dev, "failed to retrieve phy description from device tree\n");
 872		return -ENODEV;
 873	}
 874
 875	/* Get EMAC registers base address from device tree */
 876	err = of_address_to_resource(dev->of_node, 0, &res_regs);
 877	if (err) {
 878		dev_err(dev, "failed to retrieve registers base from device tree\n");
 879		err = -ENODEV;
 880		goto out_put_node;
 881	}
 882
 883	/* Get IRQ from device tree */
 884	irq = irq_of_parse_and_map(dev->of_node, 0);
 885	if (!irq) {
 886		dev_err(dev, "failed to retrieve <irq> value from device tree\n");
 887		err = -ENODEV;
 888		goto out_put_node;
 889	}
 890
 891	ndev->netdev_ops = &arc_emac_netdev_ops;
 892	ndev->ethtool_ops = &arc_emac_ethtool_ops;
 893	ndev->watchdog_timeo = TX_TIMEOUT;
 894
 895	priv = netdev_priv(ndev);
 896	priv->dev = dev;
 897
 898	priv->regs = devm_ioremap_resource(dev, &res_regs);
 899	if (IS_ERR(priv->regs)) {
 900		err = PTR_ERR(priv->regs);
 901		goto out_put_node;
 902	}
 903
 904	dev_dbg(dev, "Registers base address is 0x%p\n", priv->regs);
 905
 906	if (priv->clk) {
 907		err = clk_prepare_enable(priv->clk);
 908		if (err) {
 909			dev_err(dev, "failed to enable clock\n");
 910			goto out_put_node;
 911		}
 912
 913		clock_frequency = clk_get_rate(priv->clk);
 914	} else {
 915		/* Get CPU clock frequency from device tree */
 916		if (of_property_read_u32(dev->of_node, "clock-frequency",
 917					 &clock_frequency)) {
 918			dev_err(dev, "failed to retrieve <clock-frequency> from device tree\n");
 919			err = -EINVAL;
 920			goto out_put_node;
 921		}
 922	}
 923
 924	id = arc_reg_get(priv, R_ID);
 925
 926	/* Check for EMAC revision 5 or 7, magic number */
 927	if (!(id == 0x0005fd02 || id == 0x0007fd02)) {
 928		dev_err(dev, "ARC EMAC not detected, id=0x%x\n", id);
 929		err = -ENODEV;
 930		goto out_clken;
 931	}
 932	dev_info(dev, "ARC EMAC detected with id: 0x%x\n", id);
 933
 934	/* Set poll rate so that it polls every 1 ms */
 935	arc_reg_set(priv, R_POLLRATE, clock_frequency / 1000000);
 936
 937	ndev->irq = irq;
 938	dev_info(dev, "IRQ is %d\n", ndev->irq);
 939
 940	/* Register interrupt handler for device */
 941	err = devm_request_irq(dev, ndev->irq, arc_emac_intr, 0,
 942			       ndev->name, ndev);
 943	if (err) {
 944		dev_err(dev, "could not allocate IRQ\n");
 945		goto out_clken;
 946	}
 947
 948	/* Get MAC address from device tree */
 949	err = of_get_ethdev_address(dev->of_node, ndev);
 950	if (err)
 
 
 
 951		eth_hw_addr_random(ndev);
 952
 953	arc_emac_set_address_internal(ndev);
 954	dev_info(dev, "MAC address is now %pM\n", ndev->dev_addr);
 955
 956	/* Do 1 allocation instead of 2 separate ones for Rx and Tx BD rings */
 957	priv->rxbd = dmam_alloc_coherent(dev, RX_RING_SZ + TX_RING_SZ,
 958					 &priv->rxbd_dma, GFP_KERNEL);
 959
 960	if (!priv->rxbd) {
 961		dev_err(dev, "failed to allocate data buffers\n");
 962		err = -ENOMEM;
 963		goto out_clken;
 964	}
 965
 966	priv->txbd = priv->rxbd + RX_BD_NUM;
 967
 968	priv->txbd_dma = priv->rxbd_dma + RX_RING_SZ;
 969	dev_dbg(dev, "EMAC Device addr: Rx Ring [0x%x], Tx Ring[%x]\n",
 970		(unsigned int)priv->rxbd_dma, (unsigned int)priv->txbd_dma);
 971
 972	err = arc_mdio_probe(priv);
 973	if (err) {
 974		dev_err(dev, "failed to probe MII bus\n");
 975		goto out_clken;
 976	}
 977
 978	phydev = of_phy_connect(ndev, phy_node, arc_emac_adjust_link, 0,
 979				interface);
 980	if (!phydev) {
 981		dev_err(dev, "of_phy_connect() failed\n");
 982		err = -ENODEV;
 983		goto out_mdio;
 984	}
 985
 986	dev_info(dev, "connected to %s phy with id 0x%x\n",
 987		 phydev->drv->name, phydev->phy_id);
 988
 989	netif_napi_add_weight(ndev, &priv->napi, arc_emac_poll,
 990			      ARC_EMAC_NAPI_WEIGHT);
 991
 992	err = register_netdev(ndev);
 993	if (err) {
 994		dev_err(dev, "failed to register network device\n");
 995		goto out_netif_api;
 996	}
 997
 998	of_node_put(phy_node);
 999	return 0;
1000
1001out_netif_api:
1002	netif_napi_del(&priv->napi);
1003	phy_disconnect(phydev);
1004out_mdio:
1005	arc_mdio_remove(priv);
1006out_clken:
1007	if (priv->clk)
1008		clk_disable_unprepare(priv->clk);
1009out_put_node:
1010	of_node_put(phy_node);
1011
1012	return err;
1013}
1014EXPORT_SYMBOL_GPL(arc_emac_probe);
1015
1016void arc_emac_remove(struct net_device *ndev)
1017{
1018	struct arc_emac_priv *priv = netdev_priv(ndev);
1019
1020	phy_disconnect(ndev->phydev);
1021	arc_mdio_remove(priv);
1022	unregister_netdev(ndev);
1023	netif_napi_del(&priv->napi);
1024
1025	if (!IS_ERR(priv->clk))
1026		clk_disable_unprepare(priv->clk);
 
 
1027}
1028EXPORT_SYMBOL_GPL(arc_emac_remove);
1029
1030MODULE_AUTHOR("Alexey Brodkin <abrodkin@synopsys.com>");
1031MODULE_DESCRIPTION("ARC EMAC driver");
1032MODULE_LICENSE("GPL");
v4.17
 
   1/*
   2 * Copyright (C) 2004-2013 Synopsys, Inc. (www.synopsys.com)
   3 *
   4 * This program is free software; you can redistribute it and/or modify
   5 * it under the terms of the GNU General Public License version 2 as
   6 * published by the Free Software Foundation.
   7 *
   8 * Driver for the ARC EMAC 10100 (hardware revision 5)
   9 *
  10 * Contributors:
  11 *		Amit Bhor
  12 *		Sameer Dhavale
  13 *		Vineet Gupta
  14 */
  15
  16#include <linux/crc32.h>
  17#include <linux/etherdevice.h>
  18#include <linux/interrupt.h>
  19#include <linux/io.h>
  20#include <linux/module.h>
 
  21#include <linux/of_address.h>
  22#include <linux/of_irq.h>
  23#include <linux/of_mdio.h>
  24#include <linux/of_net.h>
  25#include <linux/of_platform.h>
  26
  27#include "emac.h"
  28
  29static void arc_emac_restart(struct net_device *ndev);
  30
  31/**
  32 * arc_emac_tx_avail - Return the number of available slots in the tx ring.
  33 * @priv: Pointer to ARC EMAC private data structure.
  34 *
  35 * returns: the number of slots available for transmission in tx the ring.
  36 */
  37static inline int arc_emac_tx_avail(struct arc_emac_priv *priv)
  38{
  39	return (priv->txbd_dirty + TX_BD_NUM - priv->txbd_curr - 1) % TX_BD_NUM;
  40}
  41
  42/**
  43 * arc_emac_adjust_link - Adjust the PHY link duplex.
  44 * @ndev:	Pointer to the net_device structure.
  45 *
  46 * This function is called to change the duplex setting after auto negotiation
  47 * is done by the PHY.
  48 */
  49static void arc_emac_adjust_link(struct net_device *ndev)
  50{
  51	struct arc_emac_priv *priv = netdev_priv(ndev);
  52	struct phy_device *phy_dev = ndev->phydev;
  53	unsigned int reg, state_changed = 0;
  54
  55	if (priv->link != phy_dev->link) {
  56		priv->link = phy_dev->link;
  57		state_changed = 1;
  58	}
  59
  60	if (priv->speed != phy_dev->speed) {
  61		priv->speed = phy_dev->speed;
  62		state_changed = 1;
  63		if (priv->set_mac_speed)
  64			priv->set_mac_speed(priv, priv->speed);
  65	}
  66
  67	if (priv->duplex != phy_dev->duplex) {
  68		reg = arc_reg_get(priv, R_CTRL);
  69
  70		if (phy_dev->duplex == DUPLEX_FULL)
  71			reg |= ENFL_MASK;
  72		else
  73			reg &= ~ENFL_MASK;
  74
  75		arc_reg_set(priv, R_CTRL, reg);
  76		priv->duplex = phy_dev->duplex;
  77		state_changed = 1;
  78	}
  79
  80	if (state_changed)
  81		phy_print_status(phy_dev);
  82}
  83
  84/**
  85 * arc_emac_get_drvinfo - Get EMAC driver information.
  86 * @ndev:	Pointer to net_device structure.
  87 * @info:	Pointer to ethtool_drvinfo structure.
  88 *
  89 * This implements ethtool command for getting the driver information.
  90 * Issue "ethtool -i ethX" under linux prompt to execute this function.
  91 */
  92static void arc_emac_get_drvinfo(struct net_device *ndev,
  93				 struct ethtool_drvinfo *info)
  94{
  95	struct arc_emac_priv *priv = netdev_priv(ndev);
  96
  97	strlcpy(info->driver, priv->drv_name, sizeof(info->driver));
  98	strlcpy(info->version, priv->drv_version, sizeof(info->version));
  99}
 100
 101static const struct ethtool_ops arc_emac_ethtool_ops = {
 102	.get_drvinfo	= arc_emac_get_drvinfo,
 103	.get_link	= ethtool_op_get_link,
 104	.get_link_ksettings = phy_ethtool_get_link_ksettings,
 105	.set_link_ksettings = phy_ethtool_set_link_ksettings,
 106};
 107
 108#define FIRST_OR_LAST_MASK	(FIRST_MASK | LAST_MASK)
 109
 110/**
 111 * arc_emac_tx_clean - clears processed by EMAC Tx BDs.
 112 * @ndev:	Pointer to the network device.
 113 */
 114static void arc_emac_tx_clean(struct net_device *ndev)
 115{
 116	struct arc_emac_priv *priv = netdev_priv(ndev);
 117	struct net_device_stats *stats = &ndev->stats;
 
 118	unsigned int i;
 119
 120	for (i = 0; i < TX_BD_NUM; i++) {
 121		unsigned int *txbd_dirty = &priv->txbd_dirty;
 122		struct arc_emac_bd *txbd = &priv->txbd[*txbd_dirty];
 123		struct buffer_state *tx_buff = &priv->tx_buff[*txbd_dirty];
 124		struct sk_buff *skb = tx_buff->skb;
 125		unsigned int info = le32_to_cpu(txbd->info);
 126
 127		if ((info & FOR_EMAC) || !txbd->data || !skb)
 128			break;
 129
 130		if (unlikely(info & (DROP | DEFR | LTCL | UFLO))) {
 131			stats->tx_errors++;
 132			stats->tx_dropped++;
 133
 134			if (info & DEFR)
 135				stats->tx_carrier_errors++;
 136
 137			if (info & LTCL)
 138				stats->collisions++;
 139
 140			if (info & UFLO)
 141				stats->tx_fifo_errors++;
 142		} else if (likely(info & FIRST_OR_LAST_MASK)) {
 143			stats->tx_packets++;
 144			stats->tx_bytes += skb->len;
 145		}
 146
 147		dma_unmap_single(&ndev->dev, dma_unmap_addr(tx_buff, addr),
 148				 dma_unmap_len(tx_buff, len), DMA_TO_DEVICE);
 149
 150		/* return the sk_buff to system */
 151		dev_kfree_skb_irq(skb);
 152
 153		txbd->data = 0;
 154		txbd->info = 0;
 155		tx_buff->skb = NULL;
 156
 157		*txbd_dirty = (*txbd_dirty + 1) % TX_BD_NUM;
 158	}
 159
 160	/* Ensure that txbd_dirty is visible to tx() before checking
 161	 * for queue stopped.
 162	 */
 163	smp_mb();
 164
 165	if (netif_queue_stopped(ndev) && arc_emac_tx_avail(priv))
 166		netif_wake_queue(ndev);
 167}
 168
 169/**
 170 * arc_emac_rx - processing of Rx packets.
 171 * @ndev:	Pointer to the network device.
 172 * @budget:	How many BDs to process on 1 call.
 173 *
 174 * returns:	Number of processed BDs
 175 *
 176 * Iterate through Rx BDs and deliver received packages to upper layer.
 177 */
 178static int arc_emac_rx(struct net_device *ndev, int budget)
 179{
 180	struct arc_emac_priv *priv = netdev_priv(ndev);
 
 181	unsigned int work_done;
 182
 183	for (work_done = 0; work_done < budget; work_done++) {
 184		unsigned int *last_rx_bd = &priv->last_rx_bd;
 185		struct net_device_stats *stats = &ndev->stats;
 186		struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd];
 187		struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd];
 188		unsigned int pktlen, info = le32_to_cpu(rxbd->info);
 189		struct sk_buff *skb;
 190		dma_addr_t addr;
 191
 192		if (unlikely((info & OWN_MASK) == FOR_EMAC))
 193			break;
 194
 195		/* Make a note that we saw a packet at this BD.
 196		 * So next time, driver starts from this + 1
 197		 */
 198		*last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM;
 199
 200		if (unlikely((info & FIRST_OR_LAST_MASK) !=
 201			     FIRST_OR_LAST_MASK)) {
 202			/* We pre-allocate buffers of MTU size so incoming
 203			 * packets won't be split/chained.
 204			 */
 205			if (net_ratelimit())
 206				netdev_err(ndev, "incomplete packet received\n");
 207
 208			/* Return ownership to EMAC */
 209			rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
 210			stats->rx_errors++;
 211			stats->rx_length_errors++;
 212			continue;
 213		}
 214
 215		/* Prepare the BD for next cycle. netif_receive_skb()
 216		 * only if new skb was allocated and mapped to avoid holes
 217		 * in the RX fifo.
 218		 */
 219		skb = netdev_alloc_skb_ip_align(ndev, EMAC_BUFFER_SIZE);
 220		if (unlikely(!skb)) {
 221			if (net_ratelimit())
 222				netdev_err(ndev, "cannot allocate skb\n");
 223			/* Return ownership to EMAC */
 224			rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
 225			stats->rx_errors++;
 226			stats->rx_dropped++;
 227			continue;
 228		}
 229
 230		addr = dma_map_single(&ndev->dev, (void *)skb->data,
 231				      EMAC_BUFFER_SIZE, DMA_FROM_DEVICE);
 232		if (dma_mapping_error(&ndev->dev, addr)) {
 233			if (net_ratelimit())
 234				netdev_err(ndev, "cannot map dma buffer\n");
 235			dev_kfree_skb(skb);
 236			/* Return ownership to EMAC */
 237			rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
 238			stats->rx_errors++;
 239			stats->rx_dropped++;
 240			continue;
 241		}
 242
 243		/* unmap previosly mapped skb */
 244		dma_unmap_single(&ndev->dev, dma_unmap_addr(rx_buff, addr),
 245				 dma_unmap_len(rx_buff, len), DMA_FROM_DEVICE);
 246
 247		pktlen = info & LEN_MASK;
 248		stats->rx_packets++;
 249		stats->rx_bytes += pktlen;
 250		skb_put(rx_buff->skb, pktlen);
 251		rx_buff->skb->dev = ndev;
 252		rx_buff->skb->protocol = eth_type_trans(rx_buff->skb, ndev);
 253
 254		netif_receive_skb(rx_buff->skb);
 255
 256		rx_buff->skb = skb;
 257		dma_unmap_addr_set(rx_buff, addr, addr);
 258		dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE);
 259
 260		rxbd->data = cpu_to_le32(addr);
 261
 262		/* Make sure pointer to data buffer is set */
 263		wmb();
 264
 265		/* Return ownership to EMAC */
 266		rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
 267	}
 268
 269	return work_done;
 270}
 271
 272/**
 273 * arc_emac_rx_miss_handle - handle R_MISS register
 274 * @ndev:	Pointer to the net_device structure.
 275 */
 276static void arc_emac_rx_miss_handle(struct net_device *ndev)
 277{
 278	struct arc_emac_priv *priv = netdev_priv(ndev);
 279	struct net_device_stats *stats = &ndev->stats;
 280	unsigned int miss;
 281
 282	miss = arc_reg_get(priv, R_MISS);
 283	if (miss) {
 284		stats->rx_errors += miss;
 285		stats->rx_missed_errors += miss;
 286		priv->rx_missed_errors += miss;
 287	}
 288}
 289
 290/**
 291 * arc_emac_rx_stall_check - check RX stall
 292 * @ndev:	Pointer to the net_device structure.
 293 * @budget:	How many BDs requested to process on 1 call.
 294 * @work_done:	How many BDs processed
 295 *
 296 * Under certain conditions EMAC stop reception of incoming packets and
 297 * continuously increment R_MISS register instead of saving data into
 298 * provided buffer. This function detect that condition and restart
 299 * EMAC.
 300 */
 301static void arc_emac_rx_stall_check(struct net_device *ndev,
 302				    int budget, unsigned int work_done)
 303{
 304	struct arc_emac_priv *priv = netdev_priv(ndev);
 305	struct arc_emac_bd *rxbd;
 306
 307	if (work_done)
 308		priv->rx_missed_errors = 0;
 309
 310	if (priv->rx_missed_errors && budget) {
 311		rxbd = &priv->rxbd[priv->last_rx_bd];
 312		if (le32_to_cpu(rxbd->info) & FOR_EMAC) {
 313			arc_emac_restart(ndev);
 314			priv->rx_missed_errors = 0;
 315		}
 316	}
 317}
 318
 319/**
 320 * arc_emac_poll - NAPI poll handler.
 321 * @napi:	Pointer to napi_struct structure.
 322 * @budget:	How many BDs to process on 1 call.
 323 *
 324 * returns:	Number of processed BDs
 325 */
 326static int arc_emac_poll(struct napi_struct *napi, int budget)
 327{
 328	struct net_device *ndev = napi->dev;
 329	struct arc_emac_priv *priv = netdev_priv(ndev);
 330	unsigned int work_done;
 331
 332	arc_emac_tx_clean(ndev);
 333	arc_emac_rx_miss_handle(ndev);
 334
 335	work_done = arc_emac_rx(ndev, budget);
 336	if (work_done < budget) {
 337		napi_complete_done(napi, work_done);
 338		arc_reg_or(priv, R_ENABLE, RXINT_MASK | TXINT_MASK);
 339	}
 340
 341	arc_emac_rx_stall_check(ndev, budget, work_done);
 342
 343	return work_done;
 344}
 345
 346/**
 347 * arc_emac_intr - Global interrupt handler for EMAC.
 348 * @irq:		irq number.
 349 * @dev_instance:	device instance.
 350 *
 351 * returns: IRQ_HANDLED for all cases.
 352 *
 353 * ARC EMAC has only 1 interrupt line, and depending on bits raised in
 354 * STATUS register we may tell what is a reason for interrupt to fire.
 355 */
 356static irqreturn_t arc_emac_intr(int irq, void *dev_instance)
 357{
 358	struct net_device *ndev = dev_instance;
 359	struct arc_emac_priv *priv = netdev_priv(ndev);
 360	struct net_device_stats *stats = &ndev->stats;
 361	unsigned int status;
 362
 363	status = arc_reg_get(priv, R_STATUS);
 364	status &= ~MDIO_MASK;
 365
 366	/* Reset all flags except "MDIO complete" */
 367	arc_reg_set(priv, R_STATUS, status);
 368
 369	if (status & (RXINT_MASK | TXINT_MASK)) {
 370		if (likely(napi_schedule_prep(&priv->napi))) {
 371			arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK);
 372			__napi_schedule(&priv->napi);
 373		}
 374	}
 375
 376	if (status & ERR_MASK) {
 377		/* MSER/RXCR/RXFR/RXFL interrupt fires on corresponding
 378		 * 8-bit error counter overrun.
 379		 */
 380
 381		if (status & MSER_MASK) {
 382			stats->rx_missed_errors += 0x100;
 383			stats->rx_errors += 0x100;
 384			priv->rx_missed_errors += 0x100;
 385			napi_schedule(&priv->napi);
 386		}
 387
 388		if (status & RXCR_MASK) {
 389			stats->rx_crc_errors += 0x100;
 390			stats->rx_errors += 0x100;
 391		}
 392
 393		if (status & RXFR_MASK) {
 394			stats->rx_frame_errors += 0x100;
 395			stats->rx_errors += 0x100;
 396		}
 397
 398		if (status & RXFL_MASK) {
 399			stats->rx_over_errors += 0x100;
 400			stats->rx_errors += 0x100;
 401		}
 402	}
 403
 404	return IRQ_HANDLED;
 405}
 406
 407#ifdef CONFIG_NET_POLL_CONTROLLER
 408static void arc_emac_poll_controller(struct net_device *dev)
 409{
 410	disable_irq(dev->irq);
 411	arc_emac_intr(dev->irq, dev);
 412	enable_irq(dev->irq);
 413}
 414#endif
 415
 416/**
 417 * arc_emac_open - Open the network device.
 418 * @ndev:	Pointer to the network device.
 419 *
 420 * returns: 0, on success or non-zero error value on failure.
 421 *
 422 * This function sets the MAC address, requests and enables an IRQ
 423 * for the EMAC device and starts the Tx queue.
 424 * It also connects to the phy device.
 425 */
 426static int arc_emac_open(struct net_device *ndev)
 427{
 428	struct arc_emac_priv *priv = netdev_priv(ndev);
 429	struct phy_device *phy_dev = ndev->phydev;
 
 430	int i;
 431
 432	phy_dev->autoneg = AUTONEG_ENABLE;
 433	phy_dev->speed = 0;
 434	phy_dev->duplex = 0;
 435	phy_dev->advertising &= phy_dev->supported;
 
 436
 437	priv->last_rx_bd = 0;
 438
 439	/* Allocate and set buffers for Rx BD's */
 440	for (i = 0; i < RX_BD_NUM; i++) {
 441		dma_addr_t addr;
 442		unsigned int *last_rx_bd = &priv->last_rx_bd;
 443		struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd];
 444		struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd];
 445
 446		rx_buff->skb = netdev_alloc_skb_ip_align(ndev,
 447							 EMAC_BUFFER_SIZE);
 448		if (unlikely(!rx_buff->skb))
 449			return -ENOMEM;
 450
 451		addr = dma_map_single(&ndev->dev, (void *)rx_buff->skb->data,
 452				      EMAC_BUFFER_SIZE, DMA_FROM_DEVICE);
 453		if (dma_mapping_error(&ndev->dev, addr)) {
 454			netdev_err(ndev, "cannot dma map\n");
 455			dev_kfree_skb(rx_buff->skb);
 456			return -ENOMEM;
 457		}
 458		dma_unmap_addr_set(rx_buff, addr, addr);
 459		dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE);
 460
 461		rxbd->data = cpu_to_le32(addr);
 462
 463		/* Make sure pointer to data buffer is set */
 464		wmb();
 465
 466		/* Return ownership to EMAC */
 467		rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
 468
 469		*last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM;
 470	}
 471
 472	priv->txbd_curr = 0;
 473	priv->txbd_dirty = 0;
 474
 475	/* Clean Tx BD's */
 476	memset(priv->txbd, 0, TX_RING_SZ);
 477
 478	/* Initialize logical address filter */
 479	arc_reg_set(priv, R_LAFL, 0);
 480	arc_reg_set(priv, R_LAFH, 0);
 481
 482	/* Set BD ring pointers for device side */
 483	arc_reg_set(priv, R_RX_RING, (unsigned int)priv->rxbd_dma);
 484	arc_reg_set(priv, R_TX_RING, (unsigned int)priv->txbd_dma);
 485
 486	/* Enable interrupts */
 487	arc_reg_set(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK);
 488
 489	/* Set CONTROL */
 490	arc_reg_set(priv, R_CTRL,
 491		    (RX_BD_NUM << 24) |	/* RX BD table length */
 492		    (TX_BD_NUM << 16) |	/* TX BD table length */
 493		    TXRN_MASK | RXRN_MASK);
 494
 495	napi_enable(&priv->napi);
 496
 497	/* Enable EMAC */
 498	arc_reg_or(priv, R_CTRL, EN_MASK);
 499
 500	phy_start(ndev->phydev);
 501
 502	netif_start_queue(ndev);
 503
 504	return 0;
 505}
 506
 507/**
 508 * arc_emac_set_rx_mode - Change the receive filtering mode.
 509 * @ndev:	Pointer to the network device.
 510 *
 511 * This function enables/disables promiscuous or all-multicast mode
 512 * and updates the multicast filtering list of the network device.
 513 */
 514static void arc_emac_set_rx_mode(struct net_device *ndev)
 515{
 516	struct arc_emac_priv *priv = netdev_priv(ndev);
 517
 518	if (ndev->flags & IFF_PROMISC) {
 519		arc_reg_or(priv, R_CTRL, PROM_MASK);
 520	} else {
 521		arc_reg_clr(priv, R_CTRL, PROM_MASK);
 522
 523		if (ndev->flags & IFF_ALLMULTI) {
 524			arc_reg_set(priv, R_LAFL, ~0);
 525			arc_reg_set(priv, R_LAFH, ~0);
 526		} else if (ndev->flags & IFF_MULTICAST) {
 527			struct netdev_hw_addr *ha;
 528			unsigned int filter[2] = { 0, 0 };
 529			int bit;
 530
 531			netdev_for_each_mc_addr(ha, ndev) {
 532				bit = ether_crc_le(ETH_ALEN, ha->addr) >> 26;
 533				filter[bit >> 5] |= 1 << (bit & 31);
 534			}
 535
 536			arc_reg_set(priv, R_LAFL, filter[0]);
 537			arc_reg_set(priv, R_LAFH, filter[1]);
 538		} else {
 539			arc_reg_set(priv, R_LAFL, 0);
 540			arc_reg_set(priv, R_LAFH, 0);
 541		}
 542	}
 543}
 544
 545/**
 546 * arc_free_tx_queue - free skb from tx queue
 547 * @ndev:	Pointer to the network device.
 548 *
 549 * This function must be called while EMAC disable
 550 */
 551static void arc_free_tx_queue(struct net_device *ndev)
 552{
 553	struct arc_emac_priv *priv = netdev_priv(ndev);
 
 554	unsigned int i;
 555
 556	for (i = 0; i < TX_BD_NUM; i++) {
 557		struct arc_emac_bd *txbd = &priv->txbd[i];
 558		struct buffer_state *tx_buff = &priv->tx_buff[i];
 559
 560		if (tx_buff->skb) {
 561			dma_unmap_single(&ndev->dev,
 562					 dma_unmap_addr(tx_buff, addr),
 563					 dma_unmap_len(tx_buff, len),
 564					 DMA_TO_DEVICE);
 565
 566			/* return the sk_buff to system */
 567			dev_kfree_skb_irq(tx_buff->skb);
 568		}
 569
 570		txbd->info = 0;
 571		txbd->data = 0;
 572		tx_buff->skb = NULL;
 573	}
 574}
 575
 576/**
 577 * arc_free_rx_queue - free skb from rx queue
 578 * @ndev:	Pointer to the network device.
 579 *
 580 * This function must be called while EMAC disable
 581 */
 582static void arc_free_rx_queue(struct net_device *ndev)
 583{
 584	struct arc_emac_priv *priv = netdev_priv(ndev);
 
 585	unsigned int i;
 586
 587	for (i = 0; i < RX_BD_NUM; i++) {
 588		struct arc_emac_bd *rxbd = &priv->rxbd[i];
 589		struct buffer_state *rx_buff = &priv->rx_buff[i];
 590
 591		if (rx_buff->skb) {
 592			dma_unmap_single(&ndev->dev,
 593					 dma_unmap_addr(rx_buff, addr),
 594					 dma_unmap_len(rx_buff, len),
 595					 DMA_FROM_DEVICE);
 596
 597			/* return the sk_buff to system */
 598			dev_kfree_skb_irq(rx_buff->skb);
 599		}
 600
 601		rxbd->info = 0;
 602		rxbd->data = 0;
 603		rx_buff->skb = NULL;
 604	}
 605}
 606
 607/**
 608 * arc_emac_stop - Close the network device.
 609 * @ndev:	Pointer to the network device.
 610 *
 611 * This function stops the Tx queue, disables interrupts and frees the IRQ for
 612 * the EMAC device.
 613 * It also disconnects the PHY device associated with the EMAC device.
 614 */
 615static int arc_emac_stop(struct net_device *ndev)
 616{
 617	struct arc_emac_priv *priv = netdev_priv(ndev);
 618
 619	napi_disable(&priv->napi);
 620	netif_stop_queue(ndev);
 621
 622	phy_stop(ndev->phydev);
 623
 624	/* Disable interrupts */
 625	arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK);
 626
 627	/* Disable EMAC */
 628	arc_reg_clr(priv, R_CTRL, EN_MASK);
 629
 630	/* Return the sk_buff to system */
 631	arc_free_tx_queue(ndev);
 632	arc_free_rx_queue(ndev);
 633
 634	return 0;
 635}
 636
 637/**
 638 * arc_emac_stats - Get system network statistics.
 639 * @ndev:	Pointer to net_device structure.
 640 *
 641 * Returns the address of the device statistics structure.
 642 * Statistics are updated in interrupt handler.
 643 */
 644static struct net_device_stats *arc_emac_stats(struct net_device *ndev)
 645{
 646	struct arc_emac_priv *priv = netdev_priv(ndev);
 647	struct net_device_stats *stats = &ndev->stats;
 648	unsigned long miss, rxerr;
 649	u8 rxcrc, rxfram, rxoflow;
 650
 651	rxerr = arc_reg_get(priv, R_RXERR);
 652	miss = arc_reg_get(priv, R_MISS);
 653
 654	rxcrc = rxerr;
 655	rxfram = rxerr >> 8;
 656	rxoflow = rxerr >> 16;
 657
 658	stats->rx_errors += miss;
 659	stats->rx_errors += rxcrc + rxfram + rxoflow;
 660
 661	stats->rx_over_errors += rxoflow;
 662	stats->rx_frame_errors += rxfram;
 663	stats->rx_crc_errors += rxcrc;
 664	stats->rx_missed_errors += miss;
 665
 666	return stats;
 667}
 668
 669/**
 670 * arc_emac_tx - Starts the data transmission.
 671 * @skb:	sk_buff pointer that contains data to be Transmitted.
 672 * @ndev:	Pointer to net_device structure.
 673 *
 674 * returns: NETDEV_TX_OK, on success
 675 *		NETDEV_TX_BUSY, if any of the descriptors are not free.
 676 *
 677 * This function is invoked from upper layers to initiate transmission.
 678 */
 679static int arc_emac_tx(struct sk_buff *skb, struct net_device *ndev)
 680{
 681	struct arc_emac_priv *priv = netdev_priv(ndev);
 682	unsigned int len, *txbd_curr = &priv->txbd_curr;
 683	struct net_device_stats *stats = &ndev->stats;
 684	__le32 *info = &priv->txbd[*txbd_curr].info;
 
 685	dma_addr_t addr;
 686
 687	if (skb_padto(skb, ETH_ZLEN))
 688		return NETDEV_TX_OK;
 689
 690	len = max_t(unsigned int, ETH_ZLEN, skb->len);
 691
 692	if (unlikely(!arc_emac_tx_avail(priv))) {
 693		netif_stop_queue(ndev);
 694		netdev_err(ndev, "BUG! Tx Ring full when queue awake!\n");
 695		return NETDEV_TX_BUSY;
 696	}
 697
 698	addr = dma_map_single(&ndev->dev, (void *)skb->data, len,
 699			      DMA_TO_DEVICE);
 700
 701	if (unlikely(dma_mapping_error(&ndev->dev, addr))) {
 702		stats->tx_dropped++;
 703		stats->tx_errors++;
 704		dev_kfree_skb_any(skb);
 705		return NETDEV_TX_OK;
 706	}
 707	dma_unmap_addr_set(&priv->tx_buff[*txbd_curr], addr, addr);
 708	dma_unmap_len_set(&priv->tx_buff[*txbd_curr], len, len);
 709
 710	priv->txbd[*txbd_curr].data = cpu_to_le32(addr);
 711
 712	/* Make sure pointer to data buffer is set */
 713	wmb();
 714
 715	skb_tx_timestamp(skb);
 716
 717	*info = cpu_to_le32(FOR_EMAC | FIRST_OR_LAST_MASK | len);
 718
 719	/* Make sure info word is set */
 720	wmb();
 721
 722	priv->tx_buff[*txbd_curr].skb = skb;
 723
 724	/* Increment index to point to the next BD */
 725	*txbd_curr = (*txbd_curr + 1) % TX_BD_NUM;
 726
 727	/* Ensure that tx_clean() sees the new txbd_curr before
 728	 * checking the queue status. This prevents an unneeded wake
 729	 * of the queue in tx_clean().
 730	 */
 731	smp_mb();
 732
 733	if (!arc_emac_tx_avail(priv)) {
 734		netif_stop_queue(ndev);
 735		/* Refresh tx_dirty */
 736		smp_mb();
 737		if (arc_emac_tx_avail(priv))
 738			netif_start_queue(ndev);
 739	}
 740
 741	arc_reg_set(priv, R_STATUS, TXPL_MASK);
 742
 743	return NETDEV_TX_OK;
 744}
 745
 746static void arc_emac_set_address_internal(struct net_device *ndev)
 747{
 748	struct arc_emac_priv *priv = netdev_priv(ndev);
 749	unsigned int addr_low, addr_hi;
 750
 751	addr_low = le32_to_cpu(*(__le32 *)&ndev->dev_addr[0]);
 752	addr_hi = le16_to_cpu(*(__le16 *)&ndev->dev_addr[4]);
 753
 754	arc_reg_set(priv, R_ADDRL, addr_low);
 755	arc_reg_set(priv, R_ADDRH, addr_hi);
 756}
 757
 758/**
 759 * arc_emac_set_address - Set the MAC address for this device.
 760 * @ndev:	Pointer to net_device structure.
 761 * @p:		6 byte Address to be written as MAC address.
 762 *
 763 * This function copies the HW address from the sockaddr structure to the
 764 * net_device structure and updates the address in HW.
 765 *
 766 * returns:	-EBUSY if the net device is busy or 0 if the address is set
 767 *		successfully.
 768 */
 769static int arc_emac_set_address(struct net_device *ndev, void *p)
 770{
 771	struct sockaddr *addr = p;
 772
 773	if (netif_running(ndev))
 774		return -EBUSY;
 775
 776	if (!is_valid_ether_addr(addr->sa_data))
 777		return -EADDRNOTAVAIL;
 778
 779	memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len);
 780
 781	arc_emac_set_address_internal(ndev);
 782
 783	return 0;
 784}
 785
 786static int arc_emac_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
 787{
 788	if (!netif_running(dev))
 789		return -EINVAL;
 790
 791	if (!dev->phydev)
 792		return -ENODEV;
 793
 794	return phy_mii_ioctl(dev->phydev, rq, cmd);
 795}
 796
 797
 798/**
 799 * arc_emac_restart - Restart EMAC
 800 * @ndev:	Pointer to net_device structure.
 801 *
 802 * This function do hardware reset of EMAC in order to restore
 803 * network packets reception.
 804 */
 805static void arc_emac_restart(struct net_device *ndev)
 806{
 807	struct arc_emac_priv *priv = netdev_priv(ndev);
 808	struct net_device_stats *stats = &ndev->stats;
 809	int i;
 810
 811	if (net_ratelimit())
 812		netdev_warn(ndev, "restarting stalled EMAC\n");
 813
 814	netif_stop_queue(ndev);
 815
 816	/* Disable interrupts */
 817	arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK);
 818
 819	/* Disable EMAC */
 820	arc_reg_clr(priv, R_CTRL, EN_MASK);
 821
 822	/* Return the sk_buff to system */
 823	arc_free_tx_queue(ndev);
 824
 825	/* Clean Tx BD's */
 826	priv->txbd_curr = 0;
 827	priv->txbd_dirty = 0;
 828	memset(priv->txbd, 0, TX_RING_SZ);
 829
 830	for (i = 0; i < RX_BD_NUM; i++) {
 831		struct arc_emac_bd *rxbd = &priv->rxbd[i];
 832		unsigned int info = le32_to_cpu(rxbd->info);
 833
 834		if (!(info & FOR_EMAC)) {
 835			stats->rx_errors++;
 836			stats->rx_dropped++;
 837		}
 838		/* Return ownership to EMAC */
 839		rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
 840	}
 841	priv->last_rx_bd = 0;
 842
 843	/* Make sure info is visible to EMAC before enable */
 844	wmb();
 845
 846	/* Enable interrupts */
 847	arc_reg_set(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK);
 848
 849	/* Enable EMAC */
 850	arc_reg_or(priv, R_CTRL, EN_MASK);
 851
 852	netif_start_queue(ndev);
 853}
 854
 855static const struct net_device_ops arc_emac_netdev_ops = {
 856	.ndo_open		= arc_emac_open,
 857	.ndo_stop		= arc_emac_stop,
 858	.ndo_start_xmit		= arc_emac_tx,
 859	.ndo_set_mac_address	= arc_emac_set_address,
 860	.ndo_get_stats		= arc_emac_stats,
 861	.ndo_set_rx_mode	= arc_emac_set_rx_mode,
 862	.ndo_do_ioctl		= arc_emac_ioctl,
 863#ifdef CONFIG_NET_POLL_CONTROLLER
 864	.ndo_poll_controller	= arc_emac_poll_controller,
 865#endif
 866};
 867
 868int arc_emac_probe(struct net_device *ndev, int interface)
 869{
 870	struct device *dev = ndev->dev.parent;
 871	struct resource res_regs;
 872	struct device_node *phy_node;
 873	struct phy_device *phydev = NULL;
 874	struct arc_emac_priv *priv;
 875	const char *mac_addr;
 876	unsigned int id, clock_frequency, irq;
 877	int err;
 878
 879	/* Get PHY from device tree */
 880	phy_node = of_parse_phandle(dev->of_node, "phy", 0);
 881	if (!phy_node) {
 882		dev_err(dev, "failed to retrieve phy description from device tree\n");
 883		return -ENODEV;
 884	}
 885
 886	/* Get EMAC registers base address from device tree */
 887	err = of_address_to_resource(dev->of_node, 0, &res_regs);
 888	if (err) {
 889		dev_err(dev, "failed to retrieve registers base from device tree\n");
 890		err = -ENODEV;
 891		goto out_put_node;
 892	}
 893
 894	/* Get IRQ from device tree */
 895	irq = irq_of_parse_and_map(dev->of_node, 0);
 896	if (!irq) {
 897		dev_err(dev, "failed to retrieve <irq> value from device tree\n");
 898		err = -ENODEV;
 899		goto out_put_node;
 900	}
 901
 902	ndev->netdev_ops = &arc_emac_netdev_ops;
 903	ndev->ethtool_ops = &arc_emac_ethtool_ops;
 904	ndev->watchdog_timeo = TX_TIMEOUT;
 905
 906	priv = netdev_priv(ndev);
 907	priv->dev = dev;
 908
 909	priv->regs = devm_ioremap_resource(dev, &res_regs);
 910	if (IS_ERR(priv->regs)) {
 911		err = PTR_ERR(priv->regs);
 912		goto out_put_node;
 913	}
 914
 915	dev_dbg(dev, "Registers base address is 0x%p\n", priv->regs);
 916
 917	if (priv->clk) {
 918		err = clk_prepare_enable(priv->clk);
 919		if (err) {
 920			dev_err(dev, "failed to enable clock\n");
 921			goto out_put_node;
 922		}
 923
 924		clock_frequency = clk_get_rate(priv->clk);
 925	} else {
 926		/* Get CPU clock frequency from device tree */
 927		if (of_property_read_u32(dev->of_node, "clock-frequency",
 928					 &clock_frequency)) {
 929			dev_err(dev, "failed to retrieve <clock-frequency> from device tree\n");
 930			err = -EINVAL;
 931			goto out_put_node;
 932		}
 933	}
 934
 935	id = arc_reg_get(priv, R_ID);
 936
 937	/* Check for EMAC revision 5 or 7, magic number */
 938	if (!(id == 0x0005fd02 || id == 0x0007fd02)) {
 939		dev_err(dev, "ARC EMAC not detected, id=0x%x\n", id);
 940		err = -ENODEV;
 941		goto out_clken;
 942	}
 943	dev_info(dev, "ARC EMAC detected with id: 0x%x\n", id);
 944
 945	/* Set poll rate so that it polls every 1 ms */
 946	arc_reg_set(priv, R_POLLRATE, clock_frequency / 1000000);
 947
 948	ndev->irq = irq;
 949	dev_info(dev, "IRQ is %d\n", ndev->irq);
 950
 951	/* Register interrupt handler for device */
 952	err = devm_request_irq(dev, ndev->irq, arc_emac_intr, 0,
 953			       ndev->name, ndev);
 954	if (err) {
 955		dev_err(dev, "could not allocate IRQ\n");
 956		goto out_clken;
 957	}
 958
 959	/* Get MAC address from device tree */
 960	mac_addr = of_get_mac_address(dev->of_node);
 961
 962	if (mac_addr)
 963		memcpy(ndev->dev_addr, mac_addr, ETH_ALEN);
 964	else
 965		eth_hw_addr_random(ndev);
 966
 967	arc_emac_set_address_internal(ndev);
 968	dev_info(dev, "MAC address is now %pM\n", ndev->dev_addr);
 969
 970	/* Do 1 allocation instead of 2 separate ones for Rx and Tx BD rings */
 971	priv->rxbd = dmam_alloc_coherent(dev, RX_RING_SZ + TX_RING_SZ,
 972					 &priv->rxbd_dma, GFP_KERNEL);
 973
 974	if (!priv->rxbd) {
 975		dev_err(dev, "failed to allocate data buffers\n");
 976		err = -ENOMEM;
 977		goto out_clken;
 978	}
 979
 980	priv->txbd = priv->rxbd + RX_BD_NUM;
 981
 982	priv->txbd_dma = priv->rxbd_dma + RX_RING_SZ;
 983	dev_dbg(dev, "EMAC Device addr: Rx Ring [0x%x], Tx Ring[%x]\n",
 984		(unsigned int)priv->rxbd_dma, (unsigned int)priv->txbd_dma);
 985
 986	err = arc_mdio_probe(priv);
 987	if (err) {
 988		dev_err(dev, "failed to probe MII bus\n");
 989		goto out_clken;
 990	}
 991
 992	phydev = of_phy_connect(ndev, phy_node, arc_emac_adjust_link, 0,
 993				interface);
 994	if (!phydev) {
 995		dev_err(dev, "of_phy_connect() failed\n");
 996		err = -ENODEV;
 997		goto out_mdio;
 998	}
 999
1000	dev_info(dev, "connected to %s phy with id 0x%x\n",
1001		 phydev->drv->name, phydev->phy_id);
1002
1003	netif_napi_add(ndev, &priv->napi, arc_emac_poll, ARC_EMAC_NAPI_WEIGHT);
 
1004
1005	err = register_netdev(ndev);
1006	if (err) {
1007		dev_err(dev, "failed to register network device\n");
1008		goto out_netif_api;
1009	}
1010
1011	of_node_put(phy_node);
1012	return 0;
1013
1014out_netif_api:
1015	netif_napi_del(&priv->napi);
1016	phy_disconnect(phydev);
1017out_mdio:
1018	arc_mdio_remove(priv);
1019out_clken:
1020	if (priv->clk)
1021		clk_disable_unprepare(priv->clk);
1022out_put_node:
1023	of_node_put(phy_node);
1024
1025	return err;
1026}
1027EXPORT_SYMBOL_GPL(arc_emac_probe);
1028
1029int arc_emac_remove(struct net_device *ndev)
1030{
1031	struct arc_emac_priv *priv = netdev_priv(ndev);
1032
1033	phy_disconnect(ndev->phydev);
1034	arc_mdio_remove(priv);
1035	unregister_netdev(ndev);
1036	netif_napi_del(&priv->napi);
1037
1038	if (!IS_ERR(priv->clk))
1039		clk_disable_unprepare(priv->clk);
1040
1041	return 0;
1042}
1043EXPORT_SYMBOL_GPL(arc_emac_remove);
1044
1045MODULE_AUTHOR("Alexey Brodkin <abrodkin@synopsys.com>");
1046MODULE_DESCRIPTION("ARC EMAC driver");
1047MODULE_LICENSE("GPL");