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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * wm_adsp.c -- Wolfson ADSP support
4 *
5 * Copyright 2012 Wolfson Microelectronics plc
6 *
7 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 */
9
10#include <linux/array_size.h>
11#include <linux/ctype.h>
12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/init.h>
15#include <linux/delay.h>
16#include <linux/firmware.h>
17#include <linux/list.h>
18#include <linux/pm.h>
19#include <linux/regmap.h>
20#include <linux/regulator/consumer.h>
21#include <linux/slab.h>
22#include <linux/vmalloc.h>
23#include <linux/workqueue.h>
24#include <linux/debugfs.h>
25#include <sound/core.h>
26#include <sound/pcm.h>
27#include <sound/pcm_params.h>
28#include <sound/soc.h>
29#include <sound/jack.h>
30#include <sound/initval.h>
31#include <sound/tlv.h>
32
33#include "wm_adsp.h"
34
35#define adsp_crit(_dsp, fmt, ...) \
36 dev_crit(_dsp->cs_dsp.dev, "%s: " fmt, _dsp->cs_dsp.name, ##__VA_ARGS__)
37#define adsp_err(_dsp, fmt, ...) \
38 dev_err(_dsp->cs_dsp.dev, "%s: " fmt, _dsp->cs_dsp.name, ##__VA_ARGS__)
39#define adsp_warn(_dsp, fmt, ...) \
40 dev_warn(_dsp->cs_dsp.dev, "%s: " fmt, _dsp->cs_dsp.name, ##__VA_ARGS__)
41#define adsp_info(_dsp, fmt, ...) \
42 dev_info(_dsp->cs_dsp.dev, "%s: " fmt, _dsp->cs_dsp.name, ##__VA_ARGS__)
43#define adsp_dbg(_dsp, fmt, ...) \
44 dev_dbg(_dsp->cs_dsp.dev, "%s: " fmt, _dsp->cs_dsp.name, ##__VA_ARGS__)
45
46#define compr_err(_obj, fmt, ...) \
47 adsp_err(_obj->dsp, "%s: " fmt, _obj->name ? _obj->name : "legacy", \
48 ##__VA_ARGS__)
49#define compr_dbg(_obj, fmt, ...) \
50 adsp_dbg(_obj->dsp, "%s: " fmt, _obj->name ? _obj->name : "legacy", \
51 ##__VA_ARGS__)
52
53#define ADSP_MAX_STD_CTRL_SIZE 512
54
55static const struct cs_dsp_client_ops wm_adsp1_client_ops;
56static const struct cs_dsp_client_ops wm_adsp2_client_ops;
57
58#define WM_ADSP_FW_MBC_VSS 0
59#define WM_ADSP_FW_HIFI 1
60#define WM_ADSP_FW_TX 2
61#define WM_ADSP_FW_TX_SPK 3
62#define WM_ADSP_FW_RX 4
63#define WM_ADSP_FW_RX_ANC 5
64#define WM_ADSP_FW_CTRL 6
65#define WM_ADSP_FW_ASR 7
66#define WM_ADSP_FW_TRACE 8
67#define WM_ADSP_FW_SPK_PROT 9
68#define WM_ADSP_FW_SPK_CALI 10
69#define WM_ADSP_FW_SPK_DIAG 11
70#define WM_ADSP_FW_MISC 12
71
72#define WM_ADSP_NUM_FW 13
73
74static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = {
75 [WM_ADSP_FW_MBC_VSS] = "MBC/VSS",
76 [WM_ADSP_FW_HIFI] = "MasterHiFi",
77 [WM_ADSP_FW_TX] = "Tx",
78 [WM_ADSP_FW_TX_SPK] = "Tx Speaker",
79 [WM_ADSP_FW_RX] = "Rx",
80 [WM_ADSP_FW_RX_ANC] = "Rx ANC",
81 [WM_ADSP_FW_CTRL] = "Voice Ctrl",
82 [WM_ADSP_FW_ASR] = "ASR Assist",
83 [WM_ADSP_FW_TRACE] = "Dbg Trace",
84 [WM_ADSP_FW_SPK_PROT] = "Protection",
85 [WM_ADSP_FW_SPK_CALI] = "Calibration",
86 [WM_ADSP_FW_SPK_DIAG] = "Diagnostic",
87 [WM_ADSP_FW_MISC] = "Misc",
88};
89
90struct wm_adsp_system_config_xm_hdr {
91 __be32 sys_enable;
92 __be32 fw_id;
93 __be32 fw_rev;
94 __be32 boot_status;
95 __be32 watchdog;
96 __be32 dma_buffer_size;
97 __be32 rdma[6];
98 __be32 wdma[8];
99 __be32 build_job_name[3];
100 __be32 build_job_number;
101} __packed;
102
103struct wm_halo_system_config_xm_hdr {
104 __be32 halo_heartbeat;
105 __be32 build_job_name[3];
106 __be32 build_job_number;
107} __packed;
108
109struct wm_adsp_alg_xm_struct {
110 __be32 magic;
111 __be32 smoothing;
112 __be32 threshold;
113 __be32 host_buf_ptr;
114 __be32 start_seq;
115 __be32 high_water_mark;
116 __be32 low_water_mark;
117 __be64 smoothed_power;
118} __packed;
119
120struct wm_adsp_host_buf_coeff_v1 {
121 __be32 host_buf_ptr; /* Host buffer pointer */
122 __be32 versions; /* Version numbers */
123 __be32 name[4]; /* The buffer name */
124} __packed;
125
126struct wm_adsp_buffer {
127 __be32 buf1_base; /* Base addr of first buffer area */
128 __be32 buf1_size; /* Size of buf1 area in DSP words */
129 __be32 buf2_base; /* Base addr of 2nd buffer area */
130 __be32 buf1_buf2_size; /* Size of buf1+buf2 in DSP words */
131 __be32 buf3_base; /* Base addr of buf3 area */
132 __be32 buf_total_size; /* Size of buf1+buf2+buf3 in DSP words */
133 __be32 high_water_mark; /* Point at which IRQ is asserted */
134 __be32 irq_count; /* bits 1-31 count IRQ assertions */
135 __be32 irq_ack; /* acked IRQ count, bit 0 enables IRQ */
136 __be32 next_write_index; /* word index of next write */
137 __be32 next_read_index; /* word index of next read */
138 __be32 error; /* error if any */
139 __be32 oldest_block_index; /* word index of oldest surviving */
140 __be32 requested_rewind; /* how many blocks rewind was done */
141 __be32 reserved_space; /* internal */
142 __be32 min_free; /* min free space since stream start */
143 __be32 blocks_written[2]; /* total blocks written (64 bit) */
144 __be32 words_written[2]; /* total words written (64 bit) */
145} __packed;
146
147struct wm_adsp_compr;
148
149struct wm_adsp_compr_buf {
150 struct list_head list;
151 struct wm_adsp *dsp;
152 struct wm_adsp_compr *compr;
153
154 struct wm_adsp_buffer_region *regions;
155 u32 host_buf_ptr;
156
157 u32 error;
158 u32 irq_count;
159 int read_index;
160 int avail;
161 int host_buf_mem_type;
162
163 char *name;
164};
165
166struct wm_adsp_compr {
167 struct list_head list;
168 struct wm_adsp *dsp;
169 struct wm_adsp_compr_buf *buf;
170
171 struct snd_compr_stream *stream;
172 struct snd_compressed_buffer size;
173
174 u32 *raw_buf;
175 unsigned int copied_total;
176
177 unsigned int sample_rate;
178
179 const char *name;
180};
181
182#define WM_ADSP_MIN_FRAGMENTS 1
183#define WM_ADSP_MAX_FRAGMENTS 256
184#define WM_ADSP_MIN_FRAGMENT_SIZE (16 * CS_DSP_DATA_WORD_SIZE)
185#define WM_ADSP_MAX_FRAGMENT_SIZE (4096 * CS_DSP_DATA_WORD_SIZE)
186
187#define WM_ADSP_ALG_XM_STRUCT_MAGIC 0x49aec7
188
189#define HOST_BUFFER_FIELD(field) \
190 (offsetof(struct wm_adsp_buffer, field) / sizeof(__be32))
191
192#define ALG_XM_FIELD(field) \
193 (offsetof(struct wm_adsp_alg_xm_struct, field) / sizeof(__be32))
194
195#define HOST_BUF_COEFF_SUPPORTED_COMPAT_VER 1
196
197#define HOST_BUF_COEFF_COMPAT_VER_MASK 0xFF00
198#define HOST_BUF_COEFF_COMPAT_VER_SHIFT 8
199
200static int wm_adsp_buffer_init(struct wm_adsp *dsp);
201static int wm_adsp_buffer_free(struct wm_adsp *dsp);
202
203struct wm_adsp_buffer_region {
204 unsigned int offset;
205 unsigned int cumulative_size;
206 unsigned int mem_type;
207 unsigned int base_addr;
208};
209
210struct wm_adsp_buffer_region_def {
211 unsigned int mem_type;
212 unsigned int base_offset;
213 unsigned int size_offset;
214};
215
216static const struct wm_adsp_buffer_region_def default_regions[] = {
217 {
218 .mem_type = WMFW_ADSP2_XM,
219 .base_offset = HOST_BUFFER_FIELD(buf1_base),
220 .size_offset = HOST_BUFFER_FIELD(buf1_size),
221 },
222 {
223 .mem_type = WMFW_ADSP2_XM,
224 .base_offset = HOST_BUFFER_FIELD(buf2_base),
225 .size_offset = HOST_BUFFER_FIELD(buf1_buf2_size),
226 },
227 {
228 .mem_type = WMFW_ADSP2_YM,
229 .base_offset = HOST_BUFFER_FIELD(buf3_base),
230 .size_offset = HOST_BUFFER_FIELD(buf_total_size),
231 },
232};
233
234struct wm_adsp_fw_caps {
235 u32 id;
236 struct snd_codec_desc desc;
237 int num_regions;
238 const struct wm_adsp_buffer_region_def *region_defs;
239};
240
241static const struct wm_adsp_fw_caps ctrl_caps[] = {
242 {
243 .id = SND_AUDIOCODEC_BESPOKE,
244 .desc = {
245 .max_ch = 8,
246 .sample_rates = { 16000 },
247 .num_sample_rates = 1,
248 .formats = SNDRV_PCM_FMTBIT_S16_LE,
249 },
250 .num_regions = ARRAY_SIZE(default_regions),
251 .region_defs = default_regions,
252 },
253};
254
255static const struct wm_adsp_fw_caps trace_caps[] = {
256 {
257 .id = SND_AUDIOCODEC_BESPOKE,
258 .desc = {
259 .max_ch = 8,
260 .sample_rates = {
261 4000, 8000, 11025, 12000, 16000, 22050,
262 24000, 32000, 44100, 48000, 64000, 88200,
263 96000, 176400, 192000
264 },
265 .num_sample_rates = 15,
266 .formats = SNDRV_PCM_FMTBIT_S16_LE,
267 },
268 .num_regions = ARRAY_SIZE(default_regions),
269 .region_defs = default_regions,
270 },
271};
272
273static const struct {
274 const char *file;
275 int compr_direction;
276 int num_caps;
277 const struct wm_adsp_fw_caps *caps;
278 bool voice_trigger;
279} wm_adsp_fw[WM_ADSP_NUM_FW] = {
280 [WM_ADSP_FW_MBC_VSS] = { .file = "mbc-vss" },
281 [WM_ADSP_FW_HIFI] = { .file = "hifi" },
282 [WM_ADSP_FW_TX] = { .file = "tx" },
283 [WM_ADSP_FW_TX_SPK] = { .file = "tx-spk" },
284 [WM_ADSP_FW_RX] = { .file = "rx" },
285 [WM_ADSP_FW_RX_ANC] = { .file = "rx-anc" },
286 [WM_ADSP_FW_CTRL] = {
287 .file = "ctrl",
288 .compr_direction = SND_COMPRESS_CAPTURE,
289 .num_caps = ARRAY_SIZE(ctrl_caps),
290 .caps = ctrl_caps,
291 .voice_trigger = true,
292 },
293 [WM_ADSP_FW_ASR] = { .file = "asr" },
294 [WM_ADSP_FW_TRACE] = {
295 .file = "trace",
296 .compr_direction = SND_COMPRESS_CAPTURE,
297 .num_caps = ARRAY_SIZE(trace_caps),
298 .caps = trace_caps,
299 },
300 [WM_ADSP_FW_SPK_PROT] = {
301 .file = "spk-prot",
302 .compr_direction = SND_COMPRESS_CAPTURE,
303 .num_caps = ARRAY_SIZE(trace_caps),
304 .caps = trace_caps,
305 },
306 [WM_ADSP_FW_SPK_CALI] = { .file = "spk-cali" },
307 [WM_ADSP_FW_SPK_DIAG] = { .file = "spk-diag" },
308 [WM_ADSP_FW_MISC] = { .file = "misc" },
309};
310
311struct wm_coeff_ctl {
312 const char *name;
313 struct cs_dsp_coeff_ctl *cs_ctl;
314 struct soc_bytes_ext bytes_ext;
315 struct work_struct work;
316};
317
318int wm_adsp_fw_get(struct snd_kcontrol *kcontrol,
319 struct snd_ctl_elem_value *ucontrol)
320{
321 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
322 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
323 struct wm_adsp *dsp = snd_soc_component_get_drvdata(component);
324
325 ucontrol->value.enumerated.item[0] = dsp[e->shift_l].fw;
326
327 return 0;
328}
329EXPORT_SYMBOL_GPL(wm_adsp_fw_get);
330
331int wm_adsp_fw_put(struct snd_kcontrol *kcontrol,
332 struct snd_ctl_elem_value *ucontrol)
333{
334 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
335 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
336 struct wm_adsp *dsp = snd_soc_component_get_drvdata(component);
337 int ret = 1;
338
339 if (ucontrol->value.enumerated.item[0] == dsp[e->shift_l].fw)
340 return 0;
341
342 if (ucontrol->value.enumerated.item[0] >= WM_ADSP_NUM_FW)
343 return -EINVAL;
344
345 mutex_lock(&dsp[e->shift_l].cs_dsp.pwr_lock);
346
347 if (dsp[e->shift_l].cs_dsp.booted || !list_empty(&dsp[e->shift_l].compr_list))
348 ret = -EBUSY;
349 else
350 dsp[e->shift_l].fw = ucontrol->value.enumerated.item[0];
351
352 mutex_unlock(&dsp[e->shift_l].cs_dsp.pwr_lock);
353
354 return ret;
355}
356EXPORT_SYMBOL_GPL(wm_adsp_fw_put);
357
358const struct soc_enum wm_adsp_fw_enum[] = {
359 SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
360 SOC_ENUM_SINGLE(0, 1, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
361 SOC_ENUM_SINGLE(0, 2, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
362 SOC_ENUM_SINGLE(0, 3, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
363 SOC_ENUM_SINGLE(0, 4, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
364 SOC_ENUM_SINGLE(0, 5, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
365 SOC_ENUM_SINGLE(0, 6, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
366};
367EXPORT_SYMBOL_GPL(wm_adsp_fw_enum);
368
369static inline struct wm_coeff_ctl *bytes_ext_to_ctl(struct soc_bytes_ext *ext)
370{
371 return container_of(ext, struct wm_coeff_ctl, bytes_ext);
372}
373
374static int wm_coeff_info(struct snd_kcontrol *kctl,
375 struct snd_ctl_elem_info *uinfo)
376{
377 struct soc_bytes_ext *bytes_ext =
378 (struct soc_bytes_ext *)kctl->private_value;
379 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
380 struct cs_dsp_coeff_ctl *cs_ctl = ctl->cs_ctl;
381
382 switch (cs_ctl->type) {
383 case WMFW_CTL_TYPE_ACKED:
384 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
385 uinfo->value.integer.min = CS_DSP_ACKED_CTL_MIN_VALUE;
386 uinfo->value.integer.max = CS_DSP_ACKED_CTL_MAX_VALUE;
387 uinfo->value.integer.step = 1;
388 uinfo->count = 1;
389 break;
390 default:
391 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
392 uinfo->count = cs_ctl->len;
393 break;
394 }
395
396 return 0;
397}
398
399static int wm_coeff_put(struct snd_kcontrol *kctl,
400 struct snd_ctl_elem_value *ucontrol)
401{
402 struct soc_bytes_ext *bytes_ext =
403 (struct soc_bytes_ext *)kctl->private_value;
404 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
405 struct cs_dsp_coeff_ctl *cs_ctl = ctl->cs_ctl;
406 char *p = ucontrol->value.bytes.data;
407
408 return cs_dsp_coeff_lock_and_write_ctrl(cs_ctl, 0, p, cs_ctl->len);
409}
410
411static int wm_coeff_tlv_put(struct snd_kcontrol *kctl,
412 const unsigned int __user *bytes, unsigned int size)
413{
414 struct soc_bytes_ext *bytes_ext =
415 (struct soc_bytes_ext *)kctl->private_value;
416 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
417 struct cs_dsp_coeff_ctl *cs_ctl = ctl->cs_ctl;
418 void *scratch;
419 int ret = 0;
420
421 scratch = vmalloc(size);
422 if (!scratch)
423 return -ENOMEM;
424
425 if (copy_from_user(scratch, bytes, size))
426 ret = -EFAULT;
427 else
428 ret = cs_dsp_coeff_lock_and_write_ctrl(cs_ctl, 0, scratch, size);
429
430 vfree(scratch);
431
432 return ret;
433}
434
435static int wm_coeff_put_acked(struct snd_kcontrol *kctl,
436 struct snd_ctl_elem_value *ucontrol)
437{
438 struct soc_bytes_ext *bytes_ext =
439 (struct soc_bytes_ext *)kctl->private_value;
440 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
441 struct cs_dsp_coeff_ctl *cs_ctl = ctl->cs_ctl;
442 unsigned int val = ucontrol->value.integer.value[0];
443 int ret;
444
445 if (val == 0)
446 return 0; /* 0 means no event */
447
448 mutex_lock(&cs_ctl->dsp->pwr_lock);
449
450 if (cs_ctl->enabled)
451 ret = cs_dsp_coeff_write_acked_control(cs_ctl, val);
452 else
453 ret = -EPERM;
454
455 mutex_unlock(&cs_ctl->dsp->pwr_lock);
456
457 if (ret < 0)
458 return ret;
459
460 return 1;
461}
462
463static int wm_coeff_get(struct snd_kcontrol *kctl,
464 struct snd_ctl_elem_value *ucontrol)
465{
466 struct soc_bytes_ext *bytes_ext =
467 (struct soc_bytes_ext *)kctl->private_value;
468 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
469 struct cs_dsp_coeff_ctl *cs_ctl = ctl->cs_ctl;
470 char *p = ucontrol->value.bytes.data;
471
472 return cs_dsp_coeff_lock_and_read_ctrl(cs_ctl, 0, p, cs_ctl->len);
473}
474
475static int wm_coeff_tlv_get(struct snd_kcontrol *kctl,
476 unsigned int __user *bytes, unsigned int size)
477{
478 struct soc_bytes_ext *bytes_ext =
479 (struct soc_bytes_ext *)kctl->private_value;
480 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
481 struct cs_dsp_coeff_ctl *cs_ctl = ctl->cs_ctl;
482 int ret = 0;
483
484 mutex_lock(&cs_ctl->dsp->pwr_lock);
485
486 ret = cs_dsp_coeff_read_ctrl(cs_ctl, 0, cs_ctl->cache, size);
487
488 if (!ret && copy_to_user(bytes, cs_ctl->cache, size))
489 ret = -EFAULT;
490
491 mutex_unlock(&cs_ctl->dsp->pwr_lock);
492
493 return ret;
494}
495
496static int wm_coeff_get_acked(struct snd_kcontrol *kcontrol,
497 struct snd_ctl_elem_value *ucontrol)
498{
499 /*
500 * Although it's not useful to read an acked control, we must satisfy
501 * user-side assumptions that all controls are readable and that a
502 * write of the same value should be filtered out (it's valid to send
503 * the same event number again to the firmware). We therefore return 0,
504 * meaning "no event" so valid event numbers will always be a change
505 */
506 ucontrol->value.integer.value[0] = 0;
507
508 return 0;
509}
510
511static unsigned int wmfw_convert_flags(unsigned int in, unsigned int len)
512{
513 unsigned int out, rd, wr, vol;
514
515 if (len > ADSP_MAX_STD_CTRL_SIZE) {
516 rd = SNDRV_CTL_ELEM_ACCESS_TLV_READ;
517 wr = SNDRV_CTL_ELEM_ACCESS_TLV_WRITE;
518 vol = SNDRV_CTL_ELEM_ACCESS_VOLATILE;
519
520 out = SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK;
521 } else {
522 rd = SNDRV_CTL_ELEM_ACCESS_READ;
523 wr = SNDRV_CTL_ELEM_ACCESS_WRITE;
524 vol = SNDRV_CTL_ELEM_ACCESS_VOLATILE;
525
526 out = 0;
527 }
528
529 if (in) {
530 out |= rd;
531 if (in & WMFW_CTL_FLAG_WRITEABLE)
532 out |= wr;
533 if (in & WMFW_CTL_FLAG_VOLATILE)
534 out |= vol;
535 } else {
536 out |= rd | wr | vol;
537 }
538
539 return out;
540}
541
542static void wm_adsp_ctl_work(struct work_struct *work)
543{
544 struct wm_coeff_ctl *ctl = container_of(work,
545 struct wm_coeff_ctl,
546 work);
547 struct cs_dsp_coeff_ctl *cs_ctl = ctl->cs_ctl;
548 struct wm_adsp *dsp = container_of(cs_ctl->dsp,
549 struct wm_adsp,
550 cs_dsp);
551 struct snd_kcontrol_new *kcontrol;
552
553 kcontrol = kzalloc(sizeof(*kcontrol), GFP_KERNEL);
554 if (!kcontrol)
555 return;
556
557 kcontrol->name = ctl->name;
558 kcontrol->info = wm_coeff_info;
559 kcontrol->iface = SNDRV_CTL_ELEM_IFACE_MIXER;
560 kcontrol->tlv.c = snd_soc_bytes_tlv_callback;
561 kcontrol->private_value = (unsigned long)&ctl->bytes_ext;
562 kcontrol->access = wmfw_convert_flags(cs_ctl->flags, cs_ctl->len);
563
564 switch (cs_ctl->type) {
565 case WMFW_CTL_TYPE_ACKED:
566 kcontrol->get = wm_coeff_get_acked;
567 kcontrol->put = wm_coeff_put_acked;
568 break;
569 default:
570 if (kcontrol->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
571 ctl->bytes_ext.max = cs_ctl->len;
572 ctl->bytes_ext.get = wm_coeff_tlv_get;
573 ctl->bytes_ext.put = wm_coeff_tlv_put;
574 } else {
575 kcontrol->get = wm_coeff_get;
576 kcontrol->put = wm_coeff_put;
577 }
578 break;
579 }
580
581 snd_soc_add_component_controls(dsp->component, kcontrol, 1);
582
583 kfree(kcontrol);
584}
585
586int wm_adsp_control_add(struct cs_dsp_coeff_ctl *cs_ctl)
587{
588 struct wm_adsp *dsp = container_of(cs_ctl->dsp, struct wm_adsp, cs_dsp);
589 struct cs_dsp *cs_dsp = &dsp->cs_dsp;
590 struct wm_coeff_ctl *ctl;
591 char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
592 const char *region_name;
593 int ret;
594
595 if (cs_ctl->flags & WMFW_CTL_FLAG_SYS)
596 return 0;
597
598 region_name = cs_dsp_mem_region_name(cs_ctl->alg_region.type);
599 if (!region_name) {
600 adsp_err(dsp, "Unknown region type: %d\n", cs_ctl->alg_region.type);
601 return -EINVAL;
602 }
603
604 switch (cs_dsp->wmfw_ver) {
605 case 0:
606 case 1:
607 ret = scnprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN,
608 "%s %s %x", cs_dsp->name, region_name,
609 cs_ctl->alg_region.alg);
610 break;
611 case 2:
612 ret = scnprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN,
613 "%s%c %.12s %x", cs_dsp->name, *region_name,
614 wm_adsp_fw_text[dsp->fw], cs_ctl->alg_region.alg);
615 break;
616 default:
617 ret = scnprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN,
618 "%s %.12s %x", cs_dsp->name,
619 wm_adsp_fw_text[dsp->fw], cs_ctl->alg_region.alg);
620 break;
621 }
622
623 if (cs_ctl->subname) {
624 int avail = SNDRV_CTL_ELEM_ID_NAME_MAXLEN - ret - 2;
625 int skip = 0;
626
627 if (dsp->component->name_prefix)
628 avail -= strlen(dsp->component->name_prefix) + 1;
629
630 /* Truncate the subname from the start if it is too long */
631 if (cs_ctl->subname_len > avail)
632 skip = cs_ctl->subname_len - avail;
633
634 snprintf(name + ret, SNDRV_CTL_ELEM_ID_NAME_MAXLEN - ret,
635 " %.*s", cs_ctl->subname_len - skip, cs_ctl->subname + skip);
636 }
637
638 ctl = kzalloc(sizeof(*ctl), GFP_KERNEL);
639 if (!ctl)
640 return -ENOMEM;
641 ctl->cs_ctl = cs_ctl;
642
643 ctl->name = kmemdup(name, strlen(name) + 1, GFP_KERNEL);
644 if (!ctl->name) {
645 ret = -ENOMEM;
646 goto err_ctl;
647 }
648
649 cs_ctl->priv = ctl;
650
651 INIT_WORK(&ctl->work, wm_adsp_ctl_work);
652 schedule_work(&ctl->work);
653
654 return 0;
655
656err_ctl:
657 kfree(ctl);
658
659 return ret;
660}
661EXPORT_SYMBOL_GPL(wm_adsp_control_add);
662
663static int wm_adsp_control_add_cb(struct cs_dsp_coeff_ctl *cs_ctl)
664{
665 struct wm_adsp *dsp = container_of(cs_ctl->dsp, struct wm_adsp, cs_dsp);
666
667 if (dsp->control_add)
668 return (dsp->control_add)(dsp, cs_ctl);
669 else
670 return wm_adsp_control_add(cs_ctl);
671}
672
673static void wm_adsp_control_remove(struct cs_dsp_coeff_ctl *cs_ctl)
674{
675 struct wm_coeff_ctl *ctl = cs_ctl->priv;
676
677 cancel_work_sync(&ctl->work);
678
679 kfree(ctl->name);
680 kfree(ctl);
681}
682
683int wm_adsp_write_ctl(struct wm_adsp *dsp, const char *name, int type,
684 unsigned int alg, void *buf, size_t len)
685{
686 struct cs_dsp_coeff_ctl *cs_ctl;
687 int ret;
688
689 mutex_lock(&dsp->cs_dsp.pwr_lock);
690 cs_ctl = cs_dsp_get_ctl(&dsp->cs_dsp, name, type, alg);
691 ret = cs_dsp_coeff_write_ctrl(cs_ctl, 0, buf, len);
692 mutex_unlock(&dsp->cs_dsp.pwr_lock);
693
694 if (ret < 0)
695 return ret;
696
697 return 0;
698}
699EXPORT_SYMBOL_GPL(wm_adsp_write_ctl);
700
701int wm_adsp_read_ctl(struct wm_adsp *dsp, const char *name, int type,
702 unsigned int alg, void *buf, size_t len)
703{
704 int ret;
705
706 mutex_lock(&dsp->cs_dsp.pwr_lock);
707 ret = cs_dsp_coeff_read_ctrl(cs_dsp_get_ctl(&dsp->cs_dsp, name, type, alg),
708 0, buf, len);
709 mutex_unlock(&dsp->cs_dsp.pwr_lock);
710
711 return ret;
712}
713EXPORT_SYMBOL_GPL(wm_adsp_read_ctl);
714
715static void wm_adsp_release_firmware_files(struct wm_adsp *dsp,
716 const struct firmware *wmfw_firmware,
717 char *wmfw_filename,
718 const struct firmware *coeff_firmware,
719 char *coeff_filename)
720{
721 if (wmfw_firmware)
722 release_firmware(wmfw_firmware);
723 kfree(wmfw_filename);
724
725 if (coeff_firmware)
726 release_firmware(coeff_firmware);
727 kfree(coeff_filename);
728}
729
730static int wm_adsp_request_firmware_file(struct wm_adsp *dsp,
731 const struct firmware **firmware, char **filename,
732 const char *dir, const char *system_name,
733 const char *asoc_component_prefix,
734 const char *filetype)
735{
736 struct cs_dsp *cs_dsp = &dsp->cs_dsp;
737 const char *fwf;
738 char *s, c;
739 int ret = 0;
740
741 if (dsp->fwf_name)
742 fwf = dsp->fwf_name;
743 else
744 fwf = dsp->cs_dsp.name;
745
746 if (system_name && asoc_component_prefix)
747 *filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s-%s-%s.%s", dir, dsp->part,
748 fwf, wm_adsp_fw[dsp->fw].file, system_name,
749 asoc_component_prefix, filetype);
750 else if (system_name)
751 *filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s-%s.%s", dir, dsp->part,
752 fwf, wm_adsp_fw[dsp->fw].file, system_name,
753 filetype);
754 else
755 *filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s.%s", dir, dsp->part, fwf,
756 wm_adsp_fw[dsp->fw].file, filetype);
757
758 if (*filename == NULL)
759 return -ENOMEM;
760
761 /*
762 * Make sure that filename is lower-case and any non alpha-numeric
763 * characters except full stop and forward slash are replaced with
764 * hyphens.
765 */
766 s = *filename;
767 while (*s) {
768 c = *s;
769 if (isalnum(c))
770 *s = tolower(c);
771 else if ((c != '.') && (c != '/'))
772 *s = '-';
773 s++;
774 }
775
776 ret = firmware_request_nowarn(firmware, *filename, cs_dsp->dev);
777 if (ret != 0) {
778 adsp_dbg(dsp, "Failed to request '%s'\n", *filename);
779 kfree(*filename);
780 *filename = NULL;
781 } else {
782 adsp_dbg(dsp, "Found '%s'\n", *filename);
783 }
784
785 return ret;
786}
787
788static const char *cirrus_dir = "cirrus/";
789static int wm_adsp_request_firmware_files(struct wm_adsp *dsp,
790 const struct firmware **wmfw_firmware,
791 char **wmfw_filename,
792 const struct firmware **coeff_firmware,
793 char **coeff_filename)
794{
795 const char *system_name = dsp->system_name;
796 const char *asoc_component_prefix = dsp->component->name_prefix;
797 int ret = 0;
798
799 if (system_name && asoc_component_prefix) {
800 if (!wm_adsp_request_firmware_file(dsp, wmfw_firmware, wmfw_filename,
801 cirrus_dir, system_name,
802 asoc_component_prefix, "wmfw")) {
803 wm_adsp_request_firmware_file(dsp, coeff_firmware, coeff_filename,
804 cirrus_dir, system_name,
805 asoc_component_prefix, "bin");
806 return 0;
807 }
808 }
809
810 if (system_name) {
811 if (!wm_adsp_request_firmware_file(dsp, wmfw_firmware, wmfw_filename,
812 cirrus_dir, system_name,
813 NULL, "wmfw")) {
814 if (asoc_component_prefix)
815 wm_adsp_request_firmware_file(dsp, coeff_firmware, coeff_filename,
816 cirrus_dir, system_name,
817 asoc_component_prefix, "bin");
818
819 if (!*coeff_firmware)
820 wm_adsp_request_firmware_file(dsp, coeff_firmware, coeff_filename,
821 cirrus_dir, system_name,
822 NULL, "bin");
823 return 0;
824 }
825 }
826
827 /* Check system-specific bin without wmfw before falling back to generic */
828 if (dsp->wmfw_optional && system_name) {
829 if (asoc_component_prefix)
830 wm_adsp_request_firmware_file(dsp, coeff_firmware, coeff_filename,
831 cirrus_dir, system_name,
832 asoc_component_prefix, "bin");
833
834 if (!*coeff_firmware)
835 wm_adsp_request_firmware_file(dsp, coeff_firmware, coeff_filename,
836 cirrus_dir, system_name,
837 NULL, "bin");
838
839 if (*coeff_firmware)
840 return 0;
841 }
842
843 /* Check legacy location */
844 if (!wm_adsp_request_firmware_file(dsp, wmfw_firmware, wmfw_filename,
845 "", NULL, NULL, "wmfw")) {
846 wm_adsp_request_firmware_file(dsp, coeff_firmware, coeff_filename,
847 "", NULL, NULL, "bin");
848 return 0;
849 }
850
851 /* Fall back to generic wmfw and optional matching bin */
852 ret = wm_adsp_request_firmware_file(dsp, wmfw_firmware, wmfw_filename,
853 cirrus_dir, NULL, NULL, "wmfw");
854 if (!ret || dsp->wmfw_optional) {
855 wm_adsp_request_firmware_file(dsp, coeff_firmware, coeff_filename,
856 cirrus_dir, NULL, NULL, "bin");
857 return 0;
858 }
859
860 adsp_err(dsp, "Failed to request firmware <%s>%s-%s-%s<-%s<%s>>.wmfw\n",
861 cirrus_dir, dsp->part,
862 dsp->fwf_name ? dsp->fwf_name : dsp->cs_dsp.name,
863 wm_adsp_fw[dsp->fw].file, system_name, asoc_component_prefix);
864
865 return -ENOENT;
866}
867
868static int wm_adsp_common_init(struct wm_adsp *dsp)
869{
870 INIT_LIST_HEAD(&dsp->compr_list);
871 INIT_LIST_HEAD(&dsp->buffer_list);
872
873 return 0;
874}
875
876int wm_adsp1_init(struct wm_adsp *dsp)
877{
878 int ret;
879
880 dsp->cs_dsp.client_ops = &wm_adsp1_client_ops;
881
882 ret = cs_dsp_adsp1_init(&dsp->cs_dsp);
883 if (ret)
884 return ret;
885
886 return wm_adsp_common_init(dsp);
887}
888EXPORT_SYMBOL_GPL(wm_adsp1_init);
889
890int wm_adsp1_event(struct snd_soc_dapm_widget *w,
891 struct snd_kcontrol *kcontrol,
892 int event)
893{
894 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
895 struct wm_adsp *dsps = snd_soc_component_get_drvdata(component);
896 struct wm_adsp *dsp = &dsps[w->shift];
897 int ret = 0;
898 char *wmfw_filename = NULL;
899 const struct firmware *wmfw_firmware = NULL;
900 char *coeff_filename = NULL;
901 const struct firmware *coeff_firmware = NULL;
902
903 dsp->component = component;
904
905 switch (event) {
906 case SND_SOC_DAPM_POST_PMU:
907 ret = wm_adsp_request_firmware_files(dsp,
908 &wmfw_firmware, &wmfw_filename,
909 &coeff_firmware, &coeff_filename);
910 if (ret)
911 break;
912
913 ret = cs_dsp_adsp1_power_up(&dsp->cs_dsp,
914 wmfw_firmware, wmfw_filename,
915 coeff_firmware, coeff_filename,
916 wm_adsp_fw_text[dsp->fw]);
917
918 wm_adsp_release_firmware_files(dsp,
919 wmfw_firmware, wmfw_filename,
920 coeff_firmware, coeff_filename);
921 break;
922 case SND_SOC_DAPM_PRE_PMD:
923 cs_dsp_adsp1_power_down(&dsp->cs_dsp);
924 break;
925 default:
926 break;
927 }
928
929 return ret;
930}
931EXPORT_SYMBOL_GPL(wm_adsp1_event);
932
933int wm_adsp2_set_dspclk(struct snd_soc_dapm_widget *w, unsigned int freq)
934{
935 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
936 struct wm_adsp *dsps = snd_soc_component_get_drvdata(component);
937 struct wm_adsp *dsp = &dsps[w->shift];
938
939 return cs_dsp_set_dspclk(&dsp->cs_dsp, freq);
940}
941EXPORT_SYMBOL_GPL(wm_adsp2_set_dspclk);
942
943int wm_adsp2_preloader_get(struct snd_kcontrol *kcontrol,
944 struct snd_ctl_elem_value *ucontrol)
945{
946 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
947 struct wm_adsp *dsps = snd_soc_component_get_drvdata(component);
948 struct soc_mixer_control *mc =
949 (struct soc_mixer_control *)kcontrol->private_value;
950 struct wm_adsp *dsp = &dsps[mc->shift - 1];
951
952 ucontrol->value.integer.value[0] = dsp->preloaded;
953
954 return 0;
955}
956EXPORT_SYMBOL_GPL(wm_adsp2_preloader_get);
957
958int wm_adsp2_preloader_put(struct snd_kcontrol *kcontrol,
959 struct snd_ctl_elem_value *ucontrol)
960{
961 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
962 struct wm_adsp *dsps = snd_soc_component_get_drvdata(component);
963 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
964 struct soc_mixer_control *mc =
965 (struct soc_mixer_control *)kcontrol->private_value;
966 struct wm_adsp *dsp = &dsps[mc->shift - 1];
967 char preload[32];
968
969 if (dsp->preloaded == ucontrol->value.integer.value[0])
970 return 0;
971
972 snprintf(preload, ARRAY_SIZE(preload), "%s Preload", dsp->cs_dsp.name);
973
974 if (ucontrol->value.integer.value[0] || dsp->toggle_preload)
975 snd_soc_component_force_enable_pin(component, preload);
976 else
977 snd_soc_component_disable_pin(component, preload);
978
979 snd_soc_dapm_sync(dapm);
980
981 flush_work(&dsp->boot_work);
982
983 dsp->preloaded = ucontrol->value.integer.value[0];
984
985 if (dsp->toggle_preload) {
986 snd_soc_component_disable_pin(component, preload);
987 snd_soc_dapm_sync(dapm);
988 }
989
990 return 1;
991}
992EXPORT_SYMBOL_GPL(wm_adsp2_preloader_put);
993
994int wm_adsp_power_up(struct wm_adsp *dsp, bool load_firmware)
995{
996 int ret = 0;
997 char *wmfw_filename = NULL;
998 const struct firmware *wmfw_firmware = NULL;
999 char *coeff_filename = NULL;
1000 const struct firmware *coeff_firmware = NULL;
1001
1002 if (load_firmware) {
1003 ret = wm_adsp_request_firmware_files(dsp,
1004 &wmfw_firmware, &wmfw_filename,
1005 &coeff_firmware, &coeff_filename);
1006 if (ret)
1007 return ret;
1008 }
1009
1010 ret = cs_dsp_power_up(&dsp->cs_dsp,
1011 wmfw_firmware, wmfw_filename,
1012 coeff_firmware, coeff_filename,
1013 wm_adsp_fw_text[dsp->fw]);
1014
1015 wm_adsp_release_firmware_files(dsp,
1016 wmfw_firmware, wmfw_filename,
1017 coeff_firmware, coeff_filename);
1018
1019 return ret;
1020}
1021EXPORT_SYMBOL_GPL(wm_adsp_power_up);
1022
1023void wm_adsp_power_down(struct wm_adsp *dsp)
1024{
1025 cs_dsp_power_down(&dsp->cs_dsp);
1026}
1027EXPORT_SYMBOL_GPL(wm_adsp_power_down);
1028
1029static void wm_adsp_boot_work(struct work_struct *work)
1030{
1031 struct wm_adsp *dsp = container_of(work,
1032 struct wm_adsp,
1033 boot_work);
1034
1035 wm_adsp_power_up(dsp, true);
1036}
1037
1038int wm_adsp_early_event(struct snd_soc_dapm_widget *w,
1039 struct snd_kcontrol *kcontrol, int event)
1040{
1041 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1042 struct wm_adsp *dsps = snd_soc_component_get_drvdata(component);
1043 struct wm_adsp *dsp = &dsps[w->shift];
1044
1045 switch (event) {
1046 case SND_SOC_DAPM_PRE_PMU:
1047 queue_work(system_unbound_wq, &dsp->boot_work);
1048 break;
1049 case SND_SOC_DAPM_PRE_PMD:
1050 wm_adsp_power_down(dsp);
1051 break;
1052 default:
1053 break;
1054 }
1055
1056 return 0;
1057}
1058EXPORT_SYMBOL_GPL(wm_adsp_early_event);
1059
1060static int wm_adsp_pre_run(struct cs_dsp *cs_dsp)
1061{
1062 struct wm_adsp *dsp = container_of(cs_dsp, struct wm_adsp, cs_dsp);
1063
1064 if (!dsp->pre_run)
1065 return 0;
1066
1067 return (*dsp->pre_run)(dsp);
1068}
1069
1070static int wm_adsp_event_post_run(struct cs_dsp *cs_dsp)
1071{
1072 struct wm_adsp *dsp = container_of(cs_dsp, struct wm_adsp, cs_dsp);
1073
1074 if (wm_adsp_fw[dsp->fw].num_caps != 0)
1075 return wm_adsp_buffer_init(dsp);
1076
1077 return 0;
1078}
1079
1080static void wm_adsp_event_post_stop(struct cs_dsp *cs_dsp)
1081{
1082 struct wm_adsp *dsp = container_of(cs_dsp, struct wm_adsp, cs_dsp);
1083
1084 if (wm_adsp_fw[dsp->fw].num_caps != 0)
1085 wm_adsp_buffer_free(dsp);
1086
1087 dsp->fatal_error = false;
1088}
1089
1090int wm_adsp_run(struct wm_adsp *dsp)
1091{
1092 flush_work(&dsp->boot_work);
1093
1094 return cs_dsp_run(&dsp->cs_dsp);
1095}
1096EXPORT_SYMBOL_GPL(wm_adsp_run);
1097
1098void wm_adsp_stop(struct wm_adsp *dsp)
1099{
1100 cs_dsp_stop(&dsp->cs_dsp);
1101}
1102EXPORT_SYMBOL_GPL(wm_adsp_stop);
1103
1104int wm_adsp_event(struct snd_soc_dapm_widget *w,
1105 struct snd_kcontrol *kcontrol, int event)
1106{
1107 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1108 struct wm_adsp *dsps = snd_soc_component_get_drvdata(component);
1109 struct wm_adsp *dsp = &dsps[w->shift];
1110
1111 switch (event) {
1112 case SND_SOC_DAPM_POST_PMU:
1113 return wm_adsp_run(dsp);
1114 case SND_SOC_DAPM_PRE_PMD:
1115 wm_adsp_stop(dsp);
1116 return 0;
1117 default:
1118 return 0;
1119 }
1120}
1121EXPORT_SYMBOL_GPL(wm_adsp_event);
1122
1123int wm_adsp2_component_probe(struct wm_adsp *dsp, struct snd_soc_component *component)
1124{
1125 char preload[32];
1126
1127 if (!dsp->cs_dsp.no_core_startstop) {
1128 snprintf(preload, ARRAY_SIZE(preload), "%s Preload", dsp->cs_dsp.name);
1129 snd_soc_component_disable_pin(component, preload);
1130 }
1131
1132 cs_dsp_init_debugfs(&dsp->cs_dsp, component->debugfs_root);
1133
1134 dsp->component = component;
1135
1136 return 0;
1137}
1138EXPORT_SYMBOL_GPL(wm_adsp2_component_probe);
1139
1140int wm_adsp2_component_remove(struct wm_adsp *dsp, struct snd_soc_component *component)
1141{
1142 cs_dsp_cleanup_debugfs(&dsp->cs_dsp);
1143
1144 return 0;
1145}
1146EXPORT_SYMBOL_GPL(wm_adsp2_component_remove);
1147
1148int wm_adsp2_init(struct wm_adsp *dsp)
1149{
1150 int ret;
1151
1152 INIT_WORK(&dsp->boot_work, wm_adsp_boot_work);
1153
1154 dsp->sys_config_size = sizeof(struct wm_adsp_system_config_xm_hdr);
1155 dsp->cs_dsp.client_ops = &wm_adsp2_client_ops;
1156
1157 ret = cs_dsp_adsp2_init(&dsp->cs_dsp);
1158 if (ret)
1159 return ret;
1160
1161 return wm_adsp_common_init(dsp);
1162}
1163EXPORT_SYMBOL_GPL(wm_adsp2_init);
1164
1165int wm_halo_init(struct wm_adsp *dsp)
1166{
1167 int ret;
1168
1169 INIT_WORK(&dsp->boot_work, wm_adsp_boot_work);
1170
1171 dsp->sys_config_size = sizeof(struct wm_halo_system_config_xm_hdr);
1172 dsp->cs_dsp.client_ops = &wm_adsp2_client_ops;
1173
1174 ret = cs_dsp_halo_init(&dsp->cs_dsp);
1175 if (ret)
1176 return ret;
1177
1178 return wm_adsp_common_init(dsp);
1179}
1180EXPORT_SYMBOL_GPL(wm_halo_init);
1181
1182void wm_adsp2_remove(struct wm_adsp *dsp)
1183{
1184 cs_dsp_remove(&dsp->cs_dsp);
1185}
1186EXPORT_SYMBOL_GPL(wm_adsp2_remove);
1187
1188static inline int wm_adsp_compr_attached(struct wm_adsp_compr *compr)
1189{
1190 return compr->buf != NULL;
1191}
1192
1193static int wm_adsp_compr_attach(struct wm_adsp_compr *compr)
1194{
1195 struct wm_adsp_compr_buf *buf = NULL, *tmp;
1196
1197 if (compr->dsp->fatal_error)
1198 return -EINVAL;
1199
1200 list_for_each_entry(tmp, &compr->dsp->buffer_list, list) {
1201 if (!tmp->name || !strcmp(compr->name, tmp->name)) {
1202 buf = tmp;
1203 break;
1204 }
1205 }
1206
1207 if (!buf)
1208 return -EINVAL;
1209
1210 compr->buf = buf;
1211 buf->compr = compr;
1212
1213 return 0;
1214}
1215
1216static void wm_adsp_compr_detach(struct wm_adsp_compr *compr)
1217{
1218 if (!compr)
1219 return;
1220
1221 /* Wake the poll so it can see buffer is no longer attached */
1222 if (compr->stream)
1223 snd_compr_fragment_elapsed(compr->stream);
1224
1225 if (wm_adsp_compr_attached(compr)) {
1226 compr->buf->compr = NULL;
1227 compr->buf = NULL;
1228 }
1229}
1230
1231int wm_adsp_compr_open(struct wm_adsp *dsp, struct snd_compr_stream *stream)
1232{
1233 struct wm_adsp_compr *compr, *tmp;
1234 struct snd_soc_pcm_runtime *rtd = stream->private_data;
1235 int ret = 0;
1236
1237 mutex_lock(&dsp->cs_dsp.pwr_lock);
1238
1239 if (wm_adsp_fw[dsp->fw].num_caps == 0) {
1240 adsp_err(dsp, "%s: Firmware does not support compressed API\n",
1241 snd_soc_rtd_to_codec(rtd, 0)->name);
1242 ret = -ENXIO;
1243 goto out;
1244 }
1245
1246 if (wm_adsp_fw[dsp->fw].compr_direction != stream->direction) {
1247 adsp_err(dsp, "%s: Firmware does not support stream direction\n",
1248 snd_soc_rtd_to_codec(rtd, 0)->name);
1249 ret = -EINVAL;
1250 goto out;
1251 }
1252
1253 list_for_each_entry(tmp, &dsp->compr_list, list) {
1254 if (!strcmp(tmp->name, snd_soc_rtd_to_codec(rtd, 0)->name)) {
1255 adsp_err(dsp, "%s: Only a single stream supported per dai\n",
1256 snd_soc_rtd_to_codec(rtd, 0)->name);
1257 ret = -EBUSY;
1258 goto out;
1259 }
1260 }
1261
1262 compr = kzalloc(sizeof(*compr), GFP_KERNEL);
1263 if (!compr) {
1264 ret = -ENOMEM;
1265 goto out;
1266 }
1267
1268 compr->dsp = dsp;
1269 compr->stream = stream;
1270 compr->name = snd_soc_rtd_to_codec(rtd, 0)->name;
1271
1272 list_add_tail(&compr->list, &dsp->compr_list);
1273
1274 stream->runtime->private_data = compr;
1275
1276out:
1277 mutex_unlock(&dsp->cs_dsp.pwr_lock);
1278
1279 return ret;
1280}
1281EXPORT_SYMBOL_GPL(wm_adsp_compr_open);
1282
1283int wm_adsp_compr_free(struct snd_soc_component *component,
1284 struct snd_compr_stream *stream)
1285{
1286 struct wm_adsp_compr *compr = stream->runtime->private_data;
1287 struct wm_adsp *dsp = compr->dsp;
1288
1289 mutex_lock(&dsp->cs_dsp.pwr_lock);
1290
1291 wm_adsp_compr_detach(compr);
1292 list_del(&compr->list);
1293
1294 kfree(compr->raw_buf);
1295 kfree(compr);
1296
1297 mutex_unlock(&dsp->cs_dsp.pwr_lock);
1298
1299 return 0;
1300}
1301EXPORT_SYMBOL_GPL(wm_adsp_compr_free);
1302
1303static int wm_adsp_compr_check_params(struct snd_compr_stream *stream,
1304 struct snd_compr_params *params)
1305{
1306 struct wm_adsp_compr *compr = stream->runtime->private_data;
1307 struct wm_adsp *dsp = compr->dsp;
1308 const struct wm_adsp_fw_caps *caps;
1309 const struct snd_codec_desc *desc;
1310 int i, j;
1311
1312 if (params->buffer.fragment_size < WM_ADSP_MIN_FRAGMENT_SIZE ||
1313 params->buffer.fragment_size > WM_ADSP_MAX_FRAGMENT_SIZE ||
1314 params->buffer.fragments < WM_ADSP_MIN_FRAGMENTS ||
1315 params->buffer.fragments > WM_ADSP_MAX_FRAGMENTS ||
1316 params->buffer.fragment_size % CS_DSP_DATA_WORD_SIZE) {
1317 compr_err(compr, "Invalid buffer fragsize=%d fragments=%d\n",
1318 params->buffer.fragment_size,
1319 params->buffer.fragments);
1320
1321 return -EINVAL;
1322 }
1323
1324 for (i = 0; i < wm_adsp_fw[dsp->fw].num_caps; i++) {
1325 caps = &wm_adsp_fw[dsp->fw].caps[i];
1326 desc = &caps->desc;
1327
1328 if (caps->id != params->codec.id)
1329 continue;
1330
1331 if (stream->direction == SND_COMPRESS_PLAYBACK) {
1332 if (desc->max_ch < params->codec.ch_out)
1333 continue;
1334 } else {
1335 if (desc->max_ch < params->codec.ch_in)
1336 continue;
1337 }
1338
1339 if (!(desc->formats & (1 << params->codec.format)))
1340 continue;
1341
1342 for (j = 0; j < desc->num_sample_rates; ++j)
1343 if (desc->sample_rates[j] == params->codec.sample_rate)
1344 return 0;
1345 }
1346
1347 compr_err(compr, "Invalid params id=%u ch=%u,%u rate=%u fmt=%u\n",
1348 params->codec.id, params->codec.ch_in, params->codec.ch_out,
1349 params->codec.sample_rate, params->codec.format);
1350 return -EINVAL;
1351}
1352
1353static inline unsigned int wm_adsp_compr_frag_words(struct wm_adsp_compr *compr)
1354{
1355 return compr->size.fragment_size / CS_DSP_DATA_WORD_SIZE;
1356}
1357
1358int wm_adsp_compr_set_params(struct snd_soc_component *component,
1359 struct snd_compr_stream *stream,
1360 struct snd_compr_params *params)
1361{
1362 struct wm_adsp_compr *compr = stream->runtime->private_data;
1363 unsigned int size;
1364 int ret;
1365
1366 ret = wm_adsp_compr_check_params(stream, params);
1367 if (ret)
1368 return ret;
1369
1370 compr->size = params->buffer;
1371
1372 compr_dbg(compr, "fragment_size=%d fragments=%d\n",
1373 compr->size.fragment_size, compr->size.fragments);
1374
1375 size = wm_adsp_compr_frag_words(compr) * sizeof(*compr->raw_buf);
1376 compr->raw_buf = kmalloc(size, GFP_DMA | GFP_KERNEL);
1377 if (!compr->raw_buf)
1378 return -ENOMEM;
1379
1380 compr->sample_rate = params->codec.sample_rate;
1381
1382 return 0;
1383}
1384EXPORT_SYMBOL_GPL(wm_adsp_compr_set_params);
1385
1386int wm_adsp_compr_get_caps(struct snd_soc_component *component,
1387 struct snd_compr_stream *stream,
1388 struct snd_compr_caps *caps)
1389{
1390 struct wm_adsp_compr *compr = stream->runtime->private_data;
1391 int fw = compr->dsp->fw;
1392 int i;
1393
1394 if (wm_adsp_fw[fw].caps) {
1395 for (i = 0; i < wm_adsp_fw[fw].num_caps; i++)
1396 caps->codecs[i] = wm_adsp_fw[fw].caps[i].id;
1397
1398 caps->num_codecs = i;
1399 caps->direction = wm_adsp_fw[fw].compr_direction;
1400
1401 caps->min_fragment_size = WM_ADSP_MIN_FRAGMENT_SIZE;
1402 caps->max_fragment_size = WM_ADSP_MAX_FRAGMENT_SIZE;
1403 caps->min_fragments = WM_ADSP_MIN_FRAGMENTS;
1404 caps->max_fragments = WM_ADSP_MAX_FRAGMENTS;
1405 }
1406
1407 return 0;
1408}
1409EXPORT_SYMBOL_GPL(wm_adsp_compr_get_caps);
1410
1411static inline int wm_adsp_buffer_read(struct wm_adsp_compr_buf *buf,
1412 unsigned int field_offset, u32 *data)
1413{
1414 return cs_dsp_read_data_word(&buf->dsp->cs_dsp, buf->host_buf_mem_type,
1415 buf->host_buf_ptr + field_offset, data);
1416}
1417
1418static inline int wm_adsp_buffer_write(struct wm_adsp_compr_buf *buf,
1419 unsigned int field_offset, u32 data)
1420{
1421 return cs_dsp_write_data_word(&buf->dsp->cs_dsp, buf->host_buf_mem_type,
1422 buf->host_buf_ptr + field_offset,
1423 data);
1424}
1425
1426static int wm_adsp_buffer_populate(struct wm_adsp_compr_buf *buf)
1427{
1428 const struct wm_adsp_fw_caps *caps = wm_adsp_fw[buf->dsp->fw].caps;
1429 struct wm_adsp_buffer_region *region;
1430 u32 offset = 0;
1431 int i, ret;
1432
1433 buf->regions = kcalloc(caps->num_regions, sizeof(*buf->regions),
1434 GFP_KERNEL);
1435 if (!buf->regions)
1436 return -ENOMEM;
1437
1438 for (i = 0; i < caps->num_regions; ++i) {
1439 region = &buf->regions[i];
1440
1441 region->offset = offset;
1442 region->mem_type = caps->region_defs[i].mem_type;
1443
1444 ret = wm_adsp_buffer_read(buf, caps->region_defs[i].base_offset,
1445 ®ion->base_addr);
1446 if (ret < 0)
1447 goto err;
1448
1449 ret = wm_adsp_buffer_read(buf, caps->region_defs[i].size_offset,
1450 &offset);
1451 if (ret < 0)
1452 goto err;
1453
1454 region->cumulative_size = offset;
1455
1456 compr_dbg(buf,
1457 "region=%d type=%d base=%08x off=%08x size=%08x\n",
1458 i, region->mem_type, region->base_addr,
1459 region->offset, region->cumulative_size);
1460 }
1461
1462 return 0;
1463
1464err:
1465 kfree(buf->regions);
1466 return ret;
1467}
1468
1469static void wm_adsp_buffer_clear(struct wm_adsp_compr_buf *buf)
1470{
1471 buf->irq_count = 0xFFFFFFFF;
1472 buf->read_index = -1;
1473 buf->avail = 0;
1474}
1475
1476static struct wm_adsp_compr_buf *wm_adsp_buffer_alloc(struct wm_adsp *dsp)
1477{
1478 struct wm_adsp_compr_buf *buf;
1479
1480 buf = kzalloc(sizeof(*buf), GFP_KERNEL);
1481 if (!buf)
1482 return NULL;
1483
1484 buf->dsp = dsp;
1485
1486 wm_adsp_buffer_clear(buf);
1487
1488 return buf;
1489}
1490
1491static int wm_adsp_buffer_parse_legacy(struct wm_adsp *dsp)
1492{
1493 struct cs_dsp_alg_region *alg_region;
1494 struct wm_adsp_compr_buf *buf;
1495 u32 xmalg, addr, magic;
1496 int i, ret;
1497
1498 alg_region = cs_dsp_find_alg_region(&dsp->cs_dsp, WMFW_ADSP2_XM, dsp->cs_dsp.fw_id);
1499 if (!alg_region) {
1500 adsp_err(dsp, "No algorithm region found\n");
1501 return -EINVAL;
1502 }
1503
1504 xmalg = dsp->sys_config_size / sizeof(__be32);
1505
1506 addr = alg_region->base + xmalg + ALG_XM_FIELD(magic);
1507 ret = cs_dsp_read_data_word(&dsp->cs_dsp, WMFW_ADSP2_XM, addr, &magic);
1508 if (ret < 0)
1509 return ret;
1510
1511 if (magic != WM_ADSP_ALG_XM_STRUCT_MAGIC)
1512 return -ENODEV;
1513
1514 buf = wm_adsp_buffer_alloc(dsp);
1515 if (!buf)
1516 return -ENOMEM;
1517
1518 addr = alg_region->base + xmalg + ALG_XM_FIELD(host_buf_ptr);
1519 for (i = 0; i < 5; ++i) {
1520 ret = cs_dsp_read_data_word(&dsp->cs_dsp, WMFW_ADSP2_XM, addr,
1521 &buf->host_buf_ptr);
1522 if (ret < 0)
1523 goto err;
1524
1525 if (buf->host_buf_ptr)
1526 break;
1527
1528 usleep_range(1000, 2000);
1529 }
1530
1531 if (!buf->host_buf_ptr) {
1532 ret = -EIO;
1533 goto err;
1534 }
1535
1536 buf->host_buf_mem_type = WMFW_ADSP2_XM;
1537
1538 ret = wm_adsp_buffer_populate(buf);
1539 if (ret < 0)
1540 goto err;
1541
1542 list_add_tail(&buf->list, &dsp->buffer_list);
1543
1544 compr_dbg(buf, "legacy host_buf_ptr=%x\n", buf->host_buf_ptr);
1545
1546 return 0;
1547
1548err:
1549 kfree(buf);
1550
1551 return ret;
1552}
1553
1554static int wm_adsp_buffer_parse_coeff(struct cs_dsp_coeff_ctl *cs_ctl)
1555{
1556 struct wm_adsp_host_buf_coeff_v1 coeff_v1;
1557 struct wm_adsp_compr_buf *buf;
1558 struct wm_adsp *dsp = container_of(cs_ctl->dsp, struct wm_adsp, cs_dsp);
1559 unsigned int version = 0;
1560 int ret, i;
1561
1562 for (i = 0; i < 5; ++i) {
1563 ret = cs_dsp_coeff_read_ctrl(cs_ctl, 0, &coeff_v1,
1564 min(cs_ctl->len, sizeof(coeff_v1)));
1565 if (ret < 0)
1566 return ret;
1567
1568 if (coeff_v1.host_buf_ptr)
1569 break;
1570
1571 usleep_range(1000, 2000);
1572 }
1573
1574 if (!coeff_v1.host_buf_ptr) {
1575 adsp_err(dsp, "Failed to acquire host buffer\n");
1576 return -EIO;
1577 }
1578
1579 buf = wm_adsp_buffer_alloc(dsp);
1580 if (!buf)
1581 return -ENOMEM;
1582
1583 buf->host_buf_mem_type = cs_ctl->alg_region.type;
1584 buf->host_buf_ptr = be32_to_cpu(coeff_v1.host_buf_ptr);
1585
1586 ret = wm_adsp_buffer_populate(buf);
1587 if (ret < 0)
1588 goto err;
1589
1590 /*
1591 * v0 host_buffer coefficients didn't have versioning, so if the
1592 * control is one word, assume version 0.
1593 */
1594 if (cs_ctl->len == 4)
1595 goto done;
1596
1597 version = be32_to_cpu(coeff_v1.versions) & HOST_BUF_COEFF_COMPAT_VER_MASK;
1598 version >>= HOST_BUF_COEFF_COMPAT_VER_SHIFT;
1599
1600 if (version > HOST_BUF_COEFF_SUPPORTED_COMPAT_VER) {
1601 adsp_err(dsp,
1602 "Host buffer coeff ver %u > supported version %u\n",
1603 version, HOST_BUF_COEFF_SUPPORTED_COMPAT_VER);
1604 ret = -EINVAL;
1605 goto err;
1606 }
1607
1608 cs_dsp_remove_padding((u32 *)&coeff_v1.name, ARRAY_SIZE(coeff_v1.name));
1609
1610 buf->name = kasprintf(GFP_KERNEL, "%s-dsp-%s", dsp->part,
1611 (char *)&coeff_v1.name);
1612
1613done:
1614 list_add_tail(&buf->list, &dsp->buffer_list);
1615
1616 compr_dbg(buf, "host_buf_ptr=%x coeff version %u\n",
1617 buf->host_buf_ptr, version);
1618
1619 return version;
1620
1621err:
1622 kfree(buf);
1623
1624 return ret;
1625}
1626
1627static int wm_adsp_buffer_init(struct wm_adsp *dsp)
1628{
1629 struct cs_dsp_coeff_ctl *cs_ctl;
1630 int ret;
1631
1632 list_for_each_entry(cs_ctl, &dsp->cs_dsp.ctl_list, list) {
1633 if (cs_ctl->type != WMFW_CTL_TYPE_HOST_BUFFER)
1634 continue;
1635
1636 if (!cs_ctl->enabled)
1637 continue;
1638
1639 ret = wm_adsp_buffer_parse_coeff(cs_ctl);
1640 if (ret < 0) {
1641 adsp_err(dsp, "Failed to parse coeff: %d\n", ret);
1642 goto error;
1643 } else if (ret == 0) {
1644 /* Only one buffer supported for version 0 */
1645 return 0;
1646 }
1647 }
1648
1649 if (list_empty(&dsp->buffer_list)) {
1650 /* Fall back to legacy support */
1651 ret = wm_adsp_buffer_parse_legacy(dsp);
1652 if (ret == -ENODEV)
1653 adsp_info(dsp, "Legacy support not available\n");
1654 else if (ret)
1655 adsp_warn(dsp, "Failed to parse legacy: %d\n", ret);
1656 }
1657
1658 return 0;
1659
1660error:
1661 wm_adsp_buffer_free(dsp);
1662 return ret;
1663}
1664
1665static int wm_adsp_buffer_free(struct wm_adsp *dsp)
1666{
1667 struct wm_adsp_compr_buf *buf, *tmp;
1668
1669 list_for_each_entry_safe(buf, tmp, &dsp->buffer_list, list) {
1670 wm_adsp_compr_detach(buf->compr);
1671
1672 kfree(buf->name);
1673 kfree(buf->regions);
1674 list_del(&buf->list);
1675 kfree(buf);
1676 }
1677
1678 return 0;
1679}
1680
1681static int wm_adsp_buffer_get_error(struct wm_adsp_compr_buf *buf)
1682{
1683 int ret;
1684
1685 ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(error), &buf->error);
1686 if (ret < 0) {
1687 compr_err(buf, "Failed to check buffer error: %d\n", ret);
1688 return ret;
1689 }
1690 if (buf->error != 0) {
1691 compr_err(buf, "Buffer error occurred: %d\n", buf->error);
1692 return -EIO;
1693 }
1694
1695 return 0;
1696}
1697
1698int wm_adsp_compr_trigger(struct snd_soc_component *component,
1699 struct snd_compr_stream *stream, int cmd)
1700{
1701 struct wm_adsp_compr *compr = stream->runtime->private_data;
1702 struct wm_adsp *dsp = compr->dsp;
1703 int ret = 0;
1704
1705 compr_dbg(compr, "Trigger: %d\n", cmd);
1706
1707 mutex_lock(&dsp->cs_dsp.pwr_lock);
1708
1709 switch (cmd) {
1710 case SNDRV_PCM_TRIGGER_START:
1711 if (!wm_adsp_compr_attached(compr)) {
1712 ret = wm_adsp_compr_attach(compr);
1713 if (ret < 0) {
1714 compr_err(compr, "Failed to link buffer and stream: %d\n",
1715 ret);
1716 break;
1717 }
1718 }
1719
1720 ret = wm_adsp_buffer_get_error(compr->buf);
1721 if (ret < 0)
1722 break;
1723
1724 /* Trigger the IRQ at one fragment of data */
1725 ret = wm_adsp_buffer_write(compr->buf,
1726 HOST_BUFFER_FIELD(high_water_mark),
1727 wm_adsp_compr_frag_words(compr));
1728 if (ret < 0) {
1729 compr_err(compr, "Failed to set high water mark: %d\n",
1730 ret);
1731 break;
1732 }
1733 break;
1734 case SNDRV_PCM_TRIGGER_STOP:
1735 if (wm_adsp_compr_attached(compr))
1736 wm_adsp_buffer_clear(compr->buf);
1737 break;
1738 default:
1739 ret = -EINVAL;
1740 break;
1741 }
1742
1743 mutex_unlock(&dsp->cs_dsp.pwr_lock);
1744
1745 return ret;
1746}
1747EXPORT_SYMBOL_GPL(wm_adsp_compr_trigger);
1748
1749static inline int wm_adsp_buffer_size(struct wm_adsp_compr_buf *buf)
1750{
1751 int last_region = wm_adsp_fw[buf->dsp->fw].caps->num_regions - 1;
1752
1753 return buf->regions[last_region].cumulative_size;
1754}
1755
1756static int wm_adsp_buffer_update_avail(struct wm_adsp_compr_buf *buf)
1757{
1758 u32 next_read_index, next_write_index;
1759 int write_index, read_index, avail;
1760 int ret;
1761
1762 /* Only sync read index if we haven't already read a valid index */
1763 if (buf->read_index < 0) {
1764 ret = wm_adsp_buffer_read(buf,
1765 HOST_BUFFER_FIELD(next_read_index),
1766 &next_read_index);
1767 if (ret < 0)
1768 return ret;
1769
1770 read_index = sign_extend32(next_read_index, 23);
1771
1772 if (read_index < 0) {
1773 compr_dbg(buf, "Avail check on unstarted stream\n");
1774 return 0;
1775 }
1776
1777 buf->read_index = read_index;
1778 }
1779
1780 ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(next_write_index),
1781 &next_write_index);
1782 if (ret < 0)
1783 return ret;
1784
1785 write_index = sign_extend32(next_write_index, 23);
1786
1787 avail = write_index - buf->read_index;
1788 if (avail < 0)
1789 avail += wm_adsp_buffer_size(buf);
1790
1791 compr_dbg(buf, "readindex=0x%x, writeindex=0x%x, avail=%d\n",
1792 buf->read_index, write_index, avail * CS_DSP_DATA_WORD_SIZE);
1793
1794 buf->avail = avail;
1795
1796 return 0;
1797}
1798
1799int wm_adsp_compr_handle_irq(struct wm_adsp *dsp)
1800{
1801 struct wm_adsp_compr_buf *buf;
1802 struct wm_adsp_compr *compr;
1803 int ret = 0;
1804
1805 mutex_lock(&dsp->cs_dsp.pwr_lock);
1806
1807 if (list_empty(&dsp->buffer_list)) {
1808 ret = -ENODEV;
1809 goto out;
1810 }
1811
1812 adsp_dbg(dsp, "Handling buffer IRQ\n");
1813
1814 list_for_each_entry(buf, &dsp->buffer_list, list) {
1815 compr = buf->compr;
1816
1817 ret = wm_adsp_buffer_get_error(buf);
1818 if (ret < 0)
1819 goto out_notify; /* Wake poll to report error */
1820
1821 ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(irq_count),
1822 &buf->irq_count);
1823 if (ret < 0) {
1824 compr_err(buf, "Failed to get irq_count: %d\n", ret);
1825 goto out;
1826 }
1827
1828 ret = wm_adsp_buffer_update_avail(buf);
1829 if (ret < 0) {
1830 compr_err(buf, "Error reading avail: %d\n", ret);
1831 goto out;
1832 }
1833
1834 if (wm_adsp_fw[dsp->fw].voice_trigger && buf->irq_count == 2)
1835 ret = WM_ADSP_COMPR_VOICE_TRIGGER;
1836
1837out_notify:
1838 if (compr && compr->stream)
1839 snd_compr_fragment_elapsed(compr->stream);
1840 }
1841
1842out:
1843 mutex_unlock(&dsp->cs_dsp.pwr_lock);
1844
1845 return ret;
1846}
1847EXPORT_SYMBOL_GPL(wm_adsp_compr_handle_irq);
1848
1849static int wm_adsp_buffer_reenable_irq(struct wm_adsp_compr_buf *buf)
1850{
1851 if (buf->irq_count & 0x01)
1852 return 0;
1853
1854 compr_dbg(buf, "Enable IRQ(0x%x) for next fragment\n", buf->irq_count);
1855
1856 buf->irq_count |= 0x01;
1857
1858 return wm_adsp_buffer_write(buf, HOST_BUFFER_FIELD(irq_ack),
1859 buf->irq_count);
1860}
1861
1862int wm_adsp_compr_pointer(struct snd_soc_component *component,
1863 struct snd_compr_stream *stream,
1864 struct snd_compr_tstamp *tstamp)
1865{
1866 struct wm_adsp_compr *compr = stream->runtime->private_data;
1867 struct wm_adsp *dsp = compr->dsp;
1868 struct wm_adsp_compr_buf *buf;
1869 int ret = 0;
1870
1871 compr_dbg(compr, "Pointer request\n");
1872
1873 mutex_lock(&dsp->cs_dsp.pwr_lock);
1874
1875 buf = compr->buf;
1876
1877 if (dsp->fatal_error || !buf || buf->error) {
1878 snd_compr_stop_error(stream, SNDRV_PCM_STATE_XRUN);
1879 ret = -EIO;
1880 goto out;
1881 }
1882
1883 if (buf->avail < wm_adsp_compr_frag_words(compr)) {
1884 ret = wm_adsp_buffer_update_avail(buf);
1885 if (ret < 0) {
1886 compr_err(compr, "Error reading avail: %d\n", ret);
1887 goto out;
1888 }
1889
1890 /*
1891 * If we really have less than 1 fragment available tell the
1892 * DSP to inform us once a whole fragment is available.
1893 */
1894 if (buf->avail < wm_adsp_compr_frag_words(compr)) {
1895 ret = wm_adsp_buffer_get_error(buf);
1896 if (ret < 0) {
1897 if (buf->error)
1898 snd_compr_stop_error(stream,
1899 SNDRV_PCM_STATE_XRUN);
1900 goto out;
1901 }
1902
1903 ret = wm_adsp_buffer_reenable_irq(buf);
1904 if (ret < 0) {
1905 compr_err(compr, "Failed to re-enable buffer IRQ: %d\n",
1906 ret);
1907 goto out;
1908 }
1909 }
1910 }
1911
1912 tstamp->copied_total = compr->copied_total;
1913 tstamp->copied_total += buf->avail * CS_DSP_DATA_WORD_SIZE;
1914 tstamp->sampling_rate = compr->sample_rate;
1915
1916out:
1917 mutex_unlock(&dsp->cs_dsp.pwr_lock);
1918
1919 return ret;
1920}
1921EXPORT_SYMBOL_GPL(wm_adsp_compr_pointer);
1922
1923static int wm_adsp_buffer_capture_block(struct wm_adsp_compr *compr, int target)
1924{
1925 struct wm_adsp_compr_buf *buf = compr->buf;
1926 unsigned int adsp_addr;
1927 int mem_type, nwords, max_read;
1928 int i, ret;
1929
1930 /* Calculate read parameters */
1931 for (i = 0; i < wm_adsp_fw[buf->dsp->fw].caps->num_regions; ++i)
1932 if (buf->read_index < buf->regions[i].cumulative_size)
1933 break;
1934
1935 if (i == wm_adsp_fw[buf->dsp->fw].caps->num_regions)
1936 return -EINVAL;
1937
1938 mem_type = buf->regions[i].mem_type;
1939 adsp_addr = buf->regions[i].base_addr +
1940 (buf->read_index - buf->regions[i].offset);
1941
1942 max_read = wm_adsp_compr_frag_words(compr);
1943 nwords = buf->regions[i].cumulative_size - buf->read_index;
1944
1945 if (nwords > target)
1946 nwords = target;
1947 if (nwords > buf->avail)
1948 nwords = buf->avail;
1949 if (nwords > max_read)
1950 nwords = max_read;
1951 if (!nwords)
1952 return 0;
1953
1954 /* Read data from DSP */
1955 ret = cs_dsp_read_raw_data_block(&buf->dsp->cs_dsp, mem_type, adsp_addr,
1956 nwords, (__be32 *)compr->raw_buf);
1957 if (ret < 0)
1958 return ret;
1959
1960 cs_dsp_remove_padding(compr->raw_buf, nwords);
1961
1962 /* update read index to account for words read */
1963 buf->read_index += nwords;
1964 if (buf->read_index == wm_adsp_buffer_size(buf))
1965 buf->read_index = 0;
1966
1967 ret = wm_adsp_buffer_write(buf, HOST_BUFFER_FIELD(next_read_index),
1968 buf->read_index);
1969 if (ret < 0)
1970 return ret;
1971
1972 /* update avail to account for words read */
1973 buf->avail -= nwords;
1974
1975 return nwords;
1976}
1977
1978static int wm_adsp_compr_read(struct wm_adsp_compr *compr,
1979 char __user *buf, size_t count)
1980{
1981 struct wm_adsp *dsp = compr->dsp;
1982 int ntotal = 0;
1983 int nwords, nbytes;
1984
1985 compr_dbg(compr, "Requested read of %zu bytes\n", count);
1986
1987 if (dsp->fatal_error || !compr->buf || compr->buf->error) {
1988 snd_compr_stop_error(compr->stream, SNDRV_PCM_STATE_XRUN);
1989 return -EIO;
1990 }
1991
1992 count /= CS_DSP_DATA_WORD_SIZE;
1993
1994 do {
1995 nwords = wm_adsp_buffer_capture_block(compr, count);
1996 if (nwords < 0) {
1997 compr_err(compr, "Failed to capture block: %d\n",
1998 nwords);
1999 return nwords;
2000 }
2001
2002 nbytes = nwords * CS_DSP_DATA_WORD_SIZE;
2003
2004 compr_dbg(compr, "Read %d bytes\n", nbytes);
2005
2006 if (copy_to_user(buf + ntotal, compr->raw_buf, nbytes)) {
2007 compr_err(compr, "Failed to copy data to user: %d, %d\n",
2008 ntotal, nbytes);
2009 return -EFAULT;
2010 }
2011
2012 count -= nwords;
2013 ntotal += nbytes;
2014 } while (nwords > 0 && count > 0);
2015
2016 compr->copied_total += ntotal;
2017
2018 return ntotal;
2019}
2020
2021int wm_adsp_compr_copy(struct snd_soc_component *component,
2022 struct snd_compr_stream *stream, char __user *buf,
2023 size_t count)
2024{
2025 struct wm_adsp_compr *compr = stream->runtime->private_data;
2026 struct wm_adsp *dsp = compr->dsp;
2027 int ret;
2028
2029 mutex_lock(&dsp->cs_dsp.pwr_lock);
2030
2031 if (stream->direction == SND_COMPRESS_CAPTURE)
2032 ret = wm_adsp_compr_read(compr, buf, count);
2033 else
2034 ret = -ENOTSUPP;
2035
2036 mutex_unlock(&dsp->cs_dsp.pwr_lock);
2037
2038 return ret;
2039}
2040EXPORT_SYMBOL_GPL(wm_adsp_compr_copy);
2041
2042static void wm_adsp_fatal_error(struct cs_dsp *cs_dsp)
2043{
2044 struct wm_adsp *dsp = container_of(cs_dsp, struct wm_adsp, cs_dsp);
2045 struct wm_adsp_compr *compr;
2046
2047 dsp->fatal_error = true;
2048
2049 list_for_each_entry(compr, &dsp->compr_list, list) {
2050 if (compr->stream)
2051 snd_compr_fragment_elapsed(compr->stream);
2052 }
2053}
2054
2055irqreturn_t wm_adsp2_bus_error(int irq, void *data)
2056{
2057 struct wm_adsp *dsp = (struct wm_adsp *)data;
2058
2059 cs_dsp_adsp2_bus_error(&dsp->cs_dsp);
2060
2061 return IRQ_HANDLED;
2062}
2063EXPORT_SYMBOL_GPL(wm_adsp2_bus_error);
2064
2065irqreturn_t wm_halo_bus_error(int irq, void *data)
2066{
2067 struct wm_adsp *dsp = (struct wm_adsp *)data;
2068
2069 cs_dsp_halo_bus_error(&dsp->cs_dsp);
2070
2071 return IRQ_HANDLED;
2072}
2073EXPORT_SYMBOL_GPL(wm_halo_bus_error);
2074
2075irqreturn_t wm_halo_wdt_expire(int irq, void *data)
2076{
2077 struct wm_adsp *dsp = data;
2078
2079 cs_dsp_halo_wdt_expire(&dsp->cs_dsp);
2080
2081 return IRQ_HANDLED;
2082}
2083EXPORT_SYMBOL_GPL(wm_halo_wdt_expire);
2084
2085static const struct cs_dsp_client_ops wm_adsp1_client_ops = {
2086 .control_add = wm_adsp_control_add_cb,
2087 .control_remove = wm_adsp_control_remove,
2088};
2089
2090static const struct cs_dsp_client_ops wm_adsp2_client_ops = {
2091 .control_add = wm_adsp_control_add_cb,
2092 .control_remove = wm_adsp_control_remove,
2093 .pre_run = wm_adsp_pre_run,
2094 .post_run = wm_adsp_event_post_run,
2095 .post_stop = wm_adsp_event_post_stop,
2096 .watchdog_expired = wm_adsp_fatal_error,
2097};
2098
2099MODULE_DESCRIPTION("Cirrus Logic ASoC DSP Support");
2100MODULE_LICENSE("GPL v2");
2101MODULE_IMPORT_NS("FW_CS_DSP");
1/*
2 * wm_adsp.c -- Wolfson ADSP support
3 *
4 * Copyright 2012 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/firmware.h>
18#include <linux/list.h>
19#include <linux/pm.h>
20#include <linux/pm_runtime.h>
21#include <linux/regmap.h>
22#include <linux/regulator/consumer.h>
23#include <linux/slab.h>
24#include <linux/vmalloc.h>
25#include <linux/workqueue.h>
26#include <linux/debugfs.h>
27#include <sound/core.h>
28#include <sound/pcm.h>
29#include <sound/pcm_params.h>
30#include <sound/soc.h>
31#include <sound/jack.h>
32#include <sound/initval.h>
33#include <sound/tlv.h>
34
35#include "wm_adsp.h"
36
37#define adsp_crit(_dsp, fmt, ...) \
38 dev_crit(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
39#define adsp_err(_dsp, fmt, ...) \
40 dev_err(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
41#define adsp_warn(_dsp, fmt, ...) \
42 dev_warn(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
43#define adsp_info(_dsp, fmt, ...) \
44 dev_info(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
45#define adsp_dbg(_dsp, fmt, ...) \
46 dev_dbg(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
47
48#define ADSP1_CONTROL_1 0x00
49#define ADSP1_CONTROL_2 0x02
50#define ADSP1_CONTROL_3 0x03
51#define ADSP1_CONTROL_4 0x04
52#define ADSP1_CONTROL_5 0x06
53#define ADSP1_CONTROL_6 0x07
54#define ADSP1_CONTROL_7 0x08
55#define ADSP1_CONTROL_8 0x09
56#define ADSP1_CONTROL_9 0x0A
57#define ADSP1_CONTROL_10 0x0B
58#define ADSP1_CONTROL_11 0x0C
59#define ADSP1_CONTROL_12 0x0D
60#define ADSP1_CONTROL_13 0x0F
61#define ADSP1_CONTROL_14 0x10
62#define ADSP1_CONTROL_15 0x11
63#define ADSP1_CONTROL_16 0x12
64#define ADSP1_CONTROL_17 0x13
65#define ADSP1_CONTROL_18 0x14
66#define ADSP1_CONTROL_19 0x16
67#define ADSP1_CONTROL_20 0x17
68#define ADSP1_CONTROL_21 0x18
69#define ADSP1_CONTROL_22 0x1A
70#define ADSP1_CONTROL_23 0x1B
71#define ADSP1_CONTROL_24 0x1C
72#define ADSP1_CONTROL_25 0x1E
73#define ADSP1_CONTROL_26 0x20
74#define ADSP1_CONTROL_27 0x21
75#define ADSP1_CONTROL_28 0x22
76#define ADSP1_CONTROL_29 0x23
77#define ADSP1_CONTROL_30 0x24
78#define ADSP1_CONTROL_31 0x26
79
80/*
81 * ADSP1 Control 19
82 */
83#define ADSP1_WDMA_BUFFER_LENGTH_MASK 0x00FF /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
84#define ADSP1_WDMA_BUFFER_LENGTH_SHIFT 0 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
85#define ADSP1_WDMA_BUFFER_LENGTH_WIDTH 8 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
86
87
88/*
89 * ADSP1 Control 30
90 */
91#define ADSP1_DBG_CLK_ENA 0x0008 /* DSP1_DBG_CLK_ENA */
92#define ADSP1_DBG_CLK_ENA_MASK 0x0008 /* DSP1_DBG_CLK_ENA */
93#define ADSP1_DBG_CLK_ENA_SHIFT 3 /* DSP1_DBG_CLK_ENA */
94#define ADSP1_DBG_CLK_ENA_WIDTH 1 /* DSP1_DBG_CLK_ENA */
95#define ADSP1_SYS_ENA 0x0004 /* DSP1_SYS_ENA */
96#define ADSP1_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */
97#define ADSP1_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */
98#define ADSP1_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */
99#define ADSP1_CORE_ENA 0x0002 /* DSP1_CORE_ENA */
100#define ADSP1_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */
101#define ADSP1_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */
102#define ADSP1_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */
103#define ADSP1_START 0x0001 /* DSP1_START */
104#define ADSP1_START_MASK 0x0001 /* DSP1_START */
105#define ADSP1_START_SHIFT 0 /* DSP1_START */
106#define ADSP1_START_WIDTH 1 /* DSP1_START */
107
108/*
109 * ADSP1 Control 31
110 */
111#define ADSP1_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */
112#define ADSP1_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */
113#define ADSP1_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */
114
115#define ADSP2_CONTROL 0x0
116#define ADSP2_CLOCKING 0x1
117#define ADSP2V2_CLOCKING 0x2
118#define ADSP2_STATUS1 0x4
119#define ADSP2_WDMA_CONFIG_1 0x30
120#define ADSP2_WDMA_CONFIG_2 0x31
121#define ADSP2V2_WDMA_CONFIG_2 0x32
122#define ADSP2_RDMA_CONFIG_1 0x34
123
124#define ADSP2_SCRATCH0 0x40
125#define ADSP2_SCRATCH1 0x41
126#define ADSP2_SCRATCH2 0x42
127#define ADSP2_SCRATCH3 0x43
128
129#define ADSP2V2_SCRATCH0_1 0x40
130#define ADSP2V2_SCRATCH2_3 0x42
131
132/*
133 * ADSP2 Control
134 */
135
136#define ADSP2_MEM_ENA 0x0010 /* DSP1_MEM_ENA */
137#define ADSP2_MEM_ENA_MASK 0x0010 /* DSP1_MEM_ENA */
138#define ADSP2_MEM_ENA_SHIFT 4 /* DSP1_MEM_ENA */
139#define ADSP2_MEM_ENA_WIDTH 1 /* DSP1_MEM_ENA */
140#define ADSP2_SYS_ENA 0x0004 /* DSP1_SYS_ENA */
141#define ADSP2_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */
142#define ADSP2_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */
143#define ADSP2_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */
144#define ADSP2_CORE_ENA 0x0002 /* DSP1_CORE_ENA */
145#define ADSP2_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */
146#define ADSP2_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */
147#define ADSP2_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */
148#define ADSP2_START 0x0001 /* DSP1_START */
149#define ADSP2_START_MASK 0x0001 /* DSP1_START */
150#define ADSP2_START_SHIFT 0 /* DSP1_START */
151#define ADSP2_START_WIDTH 1 /* DSP1_START */
152
153/*
154 * ADSP2 clocking
155 */
156#define ADSP2_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */
157#define ADSP2_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */
158#define ADSP2_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */
159
160/*
161 * ADSP2V2 clocking
162 */
163#define ADSP2V2_CLK_SEL_MASK 0x70000 /* CLK_SEL_ENA */
164#define ADSP2V2_CLK_SEL_SHIFT 16 /* CLK_SEL_ENA */
165#define ADSP2V2_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */
166
167#define ADSP2V2_RATE_MASK 0x7800 /* DSP_RATE */
168#define ADSP2V2_RATE_SHIFT 11 /* DSP_RATE */
169#define ADSP2V2_RATE_WIDTH 4 /* DSP_RATE */
170
171/*
172 * ADSP2 Status 1
173 */
174#define ADSP2_RAM_RDY 0x0001
175#define ADSP2_RAM_RDY_MASK 0x0001
176#define ADSP2_RAM_RDY_SHIFT 0
177#define ADSP2_RAM_RDY_WIDTH 1
178
179/*
180 * ADSP2 Lock support
181 */
182#define ADSP2_LOCK_CODE_0 0x5555
183#define ADSP2_LOCK_CODE_1 0xAAAA
184
185#define ADSP2_WATCHDOG 0x0A
186#define ADSP2_BUS_ERR_ADDR 0x52
187#define ADSP2_REGION_LOCK_STATUS 0x64
188#define ADSP2_LOCK_REGION_1_LOCK_REGION_0 0x66
189#define ADSP2_LOCK_REGION_3_LOCK_REGION_2 0x68
190#define ADSP2_LOCK_REGION_5_LOCK_REGION_4 0x6A
191#define ADSP2_LOCK_REGION_7_LOCK_REGION_6 0x6C
192#define ADSP2_LOCK_REGION_9_LOCK_REGION_8 0x6E
193#define ADSP2_LOCK_REGION_CTRL 0x7A
194#define ADSP2_PMEM_ERR_ADDR_XMEM_ERR_ADDR 0x7C
195
196#define ADSP2_REGION_LOCK_ERR_MASK 0x8000
197#define ADSP2_SLAVE_ERR_MASK 0x4000
198#define ADSP2_WDT_TIMEOUT_STS_MASK 0x2000
199#define ADSP2_CTRL_ERR_PAUSE_ENA 0x0002
200#define ADSP2_CTRL_ERR_EINT 0x0001
201
202#define ADSP2_BUS_ERR_ADDR_MASK 0x00FFFFFF
203#define ADSP2_XMEM_ERR_ADDR_MASK 0x0000FFFF
204#define ADSP2_PMEM_ERR_ADDR_MASK 0x7FFF0000
205#define ADSP2_PMEM_ERR_ADDR_SHIFT 16
206#define ADSP2_WDT_ENA_MASK 0xFFFFFFFD
207
208#define ADSP2_LOCK_REGION_SHIFT 16
209
210#define ADSP_MAX_STD_CTRL_SIZE 512
211
212#define WM_ADSP_ACKED_CTL_TIMEOUT_MS 100
213#define WM_ADSP_ACKED_CTL_N_QUICKPOLLS 10
214#define WM_ADSP_ACKED_CTL_MIN_VALUE 0
215#define WM_ADSP_ACKED_CTL_MAX_VALUE 0xFFFFFF
216
217/*
218 * Event control messages
219 */
220#define WM_ADSP_FW_EVENT_SHUTDOWN 0x000001
221
222struct wm_adsp_buf {
223 struct list_head list;
224 void *buf;
225};
226
227static struct wm_adsp_buf *wm_adsp_buf_alloc(const void *src, size_t len,
228 struct list_head *list)
229{
230 struct wm_adsp_buf *buf = kzalloc(sizeof(*buf), GFP_KERNEL);
231
232 if (buf == NULL)
233 return NULL;
234
235 buf->buf = vmalloc(len);
236 if (!buf->buf) {
237 kfree(buf);
238 return NULL;
239 }
240 memcpy(buf->buf, src, len);
241
242 if (list)
243 list_add_tail(&buf->list, list);
244
245 return buf;
246}
247
248static void wm_adsp_buf_free(struct list_head *list)
249{
250 while (!list_empty(list)) {
251 struct wm_adsp_buf *buf = list_first_entry(list,
252 struct wm_adsp_buf,
253 list);
254 list_del(&buf->list);
255 vfree(buf->buf);
256 kfree(buf);
257 }
258}
259
260#define WM_ADSP_FW_MBC_VSS 0
261#define WM_ADSP_FW_HIFI 1
262#define WM_ADSP_FW_TX 2
263#define WM_ADSP_FW_TX_SPK 3
264#define WM_ADSP_FW_RX 4
265#define WM_ADSP_FW_RX_ANC 5
266#define WM_ADSP_FW_CTRL 6
267#define WM_ADSP_FW_ASR 7
268#define WM_ADSP_FW_TRACE 8
269#define WM_ADSP_FW_SPK_PROT 9
270#define WM_ADSP_FW_MISC 10
271
272#define WM_ADSP_NUM_FW 11
273
274static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = {
275 [WM_ADSP_FW_MBC_VSS] = "MBC/VSS",
276 [WM_ADSP_FW_HIFI] = "MasterHiFi",
277 [WM_ADSP_FW_TX] = "Tx",
278 [WM_ADSP_FW_TX_SPK] = "Tx Speaker",
279 [WM_ADSP_FW_RX] = "Rx",
280 [WM_ADSP_FW_RX_ANC] = "Rx ANC",
281 [WM_ADSP_FW_CTRL] = "Voice Ctrl",
282 [WM_ADSP_FW_ASR] = "ASR Assist",
283 [WM_ADSP_FW_TRACE] = "Dbg Trace",
284 [WM_ADSP_FW_SPK_PROT] = "Protection",
285 [WM_ADSP_FW_MISC] = "Misc",
286};
287
288struct wm_adsp_system_config_xm_hdr {
289 __be32 sys_enable;
290 __be32 fw_id;
291 __be32 fw_rev;
292 __be32 boot_status;
293 __be32 watchdog;
294 __be32 dma_buffer_size;
295 __be32 rdma[6];
296 __be32 wdma[8];
297 __be32 build_job_name[3];
298 __be32 build_job_number;
299};
300
301struct wm_adsp_alg_xm_struct {
302 __be32 magic;
303 __be32 smoothing;
304 __be32 threshold;
305 __be32 host_buf_ptr;
306 __be32 start_seq;
307 __be32 high_water_mark;
308 __be32 low_water_mark;
309 __be64 smoothed_power;
310};
311
312struct wm_adsp_buffer {
313 __be32 X_buf_base; /* XM base addr of first X area */
314 __be32 X_buf_size; /* Size of 1st X area in words */
315 __be32 X_buf_base2; /* XM base addr of 2nd X area */
316 __be32 X_buf_brk; /* Total X size in words */
317 __be32 Y_buf_base; /* YM base addr of Y area */
318 __be32 wrap; /* Total size X and Y in words */
319 __be32 high_water_mark; /* Point at which IRQ is asserted */
320 __be32 irq_count; /* bits 1-31 count IRQ assertions */
321 __be32 irq_ack; /* acked IRQ count, bit 0 enables IRQ */
322 __be32 next_write_index; /* word index of next write */
323 __be32 next_read_index; /* word index of next read */
324 __be32 error; /* error if any */
325 __be32 oldest_block_index; /* word index of oldest surviving */
326 __be32 requested_rewind; /* how many blocks rewind was done */
327 __be32 reserved_space; /* internal */
328 __be32 min_free; /* min free space since stream start */
329 __be32 blocks_written[2]; /* total blocks written (64 bit) */
330 __be32 words_written[2]; /* total words written (64 bit) */
331};
332
333struct wm_adsp_compr;
334
335struct wm_adsp_compr_buf {
336 struct wm_adsp *dsp;
337 struct wm_adsp_compr *compr;
338
339 struct wm_adsp_buffer_region *regions;
340 u32 host_buf_ptr;
341
342 u32 error;
343 u32 irq_count;
344 int read_index;
345 int avail;
346};
347
348struct wm_adsp_compr {
349 struct wm_adsp *dsp;
350 struct wm_adsp_compr_buf *buf;
351
352 struct snd_compr_stream *stream;
353 struct snd_compressed_buffer size;
354
355 u32 *raw_buf;
356 unsigned int copied_total;
357
358 unsigned int sample_rate;
359};
360
361#define WM_ADSP_DATA_WORD_SIZE 3
362
363#define WM_ADSP_MIN_FRAGMENTS 1
364#define WM_ADSP_MAX_FRAGMENTS 256
365#define WM_ADSP_MIN_FRAGMENT_SIZE (64 * WM_ADSP_DATA_WORD_SIZE)
366#define WM_ADSP_MAX_FRAGMENT_SIZE (4096 * WM_ADSP_DATA_WORD_SIZE)
367
368#define WM_ADSP_ALG_XM_STRUCT_MAGIC 0x49aec7
369
370#define HOST_BUFFER_FIELD(field) \
371 (offsetof(struct wm_adsp_buffer, field) / sizeof(__be32))
372
373#define ALG_XM_FIELD(field) \
374 (offsetof(struct wm_adsp_alg_xm_struct, field) / sizeof(__be32))
375
376static int wm_adsp_buffer_init(struct wm_adsp *dsp);
377static int wm_adsp_buffer_free(struct wm_adsp *dsp);
378
379struct wm_adsp_buffer_region {
380 unsigned int offset;
381 unsigned int cumulative_size;
382 unsigned int mem_type;
383 unsigned int base_addr;
384};
385
386struct wm_adsp_buffer_region_def {
387 unsigned int mem_type;
388 unsigned int base_offset;
389 unsigned int size_offset;
390};
391
392static const struct wm_adsp_buffer_region_def default_regions[] = {
393 {
394 .mem_type = WMFW_ADSP2_XM,
395 .base_offset = HOST_BUFFER_FIELD(X_buf_base),
396 .size_offset = HOST_BUFFER_FIELD(X_buf_size),
397 },
398 {
399 .mem_type = WMFW_ADSP2_XM,
400 .base_offset = HOST_BUFFER_FIELD(X_buf_base2),
401 .size_offset = HOST_BUFFER_FIELD(X_buf_brk),
402 },
403 {
404 .mem_type = WMFW_ADSP2_YM,
405 .base_offset = HOST_BUFFER_FIELD(Y_buf_base),
406 .size_offset = HOST_BUFFER_FIELD(wrap),
407 },
408};
409
410struct wm_adsp_fw_caps {
411 u32 id;
412 struct snd_codec_desc desc;
413 int num_regions;
414 const struct wm_adsp_buffer_region_def *region_defs;
415};
416
417static const struct wm_adsp_fw_caps ctrl_caps[] = {
418 {
419 .id = SND_AUDIOCODEC_BESPOKE,
420 .desc = {
421 .max_ch = 1,
422 .sample_rates = { 16000 },
423 .num_sample_rates = 1,
424 .formats = SNDRV_PCM_FMTBIT_S16_LE,
425 },
426 .num_regions = ARRAY_SIZE(default_regions),
427 .region_defs = default_regions,
428 },
429};
430
431static const struct wm_adsp_fw_caps trace_caps[] = {
432 {
433 .id = SND_AUDIOCODEC_BESPOKE,
434 .desc = {
435 .max_ch = 8,
436 .sample_rates = {
437 4000, 8000, 11025, 12000, 16000, 22050,
438 24000, 32000, 44100, 48000, 64000, 88200,
439 96000, 176400, 192000
440 },
441 .num_sample_rates = 15,
442 .formats = SNDRV_PCM_FMTBIT_S16_LE,
443 },
444 .num_regions = ARRAY_SIZE(default_regions),
445 .region_defs = default_regions,
446 },
447};
448
449static const struct {
450 const char *file;
451 int compr_direction;
452 int num_caps;
453 const struct wm_adsp_fw_caps *caps;
454 bool voice_trigger;
455} wm_adsp_fw[WM_ADSP_NUM_FW] = {
456 [WM_ADSP_FW_MBC_VSS] = { .file = "mbc-vss" },
457 [WM_ADSP_FW_HIFI] = { .file = "hifi" },
458 [WM_ADSP_FW_TX] = { .file = "tx" },
459 [WM_ADSP_FW_TX_SPK] = { .file = "tx-spk" },
460 [WM_ADSP_FW_RX] = { .file = "rx" },
461 [WM_ADSP_FW_RX_ANC] = { .file = "rx-anc" },
462 [WM_ADSP_FW_CTRL] = {
463 .file = "ctrl",
464 .compr_direction = SND_COMPRESS_CAPTURE,
465 .num_caps = ARRAY_SIZE(ctrl_caps),
466 .caps = ctrl_caps,
467 .voice_trigger = true,
468 },
469 [WM_ADSP_FW_ASR] = { .file = "asr" },
470 [WM_ADSP_FW_TRACE] = {
471 .file = "trace",
472 .compr_direction = SND_COMPRESS_CAPTURE,
473 .num_caps = ARRAY_SIZE(trace_caps),
474 .caps = trace_caps,
475 },
476 [WM_ADSP_FW_SPK_PROT] = { .file = "spk-prot" },
477 [WM_ADSP_FW_MISC] = { .file = "misc" },
478};
479
480struct wm_coeff_ctl_ops {
481 int (*xget)(struct snd_kcontrol *kcontrol,
482 struct snd_ctl_elem_value *ucontrol);
483 int (*xput)(struct snd_kcontrol *kcontrol,
484 struct snd_ctl_elem_value *ucontrol);
485};
486
487struct wm_coeff_ctl {
488 const char *name;
489 const char *fw_name;
490 struct wm_adsp_alg_region alg_region;
491 struct wm_coeff_ctl_ops ops;
492 struct wm_adsp *dsp;
493 unsigned int enabled:1;
494 struct list_head list;
495 void *cache;
496 unsigned int offset;
497 size_t len;
498 unsigned int set:1;
499 struct soc_bytes_ext bytes_ext;
500 unsigned int flags;
501 unsigned int type;
502};
503
504static const char *wm_adsp_mem_region_name(unsigned int type)
505{
506 switch (type) {
507 case WMFW_ADSP1_PM:
508 return "PM";
509 case WMFW_ADSP1_DM:
510 return "DM";
511 case WMFW_ADSP2_XM:
512 return "XM";
513 case WMFW_ADSP2_YM:
514 return "YM";
515 case WMFW_ADSP1_ZM:
516 return "ZM";
517 default:
518 return NULL;
519 }
520}
521
522#ifdef CONFIG_DEBUG_FS
523static void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp, const char *s)
524{
525 char *tmp = kasprintf(GFP_KERNEL, "%s\n", s);
526
527 kfree(dsp->wmfw_file_name);
528 dsp->wmfw_file_name = tmp;
529}
530
531static void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp, const char *s)
532{
533 char *tmp = kasprintf(GFP_KERNEL, "%s\n", s);
534
535 kfree(dsp->bin_file_name);
536 dsp->bin_file_name = tmp;
537}
538
539static void wm_adsp_debugfs_clear(struct wm_adsp *dsp)
540{
541 kfree(dsp->wmfw_file_name);
542 kfree(dsp->bin_file_name);
543 dsp->wmfw_file_name = NULL;
544 dsp->bin_file_name = NULL;
545}
546
547static ssize_t wm_adsp_debugfs_wmfw_read(struct file *file,
548 char __user *user_buf,
549 size_t count, loff_t *ppos)
550{
551 struct wm_adsp *dsp = file->private_data;
552 ssize_t ret;
553
554 mutex_lock(&dsp->pwr_lock);
555
556 if (!dsp->wmfw_file_name || !dsp->booted)
557 ret = 0;
558 else
559 ret = simple_read_from_buffer(user_buf, count, ppos,
560 dsp->wmfw_file_name,
561 strlen(dsp->wmfw_file_name));
562
563 mutex_unlock(&dsp->pwr_lock);
564 return ret;
565}
566
567static ssize_t wm_adsp_debugfs_bin_read(struct file *file,
568 char __user *user_buf,
569 size_t count, loff_t *ppos)
570{
571 struct wm_adsp *dsp = file->private_data;
572 ssize_t ret;
573
574 mutex_lock(&dsp->pwr_lock);
575
576 if (!dsp->bin_file_name || !dsp->booted)
577 ret = 0;
578 else
579 ret = simple_read_from_buffer(user_buf, count, ppos,
580 dsp->bin_file_name,
581 strlen(dsp->bin_file_name));
582
583 mutex_unlock(&dsp->pwr_lock);
584 return ret;
585}
586
587static const struct {
588 const char *name;
589 const struct file_operations fops;
590} wm_adsp_debugfs_fops[] = {
591 {
592 .name = "wmfw_file_name",
593 .fops = {
594 .open = simple_open,
595 .read = wm_adsp_debugfs_wmfw_read,
596 },
597 },
598 {
599 .name = "bin_file_name",
600 .fops = {
601 .open = simple_open,
602 .read = wm_adsp_debugfs_bin_read,
603 },
604 },
605};
606
607static void wm_adsp2_init_debugfs(struct wm_adsp *dsp,
608 struct snd_soc_component *component)
609{
610 struct dentry *root = NULL;
611 char *root_name;
612 int i;
613
614 if (!component->debugfs_root) {
615 adsp_err(dsp, "No codec debugfs root\n");
616 goto err;
617 }
618
619 root_name = kmalloc(PAGE_SIZE, GFP_KERNEL);
620 if (!root_name)
621 goto err;
622
623 snprintf(root_name, PAGE_SIZE, "dsp%d", dsp->num);
624 root = debugfs_create_dir(root_name, component->debugfs_root);
625 kfree(root_name);
626
627 if (!root)
628 goto err;
629
630 if (!debugfs_create_bool("booted", S_IRUGO, root, &dsp->booted))
631 goto err;
632
633 if (!debugfs_create_bool("running", S_IRUGO, root, &dsp->running))
634 goto err;
635
636 if (!debugfs_create_x32("fw_id", S_IRUGO, root, &dsp->fw_id))
637 goto err;
638
639 if (!debugfs_create_x32("fw_version", S_IRUGO, root,
640 &dsp->fw_id_version))
641 goto err;
642
643 for (i = 0; i < ARRAY_SIZE(wm_adsp_debugfs_fops); ++i) {
644 if (!debugfs_create_file(wm_adsp_debugfs_fops[i].name,
645 S_IRUGO, root, dsp,
646 &wm_adsp_debugfs_fops[i].fops))
647 goto err;
648 }
649
650 dsp->debugfs_root = root;
651 return;
652
653err:
654 debugfs_remove_recursive(root);
655 adsp_err(dsp, "Failed to create debugfs\n");
656}
657
658static void wm_adsp2_cleanup_debugfs(struct wm_adsp *dsp)
659{
660 wm_adsp_debugfs_clear(dsp);
661 debugfs_remove_recursive(dsp->debugfs_root);
662}
663#else
664static inline void wm_adsp2_init_debugfs(struct wm_adsp *dsp,
665 struct snd_soc_component *component)
666{
667}
668
669static inline void wm_adsp2_cleanup_debugfs(struct wm_adsp *dsp)
670{
671}
672
673static inline void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp,
674 const char *s)
675{
676}
677
678static inline void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp,
679 const char *s)
680{
681}
682
683static inline void wm_adsp_debugfs_clear(struct wm_adsp *dsp)
684{
685}
686#endif
687
688static int wm_adsp_fw_get(struct snd_kcontrol *kcontrol,
689 struct snd_ctl_elem_value *ucontrol)
690{
691 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
692 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
693 struct wm_adsp *dsp = snd_soc_component_get_drvdata(component);
694
695 ucontrol->value.enumerated.item[0] = dsp[e->shift_l].fw;
696
697 return 0;
698}
699
700static int wm_adsp_fw_put(struct snd_kcontrol *kcontrol,
701 struct snd_ctl_elem_value *ucontrol)
702{
703 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
704 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
705 struct wm_adsp *dsp = snd_soc_component_get_drvdata(component);
706 int ret = 0;
707
708 if (ucontrol->value.enumerated.item[0] == dsp[e->shift_l].fw)
709 return 0;
710
711 if (ucontrol->value.enumerated.item[0] >= WM_ADSP_NUM_FW)
712 return -EINVAL;
713
714 mutex_lock(&dsp[e->shift_l].pwr_lock);
715
716 if (dsp[e->shift_l].booted || dsp[e->shift_l].compr)
717 ret = -EBUSY;
718 else
719 dsp[e->shift_l].fw = ucontrol->value.enumerated.item[0];
720
721 mutex_unlock(&dsp[e->shift_l].pwr_lock);
722
723 return ret;
724}
725
726static const struct soc_enum wm_adsp_fw_enum[] = {
727 SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
728 SOC_ENUM_SINGLE(0, 1, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
729 SOC_ENUM_SINGLE(0, 2, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
730 SOC_ENUM_SINGLE(0, 3, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
731 SOC_ENUM_SINGLE(0, 4, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
732 SOC_ENUM_SINGLE(0, 5, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
733 SOC_ENUM_SINGLE(0, 6, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
734};
735
736const struct snd_kcontrol_new wm_adsp_fw_controls[] = {
737 SOC_ENUM_EXT("DSP1 Firmware", wm_adsp_fw_enum[0],
738 wm_adsp_fw_get, wm_adsp_fw_put),
739 SOC_ENUM_EXT("DSP2 Firmware", wm_adsp_fw_enum[1],
740 wm_adsp_fw_get, wm_adsp_fw_put),
741 SOC_ENUM_EXT("DSP3 Firmware", wm_adsp_fw_enum[2],
742 wm_adsp_fw_get, wm_adsp_fw_put),
743 SOC_ENUM_EXT("DSP4 Firmware", wm_adsp_fw_enum[3],
744 wm_adsp_fw_get, wm_adsp_fw_put),
745 SOC_ENUM_EXT("DSP5 Firmware", wm_adsp_fw_enum[4],
746 wm_adsp_fw_get, wm_adsp_fw_put),
747 SOC_ENUM_EXT("DSP6 Firmware", wm_adsp_fw_enum[5],
748 wm_adsp_fw_get, wm_adsp_fw_put),
749 SOC_ENUM_EXT("DSP7 Firmware", wm_adsp_fw_enum[6],
750 wm_adsp_fw_get, wm_adsp_fw_put),
751};
752EXPORT_SYMBOL_GPL(wm_adsp_fw_controls);
753
754static struct wm_adsp_region const *wm_adsp_find_region(struct wm_adsp *dsp,
755 int type)
756{
757 int i;
758
759 for (i = 0; i < dsp->num_mems; i++)
760 if (dsp->mem[i].type == type)
761 return &dsp->mem[i];
762
763 return NULL;
764}
765
766static unsigned int wm_adsp_region_to_reg(struct wm_adsp_region const *mem,
767 unsigned int offset)
768{
769 if (WARN_ON(!mem))
770 return offset;
771 switch (mem->type) {
772 case WMFW_ADSP1_PM:
773 return mem->base + (offset * 3);
774 case WMFW_ADSP1_DM:
775 return mem->base + (offset * 2);
776 case WMFW_ADSP2_XM:
777 return mem->base + (offset * 2);
778 case WMFW_ADSP2_YM:
779 return mem->base + (offset * 2);
780 case WMFW_ADSP1_ZM:
781 return mem->base + (offset * 2);
782 default:
783 WARN(1, "Unknown memory region type");
784 return offset;
785 }
786}
787
788static void wm_adsp2_show_fw_status(struct wm_adsp *dsp)
789{
790 u16 scratch[4];
791 int ret;
792
793 ret = regmap_raw_read(dsp->regmap, dsp->base + ADSP2_SCRATCH0,
794 scratch, sizeof(scratch));
795 if (ret) {
796 adsp_err(dsp, "Failed to read SCRATCH regs: %d\n", ret);
797 return;
798 }
799
800 adsp_dbg(dsp, "FW SCRATCH 0:0x%x 1:0x%x 2:0x%x 3:0x%x\n",
801 be16_to_cpu(scratch[0]),
802 be16_to_cpu(scratch[1]),
803 be16_to_cpu(scratch[2]),
804 be16_to_cpu(scratch[3]));
805}
806
807static void wm_adsp2v2_show_fw_status(struct wm_adsp *dsp)
808{
809 u32 scratch[2];
810 int ret;
811
812 ret = regmap_raw_read(dsp->regmap, dsp->base + ADSP2V2_SCRATCH0_1,
813 scratch, sizeof(scratch));
814
815 if (ret) {
816 adsp_err(dsp, "Failed to read SCRATCH regs: %d\n", ret);
817 return;
818 }
819
820 scratch[0] = be32_to_cpu(scratch[0]);
821 scratch[1] = be32_to_cpu(scratch[1]);
822
823 adsp_dbg(dsp, "FW SCRATCH 0:0x%x 1:0x%x 2:0x%x 3:0x%x\n",
824 scratch[0] & 0xFFFF,
825 scratch[0] >> 16,
826 scratch[1] & 0xFFFF,
827 scratch[1] >> 16);
828}
829
830static inline struct wm_coeff_ctl *bytes_ext_to_ctl(struct soc_bytes_ext *ext)
831{
832 return container_of(ext, struct wm_coeff_ctl, bytes_ext);
833}
834
835static int wm_coeff_base_reg(struct wm_coeff_ctl *ctl, unsigned int *reg)
836{
837 const struct wm_adsp_alg_region *alg_region = &ctl->alg_region;
838 struct wm_adsp *dsp = ctl->dsp;
839 const struct wm_adsp_region *mem;
840
841 mem = wm_adsp_find_region(dsp, alg_region->type);
842 if (!mem) {
843 adsp_err(dsp, "No base for region %x\n",
844 alg_region->type);
845 return -EINVAL;
846 }
847
848 *reg = wm_adsp_region_to_reg(mem, ctl->alg_region.base + ctl->offset);
849
850 return 0;
851}
852
853static int wm_coeff_info(struct snd_kcontrol *kctl,
854 struct snd_ctl_elem_info *uinfo)
855{
856 struct soc_bytes_ext *bytes_ext =
857 (struct soc_bytes_ext *)kctl->private_value;
858 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
859
860 switch (ctl->type) {
861 case WMFW_CTL_TYPE_ACKED:
862 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
863 uinfo->value.integer.min = WM_ADSP_ACKED_CTL_MIN_VALUE;
864 uinfo->value.integer.max = WM_ADSP_ACKED_CTL_MAX_VALUE;
865 uinfo->value.integer.step = 1;
866 uinfo->count = 1;
867 break;
868 default:
869 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
870 uinfo->count = ctl->len;
871 break;
872 }
873
874 return 0;
875}
876
877static int wm_coeff_write_acked_control(struct wm_coeff_ctl *ctl,
878 unsigned int event_id)
879{
880 struct wm_adsp *dsp = ctl->dsp;
881 u32 val = cpu_to_be32(event_id);
882 unsigned int reg;
883 int i, ret;
884
885 ret = wm_coeff_base_reg(ctl, ®);
886 if (ret)
887 return ret;
888
889 adsp_dbg(dsp, "Sending 0x%x to acked control alg 0x%x %s:0x%x\n",
890 event_id, ctl->alg_region.alg,
891 wm_adsp_mem_region_name(ctl->alg_region.type), ctl->offset);
892
893 ret = regmap_raw_write(dsp->regmap, reg, &val, sizeof(val));
894 if (ret) {
895 adsp_err(dsp, "Failed to write %x: %d\n", reg, ret);
896 return ret;
897 }
898
899 /*
900 * Poll for ack, we initially poll at ~1ms intervals for firmwares
901 * that respond quickly, then go to ~10ms polls. A firmware is unlikely
902 * to ack instantly so we do the first 1ms delay before reading the
903 * control to avoid a pointless bus transaction
904 */
905 for (i = 0; i < WM_ADSP_ACKED_CTL_TIMEOUT_MS;) {
906 switch (i) {
907 case 0 ... WM_ADSP_ACKED_CTL_N_QUICKPOLLS - 1:
908 usleep_range(1000, 2000);
909 i++;
910 break;
911 default:
912 usleep_range(10000, 20000);
913 i += 10;
914 break;
915 }
916
917 ret = regmap_raw_read(dsp->regmap, reg, &val, sizeof(val));
918 if (ret) {
919 adsp_err(dsp, "Failed to read %x: %d\n", reg, ret);
920 return ret;
921 }
922
923 if (val == 0) {
924 adsp_dbg(dsp, "Acked control ACKED at poll %u\n", i);
925 return 0;
926 }
927 }
928
929 adsp_warn(dsp, "Acked control @0x%x alg:0x%x %s:0x%x timed out\n",
930 reg, ctl->alg_region.alg,
931 wm_adsp_mem_region_name(ctl->alg_region.type),
932 ctl->offset);
933
934 return -ETIMEDOUT;
935}
936
937static int wm_coeff_write_control(struct wm_coeff_ctl *ctl,
938 const void *buf, size_t len)
939{
940 struct wm_adsp *dsp = ctl->dsp;
941 void *scratch;
942 int ret;
943 unsigned int reg;
944
945 ret = wm_coeff_base_reg(ctl, ®);
946 if (ret)
947 return ret;
948
949 scratch = kmemdup(buf, len, GFP_KERNEL | GFP_DMA);
950 if (!scratch)
951 return -ENOMEM;
952
953 ret = regmap_raw_write(dsp->regmap, reg, scratch,
954 len);
955 if (ret) {
956 adsp_err(dsp, "Failed to write %zu bytes to %x: %d\n",
957 len, reg, ret);
958 kfree(scratch);
959 return ret;
960 }
961 adsp_dbg(dsp, "Wrote %zu bytes to %x\n", len, reg);
962
963 kfree(scratch);
964
965 return 0;
966}
967
968static int wm_coeff_put(struct snd_kcontrol *kctl,
969 struct snd_ctl_elem_value *ucontrol)
970{
971 struct soc_bytes_ext *bytes_ext =
972 (struct soc_bytes_ext *)kctl->private_value;
973 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
974 char *p = ucontrol->value.bytes.data;
975 int ret = 0;
976
977 mutex_lock(&ctl->dsp->pwr_lock);
978
979 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE)
980 ret = -EPERM;
981 else
982 memcpy(ctl->cache, p, ctl->len);
983
984 ctl->set = 1;
985 if (ctl->enabled && ctl->dsp->running)
986 ret = wm_coeff_write_control(ctl, p, ctl->len);
987
988 mutex_unlock(&ctl->dsp->pwr_lock);
989
990 return ret;
991}
992
993static int wm_coeff_tlv_put(struct snd_kcontrol *kctl,
994 const unsigned int __user *bytes, unsigned int size)
995{
996 struct soc_bytes_ext *bytes_ext =
997 (struct soc_bytes_ext *)kctl->private_value;
998 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
999 int ret = 0;
1000
1001 mutex_lock(&ctl->dsp->pwr_lock);
1002
1003 if (copy_from_user(ctl->cache, bytes, size)) {
1004 ret = -EFAULT;
1005 } else {
1006 ctl->set = 1;
1007 if (ctl->enabled && ctl->dsp->running)
1008 ret = wm_coeff_write_control(ctl, ctl->cache, size);
1009 else if (ctl->flags & WMFW_CTL_FLAG_VOLATILE)
1010 ret = -EPERM;
1011 }
1012
1013 mutex_unlock(&ctl->dsp->pwr_lock);
1014
1015 return ret;
1016}
1017
1018static int wm_coeff_put_acked(struct snd_kcontrol *kctl,
1019 struct snd_ctl_elem_value *ucontrol)
1020{
1021 struct soc_bytes_ext *bytes_ext =
1022 (struct soc_bytes_ext *)kctl->private_value;
1023 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
1024 unsigned int val = ucontrol->value.integer.value[0];
1025 int ret;
1026
1027 if (val == 0)
1028 return 0; /* 0 means no event */
1029
1030 mutex_lock(&ctl->dsp->pwr_lock);
1031
1032 if (ctl->enabled && ctl->dsp->running)
1033 ret = wm_coeff_write_acked_control(ctl, val);
1034 else
1035 ret = -EPERM;
1036
1037 mutex_unlock(&ctl->dsp->pwr_lock);
1038
1039 return ret;
1040}
1041
1042static int wm_coeff_read_control(struct wm_coeff_ctl *ctl,
1043 void *buf, size_t len)
1044{
1045 struct wm_adsp *dsp = ctl->dsp;
1046 void *scratch;
1047 int ret;
1048 unsigned int reg;
1049
1050 ret = wm_coeff_base_reg(ctl, ®);
1051 if (ret)
1052 return ret;
1053
1054 scratch = kmalloc(len, GFP_KERNEL | GFP_DMA);
1055 if (!scratch)
1056 return -ENOMEM;
1057
1058 ret = regmap_raw_read(dsp->regmap, reg, scratch, len);
1059 if (ret) {
1060 adsp_err(dsp, "Failed to read %zu bytes from %x: %d\n",
1061 len, reg, ret);
1062 kfree(scratch);
1063 return ret;
1064 }
1065 adsp_dbg(dsp, "Read %zu bytes from %x\n", len, reg);
1066
1067 memcpy(buf, scratch, len);
1068 kfree(scratch);
1069
1070 return 0;
1071}
1072
1073static int wm_coeff_get(struct snd_kcontrol *kctl,
1074 struct snd_ctl_elem_value *ucontrol)
1075{
1076 struct soc_bytes_ext *bytes_ext =
1077 (struct soc_bytes_ext *)kctl->private_value;
1078 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
1079 char *p = ucontrol->value.bytes.data;
1080 int ret = 0;
1081
1082 mutex_lock(&ctl->dsp->pwr_lock);
1083
1084 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) {
1085 if (ctl->enabled && ctl->dsp->running)
1086 ret = wm_coeff_read_control(ctl, p, ctl->len);
1087 else
1088 ret = -EPERM;
1089 } else {
1090 if (!ctl->flags && ctl->enabled && ctl->dsp->running)
1091 ret = wm_coeff_read_control(ctl, ctl->cache, ctl->len);
1092
1093 memcpy(p, ctl->cache, ctl->len);
1094 }
1095
1096 mutex_unlock(&ctl->dsp->pwr_lock);
1097
1098 return ret;
1099}
1100
1101static int wm_coeff_tlv_get(struct snd_kcontrol *kctl,
1102 unsigned int __user *bytes, unsigned int size)
1103{
1104 struct soc_bytes_ext *bytes_ext =
1105 (struct soc_bytes_ext *)kctl->private_value;
1106 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
1107 int ret = 0;
1108
1109 mutex_lock(&ctl->dsp->pwr_lock);
1110
1111 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) {
1112 if (ctl->enabled && ctl->dsp->running)
1113 ret = wm_coeff_read_control(ctl, ctl->cache, size);
1114 else
1115 ret = -EPERM;
1116 } else {
1117 if (!ctl->flags && ctl->enabled && ctl->dsp->running)
1118 ret = wm_coeff_read_control(ctl, ctl->cache, size);
1119 }
1120
1121 if (!ret && copy_to_user(bytes, ctl->cache, size))
1122 ret = -EFAULT;
1123
1124 mutex_unlock(&ctl->dsp->pwr_lock);
1125
1126 return ret;
1127}
1128
1129static int wm_coeff_get_acked(struct snd_kcontrol *kcontrol,
1130 struct snd_ctl_elem_value *ucontrol)
1131{
1132 /*
1133 * Although it's not useful to read an acked control, we must satisfy
1134 * user-side assumptions that all controls are readable and that a
1135 * write of the same value should be filtered out (it's valid to send
1136 * the same event number again to the firmware). We therefore return 0,
1137 * meaning "no event" so valid event numbers will always be a change
1138 */
1139 ucontrol->value.integer.value[0] = 0;
1140
1141 return 0;
1142}
1143
1144struct wmfw_ctl_work {
1145 struct wm_adsp *dsp;
1146 struct wm_coeff_ctl *ctl;
1147 struct work_struct work;
1148};
1149
1150static unsigned int wmfw_convert_flags(unsigned int in, unsigned int len)
1151{
1152 unsigned int out, rd, wr, vol;
1153
1154 if (len > ADSP_MAX_STD_CTRL_SIZE) {
1155 rd = SNDRV_CTL_ELEM_ACCESS_TLV_READ;
1156 wr = SNDRV_CTL_ELEM_ACCESS_TLV_WRITE;
1157 vol = SNDRV_CTL_ELEM_ACCESS_VOLATILE;
1158
1159 out = SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK;
1160 } else {
1161 rd = SNDRV_CTL_ELEM_ACCESS_READ;
1162 wr = SNDRV_CTL_ELEM_ACCESS_WRITE;
1163 vol = SNDRV_CTL_ELEM_ACCESS_VOLATILE;
1164
1165 out = 0;
1166 }
1167
1168 if (in) {
1169 if (in & WMFW_CTL_FLAG_READABLE)
1170 out |= rd;
1171 if (in & WMFW_CTL_FLAG_WRITEABLE)
1172 out |= wr;
1173 if (in & WMFW_CTL_FLAG_VOLATILE)
1174 out |= vol;
1175 } else {
1176 out |= rd | wr | vol;
1177 }
1178
1179 return out;
1180}
1181
1182static int wmfw_add_ctl(struct wm_adsp *dsp, struct wm_coeff_ctl *ctl)
1183{
1184 struct snd_kcontrol_new *kcontrol;
1185 int ret;
1186
1187 if (!ctl || !ctl->name)
1188 return -EINVAL;
1189
1190 kcontrol = kzalloc(sizeof(*kcontrol), GFP_KERNEL);
1191 if (!kcontrol)
1192 return -ENOMEM;
1193
1194 kcontrol->name = ctl->name;
1195 kcontrol->info = wm_coeff_info;
1196 kcontrol->iface = SNDRV_CTL_ELEM_IFACE_MIXER;
1197 kcontrol->tlv.c = snd_soc_bytes_tlv_callback;
1198 kcontrol->private_value = (unsigned long)&ctl->bytes_ext;
1199 kcontrol->access = wmfw_convert_flags(ctl->flags, ctl->len);
1200
1201 switch (ctl->type) {
1202 case WMFW_CTL_TYPE_ACKED:
1203 kcontrol->get = wm_coeff_get_acked;
1204 kcontrol->put = wm_coeff_put_acked;
1205 break;
1206 default:
1207 if (kcontrol->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
1208 ctl->bytes_ext.max = ctl->len;
1209 ctl->bytes_ext.get = wm_coeff_tlv_get;
1210 ctl->bytes_ext.put = wm_coeff_tlv_put;
1211 } else {
1212 kcontrol->get = wm_coeff_get;
1213 kcontrol->put = wm_coeff_put;
1214 }
1215 break;
1216 }
1217
1218 ret = snd_soc_add_component_controls(dsp->component, kcontrol, 1);
1219 if (ret < 0)
1220 goto err_kcontrol;
1221
1222 kfree(kcontrol);
1223
1224 return 0;
1225
1226err_kcontrol:
1227 kfree(kcontrol);
1228 return ret;
1229}
1230
1231static int wm_coeff_init_control_caches(struct wm_adsp *dsp)
1232{
1233 struct wm_coeff_ctl *ctl;
1234 int ret;
1235
1236 list_for_each_entry(ctl, &dsp->ctl_list, list) {
1237 if (!ctl->enabled || ctl->set)
1238 continue;
1239 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE)
1240 continue;
1241
1242 /*
1243 * For readable controls populate the cache from the DSP memory.
1244 * For non-readable controls the cache was zero-filled when
1245 * created so we don't need to do anything.
1246 */
1247 if (!ctl->flags || (ctl->flags & WMFW_CTL_FLAG_READABLE)) {
1248 ret = wm_coeff_read_control(ctl, ctl->cache, ctl->len);
1249 if (ret < 0)
1250 return ret;
1251 }
1252 }
1253
1254 return 0;
1255}
1256
1257static int wm_coeff_sync_controls(struct wm_adsp *dsp)
1258{
1259 struct wm_coeff_ctl *ctl;
1260 int ret;
1261
1262 list_for_each_entry(ctl, &dsp->ctl_list, list) {
1263 if (!ctl->enabled)
1264 continue;
1265 if (ctl->set && !(ctl->flags & WMFW_CTL_FLAG_VOLATILE)) {
1266 ret = wm_coeff_write_control(ctl, ctl->cache, ctl->len);
1267 if (ret < 0)
1268 return ret;
1269 }
1270 }
1271
1272 return 0;
1273}
1274
1275static void wm_adsp_signal_event_controls(struct wm_adsp *dsp,
1276 unsigned int event)
1277{
1278 struct wm_coeff_ctl *ctl;
1279 int ret;
1280
1281 list_for_each_entry(ctl, &dsp->ctl_list, list) {
1282 if (ctl->type != WMFW_CTL_TYPE_HOSTEVENT)
1283 continue;
1284
1285 if (!ctl->enabled)
1286 continue;
1287
1288 ret = wm_coeff_write_acked_control(ctl, event);
1289 if (ret)
1290 adsp_warn(dsp,
1291 "Failed to send 0x%x event to alg 0x%x (%d)\n",
1292 event, ctl->alg_region.alg, ret);
1293 }
1294}
1295
1296static void wm_adsp_ctl_work(struct work_struct *work)
1297{
1298 struct wmfw_ctl_work *ctl_work = container_of(work,
1299 struct wmfw_ctl_work,
1300 work);
1301
1302 wmfw_add_ctl(ctl_work->dsp, ctl_work->ctl);
1303 kfree(ctl_work);
1304}
1305
1306static void wm_adsp_free_ctl_blk(struct wm_coeff_ctl *ctl)
1307{
1308 kfree(ctl->cache);
1309 kfree(ctl->name);
1310 kfree(ctl);
1311}
1312
1313static int wm_adsp_create_control(struct wm_adsp *dsp,
1314 const struct wm_adsp_alg_region *alg_region,
1315 unsigned int offset, unsigned int len,
1316 const char *subname, unsigned int subname_len,
1317 unsigned int flags, unsigned int type)
1318{
1319 struct wm_coeff_ctl *ctl;
1320 struct wmfw_ctl_work *ctl_work;
1321 char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
1322 const char *region_name;
1323 int ret;
1324
1325 region_name = wm_adsp_mem_region_name(alg_region->type);
1326 if (!region_name) {
1327 adsp_err(dsp, "Unknown region type: %d\n", alg_region->type);
1328 return -EINVAL;
1329 }
1330
1331 switch (dsp->fw_ver) {
1332 case 0:
1333 case 1:
1334 snprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN, "DSP%d %s %x",
1335 dsp->num, region_name, alg_region->alg);
1336 break;
1337 default:
1338 ret = snprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN,
1339 "DSP%d%c %.12s %x", dsp->num, *region_name,
1340 wm_adsp_fw_text[dsp->fw], alg_region->alg);
1341
1342 /* Truncate the subname from the start if it is too long */
1343 if (subname) {
1344 int avail = SNDRV_CTL_ELEM_ID_NAME_MAXLEN - ret - 2;
1345 int skip = 0;
1346
1347 if (subname_len > avail)
1348 skip = subname_len - avail;
1349
1350 snprintf(name + ret,
1351 SNDRV_CTL_ELEM_ID_NAME_MAXLEN - ret, " %.*s",
1352 subname_len - skip, subname + skip);
1353 }
1354 break;
1355 }
1356
1357 list_for_each_entry(ctl, &dsp->ctl_list, list) {
1358 if (!strcmp(ctl->name, name)) {
1359 if (!ctl->enabled)
1360 ctl->enabled = 1;
1361 return 0;
1362 }
1363 }
1364
1365 ctl = kzalloc(sizeof(*ctl), GFP_KERNEL);
1366 if (!ctl)
1367 return -ENOMEM;
1368 ctl->fw_name = wm_adsp_fw_text[dsp->fw];
1369 ctl->alg_region = *alg_region;
1370 ctl->name = kmemdup(name, strlen(name) + 1, GFP_KERNEL);
1371 if (!ctl->name) {
1372 ret = -ENOMEM;
1373 goto err_ctl;
1374 }
1375 ctl->enabled = 1;
1376 ctl->set = 0;
1377 ctl->ops.xget = wm_coeff_get;
1378 ctl->ops.xput = wm_coeff_put;
1379 ctl->dsp = dsp;
1380
1381 ctl->flags = flags;
1382 ctl->type = type;
1383 ctl->offset = offset;
1384 ctl->len = len;
1385 ctl->cache = kzalloc(ctl->len, GFP_KERNEL);
1386 if (!ctl->cache) {
1387 ret = -ENOMEM;
1388 goto err_ctl_name;
1389 }
1390
1391 list_add(&ctl->list, &dsp->ctl_list);
1392
1393 if (flags & WMFW_CTL_FLAG_SYS)
1394 return 0;
1395
1396 ctl_work = kzalloc(sizeof(*ctl_work), GFP_KERNEL);
1397 if (!ctl_work) {
1398 ret = -ENOMEM;
1399 goto err_ctl_cache;
1400 }
1401
1402 ctl_work->dsp = dsp;
1403 ctl_work->ctl = ctl;
1404 INIT_WORK(&ctl_work->work, wm_adsp_ctl_work);
1405 schedule_work(&ctl_work->work);
1406
1407 return 0;
1408
1409err_ctl_cache:
1410 kfree(ctl->cache);
1411err_ctl_name:
1412 kfree(ctl->name);
1413err_ctl:
1414 kfree(ctl);
1415
1416 return ret;
1417}
1418
1419struct wm_coeff_parsed_alg {
1420 int id;
1421 const u8 *name;
1422 int name_len;
1423 int ncoeff;
1424};
1425
1426struct wm_coeff_parsed_coeff {
1427 int offset;
1428 int mem_type;
1429 const u8 *name;
1430 int name_len;
1431 int ctl_type;
1432 int flags;
1433 int len;
1434};
1435
1436static int wm_coeff_parse_string(int bytes, const u8 **pos, const u8 **str)
1437{
1438 int length;
1439
1440 switch (bytes) {
1441 case 1:
1442 length = **pos;
1443 break;
1444 case 2:
1445 length = le16_to_cpu(*((__le16 *)*pos));
1446 break;
1447 default:
1448 return 0;
1449 }
1450
1451 if (str)
1452 *str = *pos + bytes;
1453
1454 *pos += ((length + bytes) + 3) & ~0x03;
1455
1456 return length;
1457}
1458
1459static int wm_coeff_parse_int(int bytes, const u8 **pos)
1460{
1461 int val = 0;
1462
1463 switch (bytes) {
1464 case 2:
1465 val = le16_to_cpu(*((__le16 *)*pos));
1466 break;
1467 case 4:
1468 val = le32_to_cpu(*((__le32 *)*pos));
1469 break;
1470 default:
1471 break;
1472 }
1473
1474 *pos += bytes;
1475
1476 return val;
1477}
1478
1479static inline void wm_coeff_parse_alg(struct wm_adsp *dsp, const u8 **data,
1480 struct wm_coeff_parsed_alg *blk)
1481{
1482 const struct wmfw_adsp_alg_data *raw;
1483
1484 switch (dsp->fw_ver) {
1485 case 0:
1486 case 1:
1487 raw = (const struct wmfw_adsp_alg_data *)*data;
1488 *data = raw->data;
1489
1490 blk->id = le32_to_cpu(raw->id);
1491 blk->name = raw->name;
1492 blk->name_len = strlen(raw->name);
1493 blk->ncoeff = le32_to_cpu(raw->ncoeff);
1494 break;
1495 default:
1496 blk->id = wm_coeff_parse_int(sizeof(raw->id), data);
1497 blk->name_len = wm_coeff_parse_string(sizeof(u8), data,
1498 &blk->name);
1499 wm_coeff_parse_string(sizeof(u16), data, NULL);
1500 blk->ncoeff = wm_coeff_parse_int(sizeof(raw->ncoeff), data);
1501 break;
1502 }
1503
1504 adsp_dbg(dsp, "Algorithm ID: %#x\n", blk->id);
1505 adsp_dbg(dsp, "Algorithm name: %.*s\n", blk->name_len, blk->name);
1506 adsp_dbg(dsp, "# of coefficient descriptors: %#x\n", blk->ncoeff);
1507}
1508
1509static inline void wm_coeff_parse_coeff(struct wm_adsp *dsp, const u8 **data,
1510 struct wm_coeff_parsed_coeff *blk)
1511{
1512 const struct wmfw_adsp_coeff_data *raw;
1513 const u8 *tmp;
1514 int length;
1515
1516 switch (dsp->fw_ver) {
1517 case 0:
1518 case 1:
1519 raw = (const struct wmfw_adsp_coeff_data *)*data;
1520 *data = *data + sizeof(raw->hdr) + le32_to_cpu(raw->hdr.size);
1521
1522 blk->offset = le16_to_cpu(raw->hdr.offset);
1523 blk->mem_type = le16_to_cpu(raw->hdr.type);
1524 blk->name = raw->name;
1525 blk->name_len = strlen(raw->name);
1526 blk->ctl_type = le16_to_cpu(raw->ctl_type);
1527 blk->flags = le16_to_cpu(raw->flags);
1528 blk->len = le32_to_cpu(raw->len);
1529 break;
1530 default:
1531 tmp = *data;
1532 blk->offset = wm_coeff_parse_int(sizeof(raw->hdr.offset), &tmp);
1533 blk->mem_type = wm_coeff_parse_int(sizeof(raw->hdr.type), &tmp);
1534 length = wm_coeff_parse_int(sizeof(raw->hdr.size), &tmp);
1535 blk->name_len = wm_coeff_parse_string(sizeof(u8), &tmp,
1536 &blk->name);
1537 wm_coeff_parse_string(sizeof(u8), &tmp, NULL);
1538 wm_coeff_parse_string(sizeof(u16), &tmp, NULL);
1539 blk->ctl_type = wm_coeff_parse_int(sizeof(raw->ctl_type), &tmp);
1540 blk->flags = wm_coeff_parse_int(sizeof(raw->flags), &tmp);
1541 blk->len = wm_coeff_parse_int(sizeof(raw->len), &tmp);
1542
1543 *data = *data + sizeof(raw->hdr) + length;
1544 break;
1545 }
1546
1547 adsp_dbg(dsp, "\tCoefficient type: %#x\n", blk->mem_type);
1548 adsp_dbg(dsp, "\tCoefficient offset: %#x\n", blk->offset);
1549 adsp_dbg(dsp, "\tCoefficient name: %.*s\n", blk->name_len, blk->name);
1550 adsp_dbg(dsp, "\tCoefficient flags: %#x\n", blk->flags);
1551 adsp_dbg(dsp, "\tALSA control type: %#x\n", blk->ctl_type);
1552 adsp_dbg(dsp, "\tALSA control len: %#x\n", blk->len);
1553}
1554
1555static int wm_adsp_check_coeff_flags(struct wm_adsp *dsp,
1556 const struct wm_coeff_parsed_coeff *coeff_blk,
1557 unsigned int f_required,
1558 unsigned int f_illegal)
1559{
1560 if ((coeff_blk->flags & f_illegal) ||
1561 ((coeff_blk->flags & f_required) != f_required)) {
1562 adsp_err(dsp, "Illegal flags 0x%x for control type 0x%x\n",
1563 coeff_blk->flags, coeff_blk->ctl_type);
1564 return -EINVAL;
1565 }
1566
1567 return 0;
1568}
1569
1570static int wm_adsp_parse_coeff(struct wm_adsp *dsp,
1571 const struct wmfw_region *region)
1572{
1573 struct wm_adsp_alg_region alg_region = {};
1574 struct wm_coeff_parsed_alg alg_blk;
1575 struct wm_coeff_parsed_coeff coeff_blk;
1576 const u8 *data = region->data;
1577 int i, ret;
1578
1579 wm_coeff_parse_alg(dsp, &data, &alg_blk);
1580 for (i = 0; i < alg_blk.ncoeff; i++) {
1581 wm_coeff_parse_coeff(dsp, &data, &coeff_blk);
1582
1583 switch (coeff_blk.ctl_type) {
1584 case SNDRV_CTL_ELEM_TYPE_BYTES:
1585 break;
1586 case WMFW_CTL_TYPE_ACKED:
1587 if (coeff_blk.flags & WMFW_CTL_FLAG_SYS)
1588 continue; /* ignore */
1589
1590 ret = wm_adsp_check_coeff_flags(dsp, &coeff_blk,
1591 WMFW_CTL_FLAG_VOLATILE |
1592 WMFW_CTL_FLAG_WRITEABLE |
1593 WMFW_CTL_FLAG_READABLE,
1594 0);
1595 if (ret)
1596 return -EINVAL;
1597 break;
1598 case WMFW_CTL_TYPE_HOSTEVENT:
1599 ret = wm_adsp_check_coeff_flags(dsp, &coeff_blk,
1600 WMFW_CTL_FLAG_SYS |
1601 WMFW_CTL_FLAG_VOLATILE |
1602 WMFW_CTL_FLAG_WRITEABLE |
1603 WMFW_CTL_FLAG_READABLE,
1604 0);
1605 if (ret)
1606 return -EINVAL;
1607 break;
1608 default:
1609 adsp_err(dsp, "Unknown control type: %d\n",
1610 coeff_blk.ctl_type);
1611 return -EINVAL;
1612 }
1613
1614 alg_region.type = coeff_blk.mem_type;
1615 alg_region.alg = alg_blk.id;
1616
1617 ret = wm_adsp_create_control(dsp, &alg_region,
1618 coeff_blk.offset,
1619 coeff_blk.len,
1620 coeff_blk.name,
1621 coeff_blk.name_len,
1622 coeff_blk.flags,
1623 coeff_blk.ctl_type);
1624 if (ret < 0)
1625 adsp_err(dsp, "Failed to create control: %.*s, %d\n",
1626 coeff_blk.name_len, coeff_blk.name, ret);
1627 }
1628
1629 return 0;
1630}
1631
1632static int wm_adsp_load(struct wm_adsp *dsp)
1633{
1634 LIST_HEAD(buf_list);
1635 const struct firmware *firmware;
1636 struct regmap *regmap = dsp->regmap;
1637 unsigned int pos = 0;
1638 const struct wmfw_header *header;
1639 const struct wmfw_adsp1_sizes *adsp1_sizes;
1640 const struct wmfw_adsp2_sizes *adsp2_sizes;
1641 const struct wmfw_footer *footer;
1642 const struct wmfw_region *region;
1643 const struct wm_adsp_region *mem;
1644 const char *region_name;
1645 char *file, *text = NULL;
1646 struct wm_adsp_buf *buf;
1647 unsigned int reg;
1648 int regions = 0;
1649 int ret, offset, type, sizes;
1650
1651 file = kzalloc(PAGE_SIZE, GFP_KERNEL);
1652 if (file == NULL)
1653 return -ENOMEM;
1654
1655 snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.wmfw", dsp->part, dsp->num,
1656 wm_adsp_fw[dsp->fw].file);
1657 file[PAGE_SIZE - 1] = '\0';
1658
1659 ret = request_firmware(&firmware, file, dsp->dev);
1660 if (ret != 0) {
1661 adsp_err(dsp, "Failed to request '%s'\n", file);
1662 goto out;
1663 }
1664 ret = -EINVAL;
1665
1666 pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer);
1667 if (pos >= firmware->size) {
1668 adsp_err(dsp, "%s: file too short, %zu bytes\n",
1669 file, firmware->size);
1670 goto out_fw;
1671 }
1672
1673 header = (void *)&firmware->data[0];
1674
1675 if (memcmp(&header->magic[0], "WMFW", 4) != 0) {
1676 adsp_err(dsp, "%s: invalid magic\n", file);
1677 goto out_fw;
1678 }
1679
1680 switch (header->ver) {
1681 case 0:
1682 adsp_warn(dsp, "%s: Depreciated file format %d\n",
1683 file, header->ver);
1684 break;
1685 case 1:
1686 case 2:
1687 break;
1688 default:
1689 adsp_err(dsp, "%s: unknown file format %d\n",
1690 file, header->ver);
1691 goto out_fw;
1692 }
1693
1694 adsp_info(dsp, "Firmware version: %d\n", header->ver);
1695 dsp->fw_ver = header->ver;
1696
1697 if (header->core != dsp->type) {
1698 adsp_err(dsp, "%s: invalid core %d != %d\n",
1699 file, header->core, dsp->type);
1700 goto out_fw;
1701 }
1702
1703 switch (dsp->type) {
1704 case WMFW_ADSP1:
1705 pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer);
1706 adsp1_sizes = (void *)&(header[1]);
1707 footer = (void *)&(adsp1_sizes[1]);
1708 sizes = sizeof(*adsp1_sizes);
1709
1710 adsp_dbg(dsp, "%s: %d DM, %d PM, %d ZM\n",
1711 file, le32_to_cpu(adsp1_sizes->dm),
1712 le32_to_cpu(adsp1_sizes->pm),
1713 le32_to_cpu(adsp1_sizes->zm));
1714 break;
1715
1716 case WMFW_ADSP2:
1717 pos = sizeof(*header) + sizeof(*adsp2_sizes) + sizeof(*footer);
1718 adsp2_sizes = (void *)&(header[1]);
1719 footer = (void *)&(adsp2_sizes[1]);
1720 sizes = sizeof(*adsp2_sizes);
1721
1722 adsp_dbg(dsp, "%s: %d XM, %d YM %d PM, %d ZM\n",
1723 file, le32_to_cpu(adsp2_sizes->xm),
1724 le32_to_cpu(adsp2_sizes->ym),
1725 le32_to_cpu(adsp2_sizes->pm),
1726 le32_to_cpu(adsp2_sizes->zm));
1727 break;
1728
1729 default:
1730 WARN(1, "Unknown DSP type");
1731 goto out_fw;
1732 }
1733
1734 if (le32_to_cpu(header->len) != sizeof(*header) +
1735 sizes + sizeof(*footer)) {
1736 adsp_err(dsp, "%s: unexpected header length %d\n",
1737 file, le32_to_cpu(header->len));
1738 goto out_fw;
1739 }
1740
1741 adsp_dbg(dsp, "%s: timestamp %llu\n", file,
1742 le64_to_cpu(footer->timestamp));
1743
1744 while (pos < firmware->size &&
1745 sizeof(*region) < firmware->size - pos) {
1746 region = (void *)&(firmware->data[pos]);
1747 region_name = "Unknown";
1748 reg = 0;
1749 text = NULL;
1750 offset = le32_to_cpu(region->offset) & 0xffffff;
1751 type = be32_to_cpu(region->type) & 0xff;
1752 mem = wm_adsp_find_region(dsp, type);
1753
1754 switch (type) {
1755 case WMFW_NAME_TEXT:
1756 region_name = "Firmware name";
1757 text = kzalloc(le32_to_cpu(region->len) + 1,
1758 GFP_KERNEL);
1759 break;
1760 case WMFW_ALGORITHM_DATA:
1761 region_name = "Algorithm";
1762 ret = wm_adsp_parse_coeff(dsp, region);
1763 if (ret != 0)
1764 goto out_fw;
1765 break;
1766 case WMFW_INFO_TEXT:
1767 region_name = "Information";
1768 text = kzalloc(le32_to_cpu(region->len) + 1,
1769 GFP_KERNEL);
1770 break;
1771 case WMFW_ABSOLUTE:
1772 region_name = "Absolute";
1773 reg = offset;
1774 break;
1775 case WMFW_ADSP1_PM:
1776 case WMFW_ADSP1_DM:
1777 case WMFW_ADSP2_XM:
1778 case WMFW_ADSP2_YM:
1779 case WMFW_ADSP1_ZM:
1780 region_name = wm_adsp_mem_region_name(type);
1781 reg = wm_adsp_region_to_reg(mem, offset);
1782 break;
1783 default:
1784 adsp_warn(dsp,
1785 "%s.%d: Unknown region type %x at %d(%x)\n",
1786 file, regions, type, pos, pos);
1787 break;
1788 }
1789
1790 adsp_dbg(dsp, "%s.%d: %d bytes at %d in %s\n", file,
1791 regions, le32_to_cpu(region->len), offset,
1792 region_name);
1793
1794 if (le32_to_cpu(region->len) >
1795 firmware->size - pos - sizeof(*region)) {
1796 adsp_err(dsp,
1797 "%s.%d: %s region len %d bytes exceeds file length %zu\n",
1798 file, regions, region_name,
1799 le32_to_cpu(region->len), firmware->size);
1800 ret = -EINVAL;
1801 goto out_fw;
1802 }
1803
1804 if (text) {
1805 memcpy(text, region->data, le32_to_cpu(region->len));
1806 adsp_info(dsp, "%s: %s\n", file, text);
1807 kfree(text);
1808 text = NULL;
1809 }
1810
1811 if (reg) {
1812 buf = wm_adsp_buf_alloc(region->data,
1813 le32_to_cpu(region->len),
1814 &buf_list);
1815 if (!buf) {
1816 adsp_err(dsp, "Out of memory\n");
1817 ret = -ENOMEM;
1818 goto out_fw;
1819 }
1820
1821 ret = regmap_raw_write_async(regmap, reg, buf->buf,
1822 le32_to_cpu(region->len));
1823 if (ret != 0) {
1824 adsp_err(dsp,
1825 "%s.%d: Failed to write %d bytes at %d in %s: %d\n",
1826 file, regions,
1827 le32_to_cpu(region->len), offset,
1828 region_name, ret);
1829 goto out_fw;
1830 }
1831 }
1832
1833 pos += le32_to_cpu(region->len) + sizeof(*region);
1834 regions++;
1835 }
1836
1837 ret = regmap_async_complete(regmap);
1838 if (ret != 0) {
1839 adsp_err(dsp, "Failed to complete async write: %d\n", ret);
1840 goto out_fw;
1841 }
1842
1843 if (pos > firmware->size)
1844 adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n",
1845 file, regions, pos - firmware->size);
1846
1847 wm_adsp_debugfs_save_wmfwname(dsp, file);
1848
1849out_fw:
1850 regmap_async_complete(regmap);
1851 wm_adsp_buf_free(&buf_list);
1852 release_firmware(firmware);
1853 kfree(text);
1854out:
1855 kfree(file);
1856
1857 return ret;
1858}
1859
1860static void wm_adsp_ctl_fixup_base(struct wm_adsp *dsp,
1861 const struct wm_adsp_alg_region *alg_region)
1862{
1863 struct wm_coeff_ctl *ctl;
1864
1865 list_for_each_entry(ctl, &dsp->ctl_list, list) {
1866 if (ctl->fw_name == wm_adsp_fw_text[dsp->fw] &&
1867 alg_region->alg == ctl->alg_region.alg &&
1868 alg_region->type == ctl->alg_region.type) {
1869 ctl->alg_region.base = alg_region->base;
1870 }
1871 }
1872}
1873
1874static void *wm_adsp_read_algs(struct wm_adsp *dsp, size_t n_algs,
1875 unsigned int pos, unsigned int len)
1876{
1877 void *alg;
1878 int ret;
1879 __be32 val;
1880
1881 if (n_algs == 0) {
1882 adsp_err(dsp, "No algorithms\n");
1883 return ERR_PTR(-EINVAL);
1884 }
1885
1886 if (n_algs > 1024) {
1887 adsp_err(dsp, "Algorithm count %zx excessive\n", n_algs);
1888 return ERR_PTR(-EINVAL);
1889 }
1890
1891 /* Read the terminator first to validate the length */
1892 ret = regmap_raw_read(dsp->regmap, pos + len, &val, sizeof(val));
1893 if (ret != 0) {
1894 adsp_err(dsp, "Failed to read algorithm list end: %d\n",
1895 ret);
1896 return ERR_PTR(ret);
1897 }
1898
1899 if (be32_to_cpu(val) != 0xbedead)
1900 adsp_warn(dsp, "Algorithm list end %x 0x%x != 0xbedead\n",
1901 pos + len, be32_to_cpu(val));
1902
1903 alg = kzalloc(len * 2, GFP_KERNEL | GFP_DMA);
1904 if (!alg)
1905 return ERR_PTR(-ENOMEM);
1906
1907 ret = regmap_raw_read(dsp->regmap, pos, alg, len * 2);
1908 if (ret != 0) {
1909 adsp_err(dsp, "Failed to read algorithm list: %d\n", ret);
1910 kfree(alg);
1911 return ERR_PTR(ret);
1912 }
1913
1914 return alg;
1915}
1916
1917static struct wm_adsp_alg_region *
1918 wm_adsp_find_alg_region(struct wm_adsp *dsp, int type, unsigned int id)
1919{
1920 struct wm_adsp_alg_region *alg_region;
1921
1922 list_for_each_entry(alg_region, &dsp->alg_regions, list) {
1923 if (id == alg_region->alg && type == alg_region->type)
1924 return alg_region;
1925 }
1926
1927 return NULL;
1928}
1929
1930static struct wm_adsp_alg_region *wm_adsp_create_region(struct wm_adsp *dsp,
1931 int type, __be32 id,
1932 __be32 base)
1933{
1934 struct wm_adsp_alg_region *alg_region;
1935
1936 alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL);
1937 if (!alg_region)
1938 return ERR_PTR(-ENOMEM);
1939
1940 alg_region->type = type;
1941 alg_region->alg = be32_to_cpu(id);
1942 alg_region->base = be32_to_cpu(base);
1943
1944 list_add_tail(&alg_region->list, &dsp->alg_regions);
1945
1946 if (dsp->fw_ver > 0)
1947 wm_adsp_ctl_fixup_base(dsp, alg_region);
1948
1949 return alg_region;
1950}
1951
1952static void wm_adsp_free_alg_regions(struct wm_adsp *dsp)
1953{
1954 struct wm_adsp_alg_region *alg_region;
1955
1956 while (!list_empty(&dsp->alg_regions)) {
1957 alg_region = list_first_entry(&dsp->alg_regions,
1958 struct wm_adsp_alg_region,
1959 list);
1960 list_del(&alg_region->list);
1961 kfree(alg_region);
1962 }
1963}
1964
1965static int wm_adsp1_setup_algs(struct wm_adsp *dsp)
1966{
1967 struct wmfw_adsp1_id_hdr adsp1_id;
1968 struct wmfw_adsp1_alg_hdr *adsp1_alg;
1969 struct wm_adsp_alg_region *alg_region;
1970 const struct wm_adsp_region *mem;
1971 unsigned int pos, len;
1972 size_t n_algs;
1973 int i, ret;
1974
1975 mem = wm_adsp_find_region(dsp, WMFW_ADSP1_DM);
1976 if (WARN_ON(!mem))
1977 return -EINVAL;
1978
1979 ret = regmap_raw_read(dsp->regmap, mem->base, &adsp1_id,
1980 sizeof(adsp1_id));
1981 if (ret != 0) {
1982 adsp_err(dsp, "Failed to read algorithm info: %d\n",
1983 ret);
1984 return ret;
1985 }
1986
1987 n_algs = be32_to_cpu(adsp1_id.n_algs);
1988 dsp->fw_id = be32_to_cpu(adsp1_id.fw.id);
1989 adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n",
1990 dsp->fw_id,
1991 (be32_to_cpu(adsp1_id.fw.ver) & 0xff0000) >> 16,
1992 (be32_to_cpu(adsp1_id.fw.ver) & 0xff00) >> 8,
1993 be32_to_cpu(adsp1_id.fw.ver) & 0xff,
1994 n_algs);
1995
1996 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_ZM,
1997 adsp1_id.fw.id, adsp1_id.zm);
1998 if (IS_ERR(alg_region))
1999 return PTR_ERR(alg_region);
2000
2001 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_DM,
2002 adsp1_id.fw.id, adsp1_id.dm);
2003 if (IS_ERR(alg_region))
2004 return PTR_ERR(alg_region);
2005
2006 pos = sizeof(adsp1_id) / 2;
2007 len = (sizeof(*adsp1_alg) * n_algs) / 2;
2008
2009 adsp1_alg = wm_adsp_read_algs(dsp, n_algs, mem->base + pos, len);
2010 if (IS_ERR(adsp1_alg))
2011 return PTR_ERR(adsp1_alg);
2012
2013 for (i = 0; i < n_algs; i++) {
2014 adsp_info(dsp, "%d: ID %x v%d.%d.%d DM@%x ZM@%x\n",
2015 i, be32_to_cpu(adsp1_alg[i].alg.id),
2016 (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff0000) >> 16,
2017 (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff00) >> 8,
2018 be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff,
2019 be32_to_cpu(adsp1_alg[i].dm),
2020 be32_to_cpu(adsp1_alg[i].zm));
2021
2022 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_DM,
2023 adsp1_alg[i].alg.id,
2024 adsp1_alg[i].dm);
2025 if (IS_ERR(alg_region)) {
2026 ret = PTR_ERR(alg_region);
2027 goto out;
2028 }
2029 if (dsp->fw_ver == 0) {
2030 if (i + 1 < n_algs) {
2031 len = be32_to_cpu(adsp1_alg[i + 1].dm);
2032 len -= be32_to_cpu(adsp1_alg[i].dm);
2033 len *= 4;
2034 wm_adsp_create_control(dsp, alg_region, 0,
2035 len, NULL, 0, 0,
2036 SNDRV_CTL_ELEM_TYPE_BYTES);
2037 } else {
2038 adsp_warn(dsp, "Missing length info for region DM with ID %x\n",
2039 be32_to_cpu(adsp1_alg[i].alg.id));
2040 }
2041 }
2042
2043 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_ZM,
2044 adsp1_alg[i].alg.id,
2045 adsp1_alg[i].zm);
2046 if (IS_ERR(alg_region)) {
2047 ret = PTR_ERR(alg_region);
2048 goto out;
2049 }
2050 if (dsp->fw_ver == 0) {
2051 if (i + 1 < n_algs) {
2052 len = be32_to_cpu(adsp1_alg[i + 1].zm);
2053 len -= be32_to_cpu(adsp1_alg[i].zm);
2054 len *= 4;
2055 wm_adsp_create_control(dsp, alg_region, 0,
2056 len, NULL, 0, 0,
2057 SNDRV_CTL_ELEM_TYPE_BYTES);
2058 } else {
2059 adsp_warn(dsp, "Missing length info for region ZM with ID %x\n",
2060 be32_to_cpu(adsp1_alg[i].alg.id));
2061 }
2062 }
2063 }
2064
2065out:
2066 kfree(adsp1_alg);
2067 return ret;
2068}
2069
2070static int wm_adsp2_setup_algs(struct wm_adsp *dsp)
2071{
2072 struct wmfw_adsp2_id_hdr adsp2_id;
2073 struct wmfw_adsp2_alg_hdr *adsp2_alg;
2074 struct wm_adsp_alg_region *alg_region;
2075 const struct wm_adsp_region *mem;
2076 unsigned int pos, len;
2077 size_t n_algs;
2078 int i, ret;
2079
2080 mem = wm_adsp_find_region(dsp, WMFW_ADSP2_XM);
2081 if (WARN_ON(!mem))
2082 return -EINVAL;
2083
2084 ret = regmap_raw_read(dsp->regmap, mem->base, &adsp2_id,
2085 sizeof(adsp2_id));
2086 if (ret != 0) {
2087 adsp_err(dsp, "Failed to read algorithm info: %d\n",
2088 ret);
2089 return ret;
2090 }
2091
2092 n_algs = be32_to_cpu(adsp2_id.n_algs);
2093 dsp->fw_id = be32_to_cpu(adsp2_id.fw.id);
2094 dsp->fw_id_version = be32_to_cpu(adsp2_id.fw.ver);
2095 adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n",
2096 dsp->fw_id,
2097 (dsp->fw_id_version & 0xff0000) >> 16,
2098 (dsp->fw_id_version & 0xff00) >> 8,
2099 dsp->fw_id_version & 0xff,
2100 n_algs);
2101
2102 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_XM,
2103 adsp2_id.fw.id, adsp2_id.xm);
2104 if (IS_ERR(alg_region))
2105 return PTR_ERR(alg_region);
2106
2107 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_YM,
2108 adsp2_id.fw.id, adsp2_id.ym);
2109 if (IS_ERR(alg_region))
2110 return PTR_ERR(alg_region);
2111
2112 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_ZM,
2113 adsp2_id.fw.id, adsp2_id.zm);
2114 if (IS_ERR(alg_region))
2115 return PTR_ERR(alg_region);
2116
2117 pos = sizeof(adsp2_id) / 2;
2118 len = (sizeof(*adsp2_alg) * n_algs) / 2;
2119
2120 adsp2_alg = wm_adsp_read_algs(dsp, n_algs, mem->base + pos, len);
2121 if (IS_ERR(adsp2_alg))
2122 return PTR_ERR(adsp2_alg);
2123
2124 for (i = 0; i < n_algs; i++) {
2125 adsp_info(dsp,
2126 "%d: ID %x v%d.%d.%d XM@%x YM@%x ZM@%x\n",
2127 i, be32_to_cpu(adsp2_alg[i].alg.id),
2128 (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff0000) >> 16,
2129 (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff00) >> 8,
2130 be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff,
2131 be32_to_cpu(adsp2_alg[i].xm),
2132 be32_to_cpu(adsp2_alg[i].ym),
2133 be32_to_cpu(adsp2_alg[i].zm));
2134
2135 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_XM,
2136 adsp2_alg[i].alg.id,
2137 adsp2_alg[i].xm);
2138 if (IS_ERR(alg_region)) {
2139 ret = PTR_ERR(alg_region);
2140 goto out;
2141 }
2142 if (dsp->fw_ver == 0) {
2143 if (i + 1 < n_algs) {
2144 len = be32_to_cpu(adsp2_alg[i + 1].xm);
2145 len -= be32_to_cpu(adsp2_alg[i].xm);
2146 len *= 4;
2147 wm_adsp_create_control(dsp, alg_region, 0,
2148 len, NULL, 0, 0,
2149 SNDRV_CTL_ELEM_TYPE_BYTES);
2150 } else {
2151 adsp_warn(dsp, "Missing length info for region XM with ID %x\n",
2152 be32_to_cpu(adsp2_alg[i].alg.id));
2153 }
2154 }
2155
2156 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_YM,
2157 adsp2_alg[i].alg.id,
2158 adsp2_alg[i].ym);
2159 if (IS_ERR(alg_region)) {
2160 ret = PTR_ERR(alg_region);
2161 goto out;
2162 }
2163 if (dsp->fw_ver == 0) {
2164 if (i + 1 < n_algs) {
2165 len = be32_to_cpu(adsp2_alg[i + 1].ym);
2166 len -= be32_to_cpu(adsp2_alg[i].ym);
2167 len *= 4;
2168 wm_adsp_create_control(dsp, alg_region, 0,
2169 len, NULL, 0, 0,
2170 SNDRV_CTL_ELEM_TYPE_BYTES);
2171 } else {
2172 adsp_warn(dsp, "Missing length info for region YM with ID %x\n",
2173 be32_to_cpu(adsp2_alg[i].alg.id));
2174 }
2175 }
2176
2177 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_ZM,
2178 adsp2_alg[i].alg.id,
2179 adsp2_alg[i].zm);
2180 if (IS_ERR(alg_region)) {
2181 ret = PTR_ERR(alg_region);
2182 goto out;
2183 }
2184 if (dsp->fw_ver == 0) {
2185 if (i + 1 < n_algs) {
2186 len = be32_to_cpu(adsp2_alg[i + 1].zm);
2187 len -= be32_to_cpu(adsp2_alg[i].zm);
2188 len *= 4;
2189 wm_adsp_create_control(dsp, alg_region, 0,
2190 len, NULL, 0, 0,
2191 SNDRV_CTL_ELEM_TYPE_BYTES);
2192 } else {
2193 adsp_warn(dsp, "Missing length info for region ZM with ID %x\n",
2194 be32_to_cpu(adsp2_alg[i].alg.id));
2195 }
2196 }
2197 }
2198
2199out:
2200 kfree(adsp2_alg);
2201 return ret;
2202}
2203
2204static int wm_adsp_load_coeff(struct wm_adsp *dsp)
2205{
2206 LIST_HEAD(buf_list);
2207 struct regmap *regmap = dsp->regmap;
2208 struct wmfw_coeff_hdr *hdr;
2209 struct wmfw_coeff_item *blk;
2210 const struct firmware *firmware;
2211 const struct wm_adsp_region *mem;
2212 struct wm_adsp_alg_region *alg_region;
2213 const char *region_name;
2214 int ret, pos, blocks, type, offset, reg;
2215 char *file;
2216 struct wm_adsp_buf *buf;
2217
2218 file = kzalloc(PAGE_SIZE, GFP_KERNEL);
2219 if (file == NULL)
2220 return -ENOMEM;
2221
2222 snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.bin", dsp->part, dsp->num,
2223 wm_adsp_fw[dsp->fw].file);
2224 file[PAGE_SIZE - 1] = '\0';
2225
2226 ret = request_firmware(&firmware, file, dsp->dev);
2227 if (ret != 0) {
2228 adsp_warn(dsp, "Failed to request '%s'\n", file);
2229 ret = 0;
2230 goto out;
2231 }
2232 ret = -EINVAL;
2233
2234 if (sizeof(*hdr) >= firmware->size) {
2235 adsp_err(dsp, "%s: file too short, %zu bytes\n",
2236 file, firmware->size);
2237 goto out_fw;
2238 }
2239
2240 hdr = (void *)&firmware->data[0];
2241 if (memcmp(hdr->magic, "WMDR", 4) != 0) {
2242 adsp_err(dsp, "%s: invalid magic\n", file);
2243 goto out_fw;
2244 }
2245
2246 switch (be32_to_cpu(hdr->rev) & 0xff) {
2247 case 1:
2248 break;
2249 default:
2250 adsp_err(dsp, "%s: Unsupported coefficient file format %d\n",
2251 file, be32_to_cpu(hdr->rev) & 0xff);
2252 ret = -EINVAL;
2253 goto out_fw;
2254 }
2255
2256 adsp_dbg(dsp, "%s: v%d.%d.%d\n", file,
2257 (le32_to_cpu(hdr->ver) >> 16) & 0xff,
2258 (le32_to_cpu(hdr->ver) >> 8) & 0xff,
2259 le32_to_cpu(hdr->ver) & 0xff);
2260
2261 pos = le32_to_cpu(hdr->len);
2262
2263 blocks = 0;
2264 while (pos < firmware->size &&
2265 sizeof(*blk) < firmware->size - pos) {
2266 blk = (void *)(&firmware->data[pos]);
2267
2268 type = le16_to_cpu(blk->type);
2269 offset = le16_to_cpu(blk->offset);
2270
2271 adsp_dbg(dsp, "%s.%d: %x v%d.%d.%d\n",
2272 file, blocks, le32_to_cpu(blk->id),
2273 (le32_to_cpu(blk->ver) >> 16) & 0xff,
2274 (le32_to_cpu(blk->ver) >> 8) & 0xff,
2275 le32_to_cpu(blk->ver) & 0xff);
2276 adsp_dbg(dsp, "%s.%d: %d bytes at 0x%x in %x\n",
2277 file, blocks, le32_to_cpu(blk->len), offset, type);
2278
2279 reg = 0;
2280 region_name = "Unknown";
2281 switch (type) {
2282 case (WMFW_NAME_TEXT << 8):
2283 case (WMFW_INFO_TEXT << 8):
2284 break;
2285 case (WMFW_ABSOLUTE << 8):
2286 /*
2287 * Old files may use this for global
2288 * coefficients.
2289 */
2290 if (le32_to_cpu(blk->id) == dsp->fw_id &&
2291 offset == 0) {
2292 region_name = "global coefficients";
2293 mem = wm_adsp_find_region(dsp, type);
2294 if (!mem) {
2295 adsp_err(dsp, "No ZM\n");
2296 break;
2297 }
2298 reg = wm_adsp_region_to_reg(mem, 0);
2299
2300 } else {
2301 region_name = "register";
2302 reg = offset;
2303 }
2304 break;
2305
2306 case WMFW_ADSP1_DM:
2307 case WMFW_ADSP1_ZM:
2308 case WMFW_ADSP2_XM:
2309 case WMFW_ADSP2_YM:
2310 adsp_dbg(dsp, "%s.%d: %d bytes in %x for %x\n",
2311 file, blocks, le32_to_cpu(blk->len),
2312 type, le32_to_cpu(blk->id));
2313
2314 mem = wm_adsp_find_region(dsp, type);
2315 if (!mem) {
2316 adsp_err(dsp, "No base for region %x\n", type);
2317 break;
2318 }
2319
2320 alg_region = wm_adsp_find_alg_region(dsp, type,
2321 le32_to_cpu(blk->id));
2322 if (alg_region) {
2323 reg = alg_region->base;
2324 reg = wm_adsp_region_to_reg(mem, reg);
2325 reg += offset;
2326 } else {
2327 adsp_err(dsp, "No %x for algorithm %x\n",
2328 type, le32_to_cpu(blk->id));
2329 }
2330 break;
2331
2332 default:
2333 adsp_err(dsp, "%s.%d: Unknown region type %x at %d\n",
2334 file, blocks, type, pos);
2335 break;
2336 }
2337
2338 if (reg) {
2339 if (le32_to_cpu(blk->len) >
2340 firmware->size - pos - sizeof(*blk)) {
2341 adsp_err(dsp,
2342 "%s.%d: %s region len %d bytes exceeds file length %zu\n",
2343 file, blocks, region_name,
2344 le32_to_cpu(blk->len),
2345 firmware->size);
2346 ret = -EINVAL;
2347 goto out_fw;
2348 }
2349
2350 buf = wm_adsp_buf_alloc(blk->data,
2351 le32_to_cpu(blk->len),
2352 &buf_list);
2353 if (!buf) {
2354 adsp_err(dsp, "Out of memory\n");
2355 ret = -ENOMEM;
2356 goto out_fw;
2357 }
2358
2359 adsp_dbg(dsp, "%s.%d: Writing %d bytes at %x\n",
2360 file, blocks, le32_to_cpu(blk->len),
2361 reg);
2362 ret = regmap_raw_write_async(regmap, reg, buf->buf,
2363 le32_to_cpu(blk->len));
2364 if (ret != 0) {
2365 adsp_err(dsp,
2366 "%s.%d: Failed to write to %x in %s: %d\n",
2367 file, blocks, reg, region_name, ret);
2368 }
2369 }
2370
2371 pos += (le32_to_cpu(blk->len) + sizeof(*blk) + 3) & ~0x03;
2372 blocks++;
2373 }
2374
2375 ret = regmap_async_complete(regmap);
2376 if (ret != 0)
2377 adsp_err(dsp, "Failed to complete async write: %d\n", ret);
2378
2379 if (pos > firmware->size)
2380 adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n",
2381 file, blocks, pos - firmware->size);
2382
2383 wm_adsp_debugfs_save_binname(dsp, file);
2384
2385out_fw:
2386 regmap_async_complete(regmap);
2387 release_firmware(firmware);
2388 wm_adsp_buf_free(&buf_list);
2389out:
2390 kfree(file);
2391 return ret;
2392}
2393
2394int wm_adsp1_init(struct wm_adsp *dsp)
2395{
2396 INIT_LIST_HEAD(&dsp->alg_regions);
2397
2398 mutex_init(&dsp->pwr_lock);
2399
2400 return 0;
2401}
2402EXPORT_SYMBOL_GPL(wm_adsp1_init);
2403
2404int wm_adsp1_event(struct snd_soc_dapm_widget *w,
2405 struct snd_kcontrol *kcontrol,
2406 int event)
2407{
2408 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2409 struct wm_adsp *dsps = snd_soc_component_get_drvdata(component);
2410 struct wm_adsp *dsp = &dsps[w->shift];
2411 struct wm_coeff_ctl *ctl;
2412 int ret;
2413 unsigned int val;
2414
2415 dsp->component = component;
2416
2417 mutex_lock(&dsp->pwr_lock);
2418
2419 switch (event) {
2420 case SND_SOC_DAPM_POST_PMU:
2421 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2422 ADSP1_SYS_ENA, ADSP1_SYS_ENA);
2423
2424 /*
2425 * For simplicity set the DSP clock rate to be the
2426 * SYSCLK rate rather than making it configurable.
2427 */
2428 if (dsp->sysclk_reg) {
2429 ret = regmap_read(dsp->regmap, dsp->sysclk_reg, &val);
2430 if (ret != 0) {
2431 adsp_err(dsp, "Failed to read SYSCLK state: %d\n",
2432 ret);
2433 goto err_mutex;
2434 }
2435
2436 val = (val & dsp->sysclk_mask) >> dsp->sysclk_shift;
2437
2438 ret = regmap_update_bits(dsp->regmap,
2439 dsp->base + ADSP1_CONTROL_31,
2440 ADSP1_CLK_SEL_MASK, val);
2441 if (ret != 0) {
2442 adsp_err(dsp, "Failed to set clock rate: %d\n",
2443 ret);
2444 goto err_mutex;
2445 }
2446 }
2447
2448 ret = wm_adsp_load(dsp);
2449 if (ret != 0)
2450 goto err_ena;
2451
2452 ret = wm_adsp1_setup_algs(dsp);
2453 if (ret != 0)
2454 goto err_ena;
2455
2456 ret = wm_adsp_load_coeff(dsp);
2457 if (ret != 0)
2458 goto err_ena;
2459
2460 /* Initialize caches for enabled and unset controls */
2461 ret = wm_coeff_init_control_caches(dsp);
2462 if (ret != 0)
2463 goto err_ena;
2464
2465 /* Sync set controls */
2466 ret = wm_coeff_sync_controls(dsp);
2467 if (ret != 0)
2468 goto err_ena;
2469
2470 dsp->booted = true;
2471
2472 /* Start the core running */
2473 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2474 ADSP1_CORE_ENA | ADSP1_START,
2475 ADSP1_CORE_ENA | ADSP1_START);
2476
2477 dsp->running = true;
2478 break;
2479
2480 case SND_SOC_DAPM_PRE_PMD:
2481 dsp->running = false;
2482 dsp->booted = false;
2483
2484 /* Halt the core */
2485 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2486 ADSP1_CORE_ENA | ADSP1_START, 0);
2487
2488 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_19,
2489 ADSP1_WDMA_BUFFER_LENGTH_MASK, 0);
2490
2491 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2492 ADSP1_SYS_ENA, 0);
2493
2494 list_for_each_entry(ctl, &dsp->ctl_list, list)
2495 ctl->enabled = 0;
2496
2497
2498 wm_adsp_free_alg_regions(dsp);
2499 break;
2500
2501 default:
2502 break;
2503 }
2504
2505 mutex_unlock(&dsp->pwr_lock);
2506
2507 return 0;
2508
2509err_ena:
2510 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2511 ADSP1_SYS_ENA, 0);
2512err_mutex:
2513 mutex_unlock(&dsp->pwr_lock);
2514
2515 return ret;
2516}
2517EXPORT_SYMBOL_GPL(wm_adsp1_event);
2518
2519static int wm_adsp2_ena(struct wm_adsp *dsp)
2520{
2521 unsigned int val;
2522 int ret, count;
2523
2524 switch (dsp->rev) {
2525 case 0:
2526 ret = regmap_update_bits_async(dsp->regmap,
2527 dsp->base + ADSP2_CONTROL,
2528 ADSP2_SYS_ENA, ADSP2_SYS_ENA);
2529 if (ret != 0)
2530 return ret;
2531 break;
2532 default:
2533 break;
2534 }
2535
2536 /* Wait for the RAM to start, should be near instantaneous */
2537 for (count = 0; count < 10; ++count) {
2538 ret = regmap_read(dsp->regmap, dsp->base + ADSP2_STATUS1, &val);
2539 if (ret != 0)
2540 return ret;
2541
2542 if (val & ADSP2_RAM_RDY)
2543 break;
2544
2545 usleep_range(250, 500);
2546 }
2547
2548 if (!(val & ADSP2_RAM_RDY)) {
2549 adsp_err(dsp, "Failed to start DSP RAM\n");
2550 return -EBUSY;
2551 }
2552
2553 adsp_dbg(dsp, "RAM ready after %d polls\n", count);
2554
2555 return 0;
2556}
2557
2558static void wm_adsp2_boot_work(struct work_struct *work)
2559{
2560 struct wm_adsp *dsp = container_of(work,
2561 struct wm_adsp,
2562 boot_work);
2563 int ret;
2564
2565 mutex_lock(&dsp->pwr_lock);
2566
2567 ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2568 ADSP2_MEM_ENA, ADSP2_MEM_ENA);
2569 if (ret != 0)
2570 goto err_mutex;
2571
2572 ret = wm_adsp2_ena(dsp);
2573 if (ret != 0)
2574 goto err_mem;
2575
2576 ret = wm_adsp_load(dsp);
2577 if (ret != 0)
2578 goto err_ena;
2579
2580 ret = wm_adsp2_setup_algs(dsp);
2581 if (ret != 0)
2582 goto err_ena;
2583
2584 ret = wm_adsp_load_coeff(dsp);
2585 if (ret != 0)
2586 goto err_ena;
2587
2588 /* Initialize caches for enabled and unset controls */
2589 ret = wm_coeff_init_control_caches(dsp);
2590 if (ret != 0)
2591 goto err_ena;
2592
2593 switch (dsp->rev) {
2594 case 0:
2595 /* Turn DSP back off until we are ready to run */
2596 ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2597 ADSP2_SYS_ENA, 0);
2598 if (ret != 0)
2599 goto err_ena;
2600 break;
2601 default:
2602 break;
2603 }
2604
2605 dsp->booted = true;
2606
2607 mutex_unlock(&dsp->pwr_lock);
2608
2609 return;
2610
2611err_ena:
2612 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2613 ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0);
2614err_mem:
2615 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2616 ADSP2_MEM_ENA, 0);
2617err_mutex:
2618 mutex_unlock(&dsp->pwr_lock);
2619}
2620
2621static void wm_adsp2_set_dspclk(struct wm_adsp *dsp, unsigned int freq)
2622{
2623 int ret;
2624
2625 switch (dsp->rev) {
2626 case 0:
2627 ret = regmap_update_bits_async(dsp->regmap,
2628 dsp->base + ADSP2_CLOCKING,
2629 ADSP2_CLK_SEL_MASK,
2630 freq << ADSP2_CLK_SEL_SHIFT);
2631 if (ret) {
2632 adsp_err(dsp, "Failed to set clock rate: %d\n", ret);
2633 return;
2634 }
2635 break;
2636 default:
2637 /* clock is handled by parent codec driver */
2638 break;
2639 }
2640}
2641
2642int wm_adsp2_preloader_get(struct snd_kcontrol *kcontrol,
2643 struct snd_ctl_elem_value *ucontrol)
2644{
2645 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
2646 struct wm_adsp *dsp = snd_soc_component_get_drvdata(component);
2647
2648 ucontrol->value.integer.value[0] = dsp->preloaded;
2649
2650 return 0;
2651}
2652EXPORT_SYMBOL_GPL(wm_adsp2_preloader_get);
2653
2654int wm_adsp2_preloader_put(struct snd_kcontrol *kcontrol,
2655 struct snd_ctl_elem_value *ucontrol)
2656{
2657 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
2658 struct wm_adsp *dsp = snd_soc_component_get_drvdata(component);
2659 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
2660 struct soc_mixer_control *mc =
2661 (struct soc_mixer_control *)kcontrol->private_value;
2662 char preload[32];
2663
2664 snprintf(preload, ARRAY_SIZE(preload), "DSP%u Preload", mc->shift);
2665
2666 dsp->preloaded = ucontrol->value.integer.value[0];
2667
2668 if (ucontrol->value.integer.value[0])
2669 snd_soc_dapm_force_enable_pin(dapm, preload);
2670 else
2671 snd_soc_dapm_disable_pin(dapm, preload);
2672
2673 snd_soc_dapm_sync(dapm);
2674
2675 return 0;
2676}
2677EXPORT_SYMBOL_GPL(wm_adsp2_preloader_put);
2678
2679static void wm_adsp_stop_watchdog(struct wm_adsp *dsp)
2680{
2681 switch (dsp->rev) {
2682 case 0:
2683 case 1:
2684 return;
2685 default:
2686 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_WATCHDOG,
2687 ADSP2_WDT_ENA_MASK, 0);
2688 }
2689}
2690
2691int wm_adsp2_early_event(struct snd_soc_dapm_widget *w,
2692 struct snd_kcontrol *kcontrol, int event,
2693 unsigned int freq)
2694{
2695 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2696 struct wm_adsp *dsps = snd_soc_component_get_drvdata(component);
2697 struct wm_adsp *dsp = &dsps[w->shift];
2698 struct wm_coeff_ctl *ctl;
2699
2700 switch (event) {
2701 case SND_SOC_DAPM_PRE_PMU:
2702 wm_adsp2_set_dspclk(dsp, freq);
2703 queue_work(system_unbound_wq, &dsp->boot_work);
2704 break;
2705 case SND_SOC_DAPM_PRE_PMD:
2706 mutex_lock(&dsp->pwr_lock);
2707
2708 wm_adsp_debugfs_clear(dsp);
2709
2710 dsp->fw_id = 0;
2711 dsp->fw_id_version = 0;
2712
2713 dsp->booted = false;
2714
2715 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2716 ADSP2_MEM_ENA, 0);
2717
2718 list_for_each_entry(ctl, &dsp->ctl_list, list)
2719 ctl->enabled = 0;
2720
2721 wm_adsp_free_alg_regions(dsp);
2722
2723 mutex_unlock(&dsp->pwr_lock);
2724
2725 adsp_dbg(dsp, "Shutdown complete\n");
2726 break;
2727 default:
2728 break;
2729 }
2730
2731 return 0;
2732}
2733EXPORT_SYMBOL_GPL(wm_adsp2_early_event);
2734
2735int wm_adsp2_event(struct snd_soc_dapm_widget *w,
2736 struct snd_kcontrol *kcontrol, int event)
2737{
2738 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2739 struct wm_adsp *dsps = snd_soc_component_get_drvdata(component);
2740 struct wm_adsp *dsp = &dsps[w->shift];
2741 int ret;
2742
2743 switch (event) {
2744 case SND_SOC_DAPM_POST_PMU:
2745 flush_work(&dsp->boot_work);
2746
2747 mutex_lock(&dsp->pwr_lock);
2748
2749 if (!dsp->booted) {
2750 ret = -EIO;
2751 goto err;
2752 }
2753
2754 ret = wm_adsp2_ena(dsp);
2755 if (ret != 0)
2756 goto err;
2757
2758 /* Sync set controls */
2759 ret = wm_coeff_sync_controls(dsp);
2760 if (ret != 0)
2761 goto err;
2762
2763 wm_adsp2_lock(dsp, dsp->lock_regions);
2764
2765 ret = regmap_update_bits(dsp->regmap,
2766 dsp->base + ADSP2_CONTROL,
2767 ADSP2_CORE_ENA | ADSP2_START,
2768 ADSP2_CORE_ENA | ADSP2_START);
2769 if (ret != 0)
2770 goto err;
2771
2772 if (wm_adsp_fw[dsp->fw].num_caps != 0) {
2773 ret = wm_adsp_buffer_init(dsp);
2774 if (ret < 0)
2775 goto err;
2776 }
2777
2778 dsp->running = true;
2779
2780 mutex_unlock(&dsp->pwr_lock);
2781
2782 break;
2783
2784 case SND_SOC_DAPM_PRE_PMD:
2785 /* Tell the firmware to cleanup */
2786 wm_adsp_signal_event_controls(dsp, WM_ADSP_FW_EVENT_SHUTDOWN);
2787
2788 wm_adsp_stop_watchdog(dsp);
2789
2790 /* Log firmware state, it can be useful for analysis */
2791 switch (dsp->rev) {
2792 case 0:
2793 wm_adsp2_show_fw_status(dsp);
2794 break;
2795 default:
2796 wm_adsp2v2_show_fw_status(dsp);
2797 break;
2798 }
2799
2800 mutex_lock(&dsp->pwr_lock);
2801
2802 dsp->running = false;
2803
2804 regmap_update_bits(dsp->regmap,
2805 dsp->base + ADSP2_CONTROL,
2806 ADSP2_CORE_ENA | ADSP2_START, 0);
2807
2808 /* Make sure DMAs are quiesced */
2809 switch (dsp->rev) {
2810 case 0:
2811 regmap_write(dsp->regmap,
2812 dsp->base + ADSP2_RDMA_CONFIG_1, 0);
2813 regmap_write(dsp->regmap,
2814 dsp->base + ADSP2_WDMA_CONFIG_1, 0);
2815 regmap_write(dsp->regmap,
2816 dsp->base + ADSP2_WDMA_CONFIG_2, 0);
2817
2818 regmap_update_bits(dsp->regmap,
2819 dsp->base + ADSP2_CONTROL,
2820 ADSP2_SYS_ENA, 0);
2821 break;
2822 default:
2823 regmap_write(dsp->regmap,
2824 dsp->base + ADSP2_RDMA_CONFIG_1, 0);
2825 regmap_write(dsp->regmap,
2826 dsp->base + ADSP2_WDMA_CONFIG_1, 0);
2827 regmap_write(dsp->regmap,
2828 dsp->base + ADSP2V2_WDMA_CONFIG_2, 0);
2829 break;
2830 }
2831
2832 if (wm_adsp_fw[dsp->fw].num_caps != 0)
2833 wm_adsp_buffer_free(dsp);
2834
2835 mutex_unlock(&dsp->pwr_lock);
2836
2837 adsp_dbg(dsp, "Execution stopped\n");
2838 break;
2839
2840 default:
2841 break;
2842 }
2843
2844 return 0;
2845err:
2846 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2847 ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0);
2848 mutex_unlock(&dsp->pwr_lock);
2849 return ret;
2850}
2851EXPORT_SYMBOL_GPL(wm_adsp2_event);
2852
2853int wm_adsp2_component_probe(struct wm_adsp *dsp, struct snd_soc_component *component)
2854{
2855 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
2856 char preload[32];
2857
2858 snprintf(preload, ARRAY_SIZE(preload), "DSP%d Preload", dsp->num);
2859 snd_soc_dapm_disable_pin(dapm, preload);
2860
2861 wm_adsp2_init_debugfs(dsp, component);
2862
2863 dsp->component = component;
2864
2865 return snd_soc_add_component_controls(component,
2866 &wm_adsp_fw_controls[dsp->num - 1],
2867 1);
2868}
2869EXPORT_SYMBOL_GPL(wm_adsp2_component_probe);
2870
2871int wm_adsp2_component_remove(struct wm_adsp *dsp, struct snd_soc_component *component)
2872{
2873 wm_adsp2_cleanup_debugfs(dsp);
2874
2875 return 0;
2876}
2877EXPORT_SYMBOL_GPL(wm_adsp2_component_remove);
2878
2879int wm_adsp2_init(struct wm_adsp *dsp)
2880{
2881 int ret;
2882
2883 switch (dsp->rev) {
2884 case 0:
2885 /*
2886 * Disable the DSP memory by default when in reset for a small
2887 * power saving.
2888 */
2889 ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2890 ADSP2_MEM_ENA, 0);
2891 if (ret) {
2892 adsp_err(dsp,
2893 "Failed to clear memory retention: %d\n", ret);
2894 return ret;
2895 }
2896 break;
2897 default:
2898 break;
2899 }
2900
2901 INIT_LIST_HEAD(&dsp->alg_regions);
2902 INIT_LIST_HEAD(&dsp->ctl_list);
2903 INIT_WORK(&dsp->boot_work, wm_adsp2_boot_work);
2904
2905 mutex_init(&dsp->pwr_lock);
2906
2907 return 0;
2908}
2909EXPORT_SYMBOL_GPL(wm_adsp2_init);
2910
2911void wm_adsp2_remove(struct wm_adsp *dsp)
2912{
2913 struct wm_coeff_ctl *ctl;
2914
2915 while (!list_empty(&dsp->ctl_list)) {
2916 ctl = list_first_entry(&dsp->ctl_list, struct wm_coeff_ctl,
2917 list);
2918 list_del(&ctl->list);
2919 wm_adsp_free_ctl_blk(ctl);
2920 }
2921}
2922EXPORT_SYMBOL_GPL(wm_adsp2_remove);
2923
2924static inline int wm_adsp_compr_attached(struct wm_adsp_compr *compr)
2925{
2926 return compr->buf != NULL;
2927}
2928
2929static int wm_adsp_compr_attach(struct wm_adsp_compr *compr)
2930{
2931 /*
2932 * Note this will be more complex once each DSP can support multiple
2933 * streams
2934 */
2935 if (!compr->dsp->buffer)
2936 return -EINVAL;
2937
2938 compr->buf = compr->dsp->buffer;
2939 compr->buf->compr = compr;
2940
2941 return 0;
2942}
2943
2944static void wm_adsp_compr_detach(struct wm_adsp_compr *compr)
2945{
2946 if (!compr)
2947 return;
2948
2949 /* Wake the poll so it can see buffer is no longer attached */
2950 if (compr->stream)
2951 snd_compr_fragment_elapsed(compr->stream);
2952
2953 if (wm_adsp_compr_attached(compr)) {
2954 compr->buf->compr = NULL;
2955 compr->buf = NULL;
2956 }
2957}
2958
2959int wm_adsp_compr_open(struct wm_adsp *dsp, struct snd_compr_stream *stream)
2960{
2961 struct wm_adsp_compr *compr;
2962 int ret = 0;
2963
2964 mutex_lock(&dsp->pwr_lock);
2965
2966 if (wm_adsp_fw[dsp->fw].num_caps == 0) {
2967 adsp_err(dsp, "Firmware does not support compressed API\n");
2968 ret = -ENXIO;
2969 goto out;
2970 }
2971
2972 if (wm_adsp_fw[dsp->fw].compr_direction != stream->direction) {
2973 adsp_err(dsp, "Firmware does not support stream direction\n");
2974 ret = -EINVAL;
2975 goto out;
2976 }
2977
2978 if (dsp->compr) {
2979 /* It is expect this limitation will be removed in future */
2980 adsp_err(dsp, "Only a single stream supported per DSP\n");
2981 ret = -EBUSY;
2982 goto out;
2983 }
2984
2985 compr = kzalloc(sizeof(*compr), GFP_KERNEL);
2986 if (!compr) {
2987 ret = -ENOMEM;
2988 goto out;
2989 }
2990
2991 compr->dsp = dsp;
2992 compr->stream = stream;
2993
2994 dsp->compr = compr;
2995
2996 stream->runtime->private_data = compr;
2997
2998out:
2999 mutex_unlock(&dsp->pwr_lock);
3000
3001 return ret;
3002}
3003EXPORT_SYMBOL_GPL(wm_adsp_compr_open);
3004
3005int wm_adsp_compr_free(struct snd_compr_stream *stream)
3006{
3007 struct wm_adsp_compr *compr = stream->runtime->private_data;
3008 struct wm_adsp *dsp = compr->dsp;
3009
3010 mutex_lock(&dsp->pwr_lock);
3011
3012 wm_adsp_compr_detach(compr);
3013 dsp->compr = NULL;
3014
3015 kfree(compr->raw_buf);
3016 kfree(compr);
3017
3018 mutex_unlock(&dsp->pwr_lock);
3019
3020 return 0;
3021}
3022EXPORT_SYMBOL_GPL(wm_adsp_compr_free);
3023
3024static int wm_adsp_compr_check_params(struct snd_compr_stream *stream,
3025 struct snd_compr_params *params)
3026{
3027 struct wm_adsp_compr *compr = stream->runtime->private_data;
3028 struct wm_adsp *dsp = compr->dsp;
3029 const struct wm_adsp_fw_caps *caps;
3030 const struct snd_codec_desc *desc;
3031 int i, j;
3032
3033 if (params->buffer.fragment_size < WM_ADSP_MIN_FRAGMENT_SIZE ||
3034 params->buffer.fragment_size > WM_ADSP_MAX_FRAGMENT_SIZE ||
3035 params->buffer.fragments < WM_ADSP_MIN_FRAGMENTS ||
3036 params->buffer.fragments > WM_ADSP_MAX_FRAGMENTS ||
3037 params->buffer.fragment_size % WM_ADSP_DATA_WORD_SIZE) {
3038 adsp_err(dsp, "Invalid buffer fragsize=%d fragments=%d\n",
3039 params->buffer.fragment_size,
3040 params->buffer.fragments);
3041
3042 return -EINVAL;
3043 }
3044
3045 for (i = 0; i < wm_adsp_fw[dsp->fw].num_caps; i++) {
3046 caps = &wm_adsp_fw[dsp->fw].caps[i];
3047 desc = &caps->desc;
3048
3049 if (caps->id != params->codec.id)
3050 continue;
3051
3052 if (stream->direction == SND_COMPRESS_PLAYBACK) {
3053 if (desc->max_ch < params->codec.ch_out)
3054 continue;
3055 } else {
3056 if (desc->max_ch < params->codec.ch_in)
3057 continue;
3058 }
3059
3060 if (!(desc->formats & (1 << params->codec.format)))
3061 continue;
3062
3063 for (j = 0; j < desc->num_sample_rates; ++j)
3064 if (desc->sample_rates[j] == params->codec.sample_rate)
3065 return 0;
3066 }
3067
3068 adsp_err(dsp, "Invalid params id=%u ch=%u,%u rate=%u fmt=%u\n",
3069 params->codec.id, params->codec.ch_in, params->codec.ch_out,
3070 params->codec.sample_rate, params->codec.format);
3071 return -EINVAL;
3072}
3073
3074static inline unsigned int wm_adsp_compr_frag_words(struct wm_adsp_compr *compr)
3075{
3076 return compr->size.fragment_size / WM_ADSP_DATA_WORD_SIZE;
3077}
3078
3079int wm_adsp_compr_set_params(struct snd_compr_stream *stream,
3080 struct snd_compr_params *params)
3081{
3082 struct wm_adsp_compr *compr = stream->runtime->private_data;
3083 unsigned int size;
3084 int ret;
3085
3086 ret = wm_adsp_compr_check_params(stream, params);
3087 if (ret)
3088 return ret;
3089
3090 compr->size = params->buffer;
3091
3092 adsp_dbg(compr->dsp, "fragment_size=%d fragments=%d\n",
3093 compr->size.fragment_size, compr->size.fragments);
3094
3095 size = wm_adsp_compr_frag_words(compr) * sizeof(*compr->raw_buf);
3096 compr->raw_buf = kmalloc(size, GFP_DMA | GFP_KERNEL);
3097 if (!compr->raw_buf)
3098 return -ENOMEM;
3099
3100 compr->sample_rate = params->codec.sample_rate;
3101
3102 return 0;
3103}
3104EXPORT_SYMBOL_GPL(wm_adsp_compr_set_params);
3105
3106int wm_adsp_compr_get_caps(struct snd_compr_stream *stream,
3107 struct snd_compr_caps *caps)
3108{
3109 struct wm_adsp_compr *compr = stream->runtime->private_data;
3110 int fw = compr->dsp->fw;
3111 int i;
3112
3113 if (wm_adsp_fw[fw].caps) {
3114 for (i = 0; i < wm_adsp_fw[fw].num_caps; i++)
3115 caps->codecs[i] = wm_adsp_fw[fw].caps[i].id;
3116
3117 caps->num_codecs = i;
3118 caps->direction = wm_adsp_fw[fw].compr_direction;
3119
3120 caps->min_fragment_size = WM_ADSP_MIN_FRAGMENT_SIZE;
3121 caps->max_fragment_size = WM_ADSP_MAX_FRAGMENT_SIZE;
3122 caps->min_fragments = WM_ADSP_MIN_FRAGMENTS;
3123 caps->max_fragments = WM_ADSP_MAX_FRAGMENTS;
3124 }
3125
3126 return 0;
3127}
3128EXPORT_SYMBOL_GPL(wm_adsp_compr_get_caps);
3129
3130static int wm_adsp_read_data_block(struct wm_adsp *dsp, int mem_type,
3131 unsigned int mem_addr,
3132 unsigned int num_words, u32 *data)
3133{
3134 struct wm_adsp_region const *mem = wm_adsp_find_region(dsp, mem_type);
3135 unsigned int i, reg;
3136 int ret;
3137
3138 if (!mem)
3139 return -EINVAL;
3140
3141 reg = wm_adsp_region_to_reg(mem, mem_addr);
3142
3143 ret = regmap_raw_read(dsp->regmap, reg, data,
3144 sizeof(*data) * num_words);
3145 if (ret < 0)
3146 return ret;
3147
3148 for (i = 0; i < num_words; ++i)
3149 data[i] = be32_to_cpu(data[i]) & 0x00ffffffu;
3150
3151 return 0;
3152}
3153
3154static inline int wm_adsp_read_data_word(struct wm_adsp *dsp, int mem_type,
3155 unsigned int mem_addr, u32 *data)
3156{
3157 return wm_adsp_read_data_block(dsp, mem_type, mem_addr, 1, data);
3158}
3159
3160static int wm_adsp_write_data_word(struct wm_adsp *dsp, int mem_type,
3161 unsigned int mem_addr, u32 data)
3162{
3163 struct wm_adsp_region const *mem = wm_adsp_find_region(dsp, mem_type);
3164 unsigned int reg;
3165
3166 if (!mem)
3167 return -EINVAL;
3168
3169 reg = wm_adsp_region_to_reg(mem, mem_addr);
3170
3171 data = cpu_to_be32(data & 0x00ffffffu);
3172
3173 return regmap_raw_write(dsp->regmap, reg, &data, sizeof(data));
3174}
3175
3176static inline int wm_adsp_buffer_read(struct wm_adsp_compr_buf *buf,
3177 unsigned int field_offset, u32 *data)
3178{
3179 return wm_adsp_read_data_word(buf->dsp, WMFW_ADSP2_XM,
3180 buf->host_buf_ptr + field_offset, data);
3181}
3182
3183static inline int wm_adsp_buffer_write(struct wm_adsp_compr_buf *buf,
3184 unsigned int field_offset, u32 data)
3185{
3186 return wm_adsp_write_data_word(buf->dsp, WMFW_ADSP2_XM,
3187 buf->host_buf_ptr + field_offset, data);
3188}
3189
3190static int wm_adsp_buffer_locate(struct wm_adsp_compr_buf *buf)
3191{
3192 struct wm_adsp_alg_region *alg_region;
3193 struct wm_adsp *dsp = buf->dsp;
3194 u32 xmalg, addr, magic;
3195 int i, ret;
3196
3197 alg_region = wm_adsp_find_alg_region(dsp, WMFW_ADSP2_XM, dsp->fw_id);
3198 xmalg = sizeof(struct wm_adsp_system_config_xm_hdr) / sizeof(__be32);
3199
3200 addr = alg_region->base + xmalg + ALG_XM_FIELD(magic);
3201 ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, addr, &magic);
3202 if (ret < 0)
3203 return ret;
3204
3205 if (magic != WM_ADSP_ALG_XM_STRUCT_MAGIC)
3206 return -EINVAL;
3207
3208 addr = alg_region->base + xmalg + ALG_XM_FIELD(host_buf_ptr);
3209 for (i = 0; i < 5; ++i) {
3210 ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, addr,
3211 &buf->host_buf_ptr);
3212 if (ret < 0)
3213 return ret;
3214
3215 if (buf->host_buf_ptr)
3216 break;
3217
3218 usleep_range(1000, 2000);
3219 }
3220
3221 if (!buf->host_buf_ptr)
3222 return -EIO;
3223
3224 adsp_dbg(dsp, "host_buf_ptr=%x\n", buf->host_buf_ptr);
3225
3226 return 0;
3227}
3228
3229static int wm_adsp_buffer_populate(struct wm_adsp_compr_buf *buf)
3230{
3231 const struct wm_adsp_fw_caps *caps = wm_adsp_fw[buf->dsp->fw].caps;
3232 struct wm_adsp_buffer_region *region;
3233 u32 offset = 0;
3234 int i, ret;
3235
3236 for (i = 0; i < caps->num_regions; ++i) {
3237 region = &buf->regions[i];
3238
3239 region->offset = offset;
3240 region->mem_type = caps->region_defs[i].mem_type;
3241
3242 ret = wm_adsp_buffer_read(buf, caps->region_defs[i].base_offset,
3243 ®ion->base_addr);
3244 if (ret < 0)
3245 return ret;
3246
3247 ret = wm_adsp_buffer_read(buf, caps->region_defs[i].size_offset,
3248 &offset);
3249 if (ret < 0)
3250 return ret;
3251
3252 region->cumulative_size = offset;
3253
3254 adsp_dbg(buf->dsp,
3255 "region=%d type=%d base=%04x off=%04x size=%04x\n",
3256 i, region->mem_type, region->base_addr,
3257 region->offset, region->cumulative_size);
3258 }
3259
3260 return 0;
3261}
3262
3263static void wm_adsp_buffer_clear(struct wm_adsp_compr_buf *buf)
3264{
3265 buf->irq_count = 0xFFFFFFFF;
3266 buf->read_index = -1;
3267 buf->avail = 0;
3268}
3269
3270static int wm_adsp_buffer_init(struct wm_adsp *dsp)
3271{
3272 struct wm_adsp_compr_buf *buf;
3273 int ret;
3274
3275 buf = kzalloc(sizeof(*buf), GFP_KERNEL);
3276 if (!buf)
3277 return -ENOMEM;
3278
3279 buf->dsp = dsp;
3280
3281 wm_adsp_buffer_clear(buf);
3282
3283 ret = wm_adsp_buffer_locate(buf);
3284 if (ret < 0) {
3285 adsp_err(dsp, "Failed to acquire host buffer: %d\n", ret);
3286 goto err_buffer;
3287 }
3288
3289 buf->regions = kcalloc(wm_adsp_fw[dsp->fw].caps->num_regions,
3290 sizeof(*buf->regions), GFP_KERNEL);
3291 if (!buf->regions) {
3292 ret = -ENOMEM;
3293 goto err_buffer;
3294 }
3295
3296 ret = wm_adsp_buffer_populate(buf);
3297 if (ret < 0) {
3298 adsp_err(dsp, "Failed to populate host buffer: %d\n", ret);
3299 goto err_regions;
3300 }
3301
3302 dsp->buffer = buf;
3303
3304 return 0;
3305
3306err_regions:
3307 kfree(buf->regions);
3308err_buffer:
3309 kfree(buf);
3310 return ret;
3311}
3312
3313static int wm_adsp_buffer_free(struct wm_adsp *dsp)
3314{
3315 if (dsp->buffer) {
3316 wm_adsp_compr_detach(dsp->buffer->compr);
3317
3318 kfree(dsp->buffer->regions);
3319 kfree(dsp->buffer);
3320
3321 dsp->buffer = NULL;
3322 }
3323
3324 return 0;
3325}
3326
3327int wm_adsp_compr_trigger(struct snd_compr_stream *stream, int cmd)
3328{
3329 struct wm_adsp_compr *compr = stream->runtime->private_data;
3330 struct wm_adsp *dsp = compr->dsp;
3331 int ret = 0;
3332
3333 adsp_dbg(dsp, "Trigger: %d\n", cmd);
3334
3335 mutex_lock(&dsp->pwr_lock);
3336
3337 switch (cmd) {
3338 case SNDRV_PCM_TRIGGER_START:
3339 if (!wm_adsp_compr_attached(compr)) {
3340 ret = wm_adsp_compr_attach(compr);
3341 if (ret < 0) {
3342 adsp_err(dsp, "Failed to link buffer and stream: %d\n",
3343 ret);
3344 break;
3345 }
3346 }
3347
3348 wm_adsp_buffer_clear(compr->buf);
3349
3350 /* Trigger the IRQ at one fragment of data */
3351 ret = wm_adsp_buffer_write(compr->buf,
3352 HOST_BUFFER_FIELD(high_water_mark),
3353 wm_adsp_compr_frag_words(compr));
3354 if (ret < 0) {
3355 adsp_err(dsp, "Failed to set high water mark: %d\n",
3356 ret);
3357 break;
3358 }
3359 break;
3360 case SNDRV_PCM_TRIGGER_STOP:
3361 break;
3362 default:
3363 ret = -EINVAL;
3364 break;
3365 }
3366
3367 mutex_unlock(&dsp->pwr_lock);
3368
3369 return ret;
3370}
3371EXPORT_SYMBOL_GPL(wm_adsp_compr_trigger);
3372
3373static inline int wm_adsp_buffer_size(struct wm_adsp_compr_buf *buf)
3374{
3375 int last_region = wm_adsp_fw[buf->dsp->fw].caps->num_regions - 1;
3376
3377 return buf->regions[last_region].cumulative_size;
3378}
3379
3380static int wm_adsp_buffer_update_avail(struct wm_adsp_compr_buf *buf)
3381{
3382 u32 next_read_index, next_write_index;
3383 int write_index, read_index, avail;
3384 int ret;
3385
3386 /* Only sync read index if we haven't already read a valid index */
3387 if (buf->read_index < 0) {
3388 ret = wm_adsp_buffer_read(buf,
3389 HOST_BUFFER_FIELD(next_read_index),
3390 &next_read_index);
3391 if (ret < 0)
3392 return ret;
3393
3394 read_index = sign_extend32(next_read_index, 23);
3395
3396 if (read_index < 0) {
3397 adsp_dbg(buf->dsp, "Avail check on unstarted stream\n");
3398 return 0;
3399 }
3400
3401 buf->read_index = read_index;
3402 }
3403
3404 ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(next_write_index),
3405 &next_write_index);
3406 if (ret < 0)
3407 return ret;
3408
3409 write_index = sign_extend32(next_write_index, 23);
3410
3411 avail = write_index - buf->read_index;
3412 if (avail < 0)
3413 avail += wm_adsp_buffer_size(buf);
3414
3415 adsp_dbg(buf->dsp, "readindex=0x%x, writeindex=0x%x, avail=%d\n",
3416 buf->read_index, write_index, avail * WM_ADSP_DATA_WORD_SIZE);
3417
3418 buf->avail = avail;
3419
3420 return 0;
3421}
3422
3423static int wm_adsp_buffer_get_error(struct wm_adsp_compr_buf *buf)
3424{
3425 int ret;
3426
3427 ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(error), &buf->error);
3428 if (ret < 0) {
3429 adsp_err(buf->dsp, "Failed to check buffer error: %d\n", ret);
3430 return ret;
3431 }
3432 if (buf->error != 0) {
3433 adsp_err(buf->dsp, "Buffer error occurred: %d\n", buf->error);
3434 return -EIO;
3435 }
3436
3437 return 0;
3438}
3439
3440int wm_adsp_compr_handle_irq(struct wm_adsp *dsp)
3441{
3442 struct wm_adsp_compr_buf *buf;
3443 struct wm_adsp_compr *compr;
3444 int ret = 0;
3445
3446 mutex_lock(&dsp->pwr_lock);
3447
3448 buf = dsp->buffer;
3449 compr = dsp->compr;
3450
3451 if (!buf) {
3452 ret = -ENODEV;
3453 goto out;
3454 }
3455
3456 adsp_dbg(dsp, "Handling buffer IRQ\n");
3457
3458 ret = wm_adsp_buffer_get_error(buf);
3459 if (ret < 0)
3460 goto out_notify; /* Wake poll to report error */
3461
3462 ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(irq_count),
3463 &buf->irq_count);
3464 if (ret < 0) {
3465 adsp_err(dsp, "Failed to get irq_count: %d\n", ret);
3466 goto out;
3467 }
3468
3469 ret = wm_adsp_buffer_update_avail(buf);
3470 if (ret < 0) {
3471 adsp_err(dsp, "Error reading avail: %d\n", ret);
3472 goto out;
3473 }
3474
3475 if (wm_adsp_fw[dsp->fw].voice_trigger && buf->irq_count == 2)
3476 ret = WM_ADSP_COMPR_VOICE_TRIGGER;
3477
3478out_notify:
3479 if (compr && compr->stream)
3480 snd_compr_fragment_elapsed(compr->stream);
3481
3482out:
3483 mutex_unlock(&dsp->pwr_lock);
3484
3485 return ret;
3486}
3487EXPORT_SYMBOL_GPL(wm_adsp_compr_handle_irq);
3488
3489static int wm_adsp_buffer_reenable_irq(struct wm_adsp_compr_buf *buf)
3490{
3491 if (buf->irq_count & 0x01)
3492 return 0;
3493
3494 adsp_dbg(buf->dsp, "Enable IRQ(0x%x) for next fragment\n",
3495 buf->irq_count);
3496
3497 buf->irq_count |= 0x01;
3498
3499 return wm_adsp_buffer_write(buf, HOST_BUFFER_FIELD(irq_ack),
3500 buf->irq_count);
3501}
3502
3503int wm_adsp_compr_pointer(struct snd_compr_stream *stream,
3504 struct snd_compr_tstamp *tstamp)
3505{
3506 struct wm_adsp_compr *compr = stream->runtime->private_data;
3507 struct wm_adsp *dsp = compr->dsp;
3508 struct wm_adsp_compr_buf *buf;
3509 int ret = 0;
3510
3511 adsp_dbg(dsp, "Pointer request\n");
3512
3513 mutex_lock(&dsp->pwr_lock);
3514
3515 buf = compr->buf;
3516
3517 if (!compr->buf || compr->buf->error) {
3518 snd_compr_stop_error(stream, SNDRV_PCM_STATE_XRUN);
3519 ret = -EIO;
3520 goto out;
3521 }
3522
3523 if (buf->avail < wm_adsp_compr_frag_words(compr)) {
3524 ret = wm_adsp_buffer_update_avail(buf);
3525 if (ret < 0) {
3526 adsp_err(dsp, "Error reading avail: %d\n", ret);
3527 goto out;
3528 }
3529
3530 /*
3531 * If we really have less than 1 fragment available tell the
3532 * DSP to inform us once a whole fragment is available.
3533 */
3534 if (buf->avail < wm_adsp_compr_frag_words(compr)) {
3535 ret = wm_adsp_buffer_get_error(buf);
3536 if (ret < 0) {
3537 if (compr->buf->error)
3538 snd_compr_stop_error(stream,
3539 SNDRV_PCM_STATE_XRUN);
3540 goto out;
3541 }
3542
3543 ret = wm_adsp_buffer_reenable_irq(buf);
3544 if (ret < 0) {
3545 adsp_err(dsp,
3546 "Failed to re-enable buffer IRQ: %d\n",
3547 ret);
3548 goto out;
3549 }
3550 }
3551 }
3552
3553 tstamp->copied_total = compr->copied_total;
3554 tstamp->copied_total += buf->avail * WM_ADSP_DATA_WORD_SIZE;
3555 tstamp->sampling_rate = compr->sample_rate;
3556
3557out:
3558 mutex_unlock(&dsp->pwr_lock);
3559
3560 return ret;
3561}
3562EXPORT_SYMBOL_GPL(wm_adsp_compr_pointer);
3563
3564static int wm_adsp_buffer_capture_block(struct wm_adsp_compr *compr, int target)
3565{
3566 struct wm_adsp_compr_buf *buf = compr->buf;
3567 u8 *pack_in = (u8 *)compr->raw_buf;
3568 u8 *pack_out = (u8 *)compr->raw_buf;
3569 unsigned int adsp_addr;
3570 int mem_type, nwords, max_read;
3571 int i, j, ret;
3572
3573 /* Calculate read parameters */
3574 for (i = 0; i < wm_adsp_fw[buf->dsp->fw].caps->num_regions; ++i)
3575 if (buf->read_index < buf->regions[i].cumulative_size)
3576 break;
3577
3578 if (i == wm_adsp_fw[buf->dsp->fw].caps->num_regions)
3579 return -EINVAL;
3580
3581 mem_type = buf->regions[i].mem_type;
3582 adsp_addr = buf->regions[i].base_addr +
3583 (buf->read_index - buf->regions[i].offset);
3584
3585 max_read = wm_adsp_compr_frag_words(compr);
3586 nwords = buf->regions[i].cumulative_size - buf->read_index;
3587
3588 if (nwords > target)
3589 nwords = target;
3590 if (nwords > buf->avail)
3591 nwords = buf->avail;
3592 if (nwords > max_read)
3593 nwords = max_read;
3594 if (!nwords)
3595 return 0;
3596
3597 /* Read data from DSP */
3598 ret = wm_adsp_read_data_block(buf->dsp, mem_type, adsp_addr,
3599 nwords, compr->raw_buf);
3600 if (ret < 0)
3601 return ret;
3602
3603 /* Remove the padding bytes from the data read from the DSP */
3604 for (i = 0; i < nwords; i++) {
3605 for (j = 0; j < WM_ADSP_DATA_WORD_SIZE; j++)
3606 *pack_out++ = *pack_in++;
3607
3608 pack_in += sizeof(*(compr->raw_buf)) - WM_ADSP_DATA_WORD_SIZE;
3609 }
3610
3611 /* update read index to account for words read */
3612 buf->read_index += nwords;
3613 if (buf->read_index == wm_adsp_buffer_size(buf))
3614 buf->read_index = 0;
3615
3616 ret = wm_adsp_buffer_write(buf, HOST_BUFFER_FIELD(next_read_index),
3617 buf->read_index);
3618 if (ret < 0)
3619 return ret;
3620
3621 /* update avail to account for words read */
3622 buf->avail -= nwords;
3623
3624 return nwords;
3625}
3626
3627static int wm_adsp_compr_read(struct wm_adsp_compr *compr,
3628 char __user *buf, size_t count)
3629{
3630 struct wm_adsp *dsp = compr->dsp;
3631 int ntotal = 0;
3632 int nwords, nbytes;
3633
3634 adsp_dbg(dsp, "Requested read of %zu bytes\n", count);
3635
3636 if (!compr->buf || compr->buf->error) {
3637 snd_compr_stop_error(compr->stream, SNDRV_PCM_STATE_XRUN);
3638 return -EIO;
3639 }
3640
3641 count /= WM_ADSP_DATA_WORD_SIZE;
3642
3643 do {
3644 nwords = wm_adsp_buffer_capture_block(compr, count);
3645 if (nwords < 0) {
3646 adsp_err(dsp, "Failed to capture block: %d\n", nwords);
3647 return nwords;
3648 }
3649
3650 nbytes = nwords * WM_ADSP_DATA_WORD_SIZE;
3651
3652 adsp_dbg(dsp, "Read %d bytes\n", nbytes);
3653
3654 if (copy_to_user(buf + ntotal, compr->raw_buf, nbytes)) {
3655 adsp_err(dsp, "Failed to copy data to user: %d, %d\n",
3656 ntotal, nbytes);
3657 return -EFAULT;
3658 }
3659
3660 count -= nwords;
3661 ntotal += nbytes;
3662 } while (nwords > 0 && count > 0);
3663
3664 compr->copied_total += ntotal;
3665
3666 return ntotal;
3667}
3668
3669int wm_adsp_compr_copy(struct snd_compr_stream *stream, char __user *buf,
3670 size_t count)
3671{
3672 struct wm_adsp_compr *compr = stream->runtime->private_data;
3673 struct wm_adsp *dsp = compr->dsp;
3674 int ret;
3675
3676 mutex_lock(&dsp->pwr_lock);
3677
3678 if (stream->direction == SND_COMPRESS_CAPTURE)
3679 ret = wm_adsp_compr_read(compr, buf, count);
3680 else
3681 ret = -ENOTSUPP;
3682
3683 mutex_unlock(&dsp->pwr_lock);
3684
3685 return ret;
3686}
3687EXPORT_SYMBOL_GPL(wm_adsp_compr_copy);
3688
3689int wm_adsp2_lock(struct wm_adsp *dsp, unsigned int lock_regions)
3690{
3691 struct regmap *regmap = dsp->regmap;
3692 unsigned int code0, code1, lock_reg;
3693
3694 if (!(lock_regions & WM_ADSP2_REGION_ALL))
3695 return 0;
3696
3697 lock_regions &= WM_ADSP2_REGION_ALL;
3698 lock_reg = dsp->base + ADSP2_LOCK_REGION_1_LOCK_REGION_0;
3699
3700 while (lock_regions) {
3701 code0 = code1 = 0;
3702 if (lock_regions & BIT(0)) {
3703 code0 = ADSP2_LOCK_CODE_0;
3704 code1 = ADSP2_LOCK_CODE_1;
3705 }
3706 if (lock_regions & BIT(1)) {
3707 code0 |= ADSP2_LOCK_CODE_0 << ADSP2_LOCK_REGION_SHIFT;
3708 code1 |= ADSP2_LOCK_CODE_1 << ADSP2_LOCK_REGION_SHIFT;
3709 }
3710 regmap_write(regmap, lock_reg, code0);
3711 regmap_write(regmap, lock_reg, code1);
3712 lock_regions >>= 2;
3713 lock_reg += 2;
3714 }
3715
3716 return 0;
3717}
3718EXPORT_SYMBOL_GPL(wm_adsp2_lock);
3719
3720irqreturn_t wm_adsp2_bus_error(struct wm_adsp *dsp)
3721{
3722 unsigned int val;
3723 struct regmap *regmap = dsp->regmap;
3724 int ret = 0;
3725
3726 ret = regmap_read(regmap, dsp->base + ADSP2_LOCK_REGION_CTRL, &val);
3727 if (ret) {
3728 adsp_err(dsp,
3729 "Failed to read Region Lock Ctrl register: %d\n", ret);
3730 return IRQ_HANDLED;
3731 }
3732
3733 if (val & ADSP2_WDT_TIMEOUT_STS_MASK) {
3734 adsp_err(dsp, "watchdog timeout error\n");
3735 wm_adsp_stop_watchdog(dsp);
3736 }
3737
3738 if (val & (ADSP2_SLAVE_ERR_MASK | ADSP2_REGION_LOCK_ERR_MASK)) {
3739 if (val & ADSP2_SLAVE_ERR_MASK)
3740 adsp_err(dsp, "bus error: slave error\n");
3741 else
3742 adsp_err(dsp, "bus error: region lock error\n");
3743
3744 ret = regmap_read(regmap, dsp->base + ADSP2_BUS_ERR_ADDR, &val);
3745 if (ret) {
3746 adsp_err(dsp,
3747 "Failed to read Bus Err Addr register: %d\n",
3748 ret);
3749 return IRQ_HANDLED;
3750 }
3751
3752 adsp_err(dsp, "bus error address = 0x%x\n",
3753 val & ADSP2_BUS_ERR_ADDR_MASK);
3754
3755 ret = regmap_read(regmap,
3756 dsp->base + ADSP2_PMEM_ERR_ADDR_XMEM_ERR_ADDR,
3757 &val);
3758 if (ret) {
3759 adsp_err(dsp,
3760 "Failed to read Pmem Xmem Err Addr register: %d\n",
3761 ret);
3762 return IRQ_HANDLED;
3763 }
3764
3765 adsp_err(dsp, "xmem error address = 0x%x\n",
3766 val & ADSP2_XMEM_ERR_ADDR_MASK);
3767 adsp_err(dsp, "pmem error address = 0x%x\n",
3768 (val & ADSP2_PMEM_ERR_ADDR_MASK) >>
3769 ADSP2_PMEM_ERR_ADDR_SHIFT);
3770 }
3771
3772 regmap_update_bits(regmap, dsp->base + ADSP2_LOCK_REGION_CTRL,
3773 ADSP2_CTRL_ERR_EINT, ADSP2_CTRL_ERR_EINT);
3774
3775 return IRQ_HANDLED;
3776}
3777EXPORT_SYMBOL_GPL(wm_adsp2_bus_error);
3778
3779MODULE_LICENSE("GPL v2");