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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * wm_adsp.c -- Wolfson ADSP support
4 *
5 * Copyright 2012 Wolfson Microelectronics plc
6 *
7 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 */
9
10#include <linux/array_size.h>
11#include <linux/ctype.h>
12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/init.h>
15#include <linux/delay.h>
16#include <linux/firmware.h>
17#include <linux/list.h>
18#include <linux/pm.h>
19#include <linux/regmap.h>
20#include <linux/regulator/consumer.h>
21#include <linux/slab.h>
22#include <linux/vmalloc.h>
23#include <linux/workqueue.h>
24#include <linux/debugfs.h>
25#include <sound/core.h>
26#include <sound/pcm.h>
27#include <sound/pcm_params.h>
28#include <sound/soc.h>
29#include <sound/jack.h>
30#include <sound/initval.h>
31#include <sound/tlv.h>
32
33#include "wm_adsp.h"
34
35#define adsp_crit(_dsp, fmt, ...) \
36 dev_crit(_dsp->cs_dsp.dev, "%s: " fmt, _dsp->cs_dsp.name, ##__VA_ARGS__)
37#define adsp_err(_dsp, fmt, ...) \
38 dev_err(_dsp->cs_dsp.dev, "%s: " fmt, _dsp->cs_dsp.name, ##__VA_ARGS__)
39#define adsp_warn(_dsp, fmt, ...) \
40 dev_warn(_dsp->cs_dsp.dev, "%s: " fmt, _dsp->cs_dsp.name, ##__VA_ARGS__)
41#define adsp_info(_dsp, fmt, ...) \
42 dev_info(_dsp->cs_dsp.dev, "%s: " fmt, _dsp->cs_dsp.name, ##__VA_ARGS__)
43#define adsp_dbg(_dsp, fmt, ...) \
44 dev_dbg(_dsp->cs_dsp.dev, "%s: " fmt, _dsp->cs_dsp.name, ##__VA_ARGS__)
45
46#define compr_err(_obj, fmt, ...) \
47 adsp_err(_obj->dsp, "%s: " fmt, _obj->name ? _obj->name : "legacy", \
48 ##__VA_ARGS__)
49#define compr_dbg(_obj, fmt, ...) \
50 adsp_dbg(_obj->dsp, "%s: " fmt, _obj->name ? _obj->name : "legacy", \
51 ##__VA_ARGS__)
52
53#define ADSP_MAX_STD_CTRL_SIZE 512
54
55static const struct cs_dsp_client_ops wm_adsp1_client_ops;
56static const struct cs_dsp_client_ops wm_adsp2_client_ops;
57
58#define WM_ADSP_FW_MBC_VSS 0
59#define WM_ADSP_FW_HIFI 1
60#define WM_ADSP_FW_TX 2
61#define WM_ADSP_FW_TX_SPK 3
62#define WM_ADSP_FW_RX 4
63#define WM_ADSP_FW_RX_ANC 5
64#define WM_ADSP_FW_CTRL 6
65#define WM_ADSP_FW_ASR 7
66#define WM_ADSP_FW_TRACE 8
67#define WM_ADSP_FW_SPK_PROT 9
68#define WM_ADSP_FW_SPK_CALI 10
69#define WM_ADSP_FW_SPK_DIAG 11
70#define WM_ADSP_FW_MISC 12
71
72#define WM_ADSP_NUM_FW 13
73
74static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = {
75 [WM_ADSP_FW_MBC_VSS] = "MBC/VSS",
76 [WM_ADSP_FW_HIFI] = "MasterHiFi",
77 [WM_ADSP_FW_TX] = "Tx",
78 [WM_ADSP_FW_TX_SPK] = "Tx Speaker",
79 [WM_ADSP_FW_RX] = "Rx",
80 [WM_ADSP_FW_RX_ANC] = "Rx ANC",
81 [WM_ADSP_FW_CTRL] = "Voice Ctrl",
82 [WM_ADSP_FW_ASR] = "ASR Assist",
83 [WM_ADSP_FW_TRACE] = "Dbg Trace",
84 [WM_ADSP_FW_SPK_PROT] = "Protection",
85 [WM_ADSP_FW_SPK_CALI] = "Calibration",
86 [WM_ADSP_FW_SPK_DIAG] = "Diagnostic",
87 [WM_ADSP_FW_MISC] = "Misc",
88};
89
90struct wm_adsp_system_config_xm_hdr {
91 __be32 sys_enable;
92 __be32 fw_id;
93 __be32 fw_rev;
94 __be32 boot_status;
95 __be32 watchdog;
96 __be32 dma_buffer_size;
97 __be32 rdma[6];
98 __be32 wdma[8];
99 __be32 build_job_name[3];
100 __be32 build_job_number;
101} __packed;
102
103struct wm_halo_system_config_xm_hdr {
104 __be32 halo_heartbeat;
105 __be32 build_job_name[3];
106 __be32 build_job_number;
107} __packed;
108
109struct wm_adsp_alg_xm_struct {
110 __be32 magic;
111 __be32 smoothing;
112 __be32 threshold;
113 __be32 host_buf_ptr;
114 __be32 start_seq;
115 __be32 high_water_mark;
116 __be32 low_water_mark;
117 __be64 smoothed_power;
118} __packed;
119
120struct wm_adsp_host_buf_coeff_v1 {
121 __be32 host_buf_ptr; /* Host buffer pointer */
122 __be32 versions; /* Version numbers */
123 __be32 name[4]; /* The buffer name */
124} __packed;
125
126struct wm_adsp_buffer {
127 __be32 buf1_base; /* Base addr of first buffer area */
128 __be32 buf1_size; /* Size of buf1 area in DSP words */
129 __be32 buf2_base; /* Base addr of 2nd buffer area */
130 __be32 buf1_buf2_size; /* Size of buf1+buf2 in DSP words */
131 __be32 buf3_base; /* Base addr of buf3 area */
132 __be32 buf_total_size; /* Size of buf1+buf2+buf3 in DSP words */
133 __be32 high_water_mark; /* Point at which IRQ is asserted */
134 __be32 irq_count; /* bits 1-31 count IRQ assertions */
135 __be32 irq_ack; /* acked IRQ count, bit 0 enables IRQ */
136 __be32 next_write_index; /* word index of next write */
137 __be32 next_read_index; /* word index of next read */
138 __be32 error; /* error if any */
139 __be32 oldest_block_index; /* word index of oldest surviving */
140 __be32 requested_rewind; /* how many blocks rewind was done */
141 __be32 reserved_space; /* internal */
142 __be32 min_free; /* min free space since stream start */
143 __be32 blocks_written[2]; /* total blocks written (64 bit) */
144 __be32 words_written[2]; /* total words written (64 bit) */
145} __packed;
146
147struct wm_adsp_compr;
148
149struct wm_adsp_compr_buf {
150 struct list_head list;
151 struct wm_adsp *dsp;
152 struct wm_adsp_compr *compr;
153
154 struct wm_adsp_buffer_region *regions;
155 u32 host_buf_ptr;
156
157 u32 error;
158 u32 irq_count;
159 int read_index;
160 int avail;
161 int host_buf_mem_type;
162
163 char *name;
164};
165
166struct wm_adsp_compr {
167 struct list_head list;
168 struct wm_adsp *dsp;
169 struct wm_adsp_compr_buf *buf;
170
171 struct snd_compr_stream *stream;
172 struct snd_compressed_buffer size;
173
174 u32 *raw_buf;
175 unsigned int copied_total;
176
177 unsigned int sample_rate;
178
179 const char *name;
180};
181
182#define WM_ADSP_MIN_FRAGMENTS 1
183#define WM_ADSP_MAX_FRAGMENTS 256
184#define WM_ADSP_MIN_FRAGMENT_SIZE (16 * CS_DSP_DATA_WORD_SIZE)
185#define WM_ADSP_MAX_FRAGMENT_SIZE (4096 * CS_DSP_DATA_WORD_SIZE)
186
187#define WM_ADSP_ALG_XM_STRUCT_MAGIC 0x49aec7
188
189#define HOST_BUFFER_FIELD(field) \
190 (offsetof(struct wm_adsp_buffer, field) / sizeof(__be32))
191
192#define ALG_XM_FIELD(field) \
193 (offsetof(struct wm_adsp_alg_xm_struct, field) / sizeof(__be32))
194
195#define HOST_BUF_COEFF_SUPPORTED_COMPAT_VER 1
196
197#define HOST_BUF_COEFF_COMPAT_VER_MASK 0xFF00
198#define HOST_BUF_COEFF_COMPAT_VER_SHIFT 8
199
200static int wm_adsp_buffer_init(struct wm_adsp *dsp);
201static int wm_adsp_buffer_free(struct wm_adsp *dsp);
202
203struct wm_adsp_buffer_region {
204 unsigned int offset;
205 unsigned int cumulative_size;
206 unsigned int mem_type;
207 unsigned int base_addr;
208};
209
210struct wm_adsp_buffer_region_def {
211 unsigned int mem_type;
212 unsigned int base_offset;
213 unsigned int size_offset;
214};
215
216static const struct wm_adsp_buffer_region_def default_regions[] = {
217 {
218 .mem_type = WMFW_ADSP2_XM,
219 .base_offset = HOST_BUFFER_FIELD(buf1_base),
220 .size_offset = HOST_BUFFER_FIELD(buf1_size),
221 },
222 {
223 .mem_type = WMFW_ADSP2_XM,
224 .base_offset = HOST_BUFFER_FIELD(buf2_base),
225 .size_offset = HOST_BUFFER_FIELD(buf1_buf2_size),
226 },
227 {
228 .mem_type = WMFW_ADSP2_YM,
229 .base_offset = HOST_BUFFER_FIELD(buf3_base),
230 .size_offset = HOST_BUFFER_FIELD(buf_total_size),
231 },
232};
233
234struct wm_adsp_fw_caps {
235 u32 id;
236 struct snd_codec_desc desc;
237 int num_regions;
238 const struct wm_adsp_buffer_region_def *region_defs;
239};
240
241static const struct wm_adsp_fw_caps ctrl_caps[] = {
242 {
243 .id = SND_AUDIOCODEC_BESPOKE,
244 .desc = {
245 .max_ch = 8,
246 .sample_rates = { 16000 },
247 .num_sample_rates = 1,
248 .formats = SNDRV_PCM_FMTBIT_S16_LE,
249 },
250 .num_regions = ARRAY_SIZE(default_regions),
251 .region_defs = default_regions,
252 },
253};
254
255static const struct wm_adsp_fw_caps trace_caps[] = {
256 {
257 .id = SND_AUDIOCODEC_BESPOKE,
258 .desc = {
259 .max_ch = 8,
260 .sample_rates = {
261 4000, 8000, 11025, 12000, 16000, 22050,
262 24000, 32000, 44100, 48000, 64000, 88200,
263 96000, 176400, 192000
264 },
265 .num_sample_rates = 15,
266 .formats = SNDRV_PCM_FMTBIT_S16_LE,
267 },
268 .num_regions = ARRAY_SIZE(default_regions),
269 .region_defs = default_regions,
270 },
271};
272
273static const struct {
274 const char *file;
275 int compr_direction;
276 int num_caps;
277 const struct wm_adsp_fw_caps *caps;
278 bool voice_trigger;
279} wm_adsp_fw[WM_ADSP_NUM_FW] = {
280 [WM_ADSP_FW_MBC_VSS] = { .file = "mbc-vss" },
281 [WM_ADSP_FW_HIFI] = { .file = "hifi" },
282 [WM_ADSP_FW_TX] = { .file = "tx" },
283 [WM_ADSP_FW_TX_SPK] = { .file = "tx-spk" },
284 [WM_ADSP_FW_RX] = { .file = "rx" },
285 [WM_ADSP_FW_RX_ANC] = { .file = "rx-anc" },
286 [WM_ADSP_FW_CTRL] = {
287 .file = "ctrl",
288 .compr_direction = SND_COMPRESS_CAPTURE,
289 .num_caps = ARRAY_SIZE(ctrl_caps),
290 .caps = ctrl_caps,
291 .voice_trigger = true,
292 },
293 [WM_ADSP_FW_ASR] = { .file = "asr" },
294 [WM_ADSP_FW_TRACE] = {
295 .file = "trace",
296 .compr_direction = SND_COMPRESS_CAPTURE,
297 .num_caps = ARRAY_SIZE(trace_caps),
298 .caps = trace_caps,
299 },
300 [WM_ADSP_FW_SPK_PROT] = {
301 .file = "spk-prot",
302 .compr_direction = SND_COMPRESS_CAPTURE,
303 .num_caps = ARRAY_SIZE(trace_caps),
304 .caps = trace_caps,
305 },
306 [WM_ADSP_FW_SPK_CALI] = { .file = "spk-cali" },
307 [WM_ADSP_FW_SPK_DIAG] = { .file = "spk-diag" },
308 [WM_ADSP_FW_MISC] = { .file = "misc" },
309};
310
311struct wm_coeff_ctl {
312 const char *name;
313 struct cs_dsp_coeff_ctl *cs_ctl;
314 struct soc_bytes_ext bytes_ext;
315 struct work_struct work;
316};
317
318int wm_adsp_fw_get(struct snd_kcontrol *kcontrol,
319 struct snd_ctl_elem_value *ucontrol)
320{
321 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
322 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
323 struct wm_adsp *dsp = snd_soc_component_get_drvdata(component);
324
325 ucontrol->value.enumerated.item[0] = dsp[e->shift_l].fw;
326
327 return 0;
328}
329EXPORT_SYMBOL_GPL(wm_adsp_fw_get);
330
331int wm_adsp_fw_put(struct snd_kcontrol *kcontrol,
332 struct snd_ctl_elem_value *ucontrol)
333{
334 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
335 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
336 struct wm_adsp *dsp = snd_soc_component_get_drvdata(component);
337 int ret = 1;
338
339 if (ucontrol->value.enumerated.item[0] == dsp[e->shift_l].fw)
340 return 0;
341
342 if (ucontrol->value.enumerated.item[0] >= WM_ADSP_NUM_FW)
343 return -EINVAL;
344
345 mutex_lock(&dsp[e->shift_l].cs_dsp.pwr_lock);
346
347 if (dsp[e->shift_l].cs_dsp.booted || !list_empty(&dsp[e->shift_l].compr_list))
348 ret = -EBUSY;
349 else
350 dsp[e->shift_l].fw = ucontrol->value.enumerated.item[0];
351
352 mutex_unlock(&dsp[e->shift_l].cs_dsp.pwr_lock);
353
354 return ret;
355}
356EXPORT_SYMBOL_GPL(wm_adsp_fw_put);
357
358const struct soc_enum wm_adsp_fw_enum[] = {
359 SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
360 SOC_ENUM_SINGLE(0, 1, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
361 SOC_ENUM_SINGLE(0, 2, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
362 SOC_ENUM_SINGLE(0, 3, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
363 SOC_ENUM_SINGLE(0, 4, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
364 SOC_ENUM_SINGLE(0, 5, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
365 SOC_ENUM_SINGLE(0, 6, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
366};
367EXPORT_SYMBOL_GPL(wm_adsp_fw_enum);
368
369static inline struct wm_coeff_ctl *bytes_ext_to_ctl(struct soc_bytes_ext *ext)
370{
371 return container_of(ext, struct wm_coeff_ctl, bytes_ext);
372}
373
374static int wm_coeff_info(struct snd_kcontrol *kctl,
375 struct snd_ctl_elem_info *uinfo)
376{
377 struct soc_bytes_ext *bytes_ext =
378 (struct soc_bytes_ext *)kctl->private_value;
379 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
380 struct cs_dsp_coeff_ctl *cs_ctl = ctl->cs_ctl;
381
382 switch (cs_ctl->type) {
383 case WMFW_CTL_TYPE_ACKED:
384 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
385 uinfo->value.integer.min = CS_DSP_ACKED_CTL_MIN_VALUE;
386 uinfo->value.integer.max = CS_DSP_ACKED_CTL_MAX_VALUE;
387 uinfo->value.integer.step = 1;
388 uinfo->count = 1;
389 break;
390 default:
391 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
392 uinfo->count = cs_ctl->len;
393 break;
394 }
395
396 return 0;
397}
398
399static int wm_coeff_put(struct snd_kcontrol *kctl,
400 struct snd_ctl_elem_value *ucontrol)
401{
402 struct soc_bytes_ext *bytes_ext =
403 (struct soc_bytes_ext *)kctl->private_value;
404 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
405 struct cs_dsp_coeff_ctl *cs_ctl = ctl->cs_ctl;
406 char *p = ucontrol->value.bytes.data;
407
408 return cs_dsp_coeff_lock_and_write_ctrl(cs_ctl, 0, p, cs_ctl->len);
409}
410
411static int wm_coeff_tlv_put(struct snd_kcontrol *kctl,
412 const unsigned int __user *bytes, unsigned int size)
413{
414 struct soc_bytes_ext *bytes_ext =
415 (struct soc_bytes_ext *)kctl->private_value;
416 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
417 struct cs_dsp_coeff_ctl *cs_ctl = ctl->cs_ctl;
418 void *scratch;
419 int ret = 0;
420
421 scratch = vmalloc(size);
422 if (!scratch)
423 return -ENOMEM;
424
425 if (copy_from_user(scratch, bytes, size))
426 ret = -EFAULT;
427 else
428 ret = cs_dsp_coeff_lock_and_write_ctrl(cs_ctl, 0, scratch, size);
429
430 vfree(scratch);
431
432 return ret;
433}
434
435static int wm_coeff_put_acked(struct snd_kcontrol *kctl,
436 struct snd_ctl_elem_value *ucontrol)
437{
438 struct soc_bytes_ext *bytes_ext =
439 (struct soc_bytes_ext *)kctl->private_value;
440 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
441 struct cs_dsp_coeff_ctl *cs_ctl = ctl->cs_ctl;
442 unsigned int val = ucontrol->value.integer.value[0];
443 int ret;
444
445 if (val == 0)
446 return 0; /* 0 means no event */
447
448 mutex_lock(&cs_ctl->dsp->pwr_lock);
449
450 if (cs_ctl->enabled)
451 ret = cs_dsp_coeff_write_acked_control(cs_ctl, val);
452 else
453 ret = -EPERM;
454
455 mutex_unlock(&cs_ctl->dsp->pwr_lock);
456
457 if (ret < 0)
458 return ret;
459
460 return 1;
461}
462
463static int wm_coeff_get(struct snd_kcontrol *kctl,
464 struct snd_ctl_elem_value *ucontrol)
465{
466 struct soc_bytes_ext *bytes_ext =
467 (struct soc_bytes_ext *)kctl->private_value;
468 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
469 struct cs_dsp_coeff_ctl *cs_ctl = ctl->cs_ctl;
470 char *p = ucontrol->value.bytes.data;
471
472 return cs_dsp_coeff_lock_and_read_ctrl(cs_ctl, 0, p, cs_ctl->len);
473}
474
475static int wm_coeff_tlv_get(struct snd_kcontrol *kctl,
476 unsigned int __user *bytes, unsigned int size)
477{
478 struct soc_bytes_ext *bytes_ext =
479 (struct soc_bytes_ext *)kctl->private_value;
480 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
481 struct cs_dsp_coeff_ctl *cs_ctl = ctl->cs_ctl;
482 int ret = 0;
483
484 mutex_lock(&cs_ctl->dsp->pwr_lock);
485
486 ret = cs_dsp_coeff_read_ctrl(cs_ctl, 0, cs_ctl->cache, size);
487
488 if (!ret && copy_to_user(bytes, cs_ctl->cache, size))
489 ret = -EFAULT;
490
491 mutex_unlock(&cs_ctl->dsp->pwr_lock);
492
493 return ret;
494}
495
496static int wm_coeff_get_acked(struct snd_kcontrol *kcontrol,
497 struct snd_ctl_elem_value *ucontrol)
498{
499 /*
500 * Although it's not useful to read an acked control, we must satisfy
501 * user-side assumptions that all controls are readable and that a
502 * write of the same value should be filtered out (it's valid to send
503 * the same event number again to the firmware). We therefore return 0,
504 * meaning "no event" so valid event numbers will always be a change
505 */
506 ucontrol->value.integer.value[0] = 0;
507
508 return 0;
509}
510
511static unsigned int wmfw_convert_flags(unsigned int in, unsigned int len)
512{
513 unsigned int out, rd, wr, vol;
514
515 if (len > ADSP_MAX_STD_CTRL_SIZE) {
516 rd = SNDRV_CTL_ELEM_ACCESS_TLV_READ;
517 wr = SNDRV_CTL_ELEM_ACCESS_TLV_WRITE;
518 vol = SNDRV_CTL_ELEM_ACCESS_VOLATILE;
519
520 out = SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK;
521 } else {
522 rd = SNDRV_CTL_ELEM_ACCESS_READ;
523 wr = SNDRV_CTL_ELEM_ACCESS_WRITE;
524 vol = SNDRV_CTL_ELEM_ACCESS_VOLATILE;
525
526 out = 0;
527 }
528
529 if (in) {
530 out |= rd;
531 if (in & WMFW_CTL_FLAG_WRITEABLE)
532 out |= wr;
533 if (in & WMFW_CTL_FLAG_VOLATILE)
534 out |= vol;
535 } else {
536 out |= rd | wr | vol;
537 }
538
539 return out;
540}
541
542static void wm_adsp_ctl_work(struct work_struct *work)
543{
544 struct wm_coeff_ctl *ctl = container_of(work,
545 struct wm_coeff_ctl,
546 work);
547 struct cs_dsp_coeff_ctl *cs_ctl = ctl->cs_ctl;
548 struct wm_adsp *dsp = container_of(cs_ctl->dsp,
549 struct wm_adsp,
550 cs_dsp);
551 struct snd_kcontrol_new *kcontrol;
552
553 kcontrol = kzalloc(sizeof(*kcontrol), GFP_KERNEL);
554 if (!kcontrol)
555 return;
556
557 kcontrol->name = ctl->name;
558 kcontrol->info = wm_coeff_info;
559 kcontrol->iface = SNDRV_CTL_ELEM_IFACE_MIXER;
560 kcontrol->tlv.c = snd_soc_bytes_tlv_callback;
561 kcontrol->private_value = (unsigned long)&ctl->bytes_ext;
562 kcontrol->access = wmfw_convert_flags(cs_ctl->flags, cs_ctl->len);
563
564 switch (cs_ctl->type) {
565 case WMFW_CTL_TYPE_ACKED:
566 kcontrol->get = wm_coeff_get_acked;
567 kcontrol->put = wm_coeff_put_acked;
568 break;
569 default:
570 if (kcontrol->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
571 ctl->bytes_ext.max = cs_ctl->len;
572 ctl->bytes_ext.get = wm_coeff_tlv_get;
573 ctl->bytes_ext.put = wm_coeff_tlv_put;
574 } else {
575 kcontrol->get = wm_coeff_get;
576 kcontrol->put = wm_coeff_put;
577 }
578 break;
579 }
580
581 snd_soc_add_component_controls(dsp->component, kcontrol, 1);
582
583 kfree(kcontrol);
584}
585
586int wm_adsp_control_add(struct cs_dsp_coeff_ctl *cs_ctl)
587{
588 struct wm_adsp *dsp = container_of(cs_ctl->dsp, struct wm_adsp, cs_dsp);
589 struct cs_dsp *cs_dsp = &dsp->cs_dsp;
590 struct wm_coeff_ctl *ctl;
591 char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
592 const char *region_name;
593 int ret;
594
595 if (cs_ctl->flags & WMFW_CTL_FLAG_SYS)
596 return 0;
597
598 region_name = cs_dsp_mem_region_name(cs_ctl->alg_region.type);
599 if (!region_name) {
600 adsp_err(dsp, "Unknown region type: %d\n", cs_ctl->alg_region.type);
601 return -EINVAL;
602 }
603
604 switch (cs_dsp->wmfw_ver) {
605 case 0:
606 case 1:
607 ret = scnprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN,
608 "%s %s %x", cs_dsp->name, region_name,
609 cs_ctl->alg_region.alg);
610 break;
611 case 2:
612 ret = scnprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN,
613 "%s%c %.12s %x", cs_dsp->name, *region_name,
614 wm_adsp_fw_text[dsp->fw], cs_ctl->alg_region.alg);
615 break;
616 default:
617 ret = scnprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN,
618 "%s %.12s %x", cs_dsp->name,
619 wm_adsp_fw_text[dsp->fw], cs_ctl->alg_region.alg);
620 break;
621 }
622
623 if (cs_ctl->subname) {
624 int avail = SNDRV_CTL_ELEM_ID_NAME_MAXLEN - ret - 2;
625 int skip = 0;
626
627 if (dsp->component->name_prefix)
628 avail -= strlen(dsp->component->name_prefix) + 1;
629
630 /* Truncate the subname from the start if it is too long */
631 if (cs_ctl->subname_len > avail)
632 skip = cs_ctl->subname_len - avail;
633
634 snprintf(name + ret, SNDRV_CTL_ELEM_ID_NAME_MAXLEN - ret,
635 " %.*s", cs_ctl->subname_len - skip, cs_ctl->subname + skip);
636 }
637
638 ctl = kzalloc(sizeof(*ctl), GFP_KERNEL);
639 if (!ctl)
640 return -ENOMEM;
641 ctl->cs_ctl = cs_ctl;
642
643 ctl->name = kmemdup(name, strlen(name) + 1, GFP_KERNEL);
644 if (!ctl->name) {
645 ret = -ENOMEM;
646 goto err_ctl;
647 }
648
649 cs_ctl->priv = ctl;
650
651 INIT_WORK(&ctl->work, wm_adsp_ctl_work);
652 schedule_work(&ctl->work);
653
654 return 0;
655
656err_ctl:
657 kfree(ctl);
658
659 return ret;
660}
661EXPORT_SYMBOL_GPL(wm_adsp_control_add);
662
663static int wm_adsp_control_add_cb(struct cs_dsp_coeff_ctl *cs_ctl)
664{
665 struct wm_adsp *dsp = container_of(cs_ctl->dsp, struct wm_adsp, cs_dsp);
666
667 if (dsp->control_add)
668 return (dsp->control_add)(dsp, cs_ctl);
669 else
670 return wm_adsp_control_add(cs_ctl);
671}
672
673static void wm_adsp_control_remove(struct cs_dsp_coeff_ctl *cs_ctl)
674{
675 struct wm_coeff_ctl *ctl = cs_ctl->priv;
676
677 cancel_work_sync(&ctl->work);
678
679 kfree(ctl->name);
680 kfree(ctl);
681}
682
683int wm_adsp_write_ctl(struct wm_adsp *dsp, const char *name, int type,
684 unsigned int alg, void *buf, size_t len)
685{
686 struct cs_dsp_coeff_ctl *cs_ctl;
687 int ret;
688
689 mutex_lock(&dsp->cs_dsp.pwr_lock);
690 cs_ctl = cs_dsp_get_ctl(&dsp->cs_dsp, name, type, alg);
691 ret = cs_dsp_coeff_write_ctrl(cs_ctl, 0, buf, len);
692 mutex_unlock(&dsp->cs_dsp.pwr_lock);
693
694 if (ret < 0)
695 return ret;
696
697 return 0;
698}
699EXPORT_SYMBOL_GPL(wm_adsp_write_ctl);
700
701int wm_adsp_read_ctl(struct wm_adsp *dsp, const char *name, int type,
702 unsigned int alg, void *buf, size_t len)
703{
704 int ret;
705
706 mutex_lock(&dsp->cs_dsp.pwr_lock);
707 ret = cs_dsp_coeff_read_ctrl(cs_dsp_get_ctl(&dsp->cs_dsp, name, type, alg),
708 0, buf, len);
709 mutex_unlock(&dsp->cs_dsp.pwr_lock);
710
711 return ret;
712}
713EXPORT_SYMBOL_GPL(wm_adsp_read_ctl);
714
715static void wm_adsp_release_firmware_files(struct wm_adsp *dsp,
716 const struct firmware *wmfw_firmware,
717 char *wmfw_filename,
718 const struct firmware *coeff_firmware,
719 char *coeff_filename)
720{
721 if (wmfw_firmware)
722 release_firmware(wmfw_firmware);
723 kfree(wmfw_filename);
724
725 if (coeff_firmware)
726 release_firmware(coeff_firmware);
727 kfree(coeff_filename);
728}
729
730static int wm_adsp_request_firmware_file(struct wm_adsp *dsp,
731 const struct firmware **firmware, char **filename,
732 const char *dir, const char *system_name,
733 const char *asoc_component_prefix,
734 const char *filetype)
735{
736 struct cs_dsp *cs_dsp = &dsp->cs_dsp;
737 const char *fwf;
738 char *s, c;
739 int ret = 0;
740
741 if (dsp->fwf_name)
742 fwf = dsp->fwf_name;
743 else
744 fwf = dsp->cs_dsp.name;
745
746 if (system_name && asoc_component_prefix)
747 *filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s-%s-%s.%s", dir, dsp->part,
748 fwf, wm_adsp_fw[dsp->fw].file, system_name,
749 asoc_component_prefix, filetype);
750 else if (system_name)
751 *filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s-%s.%s", dir, dsp->part,
752 fwf, wm_adsp_fw[dsp->fw].file, system_name,
753 filetype);
754 else
755 *filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s.%s", dir, dsp->part, fwf,
756 wm_adsp_fw[dsp->fw].file, filetype);
757
758 if (*filename == NULL)
759 return -ENOMEM;
760
761 /*
762 * Make sure that filename is lower-case and any non alpha-numeric
763 * characters except full stop and forward slash are replaced with
764 * hyphens.
765 */
766 s = *filename;
767 while (*s) {
768 c = *s;
769 if (isalnum(c))
770 *s = tolower(c);
771 else if ((c != '.') && (c != '/'))
772 *s = '-';
773 s++;
774 }
775
776 ret = firmware_request_nowarn(firmware, *filename, cs_dsp->dev);
777 if (ret != 0) {
778 adsp_dbg(dsp, "Failed to request '%s'\n", *filename);
779 kfree(*filename);
780 *filename = NULL;
781 } else {
782 adsp_dbg(dsp, "Found '%s'\n", *filename);
783 }
784
785 return ret;
786}
787
788static const char *cirrus_dir = "cirrus/";
789static int wm_adsp_request_firmware_files(struct wm_adsp *dsp,
790 const struct firmware **wmfw_firmware,
791 char **wmfw_filename,
792 const struct firmware **coeff_firmware,
793 char **coeff_filename)
794{
795 const char *system_name = dsp->system_name;
796 const char *asoc_component_prefix = dsp->component->name_prefix;
797 int ret = 0;
798
799 if (system_name && asoc_component_prefix) {
800 if (!wm_adsp_request_firmware_file(dsp, wmfw_firmware, wmfw_filename,
801 cirrus_dir, system_name,
802 asoc_component_prefix, "wmfw")) {
803 wm_adsp_request_firmware_file(dsp, coeff_firmware, coeff_filename,
804 cirrus_dir, system_name,
805 asoc_component_prefix, "bin");
806 return 0;
807 }
808 }
809
810 if (system_name) {
811 if (!wm_adsp_request_firmware_file(dsp, wmfw_firmware, wmfw_filename,
812 cirrus_dir, system_name,
813 NULL, "wmfw")) {
814 if (asoc_component_prefix)
815 wm_adsp_request_firmware_file(dsp, coeff_firmware, coeff_filename,
816 cirrus_dir, system_name,
817 asoc_component_prefix, "bin");
818
819 if (!*coeff_firmware)
820 wm_adsp_request_firmware_file(dsp, coeff_firmware, coeff_filename,
821 cirrus_dir, system_name,
822 NULL, "bin");
823 return 0;
824 }
825 }
826
827 /* Check system-specific bin without wmfw before falling back to generic */
828 if (dsp->wmfw_optional && system_name) {
829 if (asoc_component_prefix)
830 wm_adsp_request_firmware_file(dsp, coeff_firmware, coeff_filename,
831 cirrus_dir, system_name,
832 asoc_component_prefix, "bin");
833
834 if (!*coeff_firmware)
835 wm_adsp_request_firmware_file(dsp, coeff_firmware, coeff_filename,
836 cirrus_dir, system_name,
837 NULL, "bin");
838
839 if (*coeff_firmware)
840 return 0;
841 }
842
843 /* Check legacy location */
844 if (!wm_adsp_request_firmware_file(dsp, wmfw_firmware, wmfw_filename,
845 "", NULL, NULL, "wmfw")) {
846 wm_adsp_request_firmware_file(dsp, coeff_firmware, coeff_filename,
847 "", NULL, NULL, "bin");
848 return 0;
849 }
850
851 /* Fall back to generic wmfw and optional matching bin */
852 ret = wm_adsp_request_firmware_file(dsp, wmfw_firmware, wmfw_filename,
853 cirrus_dir, NULL, NULL, "wmfw");
854 if (!ret || dsp->wmfw_optional) {
855 wm_adsp_request_firmware_file(dsp, coeff_firmware, coeff_filename,
856 cirrus_dir, NULL, NULL, "bin");
857 return 0;
858 }
859
860 adsp_err(dsp, "Failed to request firmware <%s>%s-%s-%s<-%s<%s>>.wmfw\n",
861 cirrus_dir, dsp->part,
862 dsp->fwf_name ? dsp->fwf_name : dsp->cs_dsp.name,
863 wm_adsp_fw[dsp->fw].file, system_name, asoc_component_prefix);
864
865 return -ENOENT;
866}
867
868static int wm_adsp_common_init(struct wm_adsp *dsp)
869{
870 INIT_LIST_HEAD(&dsp->compr_list);
871 INIT_LIST_HEAD(&dsp->buffer_list);
872
873 return 0;
874}
875
876int wm_adsp1_init(struct wm_adsp *dsp)
877{
878 int ret;
879
880 dsp->cs_dsp.client_ops = &wm_adsp1_client_ops;
881
882 ret = cs_dsp_adsp1_init(&dsp->cs_dsp);
883 if (ret)
884 return ret;
885
886 return wm_adsp_common_init(dsp);
887}
888EXPORT_SYMBOL_GPL(wm_adsp1_init);
889
890int wm_adsp1_event(struct snd_soc_dapm_widget *w,
891 struct snd_kcontrol *kcontrol,
892 int event)
893{
894 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
895 struct wm_adsp *dsps = snd_soc_component_get_drvdata(component);
896 struct wm_adsp *dsp = &dsps[w->shift];
897 int ret = 0;
898 char *wmfw_filename = NULL;
899 const struct firmware *wmfw_firmware = NULL;
900 char *coeff_filename = NULL;
901 const struct firmware *coeff_firmware = NULL;
902
903 dsp->component = component;
904
905 switch (event) {
906 case SND_SOC_DAPM_POST_PMU:
907 ret = wm_adsp_request_firmware_files(dsp,
908 &wmfw_firmware, &wmfw_filename,
909 &coeff_firmware, &coeff_filename);
910 if (ret)
911 break;
912
913 ret = cs_dsp_adsp1_power_up(&dsp->cs_dsp,
914 wmfw_firmware, wmfw_filename,
915 coeff_firmware, coeff_filename,
916 wm_adsp_fw_text[dsp->fw]);
917
918 wm_adsp_release_firmware_files(dsp,
919 wmfw_firmware, wmfw_filename,
920 coeff_firmware, coeff_filename);
921 break;
922 case SND_SOC_DAPM_PRE_PMD:
923 cs_dsp_adsp1_power_down(&dsp->cs_dsp);
924 break;
925 default:
926 break;
927 }
928
929 return ret;
930}
931EXPORT_SYMBOL_GPL(wm_adsp1_event);
932
933int wm_adsp2_set_dspclk(struct snd_soc_dapm_widget *w, unsigned int freq)
934{
935 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
936 struct wm_adsp *dsps = snd_soc_component_get_drvdata(component);
937 struct wm_adsp *dsp = &dsps[w->shift];
938
939 return cs_dsp_set_dspclk(&dsp->cs_dsp, freq);
940}
941EXPORT_SYMBOL_GPL(wm_adsp2_set_dspclk);
942
943int wm_adsp2_preloader_get(struct snd_kcontrol *kcontrol,
944 struct snd_ctl_elem_value *ucontrol)
945{
946 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
947 struct wm_adsp *dsps = snd_soc_component_get_drvdata(component);
948 struct soc_mixer_control *mc =
949 (struct soc_mixer_control *)kcontrol->private_value;
950 struct wm_adsp *dsp = &dsps[mc->shift - 1];
951
952 ucontrol->value.integer.value[0] = dsp->preloaded;
953
954 return 0;
955}
956EXPORT_SYMBOL_GPL(wm_adsp2_preloader_get);
957
958int wm_adsp2_preloader_put(struct snd_kcontrol *kcontrol,
959 struct snd_ctl_elem_value *ucontrol)
960{
961 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
962 struct wm_adsp *dsps = snd_soc_component_get_drvdata(component);
963 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
964 struct soc_mixer_control *mc =
965 (struct soc_mixer_control *)kcontrol->private_value;
966 struct wm_adsp *dsp = &dsps[mc->shift - 1];
967 char preload[32];
968
969 if (dsp->preloaded == ucontrol->value.integer.value[0])
970 return 0;
971
972 snprintf(preload, ARRAY_SIZE(preload), "%s Preload", dsp->cs_dsp.name);
973
974 if (ucontrol->value.integer.value[0] || dsp->toggle_preload)
975 snd_soc_component_force_enable_pin(component, preload);
976 else
977 snd_soc_component_disable_pin(component, preload);
978
979 snd_soc_dapm_sync(dapm);
980
981 flush_work(&dsp->boot_work);
982
983 dsp->preloaded = ucontrol->value.integer.value[0];
984
985 if (dsp->toggle_preload) {
986 snd_soc_component_disable_pin(component, preload);
987 snd_soc_dapm_sync(dapm);
988 }
989
990 return 1;
991}
992EXPORT_SYMBOL_GPL(wm_adsp2_preloader_put);
993
994int wm_adsp_power_up(struct wm_adsp *dsp, bool load_firmware)
995{
996 int ret = 0;
997 char *wmfw_filename = NULL;
998 const struct firmware *wmfw_firmware = NULL;
999 char *coeff_filename = NULL;
1000 const struct firmware *coeff_firmware = NULL;
1001
1002 if (load_firmware) {
1003 ret = wm_adsp_request_firmware_files(dsp,
1004 &wmfw_firmware, &wmfw_filename,
1005 &coeff_firmware, &coeff_filename);
1006 if (ret)
1007 return ret;
1008 }
1009
1010 ret = cs_dsp_power_up(&dsp->cs_dsp,
1011 wmfw_firmware, wmfw_filename,
1012 coeff_firmware, coeff_filename,
1013 wm_adsp_fw_text[dsp->fw]);
1014
1015 wm_adsp_release_firmware_files(dsp,
1016 wmfw_firmware, wmfw_filename,
1017 coeff_firmware, coeff_filename);
1018
1019 return ret;
1020}
1021EXPORT_SYMBOL_GPL(wm_adsp_power_up);
1022
1023void wm_adsp_power_down(struct wm_adsp *dsp)
1024{
1025 cs_dsp_power_down(&dsp->cs_dsp);
1026}
1027EXPORT_SYMBOL_GPL(wm_adsp_power_down);
1028
1029static void wm_adsp_boot_work(struct work_struct *work)
1030{
1031 struct wm_adsp *dsp = container_of(work,
1032 struct wm_adsp,
1033 boot_work);
1034
1035 wm_adsp_power_up(dsp, true);
1036}
1037
1038int wm_adsp_early_event(struct snd_soc_dapm_widget *w,
1039 struct snd_kcontrol *kcontrol, int event)
1040{
1041 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1042 struct wm_adsp *dsps = snd_soc_component_get_drvdata(component);
1043 struct wm_adsp *dsp = &dsps[w->shift];
1044
1045 switch (event) {
1046 case SND_SOC_DAPM_PRE_PMU:
1047 queue_work(system_unbound_wq, &dsp->boot_work);
1048 break;
1049 case SND_SOC_DAPM_PRE_PMD:
1050 wm_adsp_power_down(dsp);
1051 break;
1052 default:
1053 break;
1054 }
1055
1056 return 0;
1057}
1058EXPORT_SYMBOL_GPL(wm_adsp_early_event);
1059
1060static int wm_adsp_pre_run(struct cs_dsp *cs_dsp)
1061{
1062 struct wm_adsp *dsp = container_of(cs_dsp, struct wm_adsp, cs_dsp);
1063
1064 if (!dsp->pre_run)
1065 return 0;
1066
1067 return (*dsp->pre_run)(dsp);
1068}
1069
1070static int wm_adsp_event_post_run(struct cs_dsp *cs_dsp)
1071{
1072 struct wm_adsp *dsp = container_of(cs_dsp, struct wm_adsp, cs_dsp);
1073
1074 if (wm_adsp_fw[dsp->fw].num_caps != 0)
1075 return wm_adsp_buffer_init(dsp);
1076
1077 return 0;
1078}
1079
1080static void wm_adsp_event_post_stop(struct cs_dsp *cs_dsp)
1081{
1082 struct wm_adsp *dsp = container_of(cs_dsp, struct wm_adsp, cs_dsp);
1083
1084 if (wm_adsp_fw[dsp->fw].num_caps != 0)
1085 wm_adsp_buffer_free(dsp);
1086
1087 dsp->fatal_error = false;
1088}
1089
1090int wm_adsp_run(struct wm_adsp *dsp)
1091{
1092 flush_work(&dsp->boot_work);
1093
1094 return cs_dsp_run(&dsp->cs_dsp);
1095}
1096EXPORT_SYMBOL_GPL(wm_adsp_run);
1097
1098void wm_adsp_stop(struct wm_adsp *dsp)
1099{
1100 cs_dsp_stop(&dsp->cs_dsp);
1101}
1102EXPORT_SYMBOL_GPL(wm_adsp_stop);
1103
1104int wm_adsp_event(struct snd_soc_dapm_widget *w,
1105 struct snd_kcontrol *kcontrol, int event)
1106{
1107 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1108 struct wm_adsp *dsps = snd_soc_component_get_drvdata(component);
1109 struct wm_adsp *dsp = &dsps[w->shift];
1110
1111 switch (event) {
1112 case SND_SOC_DAPM_POST_PMU:
1113 return wm_adsp_run(dsp);
1114 case SND_SOC_DAPM_PRE_PMD:
1115 wm_adsp_stop(dsp);
1116 return 0;
1117 default:
1118 return 0;
1119 }
1120}
1121EXPORT_SYMBOL_GPL(wm_adsp_event);
1122
1123int wm_adsp2_component_probe(struct wm_adsp *dsp, struct snd_soc_component *component)
1124{
1125 char preload[32];
1126
1127 if (!dsp->cs_dsp.no_core_startstop) {
1128 snprintf(preload, ARRAY_SIZE(preload), "%s Preload", dsp->cs_dsp.name);
1129 snd_soc_component_disable_pin(component, preload);
1130 }
1131
1132 cs_dsp_init_debugfs(&dsp->cs_dsp, component->debugfs_root);
1133
1134 dsp->component = component;
1135
1136 return 0;
1137}
1138EXPORT_SYMBOL_GPL(wm_adsp2_component_probe);
1139
1140int wm_adsp2_component_remove(struct wm_adsp *dsp, struct snd_soc_component *component)
1141{
1142 cs_dsp_cleanup_debugfs(&dsp->cs_dsp);
1143
1144 return 0;
1145}
1146EXPORT_SYMBOL_GPL(wm_adsp2_component_remove);
1147
1148int wm_adsp2_init(struct wm_adsp *dsp)
1149{
1150 int ret;
1151
1152 INIT_WORK(&dsp->boot_work, wm_adsp_boot_work);
1153
1154 dsp->sys_config_size = sizeof(struct wm_adsp_system_config_xm_hdr);
1155 dsp->cs_dsp.client_ops = &wm_adsp2_client_ops;
1156
1157 ret = cs_dsp_adsp2_init(&dsp->cs_dsp);
1158 if (ret)
1159 return ret;
1160
1161 return wm_adsp_common_init(dsp);
1162}
1163EXPORT_SYMBOL_GPL(wm_adsp2_init);
1164
1165int wm_halo_init(struct wm_adsp *dsp)
1166{
1167 int ret;
1168
1169 INIT_WORK(&dsp->boot_work, wm_adsp_boot_work);
1170
1171 dsp->sys_config_size = sizeof(struct wm_halo_system_config_xm_hdr);
1172 dsp->cs_dsp.client_ops = &wm_adsp2_client_ops;
1173
1174 ret = cs_dsp_halo_init(&dsp->cs_dsp);
1175 if (ret)
1176 return ret;
1177
1178 return wm_adsp_common_init(dsp);
1179}
1180EXPORT_SYMBOL_GPL(wm_halo_init);
1181
1182void wm_adsp2_remove(struct wm_adsp *dsp)
1183{
1184 cs_dsp_remove(&dsp->cs_dsp);
1185}
1186EXPORT_SYMBOL_GPL(wm_adsp2_remove);
1187
1188static inline int wm_adsp_compr_attached(struct wm_adsp_compr *compr)
1189{
1190 return compr->buf != NULL;
1191}
1192
1193static int wm_adsp_compr_attach(struct wm_adsp_compr *compr)
1194{
1195 struct wm_adsp_compr_buf *buf = NULL, *tmp;
1196
1197 if (compr->dsp->fatal_error)
1198 return -EINVAL;
1199
1200 list_for_each_entry(tmp, &compr->dsp->buffer_list, list) {
1201 if (!tmp->name || !strcmp(compr->name, tmp->name)) {
1202 buf = tmp;
1203 break;
1204 }
1205 }
1206
1207 if (!buf)
1208 return -EINVAL;
1209
1210 compr->buf = buf;
1211 buf->compr = compr;
1212
1213 return 0;
1214}
1215
1216static void wm_adsp_compr_detach(struct wm_adsp_compr *compr)
1217{
1218 if (!compr)
1219 return;
1220
1221 /* Wake the poll so it can see buffer is no longer attached */
1222 if (compr->stream)
1223 snd_compr_fragment_elapsed(compr->stream);
1224
1225 if (wm_adsp_compr_attached(compr)) {
1226 compr->buf->compr = NULL;
1227 compr->buf = NULL;
1228 }
1229}
1230
1231int wm_adsp_compr_open(struct wm_adsp *dsp, struct snd_compr_stream *stream)
1232{
1233 struct wm_adsp_compr *compr, *tmp;
1234 struct snd_soc_pcm_runtime *rtd = stream->private_data;
1235 int ret = 0;
1236
1237 mutex_lock(&dsp->cs_dsp.pwr_lock);
1238
1239 if (wm_adsp_fw[dsp->fw].num_caps == 0) {
1240 adsp_err(dsp, "%s: Firmware does not support compressed API\n",
1241 snd_soc_rtd_to_codec(rtd, 0)->name);
1242 ret = -ENXIO;
1243 goto out;
1244 }
1245
1246 if (wm_adsp_fw[dsp->fw].compr_direction != stream->direction) {
1247 adsp_err(dsp, "%s: Firmware does not support stream direction\n",
1248 snd_soc_rtd_to_codec(rtd, 0)->name);
1249 ret = -EINVAL;
1250 goto out;
1251 }
1252
1253 list_for_each_entry(tmp, &dsp->compr_list, list) {
1254 if (!strcmp(tmp->name, snd_soc_rtd_to_codec(rtd, 0)->name)) {
1255 adsp_err(dsp, "%s: Only a single stream supported per dai\n",
1256 snd_soc_rtd_to_codec(rtd, 0)->name);
1257 ret = -EBUSY;
1258 goto out;
1259 }
1260 }
1261
1262 compr = kzalloc(sizeof(*compr), GFP_KERNEL);
1263 if (!compr) {
1264 ret = -ENOMEM;
1265 goto out;
1266 }
1267
1268 compr->dsp = dsp;
1269 compr->stream = stream;
1270 compr->name = snd_soc_rtd_to_codec(rtd, 0)->name;
1271
1272 list_add_tail(&compr->list, &dsp->compr_list);
1273
1274 stream->runtime->private_data = compr;
1275
1276out:
1277 mutex_unlock(&dsp->cs_dsp.pwr_lock);
1278
1279 return ret;
1280}
1281EXPORT_SYMBOL_GPL(wm_adsp_compr_open);
1282
1283int wm_adsp_compr_free(struct snd_soc_component *component,
1284 struct snd_compr_stream *stream)
1285{
1286 struct wm_adsp_compr *compr = stream->runtime->private_data;
1287 struct wm_adsp *dsp = compr->dsp;
1288
1289 mutex_lock(&dsp->cs_dsp.pwr_lock);
1290
1291 wm_adsp_compr_detach(compr);
1292 list_del(&compr->list);
1293
1294 kfree(compr->raw_buf);
1295 kfree(compr);
1296
1297 mutex_unlock(&dsp->cs_dsp.pwr_lock);
1298
1299 return 0;
1300}
1301EXPORT_SYMBOL_GPL(wm_adsp_compr_free);
1302
1303static int wm_adsp_compr_check_params(struct snd_compr_stream *stream,
1304 struct snd_compr_params *params)
1305{
1306 struct wm_adsp_compr *compr = stream->runtime->private_data;
1307 struct wm_adsp *dsp = compr->dsp;
1308 const struct wm_adsp_fw_caps *caps;
1309 const struct snd_codec_desc *desc;
1310 int i, j;
1311
1312 if (params->buffer.fragment_size < WM_ADSP_MIN_FRAGMENT_SIZE ||
1313 params->buffer.fragment_size > WM_ADSP_MAX_FRAGMENT_SIZE ||
1314 params->buffer.fragments < WM_ADSP_MIN_FRAGMENTS ||
1315 params->buffer.fragments > WM_ADSP_MAX_FRAGMENTS ||
1316 params->buffer.fragment_size % CS_DSP_DATA_WORD_SIZE) {
1317 compr_err(compr, "Invalid buffer fragsize=%d fragments=%d\n",
1318 params->buffer.fragment_size,
1319 params->buffer.fragments);
1320
1321 return -EINVAL;
1322 }
1323
1324 for (i = 0; i < wm_adsp_fw[dsp->fw].num_caps; i++) {
1325 caps = &wm_adsp_fw[dsp->fw].caps[i];
1326 desc = &caps->desc;
1327
1328 if (caps->id != params->codec.id)
1329 continue;
1330
1331 if (stream->direction == SND_COMPRESS_PLAYBACK) {
1332 if (desc->max_ch < params->codec.ch_out)
1333 continue;
1334 } else {
1335 if (desc->max_ch < params->codec.ch_in)
1336 continue;
1337 }
1338
1339 if (!(desc->formats & (1 << params->codec.format)))
1340 continue;
1341
1342 for (j = 0; j < desc->num_sample_rates; ++j)
1343 if (desc->sample_rates[j] == params->codec.sample_rate)
1344 return 0;
1345 }
1346
1347 compr_err(compr, "Invalid params id=%u ch=%u,%u rate=%u fmt=%u\n",
1348 params->codec.id, params->codec.ch_in, params->codec.ch_out,
1349 params->codec.sample_rate, params->codec.format);
1350 return -EINVAL;
1351}
1352
1353static inline unsigned int wm_adsp_compr_frag_words(struct wm_adsp_compr *compr)
1354{
1355 return compr->size.fragment_size / CS_DSP_DATA_WORD_SIZE;
1356}
1357
1358int wm_adsp_compr_set_params(struct snd_soc_component *component,
1359 struct snd_compr_stream *stream,
1360 struct snd_compr_params *params)
1361{
1362 struct wm_adsp_compr *compr = stream->runtime->private_data;
1363 unsigned int size;
1364 int ret;
1365
1366 ret = wm_adsp_compr_check_params(stream, params);
1367 if (ret)
1368 return ret;
1369
1370 compr->size = params->buffer;
1371
1372 compr_dbg(compr, "fragment_size=%d fragments=%d\n",
1373 compr->size.fragment_size, compr->size.fragments);
1374
1375 size = wm_adsp_compr_frag_words(compr) * sizeof(*compr->raw_buf);
1376 compr->raw_buf = kmalloc(size, GFP_DMA | GFP_KERNEL);
1377 if (!compr->raw_buf)
1378 return -ENOMEM;
1379
1380 compr->sample_rate = params->codec.sample_rate;
1381
1382 return 0;
1383}
1384EXPORT_SYMBOL_GPL(wm_adsp_compr_set_params);
1385
1386int wm_adsp_compr_get_caps(struct snd_soc_component *component,
1387 struct snd_compr_stream *stream,
1388 struct snd_compr_caps *caps)
1389{
1390 struct wm_adsp_compr *compr = stream->runtime->private_data;
1391 int fw = compr->dsp->fw;
1392 int i;
1393
1394 if (wm_adsp_fw[fw].caps) {
1395 for (i = 0; i < wm_adsp_fw[fw].num_caps; i++)
1396 caps->codecs[i] = wm_adsp_fw[fw].caps[i].id;
1397
1398 caps->num_codecs = i;
1399 caps->direction = wm_adsp_fw[fw].compr_direction;
1400
1401 caps->min_fragment_size = WM_ADSP_MIN_FRAGMENT_SIZE;
1402 caps->max_fragment_size = WM_ADSP_MAX_FRAGMENT_SIZE;
1403 caps->min_fragments = WM_ADSP_MIN_FRAGMENTS;
1404 caps->max_fragments = WM_ADSP_MAX_FRAGMENTS;
1405 }
1406
1407 return 0;
1408}
1409EXPORT_SYMBOL_GPL(wm_adsp_compr_get_caps);
1410
1411static inline int wm_adsp_buffer_read(struct wm_adsp_compr_buf *buf,
1412 unsigned int field_offset, u32 *data)
1413{
1414 return cs_dsp_read_data_word(&buf->dsp->cs_dsp, buf->host_buf_mem_type,
1415 buf->host_buf_ptr + field_offset, data);
1416}
1417
1418static inline int wm_adsp_buffer_write(struct wm_adsp_compr_buf *buf,
1419 unsigned int field_offset, u32 data)
1420{
1421 return cs_dsp_write_data_word(&buf->dsp->cs_dsp, buf->host_buf_mem_type,
1422 buf->host_buf_ptr + field_offset,
1423 data);
1424}
1425
1426static int wm_adsp_buffer_populate(struct wm_adsp_compr_buf *buf)
1427{
1428 const struct wm_adsp_fw_caps *caps = wm_adsp_fw[buf->dsp->fw].caps;
1429 struct wm_adsp_buffer_region *region;
1430 u32 offset = 0;
1431 int i, ret;
1432
1433 buf->regions = kcalloc(caps->num_regions, sizeof(*buf->regions),
1434 GFP_KERNEL);
1435 if (!buf->regions)
1436 return -ENOMEM;
1437
1438 for (i = 0; i < caps->num_regions; ++i) {
1439 region = &buf->regions[i];
1440
1441 region->offset = offset;
1442 region->mem_type = caps->region_defs[i].mem_type;
1443
1444 ret = wm_adsp_buffer_read(buf, caps->region_defs[i].base_offset,
1445 ®ion->base_addr);
1446 if (ret < 0)
1447 goto err;
1448
1449 ret = wm_adsp_buffer_read(buf, caps->region_defs[i].size_offset,
1450 &offset);
1451 if (ret < 0)
1452 goto err;
1453
1454 region->cumulative_size = offset;
1455
1456 compr_dbg(buf,
1457 "region=%d type=%d base=%08x off=%08x size=%08x\n",
1458 i, region->mem_type, region->base_addr,
1459 region->offset, region->cumulative_size);
1460 }
1461
1462 return 0;
1463
1464err:
1465 kfree(buf->regions);
1466 return ret;
1467}
1468
1469static void wm_adsp_buffer_clear(struct wm_adsp_compr_buf *buf)
1470{
1471 buf->irq_count = 0xFFFFFFFF;
1472 buf->read_index = -1;
1473 buf->avail = 0;
1474}
1475
1476static struct wm_adsp_compr_buf *wm_adsp_buffer_alloc(struct wm_adsp *dsp)
1477{
1478 struct wm_adsp_compr_buf *buf;
1479
1480 buf = kzalloc(sizeof(*buf), GFP_KERNEL);
1481 if (!buf)
1482 return NULL;
1483
1484 buf->dsp = dsp;
1485
1486 wm_adsp_buffer_clear(buf);
1487
1488 return buf;
1489}
1490
1491static int wm_adsp_buffer_parse_legacy(struct wm_adsp *dsp)
1492{
1493 struct cs_dsp_alg_region *alg_region;
1494 struct wm_adsp_compr_buf *buf;
1495 u32 xmalg, addr, magic;
1496 int i, ret;
1497
1498 alg_region = cs_dsp_find_alg_region(&dsp->cs_dsp, WMFW_ADSP2_XM, dsp->cs_dsp.fw_id);
1499 if (!alg_region) {
1500 adsp_err(dsp, "No algorithm region found\n");
1501 return -EINVAL;
1502 }
1503
1504 xmalg = dsp->sys_config_size / sizeof(__be32);
1505
1506 addr = alg_region->base + xmalg + ALG_XM_FIELD(magic);
1507 ret = cs_dsp_read_data_word(&dsp->cs_dsp, WMFW_ADSP2_XM, addr, &magic);
1508 if (ret < 0)
1509 return ret;
1510
1511 if (magic != WM_ADSP_ALG_XM_STRUCT_MAGIC)
1512 return -ENODEV;
1513
1514 buf = wm_adsp_buffer_alloc(dsp);
1515 if (!buf)
1516 return -ENOMEM;
1517
1518 addr = alg_region->base + xmalg + ALG_XM_FIELD(host_buf_ptr);
1519 for (i = 0; i < 5; ++i) {
1520 ret = cs_dsp_read_data_word(&dsp->cs_dsp, WMFW_ADSP2_XM, addr,
1521 &buf->host_buf_ptr);
1522 if (ret < 0)
1523 goto err;
1524
1525 if (buf->host_buf_ptr)
1526 break;
1527
1528 usleep_range(1000, 2000);
1529 }
1530
1531 if (!buf->host_buf_ptr) {
1532 ret = -EIO;
1533 goto err;
1534 }
1535
1536 buf->host_buf_mem_type = WMFW_ADSP2_XM;
1537
1538 ret = wm_adsp_buffer_populate(buf);
1539 if (ret < 0)
1540 goto err;
1541
1542 list_add_tail(&buf->list, &dsp->buffer_list);
1543
1544 compr_dbg(buf, "legacy host_buf_ptr=%x\n", buf->host_buf_ptr);
1545
1546 return 0;
1547
1548err:
1549 kfree(buf);
1550
1551 return ret;
1552}
1553
1554static int wm_adsp_buffer_parse_coeff(struct cs_dsp_coeff_ctl *cs_ctl)
1555{
1556 struct wm_adsp_host_buf_coeff_v1 coeff_v1;
1557 struct wm_adsp_compr_buf *buf;
1558 struct wm_adsp *dsp = container_of(cs_ctl->dsp, struct wm_adsp, cs_dsp);
1559 unsigned int version = 0;
1560 int ret, i;
1561
1562 for (i = 0; i < 5; ++i) {
1563 ret = cs_dsp_coeff_read_ctrl(cs_ctl, 0, &coeff_v1,
1564 min(cs_ctl->len, sizeof(coeff_v1)));
1565 if (ret < 0)
1566 return ret;
1567
1568 if (coeff_v1.host_buf_ptr)
1569 break;
1570
1571 usleep_range(1000, 2000);
1572 }
1573
1574 if (!coeff_v1.host_buf_ptr) {
1575 adsp_err(dsp, "Failed to acquire host buffer\n");
1576 return -EIO;
1577 }
1578
1579 buf = wm_adsp_buffer_alloc(dsp);
1580 if (!buf)
1581 return -ENOMEM;
1582
1583 buf->host_buf_mem_type = cs_ctl->alg_region.type;
1584 buf->host_buf_ptr = be32_to_cpu(coeff_v1.host_buf_ptr);
1585
1586 ret = wm_adsp_buffer_populate(buf);
1587 if (ret < 0)
1588 goto err;
1589
1590 /*
1591 * v0 host_buffer coefficients didn't have versioning, so if the
1592 * control is one word, assume version 0.
1593 */
1594 if (cs_ctl->len == 4)
1595 goto done;
1596
1597 version = be32_to_cpu(coeff_v1.versions) & HOST_BUF_COEFF_COMPAT_VER_MASK;
1598 version >>= HOST_BUF_COEFF_COMPAT_VER_SHIFT;
1599
1600 if (version > HOST_BUF_COEFF_SUPPORTED_COMPAT_VER) {
1601 adsp_err(dsp,
1602 "Host buffer coeff ver %u > supported version %u\n",
1603 version, HOST_BUF_COEFF_SUPPORTED_COMPAT_VER);
1604 ret = -EINVAL;
1605 goto err;
1606 }
1607
1608 cs_dsp_remove_padding((u32 *)&coeff_v1.name, ARRAY_SIZE(coeff_v1.name));
1609
1610 buf->name = kasprintf(GFP_KERNEL, "%s-dsp-%s", dsp->part,
1611 (char *)&coeff_v1.name);
1612
1613done:
1614 list_add_tail(&buf->list, &dsp->buffer_list);
1615
1616 compr_dbg(buf, "host_buf_ptr=%x coeff version %u\n",
1617 buf->host_buf_ptr, version);
1618
1619 return version;
1620
1621err:
1622 kfree(buf);
1623
1624 return ret;
1625}
1626
1627static int wm_adsp_buffer_init(struct wm_adsp *dsp)
1628{
1629 struct cs_dsp_coeff_ctl *cs_ctl;
1630 int ret;
1631
1632 list_for_each_entry(cs_ctl, &dsp->cs_dsp.ctl_list, list) {
1633 if (cs_ctl->type != WMFW_CTL_TYPE_HOST_BUFFER)
1634 continue;
1635
1636 if (!cs_ctl->enabled)
1637 continue;
1638
1639 ret = wm_adsp_buffer_parse_coeff(cs_ctl);
1640 if (ret < 0) {
1641 adsp_err(dsp, "Failed to parse coeff: %d\n", ret);
1642 goto error;
1643 } else if (ret == 0) {
1644 /* Only one buffer supported for version 0 */
1645 return 0;
1646 }
1647 }
1648
1649 if (list_empty(&dsp->buffer_list)) {
1650 /* Fall back to legacy support */
1651 ret = wm_adsp_buffer_parse_legacy(dsp);
1652 if (ret == -ENODEV)
1653 adsp_info(dsp, "Legacy support not available\n");
1654 else if (ret)
1655 adsp_warn(dsp, "Failed to parse legacy: %d\n", ret);
1656 }
1657
1658 return 0;
1659
1660error:
1661 wm_adsp_buffer_free(dsp);
1662 return ret;
1663}
1664
1665static int wm_adsp_buffer_free(struct wm_adsp *dsp)
1666{
1667 struct wm_adsp_compr_buf *buf, *tmp;
1668
1669 list_for_each_entry_safe(buf, tmp, &dsp->buffer_list, list) {
1670 wm_adsp_compr_detach(buf->compr);
1671
1672 kfree(buf->name);
1673 kfree(buf->regions);
1674 list_del(&buf->list);
1675 kfree(buf);
1676 }
1677
1678 return 0;
1679}
1680
1681static int wm_adsp_buffer_get_error(struct wm_adsp_compr_buf *buf)
1682{
1683 int ret;
1684
1685 ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(error), &buf->error);
1686 if (ret < 0) {
1687 compr_err(buf, "Failed to check buffer error: %d\n", ret);
1688 return ret;
1689 }
1690 if (buf->error != 0) {
1691 compr_err(buf, "Buffer error occurred: %d\n", buf->error);
1692 return -EIO;
1693 }
1694
1695 return 0;
1696}
1697
1698int wm_adsp_compr_trigger(struct snd_soc_component *component,
1699 struct snd_compr_stream *stream, int cmd)
1700{
1701 struct wm_adsp_compr *compr = stream->runtime->private_data;
1702 struct wm_adsp *dsp = compr->dsp;
1703 int ret = 0;
1704
1705 compr_dbg(compr, "Trigger: %d\n", cmd);
1706
1707 mutex_lock(&dsp->cs_dsp.pwr_lock);
1708
1709 switch (cmd) {
1710 case SNDRV_PCM_TRIGGER_START:
1711 if (!wm_adsp_compr_attached(compr)) {
1712 ret = wm_adsp_compr_attach(compr);
1713 if (ret < 0) {
1714 compr_err(compr, "Failed to link buffer and stream: %d\n",
1715 ret);
1716 break;
1717 }
1718 }
1719
1720 ret = wm_adsp_buffer_get_error(compr->buf);
1721 if (ret < 0)
1722 break;
1723
1724 /* Trigger the IRQ at one fragment of data */
1725 ret = wm_adsp_buffer_write(compr->buf,
1726 HOST_BUFFER_FIELD(high_water_mark),
1727 wm_adsp_compr_frag_words(compr));
1728 if (ret < 0) {
1729 compr_err(compr, "Failed to set high water mark: %d\n",
1730 ret);
1731 break;
1732 }
1733 break;
1734 case SNDRV_PCM_TRIGGER_STOP:
1735 if (wm_adsp_compr_attached(compr))
1736 wm_adsp_buffer_clear(compr->buf);
1737 break;
1738 default:
1739 ret = -EINVAL;
1740 break;
1741 }
1742
1743 mutex_unlock(&dsp->cs_dsp.pwr_lock);
1744
1745 return ret;
1746}
1747EXPORT_SYMBOL_GPL(wm_adsp_compr_trigger);
1748
1749static inline int wm_adsp_buffer_size(struct wm_adsp_compr_buf *buf)
1750{
1751 int last_region = wm_adsp_fw[buf->dsp->fw].caps->num_regions - 1;
1752
1753 return buf->regions[last_region].cumulative_size;
1754}
1755
1756static int wm_adsp_buffer_update_avail(struct wm_adsp_compr_buf *buf)
1757{
1758 u32 next_read_index, next_write_index;
1759 int write_index, read_index, avail;
1760 int ret;
1761
1762 /* Only sync read index if we haven't already read a valid index */
1763 if (buf->read_index < 0) {
1764 ret = wm_adsp_buffer_read(buf,
1765 HOST_BUFFER_FIELD(next_read_index),
1766 &next_read_index);
1767 if (ret < 0)
1768 return ret;
1769
1770 read_index = sign_extend32(next_read_index, 23);
1771
1772 if (read_index < 0) {
1773 compr_dbg(buf, "Avail check on unstarted stream\n");
1774 return 0;
1775 }
1776
1777 buf->read_index = read_index;
1778 }
1779
1780 ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(next_write_index),
1781 &next_write_index);
1782 if (ret < 0)
1783 return ret;
1784
1785 write_index = sign_extend32(next_write_index, 23);
1786
1787 avail = write_index - buf->read_index;
1788 if (avail < 0)
1789 avail += wm_adsp_buffer_size(buf);
1790
1791 compr_dbg(buf, "readindex=0x%x, writeindex=0x%x, avail=%d\n",
1792 buf->read_index, write_index, avail * CS_DSP_DATA_WORD_SIZE);
1793
1794 buf->avail = avail;
1795
1796 return 0;
1797}
1798
1799int wm_adsp_compr_handle_irq(struct wm_adsp *dsp)
1800{
1801 struct wm_adsp_compr_buf *buf;
1802 struct wm_adsp_compr *compr;
1803 int ret = 0;
1804
1805 mutex_lock(&dsp->cs_dsp.pwr_lock);
1806
1807 if (list_empty(&dsp->buffer_list)) {
1808 ret = -ENODEV;
1809 goto out;
1810 }
1811
1812 adsp_dbg(dsp, "Handling buffer IRQ\n");
1813
1814 list_for_each_entry(buf, &dsp->buffer_list, list) {
1815 compr = buf->compr;
1816
1817 ret = wm_adsp_buffer_get_error(buf);
1818 if (ret < 0)
1819 goto out_notify; /* Wake poll to report error */
1820
1821 ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(irq_count),
1822 &buf->irq_count);
1823 if (ret < 0) {
1824 compr_err(buf, "Failed to get irq_count: %d\n", ret);
1825 goto out;
1826 }
1827
1828 ret = wm_adsp_buffer_update_avail(buf);
1829 if (ret < 0) {
1830 compr_err(buf, "Error reading avail: %d\n", ret);
1831 goto out;
1832 }
1833
1834 if (wm_adsp_fw[dsp->fw].voice_trigger && buf->irq_count == 2)
1835 ret = WM_ADSP_COMPR_VOICE_TRIGGER;
1836
1837out_notify:
1838 if (compr && compr->stream)
1839 snd_compr_fragment_elapsed(compr->stream);
1840 }
1841
1842out:
1843 mutex_unlock(&dsp->cs_dsp.pwr_lock);
1844
1845 return ret;
1846}
1847EXPORT_SYMBOL_GPL(wm_adsp_compr_handle_irq);
1848
1849static int wm_adsp_buffer_reenable_irq(struct wm_adsp_compr_buf *buf)
1850{
1851 if (buf->irq_count & 0x01)
1852 return 0;
1853
1854 compr_dbg(buf, "Enable IRQ(0x%x) for next fragment\n", buf->irq_count);
1855
1856 buf->irq_count |= 0x01;
1857
1858 return wm_adsp_buffer_write(buf, HOST_BUFFER_FIELD(irq_ack),
1859 buf->irq_count);
1860}
1861
1862int wm_adsp_compr_pointer(struct snd_soc_component *component,
1863 struct snd_compr_stream *stream,
1864 struct snd_compr_tstamp *tstamp)
1865{
1866 struct wm_adsp_compr *compr = stream->runtime->private_data;
1867 struct wm_adsp *dsp = compr->dsp;
1868 struct wm_adsp_compr_buf *buf;
1869 int ret = 0;
1870
1871 compr_dbg(compr, "Pointer request\n");
1872
1873 mutex_lock(&dsp->cs_dsp.pwr_lock);
1874
1875 buf = compr->buf;
1876
1877 if (dsp->fatal_error || !buf || buf->error) {
1878 snd_compr_stop_error(stream, SNDRV_PCM_STATE_XRUN);
1879 ret = -EIO;
1880 goto out;
1881 }
1882
1883 if (buf->avail < wm_adsp_compr_frag_words(compr)) {
1884 ret = wm_adsp_buffer_update_avail(buf);
1885 if (ret < 0) {
1886 compr_err(compr, "Error reading avail: %d\n", ret);
1887 goto out;
1888 }
1889
1890 /*
1891 * If we really have less than 1 fragment available tell the
1892 * DSP to inform us once a whole fragment is available.
1893 */
1894 if (buf->avail < wm_adsp_compr_frag_words(compr)) {
1895 ret = wm_adsp_buffer_get_error(buf);
1896 if (ret < 0) {
1897 if (buf->error)
1898 snd_compr_stop_error(stream,
1899 SNDRV_PCM_STATE_XRUN);
1900 goto out;
1901 }
1902
1903 ret = wm_adsp_buffer_reenable_irq(buf);
1904 if (ret < 0) {
1905 compr_err(compr, "Failed to re-enable buffer IRQ: %d\n",
1906 ret);
1907 goto out;
1908 }
1909 }
1910 }
1911
1912 tstamp->copied_total = compr->copied_total;
1913 tstamp->copied_total += buf->avail * CS_DSP_DATA_WORD_SIZE;
1914 tstamp->sampling_rate = compr->sample_rate;
1915
1916out:
1917 mutex_unlock(&dsp->cs_dsp.pwr_lock);
1918
1919 return ret;
1920}
1921EXPORT_SYMBOL_GPL(wm_adsp_compr_pointer);
1922
1923static int wm_adsp_buffer_capture_block(struct wm_adsp_compr *compr, int target)
1924{
1925 struct wm_adsp_compr_buf *buf = compr->buf;
1926 unsigned int adsp_addr;
1927 int mem_type, nwords, max_read;
1928 int i, ret;
1929
1930 /* Calculate read parameters */
1931 for (i = 0; i < wm_adsp_fw[buf->dsp->fw].caps->num_regions; ++i)
1932 if (buf->read_index < buf->regions[i].cumulative_size)
1933 break;
1934
1935 if (i == wm_adsp_fw[buf->dsp->fw].caps->num_regions)
1936 return -EINVAL;
1937
1938 mem_type = buf->regions[i].mem_type;
1939 adsp_addr = buf->regions[i].base_addr +
1940 (buf->read_index - buf->regions[i].offset);
1941
1942 max_read = wm_adsp_compr_frag_words(compr);
1943 nwords = buf->regions[i].cumulative_size - buf->read_index;
1944
1945 if (nwords > target)
1946 nwords = target;
1947 if (nwords > buf->avail)
1948 nwords = buf->avail;
1949 if (nwords > max_read)
1950 nwords = max_read;
1951 if (!nwords)
1952 return 0;
1953
1954 /* Read data from DSP */
1955 ret = cs_dsp_read_raw_data_block(&buf->dsp->cs_dsp, mem_type, adsp_addr,
1956 nwords, (__be32 *)compr->raw_buf);
1957 if (ret < 0)
1958 return ret;
1959
1960 cs_dsp_remove_padding(compr->raw_buf, nwords);
1961
1962 /* update read index to account for words read */
1963 buf->read_index += nwords;
1964 if (buf->read_index == wm_adsp_buffer_size(buf))
1965 buf->read_index = 0;
1966
1967 ret = wm_adsp_buffer_write(buf, HOST_BUFFER_FIELD(next_read_index),
1968 buf->read_index);
1969 if (ret < 0)
1970 return ret;
1971
1972 /* update avail to account for words read */
1973 buf->avail -= nwords;
1974
1975 return nwords;
1976}
1977
1978static int wm_adsp_compr_read(struct wm_adsp_compr *compr,
1979 char __user *buf, size_t count)
1980{
1981 struct wm_adsp *dsp = compr->dsp;
1982 int ntotal = 0;
1983 int nwords, nbytes;
1984
1985 compr_dbg(compr, "Requested read of %zu bytes\n", count);
1986
1987 if (dsp->fatal_error || !compr->buf || compr->buf->error) {
1988 snd_compr_stop_error(compr->stream, SNDRV_PCM_STATE_XRUN);
1989 return -EIO;
1990 }
1991
1992 count /= CS_DSP_DATA_WORD_SIZE;
1993
1994 do {
1995 nwords = wm_adsp_buffer_capture_block(compr, count);
1996 if (nwords < 0) {
1997 compr_err(compr, "Failed to capture block: %d\n",
1998 nwords);
1999 return nwords;
2000 }
2001
2002 nbytes = nwords * CS_DSP_DATA_WORD_SIZE;
2003
2004 compr_dbg(compr, "Read %d bytes\n", nbytes);
2005
2006 if (copy_to_user(buf + ntotal, compr->raw_buf, nbytes)) {
2007 compr_err(compr, "Failed to copy data to user: %d, %d\n",
2008 ntotal, nbytes);
2009 return -EFAULT;
2010 }
2011
2012 count -= nwords;
2013 ntotal += nbytes;
2014 } while (nwords > 0 && count > 0);
2015
2016 compr->copied_total += ntotal;
2017
2018 return ntotal;
2019}
2020
2021int wm_adsp_compr_copy(struct snd_soc_component *component,
2022 struct snd_compr_stream *stream, char __user *buf,
2023 size_t count)
2024{
2025 struct wm_adsp_compr *compr = stream->runtime->private_data;
2026 struct wm_adsp *dsp = compr->dsp;
2027 int ret;
2028
2029 mutex_lock(&dsp->cs_dsp.pwr_lock);
2030
2031 if (stream->direction == SND_COMPRESS_CAPTURE)
2032 ret = wm_adsp_compr_read(compr, buf, count);
2033 else
2034 ret = -ENOTSUPP;
2035
2036 mutex_unlock(&dsp->cs_dsp.pwr_lock);
2037
2038 return ret;
2039}
2040EXPORT_SYMBOL_GPL(wm_adsp_compr_copy);
2041
2042static void wm_adsp_fatal_error(struct cs_dsp *cs_dsp)
2043{
2044 struct wm_adsp *dsp = container_of(cs_dsp, struct wm_adsp, cs_dsp);
2045 struct wm_adsp_compr *compr;
2046
2047 dsp->fatal_error = true;
2048
2049 list_for_each_entry(compr, &dsp->compr_list, list) {
2050 if (compr->stream)
2051 snd_compr_fragment_elapsed(compr->stream);
2052 }
2053}
2054
2055irqreturn_t wm_adsp2_bus_error(int irq, void *data)
2056{
2057 struct wm_adsp *dsp = (struct wm_adsp *)data;
2058
2059 cs_dsp_adsp2_bus_error(&dsp->cs_dsp);
2060
2061 return IRQ_HANDLED;
2062}
2063EXPORT_SYMBOL_GPL(wm_adsp2_bus_error);
2064
2065irqreturn_t wm_halo_bus_error(int irq, void *data)
2066{
2067 struct wm_adsp *dsp = (struct wm_adsp *)data;
2068
2069 cs_dsp_halo_bus_error(&dsp->cs_dsp);
2070
2071 return IRQ_HANDLED;
2072}
2073EXPORT_SYMBOL_GPL(wm_halo_bus_error);
2074
2075irqreturn_t wm_halo_wdt_expire(int irq, void *data)
2076{
2077 struct wm_adsp *dsp = data;
2078
2079 cs_dsp_halo_wdt_expire(&dsp->cs_dsp);
2080
2081 return IRQ_HANDLED;
2082}
2083EXPORT_SYMBOL_GPL(wm_halo_wdt_expire);
2084
2085static const struct cs_dsp_client_ops wm_adsp1_client_ops = {
2086 .control_add = wm_adsp_control_add_cb,
2087 .control_remove = wm_adsp_control_remove,
2088};
2089
2090static const struct cs_dsp_client_ops wm_adsp2_client_ops = {
2091 .control_add = wm_adsp_control_add_cb,
2092 .control_remove = wm_adsp_control_remove,
2093 .pre_run = wm_adsp_pre_run,
2094 .post_run = wm_adsp_event_post_run,
2095 .post_stop = wm_adsp_event_post_stop,
2096 .watchdog_expired = wm_adsp_fatal_error,
2097};
2098
2099MODULE_DESCRIPTION("Cirrus Logic ASoC DSP Support");
2100MODULE_LICENSE("GPL v2");
2101MODULE_IMPORT_NS("FW_CS_DSP");
1/*
2 * wm_adsp.c -- Wolfson ADSP support
3 *
4 * Copyright 2012 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/firmware.h>
18#include <linux/list.h>
19#include <linux/pm.h>
20#include <linux/pm_runtime.h>
21#include <linux/regmap.h>
22#include <linux/regulator/consumer.h>
23#include <linux/slab.h>
24#include <linux/workqueue.h>
25#include <sound/core.h>
26#include <sound/pcm.h>
27#include <sound/pcm_params.h>
28#include <sound/soc.h>
29#include <sound/jack.h>
30#include <sound/initval.h>
31#include <sound/tlv.h>
32
33#include <linux/mfd/arizona/registers.h>
34
35#include "arizona.h"
36#include "wm_adsp.h"
37
38#define adsp_crit(_dsp, fmt, ...) \
39 dev_crit(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
40#define adsp_err(_dsp, fmt, ...) \
41 dev_err(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
42#define adsp_warn(_dsp, fmt, ...) \
43 dev_warn(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
44#define adsp_info(_dsp, fmt, ...) \
45 dev_info(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
46#define adsp_dbg(_dsp, fmt, ...) \
47 dev_dbg(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
48
49#define ADSP1_CONTROL_1 0x00
50#define ADSP1_CONTROL_2 0x02
51#define ADSP1_CONTROL_3 0x03
52#define ADSP1_CONTROL_4 0x04
53#define ADSP1_CONTROL_5 0x06
54#define ADSP1_CONTROL_6 0x07
55#define ADSP1_CONTROL_7 0x08
56#define ADSP1_CONTROL_8 0x09
57#define ADSP1_CONTROL_9 0x0A
58#define ADSP1_CONTROL_10 0x0B
59#define ADSP1_CONTROL_11 0x0C
60#define ADSP1_CONTROL_12 0x0D
61#define ADSP1_CONTROL_13 0x0F
62#define ADSP1_CONTROL_14 0x10
63#define ADSP1_CONTROL_15 0x11
64#define ADSP1_CONTROL_16 0x12
65#define ADSP1_CONTROL_17 0x13
66#define ADSP1_CONTROL_18 0x14
67#define ADSP1_CONTROL_19 0x16
68#define ADSP1_CONTROL_20 0x17
69#define ADSP1_CONTROL_21 0x18
70#define ADSP1_CONTROL_22 0x1A
71#define ADSP1_CONTROL_23 0x1B
72#define ADSP1_CONTROL_24 0x1C
73#define ADSP1_CONTROL_25 0x1E
74#define ADSP1_CONTROL_26 0x20
75#define ADSP1_CONTROL_27 0x21
76#define ADSP1_CONTROL_28 0x22
77#define ADSP1_CONTROL_29 0x23
78#define ADSP1_CONTROL_30 0x24
79#define ADSP1_CONTROL_31 0x26
80
81/*
82 * ADSP1 Control 19
83 */
84#define ADSP1_WDMA_BUFFER_LENGTH_MASK 0x00FF /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
85#define ADSP1_WDMA_BUFFER_LENGTH_SHIFT 0 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
86#define ADSP1_WDMA_BUFFER_LENGTH_WIDTH 8 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
87
88
89/*
90 * ADSP1 Control 30
91 */
92#define ADSP1_DBG_CLK_ENA 0x0008 /* DSP1_DBG_CLK_ENA */
93#define ADSP1_DBG_CLK_ENA_MASK 0x0008 /* DSP1_DBG_CLK_ENA */
94#define ADSP1_DBG_CLK_ENA_SHIFT 3 /* DSP1_DBG_CLK_ENA */
95#define ADSP1_DBG_CLK_ENA_WIDTH 1 /* DSP1_DBG_CLK_ENA */
96#define ADSP1_SYS_ENA 0x0004 /* DSP1_SYS_ENA */
97#define ADSP1_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */
98#define ADSP1_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */
99#define ADSP1_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */
100#define ADSP1_CORE_ENA 0x0002 /* DSP1_CORE_ENA */
101#define ADSP1_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */
102#define ADSP1_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */
103#define ADSP1_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */
104#define ADSP1_START 0x0001 /* DSP1_START */
105#define ADSP1_START_MASK 0x0001 /* DSP1_START */
106#define ADSP1_START_SHIFT 0 /* DSP1_START */
107#define ADSP1_START_WIDTH 1 /* DSP1_START */
108
109/*
110 * ADSP1 Control 31
111 */
112#define ADSP1_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */
113#define ADSP1_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */
114#define ADSP1_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */
115
116#define ADSP2_CONTROL 0x0
117#define ADSP2_CLOCKING 0x1
118#define ADSP2_STATUS1 0x4
119#define ADSP2_WDMA_CONFIG_1 0x30
120#define ADSP2_WDMA_CONFIG_2 0x31
121#define ADSP2_RDMA_CONFIG_1 0x34
122
123/*
124 * ADSP2 Control
125 */
126
127#define ADSP2_MEM_ENA 0x0010 /* DSP1_MEM_ENA */
128#define ADSP2_MEM_ENA_MASK 0x0010 /* DSP1_MEM_ENA */
129#define ADSP2_MEM_ENA_SHIFT 4 /* DSP1_MEM_ENA */
130#define ADSP2_MEM_ENA_WIDTH 1 /* DSP1_MEM_ENA */
131#define ADSP2_SYS_ENA 0x0004 /* DSP1_SYS_ENA */
132#define ADSP2_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */
133#define ADSP2_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */
134#define ADSP2_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */
135#define ADSP2_CORE_ENA 0x0002 /* DSP1_CORE_ENA */
136#define ADSP2_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */
137#define ADSP2_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */
138#define ADSP2_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */
139#define ADSP2_START 0x0001 /* DSP1_START */
140#define ADSP2_START_MASK 0x0001 /* DSP1_START */
141#define ADSP2_START_SHIFT 0 /* DSP1_START */
142#define ADSP2_START_WIDTH 1 /* DSP1_START */
143
144/*
145 * ADSP2 clocking
146 */
147#define ADSP2_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */
148#define ADSP2_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */
149#define ADSP2_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */
150
151/*
152 * ADSP2 Status 1
153 */
154#define ADSP2_RAM_RDY 0x0001
155#define ADSP2_RAM_RDY_MASK 0x0001
156#define ADSP2_RAM_RDY_SHIFT 0
157#define ADSP2_RAM_RDY_WIDTH 1
158
159struct wm_adsp_buf {
160 struct list_head list;
161 void *buf;
162};
163
164static struct wm_adsp_buf *wm_adsp_buf_alloc(const void *src, size_t len,
165 struct list_head *list)
166{
167 struct wm_adsp_buf *buf = kzalloc(sizeof(*buf), GFP_KERNEL);
168
169 if (buf == NULL)
170 return NULL;
171
172 buf->buf = kmemdup(src, len, GFP_KERNEL | GFP_DMA);
173 if (!buf->buf) {
174 kfree(buf);
175 return NULL;
176 }
177
178 if (list)
179 list_add_tail(&buf->list, list);
180
181 return buf;
182}
183
184static void wm_adsp_buf_free(struct list_head *list)
185{
186 while (!list_empty(list)) {
187 struct wm_adsp_buf *buf = list_first_entry(list,
188 struct wm_adsp_buf,
189 list);
190 list_del(&buf->list);
191 kfree(buf->buf);
192 kfree(buf);
193 }
194}
195
196#define WM_ADSP_NUM_FW 4
197
198#define WM_ADSP_FW_MBC_VSS 0
199#define WM_ADSP_FW_TX 1
200#define WM_ADSP_FW_TX_SPK 2
201#define WM_ADSP_FW_RX_ANC 3
202
203static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = {
204 [WM_ADSP_FW_MBC_VSS] = "MBC/VSS",
205 [WM_ADSP_FW_TX] = "Tx",
206 [WM_ADSP_FW_TX_SPK] = "Tx Speaker",
207 [WM_ADSP_FW_RX_ANC] = "Rx ANC",
208};
209
210static struct {
211 const char *file;
212} wm_adsp_fw[WM_ADSP_NUM_FW] = {
213 [WM_ADSP_FW_MBC_VSS] = { .file = "mbc-vss" },
214 [WM_ADSP_FW_TX] = { .file = "tx" },
215 [WM_ADSP_FW_TX_SPK] = { .file = "tx-spk" },
216 [WM_ADSP_FW_RX_ANC] = { .file = "rx-anc" },
217};
218
219struct wm_coeff_ctl_ops {
220 int (*xget)(struct snd_kcontrol *kcontrol,
221 struct snd_ctl_elem_value *ucontrol);
222 int (*xput)(struct snd_kcontrol *kcontrol,
223 struct snd_ctl_elem_value *ucontrol);
224 int (*xinfo)(struct snd_kcontrol *kcontrol,
225 struct snd_ctl_elem_info *uinfo);
226};
227
228struct wm_coeff_ctl {
229 const char *name;
230 struct wm_adsp_alg_region region;
231 struct wm_coeff_ctl_ops ops;
232 struct wm_adsp *adsp;
233 void *private;
234 unsigned int enabled:1;
235 struct list_head list;
236 void *cache;
237 size_t len;
238 unsigned int set:1;
239 struct snd_kcontrol *kcontrol;
240};
241
242static int wm_adsp_fw_get(struct snd_kcontrol *kcontrol,
243 struct snd_ctl_elem_value *ucontrol)
244{
245 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
246 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
247 struct wm_adsp *adsp = snd_soc_codec_get_drvdata(codec);
248
249 ucontrol->value.integer.value[0] = adsp[e->shift_l].fw;
250
251 return 0;
252}
253
254static int wm_adsp_fw_put(struct snd_kcontrol *kcontrol,
255 struct snd_ctl_elem_value *ucontrol)
256{
257 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
258 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
259 struct wm_adsp *adsp = snd_soc_codec_get_drvdata(codec);
260
261 if (ucontrol->value.integer.value[0] == adsp[e->shift_l].fw)
262 return 0;
263
264 if (ucontrol->value.integer.value[0] >= WM_ADSP_NUM_FW)
265 return -EINVAL;
266
267 if (adsp[e->shift_l].running)
268 return -EBUSY;
269
270 adsp[e->shift_l].fw = ucontrol->value.integer.value[0];
271
272 return 0;
273}
274
275static const struct soc_enum wm_adsp_fw_enum[] = {
276 SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
277 SOC_ENUM_SINGLE(0, 1, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
278 SOC_ENUM_SINGLE(0, 2, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
279 SOC_ENUM_SINGLE(0, 3, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
280};
281
282const struct snd_kcontrol_new wm_adsp1_fw_controls[] = {
283 SOC_ENUM_EXT("DSP1 Firmware", wm_adsp_fw_enum[0],
284 wm_adsp_fw_get, wm_adsp_fw_put),
285 SOC_ENUM_EXT("DSP2 Firmware", wm_adsp_fw_enum[1],
286 wm_adsp_fw_get, wm_adsp_fw_put),
287 SOC_ENUM_EXT("DSP3 Firmware", wm_adsp_fw_enum[2],
288 wm_adsp_fw_get, wm_adsp_fw_put),
289};
290EXPORT_SYMBOL_GPL(wm_adsp1_fw_controls);
291
292#if IS_ENABLED(CONFIG_SND_SOC_ARIZONA)
293static const struct soc_enum wm_adsp2_rate_enum[] = {
294 SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP1_CONTROL_1,
295 ARIZONA_DSP1_RATE_SHIFT, 0xf,
296 ARIZONA_RATE_ENUM_SIZE,
297 arizona_rate_text, arizona_rate_val),
298 SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP2_CONTROL_1,
299 ARIZONA_DSP1_RATE_SHIFT, 0xf,
300 ARIZONA_RATE_ENUM_SIZE,
301 arizona_rate_text, arizona_rate_val),
302 SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP3_CONTROL_1,
303 ARIZONA_DSP1_RATE_SHIFT, 0xf,
304 ARIZONA_RATE_ENUM_SIZE,
305 arizona_rate_text, arizona_rate_val),
306 SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP4_CONTROL_1,
307 ARIZONA_DSP1_RATE_SHIFT, 0xf,
308 ARIZONA_RATE_ENUM_SIZE,
309 arizona_rate_text, arizona_rate_val),
310};
311
312const struct snd_kcontrol_new wm_adsp2_fw_controls[] = {
313 SOC_ENUM_EXT("DSP1 Firmware", wm_adsp_fw_enum[0],
314 wm_adsp_fw_get, wm_adsp_fw_put),
315 SOC_ENUM("DSP1 Rate", wm_adsp2_rate_enum[0]),
316 SOC_ENUM_EXT("DSP2 Firmware", wm_adsp_fw_enum[1],
317 wm_adsp_fw_get, wm_adsp_fw_put),
318 SOC_ENUM("DSP2 Rate", wm_adsp2_rate_enum[1]),
319 SOC_ENUM_EXT("DSP3 Firmware", wm_adsp_fw_enum[2],
320 wm_adsp_fw_get, wm_adsp_fw_put),
321 SOC_ENUM("DSP3 Rate", wm_adsp2_rate_enum[2]),
322 SOC_ENUM_EXT("DSP4 Firmware", wm_adsp_fw_enum[3],
323 wm_adsp_fw_get, wm_adsp_fw_put),
324 SOC_ENUM("DSP4 Rate", wm_adsp2_rate_enum[3]),
325};
326EXPORT_SYMBOL_GPL(wm_adsp2_fw_controls);
327#endif
328
329static struct wm_adsp_region const *wm_adsp_find_region(struct wm_adsp *dsp,
330 int type)
331{
332 int i;
333
334 for (i = 0; i < dsp->num_mems; i++)
335 if (dsp->mem[i].type == type)
336 return &dsp->mem[i];
337
338 return NULL;
339}
340
341static unsigned int wm_adsp_region_to_reg(struct wm_adsp_region const *region,
342 unsigned int offset)
343{
344 if (WARN_ON(!region))
345 return offset;
346 switch (region->type) {
347 case WMFW_ADSP1_PM:
348 return region->base + (offset * 3);
349 case WMFW_ADSP1_DM:
350 return region->base + (offset * 2);
351 case WMFW_ADSP2_XM:
352 return region->base + (offset * 2);
353 case WMFW_ADSP2_YM:
354 return region->base + (offset * 2);
355 case WMFW_ADSP1_ZM:
356 return region->base + (offset * 2);
357 default:
358 WARN(1, "Unknown memory region type");
359 return offset;
360 }
361}
362
363static int wm_coeff_info(struct snd_kcontrol *kcontrol,
364 struct snd_ctl_elem_info *uinfo)
365{
366 struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value;
367
368 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
369 uinfo->count = ctl->len;
370 return 0;
371}
372
373static int wm_coeff_write_control(struct snd_kcontrol *kcontrol,
374 const void *buf, size_t len)
375{
376 struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value;
377 struct wm_adsp_alg_region *region = &ctl->region;
378 const struct wm_adsp_region *mem;
379 struct wm_adsp *adsp = ctl->adsp;
380 void *scratch;
381 int ret;
382 unsigned int reg;
383
384 mem = wm_adsp_find_region(adsp, region->type);
385 if (!mem) {
386 adsp_err(adsp, "No base for region %x\n",
387 region->type);
388 return -EINVAL;
389 }
390
391 reg = ctl->region.base;
392 reg = wm_adsp_region_to_reg(mem, reg);
393
394 scratch = kmemdup(buf, ctl->len, GFP_KERNEL | GFP_DMA);
395 if (!scratch)
396 return -ENOMEM;
397
398 ret = regmap_raw_write(adsp->regmap, reg, scratch,
399 ctl->len);
400 if (ret) {
401 adsp_err(adsp, "Failed to write %zu bytes to %x: %d\n",
402 ctl->len, reg, ret);
403 kfree(scratch);
404 return ret;
405 }
406 adsp_dbg(adsp, "Wrote %zu bytes to %x\n", ctl->len, reg);
407
408 kfree(scratch);
409
410 return 0;
411}
412
413static int wm_coeff_put(struct snd_kcontrol *kcontrol,
414 struct snd_ctl_elem_value *ucontrol)
415{
416 struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value;
417 char *p = ucontrol->value.bytes.data;
418
419 memcpy(ctl->cache, p, ctl->len);
420
421 if (!ctl->enabled) {
422 ctl->set = 1;
423 return 0;
424 }
425
426 return wm_coeff_write_control(kcontrol, p, ctl->len);
427}
428
429static int wm_coeff_read_control(struct snd_kcontrol *kcontrol,
430 void *buf, size_t len)
431{
432 struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value;
433 struct wm_adsp_alg_region *region = &ctl->region;
434 const struct wm_adsp_region *mem;
435 struct wm_adsp *adsp = ctl->adsp;
436 void *scratch;
437 int ret;
438 unsigned int reg;
439
440 mem = wm_adsp_find_region(adsp, region->type);
441 if (!mem) {
442 adsp_err(adsp, "No base for region %x\n",
443 region->type);
444 return -EINVAL;
445 }
446
447 reg = ctl->region.base;
448 reg = wm_adsp_region_to_reg(mem, reg);
449
450 scratch = kmalloc(ctl->len, GFP_KERNEL | GFP_DMA);
451 if (!scratch)
452 return -ENOMEM;
453
454 ret = regmap_raw_read(adsp->regmap, reg, scratch, ctl->len);
455 if (ret) {
456 adsp_err(adsp, "Failed to read %zu bytes from %x: %d\n",
457 ctl->len, reg, ret);
458 kfree(scratch);
459 return ret;
460 }
461 adsp_dbg(adsp, "Read %zu bytes from %x\n", ctl->len, reg);
462
463 memcpy(buf, scratch, ctl->len);
464 kfree(scratch);
465
466 return 0;
467}
468
469static int wm_coeff_get(struct snd_kcontrol *kcontrol,
470 struct snd_ctl_elem_value *ucontrol)
471{
472 struct wm_coeff_ctl *ctl = (struct wm_coeff_ctl *)kcontrol->private_value;
473 char *p = ucontrol->value.bytes.data;
474
475 memcpy(p, ctl->cache, ctl->len);
476 return 0;
477}
478
479struct wmfw_ctl_work {
480 struct wm_adsp *adsp;
481 struct wm_coeff_ctl *ctl;
482 struct work_struct work;
483};
484
485static int wmfw_add_ctl(struct wm_adsp *adsp, struct wm_coeff_ctl *ctl)
486{
487 struct snd_kcontrol_new *kcontrol;
488 int ret;
489
490 if (!ctl || !ctl->name)
491 return -EINVAL;
492
493 kcontrol = kzalloc(sizeof(*kcontrol), GFP_KERNEL);
494 if (!kcontrol)
495 return -ENOMEM;
496 kcontrol->iface = SNDRV_CTL_ELEM_IFACE_MIXER;
497
498 kcontrol->name = ctl->name;
499 kcontrol->info = wm_coeff_info;
500 kcontrol->get = wm_coeff_get;
501 kcontrol->put = wm_coeff_put;
502 kcontrol->private_value = (unsigned long)ctl;
503
504 ret = snd_soc_add_card_controls(adsp->card,
505 kcontrol, 1);
506 if (ret < 0)
507 goto err_kcontrol;
508
509 kfree(kcontrol);
510
511 ctl->kcontrol = snd_soc_card_get_kcontrol(adsp->card,
512 ctl->name);
513
514 list_add(&ctl->list, &adsp->ctl_list);
515 return 0;
516
517err_kcontrol:
518 kfree(kcontrol);
519 return ret;
520}
521
522static int wm_adsp_load(struct wm_adsp *dsp)
523{
524 LIST_HEAD(buf_list);
525 const struct firmware *firmware;
526 struct regmap *regmap = dsp->regmap;
527 unsigned int pos = 0;
528 const struct wmfw_header *header;
529 const struct wmfw_adsp1_sizes *adsp1_sizes;
530 const struct wmfw_adsp2_sizes *adsp2_sizes;
531 const struct wmfw_footer *footer;
532 const struct wmfw_region *region;
533 const struct wm_adsp_region *mem;
534 const char *region_name;
535 char *file, *text;
536 struct wm_adsp_buf *buf;
537 unsigned int reg;
538 int regions = 0;
539 int ret, offset, type, sizes;
540
541 file = kzalloc(PAGE_SIZE, GFP_KERNEL);
542 if (file == NULL)
543 return -ENOMEM;
544
545 snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.wmfw", dsp->part, dsp->num,
546 wm_adsp_fw[dsp->fw].file);
547 file[PAGE_SIZE - 1] = '\0';
548
549 ret = request_firmware(&firmware, file, dsp->dev);
550 if (ret != 0) {
551 adsp_err(dsp, "Failed to request '%s'\n", file);
552 goto out;
553 }
554 ret = -EINVAL;
555
556 pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer);
557 if (pos >= firmware->size) {
558 adsp_err(dsp, "%s: file too short, %zu bytes\n",
559 file, firmware->size);
560 goto out_fw;
561 }
562
563 header = (void*)&firmware->data[0];
564
565 if (memcmp(&header->magic[0], "WMFW", 4) != 0) {
566 adsp_err(dsp, "%s: invalid magic\n", file);
567 goto out_fw;
568 }
569
570 if (header->ver != 0) {
571 adsp_err(dsp, "%s: unknown file format %d\n",
572 file, header->ver);
573 goto out_fw;
574 }
575 adsp_info(dsp, "Firmware version: %d\n", header->ver);
576
577 if (header->core != dsp->type) {
578 adsp_err(dsp, "%s: invalid core %d != %d\n",
579 file, header->core, dsp->type);
580 goto out_fw;
581 }
582
583 switch (dsp->type) {
584 case WMFW_ADSP1:
585 pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer);
586 adsp1_sizes = (void *)&(header[1]);
587 footer = (void *)&(adsp1_sizes[1]);
588 sizes = sizeof(*adsp1_sizes);
589
590 adsp_dbg(dsp, "%s: %d DM, %d PM, %d ZM\n",
591 file, le32_to_cpu(adsp1_sizes->dm),
592 le32_to_cpu(adsp1_sizes->pm),
593 le32_to_cpu(adsp1_sizes->zm));
594 break;
595
596 case WMFW_ADSP2:
597 pos = sizeof(*header) + sizeof(*adsp2_sizes) + sizeof(*footer);
598 adsp2_sizes = (void *)&(header[1]);
599 footer = (void *)&(adsp2_sizes[1]);
600 sizes = sizeof(*adsp2_sizes);
601
602 adsp_dbg(dsp, "%s: %d XM, %d YM %d PM, %d ZM\n",
603 file, le32_to_cpu(adsp2_sizes->xm),
604 le32_to_cpu(adsp2_sizes->ym),
605 le32_to_cpu(adsp2_sizes->pm),
606 le32_to_cpu(adsp2_sizes->zm));
607 break;
608
609 default:
610 WARN(1, "Unknown DSP type");
611 goto out_fw;
612 }
613
614 if (le32_to_cpu(header->len) != sizeof(*header) +
615 sizes + sizeof(*footer)) {
616 adsp_err(dsp, "%s: unexpected header length %d\n",
617 file, le32_to_cpu(header->len));
618 goto out_fw;
619 }
620
621 adsp_dbg(dsp, "%s: timestamp %llu\n", file,
622 le64_to_cpu(footer->timestamp));
623
624 while (pos < firmware->size &&
625 pos - firmware->size > sizeof(*region)) {
626 region = (void *)&(firmware->data[pos]);
627 region_name = "Unknown";
628 reg = 0;
629 text = NULL;
630 offset = le32_to_cpu(region->offset) & 0xffffff;
631 type = be32_to_cpu(region->type) & 0xff;
632 mem = wm_adsp_find_region(dsp, type);
633
634 switch (type) {
635 case WMFW_NAME_TEXT:
636 region_name = "Firmware name";
637 text = kzalloc(le32_to_cpu(region->len) + 1,
638 GFP_KERNEL);
639 break;
640 case WMFW_INFO_TEXT:
641 region_name = "Information";
642 text = kzalloc(le32_to_cpu(region->len) + 1,
643 GFP_KERNEL);
644 break;
645 case WMFW_ABSOLUTE:
646 region_name = "Absolute";
647 reg = offset;
648 break;
649 case WMFW_ADSP1_PM:
650 region_name = "PM";
651 reg = wm_adsp_region_to_reg(mem, offset);
652 break;
653 case WMFW_ADSP1_DM:
654 region_name = "DM";
655 reg = wm_adsp_region_to_reg(mem, offset);
656 break;
657 case WMFW_ADSP2_XM:
658 region_name = "XM";
659 reg = wm_adsp_region_to_reg(mem, offset);
660 break;
661 case WMFW_ADSP2_YM:
662 region_name = "YM";
663 reg = wm_adsp_region_to_reg(mem, offset);
664 break;
665 case WMFW_ADSP1_ZM:
666 region_name = "ZM";
667 reg = wm_adsp_region_to_reg(mem, offset);
668 break;
669 default:
670 adsp_warn(dsp,
671 "%s.%d: Unknown region type %x at %d(%x)\n",
672 file, regions, type, pos, pos);
673 break;
674 }
675
676 adsp_dbg(dsp, "%s.%d: %d bytes at %d in %s\n", file,
677 regions, le32_to_cpu(region->len), offset,
678 region_name);
679
680 if (text) {
681 memcpy(text, region->data, le32_to_cpu(region->len));
682 adsp_info(dsp, "%s: %s\n", file, text);
683 kfree(text);
684 }
685
686 if (reg) {
687 size_t to_write = PAGE_SIZE;
688 size_t remain = le32_to_cpu(region->len);
689 const u8 *data = region->data;
690
691 while (remain > 0) {
692 if (remain < PAGE_SIZE)
693 to_write = remain;
694
695 buf = wm_adsp_buf_alloc(data,
696 to_write,
697 &buf_list);
698 if (!buf) {
699 adsp_err(dsp, "Out of memory\n");
700 ret = -ENOMEM;
701 goto out_fw;
702 }
703
704 ret = regmap_raw_write_async(regmap, reg,
705 buf->buf,
706 to_write);
707 if (ret != 0) {
708 adsp_err(dsp,
709 "%s.%d: Failed to write %zd bytes at %d in %s: %d\n",
710 file, regions,
711 to_write, offset,
712 region_name, ret);
713 goto out_fw;
714 }
715
716 data += to_write;
717 reg += to_write / 2;
718 remain -= to_write;
719 }
720 }
721
722 pos += le32_to_cpu(region->len) + sizeof(*region);
723 regions++;
724 }
725
726 ret = regmap_async_complete(regmap);
727 if (ret != 0) {
728 adsp_err(dsp, "Failed to complete async write: %d\n", ret);
729 goto out_fw;
730 }
731
732 if (pos > firmware->size)
733 adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n",
734 file, regions, pos - firmware->size);
735
736out_fw:
737 regmap_async_complete(regmap);
738 wm_adsp_buf_free(&buf_list);
739 release_firmware(firmware);
740out:
741 kfree(file);
742
743 return ret;
744}
745
746static int wm_coeff_init_control_caches(struct wm_adsp *adsp)
747{
748 struct wm_coeff_ctl *ctl;
749 int ret;
750
751 list_for_each_entry(ctl, &adsp->ctl_list, list) {
752 if (!ctl->enabled || ctl->set)
753 continue;
754 ret = wm_coeff_read_control(ctl->kcontrol,
755 ctl->cache,
756 ctl->len);
757 if (ret < 0)
758 return ret;
759 }
760
761 return 0;
762}
763
764static int wm_coeff_sync_controls(struct wm_adsp *adsp)
765{
766 struct wm_coeff_ctl *ctl;
767 int ret;
768
769 list_for_each_entry(ctl, &adsp->ctl_list, list) {
770 if (!ctl->enabled)
771 continue;
772 if (ctl->set) {
773 ret = wm_coeff_write_control(ctl->kcontrol,
774 ctl->cache,
775 ctl->len);
776 if (ret < 0)
777 return ret;
778 }
779 }
780
781 return 0;
782}
783
784static void wm_adsp_ctl_work(struct work_struct *work)
785{
786 struct wmfw_ctl_work *ctl_work = container_of(work,
787 struct wmfw_ctl_work,
788 work);
789
790 wmfw_add_ctl(ctl_work->adsp, ctl_work->ctl);
791 kfree(ctl_work);
792}
793
794static int wm_adsp_create_control(struct wm_adsp *dsp,
795 const struct wm_adsp_alg_region *region)
796
797{
798 struct wm_coeff_ctl *ctl;
799 struct wmfw_ctl_work *ctl_work;
800 char *name;
801 char *region_name;
802 int ret;
803
804 name = kmalloc(PAGE_SIZE, GFP_KERNEL);
805 if (!name)
806 return -ENOMEM;
807
808 switch (region->type) {
809 case WMFW_ADSP1_PM:
810 region_name = "PM";
811 break;
812 case WMFW_ADSP1_DM:
813 region_name = "DM";
814 break;
815 case WMFW_ADSP2_XM:
816 region_name = "XM";
817 break;
818 case WMFW_ADSP2_YM:
819 region_name = "YM";
820 break;
821 case WMFW_ADSP1_ZM:
822 region_name = "ZM";
823 break;
824 default:
825 ret = -EINVAL;
826 goto err_name;
827 }
828
829 snprintf(name, PAGE_SIZE, "DSP%d %s %x",
830 dsp->num, region_name, region->alg);
831
832 list_for_each_entry(ctl, &dsp->ctl_list,
833 list) {
834 if (!strcmp(ctl->name, name)) {
835 if (!ctl->enabled)
836 ctl->enabled = 1;
837 goto found;
838 }
839 }
840
841 ctl = kzalloc(sizeof(*ctl), GFP_KERNEL);
842 if (!ctl) {
843 ret = -ENOMEM;
844 goto err_name;
845 }
846 ctl->region = *region;
847 ctl->name = kmemdup(name, strlen(name) + 1, GFP_KERNEL);
848 if (!ctl->name) {
849 ret = -ENOMEM;
850 goto err_ctl;
851 }
852 ctl->enabled = 1;
853 ctl->set = 0;
854 ctl->ops.xget = wm_coeff_get;
855 ctl->ops.xput = wm_coeff_put;
856 ctl->adsp = dsp;
857
858 ctl->len = region->len;
859 ctl->cache = kzalloc(ctl->len, GFP_KERNEL);
860 if (!ctl->cache) {
861 ret = -ENOMEM;
862 goto err_ctl_name;
863 }
864
865 ctl_work = kzalloc(sizeof(*ctl_work), GFP_KERNEL);
866 if (!ctl_work) {
867 ret = -ENOMEM;
868 goto err_ctl_cache;
869 }
870
871 ctl_work->adsp = dsp;
872 ctl_work->ctl = ctl;
873 INIT_WORK(&ctl_work->work, wm_adsp_ctl_work);
874 schedule_work(&ctl_work->work);
875
876found:
877 kfree(name);
878
879 return 0;
880
881err_ctl_cache:
882 kfree(ctl->cache);
883err_ctl_name:
884 kfree(ctl->name);
885err_ctl:
886 kfree(ctl);
887err_name:
888 kfree(name);
889 return ret;
890}
891
892static int wm_adsp_setup_algs(struct wm_adsp *dsp)
893{
894 struct regmap *regmap = dsp->regmap;
895 struct wmfw_adsp1_id_hdr adsp1_id;
896 struct wmfw_adsp2_id_hdr adsp2_id;
897 struct wmfw_adsp1_alg_hdr *adsp1_alg;
898 struct wmfw_adsp2_alg_hdr *adsp2_alg;
899 void *alg, *buf;
900 struct wm_adsp_alg_region *region;
901 const struct wm_adsp_region *mem;
902 unsigned int pos, term;
903 size_t algs, buf_size;
904 __be32 val;
905 int i, ret;
906
907 switch (dsp->type) {
908 case WMFW_ADSP1:
909 mem = wm_adsp_find_region(dsp, WMFW_ADSP1_DM);
910 break;
911 case WMFW_ADSP2:
912 mem = wm_adsp_find_region(dsp, WMFW_ADSP2_XM);
913 break;
914 default:
915 mem = NULL;
916 break;
917 }
918
919 if (WARN_ON(!mem))
920 return -EINVAL;
921
922 switch (dsp->type) {
923 case WMFW_ADSP1:
924 ret = regmap_raw_read(regmap, mem->base, &adsp1_id,
925 sizeof(adsp1_id));
926 if (ret != 0) {
927 adsp_err(dsp, "Failed to read algorithm info: %d\n",
928 ret);
929 return ret;
930 }
931
932 buf = &adsp1_id;
933 buf_size = sizeof(adsp1_id);
934
935 algs = be32_to_cpu(adsp1_id.algs);
936 dsp->fw_id = be32_to_cpu(adsp1_id.fw.id);
937 adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n",
938 dsp->fw_id,
939 (be32_to_cpu(adsp1_id.fw.ver) & 0xff0000) >> 16,
940 (be32_to_cpu(adsp1_id.fw.ver) & 0xff00) >> 8,
941 be32_to_cpu(adsp1_id.fw.ver) & 0xff,
942 algs);
943
944 region = kzalloc(sizeof(*region), GFP_KERNEL);
945 if (!region)
946 return -ENOMEM;
947 region->type = WMFW_ADSP1_ZM;
948 region->alg = be32_to_cpu(adsp1_id.fw.id);
949 region->base = be32_to_cpu(adsp1_id.zm);
950 list_add_tail(®ion->list, &dsp->alg_regions);
951
952 region = kzalloc(sizeof(*region), GFP_KERNEL);
953 if (!region)
954 return -ENOMEM;
955 region->type = WMFW_ADSP1_DM;
956 region->alg = be32_to_cpu(adsp1_id.fw.id);
957 region->base = be32_to_cpu(adsp1_id.dm);
958 list_add_tail(®ion->list, &dsp->alg_regions);
959
960 pos = sizeof(adsp1_id) / 2;
961 term = pos + ((sizeof(*adsp1_alg) * algs) / 2);
962 break;
963
964 case WMFW_ADSP2:
965 ret = regmap_raw_read(regmap, mem->base, &adsp2_id,
966 sizeof(adsp2_id));
967 if (ret != 0) {
968 adsp_err(dsp, "Failed to read algorithm info: %d\n",
969 ret);
970 return ret;
971 }
972
973 buf = &adsp2_id;
974 buf_size = sizeof(adsp2_id);
975
976 algs = be32_to_cpu(adsp2_id.algs);
977 dsp->fw_id = be32_to_cpu(adsp2_id.fw.id);
978 adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n",
979 dsp->fw_id,
980 (be32_to_cpu(adsp2_id.fw.ver) & 0xff0000) >> 16,
981 (be32_to_cpu(adsp2_id.fw.ver) & 0xff00) >> 8,
982 be32_to_cpu(adsp2_id.fw.ver) & 0xff,
983 algs);
984
985 region = kzalloc(sizeof(*region), GFP_KERNEL);
986 if (!region)
987 return -ENOMEM;
988 region->type = WMFW_ADSP2_XM;
989 region->alg = be32_to_cpu(adsp2_id.fw.id);
990 region->base = be32_to_cpu(adsp2_id.xm);
991 list_add_tail(®ion->list, &dsp->alg_regions);
992
993 region = kzalloc(sizeof(*region), GFP_KERNEL);
994 if (!region)
995 return -ENOMEM;
996 region->type = WMFW_ADSP2_YM;
997 region->alg = be32_to_cpu(adsp2_id.fw.id);
998 region->base = be32_to_cpu(adsp2_id.ym);
999 list_add_tail(®ion->list, &dsp->alg_regions);
1000
1001 region = kzalloc(sizeof(*region), GFP_KERNEL);
1002 if (!region)
1003 return -ENOMEM;
1004 region->type = WMFW_ADSP2_ZM;
1005 region->alg = be32_to_cpu(adsp2_id.fw.id);
1006 region->base = be32_to_cpu(adsp2_id.zm);
1007 list_add_tail(®ion->list, &dsp->alg_regions);
1008
1009 pos = sizeof(adsp2_id) / 2;
1010 term = pos + ((sizeof(*adsp2_alg) * algs) / 2);
1011 break;
1012
1013 default:
1014 WARN(1, "Unknown DSP type");
1015 return -EINVAL;
1016 }
1017
1018 if (algs == 0) {
1019 adsp_err(dsp, "No algorithms\n");
1020 return -EINVAL;
1021 }
1022
1023 if (algs > 1024) {
1024 adsp_err(dsp, "Algorithm count %zx excessive\n", algs);
1025 print_hex_dump_bytes(dev_name(dsp->dev), DUMP_PREFIX_OFFSET,
1026 buf, buf_size);
1027 return -EINVAL;
1028 }
1029
1030 /* Read the terminator first to validate the length */
1031 ret = regmap_raw_read(regmap, mem->base + term, &val, sizeof(val));
1032 if (ret != 0) {
1033 adsp_err(dsp, "Failed to read algorithm list end: %d\n",
1034 ret);
1035 return ret;
1036 }
1037
1038 if (be32_to_cpu(val) != 0xbedead)
1039 adsp_warn(dsp, "Algorithm list end %x 0x%x != 0xbeadead\n",
1040 term, be32_to_cpu(val));
1041
1042 alg = kzalloc((term - pos) * 2, GFP_KERNEL | GFP_DMA);
1043 if (!alg)
1044 return -ENOMEM;
1045
1046 ret = regmap_raw_read(regmap, mem->base + pos, alg, (term - pos) * 2);
1047 if (ret != 0) {
1048 adsp_err(dsp, "Failed to read algorithm list: %d\n",
1049 ret);
1050 goto out;
1051 }
1052
1053 adsp1_alg = alg;
1054 adsp2_alg = alg;
1055
1056 for (i = 0; i < algs; i++) {
1057 switch (dsp->type) {
1058 case WMFW_ADSP1:
1059 adsp_info(dsp, "%d: ID %x v%d.%d.%d DM@%x ZM@%x\n",
1060 i, be32_to_cpu(adsp1_alg[i].alg.id),
1061 (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff0000) >> 16,
1062 (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff00) >> 8,
1063 be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff,
1064 be32_to_cpu(adsp1_alg[i].dm),
1065 be32_to_cpu(adsp1_alg[i].zm));
1066
1067 region = kzalloc(sizeof(*region), GFP_KERNEL);
1068 if (!region)
1069 return -ENOMEM;
1070 region->type = WMFW_ADSP1_DM;
1071 region->alg = be32_to_cpu(adsp1_alg[i].alg.id);
1072 region->base = be32_to_cpu(adsp1_alg[i].dm);
1073 region->len = 0;
1074 list_add_tail(®ion->list, &dsp->alg_regions);
1075 if (i + 1 < algs) {
1076 region->len = be32_to_cpu(adsp1_alg[i + 1].dm);
1077 region->len -= be32_to_cpu(adsp1_alg[i].dm);
1078 region->len *= 4;
1079 wm_adsp_create_control(dsp, region);
1080 } else {
1081 adsp_warn(dsp, "Missing length info for region DM with ID %x\n",
1082 be32_to_cpu(adsp1_alg[i].alg.id));
1083 }
1084
1085 region = kzalloc(sizeof(*region), GFP_KERNEL);
1086 if (!region)
1087 return -ENOMEM;
1088 region->type = WMFW_ADSP1_ZM;
1089 region->alg = be32_to_cpu(adsp1_alg[i].alg.id);
1090 region->base = be32_to_cpu(adsp1_alg[i].zm);
1091 region->len = 0;
1092 list_add_tail(®ion->list, &dsp->alg_regions);
1093 if (i + 1 < algs) {
1094 region->len = be32_to_cpu(adsp1_alg[i + 1].zm);
1095 region->len -= be32_to_cpu(adsp1_alg[i].zm);
1096 region->len *= 4;
1097 wm_adsp_create_control(dsp, region);
1098 } else {
1099 adsp_warn(dsp, "Missing length info for region ZM with ID %x\n",
1100 be32_to_cpu(adsp1_alg[i].alg.id));
1101 }
1102 break;
1103
1104 case WMFW_ADSP2:
1105 adsp_info(dsp,
1106 "%d: ID %x v%d.%d.%d XM@%x YM@%x ZM@%x\n",
1107 i, be32_to_cpu(adsp2_alg[i].alg.id),
1108 (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff0000) >> 16,
1109 (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff00) >> 8,
1110 be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff,
1111 be32_to_cpu(adsp2_alg[i].xm),
1112 be32_to_cpu(adsp2_alg[i].ym),
1113 be32_to_cpu(adsp2_alg[i].zm));
1114
1115 region = kzalloc(sizeof(*region), GFP_KERNEL);
1116 if (!region)
1117 return -ENOMEM;
1118 region->type = WMFW_ADSP2_XM;
1119 region->alg = be32_to_cpu(adsp2_alg[i].alg.id);
1120 region->base = be32_to_cpu(adsp2_alg[i].xm);
1121 region->len = 0;
1122 list_add_tail(®ion->list, &dsp->alg_regions);
1123 if (i + 1 < algs) {
1124 region->len = be32_to_cpu(adsp2_alg[i + 1].xm);
1125 region->len -= be32_to_cpu(adsp2_alg[i].xm);
1126 region->len *= 4;
1127 wm_adsp_create_control(dsp, region);
1128 } else {
1129 adsp_warn(dsp, "Missing length info for region XM with ID %x\n",
1130 be32_to_cpu(adsp2_alg[i].alg.id));
1131 }
1132
1133 region = kzalloc(sizeof(*region), GFP_KERNEL);
1134 if (!region)
1135 return -ENOMEM;
1136 region->type = WMFW_ADSP2_YM;
1137 region->alg = be32_to_cpu(adsp2_alg[i].alg.id);
1138 region->base = be32_to_cpu(adsp2_alg[i].ym);
1139 region->len = 0;
1140 list_add_tail(®ion->list, &dsp->alg_regions);
1141 if (i + 1 < algs) {
1142 region->len = be32_to_cpu(adsp2_alg[i + 1].ym);
1143 region->len -= be32_to_cpu(adsp2_alg[i].ym);
1144 region->len *= 4;
1145 wm_adsp_create_control(dsp, region);
1146 } else {
1147 adsp_warn(dsp, "Missing length info for region YM with ID %x\n",
1148 be32_to_cpu(adsp2_alg[i].alg.id));
1149 }
1150
1151 region = kzalloc(sizeof(*region), GFP_KERNEL);
1152 if (!region)
1153 return -ENOMEM;
1154 region->type = WMFW_ADSP2_ZM;
1155 region->alg = be32_to_cpu(adsp2_alg[i].alg.id);
1156 region->base = be32_to_cpu(adsp2_alg[i].zm);
1157 region->len = 0;
1158 list_add_tail(®ion->list, &dsp->alg_regions);
1159 if (i + 1 < algs) {
1160 region->len = be32_to_cpu(adsp2_alg[i + 1].zm);
1161 region->len -= be32_to_cpu(adsp2_alg[i].zm);
1162 region->len *= 4;
1163 wm_adsp_create_control(dsp, region);
1164 } else {
1165 adsp_warn(dsp, "Missing length info for region ZM with ID %x\n",
1166 be32_to_cpu(adsp2_alg[i].alg.id));
1167 }
1168 break;
1169 }
1170 }
1171
1172out:
1173 kfree(alg);
1174 return ret;
1175}
1176
1177static int wm_adsp_load_coeff(struct wm_adsp *dsp)
1178{
1179 LIST_HEAD(buf_list);
1180 struct regmap *regmap = dsp->regmap;
1181 struct wmfw_coeff_hdr *hdr;
1182 struct wmfw_coeff_item *blk;
1183 const struct firmware *firmware;
1184 const struct wm_adsp_region *mem;
1185 struct wm_adsp_alg_region *alg_region;
1186 const char *region_name;
1187 int ret, pos, blocks, type, offset, reg;
1188 char *file;
1189 struct wm_adsp_buf *buf;
1190 int tmp;
1191
1192 file = kzalloc(PAGE_SIZE, GFP_KERNEL);
1193 if (file == NULL)
1194 return -ENOMEM;
1195
1196 snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.bin", dsp->part, dsp->num,
1197 wm_adsp_fw[dsp->fw].file);
1198 file[PAGE_SIZE - 1] = '\0';
1199
1200 ret = request_firmware(&firmware, file, dsp->dev);
1201 if (ret != 0) {
1202 adsp_warn(dsp, "Failed to request '%s'\n", file);
1203 ret = 0;
1204 goto out;
1205 }
1206 ret = -EINVAL;
1207
1208 if (sizeof(*hdr) >= firmware->size) {
1209 adsp_err(dsp, "%s: file too short, %zu bytes\n",
1210 file, firmware->size);
1211 goto out_fw;
1212 }
1213
1214 hdr = (void*)&firmware->data[0];
1215 if (memcmp(hdr->magic, "WMDR", 4) != 0) {
1216 adsp_err(dsp, "%s: invalid magic\n", file);
1217 goto out_fw;
1218 }
1219
1220 switch (be32_to_cpu(hdr->rev) & 0xff) {
1221 case 1:
1222 break;
1223 default:
1224 adsp_err(dsp, "%s: Unsupported coefficient file format %d\n",
1225 file, be32_to_cpu(hdr->rev) & 0xff);
1226 ret = -EINVAL;
1227 goto out_fw;
1228 }
1229
1230 adsp_dbg(dsp, "%s: v%d.%d.%d\n", file,
1231 (le32_to_cpu(hdr->ver) >> 16) & 0xff,
1232 (le32_to_cpu(hdr->ver) >> 8) & 0xff,
1233 le32_to_cpu(hdr->ver) & 0xff);
1234
1235 pos = le32_to_cpu(hdr->len);
1236
1237 blocks = 0;
1238 while (pos < firmware->size &&
1239 pos - firmware->size > sizeof(*blk)) {
1240 blk = (void*)(&firmware->data[pos]);
1241
1242 type = le16_to_cpu(blk->type);
1243 offset = le16_to_cpu(blk->offset);
1244
1245 adsp_dbg(dsp, "%s.%d: %x v%d.%d.%d\n",
1246 file, blocks, le32_to_cpu(blk->id),
1247 (le32_to_cpu(blk->ver) >> 16) & 0xff,
1248 (le32_to_cpu(blk->ver) >> 8) & 0xff,
1249 le32_to_cpu(blk->ver) & 0xff);
1250 adsp_dbg(dsp, "%s.%d: %d bytes at 0x%x in %x\n",
1251 file, blocks, le32_to_cpu(blk->len), offset, type);
1252
1253 reg = 0;
1254 region_name = "Unknown";
1255 switch (type) {
1256 case (WMFW_NAME_TEXT << 8):
1257 case (WMFW_INFO_TEXT << 8):
1258 break;
1259 case (WMFW_ABSOLUTE << 8):
1260 /*
1261 * Old files may use this for global
1262 * coefficients.
1263 */
1264 if (le32_to_cpu(blk->id) == dsp->fw_id &&
1265 offset == 0) {
1266 region_name = "global coefficients";
1267 mem = wm_adsp_find_region(dsp, type);
1268 if (!mem) {
1269 adsp_err(dsp, "No ZM\n");
1270 break;
1271 }
1272 reg = wm_adsp_region_to_reg(mem, 0);
1273
1274 } else {
1275 region_name = "register";
1276 reg = offset;
1277 }
1278 break;
1279
1280 case WMFW_ADSP1_DM:
1281 case WMFW_ADSP1_ZM:
1282 case WMFW_ADSP2_XM:
1283 case WMFW_ADSP2_YM:
1284 adsp_dbg(dsp, "%s.%d: %d bytes in %x for %x\n",
1285 file, blocks, le32_to_cpu(blk->len),
1286 type, le32_to_cpu(blk->id));
1287
1288 mem = wm_adsp_find_region(dsp, type);
1289 if (!mem) {
1290 adsp_err(dsp, "No base for region %x\n", type);
1291 break;
1292 }
1293
1294 reg = 0;
1295 list_for_each_entry(alg_region,
1296 &dsp->alg_regions, list) {
1297 if (le32_to_cpu(blk->id) == alg_region->alg &&
1298 type == alg_region->type) {
1299 reg = alg_region->base;
1300 reg = wm_adsp_region_to_reg(mem,
1301 reg);
1302 reg += offset;
1303 break;
1304 }
1305 }
1306
1307 if (reg == 0)
1308 adsp_err(dsp, "No %x for algorithm %x\n",
1309 type, le32_to_cpu(blk->id));
1310 break;
1311
1312 default:
1313 adsp_err(dsp, "%s.%d: Unknown region type %x at %d\n",
1314 file, blocks, type, pos);
1315 break;
1316 }
1317
1318 if (reg) {
1319 buf = wm_adsp_buf_alloc(blk->data,
1320 le32_to_cpu(blk->len),
1321 &buf_list);
1322 if (!buf) {
1323 adsp_err(dsp, "Out of memory\n");
1324 ret = -ENOMEM;
1325 goto out_fw;
1326 }
1327
1328 adsp_dbg(dsp, "%s.%d: Writing %d bytes at %x\n",
1329 file, blocks, le32_to_cpu(blk->len),
1330 reg);
1331 ret = regmap_raw_write_async(regmap, reg, buf->buf,
1332 le32_to_cpu(blk->len));
1333 if (ret != 0) {
1334 adsp_err(dsp,
1335 "%s.%d: Failed to write to %x in %s: %d\n",
1336 file, blocks, reg, region_name, ret);
1337 }
1338 }
1339
1340 tmp = le32_to_cpu(blk->len) % 4;
1341 if (tmp)
1342 pos += le32_to_cpu(blk->len) + (4 - tmp) + sizeof(*blk);
1343 else
1344 pos += le32_to_cpu(blk->len) + sizeof(*blk);
1345
1346 blocks++;
1347 }
1348
1349 ret = regmap_async_complete(regmap);
1350 if (ret != 0)
1351 adsp_err(dsp, "Failed to complete async write: %d\n", ret);
1352
1353 if (pos > firmware->size)
1354 adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n",
1355 file, blocks, pos - firmware->size);
1356
1357out_fw:
1358 release_firmware(firmware);
1359 wm_adsp_buf_free(&buf_list);
1360out:
1361 kfree(file);
1362 return ret;
1363}
1364
1365int wm_adsp1_init(struct wm_adsp *adsp)
1366{
1367 INIT_LIST_HEAD(&adsp->alg_regions);
1368
1369 return 0;
1370}
1371EXPORT_SYMBOL_GPL(wm_adsp1_init);
1372
1373int wm_adsp1_event(struct snd_soc_dapm_widget *w,
1374 struct snd_kcontrol *kcontrol,
1375 int event)
1376{
1377 struct snd_soc_codec *codec = w->codec;
1378 struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
1379 struct wm_adsp *dsp = &dsps[w->shift];
1380 struct wm_adsp_alg_region *alg_region;
1381 struct wm_coeff_ctl *ctl;
1382 int ret;
1383 int val;
1384
1385 dsp->card = codec->card;
1386
1387 switch (event) {
1388 case SND_SOC_DAPM_POST_PMU:
1389 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
1390 ADSP1_SYS_ENA, ADSP1_SYS_ENA);
1391
1392 /*
1393 * For simplicity set the DSP clock rate to be the
1394 * SYSCLK rate rather than making it configurable.
1395 */
1396 if(dsp->sysclk_reg) {
1397 ret = regmap_read(dsp->regmap, dsp->sysclk_reg, &val);
1398 if (ret != 0) {
1399 adsp_err(dsp, "Failed to read SYSCLK state: %d\n",
1400 ret);
1401 return ret;
1402 }
1403
1404 val = (val & dsp->sysclk_mask)
1405 >> dsp->sysclk_shift;
1406
1407 ret = regmap_update_bits(dsp->regmap,
1408 dsp->base + ADSP1_CONTROL_31,
1409 ADSP1_CLK_SEL_MASK, val);
1410 if (ret != 0) {
1411 adsp_err(dsp, "Failed to set clock rate: %d\n",
1412 ret);
1413 return ret;
1414 }
1415 }
1416
1417 ret = wm_adsp_load(dsp);
1418 if (ret != 0)
1419 goto err;
1420
1421 ret = wm_adsp_setup_algs(dsp);
1422 if (ret != 0)
1423 goto err;
1424
1425 ret = wm_adsp_load_coeff(dsp);
1426 if (ret != 0)
1427 goto err;
1428
1429 /* Initialize caches for enabled and unset controls */
1430 ret = wm_coeff_init_control_caches(dsp);
1431 if (ret != 0)
1432 goto err;
1433
1434 /* Sync set controls */
1435 ret = wm_coeff_sync_controls(dsp);
1436 if (ret != 0)
1437 goto err;
1438
1439 /* Start the core running */
1440 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
1441 ADSP1_CORE_ENA | ADSP1_START,
1442 ADSP1_CORE_ENA | ADSP1_START);
1443 break;
1444
1445 case SND_SOC_DAPM_PRE_PMD:
1446 /* Halt the core */
1447 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
1448 ADSP1_CORE_ENA | ADSP1_START, 0);
1449
1450 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_19,
1451 ADSP1_WDMA_BUFFER_LENGTH_MASK, 0);
1452
1453 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
1454 ADSP1_SYS_ENA, 0);
1455
1456 list_for_each_entry(ctl, &dsp->ctl_list, list)
1457 ctl->enabled = 0;
1458
1459 while (!list_empty(&dsp->alg_regions)) {
1460 alg_region = list_first_entry(&dsp->alg_regions,
1461 struct wm_adsp_alg_region,
1462 list);
1463 list_del(&alg_region->list);
1464 kfree(alg_region);
1465 }
1466 break;
1467
1468 default:
1469 break;
1470 }
1471
1472 return 0;
1473
1474err:
1475 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
1476 ADSP1_SYS_ENA, 0);
1477 return ret;
1478}
1479EXPORT_SYMBOL_GPL(wm_adsp1_event);
1480
1481static int wm_adsp2_ena(struct wm_adsp *dsp)
1482{
1483 unsigned int val;
1484 int ret, count;
1485
1486 ret = regmap_update_bits_async(dsp->regmap, dsp->base + ADSP2_CONTROL,
1487 ADSP2_SYS_ENA, ADSP2_SYS_ENA);
1488 if (ret != 0)
1489 return ret;
1490
1491 /* Wait for the RAM to start, should be near instantaneous */
1492 for (count = 0; count < 10; ++count) {
1493 ret = regmap_read(dsp->regmap, dsp->base + ADSP2_STATUS1,
1494 &val);
1495 if (ret != 0)
1496 return ret;
1497
1498 if (val & ADSP2_RAM_RDY)
1499 break;
1500
1501 msleep(1);
1502 }
1503
1504 if (!(val & ADSP2_RAM_RDY)) {
1505 adsp_err(dsp, "Failed to start DSP RAM\n");
1506 return -EBUSY;
1507 }
1508
1509 adsp_dbg(dsp, "RAM ready after %d polls\n", count);
1510
1511 return 0;
1512}
1513
1514static void wm_adsp2_boot_work(struct work_struct *work)
1515{
1516 struct wm_adsp *dsp = container_of(work,
1517 struct wm_adsp,
1518 boot_work);
1519 int ret;
1520 unsigned int val;
1521
1522 /*
1523 * For simplicity set the DSP clock rate to be the
1524 * SYSCLK rate rather than making it configurable.
1525 */
1526 ret = regmap_read(dsp->regmap, ARIZONA_SYSTEM_CLOCK_1, &val);
1527 if (ret != 0) {
1528 adsp_err(dsp, "Failed to read SYSCLK state: %d\n", ret);
1529 return;
1530 }
1531 val = (val & ARIZONA_SYSCLK_FREQ_MASK)
1532 >> ARIZONA_SYSCLK_FREQ_SHIFT;
1533
1534 ret = regmap_update_bits_async(dsp->regmap,
1535 dsp->base + ADSP2_CLOCKING,
1536 ADSP2_CLK_SEL_MASK, val);
1537 if (ret != 0) {
1538 adsp_err(dsp, "Failed to set clock rate: %d\n", ret);
1539 return;
1540 }
1541
1542 if (dsp->dvfs) {
1543 ret = regmap_read(dsp->regmap,
1544 dsp->base + ADSP2_CLOCKING, &val);
1545 if (ret != 0) {
1546 dev_err(dsp->dev, "Failed to read clocking: %d\n", ret);
1547 return;
1548 }
1549
1550 if ((val & ADSP2_CLK_SEL_MASK) >= 3) {
1551 ret = regulator_enable(dsp->dvfs);
1552 if (ret != 0) {
1553 dev_err(dsp->dev,
1554 "Failed to enable supply: %d\n",
1555 ret);
1556 return;
1557 }
1558
1559 ret = regulator_set_voltage(dsp->dvfs,
1560 1800000,
1561 1800000);
1562 if (ret != 0) {
1563 dev_err(dsp->dev,
1564 "Failed to raise supply: %d\n",
1565 ret);
1566 return;
1567 }
1568 }
1569 }
1570
1571 ret = wm_adsp2_ena(dsp);
1572 if (ret != 0)
1573 return;
1574
1575 ret = wm_adsp_load(dsp);
1576 if (ret != 0)
1577 goto err;
1578
1579 ret = wm_adsp_setup_algs(dsp);
1580 if (ret != 0)
1581 goto err;
1582
1583 ret = wm_adsp_load_coeff(dsp);
1584 if (ret != 0)
1585 goto err;
1586
1587 /* Initialize caches for enabled and unset controls */
1588 ret = wm_coeff_init_control_caches(dsp);
1589 if (ret != 0)
1590 goto err;
1591
1592 /* Sync set controls */
1593 ret = wm_coeff_sync_controls(dsp);
1594 if (ret != 0)
1595 goto err;
1596
1597 ret = regmap_update_bits_async(dsp->regmap,
1598 dsp->base + ADSP2_CONTROL,
1599 ADSP2_CORE_ENA,
1600 ADSP2_CORE_ENA);
1601 if (ret != 0)
1602 goto err;
1603
1604 dsp->running = true;
1605
1606 return;
1607
1608err:
1609 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
1610 ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0);
1611}
1612
1613int wm_adsp2_early_event(struct snd_soc_dapm_widget *w,
1614 struct snd_kcontrol *kcontrol, int event)
1615{
1616 struct snd_soc_codec *codec = w->codec;
1617 struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
1618 struct wm_adsp *dsp = &dsps[w->shift];
1619
1620 dsp->card = codec->card;
1621
1622 switch (event) {
1623 case SND_SOC_DAPM_PRE_PMU:
1624 queue_work(system_unbound_wq, &dsp->boot_work);
1625 break;
1626 default:
1627 break;
1628 };
1629
1630 return 0;
1631}
1632EXPORT_SYMBOL_GPL(wm_adsp2_early_event);
1633
1634int wm_adsp2_event(struct snd_soc_dapm_widget *w,
1635 struct snd_kcontrol *kcontrol, int event)
1636{
1637 struct snd_soc_codec *codec = w->codec;
1638 struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
1639 struct wm_adsp *dsp = &dsps[w->shift];
1640 struct wm_adsp_alg_region *alg_region;
1641 struct wm_coeff_ctl *ctl;
1642 int ret;
1643
1644 switch (event) {
1645 case SND_SOC_DAPM_POST_PMU:
1646 flush_work(&dsp->boot_work);
1647
1648 if (!dsp->running)
1649 return -EIO;
1650
1651 ret = regmap_update_bits(dsp->regmap,
1652 dsp->base + ADSP2_CONTROL,
1653 ADSP2_START,
1654 ADSP2_START);
1655 if (ret != 0)
1656 goto err;
1657 break;
1658
1659 case SND_SOC_DAPM_PRE_PMD:
1660 dsp->running = false;
1661
1662 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
1663 ADSP2_SYS_ENA | ADSP2_CORE_ENA |
1664 ADSP2_START, 0);
1665
1666 /* Make sure DMAs are quiesced */
1667 regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_1, 0);
1668 regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_2, 0);
1669 regmap_write(dsp->regmap, dsp->base + ADSP2_RDMA_CONFIG_1, 0);
1670
1671 if (dsp->dvfs) {
1672 ret = regulator_set_voltage(dsp->dvfs, 1200000,
1673 1800000);
1674 if (ret != 0)
1675 dev_warn(dsp->dev,
1676 "Failed to lower supply: %d\n",
1677 ret);
1678
1679 ret = regulator_disable(dsp->dvfs);
1680 if (ret != 0)
1681 dev_err(dsp->dev,
1682 "Failed to enable supply: %d\n",
1683 ret);
1684 }
1685
1686 list_for_each_entry(ctl, &dsp->ctl_list, list)
1687 ctl->enabled = 0;
1688
1689 while (!list_empty(&dsp->alg_regions)) {
1690 alg_region = list_first_entry(&dsp->alg_regions,
1691 struct wm_adsp_alg_region,
1692 list);
1693 list_del(&alg_region->list);
1694 kfree(alg_region);
1695 }
1696
1697 adsp_dbg(dsp, "Shutdown complete\n");
1698 break;
1699
1700 default:
1701 break;
1702 }
1703
1704 return 0;
1705err:
1706 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
1707 ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0);
1708 return ret;
1709}
1710EXPORT_SYMBOL_GPL(wm_adsp2_event);
1711
1712int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs)
1713{
1714 int ret;
1715
1716 /*
1717 * Disable the DSP memory by default when in reset for a small
1718 * power saving.
1719 */
1720 ret = regmap_update_bits(adsp->regmap, adsp->base + ADSP2_CONTROL,
1721 ADSP2_MEM_ENA, 0);
1722 if (ret != 0) {
1723 adsp_err(adsp, "Failed to clear memory retention: %d\n", ret);
1724 return ret;
1725 }
1726
1727 INIT_LIST_HEAD(&adsp->alg_regions);
1728 INIT_LIST_HEAD(&adsp->ctl_list);
1729 INIT_WORK(&adsp->boot_work, wm_adsp2_boot_work);
1730
1731 if (dvfs) {
1732 adsp->dvfs = devm_regulator_get(adsp->dev, "DCVDD");
1733 if (IS_ERR(adsp->dvfs)) {
1734 ret = PTR_ERR(adsp->dvfs);
1735 dev_err(adsp->dev, "Failed to get DCVDD: %d\n", ret);
1736 return ret;
1737 }
1738
1739 ret = regulator_enable(adsp->dvfs);
1740 if (ret != 0) {
1741 dev_err(adsp->dev, "Failed to enable DCVDD: %d\n",
1742 ret);
1743 return ret;
1744 }
1745
1746 ret = regulator_set_voltage(adsp->dvfs, 1200000, 1800000);
1747 if (ret != 0) {
1748 dev_err(adsp->dev, "Failed to initialise DVFS: %d\n",
1749 ret);
1750 return ret;
1751 }
1752
1753 ret = regulator_disable(adsp->dvfs);
1754 if (ret != 0) {
1755 dev_err(adsp->dev, "Failed to disable DCVDD: %d\n",
1756 ret);
1757 return ret;
1758 }
1759 }
1760
1761 return 0;
1762}
1763EXPORT_SYMBOL_GPL(wm_adsp2_init);