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1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2/* QLogic qede NIC Driver
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2020 Marvell International Ltd.
5 */
6
7#include <linux/crash_dump.h>
8#include <linux/module.h>
9#include <linux/pci.h>
10#include <linux/device.h>
11#include <linux/netdevice.h>
12#include <linux/etherdevice.h>
13#include <linux/skbuff.h>
14#include <linux/errno.h>
15#include <linux/list.h>
16#include <linux/string.h>
17#include <linux/dma-mapping.h>
18#include <linux/interrupt.h>
19#include <asm/byteorder.h>
20#include <asm/param.h>
21#include <linux/io.h>
22#include <linux/netdev_features.h>
23#include <linux/udp.h>
24#include <linux/tcp.h>
25#include <net/udp_tunnel.h>
26#include <linux/ip.h>
27#include <net/ipv6.h>
28#include <net/tcp.h>
29#include <linux/if_ether.h>
30#include <linux/if_vlan.h>
31#include <linux/pkt_sched.h>
32#include <linux/ethtool.h>
33#include <linux/in.h>
34#include <linux/random.h>
35#include <net/ip6_checksum.h>
36#include <linux/bitops.h>
37#include <linux/vmalloc.h>
38#include "qede.h"
39#include "qede_ptp.h"
40
41MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
42MODULE_LICENSE("GPL");
43
44static uint debug;
45module_param(debug, uint, 0);
46MODULE_PARM_DESC(debug, " Default debug msglevel");
47
48static const struct qed_eth_ops *qed_ops;
49
50#define CHIP_NUM_57980S_40 0x1634
51#define CHIP_NUM_57980S_10 0x1666
52#define CHIP_NUM_57980S_MF 0x1636
53#define CHIP_NUM_57980S_100 0x1644
54#define CHIP_NUM_57980S_50 0x1654
55#define CHIP_NUM_57980S_25 0x1656
56#define CHIP_NUM_57980S_IOV 0x1664
57#define CHIP_NUM_AH 0x8070
58#define CHIP_NUM_AH_IOV 0x8090
59
60#ifndef PCI_DEVICE_ID_NX2_57980E
61#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
62#define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
63#define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
64#define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
65#define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
66#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
67#define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV
68#define PCI_DEVICE_ID_AH CHIP_NUM_AH
69#define PCI_DEVICE_ID_AH_IOV CHIP_NUM_AH_IOV
70
71#endif
72
73enum qede_pci_private {
74 QEDE_PRIVATE_PF,
75 QEDE_PRIVATE_VF
76};
77
78static const struct pci_device_id qede_pci_tbl[] = {
79 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF},
80 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF},
81 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF},
82 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
83 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
84 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
85#ifdef CONFIG_QED_SRIOV
86 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
87#endif
88 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH), QEDE_PRIVATE_PF},
89#ifdef CONFIG_QED_SRIOV
90 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH_IOV), QEDE_PRIVATE_VF},
91#endif
92 { 0 }
93};
94
95MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
96
97static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
98static pci_ers_result_t
99qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state);
100
101#define TX_TIMEOUT (5 * HZ)
102
103/* Utilize last protocol index for XDP */
104#define XDP_PI 11
105
106static void qede_remove(struct pci_dev *pdev);
107static void qede_shutdown(struct pci_dev *pdev);
108static void qede_link_update(void *dev, struct qed_link_output *link);
109static void qede_schedule_recovery_handler(void *dev);
110static void qede_recovery_handler(struct qede_dev *edev);
111static void qede_schedule_hw_err_handler(void *dev,
112 enum qed_hw_err_type err_type);
113static void qede_get_eth_tlv_data(void *edev, void *data);
114static void qede_get_generic_tlv_data(void *edev,
115 struct qed_generic_tlvs *data);
116static void qede_generic_hw_err_handler(struct qede_dev *edev);
117#ifdef CONFIG_QED_SRIOV
118static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos,
119 __be16 vlan_proto)
120{
121 struct qede_dev *edev = netdev_priv(ndev);
122
123 if (vlan > 4095) {
124 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan);
125 return -EINVAL;
126 }
127
128 if (vlan_proto != htons(ETH_P_8021Q))
129 return -EPROTONOSUPPORT;
130
131 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n",
132 vlan, vf);
133
134 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf);
135}
136
137static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac)
138{
139 struct qede_dev *edev = netdev_priv(ndev);
140
141 DP_VERBOSE(edev, QED_MSG_IOV, "Setting MAC %pM to VF [%d]\n", mac, vfidx);
142
143 if (!is_valid_ether_addr(mac)) {
144 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n");
145 return -EINVAL;
146 }
147
148 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx);
149}
150
151static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)
152{
153 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev));
154 struct qed_dev_info *qed_info = &edev->dev_info.common;
155 struct qed_update_vport_params *vport_params;
156 int rc;
157
158 vport_params = vzalloc(sizeof(*vport_params));
159 if (!vport_params)
160 return -ENOMEM;
161 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param);
162
163 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param);
164
165 /* Enable/Disable Tx switching for PF */
166 if ((rc == num_vfs_param) && netif_running(edev->ndev) &&
167 !qed_info->b_inter_pf_switch && qed_info->tx_switching) {
168 vport_params->vport_id = 0;
169 vport_params->update_tx_switching_flg = 1;
170 vport_params->tx_switching_flg = num_vfs_param ? 1 : 0;
171 edev->ops->vport_update(edev->cdev, vport_params);
172 }
173
174 vfree(vport_params);
175 return rc;
176}
177#endif
178
179static int __maybe_unused qede_suspend(struct device *dev)
180{
181 dev_info(dev, "Device does not support suspend operation\n");
182
183 return -EOPNOTSUPP;
184}
185
186static DEFINE_SIMPLE_DEV_PM_OPS(qede_pm_ops, qede_suspend, NULL);
187
188static const struct pci_error_handlers qede_err_handler = {
189 .error_detected = qede_io_error_detected,
190};
191
192static struct pci_driver qede_pci_driver = {
193 .name = "qede",
194 .id_table = qede_pci_tbl,
195 .probe = qede_probe,
196 .remove = qede_remove,
197 .shutdown = qede_shutdown,
198#ifdef CONFIG_QED_SRIOV
199 .sriov_configure = qede_sriov_configure,
200#endif
201 .err_handler = &qede_err_handler,
202 .driver.pm = &qede_pm_ops,
203};
204
205static struct qed_eth_cb_ops qede_ll_ops = {
206 {
207#ifdef CONFIG_RFS_ACCEL
208 .arfs_filter_op = qede_arfs_filter_op,
209#endif
210 .link_update = qede_link_update,
211 .schedule_recovery_handler = qede_schedule_recovery_handler,
212 .schedule_hw_err_handler = qede_schedule_hw_err_handler,
213 .get_generic_tlv_data = qede_get_generic_tlv_data,
214 .get_protocol_tlv_data = qede_get_eth_tlv_data,
215 },
216 .force_mac = qede_force_mac,
217 .ports_update = qede_udp_ports_update,
218};
219
220static int qede_netdev_event(struct notifier_block *this, unsigned long event,
221 void *ptr)
222{
223 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
224 struct ethtool_drvinfo drvinfo;
225 struct qede_dev *edev;
226
227 if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR)
228 goto done;
229
230 /* Check whether this is a qede device */
231 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
232 goto done;
233
234 memset(&drvinfo, 0, sizeof(drvinfo));
235 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
236 if (strcmp(drvinfo.driver, "qede"))
237 goto done;
238 edev = netdev_priv(ndev);
239
240 switch (event) {
241 case NETDEV_CHANGENAME:
242 /* Notify qed of the name change */
243 if (!edev->ops || !edev->ops->common)
244 goto done;
245 edev->ops->common->set_name(edev->cdev, edev->ndev->name);
246 break;
247 case NETDEV_CHANGEADDR:
248 edev = netdev_priv(ndev);
249 qede_rdma_event_changeaddr(edev);
250 break;
251 }
252
253done:
254 return NOTIFY_DONE;
255}
256
257static struct notifier_block qede_netdev_notifier = {
258 .notifier_call = qede_netdev_event,
259};
260
261static
262int __init qede_init(void)
263{
264 int ret;
265
266 pr_info("qede init: QLogic FastLinQ 4xxxx Ethernet Driver qede\n");
267
268 qede_forced_speed_maps_init();
269
270 qed_ops = qed_get_eth_ops();
271 if (!qed_ops) {
272 pr_notice("Failed to get qed ethtool operations\n");
273 return -EINVAL;
274 }
275
276 /* Must register notifier before pci ops, since we might miss
277 * interface rename after pci probe and netdev registration.
278 */
279 ret = register_netdevice_notifier(&qede_netdev_notifier);
280 if (ret) {
281 pr_notice("Failed to register netdevice_notifier\n");
282 qed_put_eth_ops();
283 return -EINVAL;
284 }
285
286 ret = pci_register_driver(&qede_pci_driver);
287 if (ret) {
288 pr_notice("Failed to register driver\n");
289 unregister_netdevice_notifier(&qede_netdev_notifier);
290 qed_put_eth_ops();
291 return -EINVAL;
292 }
293
294 return 0;
295}
296
297static void __exit qede_cleanup(void)
298{
299 if (debug & QED_LOG_INFO_MASK)
300 pr_info("qede_cleanup called\n");
301
302 unregister_netdevice_notifier(&qede_netdev_notifier);
303 pci_unregister_driver(&qede_pci_driver);
304 qed_put_eth_ops();
305}
306
307module_init(qede_init);
308module_exit(qede_cleanup);
309
310static int qede_open(struct net_device *ndev);
311static int qede_close(struct net_device *ndev);
312
313void qede_fill_by_demand_stats(struct qede_dev *edev)
314{
315 struct qede_stats_common *p_common = &edev->stats.common;
316 struct qed_eth_stats stats;
317
318 edev->ops->get_vport_stats(edev->cdev, &stats);
319
320 spin_lock(&edev->stats_lock);
321
322 p_common->no_buff_discards = stats.common.no_buff_discards;
323 p_common->packet_too_big_discard = stats.common.packet_too_big_discard;
324 p_common->ttl0_discard = stats.common.ttl0_discard;
325 p_common->rx_ucast_bytes = stats.common.rx_ucast_bytes;
326 p_common->rx_mcast_bytes = stats.common.rx_mcast_bytes;
327 p_common->rx_bcast_bytes = stats.common.rx_bcast_bytes;
328 p_common->rx_ucast_pkts = stats.common.rx_ucast_pkts;
329 p_common->rx_mcast_pkts = stats.common.rx_mcast_pkts;
330 p_common->rx_bcast_pkts = stats.common.rx_bcast_pkts;
331 p_common->mftag_filter_discards = stats.common.mftag_filter_discards;
332 p_common->mac_filter_discards = stats.common.mac_filter_discards;
333 p_common->gft_filter_drop = stats.common.gft_filter_drop;
334
335 p_common->tx_ucast_bytes = stats.common.tx_ucast_bytes;
336 p_common->tx_mcast_bytes = stats.common.tx_mcast_bytes;
337 p_common->tx_bcast_bytes = stats.common.tx_bcast_bytes;
338 p_common->tx_ucast_pkts = stats.common.tx_ucast_pkts;
339 p_common->tx_mcast_pkts = stats.common.tx_mcast_pkts;
340 p_common->tx_bcast_pkts = stats.common.tx_bcast_pkts;
341 p_common->tx_err_drop_pkts = stats.common.tx_err_drop_pkts;
342 p_common->coalesced_pkts = stats.common.tpa_coalesced_pkts;
343 p_common->coalesced_events = stats.common.tpa_coalesced_events;
344 p_common->coalesced_aborts_num = stats.common.tpa_aborts_num;
345 p_common->non_coalesced_pkts = stats.common.tpa_not_coalesced_pkts;
346 p_common->coalesced_bytes = stats.common.tpa_coalesced_bytes;
347
348 p_common->rx_64_byte_packets = stats.common.rx_64_byte_packets;
349 p_common->rx_65_to_127_byte_packets =
350 stats.common.rx_65_to_127_byte_packets;
351 p_common->rx_128_to_255_byte_packets =
352 stats.common.rx_128_to_255_byte_packets;
353 p_common->rx_256_to_511_byte_packets =
354 stats.common.rx_256_to_511_byte_packets;
355 p_common->rx_512_to_1023_byte_packets =
356 stats.common.rx_512_to_1023_byte_packets;
357 p_common->rx_1024_to_1518_byte_packets =
358 stats.common.rx_1024_to_1518_byte_packets;
359 p_common->rx_crc_errors = stats.common.rx_crc_errors;
360 p_common->rx_mac_crtl_frames = stats.common.rx_mac_crtl_frames;
361 p_common->rx_pause_frames = stats.common.rx_pause_frames;
362 p_common->rx_pfc_frames = stats.common.rx_pfc_frames;
363 p_common->rx_align_errors = stats.common.rx_align_errors;
364 p_common->rx_carrier_errors = stats.common.rx_carrier_errors;
365 p_common->rx_oversize_packets = stats.common.rx_oversize_packets;
366 p_common->rx_jabbers = stats.common.rx_jabbers;
367 p_common->rx_undersize_packets = stats.common.rx_undersize_packets;
368 p_common->rx_fragments = stats.common.rx_fragments;
369 p_common->tx_64_byte_packets = stats.common.tx_64_byte_packets;
370 p_common->tx_65_to_127_byte_packets =
371 stats.common.tx_65_to_127_byte_packets;
372 p_common->tx_128_to_255_byte_packets =
373 stats.common.tx_128_to_255_byte_packets;
374 p_common->tx_256_to_511_byte_packets =
375 stats.common.tx_256_to_511_byte_packets;
376 p_common->tx_512_to_1023_byte_packets =
377 stats.common.tx_512_to_1023_byte_packets;
378 p_common->tx_1024_to_1518_byte_packets =
379 stats.common.tx_1024_to_1518_byte_packets;
380 p_common->tx_pause_frames = stats.common.tx_pause_frames;
381 p_common->tx_pfc_frames = stats.common.tx_pfc_frames;
382 p_common->brb_truncates = stats.common.brb_truncates;
383 p_common->brb_discards = stats.common.brb_discards;
384 p_common->tx_mac_ctrl_frames = stats.common.tx_mac_ctrl_frames;
385 p_common->link_change_count = stats.common.link_change_count;
386 p_common->ptp_skip_txts = edev->ptp_skip_txts;
387
388 if (QEDE_IS_BB(edev)) {
389 struct qede_stats_bb *p_bb = &edev->stats.bb;
390
391 p_bb->rx_1519_to_1522_byte_packets =
392 stats.bb.rx_1519_to_1522_byte_packets;
393 p_bb->rx_1519_to_2047_byte_packets =
394 stats.bb.rx_1519_to_2047_byte_packets;
395 p_bb->rx_2048_to_4095_byte_packets =
396 stats.bb.rx_2048_to_4095_byte_packets;
397 p_bb->rx_4096_to_9216_byte_packets =
398 stats.bb.rx_4096_to_9216_byte_packets;
399 p_bb->rx_9217_to_16383_byte_packets =
400 stats.bb.rx_9217_to_16383_byte_packets;
401 p_bb->tx_1519_to_2047_byte_packets =
402 stats.bb.tx_1519_to_2047_byte_packets;
403 p_bb->tx_2048_to_4095_byte_packets =
404 stats.bb.tx_2048_to_4095_byte_packets;
405 p_bb->tx_4096_to_9216_byte_packets =
406 stats.bb.tx_4096_to_9216_byte_packets;
407 p_bb->tx_9217_to_16383_byte_packets =
408 stats.bb.tx_9217_to_16383_byte_packets;
409 p_bb->tx_lpi_entry_count = stats.bb.tx_lpi_entry_count;
410 p_bb->tx_total_collisions = stats.bb.tx_total_collisions;
411 } else {
412 struct qede_stats_ah *p_ah = &edev->stats.ah;
413
414 p_ah->rx_1519_to_max_byte_packets =
415 stats.ah.rx_1519_to_max_byte_packets;
416 p_ah->tx_1519_to_max_byte_packets =
417 stats.ah.tx_1519_to_max_byte_packets;
418 }
419
420 spin_unlock(&edev->stats_lock);
421}
422
423static void qede_get_stats64(struct net_device *dev,
424 struct rtnl_link_stats64 *stats)
425{
426 struct qede_dev *edev = netdev_priv(dev);
427 struct qede_stats_common *p_common;
428
429 p_common = &edev->stats.common;
430
431 spin_lock(&edev->stats_lock);
432
433 stats->rx_packets = p_common->rx_ucast_pkts + p_common->rx_mcast_pkts +
434 p_common->rx_bcast_pkts;
435 stats->tx_packets = p_common->tx_ucast_pkts + p_common->tx_mcast_pkts +
436 p_common->tx_bcast_pkts;
437
438 stats->rx_bytes = p_common->rx_ucast_bytes + p_common->rx_mcast_bytes +
439 p_common->rx_bcast_bytes;
440 stats->tx_bytes = p_common->tx_ucast_bytes + p_common->tx_mcast_bytes +
441 p_common->tx_bcast_bytes;
442
443 stats->tx_errors = p_common->tx_err_drop_pkts;
444 stats->multicast = p_common->rx_mcast_pkts + p_common->rx_bcast_pkts;
445
446 stats->rx_fifo_errors = p_common->no_buff_discards;
447
448 if (QEDE_IS_BB(edev))
449 stats->collisions = edev->stats.bb.tx_total_collisions;
450 stats->rx_crc_errors = p_common->rx_crc_errors;
451 stats->rx_frame_errors = p_common->rx_align_errors;
452
453 spin_unlock(&edev->stats_lock);
454}
455
456#ifdef CONFIG_QED_SRIOV
457static int qede_get_vf_config(struct net_device *dev, int vfidx,
458 struct ifla_vf_info *ivi)
459{
460 struct qede_dev *edev = netdev_priv(dev);
461
462 if (!edev->ops)
463 return -EINVAL;
464
465 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi);
466}
467
468static int qede_set_vf_rate(struct net_device *dev, int vfidx,
469 int min_tx_rate, int max_tx_rate)
470{
471 struct qede_dev *edev = netdev_priv(dev);
472
473 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate,
474 max_tx_rate);
475}
476
477static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val)
478{
479 struct qede_dev *edev = netdev_priv(dev);
480
481 if (!edev->ops)
482 return -EINVAL;
483
484 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val);
485}
486
487static int qede_set_vf_link_state(struct net_device *dev, int vfidx,
488 int link_state)
489{
490 struct qede_dev *edev = netdev_priv(dev);
491
492 if (!edev->ops)
493 return -EINVAL;
494
495 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state);
496}
497
498static int qede_set_vf_trust(struct net_device *dev, int vfidx, bool setting)
499{
500 struct qede_dev *edev = netdev_priv(dev);
501
502 if (!edev->ops)
503 return -EINVAL;
504
505 return edev->ops->iov->set_trust(edev->cdev, vfidx, setting);
506}
507#endif
508
509static int qede_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
510{
511 struct qede_dev *edev = netdev_priv(dev);
512
513 if (!netif_running(dev))
514 return -EAGAIN;
515
516 switch (cmd) {
517 case SIOCSHWTSTAMP:
518 return qede_ptp_hw_ts(edev, ifr);
519 default:
520 DP_VERBOSE(edev, QED_MSG_DEBUG,
521 "default IOCTL cmd 0x%x\n", cmd);
522 return -EOPNOTSUPP;
523 }
524
525 return 0;
526}
527
528static void qede_fp_sb_dump(struct qede_dev *edev, struct qede_fastpath *fp)
529{
530 char *p_sb = (char *)fp->sb_info->sb_virt;
531 u32 sb_size, i;
532
533 sb_size = sizeof(struct status_block);
534
535 for (i = 0; i < sb_size; i += 8)
536 DP_NOTICE(edev,
537 "%02hhX %02hhX %02hhX %02hhX %02hhX %02hhX %02hhX %02hhX\n",
538 p_sb[i], p_sb[i + 1], p_sb[i + 2], p_sb[i + 3],
539 p_sb[i + 4], p_sb[i + 5], p_sb[i + 6], p_sb[i + 7]);
540}
541
542static void
543qede_txq_fp_log_metadata(struct qede_dev *edev,
544 struct qede_fastpath *fp, struct qede_tx_queue *txq)
545{
546 struct qed_chain *p_chain = &txq->tx_pbl;
547
548 /* Dump txq/fp/sb ids etc. other metadata */
549 DP_NOTICE(edev,
550 "fpid 0x%x sbid 0x%x txqid [0x%x] ndev_qid [0x%x] cos [0x%x] p_chain %p cap %d size %d jiffies %lu HZ 0x%x\n",
551 fp->id, fp->sb_info->igu_sb_id, txq->index, txq->ndev_txq_id, txq->cos,
552 p_chain, p_chain->capacity, p_chain->size, jiffies, HZ);
553
554 /* Dump all the relevant prod/cons indexes */
555 DP_NOTICE(edev,
556 "hw cons %04x sw_tx_prod=0x%x, sw_tx_cons=0x%x, bd_prod 0x%x bd_cons 0x%x\n",
557 le16_to_cpu(*txq->hw_cons_ptr), txq->sw_tx_prod, txq->sw_tx_cons,
558 qed_chain_get_prod_idx(p_chain), qed_chain_get_cons_idx(p_chain));
559}
560
561static void
562qede_tx_log_print(struct qede_dev *edev, struct qede_fastpath *fp, struct qede_tx_queue *txq)
563{
564 struct qed_sb_info_dbg sb_dbg;
565 int rc;
566
567 /* sb info */
568 qede_fp_sb_dump(edev, fp);
569
570 memset(&sb_dbg, 0, sizeof(sb_dbg));
571 rc = edev->ops->common->get_sb_info(edev->cdev, fp->sb_info, (u16)fp->id, &sb_dbg);
572
573 DP_NOTICE(edev, "IGU: prod %08x cons %08x CAU Tx %04x\n",
574 sb_dbg.igu_prod, sb_dbg.igu_cons, sb_dbg.pi[TX_PI(txq->cos)]);
575
576 /* report to mfw */
577 edev->ops->common->mfw_report(edev->cdev,
578 "Txq[%d]: FW cons [host] %04x, SW cons %04x, SW prod %04x [Jiffies %lu]\n",
579 txq->index, le16_to_cpu(*txq->hw_cons_ptr),
580 qed_chain_get_cons_idx(&txq->tx_pbl),
581 qed_chain_get_prod_idx(&txq->tx_pbl), jiffies);
582 if (!rc)
583 edev->ops->common->mfw_report(edev->cdev,
584 "Txq[%d]: SB[0x%04x] - IGU: prod %08x cons %08x CAU Tx %04x\n",
585 txq->index, fp->sb_info->igu_sb_id,
586 sb_dbg.igu_prod, sb_dbg.igu_cons,
587 sb_dbg.pi[TX_PI(txq->cos)]);
588}
589
590static void qede_tx_timeout(struct net_device *dev, unsigned int txqueue)
591{
592 struct qede_dev *edev = netdev_priv(dev);
593 int i;
594
595 netif_carrier_off(dev);
596 DP_NOTICE(edev, "TX timeout on queue %u!\n", txqueue);
597
598 for_each_queue(i) {
599 struct qede_tx_queue *txq;
600 struct qede_fastpath *fp;
601 int cos;
602
603 fp = &edev->fp_array[i];
604 if (!(fp->type & QEDE_FASTPATH_TX))
605 continue;
606
607 for_each_cos_in_txq(edev, cos) {
608 txq = &fp->txq[cos];
609
610 /* Dump basic metadata for all queues */
611 qede_txq_fp_log_metadata(edev, fp, txq);
612
613 if (qed_chain_get_cons_idx(&txq->tx_pbl) !=
614 qed_chain_get_prod_idx(&txq->tx_pbl))
615 qede_tx_log_print(edev, fp, txq);
616 }
617 }
618
619 if (IS_VF(edev))
620 return;
621
622 if (test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) ||
623 edev->state == QEDE_STATE_RECOVERY) {
624 DP_INFO(edev,
625 "Avoid handling a Tx timeout while another HW error is being handled\n");
626 return;
627 }
628
629 set_bit(QEDE_ERR_GET_DBG_INFO, &edev->err_flags);
630 set_bit(QEDE_SP_HW_ERR, &edev->sp_flags);
631 schedule_delayed_work(&edev->sp_task, 0);
632}
633
634static int qede_setup_tc(struct net_device *ndev, u8 num_tc)
635{
636 struct qede_dev *edev = netdev_priv(ndev);
637 int cos, count, offset;
638
639 if (num_tc > edev->dev_info.num_tc)
640 return -EINVAL;
641
642 netdev_reset_tc(ndev);
643 netdev_set_num_tc(ndev, num_tc);
644
645 for_each_cos_in_txq(edev, cos) {
646 count = QEDE_TSS_COUNT(edev);
647 offset = cos * QEDE_TSS_COUNT(edev);
648 netdev_set_tc_queue(ndev, cos, count, offset);
649 }
650
651 return 0;
652}
653
654static int
655qede_set_flower(struct qede_dev *edev, struct flow_cls_offload *f,
656 __be16 proto)
657{
658 switch (f->command) {
659 case FLOW_CLS_REPLACE:
660 return qede_add_tc_flower_fltr(edev, proto, f);
661 case FLOW_CLS_DESTROY:
662 return qede_delete_flow_filter(edev, f->cookie);
663 default:
664 return -EOPNOTSUPP;
665 }
666}
667
668static int qede_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
669 void *cb_priv)
670{
671 struct flow_cls_offload *f;
672 struct qede_dev *edev = cb_priv;
673
674 if (!tc_cls_can_offload_and_chain0(edev->ndev, type_data))
675 return -EOPNOTSUPP;
676
677 switch (type) {
678 case TC_SETUP_CLSFLOWER:
679 f = type_data;
680 return qede_set_flower(edev, f, f->common.protocol);
681 default:
682 return -EOPNOTSUPP;
683 }
684}
685
686static LIST_HEAD(qede_block_cb_list);
687
688static int
689qede_setup_tc_offload(struct net_device *dev, enum tc_setup_type type,
690 void *type_data)
691{
692 struct qede_dev *edev = netdev_priv(dev);
693 struct tc_mqprio_qopt *mqprio;
694
695 switch (type) {
696 case TC_SETUP_BLOCK:
697 return flow_block_cb_setup_simple(type_data,
698 &qede_block_cb_list,
699 qede_setup_tc_block_cb,
700 edev, edev, true);
701 case TC_SETUP_QDISC_MQPRIO:
702 mqprio = type_data;
703
704 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
705 return qede_setup_tc(dev, mqprio->num_tc);
706 default:
707 return -EOPNOTSUPP;
708 }
709}
710
711static const struct net_device_ops qede_netdev_ops = {
712 .ndo_open = qede_open,
713 .ndo_stop = qede_close,
714 .ndo_start_xmit = qede_start_xmit,
715 .ndo_select_queue = qede_select_queue,
716 .ndo_set_rx_mode = qede_set_rx_mode,
717 .ndo_set_mac_address = qede_set_mac_addr,
718 .ndo_validate_addr = eth_validate_addr,
719 .ndo_change_mtu = qede_change_mtu,
720 .ndo_eth_ioctl = qede_ioctl,
721 .ndo_tx_timeout = qede_tx_timeout,
722#ifdef CONFIG_QED_SRIOV
723 .ndo_set_vf_mac = qede_set_vf_mac,
724 .ndo_set_vf_vlan = qede_set_vf_vlan,
725 .ndo_set_vf_trust = qede_set_vf_trust,
726#endif
727 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
728 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
729 .ndo_fix_features = qede_fix_features,
730 .ndo_set_features = qede_set_features,
731 .ndo_get_stats64 = qede_get_stats64,
732#ifdef CONFIG_QED_SRIOV
733 .ndo_set_vf_link_state = qede_set_vf_link_state,
734 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk,
735 .ndo_get_vf_config = qede_get_vf_config,
736 .ndo_set_vf_rate = qede_set_vf_rate,
737#endif
738 .ndo_features_check = qede_features_check,
739 .ndo_bpf = qede_xdp,
740#ifdef CONFIG_RFS_ACCEL
741 .ndo_rx_flow_steer = qede_rx_flow_steer,
742#endif
743 .ndo_xdp_xmit = qede_xdp_transmit,
744 .ndo_setup_tc = qede_setup_tc_offload,
745};
746
747static const struct net_device_ops qede_netdev_vf_ops = {
748 .ndo_open = qede_open,
749 .ndo_stop = qede_close,
750 .ndo_start_xmit = qede_start_xmit,
751 .ndo_select_queue = qede_select_queue,
752 .ndo_set_rx_mode = qede_set_rx_mode,
753 .ndo_set_mac_address = qede_set_mac_addr,
754 .ndo_validate_addr = eth_validate_addr,
755 .ndo_change_mtu = qede_change_mtu,
756 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
757 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
758 .ndo_fix_features = qede_fix_features,
759 .ndo_set_features = qede_set_features,
760 .ndo_get_stats64 = qede_get_stats64,
761 .ndo_features_check = qede_features_check,
762};
763
764static const struct net_device_ops qede_netdev_vf_xdp_ops = {
765 .ndo_open = qede_open,
766 .ndo_stop = qede_close,
767 .ndo_start_xmit = qede_start_xmit,
768 .ndo_select_queue = qede_select_queue,
769 .ndo_set_rx_mode = qede_set_rx_mode,
770 .ndo_set_mac_address = qede_set_mac_addr,
771 .ndo_validate_addr = eth_validate_addr,
772 .ndo_change_mtu = qede_change_mtu,
773 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
774 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
775 .ndo_fix_features = qede_fix_features,
776 .ndo_set_features = qede_set_features,
777 .ndo_get_stats64 = qede_get_stats64,
778 .ndo_features_check = qede_features_check,
779 .ndo_bpf = qede_xdp,
780 .ndo_xdp_xmit = qede_xdp_transmit,
781};
782
783/* -------------------------------------------------------------------------
784 * START OF PROBE / REMOVE
785 * -------------------------------------------------------------------------
786 */
787
788static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
789 struct pci_dev *pdev,
790 struct qed_dev_eth_info *info,
791 u32 dp_module, u8 dp_level)
792{
793 struct net_device *ndev;
794 struct qede_dev *edev;
795
796 ndev = alloc_etherdev_mqs(sizeof(*edev),
797 info->num_queues * info->num_tc,
798 info->num_queues);
799 if (!ndev) {
800 pr_err("etherdev allocation failed\n");
801 return NULL;
802 }
803
804 edev = netdev_priv(ndev);
805 edev->ndev = ndev;
806 edev->cdev = cdev;
807 edev->pdev = pdev;
808 edev->dp_module = dp_module;
809 edev->dp_level = dp_level;
810 edev->ops = qed_ops;
811
812 if (is_kdump_kernel()) {
813 edev->q_num_rx_buffers = NUM_RX_BDS_KDUMP_MIN;
814 edev->q_num_tx_buffers = NUM_TX_BDS_KDUMP_MIN;
815 } else {
816 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
817 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
818 }
819
820 DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n",
821 info->num_queues, info->num_queues);
822
823 SET_NETDEV_DEV(ndev, &pdev->dev);
824
825 memset(&edev->stats, 0, sizeof(edev->stats));
826 memcpy(&edev->dev_info, info, sizeof(*info));
827
828 /* As ethtool doesn't have the ability to show WoL behavior as
829 * 'default', if device supports it declare it's enabled.
830 */
831 if (edev->dev_info.common.wol_support)
832 edev->wol_enabled = true;
833
834 INIT_LIST_HEAD(&edev->vlan_list);
835
836 return edev;
837}
838
839static void qede_init_ndev(struct qede_dev *edev)
840{
841 struct net_device *ndev = edev->ndev;
842 struct pci_dev *pdev = edev->pdev;
843 bool udp_tunnel_enable = false;
844 netdev_features_t hw_features;
845
846 pci_set_drvdata(pdev, ndev);
847
848 ndev->mem_start = edev->dev_info.common.pci_mem_start;
849 ndev->base_addr = ndev->mem_start;
850 ndev->mem_end = edev->dev_info.common.pci_mem_end;
851 ndev->irq = edev->dev_info.common.pci_irq;
852
853 ndev->watchdog_timeo = TX_TIMEOUT;
854
855 if (IS_VF(edev)) {
856 if (edev->dev_info.xdp_supported)
857 ndev->netdev_ops = &qede_netdev_vf_xdp_ops;
858 else
859 ndev->netdev_ops = &qede_netdev_vf_ops;
860 } else {
861 ndev->netdev_ops = &qede_netdev_ops;
862 }
863
864 qede_set_ethtool_ops(ndev);
865
866 ndev->priv_flags |= IFF_UNICAST_FLT;
867
868 /* user-changeble features */
869 hw_features = NETIF_F_GRO | NETIF_F_GRO_HW | NETIF_F_SG |
870 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
871 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_HW_TC;
872
873 if (edev->dev_info.common.b_arfs_capable)
874 hw_features |= NETIF_F_NTUPLE;
875
876 if (edev->dev_info.common.vxlan_enable ||
877 edev->dev_info.common.geneve_enable)
878 udp_tunnel_enable = true;
879
880 if (udp_tunnel_enable || edev->dev_info.common.gre_enable) {
881 hw_features |= NETIF_F_TSO_ECN;
882 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
883 NETIF_F_SG | NETIF_F_TSO |
884 NETIF_F_TSO_ECN | NETIF_F_TSO6 |
885 NETIF_F_RXCSUM;
886 }
887
888 if (udp_tunnel_enable) {
889 hw_features |= (NETIF_F_GSO_UDP_TUNNEL |
890 NETIF_F_GSO_UDP_TUNNEL_CSUM);
891 ndev->hw_enc_features |= (NETIF_F_GSO_UDP_TUNNEL |
892 NETIF_F_GSO_UDP_TUNNEL_CSUM);
893
894 qede_set_udp_tunnels(edev);
895 }
896
897 if (edev->dev_info.common.gre_enable) {
898 hw_features |= (NETIF_F_GSO_GRE | NETIF_F_GSO_GRE_CSUM);
899 ndev->hw_enc_features |= (NETIF_F_GSO_GRE |
900 NETIF_F_GSO_GRE_CSUM);
901 }
902
903 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
904 NETIF_F_HIGHDMA;
905 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
906 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
907 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
908
909 ndev->hw_features = hw_features;
910
911 ndev->xdp_features = NETDEV_XDP_ACT_BASIC | NETDEV_XDP_ACT_REDIRECT |
912 NETDEV_XDP_ACT_NDO_XMIT;
913
914 /* MTU range: 46 - 9600 */
915 ndev->min_mtu = ETH_ZLEN - ETH_HLEN;
916 ndev->max_mtu = QEDE_MAX_JUMBO_PACKET_SIZE;
917
918 /* Set network device HW mac */
919 eth_hw_addr_set(edev->ndev, edev->dev_info.common.hw_mac);
920
921 ndev->mtu = edev->dev_info.common.mtu;
922}
923
924/* This function converts from 32b param to two params of level and module
925 * Input 32b decoding:
926 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
927 * 'happy' flow, e.g. memory allocation failed.
928 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
929 * and provide important parameters.
930 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
931 * module. VERBOSE prints are for tracking the specific flow in low level.
932 *
933 * Notice that the level should be that of the lowest required logs.
934 */
935void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
936{
937 *p_dp_level = QED_LEVEL_NOTICE;
938 *p_dp_module = 0;
939
940 if (debug & QED_LOG_VERBOSE_MASK) {
941 *p_dp_level = QED_LEVEL_VERBOSE;
942 *p_dp_module = (debug & 0x3FFFFFFF);
943 } else if (debug & QED_LOG_INFO_MASK) {
944 *p_dp_level = QED_LEVEL_INFO;
945 } else if (debug & QED_LOG_NOTICE_MASK) {
946 *p_dp_level = QED_LEVEL_NOTICE;
947 }
948}
949
950static void qede_free_fp_array(struct qede_dev *edev)
951{
952 if (edev->fp_array) {
953 struct qede_fastpath *fp;
954 int i;
955
956 for_each_queue(i) {
957 fp = &edev->fp_array[i];
958
959 kfree(fp->sb_info);
960 /* Handle mem alloc failure case where qede_init_fp
961 * didn't register xdp_rxq_info yet.
962 * Implicit only (fp->type & QEDE_FASTPATH_RX)
963 */
964 if (fp->rxq && xdp_rxq_info_is_reg(&fp->rxq->xdp_rxq))
965 xdp_rxq_info_unreg(&fp->rxq->xdp_rxq);
966 kfree(fp->rxq);
967 kfree(fp->xdp_tx);
968 kfree(fp->txq);
969 }
970 kfree(edev->fp_array);
971 }
972
973 edev->num_queues = 0;
974 edev->fp_num_tx = 0;
975 edev->fp_num_rx = 0;
976}
977
978static int qede_alloc_fp_array(struct qede_dev *edev)
979{
980 u8 fp_combined, fp_rx = edev->fp_num_rx;
981 struct qede_fastpath *fp;
982 int i;
983
984 edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev),
985 sizeof(*edev->fp_array), GFP_KERNEL);
986 if (!edev->fp_array) {
987 DP_NOTICE(edev, "fp array allocation failed\n");
988 goto err;
989 }
990
991 if (!edev->coal_entry) {
992 edev->coal_entry = kcalloc(QEDE_MAX_RSS_CNT(edev),
993 sizeof(*edev->coal_entry),
994 GFP_KERNEL);
995 if (!edev->coal_entry) {
996 DP_ERR(edev, "coalesce entry allocation failed\n");
997 goto err;
998 }
999 }
1000
1001 fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx;
1002
1003 /* Allocate the FP elements for Rx queues followed by combined and then
1004 * the Tx. This ordering should be maintained so that the respective
1005 * queues (Rx or Tx) will be together in the fastpath array and the
1006 * associated ids will be sequential.
1007 */
1008 for_each_queue(i) {
1009 fp = &edev->fp_array[i];
1010
1011 fp->sb_info = kzalloc(sizeof(*fp->sb_info), GFP_KERNEL);
1012 if (!fp->sb_info) {
1013 DP_NOTICE(edev, "sb info struct allocation failed\n");
1014 goto err;
1015 }
1016
1017 if (fp_rx) {
1018 fp->type = QEDE_FASTPATH_RX;
1019 fp_rx--;
1020 } else if (fp_combined) {
1021 fp->type = QEDE_FASTPATH_COMBINED;
1022 fp_combined--;
1023 } else {
1024 fp->type = QEDE_FASTPATH_TX;
1025 }
1026
1027 if (fp->type & QEDE_FASTPATH_TX) {
1028 fp->txq = kcalloc(edev->dev_info.num_tc,
1029 sizeof(*fp->txq), GFP_KERNEL);
1030 if (!fp->txq)
1031 goto err;
1032 }
1033
1034 if (fp->type & QEDE_FASTPATH_RX) {
1035 fp->rxq = kzalloc(sizeof(*fp->rxq), GFP_KERNEL);
1036 if (!fp->rxq)
1037 goto err;
1038
1039 if (edev->xdp_prog) {
1040 fp->xdp_tx = kzalloc(sizeof(*fp->xdp_tx),
1041 GFP_KERNEL);
1042 if (!fp->xdp_tx)
1043 goto err;
1044 fp->type |= QEDE_FASTPATH_XDP;
1045 }
1046 }
1047 }
1048
1049 return 0;
1050err:
1051 qede_free_fp_array(edev);
1052 return -ENOMEM;
1053}
1054
1055/* The qede lock is used to protect driver state change and driver flows that
1056 * are not reentrant.
1057 */
1058void __qede_lock(struct qede_dev *edev)
1059{
1060 mutex_lock(&edev->qede_lock);
1061}
1062
1063void __qede_unlock(struct qede_dev *edev)
1064{
1065 mutex_unlock(&edev->qede_lock);
1066}
1067
1068/* This version of the lock should be used when acquiring the RTNL lock is also
1069 * needed in addition to the internal qede lock.
1070 */
1071static void qede_lock(struct qede_dev *edev)
1072{
1073 rtnl_lock();
1074 __qede_lock(edev);
1075}
1076
1077static void qede_unlock(struct qede_dev *edev)
1078{
1079 __qede_unlock(edev);
1080 rtnl_unlock();
1081}
1082
1083static void qede_periodic_task(struct work_struct *work)
1084{
1085 struct qede_dev *edev = container_of(work, struct qede_dev,
1086 periodic_task.work);
1087
1088 qede_fill_by_demand_stats(edev);
1089 schedule_delayed_work(&edev->periodic_task, edev->stats_coal_ticks);
1090}
1091
1092static void qede_init_periodic_task(struct qede_dev *edev)
1093{
1094 INIT_DELAYED_WORK(&edev->periodic_task, qede_periodic_task);
1095 spin_lock_init(&edev->stats_lock);
1096 edev->stats_coal_usecs = USEC_PER_SEC;
1097 edev->stats_coal_ticks = usecs_to_jiffies(USEC_PER_SEC);
1098}
1099
1100static void qede_sp_task(struct work_struct *work)
1101{
1102 struct qede_dev *edev = container_of(work, struct qede_dev,
1103 sp_task.work);
1104
1105 /* Disable execution of this deferred work once
1106 * qede removal is in progress, this stop any future
1107 * scheduling of sp_task.
1108 */
1109 if (test_bit(QEDE_SP_DISABLE, &edev->sp_flags))
1110 return;
1111
1112 /* The locking scheme depends on the specific flag:
1113 * In case of QEDE_SP_RECOVERY, acquiring the RTNL lock is required to
1114 * ensure that ongoing flows are ended and new ones are not started.
1115 * In other cases - only the internal qede lock should be acquired.
1116 */
1117
1118 if (test_and_clear_bit(QEDE_SP_RECOVERY, &edev->sp_flags)) {
1119 cancel_delayed_work_sync(&edev->periodic_task);
1120#ifdef CONFIG_QED_SRIOV
1121 /* SRIOV must be disabled outside the lock to avoid a deadlock.
1122 * The recovery of the active VFs is currently not supported.
1123 */
1124 if (pci_num_vf(edev->pdev))
1125 qede_sriov_configure(edev->pdev, 0);
1126#endif
1127 qede_lock(edev);
1128 qede_recovery_handler(edev);
1129 qede_unlock(edev);
1130 }
1131
1132 __qede_lock(edev);
1133
1134 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
1135 if (edev->state == QEDE_STATE_OPEN)
1136 qede_config_rx_mode(edev->ndev);
1137
1138#ifdef CONFIG_RFS_ACCEL
1139 if (test_and_clear_bit(QEDE_SP_ARFS_CONFIG, &edev->sp_flags)) {
1140 if (edev->state == QEDE_STATE_OPEN)
1141 qede_process_arfs_filters(edev, false);
1142 }
1143#endif
1144 if (test_and_clear_bit(QEDE_SP_HW_ERR, &edev->sp_flags))
1145 qede_generic_hw_err_handler(edev);
1146 __qede_unlock(edev);
1147
1148 if (test_and_clear_bit(QEDE_SP_AER, &edev->sp_flags)) {
1149#ifdef CONFIG_QED_SRIOV
1150 /* SRIOV must be disabled outside the lock to avoid a deadlock.
1151 * The recovery of the active VFs is currently not supported.
1152 */
1153 if (pci_num_vf(edev->pdev))
1154 qede_sriov_configure(edev->pdev, 0);
1155#endif
1156 edev->ops->common->recovery_process(edev->cdev);
1157 }
1158}
1159
1160static void qede_update_pf_params(struct qed_dev *cdev)
1161{
1162 struct qed_pf_params pf_params;
1163 u16 num_cons;
1164
1165 /* 64 rx + 64 tx + 64 XDP */
1166 memset(&pf_params, 0, sizeof(struct qed_pf_params));
1167
1168 /* 1 rx + 1 xdp + max tx cos */
1169 num_cons = QED_MIN_L2_CONS;
1170
1171 pf_params.eth_pf_params.num_cons = (MAX_SB_PER_PF_MIMD - 1) * num_cons;
1172
1173 /* Same for VFs - make sure they'll have sufficient connections
1174 * to support XDP Tx queues.
1175 */
1176 pf_params.eth_pf_params.num_vf_cons = 48;
1177
1178 pf_params.eth_pf_params.num_arfs_filters = QEDE_RFS_MAX_FLTR;
1179 qed_ops->common->update_pf_params(cdev, &pf_params);
1180}
1181
1182#define QEDE_FW_VER_STR_SIZE 80
1183
1184static void qede_log_probe(struct qede_dev *edev)
1185{
1186 struct qed_dev_info *p_dev_info = &edev->dev_info.common;
1187 u8 buf[QEDE_FW_VER_STR_SIZE];
1188 size_t left_size;
1189
1190 snprintf(buf, QEDE_FW_VER_STR_SIZE,
1191 "Storm FW %d.%d.%d.%d, Management FW %d.%d.%d.%d",
1192 p_dev_info->fw_major, p_dev_info->fw_minor, p_dev_info->fw_rev,
1193 p_dev_info->fw_eng,
1194 (p_dev_info->mfw_rev & QED_MFW_VERSION_3_MASK) >>
1195 QED_MFW_VERSION_3_OFFSET,
1196 (p_dev_info->mfw_rev & QED_MFW_VERSION_2_MASK) >>
1197 QED_MFW_VERSION_2_OFFSET,
1198 (p_dev_info->mfw_rev & QED_MFW_VERSION_1_MASK) >>
1199 QED_MFW_VERSION_1_OFFSET,
1200 (p_dev_info->mfw_rev & QED_MFW_VERSION_0_MASK) >>
1201 QED_MFW_VERSION_0_OFFSET);
1202
1203 left_size = QEDE_FW_VER_STR_SIZE - strlen(buf);
1204 if (p_dev_info->mbi_version && left_size)
1205 snprintf(buf + strlen(buf), left_size,
1206 " [MBI %d.%d.%d]",
1207 (p_dev_info->mbi_version & QED_MBI_VERSION_2_MASK) >>
1208 QED_MBI_VERSION_2_OFFSET,
1209 (p_dev_info->mbi_version & QED_MBI_VERSION_1_MASK) >>
1210 QED_MBI_VERSION_1_OFFSET,
1211 (p_dev_info->mbi_version & QED_MBI_VERSION_0_MASK) >>
1212 QED_MBI_VERSION_0_OFFSET);
1213
1214 pr_info("qede %02x:%02x.%02x: %s [%s]\n", edev->pdev->bus->number,
1215 PCI_SLOT(edev->pdev->devfn), PCI_FUNC(edev->pdev->devfn),
1216 buf, edev->ndev->name);
1217}
1218
1219enum qede_probe_mode {
1220 QEDE_PROBE_NORMAL,
1221 QEDE_PROBE_RECOVERY,
1222};
1223
1224static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
1225 bool is_vf, enum qede_probe_mode mode)
1226{
1227 struct qed_probe_params probe_params;
1228 struct qed_slowpath_params sp_params;
1229 struct qed_dev_eth_info dev_info;
1230 struct qede_dev *edev;
1231 struct qed_dev *cdev;
1232 int rc;
1233
1234 if (unlikely(dp_level & QED_LEVEL_INFO))
1235 pr_notice("Starting qede probe\n");
1236
1237 memset(&probe_params, 0, sizeof(probe_params));
1238 probe_params.protocol = QED_PROTOCOL_ETH;
1239 probe_params.dp_module = dp_module;
1240 probe_params.dp_level = dp_level;
1241 probe_params.is_vf = is_vf;
1242 probe_params.recov_in_prog = (mode == QEDE_PROBE_RECOVERY);
1243 cdev = qed_ops->common->probe(pdev, &probe_params);
1244 if (!cdev) {
1245 rc = -ENODEV;
1246 goto err0;
1247 }
1248
1249 qede_update_pf_params(cdev);
1250
1251 /* Start the Slowpath-process */
1252 memset(&sp_params, 0, sizeof(sp_params));
1253 sp_params.int_mode = QED_INT_MODE_MSIX;
1254 strscpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
1255 rc = qed_ops->common->slowpath_start(cdev, &sp_params);
1256 if (rc) {
1257 pr_notice("Cannot start slowpath\n");
1258 goto err1;
1259 }
1260
1261 /* Learn information crucial for qede to progress */
1262 rc = qed_ops->fill_dev_info(cdev, &dev_info);
1263 if (rc)
1264 goto err2;
1265
1266 if (mode != QEDE_PROBE_RECOVERY) {
1267 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
1268 dp_level);
1269 if (!edev) {
1270 rc = -ENOMEM;
1271 goto err2;
1272 }
1273
1274 edev->devlink = qed_ops->common->devlink_register(cdev);
1275 if (IS_ERR(edev->devlink)) {
1276 DP_NOTICE(edev, "Cannot register devlink\n");
1277 rc = PTR_ERR(edev->devlink);
1278 edev->devlink = NULL;
1279 goto err3;
1280 }
1281 } else {
1282 struct net_device *ndev = pci_get_drvdata(pdev);
1283 struct qed_devlink *qdl;
1284
1285 edev = netdev_priv(ndev);
1286 qdl = devlink_priv(edev->devlink);
1287 qdl->cdev = cdev;
1288 edev->cdev = cdev;
1289 memset(&edev->stats, 0, sizeof(edev->stats));
1290 memcpy(&edev->dev_info, &dev_info, sizeof(dev_info));
1291 }
1292
1293 if (is_vf)
1294 set_bit(QEDE_FLAGS_IS_VF, &edev->flags);
1295
1296 qede_init_ndev(edev);
1297
1298 rc = qede_rdma_dev_add(edev, (mode == QEDE_PROBE_RECOVERY));
1299 if (rc)
1300 goto err3;
1301
1302 if (mode != QEDE_PROBE_RECOVERY) {
1303 /* Prepare the lock prior to the registration of the netdev,
1304 * as once it's registered we might reach flows requiring it
1305 * [it's even possible to reach a flow needing it directly
1306 * from there, although it's unlikely].
1307 */
1308 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
1309 mutex_init(&edev->qede_lock);
1310 qede_init_periodic_task(edev);
1311
1312 rc = register_netdev(edev->ndev);
1313 if (rc) {
1314 DP_NOTICE(edev, "Cannot register net-device\n");
1315 goto err4;
1316 }
1317 }
1318
1319 edev->ops->common->set_name(cdev, edev->ndev->name);
1320
1321 /* PTP not supported on VFs */
1322 if (!is_vf)
1323 qede_ptp_enable(edev);
1324
1325 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
1326
1327#ifdef CONFIG_DCB
1328 if (!IS_VF(edev))
1329 qede_set_dcbnl_ops(edev->ndev);
1330#endif
1331
1332 edev->rx_copybreak = QEDE_RX_HDR_SIZE;
1333
1334 qede_log_probe(edev);
1335
1336 /* retain user config (for example - after recovery) */
1337 if (edev->stats_coal_usecs)
1338 schedule_delayed_work(&edev->periodic_task, 0);
1339
1340 return 0;
1341
1342err4:
1343 qede_rdma_dev_remove(edev, (mode == QEDE_PROBE_RECOVERY));
1344err3:
1345 if (mode != QEDE_PROBE_RECOVERY)
1346 free_netdev(edev->ndev);
1347 else
1348 edev->cdev = NULL;
1349err2:
1350 qed_ops->common->slowpath_stop(cdev);
1351err1:
1352 qed_ops->common->remove(cdev);
1353err0:
1354 return rc;
1355}
1356
1357static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1358{
1359 bool is_vf = false;
1360 u32 dp_module = 0;
1361 u8 dp_level = 0;
1362
1363 switch ((enum qede_pci_private)id->driver_data) {
1364 case QEDE_PRIVATE_VF:
1365 if (debug & QED_LOG_VERBOSE_MASK)
1366 dev_err(&pdev->dev, "Probing a VF\n");
1367 is_vf = true;
1368 break;
1369 default:
1370 if (debug & QED_LOG_VERBOSE_MASK)
1371 dev_err(&pdev->dev, "Probing a PF\n");
1372 }
1373
1374 qede_config_debug(debug, &dp_module, &dp_level);
1375
1376 return __qede_probe(pdev, dp_module, dp_level, is_vf,
1377 QEDE_PROBE_NORMAL);
1378}
1379
1380enum qede_remove_mode {
1381 QEDE_REMOVE_NORMAL,
1382 QEDE_REMOVE_RECOVERY,
1383};
1384
1385static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
1386{
1387 struct net_device *ndev = pci_get_drvdata(pdev);
1388 struct qede_dev *edev;
1389 struct qed_dev *cdev;
1390
1391 if (!ndev) {
1392 dev_info(&pdev->dev, "Device has already been removed\n");
1393 return;
1394 }
1395
1396 edev = netdev_priv(ndev);
1397 cdev = edev->cdev;
1398
1399 DP_INFO(edev, "Starting qede_remove\n");
1400
1401 qede_rdma_dev_remove(edev, (mode == QEDE_REMOVE_RECOVERY));
1402
1403 if (mode != QEDE_REMOVE_RECOVERY) {
1404 set_bit(QEDE_SP_DISABLE, &edev->sp_flags);
1405 unregister_netdev(ndev);
1406
1407 cancel_delayed_work_sync(&edev->sp_task);
1408 cancel_delayed_work_sync(&edev->periodic_task);
1409
1410 edev->ops->common->set_power_state(cdev, PCI_D0);
1411
1412 pci_set_drvdata(pdev, NULL);
1413 }
1414
1415 qede_ptp_disable(edev);
1416
1417 /* Use global ops since we've freed edev */
1418 qed_ops->common->slowpath_stop(cdev);
1419 if (system_state == SYSTEM_POWER_OFF)
1420 return;
1421
1422 if (mode != QEDE_REMOVE_RECOVERY && edev->devlink) {
1423 qed_ops->common->devlink_unregister(edev->devlink);
1424 edev->devlink = NULL;
1425 }
1426 qed_ops->common->remove(cdev);
1427 edev->cdev = NULL;
1428
1429 /* Since this can happen out-of-sync with other flows,
1430 * don't release the netdevice until after slowpath stop
1431 * has been called to guarantee various other contexts
1432 * [e.g., QED register callbacks] won't break anything when
1433 * accessing the netdevice.
1434 */
1435 if (mode != QEDE_REMOVE_RECOVERY) {
1436 kfree(edev->coal_entry);
1437 free_netdev(ndev);
1438 }
1439
1440 dev_info(&pdev->dev, "Ending qede_remove successfully\n");
1441}
1442
1443static void qede_remove(struct pci_dev *pdev)
1444{
1445 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
1446}
1447
1448static void qede_shutdown(struct pci_dev *pdev)
1449{
1450 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
1451}
1452
1453/* -------------------------------------------------------------------------
1454 * START OF LOAD / UNLOAD
1455 * -------------------------------------------------------------------------
1456 */
1457
1458static int qede_set_num_queues(struct qede_dev *edev)
1459{
1460 int rc;
1461 u16 rss_num;
1462
1463 /* Setup queues according to possible resources*/
1464 if (edev->req_queues)
1465 rss_num = edev->req_queues;
1466 else
1467 rss_num = netif_get_num_default_rss_queues() *
1468 edev->dev_info.common.num_hwfns;
1469
1470 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
1471
1472 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
1473 if (rc > 0) {
1474 /* Managed to request interrupts for our queues */
1475 edev->num_queues = rc;
1476 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
1477 QEDE_QUEUE_CNT(edev), rss_num);
1478 rc = 0;
1479 }
1480
1481 edev->fp_num_tx = edev->req_num_tx;
1482 edev->fp_num_rx = edev->req_num_rx;
1483
1484 return rc;
1485}
1486
1487static void qede_free_mem_sb(struct qede_dev *edev, struct qed_sb_info *sb_info,
1488 u16 sb_id)
1489{
1490 if (sb_info->sb_virt) {
1491 edev->ops->common->sb_release(edev->cdev, sb_info, sb_id,
1492 QED_SB_TYPE_L2_QUEUE);
1493 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
1494 (void *)sb_info->sb_virt, sb_info->sb_phys);
1495 memset(sb_info, 0, sizeof(*sb_info));
1496 }
1497}
1498
1499/* This function allocates fast-path status block memory */
1500static int qede_alloc_mem_sb(struct qede_dev *edev,
1501 struct qed_sb_info *sb_info, u16 sb_id)
1502{
1503 struct status_block *sb_virt;
1504 dma_addr_t sb_phys;
1505 int rc;
1506
1507 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
1508 sizeof(*sb_virt), &sb_phys, GFP_KERNEL);
1509 if (!sb_virt) {
1510 DP_ERR(edev, "Status block allocation failed\n");
1511 return -ENOMEM;
1512 }
1513
1514 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
1515 sb_virt, sb_phys, sb_id,
1516 QED_SB_TYPE_L2_QUEUE);
1517 if (rc) {
1518 DP_ERR(edev, "Status block initialization failed\n");
1519 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
1520 sb_virt, sb_phys);
1521 return rc;
1522 }
1523
1524 return 0;
1525}
1526
1527static void qede_free_rx_buffers(struct qede_dev *edev,
1528 struct qede_rx_queue *rxq)
1529{
1530 u16 i;
1531
1532 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
1533 struct sw_rx_data *rx_buf;
1534 struct page *data;
1535
1536 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
1537 data = rx_buf->data;
1538
1539 dma_unmap_page(&edev->pdev->dev,
1540 rx_buf->mapping, PAGE_SIZE, rxq->data_direction);
1541
1542 rx_buf->data = NULL;
1543 __free_page(data);
1544 }
1545}
1546
1547static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
1548{
1549 /* Free rx buffers */
1550 qede_free_rx_buffers(edev, rxq);
1551
1552 /* Free the parallel SW ring */
1553 kfree(rxq->sw_rx_ring);
1554
1555 /* Free the real RQ ring used by FW */
1556 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
1557 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
1558}
1559
1560static void qede_set_tpa_param(struct qede_rx_queue *rxq)
1561{
1562 int i;
1563
1564 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
1565 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
1566
1567 tpa_info->state = QEDE_AGG_STATE_NONE;
1568 }
1569}
1570
1571/* This function allocates all memory needed per Rx queue */
1572static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
1573{
1574 struct qed_chain_init_params params = {
1575 .cnt_type = QED_CHAIN_CNT_TYPE_U16,
1576 .num_elems = RX_RING_SIZE,
1577 };
1578 struct qed_dev *cdev = edev->cdev;
1579 int i, rc, size;
1580
1581 rxq->num_rx_buffers = edev->q_num_rx_buffers;
1582
1583 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu;
1584
1585 rxq->rx_headroom = edev->xdp_prog ? XDP_PACKET_HEADROOM : NET_SKB_PAD;
1586 size = rxq->rx_headroom +
1587 SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
1588
1589 /* Make sure that the headroom and payload fit in a single page */
1590 if (rxq->rx_buf_size + size > PAGE_SIZE)
1591 rxq->rx_buf_size = PAGE_SIZE - size;
1592
1593 /* Segment size to split a page in multiple equal parts,
1594 * unless XDP is used in which case we'd use the entire page.
1595 */
1596 if (!edev->xdp_prog) {
1597 size = size + rxq->rx_buf_size;
1598 rxq->rx_buf_seg_size = roundup_pow_of_two(size);
1599 } else {
1600 rxq->rx_buf_seg_size = PAGE_SIZE;
1601 edev->ndev->features &= ~NETIF_F_GRO_HW;
1602 }
1603
1604 /* Allocate the parallel driver ring for Rx buffers */
1605 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
1606 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
1607 if (!rxq->sw_rx_ring) {
1608 DP_ERR(edev, "Rx buffers ring allocation failed\n");
1609 rc = -ENOMEM;
1610 goto err;
1611 }
1612
1613 /* Allocate FW Rx ring */
1614 params.mode = QED_CHAIN_MODE_NEXT_PTR;
1615 params.intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE;
1616 params.elem_size = sizeof(struct eth_rx_bd);
1617
1618 rc = edev->ops->common->chain_alloc(cdev, &rxq->rx_bd_ring, ¶ms);
1619 if (rc)
1620 goto err;
1621
1622 /* Allocate FW completion ring */
1623 params.mode = QED_CHAIN_MODE_PBL;
1624 params.intended_use = QED_CHAIN_USE_TO_CONSUME;
1625 params.elem_size = sizeof(union eth_rx_cqe);
1626
1627 rc = edev->ops->common->chain_alloc(cdev, &rxq->rx_comp_ring, ¶ms);
1628 if (rc)
1629 goto err;
1630
1631 /* Allocate buffers for the Rx ring */
1632 rxq->filled_buffers = 0;
1633 for (i = 0; i < rxq->num_rx_buffers; i++) {
1634 rc = qede_alloc_rx_buffer(rxq, false);
1635 if (rc) {
1636 DP_ERR(edev,
1637 "Rx buffers allocation failed at index %d\n", i);
1638 goto err;
1639 }
1640 }
1641
1642 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO_HW);
1643 if (!edev->gro_disable)
1644 qede_set_tpa_param(rxq);
1645err:
1646 return rc;
1647}
1648
1649static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
1650{
1651 /* Free the parallel SW ring */
1652 if (txq->is_xdp)
1653 kfree(txq->sw_tx_ring.xdp);
1654 else
1655 kfree(txq->sw_tx_ring.skbs);
1656
1657 /* Free the real RQ ring used by FW */
1658 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
1659}
1660
1661/* This function allocates all memory needed per Tx queue */
1662static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
1663{
1664 struct qed_chain_init_params params = {
1665 .mode = QED_CHAIN_MODE_PBL,
1666 .intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1667 .cnt_type = QED_CHAIN_CNT_TYPE_U16,
1668 .num_elems = edev->q_num_tx_buffers,
1669 .elem_size = sizeof(union eth_tx_bd_types),
1670 };
1671 int size, rc;
1672
1673 txq->num_tx_buffers = edev->q_num_tx_buffers;
1674
1675 /* Allocate the parallel driver ring for Tx buffers */
1676 if (txq->is_xdp) {
1677 size = sizeof(*txq->sw_tx_ring.xdp) * txq->num_tx_buffers;
1678 txq->sw_tx_ring.xdp = kzalloc(size, GFP_KERNEL);
1679 if (!txq->sw_tx_ring.xdp)
1680 goto err;
1681 } else {
1682 size = sizeof(*txq->sw_tx_ring.skbs) * txq->num_tx_buffers;
1683 txq->sw_tx_ring.skbs = kzalloc(size, GFP_KERNEL);
1684 if (!txq->sw_tx_ring.skbs)
1685 goto err;
1686 }
1687
1688 rc = edev->ops->common->chain_alloc(edev->cdev, &txq->tx_pbl, ¶ms);
1689 if (rc)
1690 goto err;
1691
1692 return 0;
1693
1694err:
1695 qede_free_mem_txq(edev, txq);
1696 return -ENOMEM;
1697}
1698
1699/* This function frees all memory of a single fp */
1700static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
1701{
1702 qede_free_mem_sb(edev, fp->sb_info, fp->id);
1703
1704 if (fp->type & QEDE_FASTPATH_RX)
1705 qede_free_mem_rxq(edev, fp->rxq);
1706
1707 if (fp->type & QEDE_FASTPATH_XDP)
1708 qede_free_mem_txq(edev, fp->xdp_tx);
1709
1710 if (fp->type & QEDE_FASTPATH_TX) {
1711 int cos;
1712
1713 for_each_cos_in_txq(edev, cos)
1714 qede_free_mem_txq(edev, &fp->txq[cos]);
1715 }
1716}
1717
1718/* This function allocates all memory needed for a single fp (i.e. an entity
1719 * which contains status block, one rx queue and/or multiple per-TC tx queues.
1720 */
1721static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
1722{
1723 int rc = 0;
1724
1725 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id);
1726 if (rc)
1727 goto out;
1728
1729 if (fp->type & QEDE_FASTPATH_RX) {
1730 rc = qede_alloc_mem_rxq(edev, fp->rxq);
1731 if (rc)
1732 goto out;
1733 }
1734
1735 if (fp->type & QEDE_FASTPATH_XDP) {
1736 rc = qede_alloc_mem_txq(edev, fp->xdp_tx);
1737 if (rc)
1738 goto out;
1739 }
1740
1741 if (fp->type & QEDE_FASTPATH_TX) {
1742 int cos;
1743
1744 for_each_cos_in_txq(edev, cos) {
1745 rc = qede_alloc_mem_txq(edev, &fp->txq[cos]);
1746 if (rc)
1747 goto out;
1748 }
1749 }
1750
1751out:
1752 return rc;
1753}
1754
1755static void qede_free_mem_load(struct qede_dev *edev)
1756{
1757 int i;
1758
1759 for_each_queue(i) {
1760 struct qede_fastpath *fp = &edev->fp_array[i];
1761
1762 qede_free_mem_fp(edev, fp);
1763 }
1764}
1765
1766/* This function allocates all qede memory at NIC load. */
1767static int qede_alloc_mem_load(struct qede_dev *edev)
1768{
1769 int rc = 0, queue_id;
1770
1771 for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) {
1772 struct qede_fastpath *fp = &edev->fp_array[queue_id];
1773
1774 rc = qede_alloc_mem_fp(edev, fp);
1775 if (rc) {
1776 DP_ERR(edev,
1777 "Failed to allocate memory for fastpath - rss id = %d\n",
1778 queue_id);
1779 qede_free_mem_load(edev);
1780 return rc;
1781 }
1782 }
1783
1784 return 0;
1785}
1786
1787static void qede_empty_tx_queue(struct qede_dev *edev,
1788 struct qede_tx_queue *txq)
1789{
1790 unsigned int pkts_compl = 0, bytes_compl = 0;
1791 struct netdev_queue *netdev_txq;
1792 int rc, len = 0;
1793
1794 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id);
1795
1796 while (qed_chain_get_cons_idx(&txq->tx_pbl) !=
1797 qed_chain_get_prod_idx(&txq->tx_pbl)) {
1798 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1799 "Freeing a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n",
1800 txq->index, qed_chain_get_cons_idx(&txq->tx_pbl),
1801 qed_chain_get_prod_idx(&txq->tx_pbl));
1802
1803 rc = qede_free_tx_pkt(edev, txq, &len);
1804 if (rc) {
1805 DP_NOTICE(edev,
1806 "Failed to free a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n",
1807 txq->index,
1808 qed_chain_get_cons_idx(&txq->tx_pbl),
1809 qed_chain_get_prod_idx(&txq->tx_pbl));
1810 break;
1811 }
1812
1813 bytes_compl += len;
1814 pkts_compl++;
1815 txq->sw_tx_cons++;
1816 }
1817
1818 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
1819}
1820
1821static void qede_empty_tx_queues(struct qede_dev *edev)
1822{
1823 int i;
1824
1825 for_each_queue(i)
1826 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
1827 int cos;
1828
1829 for_each_cos_in_txq(edev, cos) {
1830 struct qede_fastpath *fp;
1831
1832 fp = &edev->fp_array[i];
1833 qede_empty_tx_queue(edev,
1834 &fp->txq[cos]);
1835 }
1836 }
1837}
1838
1839/* This function inits fp content and resets the SB, RXQ and TXQ structures */
1840static void qede_init_fp(struct qede_dev *edev)
1841{
1842 int queue_id, rxq_index = 0, txq_index = 0;
1843 struct qede_fastpath *fp;
1844 bool init_xdp = false;
1845
1846 for_each_queue(queue_id) {
1847 fp = &edev->fp_array[queue_id];
1848
1849 fp->edev = edev;
1850 fp->id = queue_id;
1851
1852 if (fp->type & QEDE_FASTPATH_XDP) {
1853 fp->xdp_tx->index = QEDE_TXQ_IDX_TO_XDP(edev,
1854 rxq_index);
1855 fp->xdp_tx->is_xdp = 1;
1856
1857 spin_lock_init(&fp->xdp_tx->xdp_tx_lock);
1858 init_xdp = true;
1859 }
1860
1861 if (fp->type & QEDE_FASTPATH_RX) {
1862 fp->rxq->rxq_id = rxq_index++;
1863
1864 /* Determine how to map buffers for this queue */
1865 if (fp->type & QEDE_FASTPATH_XDP)
1866 fp->rxq->data_direction = DMA_BIDIRECTIONAL;
1867 else
1868 fp->rxq->data_direction = DMA_FROM_DEVICE;
1869 fp->rxq->dev = &edev->pdev->dev;
1870
1871 /* Driver have no error path from here */
1872 WARN_ON(xdp_rxq_info_reg(&fp->rxq->xdp_rxq, edev->ndev,
1873 fp->rxq->rxq_id, 0) < 0);
1874
1875 if (xdp_rxq_info_reg_mem_model(&fp->rxq->xdp_rxq,
1876 MEM_TYPE_PAGE_ORDER0,
1877 NULL)) {
1878 DP_NOTICE(edev,
1879 "Failed to register XDP memory model\n");
1880 }
1881 }
1882
1883 if (fp->type & QEDE_FASTPATH_TX) {
1884 int cos;
1885
1886 for_each_cos_in_txq(edev, cos) {
1887 struct qede_tx_queue *txq = &fp->txq[cos];
1888 u16 ndev_tx_id;
1889
1890 txq->cos = cos;
1891 txq->index = txq_index;
1892 ndev_tx_id = QEDE_TXQ_TO_NDEV_TXQ_ID(edev, txq);
1893 txq->ndev_txq_id = ndev_tx_id;
1894
1895 if (edev->dev_info.is_legacy)
1896 txq->is_legacy = true;
1897 txq->dev = &edev->pdev->dev;
1898 }
1899
1900 txq_index++;
1901 }
1902
1903 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
1904 edev->ndev->name, queue_id);
1905 }
1906
1907 if (init_xdp) {
1908 edev->total_xdp_queues = QEDE_RSS_COUNT(edev);
1909 DP_INFO(edev, "Total XDP queues: %u\n", edev->total_xdp_queues);
1910 }
1911}
1912
1913static int qede_set_real_num_queues(struct qede_dev *edev)
1914{
1915 int rc = 0;
1916
1917 rc = netif_set_real_num_tx_queues(edev->ndev,
1918 QEDE_TSS_COUNT(edev) *
1919 edev->dev_info.num_tc);
1920 if (rc) {
1921 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
1922 return rc;
1923 }
1924
1925 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev));
1926 if (rc) {
1927 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
1928 return rc;
1929 }
1930
1931 return 0;
1932}
1933
1934static void qede_napi_disable_remove(struct qede_dev *edev)
1935{
1936 int i;
1937
1938 for_each_queue(i) {
1939 napi_disable(&edev->fp_array[i].napi);
1940
1941 netif_napi_del(&edev->fp_array[i].napi);
1942 }
1943}
1944
1945static void qede_napi_add_enable(struct qede_dev *edev)
1946{
1947 int i;
1948
1949 /* Add NAPI objects */
1950 for_each_queue(i) {
1951 netif_napi_add(edev->ndev, &edev->fp_array[i].napi, qede_poll);
1952 napi_enable(&edev->fp_array[i].napi);
1953 }
1954}
1955
1956static void qede_sync_free_irqs(struct qede_dev *edev)
1957{
1958 int i;
1959
1960 for (i = 0; i < edev->int_info.used_cnt; i++) {
1961 if (edev->int_info.msix_cnt) {
1962 free_irq(edev->int_info.msix[i].vector,
1963 &edev->fp_array[i]);
1964 } else {
1965 edev->ops->common->simd_handler_clean(edev->cdev, i);
1966 }
1967 }
1968
1969 edev->int_info.used_cnt = 0;
1970 edev->int_info.msix_cnt = 0;
1971}
1972
1973static int qede_req_msix_irqs(struct qede_dev *edev)
1974{
1975 int i, rc;
1976
1977 /* Sanitize number of interrupts == number of prepared RSS queues */
1978 if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) {
1979 DP_ERR(edev,
1980 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
1981 QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt);
1982 return -EINVAL;
1983 }
1984
1985 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
1986#ifdef CONFIG_RFS_ACCEL
1987 struct qede_fastpath *fp = &edev->fp_array[i];
1988
1989 if (edev->ndev->rx_cpu_rmap && (fp->type & QEDE_FASTPATH_RX)) {
1990 rc = irq_cpu_rmap_add(edev->ndev->rx_cpu_rmap,
1991 edev->int_info.msix[i].vector);
1992 if (rc) {
1993 DP_ERR(edev, "Failed to add CPU rmap\n");
1994 qede_free_arfs(edev);
1995 }
1996 }
1997#endif
1998 rc = request_irq(edev->int_info.msix[i].vector,
1999 qede_msix_fp_int, 0, edev->fp_array[i].name,
2000 &edev->fp_array[i]);
2001 if (rc) {
2002 DP_ERR(edev, "Request fp %d irq failed\n", i);
2003#ifdef CONFIG_RFS_ACCEL
2004 if (edev->ndev->rx_cpu_rmap)
2005 free_irq_cpu_rmap(edev->ndev->rx_cpu_rmap);
2006
2007 edev->ndev->rx_cpu_rmap = NULL;
2008#endif
2009 qede_sync_free_irqs(edev);
2010 return rc;
2011 }
2012 DP_VERBOSE(edev, NETIF_MSG_INTR,
2013 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
2014 edev->fp_array[i].name, i,
2015 &edev->fp_array[i]);
2016 edev->int_info.used_cnt++;
2017 }
2018
2019 return 0;
2020}
2021
2022static void qede_simd_fp_handler(void *cookie)
2023{
2024 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
2025
2026 napi_schedule_irqoff(&fp->napi);
2027}
2028
2029static int qede_setup_irqs(struct qede_dev *edev)
2030{
2031 int i, rc = 0;
2032
2033 /* Learn Interrupt configuration */
2034 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
2035 if (rc)
2036 return rc;
2037
2038 if (edev->int_info.msix_cnt) {
2039 rc = qede_req_msix_irqs(edev);
2040 if (rc)
2041 return rc;
2042 edev->ndev->irq = edev->int_info.msix[0].vector;
2043 } else {
2044 const struct qed_common_ops *ops;
2045
2046 /* qed should learn receive the RSS ids and callbacks */
2047 ops = edev->ops->common;
2048 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++)
2049 ops->simd_handler_config(edev->cdev,
2050 &edev->fp_array[i], i,
2051 qede_simd_fp_handler);
2052 edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev);
2053 }
2054 return 0;
2055}
2056
2057static int qede_drain_txq(struct qede_dev *edev,
2058 struct qede_tx_queue *txq, bool allow_drain)
2059{
2060 int rc, cnt = 1000;
2061
2062 while (txq->sw_tx_cons != txq->sw_tx_prod) {
2063 if (!cnt) {
2064 if (allow_drain) {
2065 DP_NOTICE(edev,
2066 "Tx queue[%d] is stuck, requesting MCP to drain\n",
2067 txq->index);
2068 rc = edev->ops->common->drain(edev->cdev);
2069 if (rc)
2070 return rc;
2071 return qede_drain_txq(edev, txq, false);
2072 }
2073 DP_NOTICE(edev,
2074 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
2075 txq->index, txq->sw_tx_prod,
2076 txq->sw_tx_cons);
2077 return -ENODEV;
2078 }
2079 cnt--;
2080 usleep_range(1000, 2000);
2081 barrier();
2082 }
2083
2084 /* FW finished processing, wait for HW to transmit all tx packets */
2085 usleep_range(1000, 2000);
2086
2087 return 0;
2088}
2089
2090static int qede_stop_txq(struct qede_dev *edev,
2091 struct qede_tx_queue *txq, int rss_id)
2092{
2093 /* delete doorbell from doorbell recovery mechanism */
2094 edev->ops->common->db_recovery_del(edev->cdev, txq->doorbell_addr,
2095 &txq->tx_db);
2096
2097 return edev->ops->q_tx_stop(edev->cdev, rss_id, txq->handle);
2098}
2099
2100static int qede_stop_queues(struct qede_dev *edev)
2101{
2102 struct qed_update_vport_params *vport_update_params;
2103 struct qed_dev *cdev = edev->cdev;
2104 struct qede_fastpath *fp;
2105 int rc, i;
2106
2107 /* Disable the vport */
2108 vport_update_params = vzalloc(sizeof(*vport_update_params));
2109 if (!vport_update_params)
2110 return -ENOMEM;
2111
2112 vport_update_params->vport_id = 0;
2113 vport_update_params->update_vport_active_flg = 1;
2114 vport_update_params->vport_active_flg = 0;
2115 vport_update_params->update_rss_flg = 0;
2116
2117 rc = edev->ops->vport_update(cdev, vport_update_params);
2118 vfree(vport_update_params);
2119
2120 if (rc) {
2121 DP_ERR(edev, "Failed to update vport\n");
2122 return rc;
2123 }
2124
2125 /* Flush Tx queues. If needed, request drain from MCP */
2126 for_each_queue(i) {
2127 fp = &edev->fp_array[i];
2128
2129 if (fp->type & QEDE_FASTPATH_TX) {
2130 int cos;
2131
2132 for_each_cos_in_txq(edev, cos) {
2133 rc = qede_drain_txq(edev, &fp->txq[cos], true);
2134 if (rc)
2135 return rc;
2136 }
2137 }
2138
2139 if (fp->type & QEDE_FASTPATH_XDP) {
2140 rc = qede_drain_txq(edev, fp->xdp_tx, true);
2141 if (rc)
2142 return rc;
2143 }
2144 }
2145
2146 /* Stop all Queues in reverse order */
2147 for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) {
2148 fp = &edev->fp_array[i];
2149
2150 /* Stop the Tx Queue(s) */
2151 if (fp->type & QEDE_FASTPATH_TX) {
2152 int cos;
2153
2154 for_each_cos_in_txq(edev, cos) {
2155 rc = qede_stop_txq(edev, &fp->txq[cos], i);
2156 if (rc)
2157 return rc;
2158 }
2159 }
2160
2161 /* Stop the Rx Queue */
2162 if (fp->type & QEDE_FASTPATH_RX) {
2163 rc = edev->ops->q_rx_stop(cdev, i, fp->rxq->handle);
2164 if (rc) {
2165 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
2166 return rc;
2167 }
2168 }
2169
2170 /* Stop the XDP forwarding queue */
2171 if (fp->type & QEDE_FASTPATH_XDP) {
2172 rc = qede_stop_txq(edev, fp->xdp_tx, i);
2173 if (rc)
2174 return rc;
2175
2176 bpf_prog_put(fp->rxq->xdp_prog);
2177 }
2178 }
2179
2180 /* Stop the vport */
2181 rc = edev->ops->vport_stop(cdev, 0);
2182 if (rc)
2183 DP_ERR(edev, "Failed to stop VPORT\n");
2184
2185 return rc;
2186}
2187
2188static int qede_start_txq(struct qede_dev *edev,
2189 struct qede_fastpath *fp,
2190 struct qede_tx_queue *txq, u8 rss_id, u16 sb_idx)
2191{
2192 dma_addr_t phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl);
2193 u32 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl);
2194 struct qed_queue_start_common_params params;
2195 struct qed_txq_start_ret_params ret_params;
2196 int rc;
2197
2198 memset(¶ms, 0, sizeof(params));
2199 memset(&ret_params, 0, sizeof(ret_params));
2200
2201 /* Let the XDP queue share the queue-zone with one of the regular txq.
2202 * We don't really care about its coalescing.
2203 */
2204 if (txq->is_xdp)
2205 params.queue_id = QEDE_TXQ_XDP_TO_IDX(edev, txq);
2206 else
2207 params.queue_id = txq->index;
2208
2209 params.p_sb = fp->sb_info;
2210 params.sb_idx = sb_idx;
2211 params.tc = txq->cos;
2212
2213 rc = edev->ops->q_tx_start(edev->cdev, rss_id, ¶ms, phys_table,
2214 page_cnt, &ret_params);
2215 if (rc) {
2216 DP_ERR(edev, "Start TXQ #%d failed %d\n", txq->index, rc);
2217 return rc;
2218 }
2219
2220 txq->doorbell_addr = ret_params.p_doorbell;
2221 txq->handle = ret_params.p_handle;
2222
2223 /* Determine the FW consumer address associated */
2224 txq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[sb_idx];
2225
2226 /* Prepare the doorbell parameters */
2227 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_DEST, DB_DEST_XCM);
2228 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
2229 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_VAL_SEL,
2230 DQ_XCM_ETH_TX_BD_PROD_CMD);
2231 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
2232
2233 /* register doorbell with doorbell recovery mechanism */
2234 rc = edev->ops->common->db_recovery_add(edev->cdev, txq->doorbell_addr,
2235 &txq->tx_db, DB_REC_WIDTH_32B,
2236 DB_REC_KERNEL);
2237
2238 return rc;
2239}
2240
2241static int qede_start_queues(struct qede_dev *edev, bool clear_stats)
2242{
2243 int vlan_removal_en = 1;
2244 struct qed_dev *cdev = edev->cdev;
2245 struct qed_dev_info *qed_info = &edev->dev_info.common;
2246 struct qed_update_vport_params *vport_update_params;
2247 struct qed_queue_start_common_params q_params;
2248 struct qed_start_vport_params start = {0};
2249 int rc, i;
2250
2251 if (!edev->num_queues) {
2252 DP_ERR(edev,
2253 "Cannot update V-VPORT as active as there are no Rx queues\n");
2254 return -EINVAL;
2255 }
2256
2257 vport_update_params = vzalloc(sizeof(*vport_update_params));
2258 if (!vport_update_params)
2259 return -ENOMEM;
2260
2261 start.handle_ptp_pkts = !!(edev->ptp);
2262 start.gro_enable = !edev->gro_disable;
2263 start.mtu = edev->ndev->mtu;
2264 start.vport_id = 0;
2265 start.drop_ttl0 = true;
2266 start.remove_inner_vlan = vlan_removal_en;
2267 start.clear_stats = clear_stats;
2268
2269 rc = edev->ops->vport_start(cdev, &start);
2270
2271 if (rc) {
2272 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
2273 goto out;
2274 }
2275
2276 DP_VERBOSE(edev, NETIF_MSG_IFUP,
2277 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
2278 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
2279
2280 for_each_queue(i) {
2281 struct qede_fastpath *fp = &edev->fp_array[i];
2282 dma_addr_t p_phys_table;
2283 u32 page_cnt;
2284
2285 if (fp->type & QEDE_FASTPATH_RX) {
2286 struct qed_rxq_start_ret_params ret_params;
2287 struct qede_rx_queue *rxq = fp->rxq;
2288 __le16 *val;
2289
2290 memset(&ret_params, 0, sizeof(ret_params));
2291 memset(&q_params, 0, sizeof(q_params));
2292 q_params.queue_id = rxq->rxq_id;
2293 q_params.vport_id = 0;
2294 q_params.p_sb = fp->sb_info;
2295 q_params.sb_idx = RX_PI;
2296
2297 p_phys_table =
2298 qed_chain_get_pbl_phys(&rxq->rx_comp_ring);
2299 page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring);
2300
2301 rc = edev->ops->q_rx_start(cdev, i, &q_params,
2302 rxq->rx_buf_size,
2303 rxq->rx_bd_ring.p_phys_addr,
2304 p_phys_table,
2305 page_cnt, &ret_params);
2306 if (rc) {
2307 DP_ERR(edev, "Start RXQ #%d failed %d\n", i,
2308 rc);
2309 goto out;
2310 }
2311
2312 /* Use the return parameters */
2313 rxq->hw_rxq_prod_addr = ret_params.p_prod;
2314 rxq->handle = ret_params.p_handle;
2315
2316 val = &fp->sb_info->sb_virt->pi_array[RX_PI];
2317 rxq->hw_cons_ptr = val;
2318
2319 qede_update_rx_prod(edev, rxq);
2320 }
2321
2322 if (fp->type & QEDE_FASTPATH_XDP) {
2323 rc = qede_start_txq(edev, fp, fp->xdp_tx, i, XDP_PI);
2324 if (rc)
2325 goto out;
2326
2327 bpf_prog_add(edev->xdp_prog, 1);
2328 fp->rxq->xdp_prog = edev->xdp_prog;
2329 }
2330
2331 if (fp->type & QEDE_FASTPATH_TX) {
2332 int cos;
2333
2334 for_each_cos_in_txq(edev, cos) {
2335 rc = qede_start_txq(edev, fp, &fp->txq[cos], i,
2336 TX_PI(cos));
2337 if (rc)
2338 goto out;
2339 }
2340 }
2341 }
2342
2343 /* Prepare and send the vport enable */
2344 vport_update_params->vport_id = start.vport_id;
2345 vport_update_params->update_vport_active_flg = 1;
2346 vport_update_params->vport_active_flg = 1;
2347
2348 if ((qed_info->b_inter_pf_switch || pci_num_vf(edev->pdev)) &&
2349 qed_info->tx_switching) {
2350 vport_update_params->update_tx_switching_flg = 1;
2351 vport_update_params->tx_switching_flg = 1;
2352 }
2353
2354 qede_fill_rss_params(edev, &vport_update_params->rss_params,
2355 &vport_update_params->update_rss_flg);
2356
2357 rc = edev->ops->vport_update(cdev, vport_update_params);
2358 if (rc)
2359 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
2360
2361out:
2362 vfree(vport_update_params);
2363 return rc;
2364}
2365
2366enum qede_unload_mode {
2367 QEDE_UNLOAD_NORMAL,
2368 QEDE_UNLOAD_RECOVERY,
2369};
2370
2371static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode,
2372 bool is_locked)
2373{
2374 struct qed_link_params link_params;
2375 int rc;
2376
2377 DP_INFO(edev, "Starting qede unload\n");
2378
2379 if (!is_locked)
2380 __qede_lock(edev);
2381
2382 clear_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags);
2383
2384 if (mode != QEDE_UNLOAD_RECOVERY)
2385 edev->state = QEDE_STATE_CLOSED;
2386
2387 qede_rdma_dev_event_close(edev);
2388
2389 /* Close OS Tx */
2390 netif_tx_disable(edev->ndev);
2391 netif_carrier_off(edev->ndev);
2392
2393 if (mode != QEDE_UNLOAD_RECOVERY) {
2394 /* Reset the link */
2395 memset(&link_params, 0, sizeof(link_params));
2396 link_params.link_up = false;
2397 edev->ops->common->set_link(edev->cdev, &link_params);
2398
2399 rc = qede_stop_queues(edev);
2400 if (rc) {
2401#ifdef CONFIG_RFS_ACCEL
2402 if (edev->dev_info.common.b_arfs_capable) {
2403 qede_poll_for_freeing_arfs_filters(edev);
2404 if (edev->ndev->rx_cpu_rmap)
2405 free_irq_cpu_rmap(edev->ndev->rx_cpu_rmap);
2406
2407 edev->ndev->rx_cpu_rmap = NULL;
2408 }
2409#endif
2410 qede_sync_free_irqs(edev);
2411 goto out;
2412 }
2413
2414 DP_INFO(edev, "Stopped Queues\n");
2415 }
2416
2417 qede_vlan_mark_nonconfigured(edev);
2418 edev->ops->fastpath_stop(edev->cdev);
2419
2420 if (edev->dev_info.common.b_arfs_capable) {
2421 qede_poll_for_freeing_arfs_filters(edev);
2422 qede_free_arfs(edev);
2423 }
2424
2425 /* Release the interrupts */
2426 qede_sync_free_irqs(edev);
2427 edev->ops->common->set_fp_int(edev->cdev, 0);
2428
2429 qede_napi_disable_remove(edev);
2430
2431 if (mode == QEDE_UNLOAD_RECOVERY)
2432 qede_empty_tx_queues(edev);
2433
2434 qede_free_mem_load(edev);
2435 qede_free_fp_array(edev);
2436
2437out:
2438 if (!is_locked)
2439 __qede_unlock(edev);
2440
2441 if (mode != QEDE_UNLOAD_RECOVERY)
2442 DP_NOTICE(edev, "Link is down\n");
2443
2444 edev->ptp_skip_txts = 0;
2445
2446 DP_INFO(edev, "Ending qede unload\n");
2447}
2448
2449enum qede_load_mode {
2450 QEDE_LOAD_NORMAL,
2451 QEDE_LOAD_RELOAD,
2452 QEDE_LOAD_RECOVERY,
2453};
2454
2455static int qede_load(struct qede_dev *edev, enum qede_load_mode mode,
2456 bool is_locked)
2457{
2458 struct qed_link_params link_params;
2459 struct ethtool_coalesce coal = {};
2460 u8 num_tc;
2461 int rc, i;
2462
2463 DP_INFO(edev, "Starting qede load\n");
2464
2465 if (!is_locked)
2466 __qede_lock(edev);
2467
2468 rc = qede_set_num_queues(edev);
2469 if (rc)
2470 goto out;
2471
2472 rc = qede_alloc_fp_array(edev);
2473 if (rc)
2474 goto out;
2475
2476 qede_init_fp(edev);
2477
2478 rc = qede_alloc_mem_load(edev);
2479 if (rc)
2480 goto err1;
2481 DP_INFO(edev, "Allocated %d Rx, %d Tx queues\n",
2482 QEDE_RSS_COUNT(edev), QEDE_TSS_COUNT(edev));
2483
2484 rc = qede_set_real_num_queues(edev);
2485 if (rc)
2486 goto err2;
2487
2488 if (qede_alloc_arfs(edev)) {
2489 edev->ndev->features &= ~NETIF_F_NTUPLE;
2490 edev->dev_info.common.b_arfs_capable = false;
2491 }
2492
2493 qede_napi_add_enable(edev);
2494 DP_INFO(edev, "Napi added and enabled\n");
2495
2496 rc = qede_setup_irqs(edev);
2497 if (rc)
2498 goto err3;
2499 DP_INFO(edev, "Setup IRQs succeeded\n");
2500
2501 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD);
2502 if (rc)
2503 goto err4;
2504 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
2505
2506 num_tc = netdev_get_num_tc(edev->ndev);
2507 num_tc = num_tc ? num_tc : edev->dev_info.num_tc;
2508 qede_setup_tc(edev->ndev, num_tc);
2509
2510 /* Program un-configured VLANs */
2511 qede_configure_vlan_filters(edev);
2512
2513 set_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags);
2514
2515 /* Ask for link-up using current configuration */
2516 memset(&link_params, 0, sizeof(link_params));
2517 link_params.link_up = true;
2518 edev->ops->common->set_link(edev->cdev, &link_params);
2519
2520 edev->state = QEDE_STATE_OPEN;
2521
2522 coal.rx_coalesce_usecs = QED_DEFAULT_RX_USECS;
2523 coal.tx_coalesce_usecs = QED_DEFAULT_TX_USECS;
2524
2525 for_each_queue(i) {
2526 if (edev->coal_entry[i].isvalid) {
2527 coal.rx_coalesce_usecs = edev->coal_entry[i].rxc;
2528 coal.tx_coalesce_usecs = edev->coal_entry[i].txc;
2529 }
2530 __qede_unlock(edev);
2531 qede_set_per_coalesce(edev->ndev, i, &coal);
2532 __qede_lock(edev);
2533 }
2534 DP_INFO(edev, "Ending successfully qede load\n");
2535
2536 goto out;
2537err4:
2538 qede_sync_free_irqs(edev);
2539err3:
2540 qede_napi_disable_remove(edev);
2541err2:
2542 qede_free_mem_load(edev);
2543err1:
2544 edev->ops->common->set_fp_int(edev->cdev, 0);
2545 qede_free_fp_array(edev);
2546 edev->num_queues = 0;
2547 edev->fp_num_tx = 0;
2548 edev->fp_num_rx = 0;
2549out:
2550 if (!is_locked)
2551 __qede_unlock(edev);
2552
2553 return rc;
2554}
2555
2556/* 'func' should be able to run between unload and reload assuming interface
2557 * is actually running, or afterwards in case it's currently DOWN.
2558 */
2559void qede_reload(struct qede_dev *edev,
2560 struct qede_reload_args *args, bool is_locked)
2561{
2562 if (!is_locked)
2563 __qede_lock(edev);
2564
2565 /* Since qede_lock is held, internal state wouldn't change even
2566 * if netdev state would start transitioning. Check whether current
2567 * internal configuration indicates device is up, then reload.
2568 */
2569 if (edev->state == QEDE_STATE_OPEN) {
2570 qede_unload(edev, QEDE_UNLOAD_NORMAL, true);
2571 if (args)
2572 args->func(edev, args);
2573 qede_load(edev, QEDE_LOAD_RELOAD, true);
2574
2575 /* Since no one is going to do it for us, re-configure */
2576 qede_config_rx_mode(edev->ndev);
2577 } else if (args) {
2578 args->func(edev, args);
2579 }
2580
2581 if (!is_locked)
2582 __qede_unlock(edev);
2583}
2584
2585/* called with rtnl_lock */
2586static int qede_open(struct net_device *ndev)
2587{
2588 struct qede_dev *edev = netdev_priv(ndev);
2589 int rc;
2590
2591 netif_carrier_off(ndev);
2592
2593 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
2594
2595 rc = qede_load(edev, QEDE_LOAD_NORMAL, false);
2596 if (rc)
2597 return rc;
2598
2599 udp_tunnel_nic_reset_ntf(ndev);
2600
2601 edev->ops->common->update_drv_state(edev->cdev, true);
2602
2603 return 0;
2604}
2605
2606static int qede_close(struct net_device *ndev)
2607{
2608 struct qede_dev *edev = netdev_priv(ndev);
2609
2610 qede_unload(edev, QEDE_UNLOAD_NORMAL, false);
2611
2612 if (edev->cdev)
2613 edev->ops->common->update_drv_state(edev->cdev, false);
2614
2615 return 0;
2616}
2617
2618static void qede_link_update(void *dev, struct qed_link_output *link)
2619{
2620 struct qede_dev *edev = dev;
2621
2622 if (!test_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags)) {
2623 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not ready\n");
2624 return;
2625 }
2626
2627 if (link->link_up) {
2628 if (!netif_carrier_ok(edev->ndev)) {
2629 DP_NOTICE(edev, "Link is up\n");
2630 netif_tx_start_all_queues(edev->ndev);
2631 netif_carrier_on(edev->ndev);
2632 qede_rdma_dev_event_open(edev);
2633 }
2634 } else {
2635 if (netif_carrier_ok(edev->ndev)) {
2636 DP_NOTICE(edev, "Link is down\n");
2637 netif_tx_disable(edev->ndev);
2638 netif_carrier_off(edev->ndev);
2639 qede_rdma_dev_event_close(edev);
2640 }
2641 }
2642}
2643
2644static void qede_schedule_recovery_handler(void *dev)
2645{
2646 struct qede_dev *edev = dev;
2647
2648 if (edev->state == QEDE_STATE_RECOVERY) {
2649 DP_NOTICE(edev,
2650 "Avoid scheduling a recovery handling since already in recovery state\n");
2651 return;
2652 }
2653
2654 set_bit(QEDE_SP_RECOVERY, &edev->sp_flags);
2655 schedule_delayed_work(&edev->sp_task, 0);
2656
2657 DP_INFO(edev, "Scheduled a recovery handler\n");
2658}
2659
2660static void qede_recovery_failed(struct qede_dev *edev)
2661{
2662 netdev_err(edev->ndev, "Recovery handling has failed. Power cycle is needed.\n");
2663
2664 netif_device_detach(edev->ndev);
2665
2666 if (edev->cdev)
2667 edev->ops->common->set_power_state(edev->cdev, PCI_D3hot);
2668}
2669
2670static void qede_recovery_handler(struct qede_dev *edev)
2671{
2672 u32 curr_state = edev->state;
2673 int rc;
2674
2675 DP_NOTICE(edev, "Starting a recovery process\n");
2676
2677 /* No need to acquire first the qede_lock since is done by qede_sp_task
2678 * before calling this function.
2679 */
2680 edev->state = QEDE_STATE_RECOVERY;
2681
2682 edev->ops->common->recovery_prolog(edev->cdev);
2683
2684 if (curr_state == QEDE_STATE_OPEN)
2685 qede_unload(edev, QEDE_UNLOAD_RECOVERY, true);
2686
2687 __qede_remove(edev->pdev, QEDE_REMOVE_RECOVERY);
2688
2689 rc = __qede_probe(edev->pdev, edev->dp_module, edev->dp_level,
2690 IS_VF(edev), QEDE_PROBE_RECOVERY);
2691 if (rc) {
2692 edev->cdev = NULL;
2693 goto err;
2694 }
2695
2696 if (curr_state == QEDE_STATE_OPEN) {
2697 rc = qede_load(edev, QEDE_LOAD_RECOVERY, true);
2698 if (rc)
2699 goto err;
2700
2701 qede_config_rx_mode(edev->ndev);
2702 udp_tunnel_nic_reset_ntf(edev->ndev);
2703 }
2704
2705 edev->state = curr_state;
2706
2707 DP_NOTICE(edev, "Recovery handling is done\n");
2708
2709 return;
2710
2711err:
2712 qede_recovery_failed(edev);
2713}
2714
2715static void qede_atomic_hw_err_handler(struct qede_dev *edev)
2716{
2717 struct qed_dev *cdev = edev->cdev;
2718
2719 DP_NOTICE(edev,
2720 "Generic non-sleepable HW error handling started - err_flags 0x%lx\n",
2721 edev->err_flags);
2722
2723 /* Get a call trace of the flow that led to the error */
2724 WARN_ON(test_bit(QEDE_ERR_WARN, &edev->err_flags));
2725
2726 /* Prevent HW attentions from being reasserted */
2727 if (test_bit(QEDE_ERR_ATTN_CLR_EN, &edev->err_flags))
2728 edev->ops->common->attn_clr_enable(cdev, true);
2729
2730 DP_NOTICE(edev, "Generic non-sleepable HW error handling is done\n");
2731}
2732
2733static void qede_generic_hw_err_handler(struct qede_dev *edev)
2734{
2735 DP_NOTICE(edev,
2736 "Generic sleepable HW error handling started - err_flags 0x%lx\n",
2737 edev->err_flags);
2738
2739 if (edev->devlink) {
2740 DP_NOTICE(edev, "Reporting fatal error to devlink\n");
2741 edev->ops->common->report_fatal_error(edev->devlink, edev->last_err_type);
2742 }
2743
2744 clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags);
2745
2746 DP_NOTICE(edev, "Generic sleepable HW error handling is done\n");
2747}
2748
2749static void qede_set_hw_err_flags(struct qede_dev *edev,
2750 enum qed_hw_err_type err_type)
2751{
2752 unsigned long err_flags = 0;
2753
2754 switch (err_type) {
2755 case QED_HW_ERR_DMAE_FAIL:
2756 set_bit(QEDE_ERR_WARN, &err_flags);
2757 fallthrough;
2758 case QED_HW_ERR_MFW_RESP_FAIL:
2759 case QED_HW_ERR_HW_ATTN:
2760 case QED_HW_ERR_RAMROD_FAIL:
2761 case QED_HW_ERR_FW_ASSERT:
2762 set_bit(QEDE_ERR_ATTN_CLR_EN, &err_flags);
2763 set_bit(QEDE_ERR_GET_DBG_INFO, &err_flags);
2764 /* make this error as recoverable and start recovery*/
2765 set_bit(QEDE_ERR_IS_RECOVERABLE, &err_flags);
2766 break;
2767
2768 default:
2769 DP_NOTICE(edev, "Unexpected HW error [%d]\n", err_type);
2770 break;
2771 }
2772
2773 edev->err_flags |= err_flags;
2774}
2775
2776static void qede_schedule_hw_err_handler(void *dev,
2777 enum qed_hw_err_type err_type)
2778{
2779 struct qede_dev *edev = dev;
2780
2781 /* Fan failure cannot be masked by handling of another HW error or by a
2782 * concurrent recovery process.
2783 */
2784 if ((test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) ||
2785 edev->state == QEDE_STATE_RECOVERY) &&
2786 err_type != QED_HW_ERR_FAN_FAIL) {
2787 DP_INFO(edev,
2788 "Avoid scheduling an error handling while another HW error is being handled\n");
2789 return;
2790 }
2791
2792 if (err_type >= QED_HW_ERR_LAST) {
2793 DP_NOTICE(edev, "Unknown HW error [%d]\n", err_type);
2794 clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags);
2795 return;
2796 }
2797
2798 edev->last_err_type = err_type;
2799 qede_set_hw_err_flags(edev, err_type);
2800 qede_atomic_hw_err_handler(edev);
2801 set_bit(QEDE_SP_HW_ERR, &edev->sp_flags);
2802 schedule_delayed_work(&edev->sp_task, 0);
2803
2804 DP_INFO(edev, "Scheduled a error handler [err_type %d]\n", err_type);
2805}
2806
2807static bool qede_is_txq_full(struct qede_dev *edev, struct qede_tx_queue *txq)
2808{
2809 struct netdev_queue *netdev_txq;
2810
2811 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id);
2812 if (netif_xmit_stopped(netdev_txq))
2813 return true;
2814
2815 return false;
2816}
2817
2818static void qede_get_generic_tlv_data(void *dev, struct qed_generic_tlvs *data)
2819{
2820 struct qede_dev *edev = dev;
2821 struct netdev_hw_addr *ha;
2822 int i;
2823
2824 if (edev->ndev->features & NETIF_F_IP_CSUM)
2825 data->feat_flags |= QED_TLV_IP_CSUM;
2826 if (edev->ndev->features & NETIF_F_TSO)
2827 data->feat_flags |= QED_TLV_LSO;
2828
2829 ether_addr_copy(data->mac[0], edev->ndev->dev_addr);
2830 eth_zero_addr(data->mac[1]);
2831 eth_zero_addr(data->mac[2]);
2832 /* Copy the first two UC macs */
2833 netif_addr_lock_bh(edev->ndev);
2834 i = 1;
2835 netdev_for_each_uc_addr(ha, edev->ndev) {
2836 ether_addr_copy(data->mac[i++], ha->addr);
2837 if (i == QED_TLV_MAC_COUNT)
2838 break;
2839 }
2840
2841 netif_addr_unlock_bh(edev->ndev);
2842}
2843
2844static void qede_get_eth_tlv_data(void *dev, void *data)
2845{
2846 struct qed_mfw_tlv_eth *etlv = data;
2847 struct qede_dev *edev = dev;
2848 struct qede_fastpath *fp;
2849 int i;
2850
2851 etlv->lso_maxoff_size = 0XFFFF;
2852 etlv->lso_maxoff_size_set = true;
2853 etlv->lso_minseg_size = (u16)ETH_TX_LSO_WINDOW_MIN_LEN;
2854 etlv->lso_minseg_size_set = true;
2855 etlv->prom_mode = !!(edev->ndev->flags & IFF_PROMISC);
2856 etlv->prom_mode_set = true;
2857 etlv->tx_descr_size = QEDE_TSS_COUNT(edev);
2858 etlv->tx_descr_size_set = true;
2859 etlv->rx_descr_size = QEDE_RSS_COUNT(edev);
2860 etlv->rx_descr_size_set = true;
2861 etlv->iov_offload = QED_MFW_TLV_IOV_OFFLOAD_VEB;
2862 etlv->iov_offload_set = true;
2863
2864 /* Fill information regarding queues; Should be done under the qede
2865 * lock to guarantee those don't change beneath our feet.
2866 */
2867 etlv->txqs_empty = true;
2868 etlv->rxqs_empty = true;
2869 etlv->num_txqs_full = 0;
2870 etlv->num_rxqs_full = 0;
2871
2872 __qede_lock(edev);
2873 for_each_queue(i) {
2874 fp = &edev->fp_array[i];
2875 if (fp->type & QEDE_FASTPATH_TX) {
2876 struct qede_tx_queue *txq = QEDE_FP_TC0_TXQ(fp);
2877
2878 if (txq->sw_tx_cons != txq->sw_tx_prod)
2879 etlv->txqs_empty = false;
2880 if (qede_is_txq_full(edev, txq))
2881 etlv->num_txqs_full++;
2882 }
2883 if (fp->type & QEDE_FASTPATH_RX) {
2884 if (qede_has_rx_work(fp->rxq))
2885 etlv->rxqs_empty = false;
2886
2887 /* This one is a bit tricky; Firmware might stop
2888 * placing packets if ring is not yet full.
2889 * Give an approximation.
2890 */
2891 if (le16_to_cpu(*fp->rxq->hw_cons_ptr) -
2892 qed_chain_get_cons_idx(&fp->rxq->rx_comp_ring) >
2893 RX_RING_SIZE - 100)
2894 etlv->num_rxqs_full++;
2895 }
2896 }
2897 __qede_unlock(edev);
2898
2899 etlv->txqs_empty_set = true;
2900 etlv->rxqs_empty_set = true;
2901 etlv->num_txqs_full_set = true;
2902 etlv->num_rxqs_full_set = true;
2903}
2904
2905/**
2906 * qede_io_error_detected(): Called when PCI error is detected
2907 *
2908 * @pdev: Pointer to PCI device
2909 * @state: The current pci connection state
2910 *
2911 *Return: pci_ers_result_t.
2912 *
2913 * This function is called after a PCI bus error affecting
2914 * this device has been detected.
2915 */
2916static pci_ers_result_t
2917qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
2918{
2919 struct net_device *dev = pci_get_drvdata(pdev);
2920 struct qede_dev *edev = netdev_priv(dev);
2921
2922 if (!edev)
2923 return PCI_ERS_RESULT_NONE;
2924
2925 DP_NOTICE(edev, "IO error detected [%d]\n", state);
2926
2927 __qede_lock(edev);
2928 if (edev->state == QEDE_STATE_RECOVERY) {
2929 DP_NOTICE(edev, "Device already in the recovery state\n");
2930 __qede_unlock(edev);
2931 return PCI_ERS_RESULT_NONE;
2932 }
2933
2934 /* PF handles the recovery of its VFs */
2935 if (IS_VF(edev)) {
2936 DP_VERBOSE(edev, QED_MSG_IOV,
2937 "VF recovery is handled by its PF\n");
2938 __qede_unlock(edev);
2939 return PCI_ERS_RESULT_RECOVERED;
2940 }
2941
2942 /* Close OS Tx */
2943 netif_tx_disable(edev->ndev);
2944 netif_carrier_off(edev->ndev);
2945
2946 set_bit(QEDE_SP_AER, &edev->sp_flags);
2947 schedule_delayed_work(&edev->sp_task, 0);
2948
2949 __qede_unlock(edev);
2950
2951 return PCI_ERS_RESULT_CAN_RECOVER;
2952}
1/* QLogic qede NIC Driver
2* Copyright (c) 2015 QLogic Corporation
3*
4* This software is available under the terms of the GNU General Public License
5* (GPL) Version 2, available from the file COPYING in the main directory of
6* this source tree.
7*/
8
9#include <linux/module.h>
10#include <linux/pci.h>
11#include <linux/version.h>
12#include <linux/device.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/skbuff.h>
16#include <linux/errno.h>
17#include <linux/list.h>
18#include <linux/string.h>
19#include <linux/dma-mapping.h>
20#include <linux/interrupt.h>
21#include <asm/byteorder.h>
22#include <asm/param.h>
23#include <linux/io.h>
24#include <linux/netdev_features.h>
25#include <linux/udp.h>
26#include <linux/tcp.h>
27#include <net/udp_tunnel.h>
28#include <linux/ip.h>
29#include <net/ipv6.h>
30#include <net/tcp.h>
31#include <linux/if_ether.h>
32#include <linux/if_vlan.h>
33#include <linux/pkt_sched.h>
34#include <linux/ethtool.h>
35#include <linux/in.h>
36#include <linux/random.h>
37#include <net/ip6_checksum.h>
38#include <linux/bitops.h>
39#include <linux/qed/qede_roce.h>
40#include "qede.h"
41
42static char version[] =
43 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
44
45MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
46MODULE_LICENSE("GPL");
47MODULE_VERSION(DRV_MODULE_VERSION);
48
49static uint debug;
50module_param(debug, uint, 0);
51MODULE_PARM_DESC(debug, " Default debug msglevel");
52
53static const struct qed_eth_ops *qed_ops;
54
55#define CHIP_NUM_57980S_40 0x1634
56#define CHIP_NUM_57980S_10 0x1666
57#define CHIP_NUM_57980S_MF 0x1636
58#define CHIP_NUM_57980S_100 0x1644
59#define CHIP_NUM_57980S_50 0x1654
60#define CHIP_NUM_57980S_25 0x1656
61#define CHIP_NUM_57980S_IOV 0x1664
62
63#ifndef PCI_DEVICE_ID_NX2_57980E
64#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
65#define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
66#define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
67#define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
68#define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
69#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
70#define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV
71#endif
72
73enum qede_pci_private {
74 QEDE_PRIVATE_PF,
75 QEDE_PRIVATE_VF
76};
77
78static const struct pci_device_id qede_pci_tbl[] = {
79 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF},
80 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF},
81 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF},
82 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
83 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
84 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
85#ifdef CONFIG_QED_SRIOV
86 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
87#endif
88 { 0 }
89};
90
91MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
92
93static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
94
95#define TX_TIMEOUT (5 * HZ)
96
97/* Utilize last protocol index for XDP */
98#define XDP_PI 11
99
100static void qede_remove(struct pci_dev *pdev);
101static void qede_shutdown(struct pci_dev *pdev);
102static void qede_link_update(void *dev, struct qed_link_output *link);
103
104/* The qede lock is used to protect driver state change and driver flows that
105 * are not reentrant.
106 */
107void __qede_lock(struct qede_dev *edev)
108{
109 mutex_lock(&edev->qede_lock);
110}
111
112void __qede_unlock(struct qede_dev *edev)
113{
114 mutex_unlock(&edev->qede_lock);
115}
116
117#ifdef CONFIG_QED_SRIOV
118static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos,
119 __be16 vlan_proto)
120{
121 struct qede_dev *edev = netdev_priv(ndev);
122
123 if (vlan > 4095) {
124 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan);
125 return -EINVAL;
126 }
127
128 if (vlan_proto != htons(ETH_P_8021Q))
129 return -EPROTONOSUPPORT;
130
131 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n",
132 vlan, vf);
133
134 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf);
135}
136
137static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac)
138{
139 struct qede_dev *edev = netdev_priv(ndev);
140
141 DP_VERBOSE(edev, QED_MSG_IOV,
142 "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n",
143 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx);
144
145 if (!is_valid_ether_addr(mac)) {
146 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n");
147 return -EINVAL;
148 }
149
150 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx);
151}
152
153static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)
154{
155 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev));
156 struct qed_dev_info *qed_info = &edev->dev_info.common;
157 int rc;
158
159 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param);
160
161 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param);
162
163 /* Enable/Disable Tx switching for PF */
164 if ((rc == num_vfs_param) && netif_running(edev->ndev) &&
165 qed_info->mf_mode != QED_MF_NPAR && qed_info->tx_switching) {
166 struct qed_update_vport_params params;
167
168 memset(¶ms, 0, sizeof(params));
169 params.vport_id = 0;
170 params.update_tx_switching_flg = 1;
171 params.tx_switching_flg = num_vfs_param ? 1 : 0;
172 edev->ops->vport_update(edev->cdev, ¶ms);
173 }
174
175 return rc;
176}
177#endif
178
179static struct pci_driver qede_pci_driver = {
180 .name = "qede",
181 .id_table = qede_pci_tbl,
182 .probe = qede_probe,
183 .remove = qede_remove,
184 .shutdown = qede_shutdown,
185#ifdef CONFIG_QED_SRIOV
186 .sriov_configure = qede_sriov_configure,
187#endif
188};
189
190static void qede_force_mac(void *dev, u8 *mac, bool forced)
191{
192 struct qede_dev *edev = dev;
193
194 /* MAC hints take effect only if we haven't set one already */
195 if (is_valid_ether_addr(edev->ndev->dev_addr) && !forced)
196 return;
197
198 ether_addr_copy(edev->ndev->dev_addr, mac);
199 ether_addr_copy(edev->primary_mac, mac);
200}
201
202static struct qed_eth_cb_ops qede_ll_ops = {
203 {
204 .link_update = qede_link_update,
205 },
206 .force_mac = qede_force_mac,
207};
208
209static int qede_netdev_event(struct notifier_block *this, unsigned long event,
210 void *ptr)
211{
212 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
213 struct ethtool_drvinfo drvinfo;
214 struct qede_dev *edev;
215
216 if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR)
217 goto done;
218
219 /* Check whether this is a qede device */
220 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
221 goto done;
222
223 memset(&drvinfo, 0, sizeof(drvinfo));
224 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
225 if (strcmp(drvinfo.driver, "qede"))
226 goto done;
227 edev = netdev_priv(ndev);
228
229 switch (event) {
230 case NETDEV_CHANGENAME:
231 /* Notify qed of the name change */
232 if (!edev->ops || !edev->ops->common)
233 goto done;
234 edev->ops->common->set_id(edev->cdev, edev->ndev->name, "qede");
235 break;
236 case NETDEV_CHANGEADDR:
237 edev = netdev_priv(ndev);
238 qede_roce_event_changeaddr(edev);
239 break;
240 }
241
242done:
243 return NOTIFY_DONE;
244}
245
246static struct notifier_block qede_netdev_notifier = {
247 .notifier_call = qede_netdev_event,
248};
249
250static
251int __init qede_init(void)
252{
253 int ret;
254
255 pr_info("qede_init: %s\n", version);
256
257 qed_ops = qed_get_eth_ops();
258 if (!qed_ops) {
259 pr_notice("Failed to get qed ethtool operations\n");
260 return -EINVAL;
261 }
262
263 /* Must register notifier before pci ops, since we might miss
264 * interface rename after pci probe and netdev registeration.
265 */
266 ret = register_netdevice_notifier(&qede_netdev_notifier);
267 if (ret) {
268 pr_notice("Failed to register netdevice_notifier\n");
269 qed_put_eth_ops();
270 return -EINVAL;
271 }
272
273 ret = pci_register_driver(&qede_pci_driver);
274 if (ret) {
275 pr_notice("Failed to register driver\n");
276 unregister_netdevice_notifier(&qede_netdev_notifier);
277 qed_put_eth_ops();
278 return -EINVAL;
279 }
280
281 return 0;
282}
283
284static void __exit qede_cleanup(void)
285{
286 if (debug & QED_LOG_INFO_MASK)
287 pr_info("qede_cleanup called\n");
288
289 unregister_netdevice_notifier(&qede_netdev_notifier);
290 pci_unregister_driver(&qede_pci_driver);
291 qed_put_eth_ops();
292}
293
294module_init(qede_init);
295module_exit(qede_cleanup);
296
297/* -------------------------------------------------------------------------
298 * START OF FAST-PATH
299 * -------------------------------------------------------------------------
300 */
301
302/* Unmap the data and free skb */
303static int qede_free_tx_pkt(struct qede_dev *edev,
304 struct qede_tx_queue *txq, int *len)
305{
306 u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
307 struct sk_buff *skb = txq->sw_tx_ring.skbs[idx].skb;
308 struct eth_tx_1st_bd *first_bd;
309 struct eth_tx_bd *tx_data_bd;
310 int bds_consumed = 0;
311 int nbds;
312 bool data_split = txq->sw_tx_ring.skbs[idx].flags & QEDE_TSO_SPLIT_BD;
313 int i, split_bd_len = 0;
314
315 if (unlikely(!skb)) {
316 DP_ERR(edev,
317 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
318 idx, txq->sw_tx_cons, txq->sw_tx_prod);
319 return -1;
320 }
321
322 *len = skb->len;
323
324 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
325
326 bds_consumed++;
327
328 nbds = first_bd->data.nbds;
329
330 if (data_split) {
331 struct eth_tx_bd *split = (struct eth_tx_bd *)
332 qed_chain_consume(&txq->tx_pbl);
333 split_bd_len = BD_UNMAP_LEN(split);
334 bds_consumed++;
335 }
336 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
337 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
338
339 /* Unmap the data of the skb frags */
340 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
341 tx_data_bd = (struct eth_tx_bd *)
342 qed_chain_consume(&txq->tx_pbl);
343 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
344 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
345 }
346
347 while (bds_consumed++ < nbds)
348 qed_chain_consume(&txq->tx_pbl);
349
350 /* Free skb */
351 dev_kfree_skb_any(skb);
352 txq->sw_tx_ring.skbs[idx].skb = NULL;
353 txq->sw_tx_ring.skbs[idx].flags = 0;
354
355 return 0;
356}
357
358/* Unmap the data and free skb when mapping failed during start_xmit */
359static void qede_free_failed_tx_pkt(struct qede_tx_queue *txq,
360 struct eth_tx_1st_bd *first_bd,
361 int nbd, bool data_split)
362{
363 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
364 struct sk_buff *skb = txq->sw_tx_ring.skbs[idx].skb;
365 struct eth_tx_bd *tx_data_bd;
366 int i, split_bd_len = 0;
367
368 /* Return prod to its position before this skb was handled */
369 qed_chain_set_prod(&txq->tx_pbl,
370 le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
371
372 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
373
374 if (data_split) {
375 struct eth_tx_bd *split = (struct eth_tx_bd *)
376 qed_chain_produce(&txq->tx_pbl);
377 split_bd_len = BD_UNMAP_LEN(split);
378 nbd--;
379 }
380
381 dma_unmap_single(txq->dev, BD_UNMAP_ADDR(first_bd),
382 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
383
384 /* Unmap the data of the skb frags */
385 for (i = 0; i < nbd; i++) {
386 tx_data_bd = (struct eth_tx_bd *)
387 qed_chain_produce(&txq->tx_pbl);
388 if (tx_data_bd->nbytes)
389 dma_unmap_page(txq->dev,
390 BD_UNMAP_ADDR(tx_data_bd),
391 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
392 }
393
394 /* Return again prod to its position before this skb was handled */
395 qed_chain_set_prod(&txq->tx_pbl,
396 le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
397
398 /* Free skb */
399 dev_kfree_skb_any(skb);
400 txq->sw_tx_ring.skbs[idx].skb = NULL;
401 txq->sw_tx_ring.skbs[idx].flags = 0;
402}
403
404static u32 qede_xmit_type(struct sk_buff *skb, int *ipv6_ext)
405{
406 u32 rc = XMIT_L4_CSUM;
407 __be16 l3_proto;
408
409 if (skb->ip_summed != CHECKSUM_PARTIAL)
410 return XMIT_PLAIN;
411
412 l3_proto = vlan_get_protocol(skb);
413 if (l3_proto == htons(ETH_P_IPV6) &&
414 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
415 *ipv6_ext = 1;
416
417 if (skb->encapsulation) {
418 rc |= XMIT_ENC;
419 if (skb_is_gso(skb)) {
420 unsigned short gso_type = skb_shinfo(skb)->gso_type;
421
422 if ((gso_type & SKB_GSO_UDP_TUNNEL_CSUM) ||
423 (gso_type & SKB_GSO_GRE_CSUM))
424 rc |= XMIT_ENC_GSO_L4_CSUM;
425
426 rc |= XMIT_LSO;
427 return rc;
428 }
429 }
430
431 if (skb_is_gso(skb))
432 rc |= XMIT_LSO;
433
434 return rc;
435}
436
437static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
438 struct eth_tx_2nd_bd *second_bd,
439 struct eth_tx_3rd_bd *third_bd)
440{
441 u8 l4_proto;
442 u16 bd2_bits1 = 0, bd2_bits2 = 0;
443
444 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
445
446 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
447 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
448 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
449
450 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
451 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
452
453 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
454 l4_proto = ipv6_hdr(skb)->nexthdr;
455 else
456 l4_proto = ip_hdr(skb)->protocol;
457
458 if (l4_proto == IPPROTO_UDP)
459 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
460
461 if (third_bd)
462 third_bd->data.bitfields |=
463 cpu_to_le16(((tcp_hdrlen(skb) / 4) &
464 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
465 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
466
467 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
468 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
469}
470
471static int map_frag_to_bd(struct qede_tx_queue *txq,
472 skb_frag_t *frag, struct eth_tx_bd *bd)
473{
474 dma_addr_t mapping;
475
476 /* Map skb non-linear frag data for DMA */
477 mapping = skb_frag_dma_map(txq->dev, frag, 0,
478 skb_frag_size(frag), DMA_TO_DEVICE);
479 if (unlikely(dma_mapping_error(txq->dev, mapping)))
480 return -ENOMEM;
481
482 /* Setup the data pointer of the frag data */
483 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
484
485 return 0;
486}
487
488static u16 qede_get_skb_hlen(struct sk_buff *skb, bool is_encap_pkt)
489{
490 if (is_encap_pkt)
491 return (skb_inner_transport_header(skb) +
492 inner_tcp_hdrlen(skb) - skb->data);
493 else
494 return (skb_transport_header(skb) +
495 tcp_hdrlen(skb) - skb->data);
496}
497
498/* +2 for 1st BD for headers and 2nd BD for headlen (if required) */
499#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
500static bool qede_pkt_req_lin(struct sk_buff *skb, u8 xmit_type)
501{
502 int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
503
504 if (xmit_type & XMIT_LSO) {
505 int hlen;
506
507 hlen = qede_get_skb_hlen(skb, xmit_type & XMIT_ENC);
508
509 /* linear payload would require its own BD */
510 if (skb_headlen(skb) > hlen)
511 allowed_frags--;
512 }
513
514 return (skb_shinfo(skb)->nr_frags > allowed_frags);
515}
516#endif
517
518static inline void qede_update_tx_producer(struct qede_tx_queue *txq)
519{
520 /* wmb makes sure that the BDs data is updated before updating the
521 * producer, otherwise FW may read old data from the BDs.
522 */
523 wmb();
524 barrier();
525 writel(txq->tx_db.raw, txq->doorbell_addr);
526
527 /* mmiowb is needed to synchronize doorbell writes from more than one
528 * processor. It guarantees that the write arrives to the device before
529 * the queue lock is released and another start_xmit is called (possibly
530 * on another CPU). Without this barrier, the next doorbell can bypass
531 * this doorbell. This is applicable to IA64/Altix systems.
532 */
533 mmiowb();
534}
535
536static int qede_xdp_xmit(struct qede_dev *edev, struct qede_fastpath *fp,
537 struct sw_rx_data *metadata, u16 padding, u16 length)
538{
539 struct qede_tx_queue *txq = fp->xdp_tx;
540 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
541 struct eth_tx_1st_bd *first_bd;
542
543 if (!qed_chain_get_elem_left(&txq->tx_pbl)) {
544 txq->stopped_cnt++;
545 return -ENOMEM;
546 }
547
548 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
549
550 memset(first_bd, 0, sizeof(*first_bd));
551 first_bd->data.bd_flags.bitfields =
552 BIT(ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT);
553 first_bd->data.bitfields |=
554 (length & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
555 ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
556 first_bd->data.nbds = 1;
557
558 /* We can safely ignore the offset, as it's 0 for XDP */
559 BD_SET_UNMAP_ADDR_LEN(first_bd, metadata->mapping + padding, length);
560
561 /* Synchronize the buffer back to device, as program [probably]
562 * has changed it.
563 */
564 dma_sync_single_for_device(&edev->pdev->dev,
565 metadata->mapping + padding,
566 length, PCI_DMA_TODEVICE);
567
568 txq->sw_tx_ring.pages[idx] = metadata->data;
569 txq->sw_tx_prod++;
570
571 /* Mark the fastpath for future XDP doorbell */
572 fp->xdp_xmit = 1;
573
574 return 0;
575}
576
577/* Main transmit function */
578static netdev_tx_t qede_start_xmit(struct sk_buff *skb,
579 struct net_device *ndev)
580{
581 struct qede_dev *edev = netdev_priv(ndev);
582 struct netdev_queue *netdev_txq;
583 struct qede_tx_queue *txq;
584 struct eth_tx_1st_bd *first_bd;
585 struct eth_tx_2nd_bd *second_bd = NULL;
586 struct eth_tx_3rd_bd *third_bd = NULL;
587 struct eth_tx_bd *tx_data_bd = NULL;
588 u16 txq_index;
589 u8 nbd = 0;
590 dma_addr_t mapping;
591 int rc, frag_idx = 0, ipv6_ext = 0;
592 u8 xmit_type;
593 u16 idx;
594 u16 hlen;
595 bool data_split = false;
596
597 /* Get tx-queue context and netdev index */
598 txq_index = skb_get_queue_mapping(skb);
599 WARN_ON(txq_index >= QEDE_TSS_COUNT(edev));
600 txq = edev->fp_array[edev->fp_num_rx + txq_index].txq;
601 netdev_txq = netdev_get_tx_queue(ndev, txq_index);
602
603 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) < (MAX_SKB_FRAGS + 1));
604
605 xmit_type = qede_xmit_type(skb, &ipv6_ext);
606
607#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
608 if (qede_pkt_req_lin(skb, xmit_type)) {
609 if (skb_linearize(skb)) {
610 DP_NOTICE(edev,
611 "SKB linearization failed - silently dropping this SKB\n");
612 dev_kfree_skb_any(skb);
613 return NETDEV_TX_OK;
614 }
615 }
616#endif
617
618 /* Fill the entry in the SW ring and the BDs in the FW ring */
619 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
620 txq->sw_tx_ring.skbs[idx].skb = skb;
621 first_bd = (struct eth_tx_1st_bd *)
622 qed_chain_produce(&txq->tx_pbl);
623 memset(first_bd, 0, sizeof(*first_bd));
624 first_bd->data.bd_flags.bitfields =
625 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
626
627 /* Map skb linear data for DMA and set in the first BD */
628 mapping = dma_map_single(txq->dev, skb->data,
629 skb_headlen(skb), DMA_TO_DEVICE);
630 if (unlikely(dma_mapping_error(txq->dev, mapping))) {
631 DP_NOTICE(edev, "SKB mapping failed\n");
632 qede_free_failed_tx_pkt(txq, first_bd, 0, false);
633 qede_update_tx_producer(txq);
634 return NETDEV_TX_OK;
635 }
636 nbd++;
637 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
638
639 /* In case there is IPv6 with extension headers or LSO we need 2nd and
640 * 3rd BDs.
641 */
642 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
643 second_bd = (struct eth_tx_2nd_bd *)
644 qed_chain_produce(&txq->tx_pbl);
645 memset(second_bd, 0, sizeof(*second_bd));
646
647 nbd++;
648 third_bd = (struct eth_tx_3rd_bd *)
649 qed_chain_produce(&txq->tx_pbl);
650 memset(third_bd, 0, sizeof(*third_bd));
651
652 nbd++;
653 /* We need to fill in additional data in second_bd... */
654 tx_data_bd = (struct eth_tx_bd *)second_bd;
655 }
656
657 if (skb_vlan_tag_present(skb)) {
658 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
659 first_bd->data.bd_flags.bitfields |=
660 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
661 }
662
663 /* Fill the parsing flags & params according to the requested offload */
664 if (xmit_type & XMIT_L4_CSUM) {
665 /* We don't re-calculate IP checksum as it is already done by
666 * the upper stack
667 */
668 first_bd->data.bd_flags.bitfields |=
669 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
670
671 if (xmit_type & XMIT_ENC) {
672 first_bd->data.bd_flags.bitfields |=
673 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
674 first_bd->data.bitfields |=
675 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT;
676 }
677
678 /* Legacy FW had flipped behavior in regard to this bit -
679 * I.e., needed to set to prevent FW from touching encapsulated
680 * packets when it didn't need to.
681 */
682 if (unlikely(txq->is_legacy))
683 first_bd->data.bitfields ^=
684 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT;
685
686 /* If the packet is IPv6 with extension header, indicate that
687 * to FW and pass few params, since the device cracker doesn't
688 * support parsing IPv6 with extension header/s.
689 */
690 if (unlikely(ipv6_ext))
691 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
692 }
693
694 if (xmit_type & XMIT_LSO) {
695 first_bd->data.bd_flags.bitfields |=
696 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
697 third_bd->data.lso_mss =
698 cpu_to_le16(skb_shinfo(skb)->gso_size);
699
700 if (unlikely(xmit_type & XMIT_ENC)) {
701 first_bd->data.bd_flags.bitfields |=
702 1 << ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT;
703
704 if (xmit_type & XMIT_ENC_GSO_L4_CSUM) {
705 u8 tmp = ETH_TX_1ST_BD_FLAGS_TUNN_L4_CSUM_SHIFT;
706
707 first_bd->data.bd_flags.bitfields |= 1 << tmp;
708 }
709 hlen = qede_get_skb_hlen(skb, true);
710 } else {
711 first_bd->data.bd_flags.bitfields |=
712 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
713 hlen = qede_get_skb_hlen(skb, false);
714 }
715
716 /* @@@TBD - if will not be removed need to check */
717 third_bd->data.bitfields |=
718 cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT));
719
720 /* Make life easier for FW guys who can't deal with header and
721 * data on same BD. If we need to split, use the second bd...
722 */
723 if (unlikely(skb_headlen(skb) > hlen)) {
724 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
725 "TSO split header size is %d (%x:%x)\n",
726 first_bd->nbytes, first_bd->addr.hi,
727 first_bd->addr.lo);
728
729 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
730 le32_to_cpu(first_bd->addr.lo)) +
731 hlen;
732
733 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
734 le16_to_cpu(first_bd->nbytes) -
735 hlen);
736
737 /* this marks the BD as one that has no
738 * individual mapping
739 */
740 txq->sw_tx_ring.skbs[idx].flags |= QEDE_TSO_SPLIT_BD;
741
742 first_bd->nbytes = cpu_to_le16(hlen);
743
744 tx_data_bd = (struct eth_tx_bd *)third_bd;
745 data_split = true;
746 }
747 } else {
748 first_bd->data.bitfields |=
749 (skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
750 ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
751 }
752
753 /* Handle fragmented skb */
754 /* special handle for frags inside 2nd and 3rd bds.. */
755 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
756 rc = map_frag_to_bd(txq,
757 &skb_shinfo(skb)->frags[frag_idx],
758 tx_data_bd);
759 if (rc) {
760 qede_free_failed_tx_pkt(txq, first_bd, nbd, data_split);
761 qede_update_tx_producer(txq);
762 return NETDEV_TX_OK;
763 }
764
765 if (tx_data_bd == (struct eth_tx_bd *)second_bd)
766 tx_data_bd = (struct eth_tx_bd *)third_bd;
767 else
768 tx_data_bd = NULL;
769
770 frag_idx++;
771 }
772
773 /* map last frags into 4th, 5th .... */
774 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
775 tx_data_bd = (struct eth_tx_bd *)
776 qed_chain_produce(&txq->tx_pbl);
777
778 memset(tx_data_bd, 0, sizeof(*tx_data_bd));
779
780 rc = map_frag_to_bd(txq,
781 &skb_shinfo(skb)->frags[frag_idx],
782 tx_data_bd);
783 if (rc) {
784 qede_free_failed_tx_pkt(txq, first_bd, nbd, data_split);
785 qede_update_tx_producer(txq);
786 return NETDEV_TX_OK;
787 }
788 }
789
790 /* update the first BD with the actual num BDs */
791 first_bd->data.nbds = nbd;
792
793 netdev_tx_sent_queue(netdev_txq, skb->len);
794
795 skb_tx_timestamp(skb);
796
797 /* Advance packet producer only before sending the packet since mapping
798 * of pages may fail.
799 */
800 txq->sw_tx_prod++;
801
802 /* 'next page' entries are counted in the producer value */
803 txq->tx_db.data.bd_prod =
804 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
805
806 if (!skb->xmit_more || netif_xmit_stopped(netdev_txq))
807 qede_update_tx_producer(txq);
808
809 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
810 < (MAX_SKB_FRAGS + 1))) {
811 if (skb->xmit_more)
812 qede_update_tx_producer(txq);
813
814 netif_tx_stop_queue(netdev_txq);
815 txq->stopped_cnt++;
816 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
817 "Stop queue was called\n");
818 /* paired memory barrier is in qede_tx_int(), we have to keep
819 * ordering of set_bit() in netif_tx_stop_queue() and read of
820 * fp->bd_tx_cons
821 */
822 smp_mb();
823
824 if (qed_chain_get_elem_left(&txq->tx_pbl)
825 >= (MAX_SKB_FRAGS + 1) &&
826 (edev->state == QEDE_STATE_OPEN)) {
827 netif_tx_wake_queue(netdev_txq);
828 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
829 "Wake queue was called\n");
830 }
831 }
832
833 return NETDEV_TX_OK;
834}
835
836int qede_txq_has_work(struct qede_tx_queue *txq)
837{
838 u16 hw_bd_cons;
839
840 /* Tell compiler that consumer and producer can change */
841 barrier();
842 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
843 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
844 return 0;
845
846 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
847}
848
849static void qede_xdp_tx_int(struct qede_dev *edev, struct qede_tx_queue *txq)
850{
851 struct eth_tx_1st_bd *bd;
852 u16 hw_bd_cons;
853
854 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
855 barrier();
856
857 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
858 bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
859
860 dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(bd),
861 PAGE_SIZE, DMA_BIDIRECTIONAL);
862 __free_page(txq->sw_tx_ring.pages[txq->sw_tx_cons &
863 NUM_TX_BDS_MAX]);
864
865 txq->sw_tx_cons++;
866 txq->xmit_pkts++;
867 }
868}
869
870static int qede_tx_int(struct qede_dev *edev, struct qede_tx_queue *txq)
871{
872 struct netdev_queue *netdev_txq;
873 u16 hw_bd_cons;
874 unsigned int pkts_compl = 0, bytes_compl = 0;
875 int rc;
876
877 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
878
879 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
880 barrier();
881
882 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
883 int len = 0;
884
885 rc = qede_free_tx_pkt(edev, txq, &len);
886 if (rc) {
887 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
888 hw_bd_cons,
889 qed_chain_get_cons_idx(&txq->tx_pbl));
890 break;
891 }
892
893 bytes_compl += len;
894 pkts_compl++;
895 txq->sw_tx_cons++;
896 txq->xmit_pkts++;
897 }
898
899 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
900
901 /* Need to make the tx_bd_cons update visible to start_xmit()
902 * before checking for netif_tx_queue_stopped(). Without the
903 * memory barrier, there is a small possibility that
904 * start_xmit() will miss it and cause the queue to be stopped
905 * forever.
906 * On the other hand we need an rmb() here to ensure the proper
907 * ordering of bit testing in the following
908 * netif_tx_queue_stopped(txq) call.
909 */
910 smp_mb();
911
912 if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
913 /* Taking tx_lock is needed to prevent reenabling the queue
914 * while it's empty. This could have happen if rx_action() gets
915 * suspended in qede_tx_int() after the condition before
916 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
917 *
918 * stops the queue->sees fresh tx_bd_cons->releases the queue->
919 * sends some packets consuming the whole queue again->
920 * stops the queue
921 */
922
923 __netif_tx_lock(netdev_txq, smp_processor_id());
924
925 if ((netif_tx_queue_stopped(netdev_txq)) &&
926 (edev->state == QEDE_STATE_OPEN) &&
927 (qed_chain_get_elem_left(&txq->tx_pbl)
928 >= (MAX_SKB_FRAGS + 1))) {
929 netif_tx_wake_queue(netdev_txq);
930 DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
931 "Wake queue was called\n");
932 }
933
934 __netif_tx_unlock(netdev_txq);
935 }
936
937 return 0;
938}
939
940bool qede_has_rx_work(struct qede_rx_queue *rxq)
941{
942 u16 hw_comp_cons, sw_comp_cons;
943
944 /* Tell compiler that status block fields can change */
945 barrier();
946
947 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
948 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
949
950 return hw_comp_cons != sw_comp_cons;
951}
952
953static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq)
954{
955 qed_chain_consume(&rxq->rx_bd_ring);
956 rxq->sw_rx_cons++;
957}
958
959/* This function reuses the buffer(from an offset) from
960 * consumer index to producer index in the bd ring
961 */
962static inline void qede_reuse_page(struct qede_rx_queue *rxq,
963 struct sw_rx_data *curr_cons)
964{
965 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
966 struct sw_rx_data *curr_prod;
967 dma_addr_t new_mapping;
968
969 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
970 *curr_prod = *curr_cons;
971
972 new_mapping = curr_prod->mapping + curr_prod->page_offset;
973
974 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
975 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping));
976
977 rxq->sw_rx_prod++;
978 curr_cons->data = NULL;
979}
980
981/* In case of allocation failures reuse buffers
982 * from consumer index to produce buffers for firmware
983 */
984void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq, u8 count)
985{
986 struct sw_rx_data *curr_cons;
987
988 for (; count > 0; count--) {
989 curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
990 qede_reuse_page(rxq, curr_cons);
991 qede_rx_bd_ring_consume(rxq);
992 }
993}
994
995static int qede_alloc_rx_buffer(struct qede_rx_queue *rxq)
996{
997 struct sw_rx_data *sw_rx_data;
998 struct eth_rx_bd *rx_bd;
999 dma_addr_t mapping;
1000 struct page *data;
1001
1002 data = alloc_pages(GFP_ATOMIC, 0);
1003 if (unlikely(!data))
1004 return -ENOMEM;
1005
1006 /* Map the entire page as it would be used
1007 * for multiple RX buffer segment size mapping.
1008 */
1009 mapping = dma_map_page(rxq->dev, data, 0,
1010 PAGE_SIZE, rxq->data_direction);
1011 if (unlikely(dma_mapping_error(rxq->dev, mapping))) {
1012 __free_page(data);
1013 return -ENOMEM;
1014 }
1015
1016 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
1017 sw_rx_data->page_offset = 0;
1018 sw_rx_data->data = data;
1019 sw_rx_data->mapping = mapping;
1020
1021 /* Advance PROD and get BD pointer */
1022 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
1023 WARN_ON(!rx_bd);
1024 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
1025 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping));
1026
1027 rxq->sw_rx_prod++;
1028
1029 return 0;
1030}
1031
1032static inline int qede_realloc_rx_buffer(struct qede_rx_queue *rxq,
1033 struct sw_rx_data *curr_cons)
1034{
1035 /* Move to the next segment in the page */
1036 curr_cons->page_offset += rxq->rx_buf_seg_size;
1037
1038 if (curr_cons->page_offset == PAGE_SIZE) {
1039 if (unlikely(qede_alloc_rx_buffer(rxq))) {
1040 /* Since we failed to allocate new buffer
1041 * current buffer can be used again.
1042 */
1043 curr_cons->page_offset -= rxq->rx_buf_seg_size;
1044
1045 return -ENOMEM;
1046 }
1047
1048 dma_unmap_page(rxq->dev, curr_cons->mapping,
1049 PAGE_SIZE, rxq->data_direction);
1050 } else {
1051 /* Increment refcount of the page as we don't want
1052 * network stack to take the ownership of the page
1053 * which can be recycled multiple times by the driver.
1054 */
1055 page_ref_inc(curr_cons->data);
1056 qede_reuse_page(rxq, curr_cons);
1057 }
1058
1059 return 0;
1060}
1061
1062void qede_update_rx_prod(struct qede_dev *edev, struct qede_rx_queue *rxq)
1063{
1064 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
1065 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
1066 struct eth_rx_prod_data rx_prods = {0};
1067
1068 /* Update producers */
1069 rx_prods.bd_prod = cpu_to_le16(bd_prod);
1070 rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
1071
1072 /* Make sure that the BD and SGE data is updated before updating the
1073 * producers since FW might read the BD/SGE right after the producer
1074 * is updated.
1075 */
1076 wmb();
1077
1078 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
1079 (u32 *)&rx_prods);
1080
1081 /* mmiowb is needed to synchronize doorbell writes from more than one
1082 * processor. It guarantees that the write arrives to the device before
1083 * the napi lock is released and another qede_poll is called (possibly
1084 * on another CPU). Without this barrier, the next doorbell can bypass
1085 * this doorbell. This is applicable to IA64/Altix systems.
1086 */
1087 mmiowb();
1088}
1089
1090static void qede_get_rxhash(struct sk_buff *skb, u8 bitfields, __le32 rss_hash)
1091{
1092 enum pkt_hash_types hash_type = PKT_HASH_TYPE_NONE;
1093 enum rss_hash_type htype;
1094 u32 hash = 0;
1095
1096 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
1097 if (htype) {
1098 hash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
1099 (htype == RSS_HASH_TYPE_IPV6)) ?
1100 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
1101 hash = le32_to_cpu(rss_hash);
1102 }
1103 skb_set_hash(skb, hash, hash_type);
1104}
1105
1106static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
1107{
1108 skb_checksum_none_assert(skb);
1109
1110 if (csum_flag & QEDE_CSUM_UNNECESSARY)
1111 skb->ip_summed = CHECKSUM_UNNECESSARY;
1112
1113 if (csum_flag & QEDE_TUNN_CSUM_UNNECESSARY)
1114 skb->csum_level = 1;
1115}
1116
1117static inline void qede_skb_receive(struct qede_dev *edev,
1118 struct qede_fastpath *fp,
1119 struct qede_rx_queue *rxq,
1120 struct sk_buff *skb, u16 vlan_tag)
1121{
1122 if (vlan_tag)
1123 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
1124
1125 napi_gro_receive(&fp->napi, skb);
1126 fp->rxq->rcv_pkts++;
1127}
1128
1129static void qede_set_gro_params(struct qede_dev *edev,
1130 struct sk_buff *skb,
1131 struct eth_fast_path_rx_tpa_start_cqe *cqe)
1132{
1133 u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
1134
1135 if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
1136 PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
1137 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
1138 else
1139 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1140
1141 skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
1142 cqe->header_len;
1143}
1144
1145static int qede_fill_frag_skb(struct qede_dev *edev,
1146 struct qede_rx_queue *rxq,
1147 u8 tpa_agg_index, u16 len_on_bd)
1148{
1149 struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
1150 NUM_RX_BDS_MAX];
1151 struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
1152 struct sk_buff *skb = tpa_info->skb;
1153
1154 if (unlikely(tpa_info->state != QEDE_AGG_STATE_START))
1155 goto out;
1156
1157 /* Add one frag and update the appropriate fields in the skb */
1158 skb_fill_page_desc(skb, tpa_info->frag_id++,
1159 current_bd->data, current_bd->page_offset,
1160 len_on_bd);
1161
1162 if (unlikely(qede_realloc_rx_buffer(rxq, current_bd))) {
1163 /* Incr page ref count to reuse on allocation failure
1164 * so that it doesn't get freed while freeing SKB.
1165 */
1166 page_ref_inc(current_bd->data);
1167 goto out;
1168 }
1169
1170 qed_chain_consume(&rxq->rx_bd_ring);
1171 rxq->sw_rx_cons++;
1172
1173 skb->data_len += len_on_bd;
1174 skb->truesize += rxq->rx_buf_seg_size;
1175 skb->len += len_on_bd;
1176
1177 return 0;
1178
1179out:
1180 tpa_info->state = QEDE_AGG_STATE_ERROR;
1181 qede_recycle_rx_bd_ring(rxq, 1);
1182
1183 return -ENOMEM;
1184}
1185
1186static void qede_tpa_start(struct qede_dev *edev,
1187 struct qede_rx_queue *rxq,
1188 struct eth_fast_path_rx_tpa_start_cqe *cqe)
1189{
1190 struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1191 struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring);
1192 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
1193 struct sw_rx_data *replace_buf = &tpa_info->buffer;
1194 dma_addr_t mapping = tpa_info->buffer_mapping;
1195 struct sw_rx_data *sw_rx_data_cons;
1196 struct sw_rx_data *sw_rx_data_prod;
1197
1198 sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
1199 sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
1200
1201 /* Use pre-allocated replacement buffer - we can't release the agg.
1202 * start until its over and we don't want to risk allocation failing
1203 * here, so re-allocate when aggregation will be over.
1204 */
1205 sw_rx_data_prod->mapping = replace_buf->mapping;
1206
1207 sw_rx_data_prod->data = replace_buf->data;
1208 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping));
1209 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping));
1210 sw_rx_data_prod->page_offset = replace_buf->page_offset;
1211
1212 rxq->sw_rx_prod++;
1213
1214 /* move partial skb from cons to pool (don't unmap yet)
1215 * save mapping, incase we drop the packet later on.
1216 */
1217 tpa_info->buffer = *sw_rx_data_cons;
1218 mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi),
1219 le32_to_cpu(rx_bd_cons->addr.lo));
1220
1221 tpa_info->buffer_mapping = mapping;
1222 rxq->sw_rx_cons++;
1223
1224 /* set tpa state to start only if we are able to allocate skb
1225 * for this aggregation, otherwise mark as error and aggregation will
1226 * be dropped
1227 */
1228 tpa_info->skb = netdev_alloc_skb(edev->ndev,
1229 le16_to_cpu(cqe->len_on_first_bd));
1230 if (unlikely(!tpa_info->skb)) {
1231 DP_NOTICE(edev, "Failed to allocate SKB for gro\n");
1232 tpa_info->state = QEDE_AGG_STATE_ERROR;
1233 goto cons_buf;
1234 }
1235
1236 /* Start filling in the aggregation info */
1237 skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd));
1238 tpa_info->frag_id = 0;
1239 tpa_info->state = QEDE_AGG_STATE_START;
1240
1241 /* Store some information from first CQE */
1242 tpa_info->start_cqe_placement_offset = cqe->placement_offset;
1243 tpa_info->start_cqe_bd_len = le16_to_cpu(cqe->len_on_first_bd);
1244 if ((le16_to_cpu(cqe->pars_flags.flags) >>
1245 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
1246 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
1247 tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
1248 else
1249 tpa_info->vlan_tag = 0;
1250
1251 qede_get_rxhash(tpa_info->skb, cqe->bitfields, cqe->rss_hash);
1252
1253 /* This is needed in order to enable forwarding support */
1254 qede_set_gro_params(edev, tpa_info->skb, cqe);
1255
1256cons_buf: /* We still need to handle bd_len_list to consume buffers */
1257 if (likely(cqe->ext_bd_len_list[0]))
1258 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1259 le16_to_cpu(cqe->ext_bd_len_list[0]));
1260
1261 if (unlikely(cqe->ext_bd_len_list[1])) {
1262 DP_ERR(edev,
1263 "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n");
1264 tpa_info->state = QEDE_AGG_STATE_ERROR;
1265 }
1266}
1267
1268#ifdef CONFIG_INET
1269static void qede_gro_ip_csum(struct sk_buff *skb)
1270{
1271 const struct iphdr *iph = ip_hdr(skb);
1272 struct tcphdr *th;
1273
1274 skb_set_transport_header(skb, sizeof(struct iphdr));
1275 th = tcp_hdr(skb);
1276
1277 th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
1278 iph->saddr, iph->daddr, 0);
1279
1280 tcp_gro_complete(skb);
1281}
1282
1283static void qede_gro_ipv6_csum(struct sk_buff *skb)
1284{
1285 struct ipv6hdr *iph = ipv6_hdr(skb);
1286 struct tcphdr *th;
1287
1288 skb_set_transport_header(skb, sizeof(struct ipv6hdr));
1289 th = tcp_hdr(skb);
1290
1291 th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
1292 &iph->saddr, &iph->daddr, 0);
1293 tcp_gro_complete(skb);
1294}
1295#endif
1296
1297static void qede_gro_receive(struct qede_dev *edev,
1298 struct qede_fastpath *fp,
1299 struct sk_buff *skb,
1300 u16 vlan_tag)
1301{
1302 /* FW can send a single MTU sized packet from gro flow
1303 * due to aggregation timeout/last segment etc. which
1304 * is not expected to be a gro packet. If a skb has zero
1305 * frags then simply push it in the stack as non gso skb.
1306 */
1307 if (unlikely(!skb->data_len)) {
1308 skb_shinfo(skb)->gso_type = 0;
1309 skb_shinfo(skb)->gso_size = 0;
1310 goto send_skb;
1311 }
1312
1313#ifdef CONFIG_INET
1314 if (skb_shinfo(skb)->gso_size) {
1315 skb_reset_network_header(skb);
1316
1317 switch (skb->protocol) {
1318 case htons(ETH_P_IP):
1319 qede_gro_ip_csum(skb);
1320 break;
1321 case htons(ETH_P_IPV6):
1322 qede_gro_ipv6_csum(skb);
1323 break;
1324 default:
1325 DP_ERR(edev,
1326 "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
1327 ntohs(skb->protocol));
1328 }
1329 }
1330#endif
1331
1332send_skb:
1333 skb_record_rx_queue(skb, fp->rxq->rxq_id);
1334 qede_skb_receive(edev, fp, fp->rxq, skb, vlan_tag);
1335}
1336
1337static inline void qede_tpa_cont(struct qede_dev *edev,
1338 struct qede_rx_queue *rxq,
1339 struct eth_fast_path_rx_tpa_cont_cqe *cqe)
1340{
1341 int i;
1342
1343 for (i = 0; cqe->len_list[i]; i++)
1344 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1345 le16_to_cpu(cqe->len_list[i]));
1346
1347 if (unlikely(i > 1))
1348 DP_ERR(edev,
1349 "Strange - TPA cont with more than a single len_list entry\n");
1350}
1351
1352static void qede_tpa_end(struct qede_dev *edev,
1353 struct qede_fastpath *fp,
1354 struct eth_fast_path_rx_tpa_end_cqe *cqe)
1355{
1356 struct qede_rx_queue *rxq = fp->rxq;
1357 struct qede_agg_info *tpa_info;
1358 struct sk_buff *skb;
1359 int i;
1360
1361 tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1362 skb = tpa_info->skb;
1363
1364 for (i = 0; cqe->len_list[i]; i++)
1365 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1366 le16_to_cpu(cqe->len_list[i]));
1367 if (unlikely(i > 1))
1368 DP_ERR(edev,
1369 "Strange - TPA emd with more than a single len_list entry\n");
1370
1371 if (unlikely(tpa_info->state != QEDE_AGG_STATE_START))
1372 goto err;
1373
1374 /* Sanity */
1375 if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
1376 DP_ERR(edev,
1377 "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
1378 cqe->num_of_bds, tpa_info->frag_id);
1379 if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
1380 DP_ERR(edev,
1381 "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
1382 le16_to_cpu(cqe->total_packet_len), skb->len);
1383
1384 memcpy(skb->data,
1385 page_address(tpa_info->buffer.data) +
1386 tpa_info->start_cqe_placement_offset +
1387 tpa_info->buffer.page_offset, tpa_info->start_cqe_bd_len);
1388
1389 /* Finalize the SKB */
1390 skb->protocol = eth_type_trans(skb, edev->ndev);
1391 skb->ip_summed = CHECKSUM_UNNECESSARY;
1392
1393 /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
1394 * to skb_shinfo(skb)->gso_segs
1395 */
1396 NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
1397
1398 qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
1399
1400 tpa_info->state = QEDE_AGG_STATE_NONE;
1401
1402 return;
1403err:
1404 tpa_info->state = QEDE_AGG_STATE_NONE;
1405 dev_kfree_skb_any(tpa_info->skb);
1406 tpa_info->skb = NULL;
1407}
1408
1409static bool qede_tunn_exist(u16 flag)
1410{
1411 return !!(flag & (PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK <<
1412 PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT));
1413}
1414
1415static u8 qede_check_tunn_csum(u16 flag)
1416{
1417 u16 csum_flag = 0;
1418 u8 tcsum = 0;
1419
1420 if (flag & (PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK <<
1421 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT))
1422 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK <<
1423 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT;
1424
1425 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1426 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
1427 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1428 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1429 tcsum = QEDE_TUNN_CSUM_UNNECESSARY;
1430 }
1431
1432 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK <<
1433 PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT |
1434 PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1435 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1436
1437 if (csum_flag & flag)
1438 return QEDE_CSUM_ERROR;
1439
1440 return QEDE_CSUM_UNNECESSARY | tcsum;
1441}
1442
1443static u8 qede_check_notunn_csum(u16 flag)
1444{
1445 u16 csum_flag = 0;
1446 u8 csum = 0;
1447
1448 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1449 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
1450 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1451 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1452 csum = QEDE_CSUM_UNNECESSARY;
1453 }
1454
1455 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1456 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1457
1458 if (csum_flag & flag)
1459 return QEDE_CSUM_ERROR;
1460
1461 return csum;
1462}
1463
1464static u8 qede_check_csum(u16 flag)
1465{
1466 if (!qede_tunn_exist(flag))
1467 return qede_check_notunn_csum(flag);
1468 else
1469 return qede_check_tunn_csum(flag);
1470}
1471
1472static bool qede_pkt_is_ip_fragmented(struct eth_fast_path_rx_reg_cqe *cqe,
1473 u16 flag)
1474{
1475 u8 tun_pars_flg = cqe->tunnel_pars_flags.flags;
1476
1477 if ((tun_pars_flg & (ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_MASK <<
1478 ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_SHIFT)) ||
1479 (flag & (PARSING_AND_ERR_FLAGS_IPV4FRAG_MASK <<
1480 PARSING_AND_ERR_FLAGS_IPV4FRAG_SHIFT)))
1481 return true;
1482
1483 return false;
1484}
1485
1486/* Return true iff packet is to be passed to stack */
1487static bool qede_rx_xdp(struct qede_dev *edev,
1488 struct qede_fastpath *fp,
1489 struct qede_rx_queue *rxq,
1490 struct bpf_prog *prog,
1491 struct sw_rx_data *bd,
1492 struct eth_fast_path_rx_reg_cqe *cqe)
1493{
1494 u16 len = le16_to_cpu(cqe->len_on_first_bd);
1495 struct xdp_buff xdp;
1496 enum xdp_action act;
1497
1498 xdp.data = page_address(bd->data) + cqe->placement_offset;
1499 xdp.data_end = xdp.data + len;
1500
1501 /* Queues always have a full reset currently, so for the time
1502 * being until there's atomic program replace just mark read
1503 * side for map helpers.
1504 */
1505 rcu_read_lock();
1506 act = bpf_prog_run_xdp(prog, &xdp);
1507 rcu_read_unlock();
1508
1509 if (act == XDP_PASS)
1510 return true;
1511
1512 /* Count number of packets not to be passed to stack */
1513 rxq->xdp_no_pass++;
1514
1515 switch (act) {
1516 case XDP_TX:
1517 /* We need the replacement buffer before transmit. */
1518 if (qede_alloc_rx_buffer(rxq)) {
1519 qede_recycle_rx_bd_ring(rxq, 1);
1520 return false;
1521 }
1522
1523 /* Now if there's a transmission problem, we'd still have to
1524 * throw current buffer, as replacement was already allocated.
1525 */
1526 if (qede_xdp_xmit(edev, fp, bd, cqe->placement_offset, len)) {
1527 dma_unmap_page(rxq->dev, bd->mapping,
1528 PAGE_SIZE, DMA_BIDIRECTIONAL);
1529 __free_page(bd->data);
1530 }
1531
1532 /* Regardless, we've consumed an Rx BD */
1533 qede_rx_bd_ring_consume(rxq);
1534 return false;
1535
1536 default:
1537 bpf_warn_invalid_xdp_action(act);
1538 case XDP_ABORTED:
1539 case XDP_DROP:
1540 qede_recycle_rx_bd_ring(rxq, cqe->bd_num);
1541 }
1542
1543 return false;
1544}
1545
1546static struct sk_buff *qede_rx_allocate_skb(struct qede_dev *edev,
1547 struct qede_rx_queue *rxq,
1548 struct sw_rx_data *bd, u16 len,
1549 u16 pad)
1550{
1551 unsigned int offset = bd->page_offset;
1552 struct skb_frag_struct *frag;
1553 struct page *page = bd->data;
1554 unsigned int pull_len;
1555 struct sk_buff *skb;
1556 unsigned char *va;
1557
1558 /* Allocate a new SKB with a sufficient large header len */
1559 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
1560 if (unlikely(!skb))
1561 return NULL;
1562
1563 /* Copy data into SKB - if it's small, we can simply copy it and
1564 * re-use the already allcoated & mapped memory.
1565 */
1566 if (len + pad <= edev->rx_copybreak) {
1567 memcpy(skb_put(skb, len),
1568 page_address(page) + pad + offset, len);
1569 qede_reuse_page(rxq, bd);
1570 goto out;
1571 }
1572
1573 frag = &skb_shinfo(skb)->frags[0];
1574
1575 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
1576 page, pad + offset, len, rxq->rx_buf_seg_size);
1577
1578 va = skb_frag_address(frag);
1579 pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
1580
1581 /* Align the pull_len to optimize memcpy */
1582 memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
1583
1584 /* Correct the skb & frag sizes offset after the pull */
1585 skb_frag_size_sub(frag, pull_len);
1586 frag->page_offset += pull_len;
1587 skb->data_len -= pull_len;
1588 skb->tail += pull_len;
1589
1590 if (unlikely(qede_realloc_rx_buffer(rxq, bd))) {
1591 /* Incr page ref count to reuse on allocation failure so
1592 * that it doesn't get freed while freeing SKB [as its
1593 * already mapped there].
1594 */
1595 page_ref_inc(page);
1596 dev_kfree_skb_any(skb);
1597 return NULL;
1598 }
1599
1600out:
1601 /* We've consumed the first BD and prepared an SKB */
1602 qede_rx_bd_ring_consume(rxq);
1603 return skb;
1604}
1605
1606static int qede_rx_build_jumbo(struct qede_dev *edev,
1607 struct qede_rx_queue *rxq,
1608 struct sk_buff *skb,
1609 struct eth_fast_path_rx_reg_cqe *cqe,
1610 u16 first_bd_len)
1611{
1612 u16 pkt_len = le16_to_cpu(cqe->pkt_len);
1613 struct sw_rx_data *bd;
1614 u16 bd_cons_idx;
1615 u8 num_frags;
1616
1617 pkt_len -= first_bd_len;
1618
1619 /* We've already used one BD for the SKB. Now take care of the rest */
1620 for (num_frags = cqe->bd_num - 1; num_frags > 0; num_frags--) {
1621 u16 cur_size = pkt_len > rxq->rx_buf_size ? rxq->rx_buf_size :
1622 pkt_len;
1623
1624 if (unlikely(!cur_size)) {
1625 DP_ERR(edev,
1626 "Still got %d BDs for mapping jumbo, but length became 0\n",
1627 num_frags);
1628 goto out;
1629 }
1630
1631 /* We need a replacement buffer for each BD */
1632 if (unlikely(qede_alloc_rx_buffer(rxq)))
1633 goto out;
1634
1635 /* Now that we've allocated the replacement buffer,
1636 * we can safely consume the next BD and map it to the SKB.
1637 */
1638 bd_cons_idx = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1639 bd = &rxq->sw_rx_ring[bd_cons_idx];
1640 qede_rx_bd_ring_consume(rxq);
1641
1642 dma_unmap_page(rxq->dev, bd->mapping,
1643 PAGE_SIZE, DMA_FROM_DEVICE);
1644
1645 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags++,
1646 bd->data, 0, cur_size);
1647
1648 skb->truesize += PAGE_SIZE;
1649 skb->data_len += cur_size;
1650 skb->len += cur_size;
1651 pkt_len -= cur_size;
1652 }
1653
1654 if (unlikely(pkt_len))
1655 DP_ERR(edev,
1656 "Mapped all BDs of jumbo, but still have %d bytes\n",
1657 pkt_len);
1658
1659out:
1660 return num_frags;
1661}
1662
1663static int qede_rx_process_tpa_cqe(struct qede_dev *edev,
1664 struct qede_fastpath *fp,
1665 struct qede_rx_queue *rxq,
1666 union eth_rx_cqe *cqe,
1667 enum eth_rx_cqe_type type)
1668{
1669 switch (type) {
1670 case ETH_RX_CQE_TYPE_TPA_START:
1671 qede_tpa_start(edev, rxq, &cqe->fast_path_tpa_start);
1672 return 0;
1673 case ETH_RX_CQE_TYPE_TPA_CONT:
1674 qede_tpa_cont(edev, rxq, &cqe->fast_path_tpa_cont);
1675 return 0;
1676 case ETH_RX_CQE_TYPE_TPA_END:
1677 qede_tpa_end(edev, fp, &cqe->fast_path_tpa_end);
1678 return 1;
1679 default:
1680 return 0;
1681 }
1682}
1683
1684static int qede_rx_process_cqe(struct qede_dev *edev,
1685 struct qede_fastpath *fp,
1686 struct qede_rx_queue *rxq)
1687{
1688 struct bpf_prog *xdp_prog = READ_ONCE(rxq->xdp_prog);
1689 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1690 u16 len, pad, bd_cons_idx, parse_flag;
1691 enum eth_rx_cqe_type cqe_type;
1692 union eth_rx_cqe *cqe;
1693 struct sw_rx_data *bd;
1694 struct sk_buff *skb;
1695 __le16 flags;
1696 u8 csum_flag;
1697
1698 /* Get the CQE from the completion ring */
1699 cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring);
1700 cqe_type = cqe->fast_path_regular.type;
1701
1702 /* Process an unlikely slowpath event */
1703 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
1704 struct eth_slow_path_rx_cqe *sp_cqe;
1705
1706 sp_cqe = (struct eth_slow_path_rx_cqe *)cqe;
1707 edev->ops->eth_cqe_completion(edev->cdev, fp->id, sp_cqe);
1708 return 0;
1709 }
1710
1711 /* Handle TPA cqes */
1712 if (cqe_type != ETH_RX_CQE_TYPE_REGULAR)
1713 return qede_rx_process_tpa_cqe(edev, fp, rxq, cqe, cqe_type);
1714
1715 /* Get the data from the SW ring; Consume it only after it's evident
1716 * we wouldn't recycle it.
1717 */
1718 bd_cons_idx = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1719 bd = &rxq->sw_rx_ring[bd_cons_idx];
1720
1721 fp_cqe = &cqe->fast_path_regular;
1722 len = le16_to_cpu(fp_cqe->len_on_first_bd);
1723 pad = fp_cqe->placement_offset;
1724
1725 /* Run eBPF program if one is attached */
1726 if (xdp_prog)
1727 if (!qede_rx_xdp(edev, fp, rxq, xdp_prog, bd, fp_cqe))
1728 return 1;
1729
1730 /* If this is an error packet then drop it */
1731 flags = cqe->fast_path_regular.pars_flags.flags;
1732 parse_flag = le16_to_cpu(flags);
1733
1734 csum_flag = qede_check_csum(parse_flag);
1735 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
1736 if (qede_pkt_is_ip_fragmented(fp_cqe, parse_flag)) {
1737 rxq->rx_ip_frags++;
1738 } else {
1739 DP_NOTICE(edev,
1740 "CQE has error, flags = %x, dropping incoming packet\n",
1741 parse_flag);
1742 rxq->rx_hw_errors++;
1743 qede_recycle_rx_bd_ring(rxq, fp_cqe->bd_num);
1744 return 0;
1745 }
1746 }
1747
1748 /* Basic validation passed; Need to prepare an SKB. This would also
1749 * guarantee to finally consume the first BD upon success.
1750 */
1751 skb = qede_rx_allocate_skb(edev, rxq, bd, len, pad);
1752 if (!skb) {
1753 rxq->rx_alloc_errors++;
1754 qede_recycle_rx_bd_ring(rxq, fp_cqe->bd_num);
1755 return 0;
1756 }
1757
1758 /* In case of Jumbo packet, several PAGE_SIZEd buffers will be pointed
1759 * by a single cqe.
1760 */
1761 if (fp_cqe->bd_num > 1) {
1762 u16 unmapped_frags = qede_rx_build_jumbo(edev, rxq, skb,
1763 fp_cqe, len);
1764
1765 if (unlikely(unmapped_frags > 0)) {
1766 qede_recycle_rx_bd_ring(rxq, unmapped_frags);
1767 dev_kfree_skb_any(skb);
1768 return 0;
1769 }
1770 }
1771
1772 /* The SKB contains all the data. Now prepare meta-magic */
1773 skb->protocol = eth_type_trans(skb, edev->ndev);
1774 qede_get_rxhash(skb, fp_cqe->bitfields, fp_cqe->rss_hash);
1775 qede_set_skb_csum(skb, csum_flag);
1776 skb_record_rx_queue(skb, rxq->rxq_id);
1777
1778 /* SKB is prepared - pass it to stack */
1779 qede_skb_receive(edev, fp, rxq, skb, le16_to_cpu(fp_cqe->vlan_tag));
1780
1781 return 1;
1782}
1783
1784static int qede_rx_int(struct qede_fastpath *fp, int budget)
1785{
1786 struct qede_rx_queue *rxq = fp->rxq;
1787 struct qede_dev *edev = fp->edev;
1788 u16 hw_comp_cons, sw_comp_cons;
1789 int work_done = 0;
1790
1791 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1792 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1793
1794 /* Memory barrier to prevent the CPU from doing speculative reads of CQE
1795 * / BD in the while-loop before reading hw_comp_cons. If the CQE is
1796 * read before it is written by FW, then FW writes CQE and SB, and then
1797 * the CPU reads the hw_comp_cons, it will use an old CQE.
1798 */
1799 rmb();
1800
1801 /* Loop to complete all indicated BDs */
1802 while ((sw_comp_cons != hw_comp_cons) && (work_done < budget)) {
1803 qede_rx_process_cqe(edev, fp, rxq);
1804 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1805 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1806 work_done++;
1807 }
1808
1809 /* Update producers */
1810 qede_update_rx_prod(edev, rxq);
1811
1812 return work_done;
1813}
1814
1815static bool qede_poll_is_more_work(struct qede_fastpath *fp)
1816{
1817 qed_sb_update_sb_idx(fp->sb_info);
1818
1819 /* *_has_*_work() reads the status block, thus we need to ensure that
1820 * status block indices have been actually read (qed_sb_update_sb_idx)
1821 * prior to this check (*_has_*_work) so that we won't write the
1822 * "newer" value of the status block to HW (if there was a DMA right
1823 * after qede_has_rx_work and if there is no rmb, the memory reading
1824 * (qed_sb_update_sb_idx) may be postponed to right before *_ack_sb).
1825 * In this case there will never be another interrupt until there is
1826 * another update of the status block, while there is still unhandled
1827 * work.
1828 */
1829 rmb();
1830
1831 if (likely(fp->type & QEDE_FASTPATH_RX))
1832 if (qede_has_rx_work(fp->rxq))
1833 return true;
1834
1835 if (fp->type & QEDE_FASTPATH_XDP)
1836 if (qede_txq_has_work(fp->xdp_tx))
1837 return true;
1838
1839 if (likely(fp->type & QEDE_FASTPATH_TX))
1840 if (qede_txq_has_work(fp->txq))
1841 return true;
1842
1843 return false;
1844}
1845
1846static int qede_poll(struct napi_struct *napi, int budget)
1847{
1848 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
1849 napi);
1850 struct qede_dev *edev = fp->edev;
1851 int rx_work_done = 0;
1852
1853 if (likely(fp->type & QEDE_FASTPATH_TX) && qede_txq_has_work(fp->txq))
1854 qede_tx_int(edev, fp->txq);
1855
1856 if ((fp->type & QEDE_FASTPATH_XDP) && qede_txq_has_work(fp->xdp_tx))
1857 qede_xdp_tx_int(edev, fp->xdp_tx);
1858
1859 rx_work_done = (likely(fp->type & QEDE_FASTPATH_RX) &&
1860 qede_has_rx_work(fp->rxq)) ?
1861 qede_rx_int(fp, budget) : 0;
1862 if (rx_work_done < budget) {
1863 if (!qede_poll_is_more_work(fp)) {
1864 napi_complete(napi);
1865
1866 /* Update and reenable interrupts */
1867 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE, 1);
1868 } else {
1869 rx_work_done = budget;
1870 }
1871 }
1872
1873 if (fp->xdp_xmit) {
1874 u16 xdp_prod = qed_chain_get_prod_idx(&fp->xdp_tx->tx_pbl);
1875
1876 fp->xdp_xmit = 0;
1877 fp->xdp_tx->tx_db.data.bd_prod = cpu_to_le16(xdp_prod);
1878 qede_update_tx_producer(fp->xdp_tx);
1879 }
1880
1881 return rx_work_done;
1882}
1883
1884static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
1885{
1886 struct qede_fastpath *fp = fp_cookie;
1887
1888 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
1889
1890 napi_schedule_irqoff(&fp->napi);
1891 return IRQ_HANDLED;
1892}
1893
1894/* -------------------------------------------------------------------------
1895 * END OF FAST-PATH
1896 * -------------------------------------------------------------------------
1897 */
1898
1899static int qede_open(struct net_device *ndev);
1900static int qede_close(struct net_device *ndev);
1901static int qede_set_mac_addr(struct net_device *ndev, void *p);
1902static void qede_set_rx_mode(struct net_device *ndev);
1903static void qede_config_rx_mode(struct net_device *ndev);
1904
1905static int qede_set_ucast_rx_mac(struct qede_dev *edev,
1906 enum qed_filter_xcast_params_type opcode,
1907 unsigned char mac[ETH_ALEN])
1908{
1909 struct qed_filter_params filter_cmd;
1910
1911 memset(&filter_cmd, 0, sizeof(filter_cmd));
1912 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1913 filter_cmd.filter.ucast.type = opcode;
1914 filter_cmd.filter.ucast.mac_valid = 1;
1915 ether_addr_copy(filter_cmd.filter.ucast.mac, mac);
1916
1917 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1918}
1919
1920static int qede_set_ucast_rx_vlan(struct qede_dev *edev,
1921 enum qed_filter_xcast_params_type opcode,
1922 u16 vid)
1923{
1924 struct qed_filter_params filter_cmd;
1925
1926 memset(&filter_cmd, 0, sizeof(filter_cmd));
1927 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1928 filter_cmd.filter.ucast.type = opcode;
1929 filter_cmd.filter.ucast.vlan_valid = 1;
1930 filter_cmd.filter.ucast.vlan = vid;
1931
1932 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1933}
1934
1935void qede_fill_by_demand_stats(struct qede_dev *edev)
1936{
1937 struct qed_eth_stats stats;
1938
1939 edev->ops->get_vport_stats(edev->cdev, &stats);
1940 edev->stats.no_buff_discards = stats.no_buff_discards;
1941 edev->stats.packet_too_big_discard = stats.packet_too_big_discard;
1942 edev->stats.ttl0_discard = stats.ttl0_discard;
1943 edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes;
1944 edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes;
1945 edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes;
1946 edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts;
1947 edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts;
1948 edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts;
1949 edev->stats.mftag_filter_discards = stats.mftag_filter_discards;
1950 edev->stats.mac_filter_discards = stats.mac_filter_discards;
1951
1952 edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes;
1953 edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes;
1954 edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes;
1955 edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts;
1956 edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts;
1957 edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts;
1958 edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts;
1959 edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts;
1960 edev->stats.coalesced_events = stats.tpa_coalesced_events;
1961 edev->stats.coalesced_aborts_num = stats.tpa_aborts_num;
1962 edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts;
1963 edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes;
1964
1965 edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets;
1966 edev->stats.rx_65_to_127_byte_packets = stats.rx_65_to_127_byte_packets;
1967 edev->stats.rx_128_to_255_byte_packets =
1968 stats.rx_128_to_255_byte_packets;
1969 edev->stats.rx_256_to_511_byte_packets =
1970 stats.rx_256_to_511_byte_packets;
1971 edev->stats.rx_512_to_1023_byte_packets =
1972 stats.rx_512_to_1023_byte_packets;
1973 edev->stats.rx_1024_to_1518_byte_packets =
1974 stats.rx_1024_to_1518_byte_packets;
1975 edev->stats.rx_1519_to_1522_byte_packets =
1976 stats.rx_1519_to_1522_byte_packets;
1977 edev->stats.rx_1519_to_2047_byte_packets =
1978 stats.rx_1519_to_2047_byte_packets;
1979 edev->stats.rx_2048_to_4095_byte_packets =
1980 stats.rx_2048_to_4095_byte_packets;
1981 edev->stats.rx_4096_to_9216_byte_packets =
1982 stats.rx_4096_to_9216_byte_packets;
1983 edev->stats.rx_9217_to_16383_byte_packets =
1984 stats.rx_9217_to_16383_byte_packets;
1985 edev->stats.rx_crc_errors = stats.rx_crc_errors;
1986 edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames;
1987 edev->stats.rx_pause_frames = stats.rx_pause_frames;
1988 edev->stats.rx_pfc_frames = stats.rx_pfc_frames;
1989 edev->stats.rx_align_errors = stats.rx_align_errors;
1990 edev->stats.rx_carrier_errors = stats.rx_carrier_errors;
1991 edev->stats.rx_oversize_packets = stats.rx_oversize_packets;
1992 edev->stats.rx_jabbers = stats.rx_jabbers;
1993 edev->stats.rx_undersize_packets = stats.rx_undersize_packets;
1994 edev->stats.rx_fragments = stats.rx_fragments;
1995 edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets;
1996 edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets;
1997 edev->stats.tx_128_to_255_byte_packets =
1998 stats.tx_128_to_255_byte_packets;
1999 edev->stats.tx_256_to_511_byte_packets =
2000 stats.tx_256_to_511_byte_packets;
2001 edev->stats.tx_512_to_1023_byte_packets =
2002 stats.tx_512_to_1023_byte_packets;
2003 edev->stats.tx_1024_to_1518_byte_packets =
2004 stats.tx_1024_to_1518_byte_packets;
2005 edev->stats.tx_1519_to_2047_byte_packets =
2006 stats.tx_1519_to_2047_byte_packets;
2007 edev->stats.tx_2048_to_4095_byte_packets =
2008 stats.tx_2048_to_4095_byte_packets;
2009 edev->stats.tx_4096_to_9216_byte_packets =
2010 stats.tx_4096_to_9216_byte_packets;
2011 edev->stats.tx_9217_to_16383_byte_packets =
2012 stats.tx_9217_to_16383_byte_packets;
2013 edev->stats.tx_pause_frames = stats.tx_pause_frames;
2014 edev->stats.tx_pfc_frames = stats.tx_pfc_frames;
2015 edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count;
2016 edev->stats.tx_total_collisions = stats.tx_total_collisions;
2017 edev->stats.brb_truncates = stats.brb_truncates;
2018 edev->stats.brb_discards = stats.brb_discards;
2019 edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames;
2020}
2021
2022static
2023struct rtnl_link_stats64 *qede_get_stats64(struct net_device *dev,
2024 struct rtnl_link_stats64 *stats)
2025{
2026 struct qede_dev *edev = netdev_priv(dev);
2027
2028 qede_fill_by_demand_stats(edev);
2029
2030 stats->rx_packets = edev->stats.rx_ucast_pkts +
2031 edev->stats.rx_mcast_pkts +
2032 edev->stats.rx_bcast_pkts;
2033 stats->tx_packets = edev->stats.tx_ucast_pkts +
2034 edev->stats.tx_mcast_pkts +
2035 edev->stats.tx_bcast_pkts;
2036
2037 stats->rx_bytes = edev->stats.rx_ucast_bytes +
2038 edev->stats.rx_mcast_bytes +
2039 edev->stats.rx_bcast_bytes;
2040
2041 stats->tx_bytes = edev->stats.tx_ucast_bytes +
2042 edev->stats.tx_mcast_bytes +
2043 edev->stats.tx_bcast_bytes;
2044
2045 stats->tx_errors = edev->stats.tx_err_drop_pkts;
2046 stats->multicast = edev->stats.rx_mcast_pkts +
2047 edev->stats.rx_bcast_pkts;
2048
2049 stats->rx_fifo_errors = edev->stats.no_buff_discards;
2050
2051 stats->collisions = edev->stats.tx_total_collisions;
2052 stats->rx_crc_errors = edev->stats.rx_crc_errors;
2053 stats->rx_frame_errors = edev->stats.rx_align_errors;
2054
2055 return stats;
2056}
2057
2058#ifdef CONFIG_QED_SRIOV
2059static int qede_get_vf_config(struct net_device *dev, int vfidx,
2060 struct ifla_vf_info *ivi)
2061{
2062 struct qede_dev *edev = netdev_priv(dev);
2063
2064 if (!edev->ops)
2065 return -EINVAL;
2066
2067 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi);
2068}
2069
2070static int qede_set_vf_rate(struct net_device *dev, int vfidx,
2071 int min_tx_rate, int max_tx_rate)
2072{
2073 struct qede_dev *edev = netdev_priv(dev);
2074
2075 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate,
2076 max_tx_rate);
2077}
2078
2079static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val)
2080{
2081 struct qede_dev *edev = netdev_priv(dev);
2082
2083 if (!edev->ops)
2084 return -EINVAL;
2085
2086 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val);
2087}
2088
2089static int qede_set_vf_link_state(struct net_device *dev, int vfidx,
2090 int link_state)
2091{
2092 struct qede_dev *edev = netdev_priv(dev);
2093
2094 if (!edev->ops)
2095 return -EINVAL;
2096
2097 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state);
2098}
2099#endif
2100
2101static void qede_config_accept_any_vlan(struct qede_dev *edev, bool action)
2102{
2103 struct qed_update_vport_params params;
2104 int rc;
2105
2106 /* Proceed only if action actually needs to be performed */
2107 if (edev->accept_any_vlan == action)
2108 return;
2109
2110 memset(¶ms, 0, sizeof(params));
2111
2112 params.vport_id = 0;
2113 params.accept_any_vlan = action;
2114 params.update_accept_any_vlan_flg = 1;
2115
2116 rc = edev->ops->vport_update(edev->cdev, ¶ms);
2117 if (rc) {
2118 DP_ERR(edev, "Failed to %s accept-any-vlan\n",
2119 action ? "enable" : "disable");
2120 } else {
2121 DP_INFO(edev, "%s accept-any-vlan\n",
2122 action ? "enabled" : "disabled");
2123 edev->accept_any_vlan = action;
2124 }
2125}
2126
2127static int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
2128{
2129 struct qede_dev *edev = netdev_priv(dev);
2130 struct qede_vlan *vlan, *tmp;
2131 int rc = 0;
2132
2133 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid);
2134
2135 vlan = kzalloc(sizeof(*vlan), GFP_KERNEL);
2136 if (!vlan) {
2137 DP_INFO(edev, "Failed to allocate struct for vlan\n");
2138 return -ENOMEM;
2139 }
2140 INIT_LIST_HEAD(&vlan->list);
2141 vlan->vid = vid;
2142 vlan->configured = false;
2143
2144 /* Verify vlan isn't already configured */
2145 list_for_each_entry(tmp, &edev->vlan_list, list) {
2146 if (tmp->vid == vlan->vid) {
2147 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
2148 "vlan already configured\n");
2149 kfree(vlan);
2150 return -EEXIST;
2151 }
2152 }
2153
2154 /* If interface is down, cache this VLAN ID and return */
2155 __qede_lock(edev);
2156 if (edev->state != QEDE_STATE_OPEN) {
2157 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
2158 "Interface is down, VLAN %d will be configured when interface is up\n",
2159 vid);
2160 if (vid != 0)
2161 edev->non_configured_vlans++;
2162 list_add(&vlan->list, &edev->vlan_list);
2163 goto out;
2164 }
2165
2166 /* Check for the filter limit.
2167 * Note - vlan0 has a reserved filter and can be added without
2168 * worrying about quota
2169 */
2170 if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) ||
2171 (vlan->vid == 0)) {
2172 rc = qede_set_ucast_rx_vlan(edev,
2173 QED_FILTER_XCAST_TYPE_ADD,
2174 vlan->vid);
2175 if (rc) {
2176 DP_ERR(edev, "Failed to configure VLAN %d\n",
2177 vlan->vid);
2178 kfree(vlan);
2179 goto out;
2180 }
2181 vlan->configured = true;
2182
2183 /* vlan0 filter isn't consuming out of our quota */
2184 if (vlan->vid != 0)
2185 edev->configured_vlans++;
2186 } else {
2187 /* Out of quota; Activate accept-any-VLAN mode */
2188 if (!edev->non_configured_vlans)
2189 qede_config_accept_any_vlan(edev, true);
2190
2191 edev->non_configured_vlans++;
2192 }
2193
2194 list_add(&vlan->list, &edev->vlan_list);
2195
2196out:
2197 __qede_unlock(edev);
2198 return rc;
2199}
2200
2201static void qede_del_vlan_from_list(struct qede_dev *edev,
2202 struct qede_vlan *vlan)
2203{
2204 /* vlan0 filter isn't consuming out of our quota */
2205 if (vlan->vid != 0) {
2206 if (vlan->configured)
2207 edev->configured_vlans--;
2208 else
2209 edev->non_configured_vlans--;
2210 }
2211
2212 list_del(&vlan->list);
2213 kfree(vlan);
2214}
2215
2216static int qede_configure_vlan_filters(struct qede_dev *edev)
2217{
2218 int rc = 0, real_rc = 0, accept_any_vlan = 0;
2219 struct qed_dev_eth_info *dev_info;
2220 struct qede_vlan *vlan = NULL;
2221
2222 if (list_empty(&edev->vlan_list))
2223 return 0;
2224
2225 dev_info = &edev->dev_info;
2226
2227 /* Configure non-configured vlans */
2228 list_for_each_entry(vlan, &edev->vlan_list, list) {
2229 if (vlan->configured)
2230 continue;
2231
2232 /* We have used all our credits, now enable accept_any_vlan */
2233 if ((vlan->vid != 0) &&
2234 (edev->configured_vlans == dev_info->num_vlan_filters)) {
2235 accept_any_vlan = 1;
2236 continue;
2237 }
2238
2239 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid);
2240
2241 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD,
2242 vlan->vid);
2243 if (rc) {
2244 DP_ERR(edev, "Failed to configure VLAN %u\n",
2245 vlan->vid);
2246 real_rc = rc;
2247 continue;
2248 }
2249
2250 vlan->configured = true;
2251 /* vlan0 filter doesn't consume our VLAN filter's quota */
2252 if (vlan->vid != 0) {
2253 edev->non_configured_vlans--;
2254 edev->configured_vlans++;
2255 }
2256 }
2257
2258 /* enable accept_any_vlan mode if we have more VLANs than credits,
2259 * or remove accept_any_vlan mode if we've actually removed
2260 * a non-configured vlan, and all remaining vlans are truly configured.
2261 */
2262
2263 if (accept_any_vlan)
2264 qede_config_accept_any_vlan(edev, true);
2265 else if (!edev->non_configured_vlans)
2266 qede_config_accept_any_vlan(edev, false);
2267
2268 return real_rc;
2269}
2270
2271static int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
2272{
2273 struct qede_dev *edev = netdev_priv(dev);
2274 struct qede_vlan *vlan = NULL;
2275 int rc = 0;
2276
2277 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid);
2278
2279 /* Find whether entry exists */
2280 __qede_lock(edev);
2281 list_for_each_entry(vlan, &edev->vlan_list, list)
2282 if (vlan->vid == vid)
2283 break;
2284
2285 if (!vlan || (vlan->vid != vid)) {
2286 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
2287 "Vlan isn't configured\n");
2288 goto out;
2289 }
2290
2291 if (edev->state != QEDE_STATE_OPEN) {
2292 /* As interface is already down, we don't have a VPORT
2293 * instance to remove vlan filter. So just update vlan list
2294 */
2295 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
2296 "Interface is down, removing VLAN from list only\n");
2297 qede_del_vlan_from_list(edev, vlan);
2298 goto out;
2299 }
2300
2301 /* Remove vlan */
2302 if (vlan->configured) {
2303 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL,
2304 vid);
2305 if (rc) {
2306 DP_ERR(edev, "Failed to remove VLAN %d\n", vid);
2307 goto out;
2308 }
2309 }
2310
2311 qede_del_vlan_from_list(edev, vlan);
2312
2313 /* We have removed a VLAN - try to see if we can
2314 * configure non-configured VLAN from the list.
2315 */
2316 rc = qede_configure_vlan_filters(edev);
2317
2318out:
2319 __qede_unlock(edev);
2320 return rc;
2321}
2322
2323static void qede_vlan_mark_nonconfigured(struct qede_dev *edev)
2324{
2325 struct qede_vlan *vlan = NULL;
2326
2327 if (list_empty(&edev->vlan_list))
2328 return;
2329
2330 list_for_each_entry(vlan, &edev->vlan_list, list) {
2331 if (!vlan->configured)
2332 continue;
2333
2334 vlan->configured = false;
2335
2336 /* vlan0 filter isn't consuming out of our quota */
2337 if (vlan->vid != 0) {
2338 edev->non_configured_vlans++;
2339 edev->configured_vlans--;
2340 }
2341
2342 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
2343 "marked vlan %d as non-configured\n", vlan->vid);
2344 }
2345
2346 edev->accept_any_vlan = false;
2347}
2348
2349static void qede_set_features_reload(struct qede_dev *edev,
2350 struct qede_reload_args *args)
2351{
2352 edev->ndev->features = args->u.features;
2353}
2354
2355int qede_set_features(struct net_device *dev, netdev_features_t features)
2356{
2357 struct qede_dev *edev = netdev_priv(dev);
2358 netdev_features_t changes = features ^ dev->features;
2359 bool need_reload = false;
2360
2361 /* No action needed if hardware GRO is disabled during driver load */
2362 if (changes & NETIF_F_GRO) {
2363 if (dev->features & NETIF_F_GRO)
2364 need_reload = !edev->gro_disable;
2365 else
2366 need_reload = edev->gro_disable;
2367 }
2368
2369 if (need_reload) {
2370 struct qede_reload_args args;
2371
2372 args.u.features = features;
2373 args.func = &qede_set_features_reload;
2374
2375 /* Make sure that we definitely need to reload.
2376 * In case of an eBPF attached program, there will be no FW
2377 * aggregations, so no need to actually reload.
2378 */
2379 __qede_lock(edev);
2380 if (edev->xdp_prog)
2381 args.func(edev, &args);
2382 else
2383 qede_reload(edev, &args, true);
2384 __qede_unlock(edev);
2385
2386 return 1;
2387 }
2388
2389 return 0;
2390}
2391
2392static void qede_udp_tunnel_add(struct net_device *dev,
2393 struct udp_tunnel_info *ti)
2394{
2395 struct qede_dev *edev = netdev_priv(dev);
2396 u16 t_port = ntohs(ti->port);
2397
2398 switch (ti->type) {
2399 case UDP_TUNNEL_TYPE_VXLAN:
2400 if (edev->vxlan_dst_port)
2401 return;
2402
2403 edev->vxlan_dst_port = t_port;
2404
2405 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added vxlan port=%d\n",
2406 t_port);
2407
2408 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2409 break;
2410 case UDP_TUNNEL_TYPE_GENEVE:
2411 if (edev->geneve_dst_port)
2412 return;
2413
2414 edev->geneve_dst_port = t_port;
2415
2416 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added geneve port=%d\n",
2417 t_port);
2418 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2419 break;
2420 default:
2421 return;
2422 }
2423
2424 schedule_delayed_work(&edev->sp_task, 0);
2425}
2426
2427static void qede_udp_tunnel_del(struct net_device *dev,
2428 struct udp_tunnel_info *ti)
2429{
2430 struct qede_dev *edev = netdev_priv(dev);
2431 u16 t_port = ntohs(ti->port);
2432
2433 switch (ti->type) {
2434 case UDP_TUNNEL_TYPE_VXLAN:
2435 if (t_port != edev->vxlan_dst_port)
2436 return;
2437
2438 edev->vxlan_dst_port = 0;
2439
2440 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted vxlan port=%d\n",
2441 t_port);
2442
2443 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2444 break;
2445 case UDP_TUNNEL_TYPE_GENEVE:
2446 if (t_port != edev->geneve_dst_port)
2447 return;
2448
2449 edev->geneve_dst_port = 0;
2450
2451 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted geneve port=%d\n",
2452 t_port);
2453 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2454 break;
2455 default:
2456 return;
2457 }
2458
2459 schedule_delayed_work(&edev->sp_task, 0);
2460}
2461
2462/* 8B udp header + 8B base tunnel header + 32B option length */
2463#define QEDE_MAX_TUN_HDR_LEN 48
2464
2465static netdev_features_t qede_features_check(struct sk_buff *skb,
2466 struct net_device *dev,
2467 netdev_features_t features)
2468{
2469 if (skb->encapsulation) {
2470 u8 l4_proto = 0;
2471
2472 switch (vlan_get_protocol(skb)) {
2473 case htons(ETH_P_IP):
2474 l4_proto = ip_hdr(skb)->protocol;
2475 break;
2476 case htons(ETH_P_IPV6):
2477 l4_proto = ipv6_hdr(skb)->nexthdr;
2478 break;
2479 default:
2480 return features;
2481 }
2482
2483 /* Disable offloads for geneve tunnels, as HW can't parse
2484 * the geneve header which has option length greater than 32B.
2485 */
2486 if ((l4_proto == IPPROTO_UDP) &&
2487 ((skb_inner_mac_header(skb) -
2488 skb_transport_header(skb)) > QEDE_MAX_TUN_HDR_LEN))
2489 return features & ~(NETIF_F_CSUM_MASK |
2490 NETIF_F_GSO_MASK);
2491 }
2492
2493 return features;
2494}
2495
2496static void qede_xdp_reload_func(struct qede_dev *edev,
2497 struct qede_reload_args *args)
2498{
2499 struct bpf_prog *old;
2500
2501 old = xchg(&edev->xdp_prog, args->u.new_prog);
2502 if (old)
2503 bpf_prog_put(old);
2504}
2505
2506static int qede_xdp_set(struct qede_dev *edev, struct bpf_prog *prog)
2507{
2508 struct qede_reload_args args;
2509
2510 if (prog && prog->xdp_adjust_head) {
2511 DP_ERR(edev, "Does not support bpf_xdp_adjust_head()\n");
2512 return -EOPNOTSUPP;
2513 }
2514
2515 /* If we're called, there was already a bpf reference increment */
2516 args.func = &qede_xdp_reload_func;
2517 args.u.new_prog = prog;
2518 qede_reload(edev, &args, false);
2519
2520 return 0;
2521}
2522
2523static int qede_xdp(struct net_device *dev, struct netdev_xdp *xdp)
2524{
2525 struct qede_dev *edev = netdev_priv(dev);
2526
2527 switch (xdp->command) {
2528 case XDP_SETUP_PROG:
2529 return qede_xdp_set(edev, xdp->prog);
2530 case XDP_QUERY_PROG:
2531 xdp->prog_attached = !!edev->xdp_prog;
2532 return 0;
2533 default:
2534 return -EINVAL;
2535 }
2536}
2537
2538static const struct net_device_ops qede_netdev_ops = {
2539 .ndo_open = qede_open,
2540 .ndo_stop = qede_close,
2541 .ndo_start_xmit = qede_start_xmit,
2542 .ndo_set_rx_mode = qede_set_rx_mode,
2543 .ndo_set_mac_address = qede_set_mac_addr,
2544 .ndo_validate_addr = eth_validate_addr,
2545 .ndo_change_mtu = qede_change_mtu,
2546#ifdef CONFIG_QED_SRIOV
2547 .ndo_set_vf_mac = qede_set_vf_mac,
2548 .ndo_set_vf_vlan = qede_set_vf_vlan,
2549#endif
2550 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
2551 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
2552 .ndo_set_features = qede_set_features,
2553 .ndo_get_stats64 = qede_get_stats64,
2554#ifdef CONFIG_QED_SRIOV
2555 .ndo_set_vf_link_state = qede_set_vf_link_state,
2556 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk,
2557 .ndo_get_vf_config = qede_get_vf_config,
2558 .ndo_set_vf_rate = qede_set_vf_rate,
2559#endif
2560 .ndo_udp_tunnel_add = qede_udp_tunnel_add,
2561 .ndo_udp_tunnel_del = qede_udp_tunnel_del,
2562 .ndo_features_check = qede_features_check,
2563 .ndo_xdp = qede_xdp,
2564};
2565
2566/* -------------------------------------------------------------------------
2567 * START OF PROBE / REMOVE
2568 * -------------------------------------------------------------------------
2569 */
2570
2571static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
2572 struct pci_dev *pdev,
2573 struct qed_dev_eth_info *info,
2574 u32 dp_module, u8 dp_level)
2575{
2576 struct net_device *ndev;
2577 struct qede_dev *edev;
2578
2579 ndev = alloc_etherdev_mqs(sizeof(*edev),
2580 info->num_queues, info->num_queues);
2581 if (!ndev) {
2582 pr_err("etherdev allocation failed\n");
2583 return NULL;
2584 }
2585
2586 edev = netdev_priv(ndev);
2587 edev->ndev = ndev;
2588 edev->cdev = cdev;
2589 edev->pdev = pdev;
2590 edev->dp_module = dp_module;
2591 edev->dp_level = dp_level;
2592 edev->ops = qed_ops;
2593 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
2594 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
2595
2596 DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n",
2597 info->num_queues, info->num_queues);
2598
2599 SET_NETDEV_DEV(ndev, &pdev->dev);
2600
2601 memset(&edev->stats, 0, sizeof(edev->stats));
2602 memcpy(&edev->dev_info, info, sizeof(*info));
2603
2604 INIT_LIST_HEAD(&edev->vlan_list);
2605
2606 return edev;
2607}
2608
2609static void qede_init_ndev(struct qede_dev *edev)
2610{
2611 struct net_device *ndev = edev->ndev;
2612 struct pci_dev *pdev = edev->pdev;
2613 u32 hw_features;
2614
2615 pci_set_drvdata(pdev, ndev);
2616
2617 ndev->mem_start = edev->dev_info.common.pci_mem_start;
2618 ndev->base_addr = ndev->mem_start;
2619 ndev->mem_end = edev->dev_info.common.pci_mem_end;
2620 ndev->irq = edev->dev_info.common.pci_irq;
2621
2622 ndev->watchdog_timeo = TX_TIMEOUT;
2623
2624 ndev->netdev_ops = &qede_netdev_ops;
2625
2626 qede_set_ethtool_ops(ndev);
2627
2628 ndev->priv_flags |= IFF_UNICAST_FLT;
2629
2630 /* user-changeble features */
2631 hw_features = NETIF_F_GRO | NETIF_F_SG |
2632 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2633 NETIF_F_TSO | NETIF_F_TSO6;
2634
2635 /* Encap features*/
2636 hw_features |= NETIF_F_GSO_GRE | NETIF_F_GSO_UDP_TUNNEL |
2637 NETIF_F_TSO_ECN | NETIF_F_GSO_UDP_TUNNEL_CSUM |
2638 NETIF_F_GSO_GRE_CSUM;
2639 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2640 NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO_ECN |
2641 NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2642 NETIF_F_GSO_UDP_TUNNEL | NETIF_F_RXCSUM |
2643 NETIF_F_GSO_UDP_TUNNEL_CSUM |
2644 NETIF_F_GSO_GRE_CSUM;
2645
2646 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2647 NETIF_F_HIGHDMA;
2648 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2649 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
2650 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
2651
2652 ndev->hw_features = hw_features;
2653
2654 /* MTU range: 46 - 9600 */
2655 ndev->min_mtu = ETH_ZLEN - ETH_HLEN;
2656 ndev->max_mtu = QEDE_MAX_JUMBO_PACKET_SIZE;
2657
2658 /* Set network device HW mac */
2659 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
2660
2661 ndev->mtu = edev->dev_info.common.mtu;
2662}
2663
2664/* This function converts from 32b param to two params of level and module
2665 * Input 32b decoding:
2666 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
2667 * 'happy' flow, e.g. memory allocation failed.
2668 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
2669 * and provide important parameters.
2670 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
2671 * module. VERBOSE prints are for tracking the specific flow in low level.
2672 *
2673 * Notice that the level should be that of the lowest required logs.
2674 */
2675void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
2676{
2677 *p_dp_level = QED_LEVEL_NOTICE;
2678 *p_dp_module = 0;
2679
2680 if (debug & QED_LOG_VERBOSE_MASK) {
2681 *p_dp_level = QED_LEVEL_VERBOSE;
2682 *p_dp_module = (debug & 0x3FFFFFFF);
2683 } else if (debug & QED_LOG_INFO_MASK) {
2684 *p_dp_level = QED_LEVEL_INFO;
2685 } else if (debug & QED_LOG_NOTICE_MASK) {
2686 *p_dp_level = QED_LEVEL_NOTICE;
2687 }
2688}
2689
2690static void qede_free_fp_array(struct qede_dev *edev)
2691{
2692 if (edev->fp_array) {
2693 struct qede_fastpath *fp;
2694 int i;
2695
2696 for_each_queue(i) {
2697 fp = &edev->fp_array[i];
2698
2699 kfree(fp->sb_info);
2700 kfree(fp->rxq);
2701 kfree(fp->xdp_tx);
2702 kfree(fp->txq);
2703 }
2704 kfree(edev->fp_array);
2705 }
2706
2707 edev->num_queues = 0;
2708 edev->fp_num_tx = 0;
2709 edev->fp_num_rx = 0;
2710}
2711
2712static int qede_alloc_fp_array(struct qede_dev *edev)
2713{
2714 u8 fp_combined, fp_rx = edev->fp_num_rx;
2715 struct qede_fastpath *fp;
2716 int i;
2717
2718 edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev),
2719 sizeof(*edev->fp_array), GFP_KERNEL);
2720 if (!edev->fp_array) {
2721 DP_NOTICE(edev, "fp array allocation failed\n");
2722 goto err;
2723 }
2724
2725 fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx;
2726
2727 /* Allocate the FP elements for Rx queues followed by combined and then
2728 * the Tx. This ordering should be maintained so that the respective
2729 * queues (Rx or Tx) will be together in the fastpath array and the
2730 * associated ids will be sequential.
2731 */
2732 for_each_queue(i) {
2733 fp = &edev->fp_array[i];
2734
2735 fp->sb_info = kzalloc(sizeof(*fp->sb_info), GFP_KERNEL);
2736 if (!fp->sb_info) {
2737 DP_NOTICE(edev, "sb info struct allocation failed\n");
2738 goto err;
2739 }
2740
2741 if (fp_rx) {
2742 fp->type = QEDE_FASTPATH_RX;
2743 fp_rx--;
2744 } else if (fp_combined) {
2745 fp->type = QEDE_FASTPATH_COMBINED;
2746 fp_combined--;
2747 } else {
2748 fp->type = QEDE_FASTPATH_TX;
2749 }
2750
2751 if (fp->type & QEDE_FASTPATH_TX) {
2752 fp->txq = kzalloc(sizeof(*fp->txq), GFP_KERNEL);
2753 if (!fp->txq)
2754 goto err;
2755 }
2756
2757 if (fp->type & QEDE_FASTPATH_RX) {
2758 fp->rxq = kzalloc(sizeof(*fp->rxq), GFP_KERNEL);
2759 if (!fp->rxq)
2760 goto err;
2761
2762 if (edev->xdp_prog) {
2763 fp->xdp_tx = kzalloc(sizeof(*fp->xdp_tx),
2764 GFP_KERNEL);
2765 if (!fp->xdp_tx)
2766 goto err;
2767 fp->type |= QEDE_FASTPATH_XDP;
2768 }
2769 }
2770 }
2771
2772 return 0;
2773err:
2774 qede_free_fp_array(edev);
2775 return -ENOMEM;
2776}
2777
2778static void qede_sp_task(struct work_struct *work)
2779{
2780 struct qede_dev *edev = container_of(work, struct qede_dev,
2781 sp_task.work);
2782 struct qed_dev *cdev = edev->cdev;
2783
2784 __qede_lock(edev);
2785
2786 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
2787 if (edev->state == QEDE_STATE_OPEN)
2788 qede_config_rx_mode(edev->ndev);
2789
2790 if (test_and_clear_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags)) {
2791 struct qed_tunn_params tunn_params;
2792
2793 memset(&tunn_params, 0, sizeof(tunn_params));
2794 tunn_params.update_vxlan_port = 1;
2795 tunn_params.vxlan_port = edev->vxlan_dst_port;
2796 qed_ops->tunn_config(cdev, &tunn_params);
2797 }
2798
2799 if (test_and_clear_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags)) {
2800 struct qed_tunn_params tunn_params;
2801
2802 memset(&tunn_params, 0, sizeof(tunn_params));
2803 tunn_params.update_geneve_port = 1;
2804 tunn_params.geneve_port = edev->geneve_dst_port;
2805 qed_ops->tunn_config(cdev, &tunn_params);
2806 }
2807
2808 __qede_unlock(edev);
2809}
2810
2811static void qede_update_pf_params(struct qed_dev *cdev)
2812{
2813 struct qed_pf_params pf_params;
2814
2815 /* 64 rx + 64 tx + 64 XDP */
2816 memset(&pf_params, 0, sizeof(struct qed_pf_params));
2817 pf_params.eth_pf_params.num_cons = 192;
2818 qed_ops->common->update_pf_params(cdev, &pf_params);
2819}
2820
2821enum qede_probe_mode {
2822 QEDE_PROBE_NORMAL,
2823};
2824
2825static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
2826 bool is_vf, enum qede_probe_mode mode)
2827{
2828 struct qed_probe_params probe_params;
2829 struct qed_slowpath_params sp_params;
2830 struct qed_dev_eth_info dev_info;
2831 struct qede_dev *edev;
2832 struct qed_dev *cdev;
2833 int rc;
2834
2835 if (unlikely(dp_level & QED_LEVEL_INFO))
2836 pr_notice("Starting qede probe\n");
2837
2838 memset(&probe_params, 0, sizeof(probe_params));
2839 probe_params.protocol = QED_PROTOCOL_ETH;
2840 probe_params.dp_module = dp_module;
2841 probe_params.dp_level = dp_level;
2842 probe_params.is_vf = is_vf;
2843 cdev = qed_ops->common->probe(pdev, &probe_params);
2844 if (!cdev) {
2845 rc = -ENODEV;
2846 goto err0;
2847 }
2848
2849 qede_update_pf_params(cdev);
2850
2851 /* Start the Slowpath-process */
2852 memset(&sp_params, 0, sizeof(sp_params));
2853 sp_params.int_mode = QED_INT_MODE_MSIX;
2854 sp_params.drv_major = QEDE_MAJOR_VERSION;
2855 sp_params.drv_minor = QEDE_MINOR_VERSION;
2856 sp_params.drv_rev = QEDE_REVISION_VERSION;
2857 sp_params.drv_eng = QEDE_ENGINEERING_VERSION;
2858 strlcpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
2859 rc = qed_ops->common->slowpath_start(cdev, &sp_params);
2860 if (rc) {
2861 pr_notice("Cannot start slowpath\n");
2862 goto err1;
2863 }
2864
2865 /* Learn information crucial for qede to progress */
2866 rc = qed_ops->fill_dev_info(cdev, &dev_info);
2867 if (rc)
2868 goto err2;
2869
2870 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
2871 dp_level);
2872 if (!edev) {
2873 rc = -ENOMEM;
2874 goto err2;
2875 }
2876
2877 if (is_vf)
2878 edev->flags |= QEDE_FLAG_IS_VF;
2879
2880 qede_init_ndev(edev);
2881
2882 rc = qede_roce_dev_add(edev);
2883 if (rc)
2884 goto err3;
2885
2886 rc = register_netdev(edev->ndev);
2887 if (rc) {
2888 DP_NOTICE(edev, "Cannot register net-device\n");
2889 goto err4;
2890 }
2891
2892 edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION);
2893
2894 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
2895
2896#ifdef CONFIG_DCB
2897 if (!IS_VF(edev))
2898 qede_set_dcbnl_ops(edev->ndev);
2899#endif
2900
2901 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
2902 mutex_init(&edev->qede_lock);
2903 edev->rx_copybreak = QEDE_RX_HDR_SIZE;
2904
2905 DP_INFO(edev, "Ending successfully qede probe\n");
2906
2907 return 0;
2908
2909err4:
2910 qede_roce_dev_remove(edev);
2911err3:
2912 free_netdev(edev->ndev);
2913err2:
2914 qed_ops->common->slowpath_stop(cdev);
2915err1:
2916 qed_ops->common->remove(cdev);
2917err0:
2918 return rc;
2919}
2920
2921static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2922{
2923 bool is_vf = false;
2924 u32 dp_module = 0;
2925 u8 dp_level = 0;
2926
2927 switch ((enum qede_pci_private)id->driver_data) {
2928 case QEDE_PRIVATE_VF:
2929 if (debug & QED_LOG_VERBOSE_MASK)
2930 dev_err(&pdev->dev, "Probing a VF\n");
2931 is_vf = true;
2932 break;
2933 default:
2934 if (debug & QED_LOG_VERBOSE_MASK)
2935 dev_err(&pdev->dev, "Probing a PF\n");
2936 }
2937
2938 qede_config_debug(debug, &dp_module, &dp_level);
2939
2940 return __qede_probe(pdev, dp_module, dp_level, is_vf,
2941 QEDE_PROBE_NORMAL);
2942}
2943
2944enum qede_remove_mode {
2945 QEDE_REMOVE_NORMAL,
2946};
2947
2948static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
2949{
2950 struct net_device *ndev = pci_get_drvdata(pdev);
2951 struct qede_dev *edev = netdev_priv(ndev);
2952 struct qed_dev *cdev = edev->cdev;
2953
2954 DP_INFO(edev, "Starting qede_remove\n");
2955
2956 cancel_delayed_work_sync(&edev->sp_task);
2957
2958 unregister_netdev(ndev);
2959
2960 qede_roce_dev_remove(edev);
2961
2962 edev->ops->common->set_power_state(cdev, PCI_D0);
2963
2964 pci_set_drvdata(pdev, NULL);
2965
2966 /* Release edev's reference to XDP's bpf if such exist */
2967 if (edev->xdp_prog)
2968 bpf_prog_put(edev->xdp_prog);
2969
2970 free_netdev(ndev);
2971
2972 /* Use global ops since we've freed edev */
2973 qed_ops->common->slowpath_stop(cdev);
2974 if (system_state == SYSTEM_POWER_OFF)
2975 return;
2976 qed_ops->common->remove(cdev);
2977
2978 dev_info(&pdev->dev, "Ending qede_remove successfully\n");
2979}
2980
2981static void qede_remove(struct pci_dev *pdev)
2982{
2983 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
2984}
2985
2986static void qede_shutdown(struct pci_dev *pdev)
2987{
2988 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
2989}
2990
2991/* -------------------------------------------------------------------------
2992 * START OF LOAD / UNLOAD
2993 * -------------------------------------------------------------------------
2994 */
2995
2996static int qede_set_num_queues(struct qede_dev *edev)
2997{
2998 int rc;
2999 u16 rss_num;
3000
3001 /* Setup queues according to possible resources*/
3002 if (edev->req_queues)
3003 rss_num = edev->req_queues;
3004 else
3005 rss_num = netif_get_num_default_rss_queues() *
3006 edev->dev_info.common.num_hwfns;
3007
3008 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
3009
3010 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
3011 if (rc > 0) {
3012 /* Managed to request interrupts for our queues */
3013 edev->num_queues = rc;
3014 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
3015 QEDE_QUEUE_CNT(edev), rss_num);
3016 rc = 0;
3017 }
3018
3019 edev->fp_num_tx = edev->req_num_tx;
3020 edev->fp_num_rx = edev->req_num_rx;
3021
3022 return rc;
3023}
3024
3025static void qede_free_mem_sb(struct qede_dev *edev,
3026 struct qed_sb_info *sb_info)
3027{
3028 if (sb_info->sb_virt)
3029 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
3030 (void *)sb_info->sb_virt, sb_info->sb_phys);
3031}
3032
3033/* This function allocates fast-path status block memory */
3034static int qede_alloc_mem_sb(struct qede_dev *edev,
3035 struct qed_sb_info *sb_info, u16 sb_id)
3036{
3037 struct status_block *sb_virt;
3038 dma_addr_t sb_phys;
3039 int rc;
3040
3041 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
3042 sizeof(*sb_virt), &sb_phys, GFP_KERNEL);
3043 if (!sb_virt) {
3044 DP_ERR(edev, "Status block allocation failed\n");
3045 return -ENOMEM;
3046 }
3047
3048 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
3049 sb_virt, sb_phys, sb_id,
3050 QED_SB_TYPE_L2_QUEUE);
3051 if (rc) {
3052 DP_ERR(edev, "Status block initialization failed\n");
3053 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
3054 sb_virt, sb_phys);
3055 return rc;
3056 }
3057
3058 return 0;
3059}
3060
3061static void qede_free_rx_buffers(struct qede_dev *edev,
3062 struct qede_rx_queue *rxq)
3063{
3064 u16 i;
3065
3066 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
3067 struct sw_rx_data *rx_buf;
3068 struct page *data;
3069
3070 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
3071 data = rx_buf->data;
3072
3073 dma_unmap_page(&edev->pdev->dev,
3074 rx_buf->mapping, PAGE_SIZE, rxq->data_direction);
3075
3076 rx_buf->data = NULL;
3077 __free_page(data);
3078 }
3079}
3080
3081static void qede_free_sge_mem(struct qede_dev *edev, struct qede_rx_queue *rxq)
3082{
3083 int i;
3084
3085 if (edev->gro_disable)
3086 return;
3087
3088 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
3089 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
3090 struct sw_rx_data *replace_buf = &tpa_info->buffer;
3091
3092 if (replace_buf->data) {
3093 dma_unmap_page(&edev->pdev->dev,
3094 replace_buf->mapping,
3095 PAGE_SIZE, DMA_FROM_DEVICE);
3096 __free_page(replace_buf->data);
3097 }
3098 }
3099}
3100
3101static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
3102{
3103 qede_free_sge_mem(edev, rxq);
3104
3105 /* Free rx buffers */
3106 qede_free_rx_buffers(edev, rxq);
3107
3108 /* Free the parallel SW ring */
3109 kfree(rxq->sw_rx_ring);
3110
3111 /* Free the real RQ ring used by FW */
3112 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
3113 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
3114}
3115
3116static int qede_alloc_sge_mem(struct qede_dev *edev, struct qede_rx_queue *rxq)
3117{
3118 dma_addr_t mapping;
3119 int i;
3120
3121 /* Don't perform FW aggregations in case of XDP */
3122 if (edev->xdp_prog)
3123 edev->gro_disable = 1;
3124
3125 if (edev->gro_disable)
3126 return 0;
3127
3128 if (edev->ndev->mtu > PAGE_SIZE) {
3129 edev->gro_disable = 1;
3130 return 0;
3131 }
3132
3133 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
3134 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
3135 struct sw_rx_data *replace_buf = &tpa_info->buffer;
3136
3137 replace_buf->data = alloc_pages(GFP_ATOMIC, 0);
3138 if (unlikely(!replace_buf->data)) {
3139 DP_NOTICE(edev,
3140 "Failed to allocate TPA skb pool [replacement buffer]\n");
3141 goto err;
3142 }
3143
3144 mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0,
3145 PAGE_SIZE, DMA_FROM_DEVICE);
3146 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
3147 DP_NOTICE(edev,
3148 "Failed to map TPA replacement buffer\n");
3149 goto err;
3150 }
3151
3152 replace_buf->mapping = mapping;
3153 tpa_info->buffer.page_offset = 0;
3154 tpa_info->buffer_mapping = mapping;
3155 tpa_info->state = QEDE_AGG_STATE_NONE;
3156 }
3157
3158 return 0;
3159err:
3160 qede_free_sge_mem(edev, rxq);
3161 edev->gro_disable = 1;
3162 return -ENOMEM;
3163}
3164
3165/* This function allocates all memory needed per Rx queue */
3166static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
3167{
3168 int i, rc, size;
3169
3170 rxq->num_rx_buffers = edev->q_num_rx_buffers;
3171
3172 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu;
3173
3174 if (rxq->rx_buf_size > PAGE_SIZE)
3175 rxq->rx_buf_size = PAGE_SIZE;
3176
3177 /* Segment size to spilt a page in multiple equal parts,
3178 * unless XDP is used in which case we'd use the entire page.
3179 */
3180 if (!edev->xdp_prog)
3181 rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size);
3182 else
3183 rxq->rx_buf_seg_size = PAGE_SIZE;
3184
3185 /* Allocate the parallel driver ring for Rx buffers */
3186 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
3187 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
3188 if (!rxq->sw_rx_ring) {
3189 DP_ERR(edev, "Rx buffers ring allocation failed\n");
3190 rc = -ENOMEM;
3191 goto err;
3192 }
3193
3194 /* Allocate FW Rx ring */
3195 rc = edev->ops->common->chain_alloc(edev->cdev,
3196 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
3197 QED_CHAIN_MODE_NEXT_PTR,
3198 QED_CHAIN_CNT_TYPE_U16,
3199 RX_RING_SIZE,
3200 sizeof(struct eth_rx_bd),
3201 &rxq->rx_bd_ring);
3202
3203 if (rc)
3204 goto err;
3205
3206 /* Allocate FW completion ring */
3207 rc = edev->ops->common->chain_alloc(edev->cdev,
3208 QED_CHAIN_USE_TO_CONSUME,
3209 QED_CHAIN_MODE_PBL,
3210 QED_CHAIN_CNT_TYPE_U16,
3211 RX_RING_SIZE,
3212 sizeof(union eth_rx_cqe),
3213 &rxq->rx_comp_ring);
3214 if (rc)
3215 goto err;
3216
3217 /* Allocate buffers for the Rx ring */
3218 for (i = 0; i < rxq->num_rx_buffers; i++) {
3219 rc = qede_alloc_rx_buffer(rxq);
3220 if (rc) {
3221 DP_ERR(edev,
3222 "Rx buffers allocation failed at index %d\n", i);
3223 goto err;
3224 }
3225 }
3226
3227 rc = qede_alloc_sge_mem(edev, rxq);
3228err:
3229 return rc;
3230}
3231
3232static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
3233{
3234 /* Free the parallel SW ring */
3235 if (txq->is_xdp)
3236 kfree(txq->sw_tx_ring.pages);
3237 else
3238 kfree(txq->sw_tx_ring.skbs);
3239
3240 /* Free the real RQ ring used by FW */
3241 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
3242}
3243
3244/* This function allocates all memory needed per Tx queue */
3245static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
3246{
3247 union eth_tx_bd_types *p_virt;
3248 int size, rc;
3249
3250 txq->num_tx_buffers = edev->q_num_tx_buffers;
3251
3252 /* Allocate the parallel driver ring for Tx buffers */
3253 if (txq->is_xdp) {
3254 size = sizeof(*txq->sw_tx_ring.pages) * TX_RING_SIZE;
3255 txq->sw_tx_ring.pages = kzalloc(size, GFP_KERNEL);
3256 if (!txq->sw_tx_ring.pages)
3257 goto err;
3258 } else {
3259 size = sizeof(*txq->sw_tx_ring.skbs) * TX_RING_SIZE;
3260 txq->sw_tx_ring.skbs = kzalloc(size, GFP_KERNEL);
3261 if (!txq->sw_tx_ring.skbs)
3262 goto err;
3263 }
3264
3265 rc = edev->ops->common->chain_alloc(edev->cdev,
3266 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
3267 QED_CHAIN_MODE_PBL,
3268 QED_CHAIN_CNT_TYPE_U16,
3269 TX_RING_SIZE,
3270 sizeof(*p_virt), &txq->tx_pbl);
3271 if (rc)
3272 goto err;
3273
3274 return 0;
3275
3276err:
3277 qede_free_mem_txq(edev, txq);
3278 return -ENOMEM;
3279}
3280
3281/* This function frees all memory of a single fp */
3282static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
3283{
3284 qede_free_mem_sb(edev, fp->sb_info);
3285
3286 if (fp->type & QEDE_FASTPATH_RX)
3287 qede_free_mem_rxq(edev, fp->rxq);
3288
3289 if (fp->type & QEDE_FASTPATH_TX)
3290 qede_free_mem_txq(edev, fp->txq);
3291}
3292
3293/* This function allocates all memory needed for a single fp (i.e. an entity
3294 * which contains status block, one rx queue and/or multiple per-TC tx queues.
3295 */
3296static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
3297{
3298 int rc = 0;
3299
3300 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id);
3301 if (rc)
3302 goto out;
3303
3304 if (fp->type & QEDE_FASTPATH_RX) {
3305 rc = qede_alloc_mem_rxq(edev, fp->rxq);
3306 if (rc)
3307 goto out;
3308 }
3309
3310 if (fp->type & QEDE_FASTPATH_XDP) {
3311 rc = qede_alloc_mem_txq(edev, fp->xdp_tx);
3312 if (rc)
3313 goto out;
3314 }
3315
3316 if (fp->type & QEDE_FASTPATH_TX) {
3317 rc = qede_alloc_mem_txq(edev, fp->txq);
3318 if (rc)
3319 goto out;
3320 }
3321
3322out:
3323 return rc;
3324}
3325
3326static void qede_free_mem_load(struct qede_dev *edev)
3327{
3328 int i;
3329
3330 for_each_queue(i) {
3331 struct qede_fastpath *fp = &edev->fp_array[i];
3332
3333 qede_free_mem_fp(edev, fp);
3334 }
3335}
3336
3337/* This function allocates all qede memory at NIC load. */
3338static int qede_alloc_mem_load(struct qede_dev *edev)
3339{
3340 int rc = 0, queue_id;
3341
3342 for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) {
3343 struct qede_fastpath *fp = &edev->fp_array[queue_id];
3344
3345 rc = qede_alloc_mem_fp(edev, fp);
3346 if (rc) {
3347 DP_ERR(edev,
3348 "Failed to allocate memory for fastpath - rss id = %d\n",
3349 queue_id);
3350 qede_free_mem_load(edev);
3351 return rc;
3352 }
3353 }
3354
3355 return 0;
3356}
3357
3358/* This function inits fp content and resets the SB, RXQ and TXQ structures */
3359static void qede_init_fp(struct qede_dev *edev)
3360{
3361 int queue_id, rxq_index = 0, txq_index = 0;
3362 struct qede_fastpath *fp;
3363
3364 for_each_queue(queue_id) {
3365 fp = &edev->fp_array[queue_id];
3366
3367 fp->edev = edev;
3368 fp->id = queue_id;
3369
3370 if (fp->type & QEDE_FASTPATH_XDP) {
3371 fp->xdp_tx->index = QEDE_TXQ_IDX_TO_XDP(edev,
3372 rxq_index);
3373 fp->xdp_tx->is_xdp = 1;
3374 }
3375
3376 if (fp->type & QEDE_FASTPATH_RX) {
3377 fp->rxq->rxq_id = rxq_index++;
3378
3379 /* Determine how to map buffers for this queue */
3380 if (fp->type & QEDE_FASTPATH_XDP)
3381 fp->rxq->data_direction = DMA_BIDIRECTIONAL;
3382 else
3383 fp->rxq->data_direction = DMA_FROM_DEVICE;
3384 fp->rxq->dev = &edev->pdev->dev;
3385 }
3386
3387 if (fp->type & QEDE_FASTPATH_TX) {
3388 fp->txq->index = txq_index++;
3389 if (edev->dev_info.is_legacy)
3390 fp->txq->is_legacy = 1;
3391 fp->txq->dev = &edev->pdev->dev;
3392 }
3393
3394 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
3395 edev->ndev->name, queue_id);
3396 }
3397
3398 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO);
3399}
3400
3401static int qede_set_real_num_queues(struct qede_dev *edev)
3402{
3403 int rc = 0;
3404
3405 rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_COUNT(edev));
3406 if (rc) {
3407 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
3408 return rc;
3409 }
3410
3411 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev));
3412 if (rc) {
3413 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
3414 return rc;
3415 }
3416
3417 return 0;
3418}
3419
3420static void qede_napi_disable_remove(struct qede_dev *edev)
3421{
3422 int i;
3423
3424 for_each_queue(i) {
3425 napi_disable(&edev->fp_array[i].napi);
3426
3427 netif_napi_del(&edev->fp_array[i].napi);
3428 }
3429}
3430
3431static void qede_napi_add_enable(struct qede_dev *edev)
3432{
3433 int i;
3434
3435 /* Add NAPI objects */
3436 for_each_queue(i) {
3437 netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
3438 qede_poll, NAPI_POLL_WEIGHT);
3439 napi_enable(&edev->fp_array[i].napi);
3440 }
3441}
3442
3443static void qede_sync_free_irqs(struct qede_dev *edev)
3444{
3445 int i;
3446
3447 for (i = 0; i < edev->int_info.used_cnt; i++) {
3448 if (edev->int_info.msix_cnt) {
3449 synchronize_irq(edev->int_info.msix[i].vector);
3450 free_irq(edev->int_info.msix[i].vector,
3451 &edev->fp_array[i]);
3452 } else {
3453 edev->ops->common->simd_handler_clean(edev->cdev, i);
3454 }
3455 }
3456
3457 edev->int_info.used_cnt = 0;
3458}
3459
3460static int qede_req_msix_irqs(struct qede_dev *edev)
3461{
3462 int i, rc;
3463
3464 /* Sanitize number of interrupts == number of prepared RSS queues */
3465 if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) {
3466 DP_ERR(edev,
3467 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
3468 QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt);
3469 return -EINVAL;
3470 }
3471
3472 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
3473 rc = request_irq(edev->int_info.msix[i].vector,
3474 qede_msix_fp_int, 0, edev->fp_array[i].name,
3475 &edev->fp_array[i]);
3476 if (rc) {
3477 DP_ERR(edev, "Request fp %d irq failed\n", i);
3478 qede_sync_free_irqs(edev);
3479 return rc;
3480 }
3481 DP_VERBOSE(edev, NETIF_MSG_INTR,
3482 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
3483 edev->fp_array[i].name, i,
3484 &edev->fp_array[i]);
3485 edev->int_info.used_cnt++;
3486 }
3487
3488 return 0;
3489}
3490
3491static void qede_simd_fp_handler(void *cookie)
3492{
3493 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
3494
3495 napi_schedule_irqoff(&fp->napi);
3496}
3497
3498static int qede_setup_irqs(struct qede_dev *edev)
3499{
3500 int i, rc = 0;
3501
3502 /* Learn Interrupt configuration */
3503 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
3504 if (rc)
3505 return rc;
3506
3507 if (edev->int_info.msix_cnt) {
3508 rc = qede_req_msix_irqs(edev);
3509 if (rc)
3510 return rc;
3511 edev->ndev->irq = edev->int_info.msix[0].vector;
3512 } else {
3513 const struct qed_common_ops *ops;
3514
3515 /* qed should learn receive the RSS ids and callbacks */
3516 ops = edev->ops->common;
3517 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++)
3518 ops->simd_handler_config(edev->cdev,
3519 &edev->fp_array[i], i,
3520 qede_simd_fp_handler);
3521 edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev);
3522 }
3523 return 0;
3524}
3525
3526static int qede_drain_txq(struct qede_dev *edev,
3527 struct qede_tx_queue *txq, bool allow_drain)
3528{
3529 int rc, cnt = 1000;
3530
3531 while (txq->sw_tx_cons != txq->sw_tx_prod) {
3532 if (!cnt) {
3533 if (allow_drain) {
3534 DP_NOTICE(edev,
3535 "Tx queue[%d] is stuck, requesting MCP to drain\n",
3536 txq->index);
3537 rc = edev->ops->common->drain(edev->cdev);
3538 if (rc)
3539 return rc;
3540 return qede_drain_txq(edev, txq, false);
3541 }
3542 DP_NOTICE(edev,
3543 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
3544 txq->index, txq->sw_tx_prod,
3545 txq->sw_tx_cons);
3546 return -ENODEV;
3547 }
3548 cnt--;
3549 usleep_range(1000, 2000);
3550 barrier();
3551 }
3552
3553 /* FW finished processing, wait for HW to transmit all tx packets */
3554 usleep_range(1000, 2000);
3555
3556 return 0;
3557}
3558
3559static int qede_stop_txq(struct qede_dev *edev,
3560 struct qede_tx_queue *txq, int rss_id)
3561{
3562 return edev->ops->q_tx_stop(edev->cdev, rss_id, txq->handle);
3563}
3564
3565static int qede_stop_queues(struct qede_dev *edev)
3566{
3567 struct qed_update_vport_params vport_update_params;
3568 struct qed_dev *cdev = edev->cdev;
3569 struct qede_fastpath *fp;
3570 int rc, i;
3571
3572 /* Disable the vport */
3573 memset(&vport_update_params, 0, sizeof(vport_update_params));
3574 vport_update_params.vport_id = 0;
3575 vport_update_params.update_vport_active_flg = 1;
3576 vport_update_params.vport_active_flg = 0;
3577 vport_update_params.update_rss_flg = 0;
3578
3579 rc = edev->ops->vport_update(cdev, &vport_update_params);
3580 if (rc) {
3581 DP_ERR(edev, "Failed to update vport\n");
3582 return rc;
3583 }
3584
3585 /* Flush Tx queues. If needed, request drain from MCP */
3586 for_each_queue(i) {
3587 fp = &edev->fp_array[i];
3588
3589 if (fp->type & QEDE_FASTPATH_TX) {
3590 rc = qede_drain_txq(edev, fp->txq, true);
3591 if (rc)
3592 return rc;
3593 }
3594
3595 if (fp->type & QEDE_FASTPATH_XDP) {
3596 rc = qede_drain_txq(edev, fp->xdp_tx, true);
3597 if (rc)
3598 return rc;
3599 }
3600 }
3601
3602 /* Stop all Queues in reverse order */
3603 for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) {
3604 fp = &edev->fp_array[i];
3605
3606 /* Stop the Tx Queue(s) */
3607 if (fp->type & QEDE_FASTPATH_TX) {
3608 rc = qede_stop_txq(edev, fp->txq, i);
3609 if (rc)
3610 return rc;
3611 }
3612
3613 /* Stop the Rx Queue */
3614 if (fp->type & QEDE_FASTPATH_RX) {
3615 rc = edev->ops->q_rx_stop(cdev, i, fp->rxq->handle);
3616 if (rc) {
3617 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
3618 return rc;
3619 }
3620 }
3621
3622 /* Stop the XDP forwarding queue */
3623 if (fp->type & QEDE_FASTPATH_XDP) {
3624 rc = qede_stop_txq(edev, fp->xdp_tx, i);
3625 if (rc)
3626 return rc;
3627
3628 bpf_prog_put(fp->rxq->xdp_prog);
3629 }
3630 }
3631
3632 /* Stop the vport */
3633 rc = edev->ops->vport_stop(cdev, 0);
3634 if (rc)
3635 DP_ERR(edev, "Failed to stop VPORT\n");
3636
3637 return rc;
3638}
3639
3640static int qede_start_txq(struct qede_dev *edev,
3641 struct qede_fastpath *fp,
3642 struct qede_tx_queue *txq, u8 rss_id, u16 sb_idx)
3643{
3644 dma_addr_t phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl);
3645 u32 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl);
3646 struct qed_queue_start_common_params params;
3647 struct qed_txq_start_ret_params ret_params;
3648 int rc;
3649
3650 memset(¶ms, 0, sizeof(params));
3651 memset(&ret_params, 0, sizeof(ret_params));
3652
3653 /* Let the XDP queue share the queue-zone with one of the regular txq.
3654 * We don't really care about its coalescing.
3655 */
3656 if (txq->is_xdp)
3657 params.queue_id = QEDE_TXQ_XDP_TO_IDX(edev, txq);
3658 else
3659 params.queue_id = txq->index;
3660
3661 params.sb = fp->sb_info->igu_sb_id;
3662 params.sb_idx = sb_idx;
3663
3664 rc = edev->ops->q_tx_start(edev->cdev, rss_id, ¶ms, phys_table,
3665 page_cnt, &ret_params);
3666 if (rc) {
3667 DP_ERR(edev, "Start TXQ #%d failed %d\n", txq->index, rc);
3668 return rc;
3669 }
3670
3671 txq->doorbell_addr = ret_params.p_doorbell;
3672 txq->handle = ret_params.p_handle;
3673
3674 /* Determine the FW consumer address associated */
3675 txq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[sb_idx];
3676
3677 /* Prepare the doorbell parameters */
3678 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_DEST, DB_DEST_XCM);
3679 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
3680 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_VAL_SEL,
3681 DQ_XCM_ETH_TX_BD_PROD_CMD);
3682 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
3683
3684 return rc;
3685}
3686
3687static int qede_start_queues(struct qede_dev *edev, bool clear_stats)
3688{
3689 int vlan_removal_en = 1;
3690 struct qed_dev *cdev = edev->cdev;
3691 struct qed_update_vport_params vport_update_params;
3692 struct qed_queue_start_common_params q_params;
3693 struct qed_dev_info *qed_info = &edev->dev_info.common;
3694 struct qed_start_vport_params start = {0};
3695 bool reset_rss_indir = false;
3696 int rc, i;
3697
3698 if (!edev->num_queues) {
3699 DP_ERR(edev,
3700 "Cannot update V-VPORT as active as there are no Rx queues\n");
3701 return -EINVAL;
3702 }
3703
3704 start.gro_enable = !edev->gro_disable;
3705 start.mtu = edev->ndev->mtu;
3706 start.vport_id = 0;
3707 start.drop_ttl0 = true;
3708 start.remove_inner_vlan = vlan_removal_en;
3709 start.clear_stats = clear_stats;
3710
3711 rc = edev->ops->vport_start(cdev, &start);
3712
3713 if (rc) {
3714 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
3715 return rc;
3716 }
3717
3718 DP_VERBOSE(edev, NETIF_MSG_IFUP,
3719 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
3720 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
3721
3722 for_each_queue(i) {
3723 struct qede_fastpath *fp = &edev->fp_array[i];
3724 dma_addr_t p_phys_table;
3725 u32 page_cnt;
3726
3727 if (fp->type & QEDE_FASTPATH_RX) {
3728 struct qed_rxq_start_ret_params ret_params;
3729 struct qede_rx_queue *rxq = fp->rxq;
3730 __le16 *val;
3731
3732 memset(&ret_params, 0, sizeof(ret_params));
3733 memset(&q_params, 0, sizeof(q_params));
3734 q_params.queue_id = rxq->rxq_id;
3735 q_params.vport_id = 0;
3736 q_params.sb = fp->sb_info->igu_sb_id;
3737 q_params.sb_idx = RX_PI;
3738
3739 p_phys_table =
3740 qed_chain_get_pbl_phys(&rxq->rx_comp_ring);
3741 page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring);
3742
3743 rc = edev->ops->q_rx_start(cdev, i, &q_params,
3744 rxq->rx_buf_size,
3745 rxq->rx_bd_ring.p_phys_addr,
3746 p_phys_table,
3747 page_cnt, &ret_params);
3748 if (rc) {
3749 DP_ERR(edev, "Start RXQ #%d failed %d\n", i,
3750 rc);
3751 return rc;
3752 }
3753
3754 /* Use the return parameters */
3755 rxq->hw_rxq_prod_addr = ret_params.p_prod;
3756 rxq->handle = ret_params.p_handle;
3757
3758 val = &fp->sb_info->sb_virt->pi_array[RX_PI];
3759 rxq->hw_cons_ptr = val;
3760
3761 qede_update_rx_prod(edev, rxq);
3762 }
3763
3764 if (fp->type & QEDE_FASTPATH_XDP) {
3765 rc = qede_start_txq(edev, fp, fp->xdp_tx, i, XDP_PI);
3766 if (rc)
3767 return rc;
3768
3769 fp->rxq->xdp_prog = bpf_prog_add(edev->xdp_prog, 1);
3770 if (IS_ERR(fp->rxq->xdp_prog)) {
3771 rc = PTR_ERR(fp->rxq->xdp_prog);
3772 fp->rxq->xdp_prog = NULL;
3773 return rc;
3774 }
3775 }
3776
3777 if (fp->type & QEDE_FASTPATH_TX) {
3778 rc = qede_start_txq(edev, fp, fp->txq, i, TX_PI(0));
3779 if (rc)
3780 return rc;
3781 }
3782 }
3783
3784 /* Prepare and send the vport enable */
3785 memset(&vport_update_params, 0, sizeof(vport_update_params));
3786 vport_update_params.vport_id = start.vport_id;
3787 vport_update_params.update_vport_active_flg = 1;
3788 vport_update_params.vport_active_flg = 1;
3789
3790 if ((qed_info->mf_mode == QED_MF_NPAR || pci_num_vf(edev->pdev)) &&
3791 qed_info->tx_switching) {
3792 vport_update_params.update_tx_switching_flg = 1;
3793 vport_update_params.tx_switching_flg = 1;
3794 }
3795
3796 /* Fill struct with RSS params */
3797 if (QEDE_RSS_COUNT(edev) > 1) {
3798 vport_update_params.update_rss_flg = 1;
3799
3800 /* Need to validate current RSS config uses valid entries */
3801 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3802 if (edev->rss_params.rss_ind_table[i] >=
3803 QEDE_RSS_COUNT(edev)) {
3804 reset_rss_indir = true;
3805 break;
3806 }
3807 }
3808
3809 if (!(edev->rss_params_inited & QEDE_RSS_INDIR_INITED) ||
3810 reset_rss_indir) {
3811 u16 val;
3812
3813 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3814 u16 indir_val;
3815
3816 val = QEDE_RSS_COUNT(edev);
3817 indir_val = ethtool_rxfh_indir_default(i, val);
3818 edev->rss_params.rss_ind_table[i] = indir_val;
3819 }
3820 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
3821 }
3822
3823 if (!(edev->rss_params_inited & QEDE_RSS_KEY_INITED)) {
3824 netdev_rss_key_fill(edev->rss_params.rss_key,
3825 sizeof(edev->rss_params.rss_key));
3826 edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
3827 }
3828
3829 if (!(edev->rss_params_inited & QEDE_RSS_CAPS_INITED)) {
3830 edev->rss_params.rss_caps = QED_RSS_IPV4 |
3831 QED_RSS_IPV6 |
3832 QED_RSS_IPV4_TCP |
3833 QED_RSS_IPV6_TCP;
3834 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
3835 }
3836
3837 memcpy(&vport_update_params.rss_params, &edev->rss_params,
3838 sizeof(vport_update_params.rss_params));
3839 } else {
3840 memset(&vport_update_params.rss_params, 0,
3841 sizeof(vport_update_params.rss_params));
3842 }
3843
3844 rc = edev->ops->vport_update(cdev, &vport_update_params);
3845 if (rc) {
3846 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
3847 return rc;
3848 }
3849
3850 return 0;
3851}
3852
3853static int qede_set_mcast_rx_mac(struct qede_dev *edev,
3854 enum qed_filter_xcast_params_type opcode,
3855 unsigned char *mac, int num_macs)
3856{
3857 struct qed_filter_params filter_cmd;
3858 int i;
3859
3860 memset(&filter_cmd, 0, sizeof(filter_cmd));
3861 filter_cmd.type = QED_FILTER_TYPE_MCAST;
3862 filter_cmd.filter.mcast.type = opcode;
3863 filter_cmd.filter.mcast.num = num_macs;
3864
3865 for (i = 0; i < num_macs; i++, mac += ETH_ALEN)
3866 ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac);
3867
3868 return edev->ops->filter_config(edev->cdev, &filter_cmd);
3869}
3870
3871enum qede_unload_mode {
3872 QEDE_UNLOAD_NORMAL,
3873};
3874
3875static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode,
3876 bool is_locked)
3877{
3878 struct qed_link_params link_params;
3879 int rc;
3880
3881 DP_INFO(edev, "Starting qede unload\n");
3882
3883 if (!is_locked)
3884 __qede_lock(edev);
3885
3886 qede_roce_dev_event_close(edev);
3887 edev->state = QEDE_STATE_CLOSED;
3888
3889 /* Close OS Tx */
3890 netif_tx_disable(edev->ndev);
3891 netif_carrier_off(edev->ndev);
3892
3893 /* Reset the link */
3894 memset(&link_params, 0, sizeof(link_params));
3895 link_params.link_up = false;
3896 edev->ops->common->set_link(edev->cdev, &link_params);
3897 rc = qede_stop_queues(edev);
3898 if (rc) {
3899 qede_sync_free_irqs(edev);
3900 goto out;
3901 }
3902
3903 DP_INFO(edev, "Stopped Queues\n");
3904
3905 qede_vlan_mark_nonconfigured(edev);
3906 edev->ops->fastpath_stop(edev->cdev);
3907
3908 /* Release the interrupts */
3909 qede_sync_free_irqs(edev);
3910 edev->ops->common->set_fp_int(edev->cdev, 0);
3911
3912 qede_napi_disable_remove(edev);
3913
3914 qede_free_mem_load(edev);
3915 qede_free_fp_array(edev);
3916
3917out:
3918 if (!is_locked)
3919 __qede_unlock(edev);
3920 DP_INFO(edev, "Ending qede unload\n");
3921}
3922
3923enum qede_load_mode {
3924 QEDE_LOAD_NORMAL,
3925 QEDE_LOAD_RELOAD,
3926};
3927
3928static int qede_load(struct qede_dev *edev, enum qede_load_mode mode,
3929 bool is_locked)
3930{
3931 struct qed_link_params link_params;
3932 struct qed_link_output link_output;
3933 int rc;
3934
3935 DP_INFO(edev, "Starting qede load\n");
3936
3937 if (!is_locked)
3938 __qede_lock(edev);
3939
3940 rc = qede_set_num_queues(edev);
3941 if (rc)
3942 goto out;
3943
3944 rc = qede_alloc_fp_array(edev);
3945 if (rc)
3946 goto out;
3947
3948 qede_init_fp(edev);
3949
3950 rc = qede_alloc_mem_load(edev);
3951 if (rc)
3952 goto err1;
3953 DP_INFO(edev, "Allocated %d Rx, %d Tx queues\n",
3954 QEDE_RSS_COUNT(edev), QEDE_TSS_COUNT(edev));
3955
3956 rc = qede_set_real_num_queues(edev);
3957 if (rc)
3958 goto err2;
3959
3960 qede_napi_add_enable(edev);
3961 DP_INFO(edev, "Napi added and enabled\n");
3962
3963 rc = qede_setup_irqs(edev);
3964 if (rc)
3965 goto err3;
3966 DP_INFO(edev, "Setup IRQs succeeded\n");
3967
3968 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD);
3969 if (rc)
3970 goto err4;
3971 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
3972
3973 /* Add primary mac and set Rx filters */
3974 ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr);
3975
3976 /* Program un-configured VLANs */
3977 qede_configure_vlan_filters(edev);
3978
3979 /* Ask for link-up using current configuration */
3980 memset(&link_params, 0, sizeof(link_params));
3981 link_params.link_up = true;
3982 edev->ops->common->set_link(edev->cdev, &link_params);
3983
3984 /* Query whether link is already-up */
3985 memset(&link_output, 0, sizeof(link_output));
3986 edev->ops->common->get_link(edev->cdev, &link_output);
3987 qede_roce_dev_event_open(edev);
3988 qede_link_update(edev, &link_output);
3989
3990 edev->state = QEDE_STATE_OPEN;
3991
3992 DP_INFO(edev, "Ending successfully qede load\n");
3993
3994
3995 goto out;
3996err4:
3997 qede_sync_free_irqs(edev);
3998 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
3999err3:
4000 qede_napi_disable_remove(edev);
4001err2:
4002 qede_free_mem_load(edev);
4003err1:
4004 edev->ops->common->set_fp_int(edev->cdev, 0);
4005 qede_free_fp_array(edev);
4006 edev->num_queues = 0;
4007 edev->fp_num_tx = 0;
4008 edev->fp_num_rx = 0;
4009out:
4010 if (!is_locked)
4011 __qede_unlock(edev);
4012
4013 return rc;
4014}
4015
4016/* 'func' should be able to run between unload and reload assuming interface
4017 * is actually running, or afterwards in case it's currently DOWN.
4018 */
4019void qede_reload(struct qede_dev *edev,
4020 struct qede_reload_args *args, bool is_locked)
4021{
4022 if (!is_locked)
4023 __qede_lock(edev);
4024
4025 /* Since qede_lock is held, internal state wouldn't change even
4026 * if netdev state would start transitioning. Check whether current
4027 * internal configuration indicates device is up, then reload.
4028 */
4029 if (edev->state == QEDE_STATE_OPEN) {
4030 qede_unload(edev, QEDE_UNLOAD_NORMAL, true);
4031 if (args)
4032 args->func(edev, args);
4033 qede_load(edev, QEDE_LOAD_RELOAD, true);
4034
4035 /* Since no one is going to do it for us, re-configure */
4036 qede_config_rx_mode(edev->ndev);
4037 } else if (args) {
4038 args->func(edev, args);
4039 }
4040
4041 if (!is_locked)
4042 __qede_unlock(edev);
4043}
4044
4045/* called with rtnl_lock */
4046static int qede_open(struct net_device *ndev)
4047{
4048 struct qede_dev *edev = netdev_priv(ndev);
4049 int rc;
4050
4051 netif_carrier_off(ndev);
4052
4053 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
4054
4055 rc = qede_load(edev, QEDE_LOAD_NORMAL, false);
4056 if (rc)
4057 return rc;
4058
4059 udp_tunnel_get_rx_info(ndev);
4060
4061 edev->ops->common->update_drv_state(edev->cdev, true);
4062
4063 return 0;
4064}
4065
4066static int qede_close(struct net_device *ndev)
4067{
4068 struct qede_dev *edev = netdev_priv(ndev);
4069
4070 qede_unload(edev, QEDE_UNLOAD_NORMAL, false);
4071
4072 edev->ops->common->update_drv_state(edev->cdev, false);
4073
4074 return 0;
4075}
4076
4077static void qede_link_update(void *dev, struct qed_link_output *link)
4078{
4079 struct qede_dev *edev = dev;
4080
4081 if (!netif_running(edev->ndev)) {
4082 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n");
4083 return;
4084 }
4085
4086 if (link->link_up) {
4087 if (!netif_carrier_ok(edev->ndev)) {
4088 DP_NOTICE(edev, "Link is up\n");
4089 netif_tx_start_all_queues(edev->ndev);
4090 netif_carrier_on(edev->ndev);
4091 }
4092 } else {
4093 if (netif_carrier_ok(edev->ndev)) {
4094 DP_NOTICE(edev, "Link is down\n");
4095 netif_tx_disable(edev->ndev);
4096 netif_carrier_off(edev->ndev);
4097 }
4098 }
4099}
4100
4101static int qede_set_mac_addr(struct net_device *ndev, void *p)
4102{
4103 struct qede_dev *edev = netdev_priv(ndev);
4104 struct sockaddr *addr = p;
4105 int rc;
4106
4107 ASSERT_RTNL(); /* @@@TBD To be removed */
4108
4109 DP_INFO(edev, "Set_mac_addr called\n");
4110
4111 if (!is_valid_ether_addr(addr->sa_data)) {
4112 DP_NOTICE(edev, "The MAC address is not valid\n");
4113 return -EFAULT;
4114 }
4115
4116 if (!edev->ops->check_mac(edev->cdev, addr->sa_data)) {
4117 DP_NOTICE(edev, "qed prevents setting MAC\n");
4118 return -EINVAL;
4119 }
4120
4121 ether_addr_copy(ndev->dev_addr, addr->sa_data);
4122
4123 if (!netif_running(ndev)) {
4124 DP_NOTICE(edev, "The device is currently down\n");
4125 return 0;
4126 }
4127
4128 /* Remove the previous primary mac */
4129 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
4130 edev->primary_mac);
4131 if (rc)
4132 return rc;
4133
4134 edev->ops->common->update_mac(edev->cdev, addr->sa_data);
4135
4136 /* Add MAC filter according to the new unicast HW MAC address */
4137 ether_addr_copy(edev->primary_mac, ndev->dev_addr);
4138 return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
4139 edev->primary_mac);
4140}
4141
4142static int
4143qede_configure_mcast_filtering(struct net_device *ndev,
4144 enum qed_filter_rx_mode_type *accept_flags)
4145{
4146 struct qede_dev *edev = netdev_priv(ndev);
4147 unsigned char *mc_macs, *temp;
4148 struct netdev_hw_addr *ha;
4149 int rc = 0, mc_count;
4150 size_t size;
4151
4152 size = 64 * ETH_ALEN;
4153
4154 mc_macs = kzalloc(size, GFP_KERNEL);
4155 if (!mc_macs) {
4156 DP_NOTICE(edev,
4157 "Failed to allocate memory for multicast MACs\n");
4158 rc = -ENOMEM;
4159 goto exit;
4160 }
4161
4162 temp = mc_macs;
4163
4164 /* Remove all previously configured MAC filters */
4165 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
4166 mc_macs, 1);
4167 if (rc)
4168 goto exit;
4169
4170 netif_addr_lock_bh(ndev);
4171
4172 mc_count = netdev_mc_count(ndev);
4173 if (mc_count < 64) {
4174 netdev_for_each_mc_addr(ha, ndev) {
4175 ether_addr_copy(temp, ha->addr);
4176 temp += ETH_ALEN;
4177 }
4178 }
4179
4180 netif_addr_unlock_bh(ndev);
4181
4182 /* Check for all multicast @@@TBD resource allocation */
4183 if ((ndev->flags & IFF_ALLMULTI) ||
4184 (mc_count > 64)) {
4185 if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR)
4186 *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
4187 } else {
4188 /* Add all multicast MAC filters */
4189 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
4190 mc_macs, mc_count);
4191 }
4192
4193exit:
4194 kfree(mc_macs);
4195 return rc;
4196}
4197
4198static void qede_set_rx_mode(struct net_device *ndev)
4199{
4200 struct qede_dev *edev = netdev_priv(ndev);
4201
4202 set_bit(QEDE_SP_RX_MODE, &edev->sp_flags);
4203 schedule_delayed_work(&edev->sp_task, 0);
4204}
4205
4206/* Must be called with qede_lock held */
4207static void qede_config_rx_mode(struct net_device *ndev)
4208{
4209 enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST;
4210 struct qede_dev *edev = netdev_priv(ndev);
4211 struct qed_filter_params rx_mode;
4212 unsigned char *uc_macs, *temp;
4213 struct netdev_hw_addr *ha;
4214 int rc, uc_count;
4215 size_t size;
4216
4217 netif_addr_lock_bh(ndev);
4218
4219 uc_count = netdev_uc_count(ndev);
4220 size = uc_count * ETH_ALEN;
4221
4222 uc_macs = kzalloc(size, GFP_ATOMIC);
4223 if (!uc_macs) {
4224 DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n");
4225 netif_addr_unlock_bh(ndev);
4226 return;
4227 }
4228
4229 temp = uc_macs;
4230 netdev_for_each_uc_addr(ha, ndev) {
4231 ether_addr_copy(temp, ha->addr);
4232 temp += ETH_ALEN;
4233 }
4234
4235 netif_addr_unlock_bh(ndev);
4236
4237 /* Configure the struct for the Rx mode */
4238 memset(&rx_mode, 0, sizeof(struct qed_filter_params));
4239 rx_mode.type = QED_FILTER_TYPE_RX_MODE;
4240
4241 /* Remove all previous unicast secondary macs and multicast macs
4242 * (configrue / leave the primary mac)
4243 */
4244 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE,
4245 edev->primary_mac);
4246 if (rc)
4247 goto out;
4248
4249 /* Check for promiscuous */
4250 if ((ndev->flags & IFF_PROMISC) ||
4251 (uc_count > edev->dev_info.num_mac_filters - 1)) {
4252 accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC;
4253 } else {
4254 /* Add MAC filters according to the unicast secondary macs */
4255 int i;
4256
4257 temp = uc_macs;
4258 for (i = 0; i < uc_count; i++) {
4259 rc = qede_set_ucast_rx_mac(edev,
4260 QED_FILTER_XCAST_TYPE_ADD,
4261 temp);
4262 if (rc)
4263 goto out;
4264
4265 temp += ETH_ALEN;
4266 }
4267
4268 rc = qede_configure_mcast_filtering(ndev, &accept_flags);
4269 if (rc)
4270 goto out;
4271 }
4272
4273 /* take care of VLAN mode */
4274 if (ndev->flags & IFF_PROMISC) {
4275 qede_config_accept_any_vlan(edev, true);
4276 } else if (!edev->non_configured_vlans) {
4277 /* It's possible that accept_any_vlan mode is set due to a
4278 * previous setting of IFF_PROMISC. If vlan credits are
4279 * sufficient, disable accept_any_vlan.
4280 */
4281 qede_config_accept_any_vlan(edev, false);
4282 }
4283
4284 rx_mode.filter.accept_flags = accept_flags;
4285 edev->ops->filter_config(edev->cdev, &rx_mode);
4286out:
4287 kfree(uc_macs);
4288}