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1/*
2 * Copyright 2005 Stephane Marchesin.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 */
24
25#include <linux/console.h>
26#include <linux/module.h>
27
28#include "drmP.h"
29#include "drm.h"
30#include "drm_crtc_helper.h"
31#include "nouveau_drv.h"
32#include "nouveau_hw.h"
33#include "nouveau_fb.h"
34#include "nouveau_fbcon.h"
35#include "nouveau_pm.h"
36#include "nouveau_fifo.h"
37#include "nv50_display.h"
38
39#include "drm_pciids.h"
40
41MODULE_PARM_DESC(agpmode, "AGP mode (0 to disable AGP)");
42int nouveau_agpmode = -1;
43module_param_named(agpmode, nouveau_agpmode, int, 0400);
44
45MODULE_PARM_DESC(modeset, "Enable kernel modesetting");
46int nouveau_modeset = -1;
47module_param_named(modeset, nouveau_modeset, int, 0400);
48
49MODULE_PARM_DESC(vbios, "Override default VBIOS location");
50char *nouveau_vbios;
51module_param_named(vbios, nouveau_vbios, charp, 0400);
52
53MODULE_PARM_DESC(vram_pushbuf, "Force DMA push buffers to be in VRAM");
54int nouveau_vram_pushbuf;
55module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);
56
57MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM");
58int nouveau_vram_notify = 0;
59module_param_named(vram_notify, nouveau_vram_notify, int, 0400);
60
61MODULE_PARM_DESC(vram_type, "Override detected VRAM type");
62char *nouveau_vram_type;
63module_param_named(vram_type, nouveau_vram_type, charp, 0400);
64
65MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)");
66int nouveau_duallink = 1;
67module_param_named(duallink, nouveau_duallink, int, 0400);
68
69MODULE_PARM_DESC(uscript_lvds, "LVDS output script table ID (>=GeForce 8)");
70int nouveau_uscript_lvds = -1;
71module_param_named(uscript_lvds, nouveau_uscript_lvds, int, 0400);
72
73MODULE_PARM_DESC(uscript_tmds, "TMDS output script table ID (>=GeForce 8)");
74int nouveau_uscript_tmds = -1;
75module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400);
76
77MODULE_PARM_DESC(ignorelid, "Ignore ACPI lid status");
78int nouveau_ignorelid = 0;
79module_param_named(ignorelid, nouveau_ignorelid, int, 0400);
80
81MODULE_PARM_DESC(noaccel, "Disable all acceleration");
82int nouveau_noaccel = -1;
83module_param_named(noaccel, nouveau_noaccel, int, 0400);
84
85MODULE_PARM_DESC(nofbaccel, "Disable fbcon acceleration");
86int nouveau_nofbaccel = 0;
87module_param_named(nofbaccel, nouveau_nofbaccel, int, 0400);
88
89MODULE_PARM_DESC(force_post, "Force POST");
90int nouveau_force_post = 0;
91module_param_named(force_post, nouveau_force_post, int, 0400);
92
93MODULE_PARM_DESC(override_conntype, "Ignore DCB connector type");
94int nouveau_override_conntype = 0;
95module_param_named(override_conntype, nouveau_override_conntype, int, 0400);
96
97MODULE_PARM_DESC(tv_disable, "Disable TV-out detection");
98int nouveau_tv_disable = 0;
99module_param_named(tv_disable, nouveau_tv_disable, int, 0400);
100
101MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
102 "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
103 "\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
104 "\t\tDefault: PAL\n"
105 "\t\t*NOTE* Ignored for cards with external TV encoders.");
106char *nouveau_tv_norm;
107module_param_named(tv_norm, nouveau_tv_norm, charp, 0400);
108
109MODULE_PARM_DESC(reg_debug, "Register access debug bitmask:\n"
110 "\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
111 "\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
112 "\t\t0x100 vgaattr, 0x200 EVO (G80+)");
113int nouveau_reg_debug;
114module_param_named(reg_debug, nouveau_reg_debug, int, 0600);
115
116MODULE_PARM_DESC(perflvl, "Performance level (default: boot)");
117char *nouveau_perflvl;
118module_param_named(perflvl, nouveau_perflvl, charp, 0400);
119
120MODULE_PARM_DESC(perflvl_wr, "Allow perflvl changes (warning: dangerous!)");
121int nouveau_perflvl_wr;
122module_param_named(perflvl_wr, nouveau_perflvl_wr, int, 0400);
123
124MODULE_PARM_DESC(msi, "Enable MSI (default: off)");
125int nouveau_msi;
126module_param_named(msi, nouveau_msi, int, 0400);
127
128MODULE_PARM_DESC(ctxfw, "Use external HUB/GPC ucode (fermi)");
129int nouveau_ctxfw;
130module_param_named(ctxfw, nouveau_ctxfw, int, 0400);
131
132MODULE_PARM_DESC(mxmdcb, "Santise DCB table according to MXM-SIS");
133int nouveau_mxmdcb = 1;
134module_param_named(mxmdcb, nouveau_mxmdcb, int, 0400);
135
136int nouveau_fbpercrtc;
137#if 0
138module_param_named(fbpercrtc, nouveau_fbpercrtc, int, 0400);
139#endif
140
141static struct pci_device_id pciidlist[] = {
142 {
143 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
144 .class = PCI_BASE_CLASS_DISPLAY << 16,
145 .class_mask = 0xff << 16,
146 },
147 {
148 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
149 .class = PCI_BASE_CLASS_DISPLAY << 16,
150 .class_mask = 0xff << 16,
151 },
152 {}
153};
154
155MODULE_DEVICE_TABLE(pci, pciidlist);
156
157static struct drm_driver driver;
158
159static int __devinit
160nouveau_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
161{
162 return drm_get_pci_dev(pdev, ent, &driver);
163}
164
165static void
166nouveau_pci_remove(struct pci_dev *pdev)
167{
168 struct drm_device *dev = pci_get_drvdata(pdev);
169
170 drm_put_dev(dev);
171}
172
173int
174nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
175{
176 struct drm_device *dev = pci_get_drvdata(pdev);
177 struct drm_nouveau_private *dev_priv = dev->dev_private;
178 struct nouveau_instmem_engine *pinstmem = &dev_priv->engine.instmem;
179 struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);
180 struct nouveau_channel *chan;
181 struct drm_crtc *crtc;
182 int ret, i, e;
183
184 if (pm_state.event == PM_EVENT_PRETHAW)
185 return 0;
186
187 if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
188 return 0;
189
190 NV_INFO(dev, "Disabling display...\n");
191 nouveau_display_fini(dev);
192
193 NV_INFO(dev, "Disabling fbcon...\n");
194 nouveau_fbcon_set_suspend(dev, 1);
195
196 NV_INFO(dev, "Unpinning framebuffer(s)...\n");
197 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
198 struct nouveau_framebuffer *nouveau_fb;
199
200 nouveau_fb = nouveau_framebuffer(crtc->fb);
201 if (!nouveau_fb || !nouveau_fb->nvbo)
202 continue;
203
204 nouveau_bo_unpin(nouveau_fb->nvbo);
205 }
206
207 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
208 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
209
210 nouveau_bo_unmap(nv_crtc->cursor.nvbo);
211 nouveau_bo_unpin(nv_crtc->cursor.nvbo);
212 }
213
214 NV_INFO(dev, "Evicting buffers...\n");
215 ttm_bo_evict_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);
216
217 NV_INFO(dev, "Idling channels...\n");
218 for (i = 0; i < (pfifo ? pfifo->channels : 0); i++) {
219 chan = dev_priv->channels.ptr[i];
220
221 if (chan && chan->pushbuf_bo)
222 nouveau_channel_idle(chan);
223 }
224
225 for (e = NVOBJ_ENGINE_NR - 1; e >= 0; e--) {
226 if (!dev_priv->eng[e])
227 continue;
228
229 ret = dev_priv->eng[e]->fini(dev, e, true);
230 if (ret) {
231 NV_ERROR(dev, "... engine %d failed: %d\n", e, ret);
232 goto out_abort;
233 }
234 }
235
236 ret = pinstmem->suspend(dev);
237 if (ret) {
238 NV_ERROR(dev, "... failed: %d\n", ret);
239 goto out_abort;
240 }
241
242 NV_INFO(dev, "Suspending GPU objects...\n");
243 ret = nouveau_gpuobj_suspend(dev);
244 if (ret) {
245 NV_ERROR(dev, "... failed: %d\n", ret);
246 pinstmem->resume(dev);
247 goto out_abort;
248 }
249
250 NV_INFO(dev, "And we're gone!\n");
251 pci_save_state(pdev);
252 if (pm_state.event == PM_EVENT_SUSPEND) {
253 pci_disable_device(pdev);
254 pci_set_power_state(pdev, PCI_D3hot);
255 }
256
257 return 0;
258
259out_abort:
260 NV_INFO(dev, "Re-enabling acceleration..\n");
261 for (e = e + 1; e < NVOBJ_ENGINE_NR; e++) {
262 if (dev_priv->eng[e])
263 dev_priv->eng[e]->init(dev, e);
264 }
265 return ret;
266}
267
268int
269nouveau_pci_resume(struct pci_dev *pdev)
270{
271 struct drm_device *dev = pci_get_drvdata(pdev);
272 struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);
273 struct drm_nouveau_private *dev_priv = dev->dev_private;
274 struct nouveau_engine *engine = &dev_priv->engine;
275 struct drm_crtc *crtc;
276 int ret, i;
277
278 if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
279 return 0;
280
281 NV_INFO(dev, "We're back, enabling device...\n");
282 pci_set_power_state(pdev, PCI_D0);
283 pci_restore_state(pdev);
284 if (pci_enable_device(pdev))
285 return -1;
286 pci_set_master(dev->pdev);
287
288 /* Make sure the AGP controller is in a consistent state */
289 if (dev_priv->gart_info.type == NOUVEAU_GART_AGP)
290 nouveau_mem_reset_agp(dev);
291
292 /* Make the CRTCs accessible */
293 engine->display.early_init(dev);
294
295 NV_INFO(dev, "POSTing device...\n");
296 ret = nouveau_run_vbios_init(dev);
297 if (ret)
298 return ret;
299
300 if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {
301 ret = nouveau_mem_init_agp(dev);
302 if (ret) {
303 NV_ERROR(dev, "error reinitialising AGP: %d\n", ret);
304 return ret;
305 }
306 }
307
308 NV_INFO(dev, "Restoring GPU objects...\n");
309 nouveau_gpuobj_resume(dev);
310
311 NV_INFO(dev, "Reinitialising engines...\n");
312 engine->instmem.resume(dev);
313 engine->mc.init(dev);
314 engine->timer.init(dev);
315 engine->fb.init(dev);
316 for (i = 0; i < NVOBJ_ENGINE_NR; i++) {
317 if (dev_priv->eng[i])
318 dev_priv->eng[i]->init(dev, i);
319 }
320
321 nouveau_irq_postinstall(dev);
322
323 /* Re-write SKIPS, they'll have been lost over the suspend */
324 if (nouveau_vram_pushbuf) {
325 struct nouveau_channel *chan;
326 int j;
327
328 for (i = 0; i < (pfifo ? pfifo->channels : 0); i++) {
329 chan = dev_priv->channels.ptr[i];
330 if (!chan || !chan->pushbuf_bo)
331 continue;
332
333 for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
334 nouveau_bo_wr32(chan->pushbuf_bo, i, 0);
335 }
336 }
337
338 nouveau_pm_resume(dev);
339
340 NV_INFO(dev, "Restoring mode...\n");
341 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
342 struct nouveau_framebuffer *nouveau_fb;
343
344 nouveau_fb = nouveau_framebuffer(crtc->fb);
345 if (!nouveau_fb || !nouveau_fb->nvbo)
346 continue;
347
348 nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
349 }
350
351 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
352 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
353
354 ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
355 if (!ret)
356 ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
357 if (ret)
358 NV_ERROR(dev, "Could not pin/map cursor.\n");
359 }
360
361 nouveau_fbcon_set_suspend(dev, 0);
362 nouveau_fbcon_zfill_all(dev);
363
364 nouveau_display_init(dev);
365
366 /* Force CLUT to get re-loaded during modeset */
367 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
368 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
369
370 nv_crtc->lut.depth = 0;
371 }
372
373 drm_helper_resume_force_mode(dev);
374
375 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
376 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
377 u32 offset = nv_crtc->cursor.nvbo->bo.offset;
378
379 nv_crtc->cursor.set_offset(nv_crtc, offset);
380 nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
381 nv_crtc->cursor_saved_y);
382 }
383
384 return 0;
385}
386
387static const struct file_operations nouveau_driver_fops = {
388 .owner = THIS_MODULE,
389 .open = drm_open,
390 .release = drm_release,
391 .unlocked_ioctl = drm_ioctl,
392 .mmap = nouveau_ttm_mmap,
393 .poll = drm_poll,
394 .fasync = drm_fasync,
395 .read = drm_read,
396#if defined(CONFIG_COMPAT)
397 .compat_ioctl = nouveau_compat_ioctl,
398#endif
399 .llseek = noop_llseek,
400};
401
402static struct drm_driver driver = {
403 .driver_features =
404 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
405 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
406 DRIVER_MODESET | DRIVER_PRIME,
407 .load = nouveau_load,
408 .firstopen = nouveau_firstopen,
409 .lastclose = nouveau_lastclose,
410 .unload = nouveau_unload,
411 .open = nouveau_open,
412 .preclose = nouveau_preclose,
413 .postclose = nouveau_postclose,
414#if defined(CONFIG_DRM_NOUVEAU_DEBUG)
415 .debugfs_init = nouveau_debugfs_init,
416 .debugfs_cleanup = nouveau_debugfs_takedown,
417#endif
418 .irq_preinstall = nouveau_irq_preinstall,
419 .irq_postinstall = nouveau_irq_postinstall,
420 .irq_uninstall = nouveau_irq_uninstall,
421 .irq_handler = nouveau_irq_handler,
422 .get_vblank_counter = drm_vblank_count,
423 .enable_vblank = nouveau_vblank_enable,
424 .disable_vblank = nouveau_vblank_disable,
425 .reclaim_buffers = drm_core_reclaim_buffers,
426 .ioctls = nouveau_ioctls,
427 .fops = &nouveau_driver_fops,
428
429 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
430 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
431 .gem_prime_export = nouveau_gem_prime_export,
432 .gem_prime_import = nouveau_gem_prime_import,
433
434 .gem_init_object = nouveau_gem_object_new,
435 .gem_free_object = nouveau_gem_object_del,
436 .gem_open_object = nouveau_gem_object_open,
437 .gem_close_object = nouveau_gem_object_close,
438
439 .dumb_create = nouveau_display_dumb_create,
440 .dumb_map_offset = nouveau_display_dumb_map_offset,
441 .dumb_destroy = nouveau_display_dumb_destroy,
442
443 .name = DRIVER_NAME,
444 .desc = DRIVER_DESC,
445#ifdef GIT_REVISION
446 .date = GIT_REVISION,
447#else
448 .date = DRIVER_DATE,
449#endif
450 .major = DRIVER_MAJOR,
451 .minor = DRIVER_MINOR,
452 .patchlevel = DRIVER_PATCHLEVEL,
453};
454
455static struct pci_driver nouveau_pci_driver = {
456 .name = DRIVER_NAME,
457 .id_table = pciidlist,
458 .probe = nouveau_pci_probe,
459 .remove = nouveau_pci_remove,
460 .suspend = nouveau_pci_suspend,
461 .resume = nouveau_pci_resume
462};
463
464static int __init nouveau_init(void)
465{
466 driver.num_ioctls = nouveau_max_ioctl;
467
468 if (nouveau_modeset == -1) {
469#ifdef CONFIG_VGA_CONSOLE
470 if (vgacon_text_force())
471 nouveau_modeset = 0;
472 else
473#endif
474 nouveau_modeset = 1;
475 }
476
477 if (!nouveau_modeset)
478 return 0;
479
480 nouveau_register_dsm_handler();
481 return drm_pci_init(&driver, &nouveau_pci_driver);
482}
483
484static void __exit nouveau_exit(void)
485{
486 if (!nouveau_modeset)
487 return;
488
489 drm_pci_exit(&driver, &nouveau_pci_driver);
490 nouveau_unregister_dsm_handler();
491}
492
493module_init(nouveau_init);
494module_exit(nouveau_exit);
495
496MODULE_AUTHOR(DRIVER_AUTHOR);
497MODULE_DESCRIPTION(DRIVER_DESC);
498MODULE_LICENSE("GPL and additional rights");