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1/*
2 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
3 * applies to AT91SAM9G45, AT91SAM9M10,
4 * AT91SAM9G46, AT91SAM9M11 SoC
5 *
6 * Copyright (C) 2011 Atmel,
7 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
15 model = "Atmel AT91SAM9G45 family SoC";
16 compatible = "atmel,at91sam9g45";
17 interrupt-parent = <&aic>;
18
19 aliases {
20 serial0 = &dbgu;
21 serial1 = &usart0;
22 serial2 = &usart1;
23 serial3 = &usart2;
24 serial4 = &usart3;
25 gpio0 = &pioA;
26 gpio1 = &pioB;
27 gpio2 = &pioC;
28 gpio3 = &pioD;
29 gpio4 = &pioE;
30 tcb0 = &tcb0;
31 tcb1 = &tcb1;
32 };
33 cpus {
34 cpu@0 {
35 compatible = "arm,arm926ejs";
36 };
37 };
38
39 memory {
40 reg = <0x70000000 0x10000000>;
41 };
42
43 ahb {
44 compatible = "simple-bus";
45 #address-cells = <1>;
46 #size-cells = <1>;
47 ranges;
48
49 apb {
50 compatible = "simple-bus";
51 #address-cells = <1>;
52 #size-cells = <1>;
53 ranges;
54
55 aic: interrupt-controller@fffff000 {
56 #interrupt-cells = <2>;
57 compatible = "atmel,at91rm9200-aic";
58 interrupt-controller;
59 reg = <0xfffff000 0x200>;
60 };
61
62 ramc0: ramc@ffffe400 {
63 compatible = "atmel,at91sam9g45-ddramc";
64 reg = <0xffffe400 0x200
65 0xffffe600 0x200>;
66 };
67
68 pmc: pmc@fffffc00 {
69 compatible = "atmel,at91rm9200-pmc";
70 reg = <0xfffffc00 0x100>;
71 };
72
73 rstc@fffffd00 {
74 compatible = "atmel,at91sam9g45-rstc";
75 reg = <0xfffffd00 0x10>;
76 };
77
78 pit: timer@fffffd30 {
79 compatible = "atmel,at91sam9260-pit";
80 reg = <0xfffffd30 0xf>;
81 interrupts = <1 4>;
82 };
83
84
85 shdwc@fffffd10 {
86 compatible = "atmel,at91sam9rl-shdwc";
87 reg = <0xfffffd10 0x10>;
88 };
89
90 tcb0: timer@fff7c000 {
91 compatible = "atmel,at91rm9200-tcb";
92 reg = <0xfff7c000 0x100>;
93 interrupts = <18 4>;
94 };
95
96 tcb1: timer@fffd4000 {
97 compatible = "atmel,at91rm9200-tcb";
98 reg = <0xfffd4000 0x100>;
99 interrupts = <18 4>;
100 };
101
102 dma: dma-controller@ffffec00 {
103 compatible = "atmel,at91sam9g45-dma";
104 reg = <0xffffec00 0x200>;
105 interrupts = <21 4>;
106 };
107
108 pioA: gpio@fffff200 {
109 compatible = "atmel,at91rm9200-gpio";
110 reg = <0xfffff200 0x100>;
111 interrupts = <2 4>;
112 #gpio-cells = <2>;
113 gpio-controller;
114 interrupt-controller;
115 };
116
117 pioB: gpio@fffff400 {
118 compatible = "atmel,at91rm9200-gpio";
119 reg = <0xfffff400 0x100>;
120 interrupts = <3 4>;
121 #gpio-cells = <2>;
122 gpio-controller;
123 interrupt-controller;
124 };
125
126 pioC: gpio@fffff600 {
127 compatible = "atmel,at91rm9200-gpio";
128 reg = <0xfffff600 0x100>;
129 interrupts = <4 4>;
130 #gpio-cells = <2>;
131 gpio-controller;
132 interrupt-controller;
133 };
134
135 pioD: gpio@fffff800 {
136 compatible = "atmel,at91rm9200-gpio";
137 reg = <0xfffff800 0x100>;
138 interrupts = <5 4>;
139 #gpio-cells = <2>;
140 gpio-controller;
141 interrupt-controller;
142 };
143
144 pioE: gpio@fffffa00 {
145 compatible = "atmel,at91rm9200-gpio";
146 reg = <0xfffffa00 0x100>;
147 interrupts = <5 4>;
148 #gpio-cells = <2>;
149 gpio-controller;
150 interrupt-controller;
151 };
152
153 dbgu: serial@ffffee00 {
154 compatible = "atmel,at91sam9260-usart";
155 reg = <0xffffee00 0x200>;
156 interrupts = <1 4>;
157 status = "disabled";
158 };
159
160 usart0: serial@fff8c000 {
161 compatible = "atmel,at91sam9260-usart";
162 reg = <0xfff8c000 0x200>;
163 interrupts = <7 4>;
164 atmel,use-dma-rx;
165 atmel,use-dma-tx;
166 status = "disabled";
167 };
168
169 usart1: serial@fff90000 {
170 compatible = "atmel,at91sam9260-usart";
171 reg = <0xfff90000 0x200>;
172 interrupts = <8 4>;
173 atmel,use-dma-rx;
174 atmel,use-dma-tx;
175 status = "disabled";
176 };
177
178 usart2: serial@fff94000 {
179 compatible = "atmel,at91sam9260-usart";
180 reg = <0xfff94000 0x200>;
181 interrupts = <9 4>;
182 atmel,use-dma-rx;
183 atmel,use-dma-tx;
184 status = "disabled";
185 };
186
187 usart3: serial@fff98000 {
188 compatible = "atmel,at91sam9260-usart";
189 reg = <0xfff98000 0x200>;
190 interrupts = <10 4>;
191 atmel,use-dma-rx;
192 atmel,use-dma-tx;
193 status = "disabled";
194 };
195
196 macb0: ethernet@fffbc000 {
197 compatible = "cdns,at32ap7000-macb", "cdns,macb";
198 reg = <0xfffbc000 0x100>;
199 interrupts = <25 4>;
200 status = "disabled";
201 };
202
203 adc0: adc@fffb0000 {
204 compatible = "atmel,at91sam9260-adc";
205 reg = <0xfffb0000 0x100>;
206 interrupts = <20 4>;
207 atmel,adc-use-external-triggers;
208 atmel,adc-channels-used = <0xff>;
209 atmel,adc-vref = <3300>;
210 atmel,adc-num-channels = <8>;
211 atmel,adc-startup-time = <40>;
212 atmel,adc-channel-base = <0x30>;
213 atmel,adc-drdy-mask = <0x10000>;
214 atmel,adc-status-register = <0x1c>;
215 atmel,adc-trigger-register = <0x08>;
216
217 trigger@0 {
218 trigger-name = "external-rising";
219 trigger-value = <0x1>;
220 trigger-external;
221 };
222 trigger@1 {
223 trigger-name = "external-falling";
224 trigger-value = <0x2>;
225 trigger-external;
226 };
227
228 trigger@2 {
229 trigger-name = "external-any";
230 trigger-value = <0x3>;
231 trigger-external;
232 };
233
234 trigger@3 {
235 trigger-name = "continuous";
236 trigger-value = <0x6>;
237 };
238 };
239 };
240
241 nand0: nand@40000000 {
242 compatible = "atmel,at91rm9200-nand";
243 #address-cells = <1>;
244 #size-cells = <1>;
245 reg = <0x40000000 0x10000000
246 0xffffe200 0x200
247 >;
248 atmel,nand-addr-offset = <21>;
249 atmel,nand-cmd-offset = <22>;
250 gpios = <&pioC 8 0
251 &pioC 14 0
252 0
253 >;
254 status = "disabled";
255 };
256
257 usb0: ohci@00700000 {
258 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
259 reg = <0x00700000 0x100000>;
260 interrupts = <22 4>;
261 status = "disabled";
262 };
263
264 usb1: ehci@00800000 {
265 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
266 reg = <0x00800000 0x100000>;
267 interrupts = <22 4>;
268 status = "disabled";
269 };
270 };
271
272 i2c@0 {
273 compatible = "i2c-gpio";
274 gpios = <&pioA 20 0 /* sda */
275 &pioA 21 0 /* scl */
276 >;
277 i2c-gpio,sda-open-drain;
278 i2c-gpio,scl-open-drain;
279 i2c-gpio,delay-us = <5>; /* ~100 kHz */
280 #address-cells = <1>;
281 #size-cells = <0>;
282 status = "disabled";
283 };
284};