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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Cryptographic API.
4 *
5 * Glue code for the SHA1 Secure Hash Algorithm assembler implementations
6 * using SSSE3, AVX, AVX2, and SHA-NI instructions.
7 *
8 * This file is based on sha1_generic.c
9 *
10 * Copyright (c) Alan Smithee.
11 * Copyright (c) Andrew McDonald <andrew@mcdonald.org.uk>
12 * Copyright (c) Jean-Francois Dive <jef@linuxbe.org>
13 * Copyright (c) Mathias Krause <minipli@googlemail.com>
14 * Copyright (c) Chandramouli Narayanan <mouli@linux.intel.com>
15 */
16
17#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
18
19#include <crypto/internal/hash.h>
20#include <crypto/internal/simd.h>
21#include <linux/init.h>
22#include <linux/module.h>
23#include <linux/mm.h>
24#include <linux/types.h>
25#include <crypto/sha1.h>
26#include <crypto/sha1_base.h>
27#include <asm/cpu_device_id.h>
28#include <asm/simd.h>
29
30static const struct x86_cpu_id module_cpu_ids[] = {
31#ifdef CONFIG_AS_SHA1_NI
32 X86_MATCH_FEATURE(X86_FEATURE_SHA_NI, NULL),
33#endif
34 X86_MATCH_FEATURE(X86_FEATURE_AVX2, NULL),
35 X86_MATCH_FEATURE(X86_FEATURE_AVX, NULL),
36 X86_MATCH_FEATURE(X86_FEATURE_SSSE3, NULL),
37 {}
38};
39MODULE_DEVICE_TABLE(x86cpu, module_cpu_ids);
40
41static int sha1_update(struct shash_desc *desc, const u8 *data,
42 unsigned int len, sha1_block_fn *sha1_xform)
43{
44 struct sha1_state *sctx = shash_desc_ctx(desc);
45
46 if (!crypto_simd_usable() ||
47 (sctx->count % SHA1_BLOCK_SIZE) + len < SHA1_BLOCK_SIZE)
48 return crypto_sha1_update(desc, data, len);
49
50 /*
51 * Make sure struct sha1_state begins directly with the SHA1
52 * 160-bit internal state, as this is what the asm functions expect.
53 */
54 BUILD_BUG_ON(offsetof(struct sha1_state, state) != 0);
55
56 kernel_fpu_begin();
57 sha1_base_do_update(desc, data, len, sha1_xform);
58 kernel_fpu_end();
59
60 return 0;
61}
62
63static int sha1_finup(struct shash_desc *desc, const u8 *data,
64 unsigned int len, u8 *out, sha1_block_fn *sha1_xform)
65{
66 if (!crypto_simd_usable())
67 return crypto_sha1_finup(desc, data, len, out);
68
69 kernel_fpu_begin();
70 if (len)
71 sha1_base_do_update(desc, data, len, sha1_xform);
72 sha1_base_do_finalize(desc, sha1_xform);
73 kernel_fpu_end();
74
75 return sha1_base_finish(desc, out);
76}
77
78asmlinkage void sha1_transform_ssse3(struct sha1_state *state,
79 const u8 *data, int blocks);
80
81static int sha1_ssse3_update(struct shash_desc *desc, const u8 *data,
82 unsigned int len)
83{
84 return sha1_update(desc, data, len, sha1_transform_ssse3);
85}
86
87static int sha1_ssse3_finup(struct shash_desc *desc, const u8 *data,
88 unsigned int len, u8 *out)
89{
90 return sha1_finup(desc, data, len, out, sha1_transform_ssse3);
91}
92
93/* Add padding and return the message digest. */
94static int sha1_ssse3_final(struct shash_desc *desc, u8 *out)
95{
96 return sha1_ssse3_finup(desc, NULL, 0, out);
97}
98
99static struct shash_alg sha1_ssse3_alg = {
100 .digestsize = SHA1_DIGEST_SIZE,
101 .init = sha1_base_init,
102 .update = sha1_ssse3_update,
103 .final = sha1_ssse3_final,
104 .finup = sha1_ssse3_finup,
105 .descsize = sizeof(struct sha1_state),
106 .base = {
107 .cra_name = "sha1",
108 .cra_driver_name = "sha1-ssse3",
109 .cra_priority = 150,
110 .cra_blocksize = SHA1_BLOCK_SIZE,
111 .cra_module = THIS_MODULE,
112 }
113};
114
115static int register_sha1_ssse3(void)
116{
117 if (boot_cpu_has(X86_FEATURE_SSSE3))
118 return crypto_register_shash(&sha1_ssse3_alg);
119 return 0;
120}
121
122static void unregister_sha1_ssse3(void)
123{
124 if (boot_cpu_has(X86_FEATURE_SSSE3))
125 crypto_unregister_shash(&sha1_ssse3_alg);
126}
127
128asmlinkage void sha1_transform_avx(struct sha1_state *state,
129 const u8 *data, int blocks);
130
131static int sha1_avx_update(struct shash_desc *desc, const u8 *data,
132 unsigned int len)
133{
134 return sha1_update(desc, data, len, sha1_transform_avx);
135}
136
137static int sha1_avx_finup(struct shash_desc *desc, const u8 *data,
138 unsigned int len, u8 *out)
139{
140 return sha1_finup(desc, data, len, out, sha1_transform_avx);
141}
142
143static int sha1_avx_final(struct shash_desc *desc, u8 *out)
144{
145 return sha1_avx_finup(desc, NULL, 0, out);
146}
147
148static struct shash_alg sha1_avx_alg = {
149 .digestsize = SHA1_DIGEST_SIZE,
150 .init = sha1_base_init,
151 .update = sha1_avx_update,
152 .final = sha1_avx_final,
153 .finup = sha1_avx_finup,
154 .descsize = sizeof(struct sha1_state),
155 .base = {
156 .cra_name = "sha1",
157 .cra_driver_name = "sha1-avx",
158 .cra_priority = 160,
159 .cra_blocksize = SHA1_BLOCK_SIZE,
160 .cra_module = THIS_MODULE,
161 }
162};
163
164static bool avx_usable(void)
165{
166 if (!cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL)) {
167 if (boot_cpu_has(X86_FEATURE_AVX))
168 pr_info("AVX detected but unusable.\n");
169 return false;
170 }
171
172 return true;
173}
174
175static int register_sha1_avx(void)
176{
177 if (avx_usable())
178 return crypto_register_shash(&sha1_avx_alg);
179 return 0;
180}
181
182static void unregister_sha1_avx(void)
183{
184 if (avx_usable())
185 crypto_unregister_shash(&sha1_avx_alg);
186}
187
188#define SHA1_AVX2_BLOCK_OPTSIZE 4 /* optimal 4*64 bytes of SHA1 blocks */
189
190asmlinkage void sha1_transform_avx2(struct sha1_state *state,
191 const u8 *data, int blocks);
192
193static bool avx2_usable(void)
194{
195 if (avx_usable() && boot_cpu_has(X86_FEATURE_AVX2)
196 && boot_cpu_has(X86_FEATURE_BMI1)
197 && boot_cpu_has(X86_FEATURE_BMI2))
198 return true;
199
200 return false;
201}
202
203static void sha1_apply_transform_avx2(struct sha1_state *state,
204 const u8 *data, int blocks)
205{
206 /* Select the optimal transform based on data block size */
207 if (blocks >= SHA1_AVX2_BLOCK_OPTSIZE)
208 sha1_transform_avx2(state, data, blocks);
209 else
210 sha1_transform_avx(state, data, blocks);
211}
212
213static int sha1_avx2_update(struct shash_desc *desc, const u8 *data,
214 unsigned int len)
215{
216 return sha1_update(desc, data, len, sha1_apply_transform_avx2);
217}
218
219static int sha1_avx2_finup(struct shash_desc *desc, const u8 *data,
220 unsigned int len, u8 *out)
221{
222 return sha1_finup(desc, data, len, out, sha1_apply_transform_avx2);
223}
224
225static int sha1_avx2_final(struct shash_desc *desc, u8 *out)
226{
227 return sha1_avx2_finup(desc, NULL, 0, out);
228}
229
230static struct shash_alg sha1_avx2_alg = {
231 .digestsize = SHA1_DIGEST_SIZE,
232 .init = sha1_base_init,
233 .update = sha1_avx2_update,
234 .final = sha1_avx2_final,
235 .finup = sha1_avx2_finup,
236 .descsize = sizeof(struct sha1_state),
237 .base = {
238 .cra_name = "sha1",
239 .cra_driver_name = "sha1-avx2",
240 .cra_priority = 170,
241 .cra_blocksize = SHA1_BLOCK_SIZE,
242 .cra_module = THIS_MODULE,
243 }
244};
245
246static int register_sha1_avx2(void)
247{
248 if (avx2_usable())
249 return crypto_register_shash(&sha1_avx2_alg);
250 return 0;
251}
252
253static void unregister_sha1_avx2(void)
254{
255 if (avx2_usable())
256 crypto_unregister_shash(&sha1_avx2_alg);
257}
258
259#ifdef CONFIG_AS_SHA1_NI
260asmlinkage void sha1_ni_transform(struct sha1_state *digest, const u8 *data,
261 int rounds);
262
263static int sha1_ni_update(struct shash_desc *desc, const u8 *data,
264 unsigned int len)
265{
266 return sha1_update(desc, data, len, sha1_ni_transform);
267}
268
269static int sha1_ni_finup(struct shash_desc *desc, const u8 *data,
270 unsigned int len, u8 *out)
271{
272 return sha1_finup(desc, data, len, out, sha1_ni_transform);
273}
274
275static int sha1_ni_final(struct shash_desc *desc, u8 *out)
276{
277 return sha1_ni_finup(desc, NULL, 0, out);
278}
279
280static struct shash_alg sha1_ni_alg = {
281 .digestsize = SHA1_DIGEST_SIZE,
282 .init = sha1_base_init,
283 .update = sha1_ni_update,
284 .final = sha1_ni_final,
285 .finup = sha1_ni_finup,
286 .descsize = sizeof(struct sha1_state),
287 .base = {
288 .cra_name = "sha1",
289 .cra_driver_name = "sha1-ni",
290 .cra_priority = 250,
291 .cra_blocksize = SHA1_BLOCK_SIZE,
292 .cra_module = THIS_MODULE,
293 }
294};
295
296static int register_sha1_ni(void)
297{
298 if (boot_cpu_has(X86_FEATURE_SHA_NI))
299 return crypto_register_shash(&sha1_ni_alg);
300 return 0;
301}
302
303static void unregister_sha1_ni(void)
304{
305 if (boot_cpu_has(X86_FEATURE_SHA_NI))
306 crypto_unregister_shash(&sha1_ni_alg);
307}
308
309#else
310static inline int register_sha1_ni(void) { return 0; }
311static inline void unregister_sha1_ni(void) { }
312#endif
313
314static int __init sha1_ssse3_mod_init(void)
315{
316 if (!x86_match_cpu(module_cpu_ids))
317 return -ENODEV;
318
319 if (register_sha1_ssse3())
320 goto fail;
321
322 if (register_sha1_avx()) {
323 unregister_sha1_ssse3();
324 goto fail;
325 }
326
327 if (register_sha1_avx2()) {
328 unregister_sha1_avx();
329 unregister_sha1_ssse3();
330 goto fail;
331 }
332
333 if (register_sha1_ni()) {
334 unregister_sha1_avx2();
335 unregister_sha1_avx();
336 unregister_sha1_ssse3();
337 goto fail;
338 }
339
340 return 0;
341fail:
342 return -ENODEV;
343}
344
345static void __exit sha1_ssse3_mod_fini(void)
346{
347 unregister_sha1_ni();
348 unregister_sha1_avx2();
349 unregister_sha1_avx();
350 unregister_sha1_ssse3();
351}
352
353module_init(sha1_ssse3_mod_init);
354module_exit(sha1_ssse3_mod_fini);
355
356MODULE_LICENSE("GPL");
357MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm, Supplemental SSE3 accelerated");
358
359MODULE_ALIAS_CRYPTO("sha1");
360MODULE_ALIAS_CRYPTO("sha1-ssse3");
361MODULE_ALIAS_CRYPTO("sha1-avx");
362MODULE_ALIAS_CRYPTO("sha1-avx2");
363#ifdef CONFIG_AS_SHA1_NI
364MODULE_ALIAS_CRYPTO("sha1-ni");
365#endif
1/*
2 * Cryptographic API.
3 *
4 * Glue code for the SHA1 Secure Hash Algorithm assembler implementation using
5 * Supplemental SSE3 instructions.
6 *
7 * This file is based on sha1_generic.c
8 *
9 * Copyright (c) Alan Smithee.
10 * Copyright (c) Andrew McDonald <andrew@mcdonald.org.uk>
11 * Copyright (c) Jean-Francois Dive <jef@linuxbe.org>
12 * Copyright (c) Mathias Krause <minipli@googlemail.com>
13 * Copyright (c) Chandramouli Narayanan <mouli@linux.intel.com>
14 *
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License as published by the Free
17 * Software Foundation; either version 2 of the License, or (at your option)
18 * any later version.
19 *
20 */
21
22#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
23
24#include <crypto/internal/hash.h>
25#include <linux/init.h>
26#include <linux/module.h>
27#include <linux/mm.h>
28#include <linux/cryptohash.h>
29#include <linux/types.h>
30#include <crypto/sha.h>
31#include <asm/byteorder.h>
32#include <asm/i387.h>
33#include <asm/xcr.h>
34#include <asm/xsave.h>
35
36
37asmlinkage void sha1_transform_ssse3(u32 *digest, const char *data,
38 unsigned int rounds);
39#ifdef CONFIG_AS_AVX
40asmlinkage void sha1_transform_avx(u32 *digest, const char *data,
41 unsigned int rounds);
42#endif
43#ifdef CONFIG_AS_AVX2
44#define SHA1_AVX2_BLOCK_OPTSIZE 4 /* optimal 4*64 bytes of SHA1 blocks */
45
46asmlinkage void sha1_transform_avx2(u32 *digest, const char *data,
47 unsigned int rounds);
48#endif
49
50static asmlinkage void (*sha1_transform_asm)(u32 *, const char *, unsigned int);
51
52
53static int sha1_ssse3_init(struct shash_desc *desc)
54{
55 struct sha1_state *sctx = shash_desc_ctx(desc);
56
57 *sctx = (struct sha1_state){
58 .state = { SHA1_H0, SHA1_H1, SHA1_H2, SHA1_H3, SHA1_H4 },
59 };
60
61 return 0;
62}
63
64static int __sha1_ssse3_update(struct shash_desc *desc, const u8 *data,
65 unsigned int len, unsigned int partial)
66{
67 struct sha1_state *sctx = shash_desc_ctx(desc);
68 unsigned int done = 0;
69
70 sctx->count += len;
71
72 if (partial) {
73 done = SHA1_BLOCK_SIZE - partial;
74 memcpy(sctx->buffer + partial, data, done);
75 sha1_transform_asm(sctx->state, sctx->buffer, 1);
76 }
77
78 if (len - done >= SHA1_BLOCK_SIZE) {
79 const unsigned int rounds = (len - done) / SHA1_BLOCK_SIZE;
80
81 sha1_transform_asm(sctx->state, data + done, rounds);
82 done += rounds * SHA1_BLOCK_SIZE;
83 }
84
85 memcpy(sctx->buffer, data + done, len - done);
86
87 return 0;
88}
89
90static int sha1_ssse3_update(struct shash_desc *desc, const u8 *data,
91 unsigned int len)
92{
93 struct sha1_state *sctx = shash_desc_ctx(desc);
94 unsigned int partial = sctx->count % SHA1_BLOCK_SIZE;
95 int res;
96
97 /* Handle the fast case right here */
98 if (partial + len < SHA1_BLOCK_SIZE) {
99 sctx->count += len;
100 memcpy(sctx->buffer + partial, data, len);
101
102 return 0;
103 }
104
105 if (!irq_fpu_usable()) {
106 res = crypto_sha1_update(desc, data, len);
107 } else {
108 kernel_fpu_begin();
109 res = __sha1_ssse3_update(desc, data, len, partial);
110 kernel_fpu_end();
111 }
112
113 return res;
114}
115
116
117/* Add padding and return the message digest. */
118static int sha1_ssse3_final(struct shash_desc *desc, u8 *out)
119{
120 struct sha1_state *sctx = shash_desc_ctx(desc);
121 unsigned int i, index, padlen;
122 __be32 *dst = (__be32 *)out;
123 __be64 bits;
124 static const u8 padding[SHA1_BLOCK_SIZE] = { 0x80, };
125
126 bits = cpu_to_be64(sctx->count << 3);
127
128 /* Pad out to 56 mod 64 and append length */
129 index = sctx->count % SHA1_BLOCK_SIZE;
130 padlen = (index < 56) ? (56 - index) : ((SHA1_BLOCK_SIZE+56) - index);
131 if (!irq_fpu_usable()) {
132 crypto_sha1_update(desc, padding, padlen);
133 crypto_sha1_update(desc, (const u8 *)&bits, sizeof(bits));
134 } else {
135 kernel_fpu_begin();
136 /* We need to fill a whole block for __sha1_ssse3_update() */
137 if (padlen <= 56) {
138 sctx->count += padlen;
139 memcpy(sctx->buffer + index, padding, padlen);
140 } else {
141 __sha1_ssse3_update(desc, padding, padlen, index);
142 }
143 __sha1_ssse3_update(desc, (const u8 *)&bits, sizeof(bits), 56);
144 kernel_fpu_end();
145 }
146
147 /* Store state in digest */
148 for (i = 0; i < 5; i++)
149 dst[i] = cpu_to_be32(sctx->state[i]);
150
151 /* Wipe context */
152 memset(sctx, 0, sizeof(*sctx));
153
154 return 0;
155}
156
157static int sha1_ssse3_export(struct shash_desc *desc, void *out)
158{
159 struct sha1_state *sctx = shash_desc_ctx(desc);
160
161 memcpy(out, sctx, sizeof(*sctx));
162
163 return 0;
164}
165
166static int sha1_ssse3_import(struct shash_desc *desc, const void *in)
167{
168 struct sha1_state *sctx = shash_desc_ctx(desc);
169
170 memcpy(sctx, in, sizeof(*sctx));
171
172 return 0;
173}
174
175#ifdef CONFIG_AS_AVX2
176static void sha1_apply_transform_avx2(u32 *digest, const char *data,
177 unsigned int rounds)
178{
179 /* Select the optimal transform based on data block size */
180 if (rounds >= SHA1_AVX2_BLOCK_OPTSIZE)
181 sha1_transform_avx2(digest, data, rounds);
182 else
183 sha1_transform_avx(digest, data, rounds);
184}
185#endif
186
187static struct shash_alg alg = {
188 .digestsize = SHA1_DIGEST_SIZE,
189 .init = sha1_ssse3_init,
190 .update = sha1_ssse3_update,
191 .final = sha1_ssse3_final,
192 .export = sha1_ssse3_export,
193 .import = sha1_ssse3_import,
194 .descsize = sizeof(struct sha1_state),
195 .statesize = sizeof(struct sha1_state),
196 .base = {
197 .cra_name = "sha1",
198 .cra_driver_name= "sha1-ssse3",
199 .cra_priority = 150,
200 .cra_flags = CRYPTO_ALG_TYPE_SHASH,
201 .cra_blocksize = SHA1_BLOCK_SIZE,
202 .cra_module = THIS_MODULE,
203 }
204};
205
206#ifdef CONFIG_AS_AVX
207static bool __init avx_usable(void)
208{
209 u64 xcr0;
210
211 if (!cpu_has_avx || !cpu_has_osxsave)
212 return false;
213
214 xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
215 if ((xcr0 & (XSTATE_SSE | XSTATE_YMM)) != (XSTATE_SSE | XSTATE_YMM)) {
216 pr_info("AVX detected but unusable.\n");
217
218 return false;
219 }
220
221 return true;
222}
223
224#ifdef CONFIG_AS_AVX2
225static bool __init avx2_usable(void)
226{
227 if (avx_usable() && cpu_has_avx2 && boot_cpu_has(X86_FEATURE_BMI1) &&
228 boot_cpu_has(X86_FEATURE_BMI2))
229 return true;
230
231 return false;
232}
233#endif
234#endif
235
236static int __init sha1_ssse3_mod_init(void)
237{
238 char *algo_name;
239
240 /* test for SSSE3 first */
241 if (cpu_has_ssse3) {
242 sha1_transform_asm = sha1_transform_ssse3;
243 algo_name = "SSSE3";
244 }
245
246#ifdef CONFIG_AS_AVX
247 /* allow AVX to override SSSE3, it's a little faster */
248 if (avx_usable()) {
249 sha1_transform_asm = sha1_transform_avx;
250 algo_name = "AVX";
251#ifdef CONFIG_AS_AVX2
252 /* allow AVX2 to override AVX, it's a little faster */
253 if (avx2_usable()) {
254 sha1_transform_asm = sha1_apply_transform_avx2;
255 algo_name = "AVX2";
256 }
257#endif
258 }
259#endif
260
261 if (sha1_transform_asm) {
262 pr_info("Using %s optimized SHA-1 implementation\n", algo_name);
263 return crypto_register_shash(&alg);
264 }
265 pr_info("Neither AVX nor AVX2 nor SSSE3 is available/usable.\n");
266
267 return -ENODEV;
268}
269
270static void __exit sha1_ssse3_mod_fini(void)
271{
272 crypto_unregister_shash(&alg);
273}
274
275module_init(sha1_ssse3_mod_init);
276module_exit(sha1_ssse3_mod_fini);
277
278MODULE_LICENSE("GPL");
279MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm, Supplemental SSE3 accelerated");
280
281MODULE_ALIAS("sha1");