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1/* SPDX-License-Identifier: GPL-2.0 */
2#include <asm/asm-offsets.h>
3#include <asm/thread_info.h>
4
5#define PAGE_SIZE _PAGE_SIZE
6
7/*
8 * Put .bss..swapper_pg_dir as the first thing in .bss. This will
9 * ensure that it has .bss alignment (64K).
10 */
11#define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir)
12
13/* Cavium Octeon should not have a separate PT_NOTE Program Header. */
14#ifndef CONFIG_CAVIUM_OCTEON_SOC
15#define EMITS_PT_NOTE
16#endif
17
18#define RUNTIME_DISCARD_EXIT
19
20#include <asm-generic/vmlinux.lds.h>
21
22#undef mips
23#define mips mips
24OUTPUT_ARCH(mips)
25ENTRY(kernel_entry)
26PHDRS {
27 text PT_LOAD FLAGS(7); /* RWX */
28#ifndef CONFIG_CAVIUM_OCTEON_SOC
29 note PT_NOTE FLAGS(4); /* R__ */
30#endif /* CAVIUM_OCTEON_SOC */
31}
32
33#ifdef CONFIG_32BIT
34 #ifdef CONFIG_CPU_LITTLE_ENDIAN
35 jiffies = jiffies_64;
36 #else
37 jiffies = jiffies_64 + 4;
38 #endif
39#else
40 jiffies = jiffies_64;
41#endif
42
43SECTIONS
44{
45#ifdef CONFIG_BOOT_ELF64
46 /* Read-only sections, merged into text segment: */
47 /* . = 0xc000000000000000; */
48
49 /* This is the value for an Origin kernel, taken from an IRIX kernel. */
50 /* . = 0xc00000000001c000; */
51
52 /* Set the vaddr for the text segment to a value
53 * >= 0xa800 0000 0001 9000 if no symmon is going to configured
54 * >= 0xa800 0000 0030 0000 otherwise
55 */
56
57 /* . = 0xa800000000300000; */
58 . = 0xffffffff80300000;
59#endif
60 . = LINKER_LOAD_ADDRESS;
61 /* read-only */
62 _text = .; /* Text and read-only data */
63 .text : {
64 HEAD_TEXT
65 TEXT_TEXT
66 SCHED_TEXT
67 LOCK_TEXT
68 KPROBES_TEXT
69 IRQENTRY_TEXT
70 SOFTIRQENTRY_TEXT
71 *(.fixup)
72 *(.gnu.warning)
73 . = ALIGN(16);
74 *(.got) /* Global offset table */
75 } :text = 0
76 _etext = .; /* End of text section */
77
78 EXCEPTION_TABLE(16)
79
80 /* Exception table for data bus errors */
81 __dbe_table : {
82 __start___dbe_table = .;
83 KEEP(*(__dbe_table))
84 __stop___dbe_table = .;
85 }
86
87 _sdata = .; /* Start of data section */
88 RO_DATA(4096)
89
90 /* writeable */
91 .data : { /* Data */
92 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */
93
94 INIT_TASK_DATA(THREAD_SIZE)
95 NOSAVE_DATA
96 PAGE_ALIGNED_DATA(PAGE_SIZE)
97 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
98 READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
99 DATA_DATA
100 CONSTRUCTORS
101 }
102 BUG_TABLE
103 _gp = . + 0x8000;
104 .lit8 : {
105 *(.lit8)
106 }
107 .lit4 : {
108 *(.lit4)
109 }
110 /* We want the small data sections together, so single-instruction offsets
111 can access them all, and initialized data all before uninitialized, so
112 we can shorten the on-disk segment size. */
113 .sdata : {
114 *(.sdata)
115 }
116 _edata = .; /* End of data section */
117
118 /* will be freed after init */
119 . = ALIGN(PAGE_SIZE); /* Init code and data */
120 __init_begin = .;
121 INIT_TEXT_SECTION(PAGE_SIZE)
122 INIT_DATA_SECTION(16)
123
124 . = ALIGN(4);
125 .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
126 __mips_machines_start = .;
127 KEEP(*(.mips.machines.init))
128 __mips_machines_end = .;
129 }
130
131 /* .exit.text is discarded at runtime, not link time, to deal with
132 * references from .rodata
133 */
134 .exit.text : {
135 EXIT_TEXT
136 }
137 .exit.data : {
138 EXIT_DATA
139 }
140#ifdef CONFIG_SMP
141 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
142#endif
143
144 .rel.dyn : ALIGN(8) {
145 *(.rel)
146 *(.rel*)
147 }
148
149#ifdef CONFIG_MIPS_ELF_APPENDED_DTB
150 STRUCT_ALIGN();
151 .appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) {
152 *(.appended_dtb)
153 KEEP(*(.appended_dtb))
154 }
155#endif
156
157#ifdef CONFIG_RELOCATABLE
158 . = ALIGN(4);
159
160 .data.reloc : {
161 _relocation_start = .;
162 /*
163 * Space for relocation table
164 * This needs to be filled so that the
165 * relocs tool can overwrite the content.
166 * An invalid value is left at the start of the
167 * section to abort relocation if the table
168 * has not been filled in.
169 */
170 LONG(0xFFFFFFFF);
171 FILL(0);
172 . += CONFIG_RELOCATION_TABLE_SIZE - 4;
173 _relocation_end = .;
174 }
175#endif
176
177#ifdef CONFIG_MIPS_RAW_APPENDED_DTB
178 .fill : {
179 FILL(0);
180 BYTE(0);
181 STRUCT_ALIGN();
182 }
183 __appended_dtb = .;
184 /* leave space for appended DTB */
185 . += 0x100000;
186#endif
187 /*
188 * Align to 64K in attempt to eliminate holes before the
189 * .bss..swapper_pg_dir section at the start of .bss. This
190 * also satisfies PAGE_SIZE alignment as the largest page size
191 * allowed is 64K.
192 */
193 . = ALIGN(0x10000);
194 __init_end = .;
195 /* freed after init ends here */
196
197 /*
198 * Force .bss to 64K alignment so that .bss..swapper_pg_dir
199 * gets that alignment. .sbss should be empty, so there will be
200 * no holes after __init_end. */
201 BSS_SECTION(0, 0x10000, 8)
202
203 _end = . ;
204
205 /* These mark the ABI of the kernel for debuggers. */
206 .mdebug.abi32 : {
207 KEEP(*(.mdebug.abi32))
208 }
209 .mdebug.abi64 : {
210 KEEP(*(.mdebug.abi64))
211 }
212
213 /* This is the MIPS specific mdebug section. */
214 .mdebug : {
215 *(.mdebug)
216 }
217
218 STABS_DEBUG
219 DWARF_DEBUG
220 ELF_DETAILS
221
222 /* These must appear regardless of . */
223 .gptab.sdata : {
224 *(.gptab.data)
225 *(.gptab.sdata)
226 }
227 .gptab.sbss : {
228 *(.gptab.bss)
229 *(.gptab.sbss)
230 }
231
232 /* Sections to be discarded */
233 DISCARDS
234 /DISCARD/ : {
235 /* ABI crap starts here */
236 *(.MIPS.abiflags)
237 *(.MIPS.options)
238 *(.gnu.attributes)
239 *(.options)
240 *(.pdr)
241 *(.reginfo)
242 }
243}
1#include <asm/asm-offsets.h>
2#include <asm/thread_info.h>
3
4#define PAGE_SIZE _PAGE_SIZE
5
6/*
7 * Put .bss..swapper_pg_dir as the first thing in .bss. This will
8 * ensure that it has .bss alignment (64K).
9 */
10#define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir)
11
12#include <asm-generic/vmlinux.lds.h>
13
14#undef mips
15#define mips mips
16OUTPUT_ARCH(mips)
17ENTRY(kernel_entry)
18PHDRS {
19 text PT_LOAD FLAGS(7); /* RWX */
20 note PT_NOTE FLAGS(4); /* R__ */
21}
22
23#ifdef CONFIG_32BIT
24 #ifdef CONFIG_CPU_LITTLE_ENDIAN
25 jiffies = jiffies_64;
26 #else
27 jiffies = jiffies_64 + 4;
28 #endif
29#else
30 jiffies = jiffies_64;
31#endif
32
33SECTIONS
34{
35#ifdef CONFIG_BOOT_ELF64
36 /* Read-only sections, merged into text segment: */
37 /* . = 0xc000000000000000; */
38
39 /* This is the value for an Origin kernel, taken from an IRIX kernel. */
40 /* . = 0xc00000000001c000; */
41
42 /* Set the vaddr for the text segment to a value
43 * >= 0xa800 0000 0001 9000 if no symmon is going to configured
44 * >= 0xa800 0000 0030 0000 otherwise
45 */
46
47 /* . = 0xa800000000300000; */
48 . = 0xffffffff80300000;
49#endif
50 . = VMLINUX_LOAD_ADDRESS;
51 /* read-only */
52 _text = .; /* Text and read-only data */
53 .text : {
54 TEXT_TEXT
55 SCHED_TEXT
56 LOCK_TEXT
57 KPROBES_TEXT
58 IRQENTRY_TEXT
59 *(.text.*)
60 *(.fixup)
61 *(.gnu.warning)
62 } :text = 0
63 _etext = .; /* End of text section */
64
65 EXCEPTION_TABLE(16)
66
67 /* Exception table for data bus errors */
68 __dbe_table : {
69 __start___dbe_table = .;
70 *(__dbe_table)
71 __stop___dbe_table = .;
72 }
73
74 NOTES :text :note
75 .dummy : { *(.dummy) } :text
76
77 _sdata = .; /* Start of data section */
78 RODATA
79
80 /* writeable */
81 .data : { /* Data */
82 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */
83
84 INIT_TASK_DATA(THREAD_SIZE)
85 NOSAVE_DATA
86 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
87 READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
88 DATA_DATA
89 CONSTRUCTORS
90 }
91 _gp = . + 0x8000;
92 .lit8 : {
93 *(.lit8)
94 }
95 .lit4 : {
96 *(.lit4)
97 }
98 /* We want the small data sections together, so single-instruction offsets
99 can access them all, and initialized data all before uninitialized, so
100 we can shorten the on-disk segment size. */
101 .sdata : {
102 *(.sdata)
103 }
104 _edata = .; /* End of data section */
105
106 /* will be freed after init */
107 . = ALIGN(PAGE_SIZE); /* Init code and data */
108 __init_begin = .;
109 INIT_TEXT_SECTION(PAGE_SIZE)
110 INIT_DATA_SECTION(16)
111
112 . = ALIGN(4);
113 .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
114 __mips_machines_start = .;
115 *(.mips.machines.init)
116 __mips_machines_end = .;
117 }
118
119 /* .exit.text is discarded at runtime, not link time, to deal with
120 * references from .rodata
121 */
122 .exit.text : {
123 EXIT_TEXT
124 }
125 .exit.data : {
126 EXIT_DATA
127 }
128
129 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
130 /*
131 * Align to 64K in attempt to eliminate holes before the
132 * .bss..swapper_pg_dir section at the start of .bss. This
133 * also satisfies PAGE_SIZE alignment as the largest page size
134 * allowed is 64K.
135 */
136 . = ALIGN(0x10000);
137 __init_end = .;
138 /* freed after init ends here */
139
140 /*
141 * Force .bss to 64K alignment so that .bss..swapper_pg_dir
142 * gets that alignment. .sbss should be empty, so there will be
143 * no holes after __init_end. */
144 BSS_SECTION(0, 0x10000, 0)
145
146 _end = . ;
147
148 /* These mark the ABI of the kernel for debuggers. */
149 .mdebug.abi32 : {
150 KEEP(*(.mdebug.abi32))
151 }
152 .mdebug.abi64 : {
153 KEEP(*(.mdebug.abi64))
154 }
155
156 /* This is the MIPS specific mdebug section. */
157 .mdebug : {
158 *(.mdebug)
159 }
160
161 STABS_DEBUG
162 DWARF_DEBUG
163
164 /* These must appear regardless of . */
165 .gptab.sdata : {
166 *(.gptab.data)
167 *(.gptab.sdata)
168 }
169 .gptab.sbss : {
170 *(.gptab.bss)
171 *(.gptab.sbss)
172 }
173
174 /* Sections to be discarded */
175 DISCARDS
176 /DISCARD/ : {
177 /* ABI crap starts here */
178 *(.MIPS.options)
179 *(.options)
180 *(.pdr)
181 *(.reginfo)
182 *(.eh_frame)
183 }
184}