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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * CAN bus driver for the alone generic (as possible as) MSCAN controller.
4 *
5 * Copyright (C) 2005-2006 Andrey Volkov <avolkov@varma-el.com>,
6 * Varma Electronics Oy
7 * Copyright (C) 2008-2009 Wolfgang Grandegger <wg@grandegger.com>
8 * Copyright (C) 2008-2009 Pengutronix <kernel@pengutronix.de>
9 */
10
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/interrupt.h>
14#include <linux/delay.h>
15#include <linux/netdevice.h>
16#include <linux/if_arp.h>
17#include <linux/if_ether.h>
18#include <linux/list.h>
19#include <linux/can/dev.h>
20#include <linux/can/error.h>
21#include <linux/io.h>
22
23#include "mscan.h"
24
25static const struct can_bittiming_const mscan_bittiming_const = {
26 .name = "mscan",
27 .tseg1_min = 4,
28 .tseg1_max = 16,
29 .tseg2_min = 2,
30 .tseg2_max = 8,
31 .sjw_max = 4,
32 .brp_min = 1,
33 .brp_max = 64,
34 .brp_inc = 1,
35};
36
37static enum can_state state_map[] = {
38 CAN_STATE_ERROR_ACTIVE,
39 CAN_STATE_ERROR_WARNING,
40 CAN_STATE_ERROR_PASSIVE,
41 CAN_STATE_BUS_OFF
42};
43
44static int mscan_set_mode(struct net_device *dev, u8 mode)
45{
46 struct mscan_priv *priv = netdev_priv(dev);
47 struct mscan_regs __iomem *regs = priv->reg_base;
48 int ret = 0;
49 int i;
50 u8 canctl1;
51
52 if (mode != MSCAN_NORMAL_MODE) {
53 if (priv->tx_active) {
54 /* Abort transfers before going to sleep */#
55 out_8(®s->cantarq, priv->tx_active);
56 /* Suppress TX done interrupts */
57 out_8(®s->cantier, 0);
58 }
59
60 canctl1 = in_8(®s->canctl1);
61 if ((mode & MSCAN_SLPRQ) && !(canctl1 & MSCAN_SLPAK)) {
62 setbits8(®s->canctl0, MSCAN_SLPRQ);
63 for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) {
64 if (in_8(®s->canctl1) & MSCAN_SLPAK)
65 break;
66 udelay(100);
67 }
68 /*
69 * The mscan controller will fail to enter sleep mode,
70 * while there are irregular activities on bus, like
71 * somebody keeps retransmitting. This behavior is
72 * undocumented and seems to differ between mscan built
73 * in mpc5200b and mpc5200. We proceed in that case,
74 * since otherwise the slprq will be kept set and the
75 * controller will get stuck. NOTE: INITRQ or CSWAI
76 * will abort all active transmit actions, if still
77 * any, at once.
78 */
79 if (i >= MSCAN_SET_MODE_RETRIES)
80 netdev_dbg(dev,
81 "device failed to enter sleep mode. "
82 "We proceed anyhow.\n");
83 else
84 priv->can.state = CAN_STATE_SLEEPING;
85 }
86
87 if ((mode & MSCAN_INITRQ) && !(canctl1 & MSCAN_INITAK)) {
88 setbits8(®s->canctl0, MSCAN_INITRQ);
89 for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) {
90 if (in_8(®s->canctl1) & MSCAN_INITAK)
91 break;
92 }
93 if (i >= MSCAN_SET_MODE_RETRIES)
94 ret = -ENODEV;
95 }
96 if (!ret)
97 priv->can.state = CAN_STATE_STOPPED;
98
99 if (mode & MSCAN_CSWAI)
100 setbits8(®s->canctl0, MSCAN_CSWAI);
101
102 } else {
103 canctl1 = in_8(®s->canctl1);
104 if (canctl1 & (MSCAN_SLPAK | MSCAN_INITAK)) {
105 clrbits8(®s->canctl0, MSCAN_SLPRQ | MSCAN_INITRQ);
106 for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) {
107 canctl1 = in_8(®s->canctl1);
108 if (!(canctl1 & (MSCAN_INITAK | MSCAN_SLPAK)))
109 break;
110 }
111 if (i >= MSCAN_SET_MODE_RETRIES)
112 ret = -ENODEV;
113 else
114 priv->can.state = CAN_STATE_ERROR_ACTIVE;
115 }
116 }
117 return ret;
118}
119
120static int mscan_start(struct net_device *dev)
121{
122 struct mscan_priv *priv = netdev_priv(dev);
123 struct mscan_regs __iomem *regs = priv->reg_base;
124 u8 canrflg;
125 int err;
126
127 out_8(®s->canrier, 0);
128
129 INIT_LIST_HEAD(&priv->tx_head);
130 priv->prev_buf_id = 0;
131 priv->cur_pri = 0;
132 priv->tx_active = 0;
133 priv->shadow_canrier = 0;
134 priv->flags = 0;
135
136 if (priv->type == MSCAN_TYPE_MPC5121) {
137 /* Clear pending bus-off condition */
138 if (in_8(®s->canmisc) & MSCAN_BOHOLD)
139 out_8(®s->canmisc, MSCAN_BOHOLD);
140 }
141
142 err = mscan_set_mode(dev, MSCAN_NORMAL_MODE);
143 if (err)
144 return err;
145
146 canrflg = in_8(®s->canrflg);
147 priv->shadow_statflg = canrflg & MSCAN_STAT_MSK;
148 priv->can.state = state_map[max(MSCAN_STATE_RX(canrflg),
149 MSCAN_STATE_TX(canrflg))];
150 out_8(®s->cantier, 0);
151
152 /* Enable receive interrupts. */
153 out_8(®s->canrier, MSCAN_RX_INTS_ENABLE);
154
155 return 0;
156}
157
158static int mscan_restart(struct net_device *dev)
159{
160 struct mscan_priv *priv = netdev_priv(dev);
161
162 if (priv->type == MSCAN_TYPE_MPC5121) {
163 struct mscan_regs __iomem *regs = priv->reg_base;
164
165 priv->can.state = CAN_STATE_ERROR_ACTIVE;
166 WARN(!(in_8(®s->canmisc) & MSCAN_BOHOLD),
167 "bus-off state expected\n");
168 out_8(®s->canmisc, MSCAN_BOHOLD);
169 /* Re-enable receive interrupts. */
170 out_8(®s->canrier, MSCAN_RX_INTS_ENABLE);
171 } else {
172 if (priv->can.state <= CAN_STATE_BUS_OFF)
173 mscan_set_mode(dev, MSCAN_INIT_MODE);
174 return mscan_start(dev);
175 }
176
177 return 0;
178}
179
180static netdev_tx_t mscan_start_xmit(struct sk_buff *skb, struct net_device *dev)
181{
182 struct can_frame *frame = (struct can_frame *)skb->data;
183 struct mscan_priv *priv = netdev_priv(dev);
184 struct mscan_regs __iomem *regs = priv->reg_base;
185 int i, rtr, buf_id;
186 u32 can_id;
187
188 if (can_dev_dropped_skb(dev, skb))
189 return NETDEV_TX_OK;
190
191 out_8(®s->cantier, 0);
192
193 i = ~priv->tx_active & MSCAN_TXE;
194 buf_id = ffs(i) - 1;
195 switch (hweight8(i)) {
196 case 0:
197 netif_stop_queue(dev);
198 netdev_err(dev, "Tx Ring full when queue awake!\n");
199 return NETDEV_TX_BUSY;
200 case 1:
201 /*
202 * if buf_id < 3, then current frame will be send out of order,
203 * since buffer with lower id have higher priority (hell..)
204 */
205 netif_stop_queue(dev);
206 fallthrough;
207 case 2:
208 if (buf_id < priv->prev_buf_id) {
209 priv->cur_pri++;
210 if (priv->cur_pri == 0xff) {
211 set_bit(F_TX_WAIT_ALL, &priv->flags);
212 netif_stop_queue(dev);
213 }
214 }
215 set_bit(F_TX_PROGRESS, &priv->flags);
216 break;
217 }
218 priv->prev_buf_id = buf_id;
219 out_8(®s->cantbsel, i);
220
221 rtr = frame->can_id & CAN_RTR_FLAG;
222
223 /* RTR is always the lowest bit of interest, then IDs follow */
224 if (frame->can_id & CAN_EFF_FLAG) {
225 can_id = (frame->can_id & CAN_EFF_MASK)
226 << (MSCAN_EFF_RTR_SHIFT + 1);
227 if (rtr)
228 can_id |= 1 << MSCAN_EFF_RTR_SHIFT;
229 out_be16(®s->tx.idr3_2, can_id);
230
231 can_id >>= 16;
232 /* EFF_FLAGS are between the IDs :( */
233 can_id = (can_id & 0x7) | ((can_id << 2) & 0xffe0)
234 | MSCAN_EFF_FLAGS;
235 } else {
236 can_id = (frame->can_id & CAN_SFF_MASK)
237 << (MSCAN_SFF_RTR_SHIFT + 1);
238 if (rtr)
239 can_id |= 1 << MSCAN_SFF_RTR_SHIFT;
240 }
241 out_be16(®s->tx.idr1_0, can_id);
242
243 if (!rtr) {
244 void __iomem *data = ®s->tx.dsr1_0;
245 u16 *payload = (u16 *)frame->data;
246
247 for (i = 0; i < frame->len / 2; i++) {
248 out_be16(data, *payload++);
249 data += 2 + _MSCAN_RESERVED_DSR_SIZE;
250 }
251 /* write remaining byte if necessary */
252 if (frame->len & 1)
253 out_8(data, frame->data[frame->len - 1]);
254 }
255
256 out_8(®s->tx.dlr, frame->len);
257 out_8(®s->tx.tbpr, priv->cur_pri);
258
259 /* Start transmission. */
260 out_8(®s->cantflg, 1 << buf_id);
261
262 if (!test_bit(F_TX_PROGRESS, &priv->flags))
263 netif_trans_update(dev);
264
265 list_add_tail(&priv->tx_queue[buf_id].list, &priv->tx_head);
266
267 can_put_echo_skb(skb, dev, buf_id, 0);
268
269 /* Enable interrupt. */
270 priv->tx_active |= 1 << buf_id;
271 out_8(®s->cantier, priv->tx_active);
272
273 return NETDEV_TX_OK;
274}
275
276static enum can_state get_new_state(struct net_device *dev, u8 canrflg)
277{
278 struct mscan_priv *priv = netdev_priv(dev);
279
280 if (unlikely(canrflg & MSCAN_CSCIF))
281 return state_map[max(MSCAN_STATE_RX(canrflg),
282 MSCAN_STATE_TX(canrflg))];
283
284 return priv->can.state;
285}
286
287static void mscan_get_rx_frame(struct net_device *dev, struct can_frame *frame)
288{
289 struct mscan_priv *priv = netdev_priv(dev);
290 struct mscan_regs __iomem *regs = priv->reg_base;
291 u32 can_id;
292 int i;
293
294 can_id = in_be16(®s->rx.idr1_0);
295 if (can_id & (1 << 3)) {
296 frame->can_id = CAN_EFF_FLAG;
297 can_id = ((can_id << 16) | in_be16(®s->rx.idr3_2));
298 can_id = ((can_id & 0xffe00000) |
299 ((can_id & 0x7ffff) << 2)) >> 2;
300 } else {
301 can_id >>= 4;
302 frame->can_id = 0;
303 }
304
305 frame->can_id |= can_id >> 1;
306 if (can_id & 1)
307 frame->can_id |= CAN_RTR_FLAG;
308
309 frame->len = can_cc_dlc2len(in_8(®s->rx.dlr) & 0xf);
310
311 if (!(frame->can_id & CAN_RTR_FLAG)) {
312 void __iomem *data = ®s->rx.dsr1_0;
313 u16 *payload = (u16 *)frame->data;
314
315 for (i = 0; i < frame->len / 2; i++) {
316 *payload++ = in_be16(data);
317 data += 2 + _MSCAN_RESERVED_DSR_SIZE;
318 }
319 /* read remaining byte if necessary */
320 if (frame->len & 1)
321 frame->data[frame->len - 1] = in_8(data);
322 }
323
324 out_8(®s->canrflg, MSCAN_RXF);
325}
326
327static void mscan_get_err_frame(struct net_device *dev, struct can_frame *frame,
328 u8 canrflg)
329{
330 struct mscan_priv *priv = netdev_priv(dev);
331 struct mscan_regs __iomem *regs = priv->reg_base;
332 struct net_device_stats *stats = &dev->stats;
333 enum can_state new_state;
334
335 netdev_dbg(dev, "error interrupt (canrflg=%#x)\n", canrflg);
336 frame->can_id = CAN_ERR_FLAG;
337
338 if (canrflg & MSCAN_OVRIF) {
339 frame->can_id |= CAN_ERR_CRTL;
340 frame->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
341 stats->rx_over_errors++;
342 stats->rx_errors++;
343 } else {
344 frame->data[1] = 0;
345 }
346
347 new_state = get_new_state(dev, canrflg);
348 if (new_state != priv->can.state) {
349 can_change_state(dev, frame,
350 state_map[MSCAN_STATE_TX(canrflg)],
351 state_map[MSCAN_STATE_RX(canrflg)]);
352
353 if (priv->can.state == CAN_STATE_BUS_OFF) {
354 /*
355 * The MSCAN on the MPC5200 does recover from bus-off
356 * automatically. To avoid that we stop the chip doing
357 * a light-weight stop (we are in irq-context).
358 */
359 if (priv->type != MSCAN_TYPE_MPC5121) {
360 out_8(®s->cantier, 0);
361 out_8(®s->canrier, 0);
362 setbits8(®s->canctl0,
363 MSCAN_SLPRQ | MSCAN_INITRQ);
364 }
365 can_bus_off(dev);
366 }
367 }
368 priv->shadow_statflg = canrflg & MSCAN_STAT_MSK;
369 frame->len = CAN_ERR_DLC;
370 out_8(®s->canrflg, MSCAN_ERR_IF);
371}
372
373static int mscan_rx_poll(struct napi_struct *napi, int quota)
374{
375 struct mscan_priv *priv = container_of(napi, struct mscan_priv, napi);
376 struct net_device *dev = napi->dev;
377 struct mscan_regs __iomem *regs = priv->reg_base;
378 struct net_device_stats *stats = &dev->stats;
379 int work_done = 0;
380 struct sk_buff *skb;
381 struct can_frame *frame;
382 u8 canrflg;
383
384 while (work_done < quota) {
385 canrflg = in_8(®s->canrflg);
386 if (!(canrflg & (MSCAN_RXF | MSCAN_ERR_IF)))
387 break;
388
389 skb = alloc_can_skb(dev, &frame);
390 if (!skb) {
391 if (printk_ratelimit())
392 netdev_notice(dev, "packet dropped\n");
393 stats->rx_dropped++;
394 out_8(®s->canrflg, canrflg);
395 continue;
396 }
397
398 if (canrflg & MSCAN_RXF) {
399 mscan_get_rx_frame(dev, frame);
400 stats->rx_packets++;
401 if (!(frame->can_id & CAN_RTR_FLAG))
402 stats->rx_bytes += frame->len;
403 } else if (canrflg & MSCAN_ERR_IF) {
404 mscan_get_err_frame(dev, frame, canrflg);
405 }
406
407 work_done++;
408 netif_receive_skb(skb);
409 }
410
411 if (work_done < quota) {
412 if (likely(napi_complete_done(&priv->napi, work_done))) {
413 clear_bit(F_RX_PROGRESS, &priv->flags);
414 if (priv->can.state < CAN_STATE_BUS_OFF)
415 out_8(®s->canrier, priv->shadow_canrier);
416 }
417 }
418 return work_done;
419}
420
421static irqreturn_t mscan_isr(int irq, void *dev_id)
422{
423 struct net_device *dev = (struct net_device *)dev_id;
424 struct mscan_priv *priv = netdev_priv(dev);
425 struct mscan_regs __iomem *regs = priv->reg_base;
426 struct net_device_stats *stats = &dev->stats;
427 u8 cantier, cantflg, canrflg;
428 irqreturn_t ret = IRQ_NONE;
429
430 cantier = in_8(®s->cantier) & MSCAN_TXE;
431 cantflg = in_8(®s->cantflg) & cantier;
432
433 if (cantier && cantflg) {
434 struct list_head *tmp, *pos;
435
436 list_for_each_safe(pos, tmp, &priv->tx_head) {
437 struct tx_queue_entry *entry =
438 list_entry(pos, struct tx_queue_entry, list);
439 u8 mask = entry->mask;
440
441 if (!(cantflg & mask))
442 continue;
443
444 out_8(®s->cantbsel, mask);
445 stats->tx_bytes += can_get_echo_skb(dev, entry->id,
446 NULL);
447 stats->tx_packets++;
448 priv->tx_active &= ~mask;
449 list_del(pos);
450 }
451
452 if (list_empty(&priv->tx_head)) {
453 clear_bit(F_TX_WAIT_ALL, &priv->flags);
454 clear_bit(F_TX_PROGRESS, &priv->flags);
455 priv->cur_pri = 0;
456 } else {
457 netif_trans_update(dev);
458 }
459
460 if (!test_bit(F_TX_WAIT_ALL, &priv->flags))
461 netif_wake_queue(dev);
462
463 out_8(®s->cantier, priv->tx_active);
464 ret = IRQ_HANDLED;
465 }
466
467 canrflg = in_8(®s->canrflg);
468 if ((canrflg & ~MSCAN_STAT_MSK) &&
469 !test_and_set_bit(F_RX_PROGRESS, &priv->flags)) {
470 if (canrflg & ~MSCAN_STAT_MSK) {
471 priv->shadow_canrier = in_8(®s->canrier);
472 out_8(®s->canrier, 0);
473 napi_schedule(&priv->napi);
474 ret = IRQ_HANDLED;
475 } else {
476 clear_bit(F_RX_PROGRESS, &priv->flags);
477 }
478 }
479 return ret;
480}
481
482static int mscan_do_set_mode(struct net_device *dev, enum can_mode mode)
483{
484 int ret = 0;
485
486 switch (mode) {
487 case CAN_MODE_START:
488 ret = mscan_restart(dev);
489 if (ret)
490 break;
491 if (netif_queue_stopped(dev))
492 netif_wake_queue(dev);
493 break;
494
495 default:
496 ret = -EOPNOTSUPP;
497 break;
498 }
499 return ret;
500}
501
502static int mscan_do_set_bittiming(struct net_device *dev)
503{
504 struct mscan_priv *priv = netdev_priv(dev);
505 struct mscan_regs __iomem *regs = priv->reg_base;
506 struct can_bittiming *bt = &priv->can.bittiming;
507 u8 btr0, btr1;
508
509 btr0 = BTR0_SET_BRP(bt->brp) | BTR0_SET_SJW(bt->sjw);
510 btr1 = (BTR1_SET_TSEG1(bt->prop_seg + bt->phase_seg1) |
511 BTR1_SET_TSEG2(bt->phase_seg2) |
512 BTR1_SET_SAM(priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES));
513
514 netdev_info(dev, "setting BTR0=0x%02x BTR1=0x%02x\n", btr0, btr1);
515
516 out_8(®s->canbtr0, btr0);
517 out_8(®s->canbtr1, btr1);
518
519 return 0;
520}
521
522static int mscan_get_berr_counter(const struct net_device *dev,
523 struct can_berr_counter *bec)
524{
525 struct mscan_priv *priv = netdev_priv(dev);
526 struct mscan_regs __iomem *regs = priv->reg_base;
527
528 bec->txerr = in_8(®s->cantxerr);
529 bec->rxerr = in_8(®s->canrxerr);
530
531 return 0;
532}
533
534static int mscan_open(struct net_device *dev)
535{
536 int ret;
537 struct mscan_priv *priv = netdev_priv(dev);
538 struct mscan_regs __iomem *regs = priv->reg_base;
539
540 ret = clk_prepare_enable(priv->clk_ipg);
541 if (ret)
542 goto exit_retcode;
543 ret = clk_prepare_enable(priv->clk_can);
544 if (ret)
545 goto exit_dis_ipg_clock;
546
547 /* common open */
548 ret = open_candev(dev);
549 if (ret)
550 goto exit_dis_can_clock;
551
552 napi_enable(&priv->napi);
553
554 ret = request_irq(dev->irq, mscan_isr, 0, dev->name, dev);
555 if (ret < 0) {
556 netdev_err(dev, "failed to attach interrupt\n");
557 goto exit_napi_disable;
558 }
559
560 if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY)
561 setbits8(®s->canctl1, MSCAN_LISTEN);
562 else
563 clrbits8(®s->canctl1, MSCAN_LISTEN);
564
565 ret = mscan_start(dev);
566 if (ret)
567 goto exit_free_irq;
568
569 netif_start_queue(dev);
570
571 return 0;
572
573exit_free_irq:
574 free_irq(dev->irq, dev);
575exit_napi_disable:
576 napi_disable(&priv->napi);
577 close_candev(dev);
578exit_dis_can_clock:
579 clk_disable_unprepare(priv->clk_can);
580exit_dis_ipg_clock:
581 clk_disable_unprepare(priv->clk_ipg);
582exit_retcode:
583 return ret;
584}
585
586static int mscan_close(struct net_device *dev)
587{
588 struct mscan_priv *priv = netdev_priv(dev);
589 struct mscan_regs __iomem *regs = priv->reg_base;
590
591 netif_stop_queue(dev);
592 napi_disable(&priv->napi);
593
594 out_8(®s->cantier, 0);
595 out_8(®s->canrier, 0);
596 mscan_set_mode(dev, MSCAN_INIT_MODE);
597 close_candev(dev);
598 free_irq(dev->irq, dev);
599
600 clk_disable_unprepare(priv->clk_can);
601 clk_disable_unprepare(priv->clk_ipg);
602
603 return 0;
604}
605
606static const struct net_device_ops mscan_netdev_ops = {
607 .ndo_open = mscan_open,
608 .ndo_stop = mscan_close,
609 .ndo_start_xmit = mscan_start_xmit,
610 .ndo_change_mtu = can_change_mtu,
611};
612
613static const struct ethtool_ops mscan_ethtool_ops = {
614 .get_ts_info = ethtool_op_get_ts_info,
615};
616
617int register_mscandev(struct net_device *dev, int mscan_clksrc)
618{
619 struct mscan_priv *priv = netdev_priv(dev);
620 struct mscan_regs __iomem *regs = priv->reg_base;
621 u8 ctl1;
622
623 ctl1 = in_8(®s->canctl1);
624 if (mscan_clksrc)
625 ctl1 |= MSCAN_CLKSRC;
626 else
627 ctl1 &= ~MSCAN_CLKSRC;
628
629 if (priv->type == MSCAN_TYPE_MPC5121) {
630 priv->can.do_get_berr_counter = mscan_get_berr_counter;
631 ctl1 |= MSCAN_BORM; /* bus-off recovery upon request */
632 }
633
634 ctl1 |= MSCAN_CANE;
635 out_8(®s->canctl1, ctl1);
636 udelay(100);
637
638 /* acceptance mask/acceptance code (accept everything) */
639 out_be16(®s->canidar1_0, 0);
640 out_be16(®s->canidar3_2, 0);
641 out_be16(®s->canidar5_4, 0);
642 out_be16(®s->canidar7_6, 0);
643
644 out_be16(®s->canidmr1_0, 0xffff);
645 out_be16(®s->canidmr3_2, 0xffff);
646 out_be16(®s->canidmr5_4, 0xffff);
647 out_be16(®s->canidmr7_6, 0xffff);
648 /* Two 32 bit Acceptance Filters */
649 out_8(®s->canidac, MSCAN_AF_32BIT);
650
651 mscan_set_mode(dev, MSCAN_INIT_MODE);
652
653 return register_candev(dev);
654}
655
656void unregister_mscandev(struct net_device *dev)
657{
658 struct mscan_priv *priv = netdev_priv(dev);
659 struct mscan_regs __iomem *regs = priv->reg_base;
660 mscan_set_mode(dev, MSCAN_INIT_MODE);
661 clrbits8(®s->canctl1, MSCAN_CANE);
662 unregister_candev(dev);
663}
664
665struct net_device *alloc_mscandev(void)
666{
667 struct net_device *dev;
668 struct mscan_priv *priv;
669 int i;
670
671 dev = alloc_candev(sizeof(struct mscan_priv), MSCAN_ECHO_SKB_MAX);
672 if (!dev)
673 return NULL;
674 priv = netdev_priv(dev);
675
676 dev->netdev_ops = &mscan_netdev_ops;
677 dev->ethtool_ops = &mscan_ethtool_ops;
678
679 dev->flags |= IFF_ECHO; /* we support local echo */
680
681 netif_napi_add_weight(dev, &priv->napi, mscan_rx_poll, 8);
682
683 priv->can.bittiming_const = &mscan_bittiming_const;
684 priv->can.do_set_bittiming = mscan_do_set_bittiming;
685 priv->can.do_set_mode = mscan_do_set_mode;
686 priv->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES |
687 CAN_CTRLMODE_LISTENONLY;
688
689 for (i = 0; i < TX_QUEUE_SIZE; i++) {
690 priv->tx_queue[i].id = i;
691 priv->tx_queue[i].mask = 1 << i;
692 }
693
694 return dev;
695}
696
697MODULE_AUTHOR("Andrey Volkov <avolkov@varma-el.com>");
698MODULE_LICENSE("GPL v2");
699MODULE_DESCRIPTION("CAN port driver for a MSCAN based chips");
1/*
2 * CAN bus driver for the alone generic (as possible as) MSCAN controller.
3 *
4 * Copyright (C) 2005-2006 Andrey Volkov <avolkov@varma-el.com>,
5 * Varma Electronics Oy
6 * Copyright (C) 2008-2009 Wolfgang Grandegger <wg@grandegger.com>
7 * Copyright (C) 2008-2009 Pengutronix <kernel@pengutronix.de>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the version 2 of the GNU General Public License
11 * as published by the Free Software Foundation
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#include <linux/kernel.h>
24#include <linux/module.h>
25#include <linux/interrupt.h>
26#include <linux/delay.h>
27#include <linux/netdevice.h>
28#include <linux/if_arp.h>
29#include <linux/if_ether.h>
30#include <linux/list.h>
31#include <linux/can/dev.h>
32#include <linux/can/error.h>
33#include <linux/io.h>
34
35#include "mscan.h"
36
37static struct can_bittiming_const mscan_bittiming_const = {
38 .name = "mscan",
39 .tseg1_min = 4,
40 .tseg1_max = 16,
41 .tseg2_min = 2,
42 .tseg2_max = 8,
43 .sjw_max = 4,
44 .brp_min = 1,
45 .brp_max = 64,
46 .brp_inc = 1,
47};
48
49struct mscan_state {
50 u8 mode;
51 u8 canrier;
52 u8 cantier;
53};
54
55static enum can_state state_map[] = {
56 CAN_STATE_ERROR_ACTIVE,
57 CAN_STATE_ERROR_WARNING,
58 CAN_STATE_ERROR_PASSIVE,
59 CAN_STATE_BUS_OFF
60};
61
62static int mscan_set_mode(struct net_device *dev, u8 mode)
63{
64 struct mscan_priv *priv = netdev_priv(dev);
65 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
66 int ret = 0;
67 int i;
68 u8 canctl1;
69
70 if (mode != MSCAN_NORMAL_MODE) {
71 if (priv->tx_active) {
72 /* Abort transfers before going to sleep */#
73 out_8(®s->cantarq, priv->tx_active);
74 /* Suppress TX done interrupts */
75 out_8(®s->cantier, 0);
76 }
77
78 canctl1 = in_8(®s->canctl1);
79 if ((mode & MSCAN_SLPRQ) && !(canctl1 & MSCAN_SLPAK)) {
80 setbits8(®s->canctl0, MSCAN_SLPRQ);
81 for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) {
82 if (in_8(®s->canctl1) & MSCAN_SLPAK)
83 break;
84 udelay(100);
85 }
86 /*
87 * The mscan controller will fail to enter sleep mode,
88 * while there are irregular activities on bus, like
89 * somebody keeps retransmitting. This behavior is
90 * undocumented and seems to differ between mscan built
91 * in mpc5200b and mpc5200. We proceed in that case,
92 * since otherwise the slprq will be kept set and the
93 * controller will get stuck. NOTE: INITRQ or CSWAI
94 * will abort all active transmit actions, if still
95 * any, at once.
96 */
97 if (i >= MSCAN_SET_MODE_RETRIES)
98 dev_dbg(dev->dev.parent,
99 "device failed to enter sleep mode. "
100 "We proceed anyhow.\n");
101 else
102 priv->can.state = CAN_STATE_SLEEPING;
103 }
104
105 if ((mode & MSCAN_INITRQ) && !(canctl1 & MSCAN_INITAK)) {
106 setbits8(®s->canctl0, MSCAN_INITRQ);
107 for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) {
108 if (in_8(®s->canctl1) & MSCAN_INITAK)
109 break;
110 }
111 if (i >= MSCAN_SET_MODE_RETRIES)
112 ret = -ENODEV;
113 }
114 if (!ret)
115 priv->can.state = CAN_STATE_STOPPED;
116
117 if (mode & MSCAN_CSWAI)
118 setbits8(®s->canctl0, MSCAN_CSWAI);
119
120 } else {
121 canctl1 = in_8(®s->canctl1);
122 if (canctl1 & (MSCAN_SLPAK | MSCAN_INITAK)) {
123 clrbits8(®s->canctl0, MSCAN_SLPRQ | MSCAN_INITRQ);
124 for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) {
125 canctl1 = in_8(®s->canctl1);
126 if (!(canctl1 & (MSCAN_INITAK | MSCAN_SLPAK)))
127 break;
128 }
129 if (i >= MSCAN_SET_MODE_RETRIES)
130 ret = -ENODEV;
131 else
132 priv->can.state = CAN_STATE_ERROR_ACTIVE;
133 }
134 }
135 return ret;
136}
137
138static int mscan_start(struct net_device *dev)
139{
140 struct mscan_priv *priv = netdev_priv(dev);
141 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
142 u8 canrflg;
143 int err;
144
145 out_8(®s->canrier, 0);
146
147 INIT_LIST_HEAD(&priv->tx_head);
148 priv->prev_buf_id = 0;
149 priv->cur_pri = 0;
150 priv->tx_active = 0;
151 priv->shadow_canrier = 0;
152 priv->flags = 0;
153
154 if (priv->type == MSCAN_TYPE_MPC5121) {
155 /* Clear pending bus-off condition */
156 if (in_8(®s->canmisc) & MSCAN_BOHOLD)
157 out_8(®s->canmisc, MSCAN_BOHOLD);
158 }
159
160 err = mscan_set_mode(dev, MSCAN_NORMAL_MODE);
161 if (err)
162 return err;
163
164 canrflg = in_8(®s->canrflg);
165 priv->shadow_statflg = canrflg & MSCAN_STAT_MSK;
166 priv->can.state = state_map[max(MSCAN_STATE_RX(canrflg),
167 MSCAN_STATE_TX(canrflg))];
168 out_8(®s->cantier, 0);
169
170 /* Enable receive interrupts. */
171 out_8(®s->canrier, MSCAN_RX_INTS_ENABLE);
172
173 return 0;
174}
175
176static int mscan_restart(struct net_device *dev)
177{
178 struct mscan_priv *priv = netdev_priv(dev);
179
180 if (priv->type == MSCAN_TYPE_MPC5121) {
181 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
182
183 priv->can.state = CAN_STATE_ERROR_ACTIVE;
184 WARN(!(in_8(®s->canmisc) & MSCAN_BOHOLD),
185 "bus-off state expected\n");
186 out_8(®s->canmisc, MSCAN_BOHOLD);
187 /* Re-enable receive interrupts. */
188 out_8(®s->canrier, MSCAN_RX_INTS_ENABLE);
189 } else {
190 if (priv->can.state <= CAN_STATE_BUS_OFF)
191 mscan_set_mode(dev, MSCAN_INIT_MODE);
192 return mscan_start(dev);
193 }
194
195 return 0;
196}
197
198static netdev_tx_t mscan_start_xmit(struct sk_buff *skb, struct net_device *dev)
199{
200 struct can_frame *frame = (struct can_frame *)skb->data;
201 struct mscan_priv *priv = netdev_priv(dev);
202 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
203 int i, rtr, buf_id;
204 u32 can_id;
205
206 if (can_dropped_invalid_skb(dev, skb))
207 return NETDEV_TX_OK;
208
209 out_8(®s->cantier, 0);
210
211 i = ~priv->tx_active & MSCAN_TXE;
212 buf_id = ffs(i) - 1;
213 switch (hweight8(i)) {
214 case 0:
215 netif_stop_queue(dev);
216 dev_err(dev->dev.parent, "Tx Ring full when queue awake!\n");
217 return NETDEV_TX_BUSY;
218 case 1:
219 /*
220 * if buf_id < 3, then current frame will be send out of order,
221 * since buffer with lower id have higher priority (hell..)
222 */
223 netif_stop_queue(dev);
224 case 2:
225 if (buf_id < priv->prev_buf_id) {
226 priv->cur_pri++;
227 if (priv->cur_pri == 0xff) {
228 set_bit(F_TX_WAIT_ALL, &priv->flags);
229 netif_stop_queue(dev);
230 }
231 }
232 set_bit(F_TX_PROGRESS, &priv->flags);
233 break;
234 }
235 priv->prev_buf_id = buf_id;
236 out_8(®s->cantbsel, i);
237
238 rtr = frame->can_id & CAN_RTR_FLAG;
239
240 /* RTR is always the lowest bit of interest, then IDs follow */
241 if (frame->can_id & CAN_EFF_FLAG) {
242 can_id = (frame->can_id & CAN_EFF_MASK)
243 << (MSCAN_EFF_RTR_SHIFT + 1);
244 if (rtr)
245 can_id |= 1 << MSCAN_EFF_RTR_SHIFT;
246 out_be16(®s->tx.idr3_2, can_id);
247
248 can_id >>= 16;
249 /* EFF_FLAGS are between the IDs :( */
250 can_id = (can_id & 0x7) | ((can_id << 2) & 0xffe0)
251 | MSCAN_EFF_FLAGS;
252 } else {
253 can_id = (frame->can_id & CAN_SFF_MASK)
254 << (MSCAN_SFF_RTR_SHIFT + 1);
255 if (rtr)
256 can_id |= 1 << MSCAN_SFF_RTR_SHIFT;
257 }
258 out_be16(®s->tx.idr1_0, can_id);
259
260 if (!rtr) {
261 void __iomem *data = ®s->tx.dsr1_0;
262 u16 *payload = (u16 *)frame->data;
263
264 for (i = 0; i < frame->can_dlc / 2; i++) {
265 out_be16(data, *payload++);
266 data += 2 + _MSCAN_RESERVED_DSR_SIZE;
267 }
268 /* write remaining byte if necessary */
269 if (frame->can_dlc & 1)
270 out_8(data, frame->data[frame->can_dlc - 1]);
271 }
272
273 out_8(®s->tx.dlr, frame->can_dlc);
274 out_8(®s->tx.tbpr, priv->cur_pri);
275
276 /* Start transmission. */
277 out_8(®s->cantflg, 1 << buf_id);
278
279 if (!test_bit(F_TX_PROGRESS, &priv->flags))
280 dev->trans_start = jiffies;
281
282 list_add_tail(&priv->tx_queue[buf_id].list, &priv->tx_head);
283
284 can_put_echo_skb(skb, dev, buf_id);
285
286 /* Enable interrupt. */
287 priv->tx_active |= 1 << buf_id;
288 out_8(®s->cantier, priv->tx_active);
289
290 return NETDEV_TX_OK;
291}
292
293/* This function returns the old state to see where we came from */
294static enum can_state check_set_state(struct net_device *dev, u8 canrflg)
295{
296 struct mscan_priv *priv = netdev_priv(dev);
297 enum can_state state, old_state = priv->can.state;
298
299 if (canrflg & MSCAN_CSCIF && old_state <= CAN_STATE_BUS_OFF) {
300 state = state_map[max(MSCAN_STATE_RX(canrflg),
301 MSCAN_STATE_TX(canrflg))];
302 priv->can.state = state;
303 }
304 return old_state;
305}
306
307static void mscan_get_rx_frame(struct net_device *dev, struct can_frame *frame)
308{
309 struct mscan_priv *priv = netdev_priv(dev);
310 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
311 u32 can_id;
312 int i;
313
314 can_id = in_be16(®s->rx.idr1_0);
315 if (can_id & (1 << 3)) {
316 frame->can_id = CAN_EFF_FLAG;
317 can_id = ((can_id << 16) | in_be16(®s->rx.idr3_2));
318 can_id = ((can_id & 0xffe00000) |
319 ((can_id & 0x7ffff) << 2)) >> 2;
320 } else {
321 can_id >>= 4;
322 frame->can_id = 0;
323 }
324
325 frame->can_id |= can_id >> 1;
326 if (can_id & 1)
327 frame->can_id |= CAN_RTR_FLAG;
328
329 frame->can_dlc = get_can_dlc(in_8(®s->rx.dlr) & 0xf);
330
331 if (!(frame->can_id & CAN_RTR_FLAG)) {
332 void __iomem *data = ®s->rx.dsr1_0;
333 u16 *payload = (u16 *)frame->data;
334
335 for (i = 0; i < frame->can_dlc / 2; i++) {
336 *payload++ = in_be16(data);
337 data += 2 + _MSCAN_RESERVED_DSR_SIZE;
338 }
339 /* read remaining byte if necessary */
340 if (frame->can_dlc & 1)
341 frame->data[frame->can_dlc - 1] = in_8(data);
342 }
343
344 out_8(®s->canrflg, MSCAN_RXF);
345}
346
347static void mscan_get_err_frame(struct net_device *dev, struct can_frame *frame,
348 u8 canrflg)
349{
350 struct mscan_priv *priv = netdev_priv(dev);
351 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
352 struct net_device_stats *stats = &dev->stats;
353 enum can_state old_state;
354
355 dev_dbg(dev->dev.parent, "error interrupt (canrflg=%#x)\n", canrflg);
356 frame->can_id = CAN_ERR_FLAG;
357
358 if (canrflg & MSCAN_OVRIF) {
359 frame->can_id |= CAN_ERR_CRTL;
360 frame->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
361 stats->rx_over_errors++;
362 stats->rx_errors++;
363 } else {
364 frame->data[1] = 0;
365 }
366
367 old_state = check_set_state(dev, canrflg);
368 /* State changed */
369 if (old_state != priv->can.state) {
370 switch (priv->can.state) {
371 case CAN_STATE_ERROR_WARNING:
372 frame->can_id |= CAN_ERR_CRTL;
373 priv->can.can_stats.error_warning++;
374 if ((priv->shadow_statflg & MSCAN_RSTAT_MSK) <
375 (canrflg & MSCAN_RSTAT_MSK))
376 frame->data[1] |= CAN_ERR_CRTL_RX_WARNING;
377 if ((priv->shadow_statflg & MSCAN_TSTAT_MSK) <
378 (canrflg & MSCAN_TSTAT_MSK))
379 frame->data[1] |= CAN_ERR_CRTL_TX_WARNING;
380 break;
381 case CAN_STATE_ERROR_PASSIVE:
382 frame->can_id |= CAN_ERR_CRTL;
383 priv->can.can_stats.error_passive++;
384 frame->data[1] |= CAN_ERR_CRTL_RX_PASSIVE;
385 break;
386 case CAN_STATE_BUS_OFF:
387 frame->can_id |= CAN_ERR_BUSOFF;
388 /*
389 * The MSCAN on the MPC5200 does recover from bus-off
390 * automatically. To avoid that we stop the chip doing
391 * a light-weight stop (we are in irq-context).
392 */
393 if (priv->type != MSCAN_TYPE_MPC5121) {
394 out_8(®s->cantier, 0);
395 out_8(®s->canrier, 0);
396 setbits8(®s->canctl0,
397 MSCAN_SLPRQ | MSCAN_INITRQ);
398 }
399 can_bus_off(dev);
400 break;
401 default:
402 break;
403 }
404 }
405 priv->shadow_statflg = canrflg & MSCAN_STAT_MSK;
406 frame->can_dlc = CAN_ERR_DLC;
407 out_8(®s->canrflg, MSCAN_ERR_IF);
408}
409
410static int mscan_rx_poll(struct napi_struct *napi, int quota)
411{
412 struct mscan_priv *priv = container_of(napi, struct mscan_priv, napi);
413 struct net_device *dev = napi->dev;
414 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
415 struct net_device_stats *stats = &dev->stats;
416 int npackets = 0;
417 int ret = 1;
418 struct sk_buff *skb;
419 struct can_frame *frame;
420 u8 canrflg;
421
422 while (npackets < quota) {
423 canrflg = in_8(®s->canrflg);
424 if (!(canrflg & (MSCAN_RXF | MSCAN_ERR_IF)))
425 break;
426
427 skb = alloc_can_skb(dev, &frame);
428 if (!skb) {
429 if (printk_ratelimit())
430 dev_notice(dev->dev.parent, "packet dropped\n");
431 stats->rx_dropped++;
432 out_8(®s->canrflg, canrflg);
433 continue;
434 }
435
436 if (canrflg & MSCAN_RXF)
437 mscan_get_rx_frame(dev, frame);
438 else if (canrflg & MSCAN_ERR_IF)
439 mscan_get_err_frame(dev, frame, canrflg);
440
441 stats->rx_packets++;
442 stats->rx_bytes += frame->can_dlc;
443 npackets++;
444 netif_receive_skb(skb);
445 }
446
447 if (!(in_8(®s->canrflg) & (MSCAN_RXF | MSCAN_ERR_IF))) {
448 napi_complete(&priv->napi);
449 clear_bit(F_RX_PROGRESS, &priv->flags);
450 if (priv->can.state < CAN_STATE_BUS_OFF)
451 out_8(®s->canrier, priv->shadow_canrier);
452 ret = 0;
453 }
454 return ret;
455}
456
457static irqreturn_t mscan_isr(int irq, void *dev_id)
458{
459 struct net_device *dev = (struct net_device *)dev_id;
460 struct mscan_priv *priv = netdev_priv(dev);
461 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
462 struct net_device_stats *stats = &dev->stats;
463 u8 cantier, cantflg, canrflg;
464 irqreturn_t ret = IRQ_NONE;
465
466 cantier = in_8(®s->cantier) & MSCAN_TXE;
467 cantflg = in_8(®s->cantflg) & cantier;
468
469 if (cantier && cantflg) {
470 struct list_head *tmp, *pos;
471
472 list_for_each_safe(pos, tmp, &priv->tx_head) {
473 struct tx_queue_entry *entry =
474 list_entry(pos, struct tx_queue_entry, list);
475 u8 mask = entry->mask;
476
477 if (!(cantflg & mask))
478 continue;
479
480 out_8(®s->cantbsel, mask);
481 stats->tx_bytes += in_8(®s->tx.dlr);
482 stats->tx_packets++;
483 can_get_echo_skb(dev, entry->id);
484 priv->tx_active &= ~mask;
485 list_del(pos);
486 }
487
488 if (list_empty(&priv->tx_head)) {
489 clear_bit(F_TX_WAIT_ALL, &priv->flags);
490 clear_bit(F_TX_PROGRESS, &priv->flags);
491 priv->cur_pri = 0;
492 } else {
493 dev->trans_start = jiffies;
494 }
495
496 if (!test_bit(F_TX_WAIT_ALL, &priv->flags))
497 netif_wake_queue(dev);
498
499 out_8(®s->cantier, priv->tx_active);
500 ret = IRQ_HANDLED;
501 }
502
503 canrflg = in_8(®s->canrflg);
504 if ((canrflg & ~MSCAN_STAT_MSK) &&
505 !test_and_set_bit(F_RX_PROGRESS, &priv->flags)) {
506 if (canrflg & ~MSCAN_STAT_MSK) {
507 priv->shadow_canrier = in_8(®s->canrier);
508 out_8(®s->canrier, 0);
509 napi_schedule(&priv->napi);
510 ret = IRQ_HANDLED;
511 } else {
512 clear_bit(F_RX_PROGRESS, &priv->flags);
513 }
514 }
515 return ret;
516}
517
518static int mscan_do_set_mode(struct net_device *dev, enum can_mode mode)
519{
520 struct mscan_priv *priv = netdev_priv(dev);
521 int ret = 0;
522
523 if (!priv->open_time)
524 return -EINVAL;
525
526 switch (mode) {
527 case CAN_MODE_START:
528 ret = mscan_restart(dev);
529 if (ret)
530 break;
531 if (netif_queue_stopped(dev))
532 netif_wake_queue(dev);
533 break;
534
535 default:
536 ret = -EOPNOTSUPP;
537 break;
538 }
539 return ret;
540}
541
542static int mscan_do_set_bittiming(struct net_device *dev)
543{
544 struct mscan_priv *priv = netdev_priv(dev);
545 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
546 struct can_bittiming *bt = &priv->can.bittiming;
547 u8 btr0, btr1;
548
549 btr0 = BTR0_SET_BRP(bt->brp) | BTR0_SET_SJW(bt->sjw);
550 btr1 = (BTR1_SET_TSEG1(bt->prop_seg + bt->phase_seg1) |
551 BTR1_SET_TSEG2(bt->phase_seg2) |
552 BTR1_SET_SAM(priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES));
553
554 dev_info(dev->dev.parent, "setting BTR0=0x%02x BTR1=0x%02x\n",
555 btr0, btr1);
556
557 out_8(®s->canbtr0, btr0);
558 out_8(®s->canbtr1, btr1);
559
560 return 0;
561}
562
563static int mscan_open(struct net_device *dev)
564{
565 int ret;
566 struct mscan_priv *priv = netdev_priv(dev);
567 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
568
569 /* common open */
570 ret = open_candev(dev);
571 if (ret)
572 return ret;
573
574 napi_enable(&priv->napi);
575
576 ret = request_irq(dev->irq, mscan_isr, 0, dev->name, dev);
577 if (ret < 0) {
578 dev_err(dev->dev.parent, "failed to attach interrupt\n");
579 goto exit_napi_disable;
580 }
581
582 priv->open_time = jiffies;
583
584 clrbits8(®s->canctl1, MSCAN_LISTEN);
585
586 ret = mscan_start(dev);
587 if (ret)
588 goto exit_free_irq;
589
590 netif_start_queue(dev);
591
592 return 0;
593
594exit_free_irq:
595 priv->open_time = 0;
596 free_irq(dev->irq, dev);
597exit_napi_disable:
598 napi_disable(&priv->napi);
599 close_candev(dev);
600 return ret;
601}
602
603static int mscan_close(struct net_device *dev)
604{
605 struct mscan_priv *priv = netdev_priv(dev);
606 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
607
608 netif_stop_queue(dev);
609 napi_disable(&priv->napi);
610
611 out_8(®s->cantier, 0);
612 out_8(®s->canrier, 0);
613 mscan_set_mode(dev, MSCAN_INIT_MODE);
614 close_candev(dev);
615 free_irq(dev->irq, dev);
616 priv->open_time = 0;
617
618 return 0;
619}
620
621static const struct net_device_ops mscan_netdev_ops = {
622 .ndo_open = mscan_open,
623 .ndo_stop = mscan_close,
624 .ndo_start_xmit = mscan_start_xmit,
625};
626
627int register_mscandev(struct net_device *dev, int mscan_clksrc)
628{
629 struct mscan_priv *priv = netdev_priv(dev);
630 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
631 u8 ctl1;
632
633 ctl1 = in_8(®s->canctl1);
634 if (mscan_clksrc)
635 ctl1 |= MSCAN_CLKSRC;
636 else
637 ctl1 &= ~MSCAN_CLKSRC;
638
639 if (priv->type == MSCAN_TYPE_MPC5121)
640 ctl1 |= MSCAN_BORM; /* bus-off recovery upon request */
641
642 ctl1 |= MSCAN_CANE;
643 out_8(®s->canctl1, ctl1);
644 udelay(100);
645
646 /* acceptance mask/acceptance code (accept everything) */
647 out_be16(®s->canidar1_0, 0);
648 out_be16(®s->canidar3_2, 0);
649 out_be16(®s->canidar5_4, 0);
650 out_be16(®s->canidar7_6, 0);
651
652 out_be16(®s->canidmr1_0, 0xffff);
653 out_be16(®s->canidmr3_2, 0xffff);
654 out_be16(®s->canidmr5_4, 0xffff);
655 out_be16(®s->canidmr7_6, 0xffff);
656 /* Two 32 bit Acceptance Filters */
657 out_8(®s->canidac, MSCAN_AF_32BIT);
658
659 mscan_set_mode(dev, MSCAN_INIT_MODE);
660
661 return register_candev(dev);
662}
663
664void unregister_mscandev(struct net_device *dev)
665{
666 struct mscan_priv *priv = netdev_priv(dev);
667 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
668 mscan_set_mode(dev, MSCAN_INIT_MODE);
669 clrbits8(®s->canctl1, MSCAN_CANE);
670 unregister_candev(dev);
671}
672
673struct net_device *alloc_mscandev(void)
674{
675 struct net_device *dev;
676 struct mscan_priv *priv;
677 int i;
678
679 dev = alloc_candev(sizeof(struct mscan_priv), MSCAN_ECHO_SKB_MAX);
680 if (!dev)
681 return NULL;
682 priv = netdev_priv(dev);
683
684 dev->netdev_ops = &mscan_netdev_ops;
685
686 dev->flags |= IFF_ECHO; /* we support local echo */
687
688 netif_napi_add(dev, &priv->napi, mscan_rx_poll, 8);
689
690 priv->can.bittiming_const = &mscan_bittiming_const;
691 priv->can.do_set_bittiming = mscan_do_set_bittiming;
692 priv->can.do_set_mode = mscan_do_set_mode;
693 priv->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES;
694
695 for (i = 0; i < TX_QUEUE_SIZE; i++) {
696 priv->tx_queue[i].id = i;
697 priv->tx_queue[i].mask = 1 << i;
698 }
699
700 return dev;
701}
702
703MODULE_AUTHOR("Andrey Volkov <avolkov@varma-el.com>");
704MODULE_LICENSE("GPL v2");
705MODULE_DESCRIPTION("CAN port driver for a MSCAN based chips");