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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * CAN bus driver for the alone generic (as possible as) MSCAN controller.
4 *
5 * Copyright (C) 2005-2006 Andrey Volkov <avolkov@varma-el.com>,
6 * Varma Electronics Oy
7 * Copyright (C) 2008-2009 Wolfgang Grandegger <wg@grandegger.com>
8 * Copyright (C) 2008-2009 Pengutronix <kernel@pengutronix.de>
9 */
10
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/interrupt.h>
14#include <linux/delay.h>
15#include <linux/netdevice.h>
16#include <linux/if_arp.h>
17#include <linux/if_ether.h>
18#include <linux/list.h>
19#include <linux/can/dev.h>
20#include <linux/can/error.h>
21#include <linux/io.h>
22
23#include "mscan.h"
24
25static const struct can_bittiming_const mscan_bittiming_const = {
26 .name = "mscan",
27 .tseg1_min = 4,
28 .tseg1_max = 16,
29 .tseg2_min = 2,
30 .tseg2_max = 8,
31 .sjw_max = 4,
32 .brp_min = 1,
33 .brp_max = 64,
34 .brp_inc = 1,
35};
36
37static enum can_state state_map[] = {
38 CAN_STATE_ERROR_ACTIVE,
39 CAN_STATE_ERROR_WARNING,
40 CAN_STATE_ERROR_PASSIVE,
41 CAN_STATE_BUS_OFF
42};
43
44static int mscan_set_mode(struct net_device *dev, u8 mode)
45{
46 struct mscan_priv *priv = netdev_priv(dev);
47 struct mscan_regs __iomem *regs = priv->reg_base;
48 int ret = 0;
49 int i;
50 u8 canctl1;
51
52 if (mode != MSCAN_NORMAL_MODE) {
53 if (priv->tx_active) {
54 /* Abort transfers before going to sleep */#
55 out_8(®s->cantarq, priv->tx_active);
56 /* Suppress TX done interrupts */
57 out_8(®s->cantier, 0);
58 }
59
60 canctl1 = in_8(®s->canctl1);
61 if ((mode & MSCAN_SLPRQ) && !(canctl1 & MSCAN_SLPAK)) {
62 setbits8(®s->canctl0, MSCAN_SLPRQ);
63 for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) {
64 if (in_8(®s->canctl1) & MSCAN_SLPAK)
65 break;
66 udelay(100);
67 }
68 /*
69 * The mscan controller will fail to enter sleep mode,
70 * while there are irregular activities on bus, like
71 * somebody keeps retransmitting. This behavior is
72 * undocumented and seems to differ between mscan built
73 * in mpc5200b and mpc5200. We proceed in that case,
74 * since otherwise the slprq will be kept set and the
75 * controller will get stuck. NOTE: INITRQ or CSWAI
76 * will abort all active transmit actions, if still
77 * any, at once.
78 */
79 if (i >= MSCAN_SET_MODE_RETRIES)
80 netdev_dbg(dev,
81 "device failed to enter sleep mode. "
82 "We proceed anyhow.\n");
83 else
84 priv->can.state = CAN_STATE_SLEEPING;
85 }
86
87 if ((mode & MSCAN_INITRQ) && !(canctl1 & MSCAN_INITAK)) {
88 setbits8(®s->canctl0, MSCAN_INITRQ);
89 for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) {
90 if (in_8(®s->canctl1) & MSCAN_INITAK)
91 break;
92 }
93 if (i >= MSCAN_SET_MODE_RETRIES)
94 ret = -ENODEV;
95 }
96 if (!ret)
97 priv->can.state = CAN_STATE_STOPPED;
98
99 if (mode & MSCAN_CSWAI)
100 setbits8(®s->canctl0, MSCAN_CSWAI);
101
102 } else {
103 canctl1 = in_8(®s->canctl1);
104 if (canctl1 & (MSCAN_SLPAK | MSCAN_INITAK)) {
105 clrbits8(®s->canctl0, MSCAN_SLPRQ | MSCAN_INITRQ);
106 for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) {
107 canctl1 = in_8(®s->canctl1);
108 if (!(canctl1 & (MSCAN_INITAK | MSCAN_SLPAK)))
109 break;
110 }
111 if (i >= MSCAN_SET_MODE_RETRIES)
112 ret = -ENODEV;
113 else
114 priv->can.state = CAN_STATE_ERROR_ACTIVE;
115 }
116 }
117 return ret;
118}
119
120static int mscan_start(struct net_device *dev)
121{
122 struct mscan_priv *priv = netdev_priv(dev);
123 struct mscan_regs __iomem *regs = priv->reg_base;
124 u8 canrflg;
125 int err;
126
127 out_8(®s->canrier, 0);
128
129 INIT_LIST_HEAD(&priv->tx_head);
130 priv->prev_buf_id = 0;
131 priv->cur_pri = 0;
132 priv->tx_active = 0;
133 priv->shadow_canrier = 0;
134 priv->flags = 0;
135
136 if (priv->type == MSCAN_TYPE_MPC5121) {
137 /* Clear pending bus-off condition */
138 if (in_8(®s->canmisc) & MSCAN_BOHOLD)
139 out_8(®s->canmisc, MSCAN_BOHOLD);
140 }
141
142 err = mscan_set_mode(dev, MSCAN_NORMAL_MODE);
143 if (err)
144 return err;
145
146 canrflg = in_8(®s->canrflg);
147 priv->shadow_statflg = canrflg & MSCAN_STAT_MSK;
148 priv->can.state = state_map[max(MSCAN_STATE_RX(canrflg),
149 MSCAN_STATE_TX(canrflg))];
150 out_8(®s->cantier, 0);
151
152 /* Enable receive interrupts. */
153 out_8(®s->canrier, MSCAN_RX_INTS_ENABLE);
154
155 return 0;
156}
157
158static int mscan_restart(struct net_device *dev)
159{
160 struct mscan_priv *priv = netdev_priv(dev);
161
162 if (priv->type == MSCAN_TYPE_MPC5121) {
163 struct mscan_regs __iomem *regs = priv->reg_base;
164
165 priv->can.state = CAN_STATE_ERROR_ACTIVE;
166 WARN(!(in_8(®s->canmisc) & MSCAN_BOHOLD),
167 "bus-off state expected\n");
168 out_8(®s->canmisc, MSCAN_BOHOLD);
169 /* Re-enable receive interrupts. */
170 out_8(®s->canrier, MSCAN_RX_INTS_ENABLE);
171 } else {
172 if (priv->can.state <= CAN_STATE_BUS_OFF)
173 mscan_set_mode(dev, MSCAN_INIT_MODE);
174 return mscan_start(dev);
175 }
176
177 return 0;
178}
179
180static netdev_tx_t mscan_start_xmit(struct sk_buff *skb, struct net_device *dev)
181{
182 struct can_frame *frame = (struct can_frame *)skb->data;
183 struct mscan_priv *priv = netdev_priv(dev);
184 struct mscan_regs __iomem *regs = priv->reg_base;
185 int i, rtr, buf_id;
186 u32 can_id;
187
188 if (can_dev_dropped_skb(dev, skb))
189 return NETDEV_TX_OK;
190
191 out_8(®s->cantier, 0);
192
193 i = ~priv->tx_active & MSCAN_TXE;
194 buf_id = ffs(i) - 1;
195 switch (hweight8(i)) {
196 case 0:
197 netif_stop_queue(dev);
198 netdev_err(dev, "Tx Ring full when queue awake!\n");
199 return NETDEV_TX_BUSY;
200 case 1:
201 /*
202 * if buf_id < 3, then current frame will be send out of order,
203 * since buffer with lower id have higher priority (hell..)
204 */
205 netif_stop_queue(dev);
206 fallthrough;
207 case 2:
208 if (buf_id < priv->prev_buf_id) {
209 priv->cur_pri++;
210 if (priv->cur_pri == 0xff) {
211 set_bit(F_TX_WAIT_ALL, &priv->flags);
212 netif_stop_queue(dev);
213 }
214 }
215 set_bit(F_TX_PROGRESS, &priv->flags);
216 break;
217 }
218 priv->prev_buf_id = buf_id;
219 out_8(®s->cantbsel, i);
220
221 rtr = frame->can_id & CAN_RTR_FLAG;
222
223 /* RTR is always the lowest bit of interest, then IDs follow */
224 if (frame->can_id & CAN_EFF_FLAG) {
225 can_id = (frame->can_id & CAN_EFF_MASK)
226 << (MSCAN_EFF_RTR_SHIFT + 1);
227 if (rtr)
228 can_id |= 1 << MSCAN_EFF_RTR_SHIFT;
229 out_be16(®s->tx.idr3_2, can_id);
230
231 can_id >>= 16;
232 /* EFF_FLAGS are between the IDs :( */
233 can_id = (can_id & 0x7) | ((can_id << 2) & 0xffe0)
234 | MSCAN_EFF_FLAGS;
235 } else {
236 can_id = (frame->can_id & CAN_SFF_MASK)
237 << (MSCAN_SFF_RTR_SHIFT + 1);
238 if (rtr)
239 can_id |= 1 << MSCAN_SFF_RTR_SHIFT;
240 }
241 out_be16(®s->tx.idr1_0, can_id);
242
243 if (!rtr) {
244 void __iomem *data = ®s->tx.dsr1_0;
245 u16 *payload = (u16 *)frame->data;
246
247 for (i = 0; i < frame->len / 2; i++) {
248 out_be16(data, *payload++);
249 data += 2 + _MSCAN_RESERVED_DSR_SIZE;
250 }
251 /* write remaining byte if necessary */
252 if (frame->len & 1)
253 out_8(data, frame->data[frame->len - 1]);
254 }
255
256 out_8(®s->tx.dlr, frame->len);
257 out_8(®s->tx.tbpr, priv->cur_pri);
258
259 /* Start transmission. */
260 out_8(®s->cantflg, 1 << buf_id);
261
262 if (!test_bit(F_TX_PROGRESS, &priv->flags))
263 netif_trans_update(dev);
264
265 list_add_tail(&priv->tx_queue[buf_id].list, &priv->tx_head);
266
267 can_put_echo_skb(skb, dev, buf_id, 0);
268
269 /* Enable interrupt. */
270 priv->tx_active |= 1 << buf_id;
271 out_8(®s->cantier, priv->tx_active);
272
273 return NETDEV_TX_OK;
274}
275
276static enum can_state get_new_state(struct net_device *dev, u8 canrflg)
277{
278 struct mscan_priv *priv = netdev_priv(dev);
279
280 if (unlikely(canrflg & MSCAN_CSCIF))
281 return state_map[max(MSCAN_STATE_RX(canrflg),
282 MSCAN_STATE_TX(canrflg))];
283
284 return priv->can.state;
285}
286
287static void mscan_get_rx_frame(struct net_device *dev, struct can_frame *frame)
288{
289 struct mscan_priv *priv = netdev_priv(dev);
290 struct mscan_regs __iomem *regs = priv->reg_base;
291 u32 can_id;
292 int i;
293
294 can_id = in_be16(®s->rx.idr1_0);
295 if (can_id & (1 << 3)) {
296 frame->can_id = CAN_EFF_FLAG;
297 can_id = ((can_id << 16) | in_be16(®s->rx.idr3_2));
298 can_id = ((can_id & 0xffe00000) |
299 ((can_id & 0x7ffff) << 2)) >> 2;
300 } else {
301 can_id >>= 4;
302 frame->can_id = 0;
303 }
304
305 frame->can_id |= can_id >> 1;
306 if (can_id & 1)
307 frame->can_id |= CAN_RTR_FLAG;
308
309 frame->len = can_cc_dlc2len(in_8(®s->rx.dlr) & 0xf);
310
311 if (!(frame->can_id & CAN_RTR_FLAG)) {
312 void __iomem *data = ®s->rx.dsr1_0;
313 u16 *payload = (u16 *)frame->data;
314
315 for (i = 0; i < frame->len / 2; i++) {
316 *payload++ = in_be16(data);
317 data += 2 + _MSCAN_RESERVED_DSR_SIZE;
318 }
319 /* read remaining byte if necessary */
320 if (frame->len & 1)
321 frame->data[frame->len - 1] = in_8(data);
322 }
323
324 out_8(®s->canrflg, MSCAN_RXF);
325}
326
327static void mscan_get_err_frame(struct net_device *dev, struct can_frame *frame,
328 u8 canrflg)
329{
330 struct mscan_priv *priv = netdev_priv(dev);
331 struct mscan_regs __iomem *regs = priv->reg_base;
332 struct net_device_stats *stats = &dev->stats;
333 enum can_state new_state;
334
335 netdev_dbg(dev, "error interrupt (canrflg=%#x)\n", canrflg);
336 frame->can_id = CAN_ERR_FLAG;
337
338 if (canrflg & MSCAN_OVRIF) {
339 frame->can_id |= CAN_ERR_CRTL;
340 frame->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
341 stats->rx_over_errors++;
342 stats->rx_errors++;
343 } else {
344 frame->data[1] = 0;
345 }
346
347 new_state = get_new_state(dev, canrflg);
348 if (new_state != priv->can.state) {
349 can_change_state(dev, frame,
350 state_map[MSCAN_STATE_TX(canrflg)],
351 state_map[MSCAN_STATE_RX(canrflg)]);
352
353 if (priv->can.state == CAN_STATE_BUS_OFF) {
354 /*
355 * The MSCAN on the MPC5200 does recover from bus-off
356 * automatically. To avoid that we stop the chip doing
357 * a light-weight stop (we are in irq-context).
358 */
359 if (priv->type != MSCAN_TYPE_MPC5121) {
360 out_8(®s->cantier, 0);
361 out_8(®s->canrier, 0);
362 setbits8(®s->canctl0,
363 MSCAN_SLPRQ | MSCAN_INITRQ);
364 }
365 can_bus_off(dev);
366 }
367 }
368 priv->shadow_statflg = canrflg & MSCAN_STAT_MSK;
369 frame->len = CAN_ERR_DLC;
370 out_8(®s->canrflg, MSCAN_ERR_IF);
371}
372
373static int mscan_rx_poll(struct napi_struct *napi, int quota)
374{
375 struct mscan_priv *priv = container_of(napi, struct mscan_priv, napi);
376 struct net_device *dev = napi->dev;
377 struct mscan_regs __iomem *regs = priv->reg_base;
378 struct net_device_stats *stats = &dev->stats;
379 int work_done = 0;
380 struct sk_buff *skb;
381 struct can_frame *frame;
382 u8 canrflg;
383
384 while (work_done < quota) {
385 canrflg = in_8(®s->canrflg);
386 if (!(canrflg & (MSCAN_RXF | MSCAN_ERR_IF)))
387 break;
388
389 skb = alloc_can_skb(dev, &frame);
390 if (!skb) {
391 if (printk_ratelimit())
392 netdev_notice(dev, "packet dropped\n");
393 stats->rx_dropped++;
394 out_8(®s->canrflg, canrflg);
395 continue;
396 }
397
398 if (canrflg & MSCAN_RXF) {
399 mscan_get_rx_frame(dev, frame);
400 stats->rx_packets++;
401 if (!(frame->can_id & CAN_RTR_FLAG))
402 stats->rx_bytes += frame->len;
403 } else if (canrflg & MSCAN_ERR_IF) {
404 mscan_get_err_frame(dev, frame, canrflg);
405 }
406
407 work_done++;
408 netif_receive_skb(skb);
409 }
410
411 if (work_done < quota) {
412 if (likely(napi_complete_done(&priv->napi, work_done))) {
413 clear_bit(F_RX_PROGRESS, &priv->flags);
414 if (priv->can.state < CAN_STATE_BUS_OFF)
415 out_8(®s->canrier, priv->shadow_canrier);
416 }
417 }
418 return work_done;
419}
420
421static irqreturn_t mscan_isr(int irq, void *dev_id)
422{
423 struct net_device *dev = (struct net_device *)dev_id;
424 struct mscan_priv *priv = netdev_priv(dev);
425 struct mscan_regs __iomem *regs = priv->reg_base;
426 struct net_device_stats *stats = &dev->stats;
427 u8 cantier, cantflg, canrflg;
428 irqreturn_t ret = IRQ_NONE;
429
430 cantier = in_8(®s->cantier) & MSCAN_TXE;
431 cantflg = in_8(®s->cantflg) & cantier;
432
433 if (cantier && cantflg) {
434 struct list_head *tmp, *pos;
435
436 list_for_each_safe(pos, tmp, &priv->tx_head) {
437 struct tx_queue_entry *entry =
438 list_entry(pos, struct tx_queue_entry, list);
439 u8 mask = entry->mask;
440
441 if (!(cantflg & mask))
442 continue;
443
444 out_8(®s->cantbsel, mask);
445 stats->tx_bytes += can_get_echo_skb(dev, entry->id,
446 NULL);
447 stats->tx_packets++;
448 priv->tx_active &= ~mask;
449 list_del(pos);
450 }
451
452 if (list_empty(&priv->tx_head)) {
453 clear_bit(F_TX_WAIT_ALL, &priv->flags);
454 clear_bit(F_TX_PROGRESS, &priv->flags);
455 priv->cur_pri = 0;
456 } else {
457 netif_trans_update(dev);
458 }
459
460 if (!test_bit(F_TX_WAIT_ALL, &priv->flags))
461 netif_wake_queue(dev);
462
463 out_8(®s->cantier, priv->tx_active);
464 ret = IRQ_HANDLED;
465 }
466
467 canrflg = in_8(®s->canrflg);
468 if ((canrflg & ~MSCAN_STAT_MSK) &&
469 !test_and_set_bit(F_RX_PROGRESS, &priv->flags)) {
470 if (canrflg & ~MSCAN_STAT_MSK) {
471 priv->shadow_canrier = in_8(®s->canrier);
472 out_8(®s->canrier, 0);
473 napi_schedule(&priv->napi);
474 ret = IRQ_HANDLED;
475 } else {
476 clear_bit(F_RX_PROGRESS, &priv->flags);
477 }
478 }
479 return ret;
480}
481
482static int mscan_do_set_mode(struct net_device *dev, enum can_mode mode)
483{
484 int ret = 0;
485
486 switch (mode) {
487 case CAN_MODE_START:
488 ret = mscan_restart(dev);
489 if (ret)
490 break;
491 if (netif_queue_stopped(dev))
492 netif_wake_queue(dev);
493 break;
494
495 default:
496 ret = -EOPNOTSUPP;
497 break;
498 }
499 return ret;
500}
501
502static int mscan_do_set_bittiming(struct net_device *dev)
503{
504 struct mscan_priv *priv = netdev_priv(dev);
505 struct mscan_regs __iomem *regs = priv->reg_base;
506 struct can_bittiming *bt = &priv->can.bittiming;
507 u8 btr0, btr1;
508
509 btr0 = BTR0_SET_BRP(bt->brp) | BTR0_SET_SJW(bt->sjw);
510 btr1 = (BTR1_SET_TSEG1(bt->prop_seg + bt->phase_seg1) |
511 BTR1_SET_TSEG2(bt->phase_seg2) |
512 BTR1_SET_SAM(priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES));
513
514 netdev_info(dev, "setting BTR0=0x%02x BTR1=0x%02x\n", btr0, btr1);
515
516 out_8(®s->canbtr0, btr0);
517 out_8(®s->canbtr1, btr1);
518
519 return 0;
520}
521
522static int mscan_get_berr_counter(const struct net_device *dev,
523 struct can_berr_counter *bec)
524{
525 struct mscan_priv *priv = netdev_priv(dev);
526 struct mscan_regs __iomem *regs = priv->reg_base;
527
528 bec->txerr = in_8(®s->cantxerr);
529 bec->rxerr = in_8(®s->canrxerr);
530
531 return 0;
532}
533
534static int mscan_open(struct net_device *dev)
535{
536 int ret;
537 struct mscan_priv *priv = netdev_priv(dev);
538 struct mscan_regs __iomem *regs = priv->reg_base;
539
540 ret = clk_prepare_enable(priv->clk_ipg);
541 if (ret)
542 goto exit_retcode;
543 ret = clk_prepare_enable(priv->clk_can);
544 if (ret)
545 goto exit_dis_ipg_clock;
546
547 /* common open */
548 ret = open_candev(dev);
549 if (ret)
550 goto exit_dis_can_clock;
551
552 napi_enable(&priv->napi);
553
554 ret = request_irq(dev->irq, mscan_isr, 0, dev->name, dev);
555 if (ret < 0) {
556 netdev_err(dev, "failed to attach interrupt\n");
557 goto exit_napi_disable;
558 }
559
560 if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY)
561 setbits8(®s->canctl1, MSCAN_LISTEN);
562 else
563 clrbits8(®s->canctl1, MSCAN_LISTEN);
564
565 ret = mscan_start(dev);
566 if (ret)
567 goto exit_free_irq;
568
569 netif_start_queue(dev);
570
571 return 0;
572
573exit_free_irq:
574 free_irq(dev->irq, dev);
575exit_napi_disable:
576 napi_disable(&priv->napi);
577 close_candev(dev);
578exit_dis_can_clock:
579 clk_disable_unprepare(priv->clk_can);
580exit_dis_ipg_clock:
581 clk_disable_unprepare(priv->clk_ipg);
582exit_retcode:
583 return ret;
584}
585
586static int mscan_close(struct net_device *dev)
587{
588 struct mscan_priv *priv = netdev_priv(dev);
589 struct mscan_regs __iomem *regs = priv->reg_base;
590
591 netif_stop_queue(dev);
592 napi_disable(&priv->napi);
593
594 out_8(®s->cantier, 0);
595 out_8(®s->canrier, 0);
596 mscan_set_mode(dev, MSCAN_INIT_MODE);
597 close_candev(dev);
598 free_irq(dev->irq, dev);
599
600 clk_disable_unprepare(priv->clk_can);
601 clk_disable_unprepare(priv->clk_ipg);
602
603 return 0;
604}
605
606static const struct net_device_ops mscan_netdev_ops = {
607 .ndo_open = mscan_open,
608 .ndo_stop = mscan_close,
609 .ndo_start_xmit = mscan_start_xmit,
610 .ndo_change_mtu = can_change_mtu,
611};
612
613static const struct ethtool_ops mscan_ethtool_ops = {
614 .get_ts_info = ethtool_op_get_ts_info,
615};
616
617int register_mscandev(struct net_device *dev, int mscan_clksrc)
618{
619 struct mscan_priv *priv = netdev_priv(dev);
620 struct mscan_regs __iomem *regs = priv->reg_base;
621 u8 ctl1;
622
623 ctl1 = in_8(®s->canctl1);
624 if (mscan_clksrc)
625 ctl1 |= MSCAN_CLKSRC;
626 else
627 ctl1 &= ~MSCAN_CLKSRC;
628
629 if (priv->type == MSCAN_TYPE_MPC5121) {
630 priv->can.do_get_berr_counter = mscan_get_berr_counter;
631 ctl1 |= MSCAN_BORM; /* bus-off recovery upon request */
632 }
633
634 ctl1 |= MSCAN_CANE;
635 out_8(®s->canctl1, ctl1);
636 udelay(100);
637
638 /* acceptance mask/acceptance code (accept everything) */
639 out_be16(®s->canidar1_0, 0);
640 out_be16(®s->canidar3_2, 0);
641 out_be16(®s->canidar5_4, 0);
642 out_be16(®s->canidar7_6, 0);
643
644 out_be16(®s->canidmr1_0, 0xffff);
645 out_be16(®s->canidmr3_2, 0xffff);
646 out_be16(®s->canidmr5_4, 0xffff);
647 out_be16(®s->canidmr7_6, 0xffff);
648 /* Two 32 bit Acceptance Filters */
649 out_8(®s->canidac, MSCAN_AF_32BIT);
650
651 mscan_set_mode(dev, MSCAN_INIT_MODE);
652
653 return register_candev(dev);
654}
655
656void unregister_mscandev(struct net_device *dev)
657{
658 struct mscan_priv *priv = netdev_priv(dev);
659 struct mscan_regs __iomem *regs = priv->reg_base;
660 mscan_set_mode(dev, MSCAN_INIT_MODE);
661 clrbits8(®s->canctl1, MSCAN_CANE);
662 unregister_candev(dev);
663}
664
665struct net_device *alloc_mscandev(void)
666{
667 struct net_device *dev;
668 struct mscan_priv *priv;
669 int i;
670
671 dev = alloc_candev(sizeof(struct mscan_priv), MSCAN_ECHO_SKB_MAX);
672 if (!dev)
673 return NULL;
674 priv = netdev_priv(dev);
675
676 dev->netdev_ops = &mscan_netdev_ops;
677 dev->ethtool_ops = &mscan_ethtool_ops;
678
679 dev->flags |= IFF_ECHO; /* we support local echo */
680
681 netif_napi_add_weight(dev, &priv->napi, mscan_rx_poll, 8);
682
683 priv->can.bittiming_const = &mscan_bittiming_const;
684 priv->can.do_set_bittiming = mscan_do_set_bittiming;
685 priv->can.do_set_mode = mscan_do_set_mode;
686 priv->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES |
687 CAN_CTRLMODE_LISTENONLY;
688
689 for (i = 0; i < TX_QUEUE_SIZE; i++) {
690 priv->tx_queue[i].id = i;
691 priv->tx_queue[i].mask = 1 << i;
692 }
693
694 return dev;
695}
696
697MODULE_AUTHOR("Andrey Volkov <avolkov@varma-el.com>");
698MODULE_LICENSE("GPL v2");
699MODULE_DESCRIPTION("CAN port driver for a MSCAN based chips");
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * CAN bus driver for the alone generic (as possible as) MSCAN controller.
4 *
5 * Copyright (C) 2005-2006 Andrey Volkov <avolkov@varma-el.com>,
6 * Varma Electronics Oy
7 * Copyright (C) 2008-2009 Wolfgang Grandegger <wg@grandegger.com>
8 * Copyright (C) 2008-2009 Pengutronix <kernel@pengutronix.de>
9 */
10
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/interrupt.h>
14#include <linux/delay.h>
15#include <linux/netdevice.h>
16#include <linux/if_arp.h>
17#include <linux/if_ether.h>
18#include <linux/list.h>
19#include <linux/can/dev.h>
20#include <linux/can/error.h>
21#include <linux/io.h>
22
23#include "mscan.h"
24
25static const struct can_bittiming_const mscan_bittiming_const = {
26 .name = "mscan",
27 .tseg1_min = 4,
28 .tseg1_max = 16,
29 .tseg2_min = 2,
30 .tseg2_max = 8,
31 .sjw_max = 4,
32 .brp_min = 1,
33 .brp_max = 64,
34 .brp_inc = 1,
35};
36
37struct mscan_state {
38 u8 mode;
39 u8 canrier;
40 u8 cantier;
41};
42
43static enum can_state state_map[] = {
44 CAN_STATE_ERROR_ACTIVE,
45 CAN_STATE_ERROR_WARNING,
46 CAN_STATE_ERROR_PASSIVE,
47 CAN_STATE_BUS_OFF
48};
49
50static int mscan_set_mode(struct net_device *dev, u8 mode)
51{
52 struct mscan_priv *priv = netdev_priv(dev);
53 struct mscan_regs __iomem *regs = priv->reg_base;
54 int ret = 0;
55 int i;
56 u8 canctl1;
57
58 if (mode != MSCAN_NORMAL_MODE) {
59 if (priv->tx_active) {
60 /* Abort transfers before going to sleep */#
61 out_8(®s->cantarq, priv->tx_active);
62 /* Suppress TX done interrupts */
63 out_8(®s->cantier, 0);
64 }
65
66 canctl1 = in_8(®s->canctl1);
67 if ((mode & MSCAN_SLPRQ) && !(canctl1 & MSCAN_SLPAK)) {
68 setbits8(®s->canctl0, MSCAN_SLPRQ);
69 for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) {
70 if (in_8(®s->canctl1) & MSCAN_SLPAK)
71 break;
72 udelay(100);
73 }
74 /*
75 * The mscan controller will fail to enter sleep mode,
76 * while there are irregular activities on bus, like
77 * somebody keeps retransmitting. This behavior is
78 * undocumented and seems to differ between mscan built
79 * in mpc5200b and mpc5200. We proceed in that case,
80 * since otherwise the slprq will be kept set and the
81 * controller will get stuck. NOTE: INITRQ or CSWAI
82 * will abort all active transmit actions, if still
83 * any, at once.
84 */
85 if (i >= MSCAN_SET_MODE_RETRIES)
86 netdev_dbg(dev,
87 "device failed to enter sleep mode. "
88 "We proceed anyhow.\n");
89 else
90 priv->can.state = CAN_STATE_SLEEPING;
91 }
92
93 if ((mode & MSCAN_INITRQ) && !(canctl1 & MSCAN_INITAK)) {
94 setbits8(®s->canctl0, MSCAN_INITRQ);
95 for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) {
96 if (in_8(®s->canctl1) & MSCAN_INITAK)
97 break;
98 }
99 if (i >= MSCAN_SET_MODE_RETRIES)
100 ret = -ENODEV;
101 }
102 if (!ret)
103 priv->can.state = CAN_STATE_STOPPED;
104
105 if (mode & MSCAN_CSWAI)
106 setbits8(®s->canctl0, MSCAN_CSWAI);
107
108 } else {
109 canctl1 = in_8(®s->canctl1);
110 if (canctl1 & (MSCAN_SLPAK | MSCAN_INITAK)) {
111 clrbits8(®s->canctl0, MSCAN_SLPRQ | MSCAN_INITRQ);
112 for (i = 0; i < MSCAN_SET_MODE_RETRIES; i++) {
113 canctl1 = in_8(®s->canctl1);
114 if (!(canctl1 & (MSCAN_INITAK | MSCAN_SLPAK)))
115 break;
116 }
117 if (i >= MSCAN_SET_MODE_RETRIES)
118 ret = -ENODEV;
119 else
120 priv->can.state = CAN_STATE_ERROR_ACTIVE;
121 }
122 }
123 return ret;
124}
125
126static int mscan_start(struct net_device *dev)
127{
128 struct mscan_priv *priv = netdev_priv(dev);
129 struct mscan_regs __iomem *regs = priv->reg_base;
130 u8 canrflg;
131 int err;
132
133 out_8(®s->canrier, 0);
134
135 INIT_LIST_HEAD(&priv->tx_head);
136 priv->prev_buf_id = 0;
137 priv->cur_pri = 0;
138 priv->tx_active = 0;
139 priv->shadow_canrier = 0;
140 priv->flags = 0;
141
142 if (priv->type == MSCAN_TYPE_MPC5121) {
143 /* Clear pending bus-off condition */
144 if (in_8(®s->canmisc) & MSCAN_BOHOLD)
145 out_8(®s->canmisc, MSCAN_BOHOLD);
146 }
147
148 err = mscan_set_mode(dev, MSCAN_NORMAL_MODE);
149 if (err)
150 return err;
151
152 canrflg = in_8(®s->canrflg);
153 priv->shadow_statflg = canrflg & MSCAN_STAT_MSK;
154 priv->can.state = state_map[max(MSCAN_STATE_RX(canrflg),
155 MSCAN_STATE_TX(canrflg))];
156 out_8(®s->cantier, 0);
157
158 /* Enable receive interrupts. */
159 out_8(®s->canrier, MSCAN_RX_INTS_ENABLE);
160
161 return 0;
162}
163
164static int mscan_restart(struct net_device *dev)
165{
166 struct mscan_priv *priv = netdev_priv(dev);
167
168 if (priv->type == MSCAN_TYPE_MPC5121) {
169 struct mscan_regs __iomem *regs = priv->reg_base;
170
171 priv->can.state = CAN_STATE_ERROR_ACTIVE;
172 WARN(!(in_8(®s->canmisc) & MSCAN_BOHOLD),
173 "bus-off state expected\n");
174 out_8(®s->canmisc, MSCAN_BOHOLD);
175 /* Re-enable receive interrupts. */
176 out_8(®s->canrier, MSCAN_RX_INTS_ENABLE);
177 } else {
178 if (priv->can.state <= CAN_STATE_BUS_OFF)
179 mscan_set_mode(dev, MSCAN_INIT_MODE);
180 return mscan_start(dev);
181 }
182
183 return 0;
184}
185
186static netdev_tx_t mscan_start_xmit(struct sk_buff *skb, struct net_device *dev)
187{
188 struct can_frame *frame = (struct can_frame *)skb->data;
189 struct mscan_priv *priv = netdev_priv(dev);
190 struct mscan_regs __iomem *regs = priv->reg_base;
191 int i, rtr, buf_id;
192 u32 can_id;
193
194 if (can_dev_dropped_skb(dev, skb))
195 return NETDEV_TX_OK;
196
197 out_8(®s->cantier, 0);
198
199 i = ~priv->tx_active & MSCAN_TXE;
200 buf_id = ffs(i) - 1;
201 switch (hweight8(i)) {
202 case 0:
203 netif_stop_queue(dev);
204 netdev_err(dev, "Tx Ring full when queue awake!\n");
205 return NETDEV_TX_BUSY;
206 case 1:
207 /*
208 * if buf_id < 3, then current frame will be send out of order,
209 * since buffer with lower id have higher priority (hell..)
210 */
211 netif_stop_queue(dev);
212 fallthrough;
213 case 2:
214 if (buf_id < priv->prev_buf_id) {
215 priv->cur_pri++;
216 if (priv->cur_pri == 0xff) {
217 set_bit(F_TX_WAIT_ALL, &priv->flags);
218 netif_stop_queue(dev);
219 }
220 }
221 set_bit(F_TX_PROGRESS, &priv->flags);
222 break;
223 }
224 priv->prev_buf_id = buf_id;
225 out_8(®s->cantbsel, i);
226
227 rtr = frame->can_id & CAN_RTR_FLAG;
228
229 /* RTR is always the lowest bit of interest, then IDs follow */
230 if (frame->can_id & CAN_EFF_FLAG) {
231 can_id = (frame->can_id & CAN_EFF_MASK)
232 << (MSCAN_EFF_RTR_SHIFT + 1);
233 if (rtr)
234 can_id |= 1 << MSCAN_EFF_RTR_SHIFT;
235 out_be16(®s->tx.idr3_2, can_id);
236
237 can_id >>= 16;
238 /* EFF_FLAGS are between the IDs :( */
239 can_id = (can_id & 0x7) | ((can_id << 2) & 0xffe0)
240 | MSCAN_EFF_FLAGS;
241 } else {
242 can_id = (frame->can_id & CAN_SFF_MASK)
243 << (MSCAN_SFF_RTR_SHIFT + 1);
244 if (rtr)
245 can_id |= 1 << MSCAN_SFF_RTR_SHIFT;
246 }
247 out_be16(®s->tx.idr1_0, can_id);
248
249 if (!rtr) {
250 void __iomem *data = ®s->tx.dsr1_0;
251 u16 *payload = (u16 *)frame->data;
252
253 for (i = 0; i < frame->len / 2; i++) {
254 out_be16(data, *payload++);
255 data += 2 + _MSCAN_RESERVED_DSR_SIZE;
256 }
257 /* write remaining byte if necessary */
258 if (frame->len & 1)
259 out_8(data, frame->data[frame->len - 1]);
260 }
261
262 out_8(®s->tx.dlr, frame->len);
263 out_8(®s->tx.tbpr, priv->cur_pri);
264
265 /* Start transmission. */
266 out_8(®s->cantflg, 1 << buf_id);
267
268 if (!test_bit(F_TX_PROGRESS, &priv->flags))
269 netif_trans_update(dev);
270
271 list_add_tail(&priv->tx_queue[buf_id].list, &priv->tx_head);
272
273 can_put_echo_skb(skb, dev, buf_id, 0);
274
275 /* Enable interrupt. */
276 priv->tx_active |= 1 << buf_id;
277 out_8(®s->cantier, priv->tx_active);
278
279 return NETDEV_TX_OK;
280}
281
282static enum can_state get_new_state(struct net_device *dev, u8 canrflg)
283{
284 struct mscan_priv *priv = netdev_priv(dev);
285
286 if (unlikely(canrflg & MSCAN_CSCIF))
287 return state_map[max(MSCAN_STATE_RX(canrflg),
288 MSCAN_STATE_TX(canrflg))];
289
290 return priv->can.state;
291}
292
293static void mscan_get_rx_frame(struct net_device *dev, struct can_frame *frame)
294{
295 struct mscan_priv *priv = netdev_priv(dev);
296 struct mscan_regs __iomem *regs = priv->reg_base;
297 u32 can_id;
298 int i;
299
300 can_id = in_be16(®s->rx.idr1_0);
301 if (can_id & (1 << 3)) {
302 frame->can_id = CAN_EFF_FLAG;
303 can_id = ((can_id << 16) | in_be16(®s->rx.idr3_2));
304 can_id = ((can_id & 0xffe00000) |
305 ((can_id & 0x7ffff) << 2)) >> 2;
306 } else {
307 can_id >>= 4;
308 frame->can_id = 0;
309 }
310
311 frame->can_id |= can_id >> 1;
312 if (can_id & 1)
313 frame->can_id |= CAN_RTR_FLAG;
314
315 frame->len = can_cc_dlc2len(in_8(®s->rx.dlr) & 0xf);
316
317 if (!(frame->can_id & CAN_RTR_FLAG)) {
318 void __iomem *data = ®s->rx.dsr1_0;
319 u16 *payload = (u16 *)frame->data;
320
321 for (i = 0; i < frame->len / 2; i++) {
322 *payload++ = in_be16(data);
323 data += 2 + _MSCAN_RESERVED_DSR_SIZE;
324 }
325 /* read remaining byte if necessary */
326 if (frame->len & 1)
327 frame->data[frame->len - 1] = in_8(data);
328 }
329
330 out_8(®s->canrflg, MSCAN_RXF);
331}
332
333static void mscan_get_err_frame(struct net_device *dev, struct can_frame *frame,
334 u8 canrflg)
335{
336 struct mscan_priv *priv = netdev_priv(dev);
337 struct mscan_regs __iomem *regs = priv->reg_base;
338 struct net_device_stats *stats = &dev->stats;
339 enum can_state new_state;
340
341 netdev_dbg(dev, "error interrupt (canrflg=%#x)\n", canrflg);
342 frame->can_id = CAN_ERR_FLAG;
343
344 if (canrflg & MSCAN_OVRIF) {
345 frame->can_id |= CAN_ERR_CRTL;
346 frame->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
347 stats->rx_over_errors++;
348 stats->rx_errors++;
349 } else {
350 frame->data[1] = 0;
351 }
352
353 new_state = get_new_state(dev, canrflg);
354 if (new_state != priv->can.state) {
355 can_change_state(dev, frame,
356 state_map[MSCAN_STATE_TX(canrflg)],
357 state_map[MSCAN_STATE_RX(canrflg)]);
358
359 if (priv->can.state == CAN_STATE_BUS_OFF) {
360 /*
361 * The MSCAN on the MPC5200 does recover from bus-off
362 * automatically. To avoid that we stop the chip doing
363 * a light-weight stop (we are in irq-context).
364 */
365 if (priv->type != MSCAN_TYPE_MPC5121) {
366 out_8(®s->cantier, 0);
367 out_8(®s->canrier, 0);
368 setbits8(®s->canctl0,
369 MSCAN_SLPRQ | MSCAN_INITRQ);
370 }
371 can_bus_off(dev);
372 }
373 }
374 priv->shadow_statflg = canrflg & MSCAN_STAT_MSK;
375 frame->len = CAN_ERR_DLC;
376 out_8(®s->canrflg, MSCAN_ERR_IF);
377}
378
379static int mscan_rx_poll(struct napi_struct *napi, int quota)
380{
381 struct mscan_priv *priv = container_of(napi, struct mscan_priv, napi);
382 struct net_device *dev = napi->dev;
383 struct mscan_regs __iomem *regs = priv->reg_base;
384 struct net_device_stats *stats = &dev->stats;
385 int work_done = 0;
386 struct sk_buff *skb;
387 struct can_frame *frame;
388 u8 canrflg;
389
390 while (work_done < quota) {
391 canrflg = in_8(®s->canrflg);
392 if (!(canrflg & (MSCAN_RXF | MSCAN_ERR_IF)))
393 break;
394
395 skb = alloc_can_skb(dev, &frame);
396 if (!skb) {
397 if (printk_ratelimit())
398 netdev_notice(dev, "packet dropped\n");
399 stats->rx_dropped++;
400 out_8(®s->canrflg, canrflg);
401 continue;
402 }
403
404 if (canrflg & MSCAN_RXF) {
405 mscan_get_rx_frame(dev, frame);
406 stats->rx_packets++;
407 if (!(frame->can_id & CAN_RTR_FLAG))
408 stats->rx_bytes += frame->len;
409 } else if (canrflg & MSCAN_ERR_IF) {
410 mscan_get_err_frame(dev, frame, canrflg);
411 }
412
413 work_done++;
414 netif_receive_skb(skb);
415 }
416
417 if (work_done < quota) {
418 if (likely(napi_complete_done(&priv->napi, work_done))) {
419 clear_bit(F_RX_PROGRESS, &priv->flags);
420 if (priv->can.state < CAN_STATE_BUS_OFF)
421 out_8(®s->canrier, priv->shadow_canrier);
422 }
423 }
424 return work_done;
425}
426
427static irqreturn_t mscan_isr(int irq, void *dev_id)
428{
429 struct net_device *dev = (struct net_device *)dev_id;
430 struct mscan_priv *priv = netdev_priv(dev);
431 struct mscan_regs __iomem *regs = priv->reg_base;
432 struct net_device_stats *stats = &dev->stats;
433 u8 cantier, cantflg, canrflg;
434 irqreturn_t ret = IRQ_NONE;
435
436 cantier = in_8(®s->cantier) & MSCAN_TXE;
437 cantflg = in_8(®s->cantflg) & cantier;
438
439 if (cantier && cantflg) {
440 struct list_head *tmp, *pos;
441
442 list_for_each_safe(pos, tmp, &priv->tx_head) {
443 struct tx_queue_entry *entry =
444 list_entry(pos, struct tx_queue_entry, list);
445 u8 mask = entry->mask;
446
447 if (!(cantflg & mask))
448 continue;
449
450 out_8(®s->cantbsel, mask);
451 stats->tx_bytes += can_get_echo_skb(dev, entry->id,
452 NULL);
453 stats->tx_packets++;
454 priv->tx_active &= ~mask;
455 list_del(pos);
456 }
457
458 if (list_empty(&priv->tx_head)) {
459 clear_bit(F_TX_WAIT_ALL, &priv->flags);
460 clear_bit(F_TX_PROGRESS, &priv->flags);
461 priv->cur_pri = 0;
462 } else {
463 netif_trans_update(dev);
464 }
465
466 if (!test_bit(F_TX_WAIT_ALL, &priv->flags))
467 netif_wake_queue(dev);
468
469 out_8(®s->cantier, priv->tx_active);
470 ret = IRQ_HANDLED;
471 }
472
473 canrflg = in_8(®s->canrflg);
474 if ((canrflg & ~MSCAN_STAT_MSK) &&
475 !test_and_set_bit(F_RX_PROGRESS, &priv->flags)) {
476 if (canrflg & ~MSCAN_STAT_MSK) {
477 priv->shadow_canrier = in_8(®s->canrier);
478 out_8(®s->canrier, 0);
479 napi_schedule(&priv->napi);
480 ret = IRQ_HANDLED;
481 } else {
482 clear_bit(F_RX_PROGRESS, &priv->flags);
483 }
484 }
485 return ret;
486}
487
488static int mscan_do_set_mode(struct net_device *dev, enum can_mode mode)
489{
490 int ret = 0;
491
492 switch (mode) {
493 case CAN_MODE_START:
494 ret = mscan_restart(dev);
495 if (ret)
496 break;
497 if (netif_queue_stopped(dev))
498 netif_wake_queue(dev);
499 break;
500
501 default:
502 ret = -EOPNOTSUPP;
503 break;
504 }
505 return ret;
506}
507
508static int mscan_do_set_bittiming(struct net_device *dev)
509{
510 struct mscan_priv *priv = netdev_priv(dev);
511 struct mscan_regs __iomem *regs = priv->reg_base;
512 struct can_bittiming *bt = &priv->can.bittiming;
513 u8 btr0, btr1;
514
515 btr0 = BTR0_SET_BRP(bt->brp) | BTR0_SET_SJW(bt->sjw);
516 btr1 = (BTR1_SET_TSEG1(bt->prop_seg + bt->phase_seg1) |
517 BTR1_SET_TSEG2(bt->phase_seg2) |
518 BTR1_SET_SAM(priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES));
519
520 netdev_info(dev, "setting BTR0=0x%02x BTR1=0x%02x\n", btr0, btr1);
521
522 out_8(®s->canbtr0, btr0);
523 out_8(®s->canbtr1, btr1);
524
525 return 0;
526}
527
528static int mscan_get_berr_counter(const struct net_device *dev,
529 struct can_berr_counter *bec)
530{
531 struct mscan_priv *priv = netdev_priv(dev);
532 struct mscan_regs __iomem *regs = priv->reg_base;
533
534 bec->txerr = in_8(®s->cantxerr);
535 bec->rxerr = in_8(®s->canrxerr);
536
537 return 0;
538}
539
540static int mscan_open(struct net_device *dev)
541{
542 int ret;
543 struct mscan_priv *priv = netdev_priv(dev);
544 struct mscan_regs __iomem *regs = priv->reg_base;
545
546 ret = clk_prepare_enable(priv->clk_ipg);
547 if (ret)
548 goto exit_retcode;
549 ret = clk_prepare_enable(priv->clk_can);
550 if (ret)
551 goto exit_dis_ipg_clock;
552
553 /* common open */
554 ret = open_candev(dev);
555 if (ret)
556 goto exit_dis_can_clock;
557
558 napi_enable(&priv->napi);
559
560 ret = request_irq(dev->irq, mscan_isr, 0, dev->name, dev);
561 if (ret < 0) {
562 netdev_err(dev, "failed to attach interrupt\n");
563 goto exit_napi_disable;
564 }
565
566 if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY)
567 setbits8(®s->canctl1, MSCAN_LISTEN);
568 else
569 clrbits8(®s->canctl1, MSCAN_LISTEN);
570
571 ret = mscan_start(dev);
572 if (ret)
573 goto exit_free_irq;
574
575 netif_start_queue(dev);
576
577 return 0;
578
579exit_free_irq:
580 free_irq(dev->irq, dev);
581exit_napi_disable:
582 napi_disable(&priv->napi);
583 close_candev(dev);
584exit_dis_can_clock:
585 clk_disable_unprepare(priv->clk_can);
586exit_dis_ipg_clock:
587 clk_disable_unprepare(priv->clk_ipg);
588exit_retcode:
589 return ret;
590}
591
592static int mscan_close(struct net_device *dev)
593{
594 struct mscan_priv *priv = netdev_priv(dev);
595 struct mscan_regs __iomem *regs = priv->reg_base;
596
597 netif_stop_queue(dev);
598 napi_disable(&priv->napi);
599
600 out_8(®s->cantier, 0);
601 out_8(®s->canrier, 0);
602 mscan_set_mode(dev, MSCAN_INIT_MODE);
603 close_candev(dev);
604 free_irq(dev->irq, dev);
605
606 clk_disable_unprepare(priv->clk_can);
607 clk_disable_unprepare(priv->clk_ipg);
608
609 return 0;
610}
611
612static const struct net_device_ops mscan_netdev_ops = {
613 .ndo_open = mscan_open,
614 .ndo_stop = mscan_close,
615 .ndo_start_xmit = mscan_start_xmit,
616 .ndo_change_mtu = can_change_mtu,
617};
618
619static const struct ethtool_ops mscan_ethtool_ops = {
620 .get_ts_info = ethtool_op_get_ts_info,
621};
622
623int register_mscandev(struct net_device *dev, int mscan_clksrc)
624{
625 struct mscan_priv *priv = netdev_priv(dev);
626 struct mscan_regs __iomem *regs = priv->reg_base;
627 u8 ctl1;
628
629 ctl1 = in_8(®s->canctl1);
630 if (mscan_clksrc)
631 ctl1 |= MSCAN_CLKSRC;
632 else
633 ctl1 &= ~MSCAN_CLKSRC;
634
635 if (priv->type == MSCAN_TYPE_MPC5121) {
636 priv->can.do_get_berr_counter = mscan_get_berr_counter;
637 ctl1 |= MSCAN_BORM; /* bus-off recovery upon request */
638 }
639
640 ctl1 |= MSCAN_CANE;
641 out_8(®s->canctl1, ctl1);
642 udelay(100);
643
644 /* acceptance mask/acceptance code (accept everything) */
645 out_be16(®s->canidar1_0, 0);
646 out_be16(®s->canidar3_2, 0);
647 out_be16(®s->canidar5_4, 0);
648 out_be16(®s->canidar7_6, 0);
649
650 out_be16(®s->canidmr1_0, 0xffff);
651 out_be16(®s->canidmr3_2, 0xffff);
652 out_be16(®s->canidmr5_4, 0xffff);
653 out_be16(®s->canidmr7_6, 0xffff);
654 /* Two 32 bit Acceptance Filters */
655 out_8(®s->canidac, MSCAN_AF_32BIT);
656
657 mscan_set_mode(dev, MSCAN_INIT_MODE);
658
659 return register_candev(dev);
660}
661
662void unregister_mscandev(struct net_device *dev)
663{
664 struct mscan_priv *priv = netdev_priv(dev);
665 struct mscan_regs __iomem *regs = priv->reg_base;
666 mscan_set_mode(dev, MSCAN_INIT_MODE);
667 clrbits8(®s->canctl1, MSCAN_CANE);
668 unregister_candev(dev);
669}
670
671struct net_device *alloc_mscandev(void)
672{
673 struct net_device *dev;
674 struct mscan_priv *priv;
675 int i;
676
677 dev = alloc_candev(sizeof(struct mscan_priv), MSCAN_ECHO_SKB_MAX);
678 if (!dev)
679 return NULL;
680 priv = netdev_priv(dev);
681
682 dev->netdev_ops = &mscan_netdev_ops;
683 dev->ethtool_ops = &mscan_ethtool_ops;
684
685 dev->flags |= IFF_ECHO; /* we support local echo */
686
687 netif_napi_add_weight(dev, &priv->napi, mscan_rx_poll, 8);
688
689 priv->can.bittiming_const = &mscan_bittiming_const;
690 priv->can.do_set_bittiming = mscan_do_set_bittiming;
691 priv->can.do_set_mode = mscan_do_set_mode;
692 priv->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES |
693 CAN_CTRLMODE_LISTENONLY;
694
695 for (i = 0; i < TX_QUEUE_SIZE; i++) {
696 priv->tx_queue[i].id = i;
697 priv->tx_queue[i].mask = 1 << i;
698 }
699
700 return dev;
701}
702
703MODULE_AUTHOR("Andrey Volkov <avolkov@varma-el.com>");
704MODULE_LICENSE("GPL v2");
705MODULE_DESCRIPTION("CAN port driver for a MSCAN based chips");